YU18284A - Process for forming multi-layered metallic structure for semiconductor device - Google Patents

Process for forming multi-layered metallic structure for semiconductor device

Info

Publication number
YU18284A
YU18284A YU00182/84A YU18284A YU18284A YU 18284 A YU18284 A YU 18284A YU 00182/84 A YU00182/84 A YU 00182/84A YU 18284 A YU18284 A YU 18284A YU 18284 A YU18284 A YU 18284A
Authority
YU
Yugoslavia
Prior art keywords
semiconductor device
metallic structure
forming multi
layered metallic
layered
Prior art date
Application number
YU00182/84A
Inventor
A W Fischer
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of YU18284A publication Critical patent/YU18284A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
YU00182/84A 1983-02-10 1984-02-02 Process for forming multi-layered metallic structure for semiconductor device YU18284A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US46564083A 1983-02-10 1983-02-10

Publications (1)

Publication Number Publication Date
YU18284A true YU18284A (en) 1987-12-31

Family

ID=23848579

Family Applications (1)

Application Number Title Priority Date Filing Date
YU00182/84A YU18284A (en) 1983-02-10 1984-02-02 Process for forming multi-layered metallic structure for semiconductor device

Country Status (7)

Country Link
JP (1) JPH0666313B2 (en)
KR (1) KR910008104B1 (en)
CA (1) CA1209281A (en)
GB (1) GB2135123B (en)
IT (1) IT1213136B (en)
SE (1) SE501466C2 (en)
YU (1) YU18284A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0763064B2 (en) * 1986-03-31 1995-07-05 株式会社日立製作所 Wiring connection method for IC element
JPH0719841B2 (en) * 1987-10-02 1995-03-06 株式会社東芝 Semiconductor device
USRE36475E (en) * 1993-09-15 1999-12-28 Hyundai Electronics Industries Co., Ltd. Method of forming a via plug in a semiconductor device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51112292A (en) * 1975-03-28 1976-10-04 Hitachi Ltd Semiconductor device
JPS55156365A (en) * 1979-05-24 1980-12-05 Toshiba Corp Semiconductor device

Also Published As

Publication number Publication date
GB8402109D0 (en) 1984-02-29
IT1213136B (en) 1989-12-14
SE501466C2 (en) 1995-02-20
KR840008215A (en) 1984-12-13
JPH0666313B2 (en) 1994-08-24
GB2135123B (en) 1987-05-20
CA1209281A (en) 1986-08-05
SE8400592L (en) 1984-08-11
KR910008104B1 (en) 1991-10-07
JPS59205739A (en) 1984-11-21
IT8419546A0 (en) 1984-02-09
GB2135123A (en) 1984-08-22
SE8400592D0 (en) 1984-02-06

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