Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G4/00—Fixed capacitors; Processes of their manufacture
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
  • H01G9/0029—Processes of manufacture
  • H01G9/0032—Processes of manufacture formation of the dielectric layer
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
  • H01G9/004—Details
  • H01G9/008—Terminals
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
  • H01G9/004—Details
  • H01G9/022—Electrolytes; Absorbents
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
  • H01G9/004—Details
  • H01G9/04—Electrodes or formation of dielectric layers thereon
  • H01G9/048—Electrodes or formation of dielectric layers thereon characterised by their structure
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
  • H01G9/004—Details
  • H01G9/07—Dielectric layers
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
  • H01G9/28—Structural combinations of electrolytic capacitors, rectifiers, detectors, switching devices with other electric components not covered by this subclass

Definitions

• the present disclosure relates to capacitors, electrical circuits, circuit boards, devices, and methods for manufacturing capacitors.
• capacitors are known that have a structure in which multiple dielectric layers and multiple conductors are stacked alternately.
• US Pat. No. 6,399,633 describes a capacitor having a metal-insulator-metal-insulator-metal (MIMIM) stack.
• the capacitor is formed in a trench in a substrate.
• the trench has end walls and a rim.
• the trench is configured with a pillar.
• the cross section of the pillar has a tripod-shaped profile.
• the trench has a filling formed by an alternating stack.
• the stack includes a first electrode, a first auxiliary layer, an additional electrode, an additional auxiliary layer, and a second electrode.
• the auxiliary layer electrically insulates the electrodes from each other.
• the electrodes are made of a conductive material such as doped polysilicon or a metal.
• the substrate is a high resistivity silicon substrate or a low resistivity substrate such as a p-type doped silicon wafer.
• the present disclosure provides a capacitor that is advantageous in terms of reducing size and substrate constraints while having multiple dielectric layers and multiple conductors.
• the capacitor of the present disclosure comprises: A conductive substrate; a first dielectric layer disposed on the substrate; a first conductor disposed on the first dielectric layer and having a layer shape; a second dielectric layer disposed on the first conductor; a second conductor disposed on the second dielectric layer.
• the first conductor includes an exposed portion that is not covered by the second dielectric layer and the second conductor; the substrate is electrically insulated from the first conductor by the first dielectric layer; the second conductor is electrically insulated from the first conductor by the second dielectric layer; The substrate includes a conductive portion electrically connected to the second electrical conductor.
• the present disclosure provides a capacitor that is advantageous in terms of reducing size and substrate constraints while having multiple dielectric layers and multiple conductors.
• FIG. 1 is a cross-sectional view showing an example of a capacitor according to the present disclosure.
• FIG. 2A is a cross-sectional view that illustrates an example of a method for manufacturing a capacitor according to the present disclosure.
• FIG. 2B is a flow chart illustrating an example of a method for manufacturing a capacitor according to the present disclosure.
• FIG. 3 is a cross-sectional view showing another example of a capacitor according to the present disclosure.
• FIG. 4 is a cross-sectional view of a portion of the capacitor shown in FIG.
• FIG. 5 is a cross-sectional view showing yet another example of a capacitor according to the present disclosure.
• FIG. 6 is a cross-sectional view showing another example of the method for manufacturing a capacitor according to the present disclosure.
• FIG. 1 is a cross-sectional view showing an example of a capacitor according to the present disclosure.
• FIG. 2A is a cross-sectional view that illustrates an example of a method for manufacturing a capacitor according to the present disclosure
• FIG. 7A is a diagram illustrating an example of an electric circuit according to the present disclosure.
• FIG. 7B is a diagram illustrating an example of a circuit board according to the present disclosure.
• FIG. 7C is a schematic diagram illustrating an example of an apparatus of the present disclosure.
• the dielectric layer in an electrolytic capacitor can be formed by anodizing a valve metal.
• the material of the dielectric layer is limited to an oxide of the valve metal, and it is not easy to increase the relative dielectric constant of the dielectric layer obtained by anodization.
• the average pore size of such a porous body is as small as about 100 nm, and it is not easy to further increase the specific surface area of the electrode.
• the capacitor described in Patent Document 1 uses a high-resistance silicon substrate or a low-resistance substrate such as a p-type doped silicon wafer, and is understood to correspond to a so-called silicon capacitor.
• the silicon capacitor is intended to increase the capacitance by significantly increasing the electrode surface by making it three-dimensional using the semiconductor metal-oxide semiconductor (MOS) process. For this reason, the capacitor described in Patent Document 1 is understood to be subject to restrictions on size and substrate.
• MOS semiconductor metal-oxide semiconductor
• the inventor therefore conducted extensive research into the structure of a capacitor that has multiple dielectric layers and multiple conductors, yet has few restrictions on size and substrate.
• a capacitor can be constructed that has few restrictions on size and substrate by having a specific relationship between a conductive substrate, a dielectric, and a conductor, and thus devised the capacitor disclosed herein.
• FIG. 1 is a cross-sectional view showing an example of a capacitor of the present disclosure.
• the capacitor 1a includes a conductive substrate 10, a first dielectric layer 21, a first conductor 31, a second dielectric layer 22, and a second conductor 32.
• the first dielectric layer 21 is disposed on the substrate 10.
• the first conductor 31 is disposed on the first dielectric layer 21 and has a layer shape.
• the second dielectric layer 22 is disposed on the first conductor 31.
• the second conductor 32 is disposed on the second dielectric layer 22.
• the first conductor 31 includes an exposed portion 31e that is not covered by the second dielectric layer 22 and the second conductor 32.
• the substrate 10 is electrically insulated from the first conductor 31 by the first dielectric layer 21.
• the second conductor 32 is electrically insulated from the first conductor 31 by the second dielectric layer 22.
• the substrate 10 includes a conductive portion 10c that is electrically connected to the second conductor 32. According to this configuration, the portion of the capacitor 1a including the first dielectric layer 21 and the portion including the second dielectric layer 22 can be electrically connected in parallel, so that the capacitor 1a is likely to have a high capacitance.
• the substrate 10 is not limited to a specific substrate as long as it is conductive, and the substrate of the capacitor 1a is less restricted. It is also possible to manufacture the capacitor 1a using processes other than the semiconductor MOS process, and the size of the capacitor 1a is less restricted, so that the capacitor 1a may be provided as a capacitor larger in size than a silicon capacitor, for example.
• the electrical connection between the conductive portion 10c and the second conductor 32 is not limited to a specific mode. As shown in FIG. 1, the conductive portion 10c may be in contact with the second conductor 32, for example. This configuration tends to simplify the structure of the capacitor 1a.
• the conductive portion 10c may be configured in a different mode from the other portions of the substrate 10 other than the conductive portion 10c.
• the conductive portion 10c may be configured by a conductive coating formed on the surface of the substrate 10 body.
• the conductive portion 10c may be electrically connected to the second conductor 32 with another conductive member disposed between the conductive portion 10c and the second conductor 32. In this case, for example, the conductive portion 10c is protected by the other conductive member, and the capacitor 1a tends to have high durability.
• FIG. 1 shows a cross-sectional view of a capacitor 1a having a three-dimensional shape.
• the conductive portion 10c may be surrounded by, for example, the second conductor 32.
• the conductive portion 10c is configured to have, for example, a cylindrical surface, and the second conductor 32 is formed to surround the cylindrical surface.
• the portion of the second conductor 32 that is disposed on the second dielectric layer 22 and the portion surrounding the conductive portion 10c are integrally configured.
• the second conductor 32 is formed, for example, in a tubular shape with a ring-shaped bottom, and the ring-shaped bottom surrounds the conductive portion 10c.
• the second conductor 32 is, for example, cylindrical.
• the capacitor 1a further includes, for example, a first terminal 41 and a second terminal 42.
• the first terminal 41 is electrically connected to the substrate 10 or the second conductor 32.
• the first terminal 41 is electrically connected to, for example, the substrate 10 or the second conductor 32.
• the first terminal 41 is electrically connected to, for example, the substrate 10, and is also electrically connected to the second conductor 32 by the substrate 10.
• the second terminal 42 is electrically connected to the first conductor 31. The potential of the substrate 10 or the second conductor 32 and the potential of the first conductor 31 are adjusted by the first terminal 41 and the second terminal 42.
• the anode includes a first terminal 41 and the cathode includes a second terminal 42.
• the anode may include a second terminal 42 and the cathode may include a first terminal 41.
• the electrical connection between the first terminal 41 and the substrate 10 or the second conductor 32 is not limited to a specific embodiment.
• the first terminal 41 includes, for example, a lead wire, one end of which is fixed to the substrate 10 or the second conductor 32.
• the electrical connection between the second terminal 42 and the first conductor 31 is not limited to a specific embodiment.
• the first conductor 31 is electrically connected to the second terminal 42, for example, by a conductive adhesive portion 35. With this configuration, the first conductor 31 can be protected by the conductive adhesive portion 35, and the capacitor 1a is likely to have high durability.
• the capacitor 1a further includes, for example, a case 50.
• the inside of the case 50 contains the substrate 10, the first dielectric layer 21, the first conductor 31, the second dielectric layer 22, the second conductor 32, and the conductive adhesive portion 35.
• the case 50 is made of a dielectric material such as resin.
• the case 50 includes, for example, a partition therein that electrically insulates the second conductor 32 and the conductive adhesive portion 35. A portion of the first terminal 41 and the second terminal 42 is extended to the outside of the case 50.
• the capacitor 1a has an MIMIM structure composed of a substrate 10, a first dielectric layer 21, a first conductor 31, a second dielectric layer 22, and a second conductor 32.
• FIG. 1 shows an example in which one MIMIM structure is housed in the case 50, but this is not limiting. A plurality of MIMIM structures stacked on top of each other may be housed in the case 50.
• the material of the substrate 10 is not limited to a specific material as long as it has electrical conductivity.
• the substrate 10 may contain, for example, a metal or a semiconductor whose electrical conductivity is increased by the inclusion of a dopant.
• the substrate 10 desirably has high electrical conductivity. From the viewpoint of high electrical conductivity, the substrate 10 desirably contains a metal.
• the metal may be a valve metal.
• the first dielectric layer 21 can be formed by anodization. Examples of valve metals are Al, Ta, Ti, Hf, Zr, Si, and Nb.
• the substrate 10 may be in the form of a sheet or a column.
• the thickness of the first dielectric layer 21 is not limited to a specific value.
• the thickness is, for example, 5 nm or more. This suppresses leakage current and makes it easier for the capacitor 1a to have the desired voltage resistance.
• the thickness of the first dielectric layer 21 is, for example, 500 nm or less. This makes it easier for the capacitor 1a to have a high capacitance.
• the thickness of the first dielectric layer 21 may be 10 nm or more, or may be 400 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, or 20 nm or less.
• the material of the first dielectric layer 21 is not limited to a specific material.
• the first dielectric layer 21 includes, for example, an oxide.
• the oxide includes at least one selected from the group consisting of hafnium, zirconium, aluminum, tantalum, titanium, silicon, zinc, and niobium.
• examples of the oxide include HfO 2 , ZrO 2 , Hf 1-x Zr x O 2 , Al 2 O 3 , Ta 2 O 5 , TiO 2 , SiO 2 , ZnO, and Nb 2 O 5.
• the first dielectric layer 21 including such an oxide can be formed, for example, by anodizing a valve metal. Therefore, the first dielectric layer 21 may be an anodized film.
• the oxide preferably includes at least one selected from the group consisting of Al 2 O 3 and Ta 2 O 5. In this case, the capacitor 1a is likely to have a high withstand voltage.
• the first dielectric layer 21 may contain an inorganic compound.
• the inorganic compound contains, for example, at least one selected from the group consisting of oxides, nitrides, and oxynitrides.
• the inorganic compound contains, for example, at least one selected from the group consisting of hafnium, zirconium, aluminum, tantalum, titanium, silicon, zinc, and niobium.
• the first dielectric layer 21 may be an oxide film other than an anodized film, or may be a vapor deposition film.
• vapor deposition may include physical vapor deposition and chemical vapor deposition as described in the Japanese Industrial Standard JIS H0211-1992.
• the vapor deposition film may be formed by a gas phase method such as chemical vapor deposition.
• the first dielectric layer 21 contains at least one selected from the group consisting of oxides, nitrides, and oxynitrides. Examples of oxides include HfO2 , ZrO2 , Hf1 -xZrxO2 , Al2O3 , Ta2O5 , TiO2 , SiO2 , ZnO, and Nb2O5 .
• nitrides examples include HfN, ZrN, Hf1 - xZrxN , AlN, and SiN .
• oxynitrides examples include HfON, ZrON, HfZrON, AlON, and SiON.
• the thickness of the first conductor 31 is not limited to a specific value.
• the thickness is, for example, 20 nm or more. This tends to reduce the electrical resistance of the first conductor 31.
• the thickness of the first conductor 31 is, for example, 500 nm or less. This tends to increase the capacitance density per volume of the capacitor 1a.
• the thickness of the first conductor 31 may be 30 nm or more, 40 nm or more, or 50 nm or more, or 400 nm or less, 300 nm or less, 200 nm or less, or 100 nm or less.
• the method for forming the first conductor 31 is not limited to a specific method.
• the first conductor 31 is, for example, a vapor deposition film.
• the first conductor 31 is formed by a gas phase method such as chemical vapor deposition. In this case, the first conductor 31 is more likely to cover the desired portion of the first dielectric layer 21.
• the first conductor 31 is preferably formed by atomic layer deposition (ALD). In this case, the first conductor 31 is more likely to cover the desired portion of the first dielectric layer 21, and the first conductor 31 is more likely to become a uniform layer.
• the first conductor 31 may be formed by physical vapor deposition such as sputtering.
• the first dielectric layer 21 and the first conductor 31 are arranged, for example, on multiple intersecting surfaces of the substrate 10.
• the thickness of the second dielectric layer 22 is not limited to a specific value.
• the thickness is, for example, 5 nm or more. This suppresses leakage current and makes it easier for the capacitor 1a to have the desired voltage resistance.
• the thickness of the second dielectric layer 22 is, for example, 500 nm or less. This makes it easier for the capacitor 1a to have a high capacitance.
• the thickness of the second dielectric layer 22 may be 10 nm or more, or may be 400 nm or less, 300 nm or less, 200 nm or less, or 100 nm or less.
• the material of the second dielectric layer 22 is not limited to a specific material.
• the second dielectric layer 22 includes, for example, an inorganic compound.
• the inorganic compound includes, for example, at least one selected from the group consisting of an oxide, a nitride, and an oxynitride.
• the inorganic compound includes, for example, at least one selected from the group consisting of hafnium, zirconium, aluminum, tantalum, titanium, silicon, niobium, and zinc.
• the oxide may include at least one selected from the group consisting of hafnium, zirconium, aluminum, tantalum, titanium, silicon, niobium, and zinc.
• the method for forming the second dielectric layer 22 is not limited to a specific method.
• the second dielectric layer 22 is, for example, a vapor deposition film.
• the second dielectric layer 22 is formed by a gas phase method such as chemical vapor deposition. In this case, the second dielectric layer 22 is more likely to cover the desired portion of the first conductor 31.
• the second dielectric layer 22 is preferably formed by ALD. In this case, the second dielectric layer 22 is more likely to cover the desired portion of the first conductor 31, and the second dielectric layer 22 is more likely to be uniform.
• the second dielectric layer 22 may be formed by physical vapor deposition such as sputtering.
• the second conductor 32 preferably contains a conductive polymer.
• the second conductor 32 is more likely to exhibit a self-repair function, and the capacitor 1a is more likely to have high reliability.
• Examples of conductive polymers are polyaniline and polypyrrole.
• Fig. 2A is a cross-sectional view showing a schematic example of a method for manufacturing a capacitor according to the present disclosure.
• Fig. 2B is a flow chart showing an example of a method for manufacturing a capacitor according to the present disclosure.
• the method for manufacturing a capacitor 1a includes, for example, the following steps (i) to (vi). According to such a method, there are few restrictions on the substrate 10 and there are also few restrictions on the size of the capacitor 1a that can be manufactured.
• a first dielectric layer 21 is formed on a substrate 10 having electrical conductivity.
• a layer of a first conductor 31 is formed on the first dielectric layer 21 .
• a method for manufacturing the capacitor 1a may include, for example, the following steps (ia) to (iva): According to this method, each layer can be placed at a desired position using masks M1 and M2.
• a first mask M1 placed on a first portion P1 which is a part of the surface of the substrate 10
• a first dielectric layer 21 is formed on the substrate 10 and the first mask M1
• a layer is formed on the first dielectric layer 21 using a first conductor 31.
• a second portion P2 which is part of the first dielectric layer 21 formed on the first mask M1 and a third portion P3 which is part of the first conductor 31 disposed on the second portion P2 are removed together with the first mask M1.
• a second dielectric layer 22 is formed on the second mask M2, the substrate 10, and the first conductor 31.
• the second mask M2 is positioned on a fourth portion P4 that is a part of the first portion P1 and a fifth portion P5 that is a part of the surface of the first conductor 31.
• the sixth portion P6, which is a part of the second dielectric layer 22 formed on the second mask M2, is removed together with the second mask M2 to obtain a first exposed portion E1 and a second exposed portion E2.
• a first mask M1 is placed on a first portion P1 of the substrate 10.
• the first portion P1 is, for example, the surface of one end of the substrate 10.
• a first dielectric layer 21 and a first conductor 31 are formed.
• the first dielectric layer 21 may be formed, for example, by anodization, or by a gas phase method such as ALD, chemical vapor deposition (CVD), mist CVD, and sputtering.
• the first conductor 31 is formed, for example, by a gas phase method such as ALD, chemical vapor deposition (CVD), mist CVD, and sputtering.
• step S103 the second portion P2 and the third portion P3 are removed together with the first mask M1.
• step S104 the second mask M2 is placed on the fourth portion P4 and the fifth portion P5.
• the fourth portion P4 is a part of the first portion P1, for example, the surface of one end of the substrate 10.
• the fifth portion P5 is a part of the surface of the first conductor 31, for example, the surface of the end of the first conductor 31 located near the end of the substrate 10 opposite the fourth portion P4.
• the second dielectric layer 22 is formed.
• the second dielectric layer 22 may be formed by a gas phase method such as ALD, CVD, mist CVD, and sputtering.
• step S106 the sixth portion P6 is removed together with the second mask M2 to obtain the first exposed portion E1 and the second exposed portion E2.
• step S107 the second terminal 42 is electrically connected to the first conductor 31.
• a conductive adhesive is supplied so as to contact the first exposed portion E1, and the conductive adhesive is solidified to form a conductive adhesive portion 35.
• the second terminal 42 is fixed by the conductive adhesive portion 35.
• a protective material 50r is formed so as to surround the first exposed portion E1 and the conductive adhesive portion 35.
• a second conductor 32 is formed.
• the second conductor 32 is formed so as to be in contact with the second exposed portion E2.
• the second conductor 32 is formed so as not to be in contact with the first exposed portion E1. Therefore, the second conductor 32 is electrically insulated from the first conductor 31.
• the second conductor 32 may be formed by electrolytic polymerization, or by a gas phase method such as ALD, CVD, mist CVD, and sputtering.
• step S110 the first terminal 41 is electrically connected to the substrate 10.
• the first terminal 41 is attached so that one end of the first terminal 41 contacts the substrate 10.
• step S111 the case 50 is formed by molding. At this time, a portion of the first terminal 41 and the second terminal 42 is taken out of the case 50.
• FIG. 3 is a cross-sectional view showing another example of a capacitor of the present disclosure.
• Capacitor 1b shown in FIG. 3 is configured similarly to capacitor 1a, except for the parts that will be specifically described. Components of capacitor 1b that are the same as or correspond to the components of capacitor 1a are given the same reference numerals, and detailed descriptions are omitted. The description of capacitor 1a also applies to capacitor 1b, unless technically inconsistent.
• capacitor 1b substrate 10 includes porous portion 11.
• First dielectric layer 21 is disposed on porous portion 11.
• FIG. 4 is a cross-sectional view of a portion of the capacitor shown in FIG. 3.
• FIG. 4 is a cross-sectional view of the porous portion 11 in contact with the first dielectric layer 21 and the area around the porous portion 11 in the capacitor 1b.
• the first dielectric layer 21, the first conductor 31, and the second dielectric layer 22 are formed to cover the wall surface of the porous portion 11.
• the holes in the porous portion 11 may extend straight without branching, or may extend branching.
• the porous portion 11 may have a trench-like, sponge-like, lattice-like, tunnel-like, or other structure.
• the porous portion 11 contains, for example, a valve metal.
• the first dielectric layer 21 can be formed in the porous portion 11 by anodization.
• the valve metal contained in the porous portion 11 may be aluminum.
• the porous portion 11 may be formed, for example, by electrolytic etching of aluminum foil. This makes it easier for the electrode area to become larger in the capacitor 1b, and makes it easier for the capacitor 1b to have a high capacitance.
• the porous portion 11 may contain a metal sintered body.
• the area of the electrodes in the capacitor 1b is likely to be larger, and the capacitor 1b is likely to have a high capacitance.
• the metal sintered body contains, for example, tantalum.
• the electrode area of capacitor 1b is more likely to be larger, and capacitor 1b is more likely to have a high capacitance.
• the conductive portion 10c may be formed by the porous portion 11.
• the second conductor 32 may be present inside the porous portion 11. This makes it less likely that a failure will occur in the electrical connection between the conductive portion 10c and the second conductor 32.
• the conductive portion 10c may be formed by a non-porous portion of the substrate 10.
• the substrate 10 has a dense portion 12.
• the dense portion 12 is a non-porous portion.
• the dense portion 12 forms, for example, the core of the substrate 10.
• a porous portion 11 is formed around the dense portion 12.
• FIG. 5 is a cross-sectional view showing yet another example of a capacitor of the present disclosure.
• Capacitor 1c shown in FIG. 5 is configured similarly to capacitor 1a, except for the parts that will be specifically described. Components of capacitor 1c that are the same as or correspond to the components of capacitor 1a are given the same reference numerals, and detailed descriptions are omitted. The description of capacitor 1a also applies to capacitor 1c, unless there is a technical contradiction.
• the first terminal 41 is electrically connected to the second conductor 32.
• the first terminal 41 is electrically connected to the substrate 10 by the second conductor 32.
• FIG. 6 is a cross-sectional view showing another example of the method for manufacturing a capacitor according to the present disclosure.
• FIG. 6 shows an example of the method for manufacturing a capacitor 1c.
• a first dielectric layer 21 is formed on a substrate 10.
• the first dielectric layer 21 may be formed by anodization or by a gas phase method such as ALD, CVD, mist CVD, and sputtering.
• a first conductor 31 is formed on the first dielectric layer 21.
• the first conductor 31 is formed by a gas phase method such as ALD, CVD, mist CVD, and sputtering.
• a mask M1 is placed on the end of the substrate 10. This mask M1 is removed together with the part of the first conductor 31 deposited on the mask M1 after the formation of the first conductor 31.
• the second dielectric layer 22 is formed on the first conductor 31 and the first dielectric layer 21.
• the second dielectric layer 22 is formed by a gas phase method such as ALD, CVD, mist CVD, and sputtering.
• a mask M2 is placed on the end of the first conductor 31 opposite the end where the mask M1 is placed.
• the mask M2 is removed together with the second dielectric layer 22 deposited on the mask M2. This results in an exposed portion 31e.
• the second conductor 32 is formed on the conductive portion 10c and the second dielectric layer 22.
• the conductive portion 10c of the substrate 10 comes into contact with the second conductor 32 and is electrically connected.
• the second conductor 32 is formed so as not to come into contact with the exposed portion 31e, and is electrically insulated from the first conductor 31.
• the second conductor 32 may be formed by electrolytic polymerization, or by a gas phase method such as ALD, CVD, mist CVD, and sputtering.
• the second conductor 32 is connected to the first terminal 41.
• the conductive adhesive portion 35 is formed on the exposed portion 31e.
• the conductive adhesive portion 35 is formed so as not to come into contact with the second conductor 32, and is electrically insulated from the second conductor 32.
• the conductive adhesive portion 35 is connected to the second terminal 42.
• the case 50 is formed by molding. At this time, a portion of the first terminal 41 and the second terminal 42 is taken out to the outside of the case 50.
• FIG. 7B is a schematic diagram showing an example of a circuit board according to the present disclosure.
• the circuit board 5 includes a capacitor 1a.
• an electric circuit 3 including the capacitor 1a is formed on the circuit board 5.
• the circuit board 5 may be an embedded board or a motherboard.
• the circuit board 5 may include a capacitor 1b or 1c.
• FIG. 7C is a diagram showing a schematic diagram of an example of a device according to the present disclosure.
• the device 7 includes a capacitor 1a.
• the device 7 includes, for example, a circuit board 5 including the capacitor 1a. Since the device 7 includes the capacitor 1a, the device 7 is likely to exhibit the desired performance.
• the device 7 may be an electronic device, a communication device, a signal processing device, or a power supply device.
• the device 7 may be a server, an AC adapter, an accelerator, or a flat panel display such as a liquid crystal display (LCD).
• the device 7 may be a USB charger, a solid state drive (SSD), an information terminal such as a PC, a smartphone, or a tablet PC, or an Ethernet switch.
• the device 7 may include a capacitor 1b or 1c.
• a conductive substrate a first dielectric layer disposed on the substrate; a first conductor disposed on the first dielectric layer and having a layer shape; a second dielectric layer disposed on the first conductor; a second conductor disposed on the second dielectric layer; the first conductor includes an exposed portion that is not covered by the second dielectric layer and the second conductor; the substrate is electrically insulated from the first conductor by the first dielectric layer; the second conductor is electrically insulated from the first conductor by the second dielectric layer; The substrate includes a conductive portion electrically connected to the second conductive material. Capacitor.
• the substrate includes a porous portion, The first dielectric layer is disposed on the porous portion.
• the capacitor according to any one of the first to third aspects.
• the porous portion includes a valve metal.
• the porous portion includes a metal sintered body.
• At least one selected from the group consisting of the first dielectric layer and the second dielectric layer contains an inorganic compound,
• the inorganic compound includes at least one selected from the group consisting of an oxide, a nitride, and an oxynitride,
• the oxide contains at least one selected from the group consisting of hafnium, zirconium, aluminum, tantalum, titanium, silicon, zinc, and niobium.
• the first conductive material includes at least one selected from the group consisting of Ti, W, Mo, Co, Ru, CoSi2 , NiSi, TiN, TaN, indium tin oxide (ITO), ZnO, indium gallium zinc oxide (IGZO), WO3 , and TiAlN; 12.
• the second conductor includes at least one selected from the group consisting of a conductive polymer, an electrolyte, a manganese oxide, Ti, W, Mo, Co, Ru, CoSi2 , NiSi, TiN, TaN, indium tin oxide (ITO), ZnO, indium gallium zinc oxide (IGZO), WO3 , and TiAlN. 13.
• the first dielectric layer is formed on the substrate and the first mask in a state where a first mask is disposed on a first portion that is a part of the surface of the substrate, and the layer is formed on the first dielectric layer with the first conductor; removing a second portion of the first dielectric layer formed on the first mask and a third portion of the first conductor disposed on the second portion together with the first mask;
• a second mask is disposed on a fourth portion that is a part of the first portion and a fifth portion that is a part of the surface of the first conductor, and the second dielectric layer is formed on the second mask, the substrate, and the first conductor;
• a sixth portion that is a part of the second dielectric layer formed on the second mask is removed together with the second mask to obtain the first exposed portion and
• Example 1 An Al foil having a thickness of 120 ⁇ m was prepared as a conductive base material. An Al 2 O 3 film was formed on the surface of the Al foil by anodization to obtain a first dielectric layer. In the anodization, the Al foil was immersed in a 0.3 mol/L aqueous solution of diammonium adipate, and a voltage of 7 V was applied to the Al foil as the anode. The thickness of the Al 2 O 3 film was 10 nm.
• a portion on the surface of which an Al 2 O 3 film was not formed was provided at the end of the Al foil to form a conductive portion.
• a Ti film of 50 nm was formed on the Al 2 O 3 film by RF magnetron sputtering to obtain a first conductive layer.
• a mask made of a heat-resistant adhesive tape was placed so as to completely cover the conductive portion at the end of the Al foil, and the Ti film was provided so that the conductive portion of the Al foil and the Ti film were electrically insulated.
• a 20 nm ZrO2 film was formed by RF magnetron sputtering to obtain a second dielectric layer.
• a mask made of heat-resistant adhesive tape was placed on the conductive portion at the end of the Al foil and on the Ti film at the end opposite to the conductive portion of the Al foil to form an exposed portion where the conductive portion and the Ti film were exposed.
• a Ti film having a thickness of 50 nm was formed on the ZrO2 film by RF magnetron sputtering to form a second conductive layer.
• a mask made of heat-resistant adhesive tape was placed on the exposed portion to prevent the Ti film from being formed on the exposed portion. Meanwhile, a Ti film was formed on the conductive portion. In this way, a capacitor according to Example 1 having a MIMIM structure was obtained.
• a conductive base material, a first dielectric layer, and a first conductive layer were formed in the same manner as in Example 1.
• a conductive base material was prepared, which was an Al foil having a thickness of 120 ⁇ m.
• the surface of the Al foil was porous.
• An Al 2 O 3 film was formed on the surface of the Al foil by anodization.
• the Al foil was immersed in a 0.3 mol/L aqueous solution of diammonium adipate, and a voltage of 7 V was applied to the Al foil as the anode.
• the thickness of the formed Al 2 O 3 film was 10 nm.
• a Ti film having a thickness of 50 nm was formed on the Al 2 O 3 film by RF magnetron sputtering to form a first conductive layer. In this manner, a capacitor according to Comparative Example 1 having an MIM structure was obtained.
• Example 1 contact was made using a prober with the conductive substrate as one electrode and the first conductive layer as the other electrode. Impedance measurements were performed using Modulab manufactured by Solartron Analytical. The results are shown in Table 1.
• the capacitance of the capacitor with the MIMIM structure of Example 1 is higher than the capacitance of the capacitor with the MIM structure of Comparative Example 1. Since the capacitor of Example 1 has an MIMIM structure, it is believed that the specific surface area of the dielectric layer is increased compared to the capacitor of Comparative Example 1, and as a result, the capacitance of the capacitor is increased.
• the capacitor disclosed herein has a MIMIM structure, but has few restrictions on size and substrate.

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