WO2024239641A1 - 保护电路及变流器 - Google Patents

保护电路及变流器 Download PDF

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Publication number
WO2024239641A1
WO2024239641A1 PCT/CN2023/141420 CN2023141420W WO2024239641A1 WO 2024239641 A1 WO2024239641 A1 WO 2024239641A1 CN 2023141420 W CN2023141420 W CN 2023141420W WO 2024239641 A1 WO2024239641 A1 WO 2024239641A1
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WO
WIPO (PCT)
Prior art keywords
resistor
bridge arm
circuit
transistor
arm transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2023/141420
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English (en)
French (fr)
Inventor
卢妮
黄猛
贝帆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Energy Internet Innovation Center Guangdong Co Ltd
Gree Electric Appliances Inc of Zhuhai
Original Assignee
National Energy Internet Innovation Center Guangdong Co Ltd
Gree Electric Appliances Inc of Zhuhai
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Energy Internet Innovation Center Guangdong Co Ltd, Gree Electric Appliances Inc of Zhuhai filed Critical National Energy Internet Innovation Center Guangdong Co Ltd
Publication of WO2024239641A1 publication Critical patent/WO2024239641A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/38Means for preventing simultaneous conduction of switches
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices

Definitions

  • the present disclosure relates to the technical field of converters, and in particular to a control method, a control circuit and a device.
  • circuit topologies such as full-bridge, half-bridge, and NPC are widely used.
  • the dead zone problem needs to be considered.
  • the dead zone is set in the program to control the on and off of the tube to avoid the upper and lower tubes being turned on at the same time.
  • An embodiment of the present disclosure provides a protection circuit, including: a relay, a transistor and a pull-up resistor, wherein one end of the coil of the relay is connected to the base of a lower bridge arm transistor in a power device, the other end of the coil is connected to the emitter of the lower bridge arm transistor, the moving contact of the relay is connected to the pull-up resistor and the base of the transistor, the static contact of the relay is connected to the collector of the transistor and the emitter of an upper bridge arm transistor in the power device, and the emitter of the transistor is connected to the base of the upper bridge arm transistor.
  • the protection circuit further comprises:
  • a sampling circuit the sampling circuit is connected to the triode and is used to sample the voltage difference between the collector and the emitter of the triode;
  • a control circuit is connected to the sampling circuit and is used to stop sending a PWM signal when the voltage difference is less than the conduction voltage drop of the transistor.
  • the PWM signal is used to control the drive circuit to send a drive signal, and the drive signal is used to drive the upper bridge arm transistor and/or the lower bridge arm transistor to be turned on and off.
  • the sampling circuit includes: an operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first capacitor, and a second capacitor, one end of the first resistor is connected to the emitter of the transistor, the other end of the first resistor is connected to the first input end of the operational amplifier, one end of the third resistor, the first capacitor, and the second capacitor.
  • one end of the first capacitor is connected to one end of the second resistor, one end of the second resistor is connected to the collector of the transistor, the other end of the second resistor is connected to the second input end of the operational amplifier and one end of the fourth resistor, the output end of the operational amplifier is connected to the other end of the first capacitor, the other end of the third resistor, and one end of the fifth resistor, the other end of the fifth resistor is connected to the control circuit and one end of the second capacitor, and the other end of the second capacitor and the other end of the fourth resistor are grounded.
  • the protection circuit further comprises:
  • An alarm circuit is connected to the control circuit, and is used to receive a signal from the control circuit to generate an alarm.
  • the alarm circuit comprises:
  • a sixth resistor and a light emitting diode wherein the sixth resistor is connected in series with the light emitting diode, and the control circuit is used for sending a low level signal to make the light emitting diode flash.
  • the protection circuit further comprises:
  • the protection circuit further comprises:
  • a first drive circuit and a second drive circuit wherein the output end of the control circuit is connected to the first drive circuit, the output end of the first drive circuit is connected to the base of the upper bridge arm transistor, the output end of the control circuit is connected to the second drive circuit, the output end of the second drive circuit is connected to the base of the lower bridge arm transistor, the first drive circuit is used to drive the upper bridge arm transistor to be turned on and off, and the second drive circuit is used to drive the lower bridge arm transistor to be turned on and off.
  • the protection circuit further comprises:
  • a level conversion chip wherein the output end of the control circuit is connected to the first driving chip and the second driving circuit through the level conversion chip.
  • the first driving circuit includes: a first driving chip and a first driving resistor, the input end of the first driving chip is connected to the output end of the level conversion chip, the output end of the first driving chip is connected to one end of the first driving resistor, and the other end of the first driving resistor is connected to the base of the upper bridge arm transistor;
  • the second driving circuit includes: a second driving chip and a second driving resistor, the input end of the second driving chip is connected to the output end of the level conversion chip, the output end of the second driving chip is connected to one end of the second driving resistor, and the other end of the second driving resistor is connected to the base of the lower bridge arm transistor.
  • An embodiment of the present disclosure provides a converter, comprising: a power module and any one of the protection circuits described above.
  • FIG1 is a schematic diagram of a topological structure of a power device provided in the related art
  • first ⁇ second ⁇ third If similar descriptions of "first ⁇ second ⁇ third" appear in the public document, the following explanation is added. In the following description, the terms “first ⁇ second ⁇ third” involved are only used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that “first ⁇ second ⁇ third” can be interchanged in a specific order or sequence where permitted, so that the embodiments of the present disclosure described herein can be implemented in an order other than that illustrated or described herein.
  • the inventor has found through research that in the main circuit of the converter, the related art sets a dead zone in the program to control the opening and closing of the tube to prevent the upper and lower tubes from being turned on at the same time.
  • the program control error causes the upper and lower tubes to be turned on at the same time
  • the bridge arm is short-circuited, which will cause the upper and lower bridge arms to be directly connected. Since the current is too large during the direct connection, the IGBT/MOS is broken down due to the instantaneous large current, causing damage to the converter.
  • the hardware protection circuit currently used in the related art only protects when the power tube has been short-circuited, which will affect the life of the power tube.
  • FIG1 is a schematic diagram of the topological structure of a power device provided in the related art.
  • T1A, T1B, and T1C are upper bridge arm transistors in the power device
  • T2A, T2B, and T3C are lower bridge arm transistors of the power device
  • T3A, T3B, T3C, T4A, T4B, and T4C are auxiliary transistors in the power device
  • T2A, T2B, and T2C are lower bridge arm transistors of the power device
  • T1A and T2A form a bridge arm
  • T1B and T2B form a bridge arm
  • T1C and T2C form a
  • the inventors found through research that if the program is abnormal, the controller may send driving signals to T1A and T2A at the same time, and T1A and T2A will be turned on at the same time, resulting in excessive current flowing
  • the present disclosure provides a protection circuit and a converter, which can interlock the transistors of the upper and lower bridge arms, so as to prevent the transistors of the upper and lower bridge arms from being turned on at the same time.
  • the present disclosure provides a protection circuit, including: a relay, a triode and a pull-up resistor, one end of the coil of the relay is connected to the base of the lower bridge arm transistor in the power device, the other end of the coil is connected to the emitter of the lower bridge arm transistor, the moving contact of the relay is connected to the pull-up resistor and the base of the triode, the static contact of the relay is connected to the collector of the triode and the emitter of the upper bridge arm transistor in the power device, and the emitter of the triode is connected to the base of the upper bridge arm transistor.
  • the relay includes: a coil, a moving contact and a stationary contact.
  • the moving contact is controlled to move, thereby achieving conduction between the moving contact and the stationary contact.
  • the triode is a transistor.
  • the transistor is a PNP or NPN transistor.
  • Each transistor has a base, an emitter and a collector.
  • the pull-up resistor includes a power supply and a resistor.
  • the pull-up resistor can clamp the uncertain signal at a high level, and the resistor plays a current limiting role.
  • the lower bridge arm transistor may be one or more of T2A, T2B, and T3C in Figure 1
  • the upper bridge arm transistor may be one or more of T1A, T1B, and T1C in Figure 1.
  • the bases of the lower bridge arm transistor and the upper bridge arm transistor are connected to a driving circuit, and the driving circuit is used to receive a control signal to drive the lower bridge arm transistor and the upper bridge arm transistor to be turned on or off.
  • Figure 2 is a structural schematic diagram of a protection circuit provided by the embodiment of the present disclosure, as shown in Figure 2, including: a relay J1, a transistor T6 and a pull-up resistor R8, one end of the coil of the relay J1 is connected to the base of the lower bridge arm transistor T5 (also called the lower tube) in the power device, and the other end of the coil is connected to the emitter of the lower bridge arm transistor T5, the moving contact of the relay J1 is connected to the pull-up resistor R8 and the base of the transistor T6, the static contact of the relay J1 is connected to the collector of the transistor T6 and the emitter of the upper bridge arm transistor T4 in the power device, and the emitter of the transistor T6 is connected to the base of the upper bridge arm transistor T4 (also called the upper tube).
  • a relay J1 one end of the coil of the relay J1 is connected to the base of the lower bridge arm transistor T5 (also called the lower tube) in the power device
  • the other end of the coil is connected to the emitter of the lower
  • the digital signal processing sends a PWM1 signal to drive the upper tube to turn on.
  • the PWM1 signal passes through the level conversion chip U1 and enters the driver chip U2.
  • the driver chip outputs The drive signal is sent to the base of T4 after passing through the drive resistor R1, and T4 is turned on.
  • the program is abnormal and PWM2 is sent to the lower tube to drive the lower tube to turn on, the coil of relay J1 is energized, and the relay is attracted, thereby pulling down the base of transistor T6, and a voltage difference is generated between the collector and the base of T6.
  • T6 is turned on, pulling down the base of the upper tube T4, and T4 is turned off, so that the transistors of the upper and lower bridge arms can be interlocked (that is, one is turned on and the other is turned off), thereby avoiding the upper and lower tubes from being turned on at the same time.
  • the DSP sends a PWM2 signal to drive the lower tube to turn on.
  • the PWM2 signal enters the driver chip U3 after passing through the level conversion chip U1.
  • the driver chip outputs a drive signal.
  • the signal After passing through the driving resistor R2, the signal is given to the base of T5.
  • T5 is turned on, the relay J1 coil is energized, the relay is energized, and the base of the transistor T6 is pulled low.
  • the program is abnormal and PWM1 is sent to the upper tube to drive the upper tube to turn on, the transistor T6 is turned on, the base of the upper tube is pulled low, and the upper tube T4 is turned off. In this way, the transistors of the upper and lower bridge arms can be interlocked (that is, one is turned on and the other is turned off), thereby avoiding the upper and lower tubes from being turned on at the same time.
  • the present disclosure provides a protection circuit, which is provided with: a relay, a triode and a pull-up resistor, wherein one end of the coil of the relay is connected to the base of the lower bridge arm transistor in the power device, the other end of the coil is connected to the emitter of the lower bridge arm transistor, the moving contact of the relay is connected to the pull-up resistor and the base of the triode, the static contact of the relay is connected to the collector of the triode and the emitter of the upper bridge arm transistor in the power device, and the emitter of the triode is connected to the base of the upper bridge arm transistor.
  • the program is abnormal (a conduction signal is sent to the upper and lower bridge arm transistors at the same time)
  • the transistors of the upper and lower bridge arms can be interlocked, thereby avoiding the upper and lower transistors from being turned on at the same time.
  • the protection circuit further comprises:
  • a sampling circuit the sampling circuit is connected to the transistor and is used to sample the voltage difference between the collector and the emitter of the transistor; a control circuit is connected to the sampling circuit and is used to stop sending a PWM signal when the voltage difference is less than the conduction voltage drop of the transistor, the PWM signal is used to control the drive circuit to send a drive signal, and the drive signal is used to drive the upper bridge arm transistor and/or the lower bridge arm transistor to be turned on and off.
  • control circuit is a DSP.
  • the control circuit can compare the magnitude relationship between the voltage difference and the conduction voltage drop of the transistor to perform control.
  • the PWM signal includes: a PWM1 signal and a PWM2 signal, the PWM1 signal is used to drive the upper bridge arm transistor, and the PWM2 signal is used to drive the lower bridge arm transistor.
  • the sampling circuit includes: an operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first capacitor, and a second capacitor, one end of the first resistor is connected to the emitter of the transistor, the other end of the first resistor is connected to the first input end of the operational amplifier, one end of the third resistor, and one end of the first capacitor, one end of the second resistor is connected to the collector of the transistor, and the other end of the second resistor is connected to The second input terminal of the operational amplifier is connected to one end of the fourth resistor, the output terminal of the operational amplifier is connected to the other end of the first capacitor, the other end of the third resistor, and one end of the fifth resistor, the other end of the fifth resistor is connected to the control circuit and one end of the second capacitor, and the other end of the second capacitor and the other end of the fourth resistor are grounded.
  • the sampling circuit includes: an operational amplifier U4, a first resistor R3, a second resistor R4, a third resistor R5, a fourth resistor R6, a fifth resistor R7, a first capacitor C1 and a second capacitor C2, one end of the first resistor R3 is connected to the emitter of the transistor T6, the other end of the first resistor R3 is connected to the first input end of the operational amplifier U4, one end of the third resistor R5, and one end of the first capacitor C1, one end of the second resistor R4 is connected to the collector of the transistor T6, the other end of the second resistor R4 is connected to the second input end of the operational amplifier U4 and one end of the fourth resistor R6, the output end of the operational amplifier U4 is connected to the other end of the first capacitor C1, the other end of the third resistor R5, and one end of the fifth resistor R7, the other end of the fifth resistor R7 is connected to the control circuit DSP and one end of the second capacitor C2, and the other end of the first resistor R3 is connected
  • R7 and C2 have a filtering function, and the sampled voltage signal can be sent to the DSP after filtering.
  • the sampling circuit provided in the embodiment of the present disclosure can sample the voltage difference between the collector and the emitter of the transistor and output the voltage difference to the control circuit.
  • the control circuit can stop sending the PWM signal when the voltage difference is less than the conduction voltage drop of the transistor.
  • the protection circuit further comprises:
  • An alarm circuit is connected to the control circuit, and is used to receive a signal from the control circuit to generate an alarm.
  • the alarm circuit is an audible alarm.
  • the alarm circuit is an optical signal alarm.
  • the alarm circuit comprises:
  • a sixth resistor and a light emitting diode wherein the sixth resistor is connected in series with the light emitting diode, and the control circuit is used for sending a low level signal to make the light emitting diode flash.
  • the alarm circuit includes: a sixth resistor R9 and a light emitting diode D1, wherein the sixth resistor R9 is connected in series with the light emitting diode D1, and the control circuit DSP is used to send a low level signal to make the light emitting diode D1 flash.
  • the flashing of D1 indicates that the upper bridge arm transistor and/or the lower bridge arm transistor is abnormal.
  • the present disclosure further provides a protection circuit, which includes: a relay, a triode, a pull-up resistor, a sampling circuit, a comparison circuit and a control circuit, wherein one end of the coil of the relay is connected to the The base of the lower bridge arm transistor in the power device is connected, the other end of the coil is connected to the emitter of the lower bridge arm transistor, the moving contact of the relay is connected to the pull-up resistor and the base of the transistor, the static contact of the relay is connected to the collector of the transistor and the emitter of the upper bridge arm transistor in the power device, the emitter of the transistor is connected to the base of the upper bridge arm transistor, a sampling circuit is connected to the transistor, and is used to sample the voltage difference between the collector and the emitter of the transistor; a comparison circuit is connected to the sampling circuit, and is used to compare the magnitude relationship between the voltage difference and the conduction voltage drop of the transistor, and output the comparison result of the magnitude relationship to the control circuit.
  • a protection circuit which includes: a relay, a trio
  • a control circuit is connected to the comparison circuit and is used to stop sending a PWM signal when the voltage difference is less than the conduction voltage drop of the transistor.
  • the PWM signal is used to control the drive circuit to send a drive signal, and the drive signal is used to drive the upper bridge arm transistor and/or the lower bridge arm transistor to be turned on and off.
  • a comparison circuit is added to the back stage of the sampling circuit to directly compare the sampled voltage value with the conduction voltage drop of T6, and finally send the comparison result to the DSP.
  • the DSP issues a command to make the light-emitting diode flash, indicating that the upper and lower bridge arms are abnormal. At the same time, the DSP stops emitting waves and the system shuts down. Using hardware to compare the voltage is more sensitive and can protect the power device more quickly.
  • the protection circuit further comprises:
  • a first drive circuit and a second drive circuit wherein the output end of the control circuit is connected to the first drive circuit, the output end of the first drive circuit is connected to the base of the upper bridge arm transistor, the output end of the control circuit is connected to the second drive circuit, the output end of the second drive circuit is connected to the base of the lower bridge arm transistor, the first drive circuit is used to drive the upper bridge arm transistor to be turned on and off, and the second drive circuit is used to drive the lower bridge arm transistor to be turned on and off.
  • the protection circuit further comprises:
  • a level conversion chip wherein the output end of the control circuit is connected to the first driving chip and the second driving circuit through the level conversion chip.
  • the DSP sends out a PWM1 signal which passes through the level conversion chip U1 and then enters the first driving circuit and the second driving circuit.
  • the first driving circuit includes: a first driving chip and a first driving resistor, the input end of the first driving chip is connected to the output end of the level conversion chip, the output end of the first driving chip is connected to one end of the first driving resistor, and the other end of the first driving resistor is connected to the base of the upper bridge arm transistor;
  • the second driving circuit includes: a second driving chip and a second driving resistor, the input end of the second driving chip is connected to the output end of the level conversion chip, the output end of the second driving chip is connected to one end of the second driving resistor, and the other end of the second driving resistor is connected to the base of the lower bridge arm transistor.
  • the first driving circuit includes: a first driving chip U2 and a first driving resistor R1, wherein the input end of the first driving chip U2 is connected to the output end of the level conversion chip U1, the output end of the first driving chip U2 is connected to one end of the first driving resistor R1, and the other end of the first driving resistor R1 is connected to the base of the upper bridge arm transistor T4;
  • the second driving circuit includes: a second driving chip U3 and a second driving resistor R2, wherein the input end of the second driving chip U3 is connected to the output end of the level conversion chip U1, the output end of the second driving chip U3 is connected to one end of the second driving resistor R2, and the other end of the second driving resistor R2 is connected to the base of the lower bridge arm transistor T5.
  • a protection circuit provided by an embodiment of the present disclosure lowers the base voltage of transistor T6 by closing a relay, and turns off the upper tube when the gate signals of the upper and lower tubes are both at a high level, thereby avoiding the problem of bridge arm short circuit and protecting the power device.
  • the embodiments of the present disclosure provide a converter, a power device and a protection circuit, wherein the protection circuit includes: a relay, a transistor and a pull-up resistor, wherein one end of the coil of the relay is connected to the base of the lower bridge arm transistor in the power device, and the other end of the coil is connected to the emitter of the lower bridge arm transistor, the moving contact of the relay is connected to the pull-up resistor and the base of the transistor, the static contact of the relay is connected to the collector of the transistor and the emitter of the upper bridge arm transistor in the power device, and the emitter of the transistor is connected to the base of the upper bridge arm transistor.
  • the protection circuit includes: a relay, a transistor and a pull-up resistor, wherein one end of the coil of the relay is connected to the base of the lower bridge arm transistor in the power device, and the other end of the coil is connected to the emitter of the lower bridge arm transistor, the moving contact of the relay is connected to the pull-up resistor and the base of the transistor, the static
  • the protection circuit further comprises:
  • a sampling circuit the sampling circuit is connected to the triode and is used to sample the voltage difference between the collector and the emitter of the triode;
  • a control circuit is connected to the sampling circuit and is used to stop sending a PWM signal when the voltage difference is less than the conduction voltage drop of the transistor.
  • the PWM signal is used to control the drive circuit to send a drive signal, and the drive signal is used to drive the upper bridge arm transistor and/or the lower bridge arm transistor to be turned on and off.
  • the sampling circuit includes: an operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first capacitor and a second capacitor, one end of the first resistor is connected to the emitter of the transistor, the other end of the first resistor is connected to the first input end of the operational amplifier, one end of the third resistor, and one end of the first capacitor, one end of the second resistor is connected to the collector of the transistor, the other end of the second resistor is connected to the second input end of the operational amplifier and one end of the fourth resistor, the output end of the operational amplifier is connected to the other end of the first capacitor, the other end of the third resistor, and one end of the fifth resistor, the other end of the fifth resistor is connected to the control circuit and one end of the second capacitor, and the other end of the second capacitor and the other end of the fourth resistor are grounded.
  • the protection circuit further comprises:
  • An alarm circuit is connected to the control circuit, and is used to receive a signal from the control circuit to generate an alarm.
  • the alarm circuit comprises:
  • a sixth resistor and a light emitting diode wherein the sixth resistor is connected in series with the light emitting diode, and the control circuit is used for sending a low level signal to make the light emitting diode flash.
  • the protection circuit further comprises:
  • a comparison circuit is connected to the sampling circuit, and is used for comparing the magnitude relationship between the voltage difference and the conduction voltage drop of the transistor, and outputting the comparison result of the magnitude relationship to the control circuit.
  • the protection circuit further comprises:
  • a first drive circuit and a second drive circuit wherein the output end of the control circuit is connected to the first drive circuit, the output end of the first drive circuit is connected to the base of the upper bridge arm transistor, the output end of the control circuit is connected to the second drive circuit, the output end of the second drive circuit is connected to the base of the lower bridge arm transistor, the first drive circuit is used to drive the upper bridge arm transistor to be turned on and off, and the second drive circuit is used to drive the lower bridge arm transistor to be turned on and off.
  • the protection circuit further comprises:
  • a level conversion chip wherein the output end of the control circuit is connected to the first driving chip and the second driving circuit through the level conversion chip.
  • the first driving circuit includes: a first driving chip and a first driving resistor, the input end of the first driving chip is connected to the output end of the level conversion chip, the output end of the first driving chip is connected to one end of the first driving resistor, and the other end of the first driving resistor is connected to the base of the upper bridge arm transistor;
  • the second driving circuit includes: a second driving chip and a second driving resistor, the input end of the second driving chip is connected to the output end of the level conversion chip, the output end of the second driving chip is connected to one end of the second driving resistor, and the other end of the second driving resistor is connected to the base of the lower bridge arm transistor.
  • the disclosed devices and methods can be implemented in other ways.
  • the device embodiments described above are only schematic.
  • the division of the units is only a logical function division.
  • the coupling, direct coupling, or communication connection between the components controlled or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.
  • the units described above as separate components may or may not be physically separated, and the components controlled by the units may or may not be physical units; they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the scheme of this embodiment.
  • all functional units in the embodiments of the present disclosure may be integrated into one processing unit, or each unit may be separately configured as a unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.
  • the above-mentioned integrated unit of the present disclosure is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.
  • the technical solution of the embodiment of the present disclosure can essentially or in other words, the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a controller to execute all or part of the methods described in each embodiment of the present disclosure.
  • the aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROMs, magnetic disks or optical disks.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)
  • Power Conversion In General (AREA)

Abstract

本公开提供了一种保护电路及变流器。该保护电路包括继电器(J1)、三极管(T6)和上拉电阻(R8)。继电器的线圈的一端与功率器件中下桥臂晶体管(T5)的基极连接,线圈的另一端与下桥臂晶体管的发射极连接,继电器的动触点与上拉电阻、三极管的基极连接,继电器的静触点与三极管的集电极、功率器件中上桥臂晶体管(T4)的发射极连接,三极管的发射极与上桥臂晶体管的基极连接。该保护电路能够在程序异常(同时给上下桥臂晶体管发出导通信号)时,将上下桥臂晶体管进行互锁,从而避免上下管同时导通。

Description

保护电路及变流器
相关申请的交叉引用
本是以CN申请号为CN202310599143.8,申请日为2023年5月24日的申请为基础,并主张其优先权,该CN申请的公开内容在此作为整体引入本申请中。
技术领域
本公开涉及变流器技术领域,特别地涉及一种控制方法、控制电路及装置。
背景技术
在变流器的主电路中,广泛应用全桥、半桥、NPC等电路拓扑,相关技术中,在应用这些拓扑时,需要考虑死区的问题,通常是在程序中设置死区来控制管子的开通关断,用来避免上下管同时导通。也有在功率管处增加泄放电路,用来在管子短路时对管子进行保护。
发明内容
本公开实施例提供一种保护电路,包括:继电器、三级管和上拉电阻,所述继电器的线圈的一端与功率器件中下桥臂晶体管的基极连接,所述线圈的另一端与所述下桥臂晶体管的发射极连接,所述继电器的动触点与所述上拉电阻、三极管的基极连接,所述继电器的静触点与所述三极管的集电极、所述功率器件中上桥臂晶体管的发射极连接,所述三极管的发射极与所述上桥臂晶体管的基极连接。
在一些实施例中,所述保护电路还包括:
采样电路,所述采样电路与所述三极管连接,用于采样所述三极管的集电极和发射极之间的压差;
控制电路,与所述采样电路连接,用于在所述压差小于所述三极管的导通压降的情况下,停止发送PWM信号,所述PWM信号用于控制驱动电路发出驱动信号,所述驱动信号用于驱动上桥臂晶体管和/或下桥臂晶体管的开通和关断。
在一些实施例中,所述采样电路包括:运算放大器、第一电阻、第二电阻、第三电阻、第四电阻、第五电阻、第一电容和第二电容,所述第一电阻的一端连接所述三极管的发射极,所述第一电阻的另一端与所述运算放大器的第一输入端、第三电阻的一端、第一电容 的一端连接,所述第二电阻的一端连接所述三极管的集电极,所述第二电阻的另一端连接所述运算放大器的第二输入端、第四电阻的一端连接,所述运算放大器的输出端与所述第一电容的另一端、第三电阻的另一端、第五电阻的一端连接,所述第五电阻的另一端与所述控制电路、第二电容的一端连接,所述第二电容的另一端与所述第四电阻的另一端接地。
在一些实施例中,所述保护电路还包括:
报警电路,所述报警电路与所述控制电路连接,所述报警电路用于接收控制电路的信号进行报警。
在一些实施例中,所述报警电路包括:
第六电阻和发光二极管,所述第六电阻与所述发光二极管串联,所述控制电路用于发出低电平信号以使所述发光二极管进行闪烁。
在一些实施例中,所述保护电路还包括:
比较电路,与所述采样电路连接,用于比较所述压差和所述三极管的导通压降的大小关系,并输出所述大小关系的对比结果至所述控制电路。
在一些实施例中,所述保护电路还包括:
第一驱动电路和第二驱动电路,所述控制电路的输出端与所述第一驱动电路连接,所述第一驱动电路的输出端与所述上桥臂晶体管的基极连接,所述控制电路的输出端与所述第二驱动电路连接,所述第二驱动电路的输出端与所述下桥臂晶体管的基极连接,所述第一驱动电路用于驱动所述上桥臂晶体管的开通和关断,所述第二驱动电路用于驱动所述下桥臂晶体管的开通和关断。
在一些实施例中,所述保护电路还包括:
电平转换芯片,所述控制电路的输出端通过所述电平转换芯片与所述第一驱动芯片、所述第二驱动电路连接。
在一些实施例中,所述第一驱动电路包括:第一驱动芯片和第一驱动电阻,所述第一驱动芯片的输入端与所述电平转换芯片的输出端连接,所述第一驱动芯片的输出端与所述第一驱动电阻的一端连接,所述第一驱动电阻的另一端与所述上桥臂晶体管的基极连接;
所述第二驱动电路包括:第二驱动芯片和第二驱动电阻,所述第二驱动芯片的输入端与所述电平转换芯片的输出端连接,所述第二驱动芯片的输出端与所述第二驱动电阻的一端连接,所述第二驱动电阻的另一端与所述下桥臂晶体管的基极连接。
本公开实施例提供一种变流器,包括:功率模块和上述任一项所述的保护电路。
附图说明
在下文中将基于实施例并参考附图来对本公开进行更详细的描述。
图1为相关技术中提供的一种功率器件的拓扑结构示意图;
图2为本公开实施例提供的一种保护电路的结构示意图。
在附图中,相同的部件使用相同的附图标记,附图并未按照实际的比例绘制。
具体实施方式
为了使本公开的目的、技术方案和优点更加清楚,下面将结合附图对本公开作进一步地详细描述,所描述的实施例不应视为对本公开的限制,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,都属于本公开保护的范围。
在以下的描述中,涉及到“一些实施例”,其描述了所有可能实施例的子集,但是可以理解,“一些实施例”可以是所有可能实施例的相同子集或不同子集,并且可以在不冲突的情况下相互结合。
如果公开文件中出现“第一\第二\第三”的类似描述则增加以下的说明,在以下的描述中,所涉及的术语“第一\第二\第三”仅仅是是区别类似的对象,不代表针对对象的特定排序,可以理解地,“第一\第二\第三”在允许的情况下可以互换特定的顺序或先后次序,以使这里描述的本公开实施例能够以除了在这里图示或描述的以外的顺序实施。
除非另有定义,本文所使用的所有的技术和科学术语与属于本公开的技术领域的技术人员通常理解的含义相同。本文中所使用的术语只是为了描述本公开实施例的目的,不是旨在限制本公开。
发明人通过研究发现:相关技术在变流器的主电路中,在程序中设置死区来控制管子的开通关断,用来避免上下管同时导通。但是,相关技术当程序控制错误导致上下管同时导通时,桥臂发生短路,会导致上下桥臂直通,由于直通时电流过大,使得IGBT/MOS因为瞬时大电流而被击穿,造成变流器的损坏,相关技术目前使用的硬件保护电路都是在功率管已经发生短路时才进行保护的,会影响功率管的寿命。
在介绍本公开实施例之前,对相关技术中的变流器的功率器件进行简单介绍,图1为相关技术中提供的一种功率器件的拓扑结构示意图,如图1所示,T1A、T1B、T1C为功率器件中的上桥臂晶体管,T2A、T2B、T3C为功率器件的下桥臂晶体管,T3A、T3B、T3C、T4A、T4B、T4C为功率器件中的中的辅管,T2A、T2B、T2C为功率器件的下桥臂晶体管,T1A和T2A组成一个桥臂,T1B和T2B组成一个桥臂,T1C和T2C组成一 个桥臂,以一个桥臂为例。发明人通过研究发现:如果程序异常,控制器可能同时给T1A和T2A发出驱动信号,T1A和T2A都会同时导通,导致流过一个桥臂的电流过大,从而可能导致T1A和T2A被击穿,桥臂发生短路,影响功率器件的使用寿命。
基于相关技术中存在的问题,本公开提供一种保护电路及变流器,能够将上下桥臂的晶体管进行互锁,从而避免上下桥臂的晶体管同时导通。本公开实施例提供一种保护电路,包括:继电器、三级管和上拉电阻,所述继电器的线圈的一端与功率器件中下桥臂晶体管的基极连接,所述线圈的另一端与所述下桥臂晶体管的发射极连接,所述继电器的动触点与所述上拉电阻、三极管的基极连接,所述继电器的静触点与所述三极管的集电极、所述功率器件中上桥臂晶体管的发射极连接,所述三极管的发射极与所述上桥臂晶体管的基极连接。
本公开实施例中,继电器包括:线圈、动触点和静触点,当继电器的线圈得电后,会控制动触点移动,从而实现动触点与静触点的导通。
在本公开一些实施例中,三极管是晶体管。
在本公开一些实施例中,所述三极管为PNP或NPN。每个三极管有基极、发射极和集电极。
在本公开一些实施例中,所述上拉电阻包括电源和电阻,上拉电阻可以将不确定的信号钳位在高电平,同时电阻起限流作用。
本公开实施例中,下桥臂晶体管可以为图1中的T2A、T2B、T3C中的一个或多个,所述上桥臂晶体管可以为图1中的T1A、T1B、T1C中的一个或多个。本公开实施例中,下桥臂晶体管和上桥臂晶体管的基极与驱动电路连接,驱动电路用于接收控制信号,以驱动下桥臂晶体管和上桥臂晶体管的导通或关闭。
本公开实施例中,以功率器件中任一桥臂为例,图2为本公开实施例提供的一种保护电路的结构示意图,如图2所示,包括:继电器为J1、三级管T6和上拉电阻R8,所述继电器J1的线圈的一端与功率器件中下桥臂晶体管T5(也可以叫下管)的基极连接,所述线圈的另一端与所述下桥臂晶体管T5的发射极连接,所述继电器J1的动触点与所述上拉电阻R8、三极管T6的基极连接,所述继电器J1的静触点与所述三极管T6的集电极、所述功率器件中上桥臂晶体管T4的发射极连接,所述三极管T6的发射极与所述上桥臂晶体管T4(也可以叫上管)的基极连接。
当上管T4正常工作时,数字信号处理(DSP,Digital Signal Processing)发出PWM1信号驱动上管开通,PWM1信号经过电平转换芯片U1后进入驱动芯片U2,驱动芯片输 出驱动信号,经过驱动电阻R1后,将信号给到T4的基极,T4导通。当程序异常同时给下管发送PWM2驱动下管开通时,继电器J1线圈得电,继电器吸合,从而将三极管T6的基极拉低,T6集电极与基极之间产生压差,T6导通,将上管T4的基极拉低,T4关断,从而能够实现将上下桥臂的晶体管进行互锁(即一个开通,另一个关断),从而避免了上下管同时导通。
当下管T5正常工作时,DSP发出PWM2信号驱动下管开通,PWM2信号经过电平转换芯片U1后进入驱动芯片U3,驱动芯片输出驱动信号,经过驱动电阻R2后,将信号给到T5的基极,T5导通,继电器J1线圈得电,继电器吸合,三极管T6的基极被拉低。当程序异常同时给上管发送PWM1驱动上管开通时,三极管T6导通,上管的基极被拉低,上管T4关断。从而能够实现将上下桥臂的晶体管进行互锁(即一个开通,另一个关断),从而避免了上下管同时导通。
本公开提供的一种保护电路,通过设置:继电器、三级管和上拉电阻,继电器的线圈的一端与功率器件中下桥臂晶体管的基极连接,线圈的另一端与下桥臂晶体管的发射极连接,继电器的动触点与所述上拉电阻、三极管的基极连接,继电器的静触点与所述三极管的集电极、功率器件中上桥臂晶体管的发射极连接,三极管的发射极与所述上桥臂晶体管的基极连接,能够在程序异常(同时给上下桥臂晶体管发出导通信号)时,将上下桥臂的晶体管进行互锁,从而避免了上下管同时导通。
在一些实施例中,所述保护电路还包括:
采样电路,所述采样电路与所述三极管连接,用于采样所述三极管的集电极和发射极之间的压差;控制电路,与所述采样电路连接,用于在所述压差小于所述三极管的导通压降的情况下,停止发送PWM信号,所述PWM信号用于控制驱动电路发出驱动信号,所述驱动信号用于驱动上桥臂晶体管和/或下桥臂晶体管的开通和关断。
在本公开一些实施例中,所述控制电路是DSP。控制电路可以比较所述压差与所述三极管的导通压降的大小关系,从而来进行控制。
在本公开一些实施例中,PWM信号包括:PWM1信号和PWM2信号,PWM1信号用于驱动上桥臂晶体管,PWM2信号用于驱动下桥臂晶体管。
在一些实施例中,所述采样电路包括:运算放大器、第一电阻、第二电阻、第三电阻、第四电阻、第五电阻、第一电容和第二电容,所述第一电阻的一端连接所述三极管的发射极,所述第一电阻的另一端与所述运算放大器的第一输入端、第三电阻的一端、第一电容的一端连接,所述第二电阻的一端连接所述三极管的集电极,所述第二电阻的另一端连接 所述运算放大器的第二输入端、第四电阻的一端连接,所述运算放大器的输出端与所述第一电容的另一端、第三电阻的另一端、第五电阻的一端连接,所述第五电阻的另一端与所述控制电路、第二电容的一端连接,所述第二电容的另一端与所述第四电阻的另一端接地。
继续参见图2,所述采样电路包括:运算放大器U4、第一电阻R3、第二电阻R4、第三电阻R5、第四电阻R6、第五电阻R7、第一电容C1和第二电容C2,所述第一电阻R3的一端连接所述三极管T6的发射极,所述第一电阻R3的另一端与所述运算放大器U4的第一输入端、第三电阻R5的一端、第一电容C1的一端连接,所述第二电阻R4的一端连接所述三极管T6的集电极,所述第二电阻R4的另一端连接所述运算放大器U4的第二输入端、第四电阻R6的一端连接,所述运算放大器U4的输出端与所述第一电容C1的另一端、第三电阻R5的另一端、第五电阻R7的一端连接,所述第五电阻R7的另一端与所述控制电路DSP、第二电容C2的一端连接,所述第二电容C2的另一端与所述第四电阻R6的另一端接地。
在采样电路中,R7、C2具有滤波作用,可以将滤波后将采样到的电压信号送入DSP中。
本公开实施例提供的采样电路,能采样所述三极管的集电极和发射极之间的压差,并将压差输出到控制电路,控制电路可以在所述压差小于所述三极管的导通压降的情况下,停止发送PWM信号。
在一些实施例中,所述保护电路还包括:
报警电路,所述报警电路与所述控制电路连接,所述报警电路用于接收控制电路的信号进行报警。
在本公开一些实施例中,所述报警电路为声音报警。
在本公开另一些实施例中,所述报警电路是光信号报警。
在一些实施例中,所述报警电路包括:
第六电阻和发光二极管,所述第六电阻与所述发光二极管串联,所述控制电路用于发出低电平信号以使所述发光二极管进行闪烁。
继续参见图2,所述报警电路包括:第六电阻R9和发光二极管D1,所述第六电阻R9与所述发光二极管D1串联,所述控制电路DSP用于发出低电平信号以使所述发光二极管D1进行闪烁。通过D1闪烁,以指示上桥臂晶体管和/或下桥臂晶体管异常。
基于前述的各个实施例,本公开实施例再提供一种保护电路,所述保护电路包括:继电器、三级管、上拉电阻、采样电路、比较电路和控制电路,所述继电器的线圈的一端与 功率器件中下桥臂晶体管的基极连接,所述线圈的另一端与所述下桥臂晶体管的发射极连接,所述继电器的动触点与所述上拉电阻、三极管的基极连接,所述继电器的静触点与所述三极管的集电极、所述功率器件中上桥臂晶体管的发射极连接,所述三极管的发射极与所述上桥臂晶体管的基极连接,采样电路,所述采样电路与所述三极管连接,用于采样所述三极管的集电极和发射极之间的压差;比较电路与所述采样电路连接,用于比较所述压差和所述三极管的导通压降的大小关系,并输出所述大小关系的对比结果至所述控制电路
控制电路,与所述比较电路连接,用于在所述压差小于所述三极管的导通压降的情况下,停止发送PWM信号,所述PWM信号用于控制驱动电路发出驱动信号,所述驱动信号用于驱动上桥臂晶体管和/或下桥臂晶体管的开通和关断。
本公开实施例中,通过采样电路后级增加比较电路,直接将采样到的电压值与T6的导通压降进行比较,最终将比较结果发送给DSP。DSP发出指令使发光二极管闪烁,指示上下桥臂异常,同时DSP停止发波,系统停机。使用硬件将电压进行比较,反应耿灵敏,能更快的保护功率器件。
在一些实施例中,所述保护电路还包括:
第一驱动电路和第二驱动电路,所述控制电路的输出端与所述第一驱动电路连接,所述第一驱动电路的输出端与所述上桥臂晶体管的基极连接,所述控制电路的输出端与所述第二驱动电路连接,所述第二驱动电路的输出端与所述下桥臂晶体管的基极连接,所述第一驱动电路用于驱动所述上桥臂晶体管的开通和关断,所述第二驱动电路用于驱动所述下桥臂晶体管的开通和关断。
在一些实施例中,所述保护电路还包括:
电平转换芯片,所述控制电路的输出端通过所述电平转换芯片与所述第一驱动芯片、所述第二驱动电路连接。
继续参见图2,所述电平转换芯片U1,DSP发出PWM1信号经过电平转换芯片U1后进入第一驱动电路和第二驱动电路。
在一些实施例中,所述第一驱动电路包括:第一驱动芯片和第一驱动电阻,所述第一驱动芯片的输入端与所述电平转换芯片的输出端连接,所述第一驱动芯片的输出端与所述第一驱动电阻的一端连接,所述第一驱动电阻的另一端与所述上桥臂晶体管的基极连接;
所述第二驱动电路包括:第二驱动芯片和第二驱动电阻,所述第二驱动芯片的输入端与所述电平转换芯片的输出端连接,所述第二驱动芯片的输出端与所述第二驱动电阻的一端连接,所述第二驱动电阻的另一端与所述下桥臂晶体管的基极连接。
继续参见图2,所述第一驱动电路包括:第一驱动芯片U2和第一驱动电阻R1,所述第一驱动芯片U2的输入端与所述电平转换芯片U1的输出端连接,所述第一驱动芯片U2的输出端与所述第一驱动电阻R1的一端连接,所述第一驱动电阻R1的另一端与所述上桥臂晶体管T4的基极连接;
所述第二驱动电路包括:第二驱动芯片U3和第二驱动电阻R2,所述第二驱动芯片U3的输入端与所述电平转换芯片U1的输出端连接,所述第二驱动芯片U3的输出端与所述第二驱动电阻R2的一端连接,所述第二驱动电阻R2的另一端与所述下桥臂晶体管T5的基极连接。
本公开实施例提供的一种保护电路,通过继电器闭合,将三极管T6基极电压拉低,在上下管栅极信号均为高电平时,将上管关断,从而避免桥臂短路问题,对功率器件进行了保护。
基于前述的各个实施例,本公开实施例提供一种变流器,功率器件及保护电路,所述保护电路包括:继电器、三级管和上拉电阻,所述继电器的线圈的一端与功率器件中下桥臂晶体管的基极连接,所述线圈的另一端与所述下桥臂晶体管的发射极连接,所述继电器的动触点与所述上拉电阻、三极管的基极连接,所述继电器的静触点与所述三极管的集电极、所述功率器件中上桥臂晶体管的发射极连接,所述三极管的发射极与所述上桥臂晶体管的基极连接。
在一些实施例中,所述保护电路还包括:
采样电路,所述采样电路与所述三极管连接,用于采样所述三极管的集电极和发射极之间的压差;
控制电路,与所述采样电路连接,用于在所述压差小于所述三极管的导通压降的情况下,停止发送PWM信号,所述PWM信号用于控制驱动电路发出驱动信号,所述驱动信号用于驱动上桥臂晶体管和/或下桥臂晶体管的开通和关断。
在一些实施例中,所述采样电路包括:运算放大器、第一电阻、第二电阻、第三电阻、第四电阻、第五电阻、第一电容和第二电容,所述第一电阻的一端连接所述三极管的发射极,所述第一电阻的另一端与所述运算放大器的第一输入端、第三电阻的一端、第一电容的一端连接,所述第二电阻的一端连接所述三极管的集电极,所述第二电阻的另一端连接所述运算放大器的第二输入端、第四电阻的一端连接,所述运算放大器的输出端与所述第一电容的另一端、第三电阻的另一端、第五电阻的一端连接,所述第五电阻的另一端与所述控制电路、第二电容的一端连接,所述第二电容的另一端与所述第四电阻的另一端接地。
在一些实施例中,所述保护电路还包括:
报警电路,所述报警电路与所述控制电路连接,所述报警电路用于接收控制电路的信号进行报警。
在一些实施例中,所述报警电路包括:
第六电阻和发光二极管,所述第六电阻与所述发光二极管串联,所述控制电路用于发出低电平信号以使所述发光二极管进行闪烁。
在一些实施例中,所述保护电路还包括:
比较电路,与所述采样电路连接,用于比较所述压差和所述三极管的导通压降的大小关系,并输出所述大小关系的对比结果至所述控制电路。
在一些实施例中,所述保护电路还包括:
第一驱动电路和第二驱动电路,所述控制电路的输出端与所述第一驱动电路连接,所述第一驱动电路的输出端与所述上桥臂晶体管的基极连接,所述控制电路的输出端与所述第二驱动电路连接,所述第二驱动电路的输出端与所述下桥臂晶体管的基极连接,所述第一驱动电路用于驱动所述上桥臂晶体管的开通和关断,所述第二驱动电路用于驱动所述下桥臂晶体管的开通和关断。
在一些实施例中,所述保护电路还包括:
电平转换芯片,所述控制电路的输出端通过所述电平转换芯片与所述第一驱动芯片、所述第二驱动电路连接。
在一些实施例中,所述第一驱动电路包括:第一驱动芯片和第一驱动电阻,所述第一驱动芯片的输入端与所述电平转换芯片的输出端连接,所述第一驱动芯片的输出端与所述第一驱动电阻的一端连接,所述第一驱动电阻的另一端与所述上桥臂晶体管的基极连接;
所述第二驱动电路包括:第二驱动芯片和第二驱动电阻,所述第二驱动芯片的输入端与所述电平转换芯片的输出端连接,所述第二驱动芯片的输出端与所述第二驱动电阻的一端连接,所述第二驱动电阻的另一端与所述下桥臂晶体管的基极连接。
应理解,说明书通篇中提到的“一个实施例”或“一实施例”意味着与实施例有关的特定特征、结构或特性包括在本公开的至少一个实施例中。因此,在整个说明书各处出现的“在一个实施例中”或“在一实施例中”未必一定指相同的实施例。此外,这些特定的特征、结构或特性可以任意适合的方式结合在一个或多个实施例中。应理解,在本公开的各种实施例中,上述各过程的序号的大小并不意味着执行顺序的先后,各过程的执行顺序应以其功能和内在逻辑确定,而不应对本公开实施例的实施过程构成任何限定。上述本公 开实施例序号仅仅为了描述,不代表实施例的优劣。
需要说明的是,在本文中,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。
在本公开所提供的几个实施例中,应该理解到,所揭露的设备和方法,可以通过其它的方式实现。以上所描述的设备实施例仅仅是示意性的,例如,所述单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,如:多个单元或组件可以结合,或可以集成到另一个系统,或一些特征可以忽略,或不执行。另外,所控制或讨论的各组成部分相互之间的耦合、或直接耦合、或通信连接可以是通过一些接口,设备或单元的间接耦合或通信连接,可以是电性的、机械的或其它形式的。
上述作为分离部件说明的单元可以是、或也可以不是物理上分开的,作为单元控制的部件可以是、或也可以不是物理单元;既可以位于一个地方,也可以分布到多个网络单元上;可以根据实际的需要选择其中的部分或全部单元来实现本实施例方案的目的。
另外,在本公开各实施例中的各功能单元可以全部集成在一个处理单元中,也可以是各单元分别单独作为一个单元,也可以两个或两个以上单元集成在一个单元中;上述集成的单元既可以采用硬件的形式实现,也可以采用硬件加软件功能单元的形式实现。
本领域普通技术人员可以理解:实现上述方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成,前述的程序可以存储于计算机可读取存储介质中,该程序在执行时,执行包括上述方法实施例的步骤;而前述的存储介质包括:移动存储设备、只读存储器(ROM,Read Only Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
或者,本公开上述集成的单元如果以软件功能模块的形式实现并作为独立的产品销售或使用时,也可以存储在一个计算机可读取存储介质中。基于这样的理解,本公开实施例的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来,该计算机软件产品存储在一个存储介质中,包括若干指令用以使得一台控制器执行本公开各个实施例所述方法的全部或部分。而前述的存储介质包括:移动存储设备、ROM、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述,仅为本公开的实施方式,但本公开的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本公开揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本 公开的保护范围之内。因此,本公开的保护范围应以所述权利要求的保护范围为准。

Claims (15)

  1. 一种保护电路,包括:继电器、三级管和上拉电阻,所述继电器的线圈的一端与功率器件中下桥臂晶体管的基极连接,所述线圈的另一端与所述下桥臂晶体管的发射极连接,所述继电器的动触点与所述上拉电阻、三极管的基极连接,所述继电器的静触点与所述三极管的集电极、所述功率器件中上桥臂晶体管的发射极连接,所述三极管的发射极与所述上桥臂晶体管的基极连接。
  2. 根据权利要求1所述的保护电路,其中,所述保护电路还包括:
    采样电路,所述采样电路与所述三极管连接,用于采样所述三极管的集电极和发射极之间的压差;
    控制电路,与所述采样电路连接,用于在所述压差小于所述三极管的导通压降的情况下,停止发送PWM信号,所述PWM信号用于控制驱动电路发出驱动信号,所述驱动信号用于驱动上桥臂晶体管和下桥臂晶体管的开通和关断。
  3. 根据权利要求1所述的保护电路,其中,所述保护电路还包括:
    采样电路,所述采样电路与所述三极管连接,用于采样所述三极管的集电极和发射极之间的压差;
    控制电路,与所述采样电路连接,用于在所述压差小于所述三极管的导通压降的情况下,停止发送PWM信号,所述PWM信号用于控制驱动电路发出驱动信号,所述驱动信号用于驱动上桥臂晶体管或下桥臂晶体管的开通和关断。
  4. 根据权利要求2或3所述的保护电路,其中,所述采样电路包括:运算放大器、第一电阻、第二电阻、第三电阻、第四电阻、第五电阻、第一电容和第二电容,所述第一电阻的一端连接所述三极管的发射极,所述第一电阻的另一端与所述运算放大器的第一输入端、第三电阻的一端、第一电容的一端连接,所述第二电阻的一端连接所述三极管的集电极,所述第二电阻的另一端连接所述运算放大器的第二输入端、第四电阻的一端连接,所述运算放大器的输出端与所述第一电容的另一端、第三电阻的另一端、第五电阻的一端连接,所述第五电阻的另一端与所述控制电路、第二电容的一端连接,所述第二电容的另一端与所述第四电阻的另一端接地。
  5. 根据权利要求2-4中任一项所述的保护电路,其中,所述保护电路还包括:
    报警电路,所述报警电路与所述控制电路连接,所述报警电路用于接收控制电路的信号进行报警。
  6. 根据权利要求2-5中任一项所述的保护电路,其中,所述报警电路包括:
    第六电阻和发光二极管,所述第六电阻与所述发光二极管串联,所述控制电路用于发出低电平信号以使所述发光二极管进行闪烁。
  7. 根据权利要求6所述的保护电路,其中:
    所述发光二极管,用于通过所述发光二极管的闪烁,以指示上桥臂晶体管和下桥臂晶体管异常。
  8. 根据权利要求6所述的保护电路,其中:
    所述发光二极管,用于通过所述发光二极管的闪烁,以指示上桥臂晶体管或下桥臂晶体管异常。
  9. 根据权利要求2至8中任一项所述的保护电路,其中,所述保护电路还包括:
    比较电路,与所述采样电路连接,用于比较所述压差和所述三极管的导通压降的大小关系,并输出所述大小关系的对比结果至所述控制电路。
  10. 根据权利要求2至9中任一项所述的保护电路,其中,所述保护电路还包括:
    第一驱动电路,所述控制电路的输出端与所述第一驱动电路连接,所述第一驱动电路的输出端与所述上桥臂晶体管的基极连接,所述第二驱动电路用于驱动所述下桥臂晶体管的开通和关断。
  11. 根据权利要求10所述的保护电路,其中,所述保护电路还包括:
    第二驱动电路,所述控制电路的输出端与所述第二驱动电路连接,所述第二驱动电路的输出端与所述下桥臂晶体管的基极连接,所述第二驱动电路用于驱动所述下桥臂晶体管的开通和关断。
  12. 根据权利要求11所述的保护电路,其中,所述保护电路还包括:
    电平转换芯片,所述控制电路的输出端通过所述电平转换芯片与所述第一驱动芯片、所述第二驱动电路连接。
  13. 根据权利要求12所述的保护电路,其中,所述第一驱动电路包括:第一驱动芯片和第一驱动电阻,所述第一驱动芯片的输入端与所述电平转换芯片的输出端连接,所述第一驱动芯片的输出端与所述第一驱动电阻的一端连接,所述第一驱动电阻的另一端与所述上桥臂晶体管的基极连接。
  14. 根据权利要求13所述的保护电路,其中,所述第二驱动电路包括:第二驱动芯片和第二驱动电阻,所述第二驱动芯片的输入端与所述电平转换芯片的输出端连接,所述第二驱动芯片的输出端与所述第二驱动电阻的一端连接,所述第二驱动电阻的另一端与所 述下桥臂晶体管的基极连接。
  15. 一种变流器,包括:功率模块和权利要求1至14中任一项所述的保护电路。
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