WO2024224912A1 - 実装基板および実装構造 - Google Patents

実装基板および実装構造 Download PDF

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Publication number
WO2024224912A1
WO2024224912A1 PCT/JP2024/011735 JP2024011735W WO2024224912A1 WO 2024224912 A1 WO2024224912 A1 WO 2024224912A1 JP 2024011735 W JP2024011735 W JP 2024011735W WO 2024224912 A1 WO2024224912 A1 WO 2024224912A1
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WO
WIPO (PCT)
Prior art keywords
land
wiring pattern
length
external electrode
slit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2024/011735
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
佑次 小林
俊一 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2025516620A priority Critical patent/JPWO2024224912A1/ja
Priority to CN202480026079.7A priority patent/CN120958953A/zh
Publication of WO2024224912A1 publication Critical patent/WO2024224912A1/ja
Priority to US19/363,695 priority patent/US20260047001A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0286—Programmable, customizable or modifiable circuits
    • H05K1/0295—Programmable, customizable or modifiable circuits adapted for choosing between different types or different locations of mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09072—Hole or recess under component or special relationship between hole and component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10015—Non-printed capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10522—Adjacent components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor

Definitions

  • the present invention relates to a mounting board and a mounting structure, and in particular to a mounting board having a wiring pattern and lands of a predetermined shape, and a mounting structure using the same.
  • bypass capacitors are used on mounting boards on which ICs and LSIs (integrated circuits) are mounted to absorb load fluctuations and remove noise during operation of the ICs, etc.
  • Bypass capacitors are connected via lands between the ground wiring pattern that supplies the ground potential and the power wiring pattern that supplies the power potential.
  • multilayer ceramic capacitors used as bypass capacitors are sometimes mounted and connected to lands connected to a so-called solid wiring pattern formed by solidly applying a ground wiring pattern or a power wiring pattern, as shown in Figure 4.
  • a solid wiring pattern formed by solidly applying a ground wiring pattern or a power wiring pattern, as shown in Figure 4.
  • the present invention aims to provide a mounting board that effectively prevents failure of multilayer ceramic capacitors on the mounting board and enables stable and reliable installation of multilayer ceramic capacitors, as well as a mounting structure using the same.
  • the inventors discovered that by providing a slit in the first wiring pattern that supplies the ground potential or power supply potential and by ensuring that the size of the slit has a specific relationship with the size of the first land that contacts the first wiring pattern, failure of the multilayer ceramic capacitor on the mounting board can be effectively prevented, leading to the completion of the present invention.
  • the present invention provides a semiconductor device including two wiring patterns for supplying a ground potential and a power supply potential, Two lands for connecting a pair of terminals of a capacitor to the two wiring patterns;
  • a mounting board comprising: When viewed from a direction perpendicular to the surface of the mounting substrate, When a direction connecting the centers of two lands is defined as a first direction and a direction perpendicular to the first direction is defined as a second direction, A slit is provided in the first wiring pattern, The length of the slit in the second direction is longer than the length of the first land in the second direction, a length of the slit in a first direction is longer than a length of the first land in the first direction; a distance between one of both ends of the slit in the first direction that is closer to the first land and one of both ends of the first wiring pattern in the first direction that is closer to the first land is shorter than a length of the first land in the first direction;
  • the first wiring pattern has a linear end portion along a second direction
  • the present invention makes it possible to provide a mounting board that effectively prevents failure of multilayer ceramic capacitors on the mounting board and enables stable and reliable installation of multilayer ceramic capacitors, as well as a mounting structure using the same.
  • FIG. 1 is a schematic plan view of a mounting substrate 1 according to a first embodiment of the present invention.
  • FIG. 4 is a schematic plan view of a mounting substrate 1 according to a second embodiment of the present invention.
  • FIG. 11 is a schematic plan view of a mounting substrate 1 according to a third embodiment of the present invention.
  • FIG. 1 is a schematic plan view showing a conventional mounting board.
  • FIG. 1 is an external view of a multilayer ceramic capacitor.
  • FIG. 1 is a diagram showing a method for a comparative test.
  • FIG. 1 is a diagram showing a method for a comparative test.
  • 1 is a graph showing the results of a comparison test.
  • 1 is a graph showing the results of a comparison test.
  • Figure 1 is a schematic plan view of a first embodiment.
  • Figure 2 is a schematic plan view of a second embodiment.
  • Figure 3 is a schematic plan view of a third embodiment.
  • the embodiments are illustrative of the embodiments of the present invention, and the present invention is not limited to the contents of the embodiments. It is also possible to combine the contents described in different embodiments, and the contents of such combinations are also included in the present invention.
  • the drawings are intended to aid in understanding the specification, and may be drawn diagrammatically, and the dimensional ratios of the depicted components or between the components may not match those dimensional ratios described in the specification. Components described in the specification may be omitted in the drawings, or may be drawn with the number of components omitted.
  • the mounting board 1 of the present invention is a board for mounting ICs, LSIs (integrated circuits), etc.
  • the mounting board 1 has two wiring patterns for respectively supplying a ground potential and a power supply potential, and when an IC or the like is mounted, it is connected to the ground wiring pattern to which the ground potential of the mounting board 1 is supplied and the power supply wiring pattern to which the power supply potential is supplied.
  • the mounting board 1 has two lands for connecting a pair of external electrodes of the multilayer ceramic capacitor to the ground wiring pattern and the power supply wiring pattern, respectively.
  • the mounting substrate 1 can be used as a substrate for a wide variety of capacitors, not just multilayer ceramic capacitors, and the two lands can be used by connecting a pair of terminals that correspond to a pair of external electrodes of the multilayer ceramic capacitor.
  • a first embodiment of the mounting substrate 1 of the present invention will be described.
  • a direction connecting the centers of two lands is defined as a first direction
  • a direction perpendicular to the first direction is defined as a second direction.
  • the mounting board 1 includes a ground wiring pattern for supplying a ground potential and a power wiring pattern for supplying a power supply potential.
  • the ground wiring pattern is a conductive film on which a conductor for supplying a ground potential is printed
  • the power wiring pattern is a conductive film on which a conductor for supplying a power supply potential is printed, and both conductive films have an insulating film (generally a green film) disposed on their surfaces.
  • either the ground wiring pattern or the power wiring pattern can be the first wiring pattern P1, and a slit S can be provided in it.
  • the ground wiring pattern usually has a larger area than the power wiring pattern, it is preferable to use the ground wiring pattern as the first wiring pattern and provide a slit S in it.
  • the slit S can be formed by providing an area in the first wiring pattern P1 where no conductor is printed, but it is also possible to provide a through hole that penetrates the mounting board within the area of the first wiring pattern P1 and use this as the slit S.
  • FIG. 1 illustrates a rectangular slit S as an example, but the slit S is not limited to this and any shape, such as a polygon or a circle, can be used.
  • the first land L1 and the second land L2 are conductive films for soldering mounted components such as multilayer ceramic capacitors, and are usually made of copper foil. Unlike the first wiring pattern P1, no insulating film is arranged on the surfaces of the first land L1 and the second land L2.
  • Figure 1 shows an example of the first land L1 and the second land L2 both having a rectangular shape, but the shape is not limited to this.
  • the length z of the slit S in the second direction is longer than the length c of the first land L1 in the second direction. 1 are both rectangular, so the length z and the length c are equal to the length of one side of the rectangle extending in the second direction of the slit S and the first land, respectively, but when the slit S or the first land L1 is a circle, a polygon or the like other than a rectangle, the length z of the slit S in the second direction is the length of the portion of the outer shape of the slit S that has the longest length in the second direction when viewed in a plan view from a direction perpendicular to the surface of the mounting substrate 1.
  • the length c of the first land L1 in the second direction is the length of the portion of the outer shape of the first land L1 that has the longest length in the second direction when viewed in a plan view from a direction perpendicular to the surface of the mounting substrate 1.
  • the multilayer ceramic capacitor can be mounted more stably on the mounting substrate 1.
  • the length y of the slit S in the first direction is longer than the length b of the first land L1 in the first direction. 1 are both rectangular, so the length y and the length b are equal to the length of one side of the rectangle extending in the first direction of the slit S and the first land, respectively, but when the slit S or the first land L1 is a circle, a polygon or the like other than a rectangle, the length y in the first direction of the slit S is the length of the part of the outline of the slit S that has the longest length in the first direction when viewed in a plan view from a direction perpendicular to the surface of the mounting substrate 1.
  • the length b in the first direction of the first land L1 is the length of the part of the outline of the first land L1 that has the longest length in the first direction when viewed in a plan view from a direction perpendicular to the surface of the mounting substrate 1.
  • the distance x between the end Se of the slit S in the first direction that is closer to the first land L1 and the end Pe of the first wiring pattern in the first direction that is closer to the first land L1 is shorter than the length b of the first land in the first direction.
  • the first wiring pattern P1 has a straight end Es along the second direction, the length of the straight end Es is equal to or greater than the length c of the first land L1 in the second direction, and the straight end Es is in contact with the first land L1.
  • a mounting structure is formed in which the first external electrode 31 and the second external electrode 32 of the multilayer ceramic capacitor 10 are connected to the first land L1 and the second land L2, which are used to connect the first wiring pattern P1 and the second wiring pattern P2, respectively.
  • the multilayer ceramic capacitor 10 comprises a laminate 20 including a structure in which a plurality of dielectric layers and internal electrode layers are laminated, and a first external electrode 31 and a second external electrode 32 provided on opposing outer surfaces of the laminate 20. Adjacent internal electrode layers in the lamination direction are connected to different first external electrodes 31 and second external electrodes 32, and a capacitance is formed within the laminate 20 by applying a voltage to the first external electrode 31 and the second external electrode 32.
  • the board surface When the mounting board 1 on which the multilayer ceramic capacitor 10 is mounted is bent in a convex shape, the board surface extends horizontally and the space between the lands is deformed in a direction that widens. This deformation acts as a force that separates the first external electrode 31 and the second external electrode 32 of the multilayer ceramic capacitor 10, which are soldered to the first land L1 and the second land L2, respectively, and causes cracks in the dielectric that constitutes the multilayer ceramic capacitor 10.
  • the solid wiring has a higher rigidity than the board, and when the board is bent in a convex shape, the distortion of the board surface is concentrated between the lands, which is an area not covered by the solid wiring, and an even larger tensile stress is generated in the dielectric of the multilayer ceramic capacitor.
  • the distortion of the board surface is dispersed within the slit S, and the tensile stress generated in the multilayer ceramic capacitor 10 can be reduced by the effect of reducing the distortion of the board surface between the first land L1 and the second land L2.
  • the mounting board 1 is bent in a convex shape by pressing down on positions at equal distances from the multilayer ceramic capacitor 10 in the first direction, centered on the multilayer ceramic capacitor 10.
  • the distribution of stress generated at this time is shown in Figure 7, and the stress was analyzed for the upper part of the side edge where the first land L1 and the second land L2 face each other, where the multilayer ceramic capacitor 10 and the first land L1, or the multilayer ceramic capacitor 10 and the second land L2 are joined, where stress is most likely to concentrate.
  • Second Embodiment A second embodiment of the mounting board 1 of the present invention will be described.
  • the second embodiment will be described focusing on the configuration different from the first embodiment.
  • a recess 2 is formed in the first wiring pattern P1.
  • the first wiring pattern P1 has a linear end Es along the second direction, and the first land L1 is in contact with the linear end Es.
  • at least a portion of the first land L1 is disposed within the recess 2.
  • the slits S were arranged in the first wiring pattern P1, but the slits S can also be arranged in the second wiring pattern P2 in the same way as they were arranged in the first wiring pattern.
  • the mounting board 1 can have slits S arranged in both the first wiring pattern P1 and the second wiring pattern P2.
  • a third embodiment of the mounting board 1 of the present invention will be described.
  • the third embodiment will be described focusing on the configuration different from the first and second embodiments.
  • the mounting board 1 can further include a third wiring pattern P3, and a third land L3 and a fourth land L4 for connecting a pair of external electrodes of the multilayer ceramic capacitor to the second wiring pattern P2 and the third wiring pattern P3, respectively.
  • the first and second external electrodes of the first multilayer ceramic capacitor are connected to the first land L1 and the second land L2 for connecting the first wiring pattern P1 and the second wiring pattern P2, respectively
  • the third and fourth external electrodes of the second multilayer ceramic capacitor are connected to the third land L3 and the fourth land L4 for connecting the second wiring pattern P2 and the third wiring pattern P3, respectively (not shown).
  • the first and second multilayer ceramic capacitors described above both have the same structure as the multilayer ceramic capacitor 10 shown in FIG. 5, with the first multilayer ceramic capacitor having a first external electrode and a second external electrode corresponding to the first external electrode 31 and the second external electrode 32 in FIG. 5, and the second multilayer ceramic capacitor having a third external electrode and a fourth external electrode corresponding to the first external electrode 31 and the second external electrode 32 in FIG. 5.
  • a ground potential can be supplied to the first wiring pattern P1 and the third wiring pattern P3.
  • a power supply potential is supplied to the first wiring pattern P1 or the third wiring pattern P3, and a ground potential is supplied to the third wiring pattern P3 or the first wiring pattern P1
  • two multilayer ceramic capacitors can be arranged in series between the power supply potential and the ground potential, thereby increasing the withstand voltage.
  • the third wiring pattern P3 can be of the same shape as the first wiring pattern P1 or the second wiring pattern P2. Also, a slit S can be provided in the same way as the first wiring pattern P1, etc.
  • the above describes an embodiment of the present invention, but the present invention is not limited to the embodiment, and can be embodied in various forms without departing from the gist of the present invention.
  • the present invention includes the following combinations.
  • a mounting board comprising: When viewed from a direction perpendicular to the surface of the mounting substrate, When a direction connecting the centers of two lands is defined as a first direction and a direction perpendicular to the first direction is defined as a second direction, A slit is provided in the first wiring pattern, The length of the slit in the second direction is longer than the length of the first land in the second direction, a length of the slit in a first direction is longer than a length of the first land in the first direction; a distance between one of both ends of the slit in the first direction that is closer to the first land and one of both ends of the first wiring pattern in the first direction that is closer to the first land is shorter than a length of the first land in the first direction; a mounting board, the first wiring pattern having a straight end portion along a second direction, the length
  • ⁇ 2> The mounting board according to ⁇ 1>, wherein a recess is formed in the first wiring pattern, and at least a portion of the first land is disposed within the recess.
  • ⁇ 3> The mounting board according to ⁇ 1> or ⁇ 2>, wherein a length of the slit in the second direction is at least twice as long as a length of the first land in the second direction.
  • ⁇ 4> The mounting board according to any one of ⁇ 1> to ⁇ 3>, wherein the slit is provided in the second wiring pattern.
  • ⁇ 7> The mounting board according to ⁇ 5>, a multilayer ceramic capacitor having a first external electrode and a second external electrode; a multilayer ceramic capacitor having a third external electrode and a fourth external electrode; having the first external electrode and the second external electrode are connected to the first land and the second land, respectively; A mounting structure, wherein the third external electrode and the fourth external electrode are connected to a third land and a fourth land, respectively.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Structure Of Printed Boards (AREA)
PCT/JP2024/011735 2023-04-27 2024-03-25 実装基板および実装構造 Ceased WO2024224912A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2025516620A JPWO2024224912A1 (https=) 2023-04-27 2024-03-25
CN202480026079.7A CN120958953A (zh) 2023-04-27 2024-03-25 安装基板和安装构造
US19/363,695 US20260047001A1 (en) 2023-04-27 2025-10-21 Mounting substrate and mounting structure

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2023073579 2023-04-27
JP2023-073579 2023-04-27

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US19/363,695 Continuation US20260047001A1 (en) 2023-04-27 2025-10-21 Mounting substrate and mounting structure

Publications (1)

Publication Number Publication Date
WO2024224912A1 true WO2024224912A1 (ja) 2024-10-31

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PCT/JP2024/011735 Ceased WO2024224912A1 (ja) 2023-04-27 2024-03-25 実装基板および実装構造

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US (1) US20260047001A1 (https=)
JP (1) JPWO2024224912A1 (https=)
CN (1) CN120958953A (https=)
WO (1) WO2024224912A1 (https=)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007081364A (ja) * 2005-08-15 2007-03-29 Canon Inc プリント基板及び半導体集積回路
JP2008060435A (ja) * 2006-09-01 2008-03-13 Hitachi Ltd 不要電磁輻射抑制回路及び実装構造及びそれを実装した電子機器
JP2021068757A (ja) * 2019-10-18 2021-04-30 株式会社リコー 配線基板

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007081364A (ja) * 2005-08-15 2007-03-29 Canon Inc プリント基板及び半導体集積回路
JP2008060435A (ja) * 2006-09-01 2008-03-13 Hitachi Ltd 不要電磁輻射抑制回路及び実装構造及びそれを実装した電子機器
JP2021068757A (ja) * 2019-10-18 2021-04-30 株式会社リコー 配線基板

Also Published As

Publication number Publication date
CN120958953A (zh) 2025-11-14
JPWO2024224912A1 (https=) 2024-10-31
US20260047001A1 (en) 2026-02-12

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