WO2024222276A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2024222276A1
WO2024222276A1 PCT/CN2024/081524 CN2024081524W WO2024222276A1 WO 2024222276 A1 WO2024222276 A1 WO 2024222276A1 CN 2024081524 W CN2024081524 W CN 2024081524W WO 2024222276 A1 WO2024222276 A1 WO 2024222276A1
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WO
WIPO (PCT)
Prior art keywords
touch
base substrate
segment
sub
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2024/081524
Other languages
English (en)
French (fr)
Inventor
陈天赐
王威
王思雨
王裕
刘姜华
罗昶
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Publication of WO2024222276A1 publication Critical patent/WO2024222276A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40—OLEDs integrated with touch screens
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K39/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic radiation-sensitive element covered by group H10K30/00
    • H10K39/30—Devices controlled by radiation
    • H10K39/32—Organic image sensors
    • H10K39/34—Organic image sensors integrated with organic light-emitting diodes [OLED]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display panel and a display device.
  • part of the touch lines located at the lower bezel of the display panel will be arranged outside the display panel barrier dam (used to block water and oxygen). Different parts of this part of the touch lines have different distances from the base substrate of the display panel and have a height difference. Therefore, short circuits are prone to occur during the manufacturing process.
  • the purpose of the present disclosure is to provide a display panel and a display device, which are helpful to improve the quality of the display panel.
  • a display panel comprising:
  • a substrate comprising a display area and a peripheral area located outside the display area, wherein the peripheral area comprises a first peripheral area and a second peripheral area located on a side of the first peripheral area away from the display area;
  • a first organic layer is disposed on one side of the base substrate, the first organic layer includes a second region, and the second region is located in the second peripheral area;
  • a barrier dam is provided on one side of the base substrate, and the barrier dam is located in the first peripheral area;
  • a touch layer is provided on a side of the first organic layer away from the base substrate, the touch layer includes a first touch line and a second touch line, the first touch line and the second touch line both include a first section extending along a first direction, and the first sections of the first touch line and the second touch line are both located in the second peripheral area;
  • the first segments of the first touch routing and the second touch routing both include a first sub-segment and a second sub-segment connected to each other, the distances between the first sub-segment and the second sub-segment of the first touch routing and the substrate are different, and the distances between the first sub-segment and the second sub-segment of the second touch routing and the substrate are different;
  • the orthographic projections of the first sub-segments of the first touch wiring and the second touch wiring on the base substrate do not overlap with the orthographic projections of the first organic layer on the base substrate;
  • the orthographic projections of the second sub-segments of the first touch wiring and the second touch wiring on the base substrate are both located within the orthographic projection of the second region of the first organic layer on the base substrate;
  • the first organic layer further includes a bump unit, and an orthographic projection of the bump unit on the base substrate is at least partially located between orthographic projections of the first subsegment of the first touch wiring and the first subsegment of the second touch wiring on the base substrate.
  • the display panel further includes:
  • An encapsulation layer is arranged between the first organic layer and the touch layer, and the encapsulation layer includes a first inorganic layer, a second organic layer, and a second inorganic layer stacked in a direction away from the base substrate, and the second organic layer is projected on the base substrate on a side of the barrier dam on the base substrate away from the second peripheral area.
  • a distance between the first segment of the first touch wiring and the first segment of the second touch wiring in a direction parallel to the substrate is no more than 20 ⁇ m.
  • the bump unit includes a first bump
  • the second region of the first organic layer has a first edge extending along a second direction, and the second direction is not parallel to the first direction;
  • At least a portion of the first edge of the second region of the first organic layer protrudes along the first direction toward the first sub-segment to form at least one first protrusion.
  • the size of the first bump in the first direction is not less than 35 ⁇ m
  • the shortest distance between an edge of the first bump and the first touch wiring or the second touch wiring is not less than 4 ⁇ m.
  • the bump unit also includes at least one second bump, and the second bump is arranged on a side of the first bump or the second region of the first organic layer away from the base substrate, and at least part of the orthographic projection of the second bump on the base substrate is located within the orthographic projection of the first bump on the base substrate.
  • a sum of heights of the first bump and the second bump is 1.5 ⁇ m-2.5 ⁇ m.
  • the bump unit includes a first bump unit including a plurality of third bumps
  • the orthographic projections of the plurality of third bumps on the base substrate do not overlap with the second region of the first organic layer, and the orthographic projections of the plurality of third bumps on the base substrate are located between the first subsegment of the first touch wiring and the first subsegment of the second touch wiring.
  • the bump unit further includes a second bump unit, the second bump unit is located at one side of the first bump unit in the first direction, and the second bump unit includes a plurality of fourth bumps;
  • the plurality of fourth bump arrays are arranged between the first section of the first touch wiring and the first section of the second touch wiring;
  • the orthographic projections of the plurality of fourth bumps on the base substrate are located within the orthographic projection of the second region of the first organic layer on the base substrate.
  • the height of the third bump in a direction perpendicular to the substrate, is 1.5 ⁇ m-2.5 ⁇ m.
  • a size of the first bump unit in the first direction is not less than 35 ⁇ m, and a size of the bump unit in the first direction is not more than 200 ⁇ m.
  • the first section of the second touch wiring is located on a side of the first section of the first touch wiring away from the display area;
  • the touch layer further includes a grounding line, the grounding line includes a first main segment and a second main segment extending along the first direction, and a bending segment connected between the first main segment and the second main segment, the orthographic projection of the first main segment on the base substrate does not overlap with the orthographic projection of the second region of the first organic layer on the base substrate, and the orthographic projection of the second main segment on the base substrate is located within the orthographic projection of the second region of the first organic layer on the base substrate;
  • the maximum distance between the bent section of the grounding line and the first section of the second touch line is greater than the maximum distance between the first main section and the second main section of the grounding line and the first section of the second touch line.
  • an orthographic projection of the bending segment on the base substrate intersects with an orthographic projection of an edge of the second region of the first organic layer on the base substrate to form a first angle ⁇ , 0° ⁇ 90°.
  • the bending segment includes a first sub-bending segment, a second sub-bending segment and a third sub-bending segment connected in sequence, the second sub-bending segment extends along the first direction, the first sub-bending segment connects the first main segment and the second sub-bending segment, and the third sub-bending segment connects the second main segment and the second sub-bending segment;
  • the orthographic projection of the first sub-bending segment on the base substrate does not overlap with the orthographic projection of the second region of the first organic layer on the base substrate, and the orthographic projection of the third sub-bending segment on the base substrate is located within the orthographic projection of the second region of the first organic layer on the base substrate;
  • the orthographic projection of the second sub-bending segment on the base substrate intersects with the orthographic projection of the edge of the second region of the first organic layer on the base substrate to form the first angle.
  • the touch layer further includes a plurality of driving electrodes and a plurality of receiving electrodes, the driving electrodes are used to receive touch driving signals, and the first touch traces are connected to the receiving electrodes to transmit mutual capacitance change signals between the driving electrodes and the receiving electrodes;
  • the second touch control wiring is used to load a shielding signal.
  • the touch control layer further comprises a first conductive layer, an insulating layer, and a second conductive layer stacked in a direction away from the base substrate;
  • the first section of the first touch control trace is distributed in the first conductive layer or the second conductive layer;
  • the first section of the second touch-control trace is distributed in the first conductive layer or the second conductive layer;
  • first section of the first touch wiring and the first section of the second touch wiring are arranged in different layers.
  • the first touch wiring and the second touch wiring each further include a second section extending along a third direction and connected to the first section, and the third direction is not parallel to the first direction;
  • the second section of the first touch wiring is distributed in two conductive layers, the first conductive layer and the second conductive layer, the orthographic projections of the wirings of the first touch wirings distributed in different conductive layers on the substrate at least partially overlap, and the wirings distributed in different conductive layers are connected through at least one first via hole in the insulating layer;
  • the second section of the second touch wiring is distributed in two conductive layers, the first conductive layer and the second conductive layer, the orthographic projections of the wirings of the second touch wirings distributed in different conductive layers on the substrate at least partially overlap, and the wirings distributed in different conductive layers are connected through at least one second via hole in the insulating layer;
  • An orthographic projection of at least one of the first via holes on the base substrate is located within an orthographic projection of the second segment of the first touch control trace on the base substrate;
  • An orthographic projection of at least one of the second via holes on the base substrate is located within an orthographic projection of the second segment of the second touch-control trace on the base substrate.
  • the touch layer includes a first conductive layer, an insulating layer, and a second conductive layer stacked in a direction away from the base substrate;
  • the first touch control traces are distributed in two conductive layers, the first conductive layer and the second conductive layer, the orthographic projections of the traces of the first touch control traces distributed in different conductive layers on the substrate at least partially overlap, and the traces distributed in different conductive layers are connected through at least one first via in the insulating layer;
  • the second touch lines are distributed in two conductive layers, the first conductive layer and the second conductive layer.
  • the orthographic projections of the first touch lines distributed in different conductive layers on the base substrate at least partially overlap, and the lines distributed in different conductive layers are connected through at least one second via in the insulating layer.
  • the first touch wiring and the second touch wiring each further include a second section extending along a third direction and connected to the first section, and the third direction is not parallel to the first direction;
  • An orthographic projection of at least one of the first via holes on the base substrate is located within an orthographic projection of the second segment of the first touch control trace on the base substrate;
  • An orthographic projection of at least one of the second via holes on the base substrate is located within an orthographic projection of the second segment of the second touch-control trace on the base substrate.
  • the line width of the second section of the first touch line is greater than the line width of the first section of the first touch line
  • the line width of the second section of the second touch control line is greater than the line width of the first section of the second touch control line.
  • the display panel further includes a driving chip
  • the second peripheral region includes a binding region, the second region of the first organic layer is at least partially located in the binding region, a surface of the second region of the first organic layer away from the base substrate is provided with a groove, and the driving chip is located in the groove.
  • the present disclosure provides a display panel, comprising:
  • a substrate comprising a display area and a peripheral area located outside the display area, wherein the peripheral area comprises a first peripheral area and a second peripheral area located on a side of the first peripheral area away from the display area;
  • a first organic layer is disposed on one side of the base substrate, the first organic layer includes a second region, and the second region is located in the second peripheral area;
  • a barrier dam is provided on one side of the base substrate, and the barrier dam is located in the first peripheral area;
  • a touch layer is provided on a side of the first organic layer away from the base substrate, the touch layer includes a first touch line and a second touch line, the first touch line and the second touch line both include a first section extending along a first direction, and the first sections of the first touch line and the second touch line are both located in the second peripheral area;
  • the first segments of the first touch routing and the second touch routing both include a first sub-segment and a second sub-segment connected to each other, the distances between the first sub-segment and the second sub-segment of the first touch routing and the substrate are different, and the distances between the first sub-segment and the second sub-segment of the second touch routing and the substrate are different;
  • the orthographic projections of the first sub-segments of the first touch wiring and the second touch wiring on the base substrate do not overlap with the orthographic projections of the first organic layer on the base substrate;
  • the orthographic projections of the second sub-segments of the first touch wiring and the second touch wiring on the base substrate are both located within the orthographic projection of the second region of the first organic layer on the base substrate;
  • the touch layer also includes a first conductive layer, an insulating layer, and a second conductive layer stacked in a direction away from the base substrate.
  • the first segment of the first touch line is distributed in the first conductive layer or the second conductive layer
  • the first segment of the second touch line is distributed in the first conductive layer or the second conductive layer
  • the first segment of the first touch line and the first segment of the second touch line are arranged in different layers.
  • the first touch wiring and the second touch wiring each further include a second section extending along a third direction and connected to the first section, and the third direction is not parallel to the first direction;
  • the second section of the first touch wiring is distributed in two conductive layers, the first conductive layer and the second conductive layer, the orthographic projections of the wirings of the first touch wirings distributed in different conductive layers on the substrate at least partially overlap, and the wirings distributed in different conductive layers are connected through at least one first via hole in the insulating layer;
  • the second section of the second touch wiring is distributed in two conductive layers, the first conductive layer and the second conductive layer, the orthographic projections of the wirings of the second touch wirings distributed in different conductive layers on the substrate at least partially overlap, and the wirings distributed in different conductive layers are connected through at least one second via hole in the insulating layer;
  • An orthographic projection of at least one of the first via holes on the base substrate is located within an orthographic projection of the second segment of the first touch control trace on the base substrate;
  • An orthographic projection of at least one of the second via holes on the base substrate is located within an orthographic projection of the second segment of the second touch-control trace on the base substrate.
  • the present disclosure also provides a display panel, comprising:
  • a substrate comprising a display area and a peripheral area located outside the display area, wherein the peripheral area comprises a first peripheral area and a second peripheral area located on a side of the first peripheral area away from the display area;
  • a first organic layer is disposed on one side of the base substrate, the first organic layer includes a second region, and the second region is located in the second peripheral area;
  • a barrier dam is provided on one side of the base substrate, and the barrier dam is located in the first peripheral area;
  • a touch layer is provided on a side of the first organic layer away from the base substrate, the touch layer includes a second touch line, the second touch line includes a first section extending along a first direction, and the first section of the second touch line is located in the second peripheral area;
  • the touch layer further includes a signal line, and the signal line is located on a side of the second touch line away from the display area;
  • the signal line includes a first main segment and a second main segment extending along a first direction, and a bending segment connected between the first main segment and the second main segment, the orthographic projection of the first main segment on the base substrate does not overlap with the orthographic projection of the second region of the first organic layer on the base substrate, and the orthographic projection of the second main segment on the base substrate is located within the orthographic projection of the second region of the first organic layer on the base substrate;
  • the maximum distance between the bending section of the signal line and the first section of the second touch line is greater than the maximum distance between the first main section, the second main section of the signal line and the first section of the second touch line.
  • an orthographic projection of the bending segment on the base substrate intersects with an orthographic projection of an edge of the second region of the first organic layer on the base substrate to form a first angle ⁇ , 0° ⁇ 90°.
  • the bending segment includes a first sub-bending segment, a second sub-bending segment and a third sub-bending segment connected in sequence, the second sub-bending segment extends along the first direction, the first sub-bending segment connects the first main segment and the second sub-bending segment, and the third sub-bending segment connects the second main segment and the second sub-bending segment;
  • the orthographic projection of the first sub-bending segment on the base substrate does not overlap with the orthographic projection of the second region of the first organic layer on the base substrate, and the orthographic projection of the third sub-bending segment on the base substrate is within the orthographic projection of the second region of the first organic layer on the base substrate.
  • the orthographic projection of the bent segment on the base substrate intersects with the orthographic projection of the edge of the second region of the first organic layer on the base substrate to form a first angle ⁇ , 0° ⁇ 90°;
  • the bending segment includes a first sub-bending segment, a second sub-bending segment and a third sub-bending segment connected in sequence, the second sub-bending segment extends along the first direction, the first sub-bending segment connects the first main segment and the second sub-bending segment, and the third sub-bending segment connects the second main segment and the second sub-bending segment;
  • the orthographic projection of the first sub-bending segment on the base substrate does not overlap with the orthographic projection of the second region of the first organic layer on the base substrate, and the orthographic projection of the third sub-bending segment on the base substrate is located within the orthographic projection of the second region of the first organic layer on the base substrate;
  • the orthographic projection of the second sub-bending segment on the base substrate intersects with the orthographic projection of the edge of the second region of the first organic layer on the base substrate to form the first angle.
  • the signal line is used to load a ground signal.
  • the first organic layer further includes a first region, the first region is located in the first peripheral area, and the barrier dam includes the first region of the first organic layer.
  • a display device comprising the display panel as described above.
  • the first touch line and the second touch line both include a first section extending along the first direction, and the section is located in the second peripheral area of the substrate.
  • the first sections of the first touch line and the second touch line both include a first sub-segment and a second sub-segment connected to each other, wherein the first sub-segment does not overlap with the orthographic projection of the first organic layer on the substrate, and the orthographic projection of the second sub-segment on the substrate is located within the orthographic projection of the second area of the first organic layer on the substrate, that is, the distances between the first sub-segment, the second sub-segment and the substrate are not equal, and there is a height difference.
  • the first organic layer of the present disclosure also includes a bump unit, and the orthographic projection of the bump unit on the substrate is at least partially located between the first sub-segment of the first touch line and the first sub-segment of the second touch line, that is, the bump unit separates the first sub-segment of the first touch line and the first sub-segment of the second touch line, which helps to reduce the risk of short circuit between the two touch lines during etching to a certain extent, thereby improving the quality of the display panel.
  • FIG1 is a schematic diagram of a substrate structure in an exemplary embodiment of the present disclosure.
  • FIG2 is a schematic cross-sectional view of a display area of a display panel in an exemplary embodiment of the present disclosure
  • FIG3 is a schematic diagram of a planar structure of a touch layer in an exemplary embodiment of the present disclosure
  • FIG4 is a schematic structural diagram of an embodiment of the wiring of part A in FIG3 ;
  • FIG5 is a schematic diagram of the structure of the peripheral area of the first organic layer in an exemplary embodiment of the present disclosure
  • FIG6 is a schematic diagram of a barrier dam structure in an exemplary embodiment of the present disclosure.
  • FIG7 is a schematic structural diagram of an embodiment of part B in FIG4 ;
  • FIG8 is a schematic cross-sectional view of the bump unit in FIG7 ;
  • FIG9 is an enlarged schematic diagram of part C1 in FIG7;
  • FIG10 is an enlarged schematic diagram of part D in FIG4 ;
  • FIG11 is a schematic structural diagram of another embodiment of part B in FIG4 ;
  • FIG12 is a schematic cross-sectional view of the bump unit in FIG11 ;
  • FIG13 is a schematic structural diagram of another embodiment of part B in FIG4;
  • FIG14 is a schematic cross-sectional view of the bump unit in FIG13 ;
  • FIG15 is a schematic structural diagram of another embodiment of part B in FIG4 ;
  • FIG16 is a schematic structural diagram of another embodiment of part B in FIG4 ;
  • FIG17 is an enlarged schematic diagram of part C2 in FIG16;
  • FIG18 is a schematic cross-sectional view of the bump unit in FIG16 ;
  • FIG19 is a schematic structural diagram of another embodiment of the wiring of section A in FIG3 ;
  • FIG20 is an enlarged schematic diagram of part E in FIG19;
  • FIG. 21 is a schematic diagram of wiring connections distributed on different conductive layers in an exemplary embodiment of the present disclosure.
  • the main elements in the figure are marked as follows: 100-substrate; 110-display area; 120-peripheral area; 121-first peripheral area; 122-second peripheral area; 1221-binding area; 200-driving circuit layer; 201-active layer; 202-first gate insulating layer; 203-first gate metal layer; 204-second gate insulating layer; 205-second gate metal layer; 206-interlayer dielectric layer; 207-first source and drain layer; 208-first planarization layer; 209-second source and drain layer; 210-second planarization layer; 211-shielding layer Optical layer; 212-passivation layer; 300-light-emitting layer; 301-first organic layer; 302-first electrode layer; 303-light-emitting functional layer; 304-second electrode layer; 011-pixel definition area; 012-pixel opening; 013-isolation column; 014-first area; 015-second area; 015a-groove; 015b-first
  • a structure When a structure is “on” another structure, it may mean that the structure is integrally formed on the other structure, or that the structure is “directly” disposed on the other structure, or that the structure is “indirectly” disposed on the other structure via another structure.
  • part of the touch lines located at the lower bezel of the display panel will be arranged on the periphery of a barrier dam (used to block water and oxygen) of the display panel.
  • a barrier dam used to block water and oxygen
  • Different parts of this part of the touch lines have different distances from the base substrate of the display panel and have a height difference. Therefore, when etching to form such touch lines, etching residues are easily generated, resulting in a short circuit between two adjacent touch lines.
  • the present disclosure provides a display panel, including a substrate 100, a first organic layer 301, a barrier dam 700 and a touch layer 500, wherein the substrate 100 includes a display area 110 and a peripheral area 120 located outside the display area 110, the peripheral area 120 includes a first peripheral area 121 and a second peripheral area 122 located on a side of the first peripheral area 121 away from the display area 110; the first organic layer 301 is disposed on one side of the substrate 100, the first organic layer 301 includes a second area 015, and also includes a first area 014, the first area 014 is located in the first peripheral area 121, and the second area 015 is located in the first peripheral area 121.
  • the barrier dam 700 is arranged on one side of the base substrate 100, the barrier dam 700 is located in the first peripheral area 121, and the barrier dam 700 includes a first area 014 of the first organic layer 301;
  • the touch layer 500 is arranged on a side of the first organic layer 301 away from the base substrate 100, the touch layer 500 includes a first touch wiring 514 and a second touch wiring 515, the first touch wiring 514 and the second touch wiring 515 both include a first segment 514a or 515a extending along the first direction X, and the first segments 514a or 515a of the first touch wiring 514 and the second touch wiring 515 are both located in the second peripheral area 122; wherein, The first section 514a or 515a of the first touch wiring 514 and the second touch wiring 515 both include a first sub-section 14a1 or 15a1 and a second sub-section 14a2 or 15a2 connected to each other.
  • the distances between the first sub-section 14a1 or 15a1 and the second sub-section 14a2 or 15a2 of the first touch wiring 514 and the substrate 100 are different.
  • the distances between the first sub-section 14a1 or 15a1 and the second sub-section 14a2 or 15a2 of the second touch wiring 515 and the substrate 100 are different.
  • the first sub-section 14a1 or 15a1 of the first touch wiring 514 and the second touch wiring 515 are projected on the substrate 100.
  • the orthographic projections of the first touch wiring 514 and the second touch wiring 515 on the substrate 100 do not overlap with the orthographic projection of the first organic layer 301 on the substrate 100; the orthographic projections of the second subsegments 14a2 or 15a2 of the first touch wiring 514 and the second touch wiring 515 on the substrate 100 are both located within the orthographic projection of the second area 015 of the first organic layer 301 on the substrate 100; the first organic layer 301 also includes a bump unit 016, and the orthographic projection of the bump unit 016 on the substrate 100 is at least partially located between the orthographic projections of the first subsegment 14a1 or 15a1 of the first touch wiring 514 and the first subsegment 14a1 or 15a1 of the second touch wiring 515 on the substrate 100.
  • the first touch wiring 514 and the second touch wiring 515 both include a first segment 514a or 515a extending along the first direction X, and the segment is located in the second peripheral area 122 of the substrate 100.
  • the first segments 514a or 515a of the first touch wiring 514 and the second touch wiring 515 both include a first sub-segment 14a1 or 15a1 and a second sub-segment 14a2 or 15a2 connected to each other, wherein the first sub-segment 14a1 or 15a1 does not overlap with the orthographic projection of the first organic layer 301 on the substrate 100, and the orthographic projection of the second sub-segment 14a2 or 15a2 on the substrate 100 is located within the orthographic projection of the second area 015 of the first organic layer 301 on the substrate 100, that is, the distances between the first sub-segment 14a1 or 15a1 and the second sub-segment 14a2 or 15a2 and the substrate 100
  • the first organic layer 301 of the present disclosure also includes a bump unit 016, and the orthographic projection of the bump unit 016 on the base substrate 100 is at least partially located between the first sub-segment 14a1 or 15a1 of the first touch trace 514 and the first sub-segment 14a1 or 15a1 of the second touch trace 515, that is, the bump unit 016 separates the first sub-segment 14a1 or 15a1 of the first touch trace 514 and the second touch trace 515, which helps to reduce the risk of short circuit between the two touch traces during etching to a certain extent, thereby improving the quality of the display panel.
  • FIG. 4 is a schematic diagram of an exemplary partial structure of region A in FIG. 3, and FIG. 7 is an exemplary enlarged view of region B in FIG. 4.
  • the display panel provided by the present disclosure may be an OLED (Organic Light-Emitting Diode) display panel, a Micro LED (Micro Light Emitting Diode) display panel, a Mini LED (Mini Light Emitting Diode) display panel, or a QLED (Quantum Dots Light Emitting Diode) display panel.
  • the display panel includes a substrate 100, a first organic layer 301, a barrier dam 700, and a touch layer 500.
  • the material of the substrate 100 may be a glass material such as soda-lime glass, quartz glass, sapphire glass, or a metal material such as stainless steel, aluminum, nickel, etc.
  • the substrate 100 may also be a flexible substrate.
  • the material of the substrate 100 may be polyimide (PI).
  • the substrate 100 may also be a composite of multiple layers of materials.
  • the substrate 100 may include a bottom film layer (Bottom Film), a pressure-sensitive adhesive layer, a first polyimide layer, and a second polyimide layer stacked in sequence.
  • the substrate 100 includes a display area 110 and a peripheral area 120 located outside the display area 110.
  • the peripheral area 120 includes a first peripheral area 121 and a second peripheral area 122 located on a side of the first peripheral area 121 away from the display area 110.
  • the second peripheral area 122 further includes a binding area 1221.
  • the first organic layer 301 is disposed on one side of the base substrate 100.
  • the display panel further includes a driving circuit layer 200 and a light-emitting layer 300, and the light-emitting layer 300 includes the first organic layer 301 and a plurality of light-emitting devices.
  • the driving circuit layer 200 is disposed between the base substrate 100 and the light-emitting layer 300.
  • the driving circuit layer 200 includes a driving circuit for driving the light-emitting device to emit light.
  • the driving circuit includes a pixel circuit located in the display area 110 and a peripheral circuit located in the peripheral area 120.
  • the number of pixel circuits is multiple, and the multiple pixel circuits are used to drive the light-emitting device to emit light in a one-to-one correspondence. It can be a pixel circuit such as 7T1C, 7T2C, 6T1C or 6T2C. As long as it can drive the light-emitting device to emit light, its structure is not specifically limited here.
  • nTmC means that a pixel circuit includes n transistors (represented by the letter “T”) and m capacitors (represented by the letter “C").
  • the peripheral circuit is located in the peripheral area 120 and is connected to the pixel circuit for inputting a driving signal to the pixel circuit so as to control the light emitting device to emit light.
  • the peripheral circuit may include a gate driving circuit and a light emitting control circuit, and of course, may also include other circuits.
  • the specific structure of the peripheral circuit is not particularly limited here.
  • the driving circuit layer 200 includes an active layer 201, a first gate insulation layer 202, a first gate metal layer 203, a second gate insulation layer 204, a second gate metal layer 205, an interlayer dielectric layer 206, a first source and drain layer 207, a first planarization layer 208, a second source and drain layer 209 and a second planarization layer 210.
  • the active layer 201 is arranged on one side of the base substrate 100; the first gate insulating layer 202 is arranged on the side of the active layer 201 away from the base substrate 100, and the first gate insulating layer 202 covers the active layer 201; the first gate metal layer 203 is arranged on the side of the first gate insulating layer 202 away from the base substrate 100, and the first gate metal layer 203 may include the gate of the transistor and the first plate of the capacitor.
  • the second gate insulating layer 204 is disposed on a side of the first gate metal layer 203 away from the substrate 100, and the second gate insulating layer 204 covers the first gate metal layer 203; the second gate metal layer 205 is disposed on a side of the second gate insulating layer 204 away from the substrate 100, and the second gate metal layer 205 may include a second plate of a capacitor, and the interlayer dielectric layer 206 is disposed on a side of the second gate insulating layer 204 away from the substrate 100; the first source-drain layer 207 is disposed on a side of the interlayer dielectric layer 206 away from the substrate 100, and the first source-drain layer 207 includes a source and a drain of a transistor, and the source and the drain are connected to the active layer 201.
  • the first planarization layer 208 is disposed on a side of the first source-drain layer 207 away from the substrate 100
  • the second source-drain layer 209 is disposed on a side of the first planarization layer 208 away from the substrate 100
  • the second planarization layer 210 is disposed on a side of the second source-drain layer 209 away from the substrate 100.
  • the driving circuit layer 200 also includes a light shielding layer 211 and a passivation layer 212 .
  • the light shielding layer 211 is disposed between the base substrate 100 and the active layer 201 .
  • the passivation layer 212 ( FIG. 6 ) is disposed between the first source and drain layer 207 and the first planarization layer 208 .
  • the light-emitting layer 300 is disposed between the driving circuit layer 200 and the touch layer 500, and the light-emitting layer 300 includes a first organic layer 301.
  • the first organic layer 301 includes a pixel definition area 011, and the pixel definition area 011 is at least partially located in the display area 110.
  • the pixel definition area 011 includes a plurality of pixel openings 012, and the range defined by each pixel opening 012 is the range of a light-emitting device.
  • the shape of the pixel opening 012, that is, the shape of the outline of the positive projection of the pixel opening 012 on the base substrate 100 can be a polygon, a smooth closed curve or other shapes, which are not specifically limited here.
  • the first organic layer 301 further includes an isolation column 013 , which is disposed on a side of the pixel definition area 011 away from the base substrate 100 .
  • There are multiple isolation columns 013 and the orthographic projection of the isolation column 013 on the base substrate 100 is within the orthographic projection of the pixel definition area 011 on the base substrate 100 .
  • the first organic layer 301 further includes a first region 014 and a second region 015, wherein the first region 014 is located in the first peripheral region 121, and the second region 015 is located in the second peripheral region 122. Further, the second region 015 of the first organic layer 301 is at least partially located in the binding region 1221, and the display panel further includes a driver chip 600.
  • a groove 015a is provided on the surface of the second region 015 of the first organic layer 301 away from the base substrate 100, and the driver chip 600 is located in the groove 015a.
  • the second region 015 of the first organic layer 301 is provided with the groove 015a, which helps to reduce the bending stress during binding and improve the binding yield.
  • the light-emitting device includes a first electrode layer 302, a light-emitting functional layer 303, and a second electrode layer 304, which are sequentially arranged in a direction away from the substrate 100.
  • the first electrode layer 302 can be used as an anode layer of the light-emitting device.
  • the light-emitting functional layer 303 covers the first electrode layer 302, and the second electrode layer 304 covers the light-emitting functional layer 303.
  • the first electrode layer 302 can be connected to the source/drain of the transistor.
  • the second electrode layer 304 can cover the light-emitting functional layer 303, which can be used as a cathode layer of the light-emitting device.
  • the second electrode layer 304 can be a single-layer or multi-layer structure, and its material can include one or more of conductive metals, metal oxides, and alloys.
  • the light-emitting functional layer 303 is at least partially disposed within the pixel opening 012 and may include a hole injection layer, a hole transport layer, a light-emitting material layer, an electron transport layer and an electron injection layer stacked in sequence in a direction away from the base substrate 100.
  • the light-emitting material layer is an organic light-emitting material layer, and the specific light-emitting principle will not be described in detail herein.
  • the light-emitting device may also be a QLED light-emitting device. Different from an OLED light-emitting device, the light-emitting material layer is a quantum dot light-emitting material layer.
  • the first organic layer 301 further includes a first region 014 and a second region 015, wherein the first region 014 is located in the first peripheral region 121, and the second region 015 is located in the second peripheral region 122.
  • the first region 014 of the first organic layer 301 may surround the periphery of the pixel definition region 011.
  • the barrier dam 700 is disposed on one side of the base substrate 100, and the barrier dam is used to block water and oxygen to prevent external water and oxygen from corroding light-emitting devices, transistors and other devices located in the display region 110.
  • the barrier dam 700 is located in the first peripheral region 121, and the barrier dam 700 includes the first region 014 of the first organic layer 301.
  • the number of the barrier dams 700 may be multiple.
  • the number of the barrier dams 700 is two, one of which is the first barrier dam 701 and the other is the second barrier dam 702.
  • the second barrier dam 702 surrounds the periphery of the first barrier dam 701, that is, surrounds the side of the first barrier dam 701 away from the display area 110.
  • the barrier dam 700 may also include other film layers, such as a partial region of the first planarization layer 208 or the second planarization layer 210. The film layers included in different barrier dams 700 may be different.
  • the first barrier dam 701 includes a partial region of the first planarization layer 208 in addition to the first region 014 of the first organic layer 301
  • the second barrier dam 702 includes a partial region of the first planarization layer 208 and the second planarization layer 210 in addition to the second region 015 of the first organic layer 301.
  • the display panel further includes an encapsulation layer 400, which is disposed between the first organic layer 301 and the touch layer 500, specifically between the light-emitting layer 300 and the touch layer 500.
  • the encapsulation layer 400 can be used to protect the light-emitting layer 300 and prevent external water and oxygen from corroding the light-emitting device.
  • encapsulation can be achieved by thin-film encapsulation (TFE).
  • the encapsulation layer 400 may include a first inorganic layer 401, a second organic layer 402, and a second inorganic layer 403 stacked in a direction away from the base substrate 100, wherein the first inorganic layer 401 covers the surface of the light-emitting layer 300 away from the base substrate 100, the second organic layer 402 may be arranged on the surface of the first inorganic layer 401 away from the base substrate 100, and the boundary of the second organic layer 402 is limited to the inner side of the boundary of the first inorganic layer 401, and the second inorganic layer 403 covers the second organic layer 402 and the first inorganic layer 401 not covered by the second organic layer 402, and the second inorganic layer 403 can be used to block the intrusion of water and oxygen, and the second organic layer 402 having flexibility can be used to achieve flattening.
  • the orthographic projection of the second organic layer 402 on the base substrate 100 is located on the side of the orthographic projection of the barrier dam 700 on the base substrate 100 away from the second peripheral area 122.
  • the barrier dam 700 may also include partial regions of the first inorganic layer 401 and the second inorganic layer 403 , and the partial regions of the first inorganic layer 401 and the second inorganic layer 403 included therein may wrap other film layers of the barrier dam 700 .
  • the touch layer 500 is arranged on a side of the first organic layer 301 away from the base substrate 100, specifically, on a side of the encapsulation layer 400 away from the base substrate 100.
  • the touch layer 500 includes a first conductive layer 501, an insulating layer 502, and a second conductive layer 503 stacked in a direction away from the base substrate 100.
  • the touch layer 500 also includes a plurality of driving electrodes 506 and a plurality of receiving electrodes 508, which are arranged in an array at intervals; the plurality of driving electrodes 506 are arranged along the third direction YY and connected to each other to form a driving electrode group 507, and the plurality of receiving electrodes 508 are arranged along the first direction XX and connected to each other to form a receiving electrode group 509.
  • the driving electrode group 507 and the receiving electrode group 509 are insulated from each other.
  • the orthographic projections of the driving electrode 506 and the receiving electrode 508 on the base substrate 100 are roughly rhombus-shaped.
  • the driving electrode 506 and the receiving electrode 508 are arranged in the same layer, that is, the driving electrode 506 and the receiving electrode 508 are formed by the same material and the same process.
  • the driving electrodes 506 and the receiving electrodes 508 are grid-shaped electrode blocks.
  • a plurality of driving electrodes 506 and a plurality of receiving electrodes 508 are alternately arranged to form a checkerboard structure.
  • Two adjacent driving electrodes 506 in the driving electrode group 507 may be connected via a first bridge wire 510
  • two adjacent receiving electrodes 508 in the receiving electrode group 509 may be connected via a second bridge wire 511.
  • the first bridge wire 510 and the second bridge wire 511 are respectively distributed in different conductive layers, and the orthographic projections of the first bridge wire 510 and the second bridge wire 511 on the base substrate 100 at least partially overlap.
  • the driving electrodes 506, the receiving electrodes 508 and the first bridge wires 510 are distributed in the first conductive layer 501, and the second bridge wires 511 are distributed in the second conductive layer 503.
  • the first bridge wires 510 are distributed in the first conductive layer 501, and the driving electrodes 506, the receiving electrodes 508 and the second bridge wires 511 are distributed in the first conductive layer 501.
  • the mutual capacitance of the insulated and cross-arranged driving electrode group 507 and the receiving electrode group 509 at the touch point changes.
  • the driving circuit scans the driving electrode group 507 and the receiving electrode group 509 one by one, and reads the signals of the detection electrode groups in each driving electrode group 507 and the receiving electrode group 509 while scanning each driving electrode group 507. After one round of scanning, the coordinates of the touch point can be determined, and the content response corresponding to the touch operation is performed based on the coordinates of the touch point.
  • the touch layer 500 also includes a driving touch line 512 and a receiving touch line 513, wherein the driving touch line 512 can be connected to the driving electrode group 507, and the receiving touch line 513 can be connected to the receiving electrode group 509. Further, the touch layer 500 also includes a first touch line 514 and a second touch line 515, wherein the first touch line 514 is a receiving touch line 513, that is, connected to the receiving electrode 508, and is used to transmit the mutual capacitance change signal between the driving electrode 506 and the receiving electrode 508. The second touch line 515 is used to load a shielding signal. The second touch line 515 is located on the side of the first touch line 514 away from the display area 110. Further, the touch layer 500 also includes a ground line 516, and the ground line 516 is located on the side of the second touch line 515 away from the display area 110.
  • the first touch line 514 is the outermost line among all the receiving touch lines 513, that is, the receiving touch line 513 farthest from the display area 110 in the direction parallel to the base substrate 100.
  • the second touch line 515 is located between the first touch line 514 and the ground line 516, and is used to load a shielding signal to prevent signal interference between the first touch line 514 and the ground line 516. Specifically, the second touch line 515 can load a touch drive signal.
  • the first touch trace 514 and the second touch trace 515 both include a first segment 514a or 515a extending along the first direction X, and the first segment 514a or 515a of the first touch trace 514 and the second touch trace 515 are both located in the second peripheral area 122.
  • the distance between the first segment 514a of the first touch trace 514 and the first segment 515a of the second touch trace 515 in a direction parallel to the base substrate 100 is not greater than 20 ⁇ m.
  • the first segments 514a or 515a of the first touch trace 514 and the second touch trace 515 both include a first subsegment 14a1 or 15a1 and a second subsegment 14a2 or 15a2 connected to each other, and the first subsegment 14a1 and the second subsegment 14a2 of the first touch trace 514 are at different distances from the substrate 100, and the first subsegment 15a1 and the second subsegment 15a2 of the second touch trace 515 are at different distances from the substrate 100.
  • first subsegment 14a1 and the second subsegment 14a2 of the first touch trace 514 have a height difference relative to the substrate 100
  • first subsegment 15a1 and the second subsegment 15a2 of the second touch trace 515 have a height difference relative to the substrate 100.
  • the orthographic projections of the first sub-segments 14a1 or 15a1 of the first touch wiring 514 and the second touch wiring 515 on the base substrate 100 do not overlap with the orthographic projection of the first organic layer 301 on the base substrate 100; the orthographic projections of the second sub-segments 14a2 or 15a2 of the first touch wiring 514 and the second touch wiring 515 on the base substrate 100 are both located within the orthographic projection of the second area 015 of the first organic layer 301 on the base substrate 100.
  • the first organic layer 301 further includes a bump unit 016, and the orthographic projection of the bump unit 016 on the base substrate 100 is at least partially located between the orthographic projections of the first sub-segment 14a1 or 15a1 of the first touch wiring 514 and the first sub-segment 14a1 or 15a1 of the second touch wiring 515 on the base substrate 100.
  • the bump unit 016 may be located at the junction of the first sub-segment 14a1 or 15a1 and the second sub-segment 14a2 or 15a2. In this way, the first sub-segments 14a1 or 15a1 of the first touch wiring 514 and the second touch wiring 515 located at the height difference position may be spaced apart, thereby reducing the risk of short circuit between the two.
  • the bump unit 016 There are many ways to arrange the bump unit 016 . The following will illustrate the arrangement of the bump unit 016 with reference to different embodiments.
  • FIG. 12 is a cross-sectional view of the bump unit 016 in FIG. 11 in the third direction Y.
  • the bump unit 016 includes a first bump 161; the second region 015 of the first organic layer 301 has a first edge 015b extending along the second direction X0, and the second direction X0 is not parallel to the first direction X.
  • the angle between the second direction X0 and the first direction X can be greater than 0° and less than or equal to 90°.
  • At least part of the first edge 015b of the second region 015 of the first organic layer 301 protrudes along the first direction X toward the direction close to the first sub-segment 14a1 or 15a1 to form at least one first bump 161.
  • the number of the first bumps 161 can be one or more. When the number of the first bumps 161 is multiple, the multiple first bumps 161 can be arranged in sequence along the third direction Y, and the third direction Y is substantially perpendicular to the first direction X.
  • the orthographic projection of the first bump 161 on the base substrate 100 may be in various shapes, such as a rectangle, an ellipse, or a polygon, etc., and the specific shape is not limited. Preferably, the orthographic projection of the first bump 161 on the base substrate 100 is approximately a rectangle. Further, the cross section of the first bump 161 in the direction perpendicular to the base substrate 100 may be a rectangle, a regular trapezoid, an inverted trapezoid, or an irregular shape with an arc or a sharp corner at the top, etc.
  • the size of the first bump 161 may also be various.
  • the size of the first bump 161 in the first direction X is not less than 35 ⁇ m. That is, the length L0 of the first edge 015b of the second region 015 of the first organic layer 301 protruding along the first direction X toward the first sub-segment 14a1 or 15a1 is not less than 35 ⁇ m.
  • the shortest distance h between the edge of the first bump 161 and the first touch line 514 or the second touch line 515 is not less than 4 ⁇ m. As shown in FIG.
  • the bump unit 016 when the bump unit 016 includes only one first bump 161, the distance between the first bump 161 and the first touch line 514 is not less than 4 ⁇ m, and the distance between the first bump 161 and the second touch line 515 is not less than 4 ⁇ m.
  • the bump unit 016 when the bump unit 016 includes a plurality of first bumps 161, the distance between the first bump 161 closest to the first touch wiring 514 and the first touch wiring 514 is not less than 4 ⁇ m, and the distance between the first bump 161 closest to the second touch wiring 515 and the second touch wiring 515 is not less than 4 ⁇ m.
  • the size restriction on the first bump 161 is to ensure that the path of the short circuit phenomenon between the first touch wiring 514 and the second touch wiring 515 is extended during etching, so as to further reduce the risk of short circuit at the corresponding position.
  • FIG. 14 is a cross-sectional view of the bump unit 016 in FIG. 15 in the third direction Y.
  • the bump unit 016 further includes at least one second bump 162, and the second bump 162 is disposed on the side of the first bump 161 or the second region 015 of the first organic layer 301 away from the substrate 100, and the orthographic projection of at least part of the second bump 162 on the substrate 100 is located within the orthographic projection of the first bump 161 on the substrate 100.
  • all of the plurality of second bumps 162 may be disposed on the side of the first bump 161 away from the substrate 100, and the orthographic projections of the second bumps 162 on the substrate 100 are located within the orthographic projection of the first bump 161 on the substrate 100. In the direction perpendicular to the substrate 100, one or more second bumps 162 may be disposed corresponding to one first bump 161.
  • some of the second bumps 162 may be arranged on the side of the first bump 161 away from the base substrate 100, and the orthographic projection of the part of the second bumps 162 on the base substrate 100 is located within the orthographic projection of the first bump 161 on the base substrate 100, and the remaining second bumps 162 may be arranged on the side of the second area 015 of the first organic layer 301 away from the base substrate 100, and the orthographic projection of the part of the second bumps 162 on the base substrate 100 is located within the orthographic projection of the second area 015 of the first organic layer 301 on the base substrate 100.
  • the orthographic projection of the second bump 162 on the base substrate 100 may be a circle, an ellipse or a polygon, etc., and the cross section of the second bump 162 in the direction perpendicular to the base substrate 100 may be a rectangle, a regular trapezoid, an inverted trapezoid or other polygons, etc. Further, as shown in FIG14 , in the direction perpendicular to the base substrate 100, the sum of the heights of the first bump 161 and the second bump 162 is 1.5 ⁇ m-2.5 ⁇ m.
  • the bump unit 016 includes a first bump unit 163, the first bump unit 163 includes a plurality of third bumps 164, and the plurality of third bumps 164 are arrayed between the first segment 514a of the first touch wiring 514 and the first segment 515a of the second touch wiring 515; the orthographic projections of the plurality of third bumps 164 on the base substrate 100 do not overlap with the second region 015 of the first organic layer 301, and the orthographic projections of the plurality of third bumps 164 on the base substrate 100 are located between the first sub-segment 14a1 of the first touch wiring 514 and the first sub-segment 15a1 of the second touch wiring 515.
  • the orthographic projection of the third bump 164 on the substrate 100 may be a circle, an ellipse or a polygon, etc., and the cross-section of the third bump 164 in the direction perpendicular to the substrate 100 may be a rectangle, a regular trapezoid, an inverted trapezoid or other polygons, etc. Further, as shown in FIG18 , in the direction perpendicular to the substrate 100, the height of the third bump 164 is 1.5 ⁇ m-2.5 ⁇ m.
  • the bump unit 016 also includes a second bump unit 165, which is located on one side of the first bump unit 163 in the first direction X.
  • the second bump unit 165 includes a plurality of fourth bumps 166; the plurality of fourth bumps 166 are arranged in an array between the first section 514a of the first touch wiring 514 and the first section 515a of the second touch wiring 515; the orthographic projections of the plurality of fourth bumps 166 on the base substrate 100 are located within the orthographic projections of the second region 015 of the first organic layer 301 on the base substrate 100.
  • the orthographic projection of the fourth bump 166 on the base substrate 100 may be a circle, an ellipse, a polygon, etc., and the cross section of the fourth bump 166 in the direction perpendicular to the base substrate 100 may be a rectangle, a regular trapezoid, an inverted trapezoid, or other polygons, etc. Further, in the direction perpendicular to the base substrate 100, the sum of the heights of the fourth bump 166 and the second region 015 of the first organic layer 301 is 1.5 ⁇ m-2.5 ⁇ m.
  • the dimension L1 of the first bump unit 163 in the first direction X is not less than 35 ⁇ m, and the dimension L2 of the bump unit 016 in the first direction X is not greater than 200 ⁇ m.
  • This numerical setting can not only ensure the extension effect of the path of the short circuit phenomenon of the first touch wiring 514 and the second touch wiring 515 during etching, and reduce the risk of short circuit at the corresponding position, but also does not affect the preparation of other film layers, ensuring the normal production of other film layers.
  • the distance between the third bump 164 in the first bump unit 163 that is closest to the second region 015 of the first organic layer 301 and the second region 015 of the first organic layer 301 is not greater than 5 ⁇ m, and the distance between the outer edge of the third bump 164 in the first bump unit 163 that is farthest from the second region 015 of the first organic layer 301 and the second region 015 of the first organic layer 301 is not less than 35 ⁇ m, wherein the outer edge of the third bump 164 refers to the edge of the third bump 164 away from the second region 015 of the first organic layer 301.
  • each structure included in the first organic layer 301 can be formed by a single photolithography process.
  • a first organic material layer can be formed on the side of the first electrode layer 302 away from the base substrate 100, and then the first organic material layer is patterned using a semi-transparent film mask to form the first organic layer 301.
  • the first touch routing 514 and the second touch routing 515 can be double-layer routing or single-layer routing, and different routing segments of the first touch routing 514 and the second touch routing 515 can have different single-layer and double-layer configurations.
  • the first touch routing 514 is distributed in two conductive layers, the first conductive layer 501 and the second conductive layer 503 , and the orthographic projections of the routings distributed in different conductive layers in the first touch routing 514 on the base substrate 100 at least partially overlap, and the routings distributed in different conductive layers are connected through at least one first via 514 c in the insulating layer 502 .
  • the second touch routing 515 is distributed in two conductive layers, the first conductive layer 501 and the second conductive layer 503 , and the orthographic projections of the routings distributed in different conductive layers in the second touch routing 515 on the base substrate 100 at least partially overlap, and the routings distributed in different conductive layers are connected through at least one second via 515 c in the insulating layer 502 . That is, the first touch routing 514 and the second touch routing 515 are double-layer routings. Among them, FIG. 21 is a schematic diagram of routing via connection distributed in different conductive layers.
  • first touch trace 514 and the second touch trace 515 both include a second segment 514b or 515b extending along a third direction Y and connected to the first segment 514a or 515a, and the third direction Y is not parallel to the first direction X.
  • the orthographic projection of at least one first via 514c on the substrate 100 is located within the orthographic projection of the second segment 514b of the first touch trace 514 on the substrate 100.
  • the orthographic projection of at least one second via 515c on the substrate 100 is located within the orthographic projection of the second segment 515b of the second touch trace 515 on the substrate 100.
  • the line width of the second segment 514b of the first touch trace 514 is greater than the line width of the first segment 514a of the first touch trace 514.
  • the line width of the second segment 515b of the second touch trace 515 is greater than the line width of the first segment 515a of the second touch trace 515.
  • the angle between the third direction Y and the first direction X can be 45°-90°.
  • the angle between the third direction Y and the first direction X is 45°.
  • the third direction Y and the first direction X are substantially perpendicular.
  • FIG. 20 is an enlarged view of part E in FIG. 19 .
  • the first segment 514a of the first touch trace 514 is distributed in the first conductive layer 501 or the second conductive layer 503; the first segment 515a of the second touch trace 515 is distributed in the first conductive layer 501 or the second conductive layer 503; and the first segment 514a of the first touch trace 514 and the first segment 515a of the second touch trace 515 are arranged in different layers.
  • the first segment 514a of the first touch trace 514 is distributed in the first conductive layer 501
  • the first segment 515a of the second touch trace 515 is distributed in the second conductive layer 503
  • the first segment 514a of the first touch trace 514 is distributed in the second conductive layer 503
  • the first segment 515a of the second touch trace 515 is distributed in the first conductive layer 501.
  • the distance between them in a direction parallel to the base substrate 100 can be shortened, which helps to achieve a narrow frame design of the display panel.
  • the first touch trace 514 and the second touch trace 515 may also include a second segment 514b or 515b extending along a third direction Y and connected to the first segment 514a or 515a, and the third direction Y is not parallel to the first direction X.
  • the second segment 514b of the first touch trace 514 and the second segment 515b of the second touch trace 515 may be double-layer traces, that is, the second segment 514b of the first touch trace 514 is distributed in two conductive layers, the first conductive layer 501 and the second conductive layer 503, and the orthographic projections of the traces of the first touch trace 514 distributed in different conductive layers on the base substrate 100 at least partially overlap, and the traces distributed in different conductive layers are connected through at least one first via 514c in the insulating layer 502.
  • the second section 515b of the second touch trace 515 is distributed in two conductive layers, the first conductive layer 501 and the second conductive layer 503.
  • the orthographic projections of the traces distributed in different conductive layers in the second touch trace 515 on the base substrate 100 at least partially overlap, and the traces distributed in different conductive layers are connected through at least one second via 515c in the insulating layer 502.
  • the orthographic projection of at least one first via 514c on the base substrate 100 is located within the orthographic projection of the second section 514b of the first touch trace 514 on the base substrate 100.
  • the orthographic projection of at least one second via 515c on the base substrate 100 is located within the orthographic projection of the second section 515b of the second touch trace 515 on the base substrate 100.
  • the line width of the second section 514b of the first touch trace 514 is greater than the line width of the first section 514a of the first touch trace 514.
  • the line width of the second section 515b of the second touch trace 515 is greater than the line width of the first section 515a of the second touch trace 515.
  • the single-layer trace design of the first section 514a or 515a of the first touch trace 514 and the second touch trace 515 helps to achieve a narrower frame design of the display panel
  • the double-layer trace design of the second section 514b or 515b of the first touch trace 514 and the second touch trace 515 helps to reduce resistance and improve the stability and uniformity of the transmission signal.
  • the grounding line 516 included in the touch layer 500 may be a single-layer wiring or a double-layer wiring, and the specific details are not limited.
  • the grounding line 516 includes a first main segment 516a and a second main segment 516b extending along the first direction X, and a bending segment 516c connected between the first main segment 516a and the second main segment 516b.
  • the orthographic projection of the first main segment 516a on the base substrate 100 does not overlap with the orthographic projection of the second region 015 of the first organic layer 301 on the base substrate 100, and the orthographic projection of the second main segment 516b on the base substrate 100 is located within the orthographic projection of the second region 015 of the first organic layer 301 on the base substrate 100.
  • the maximum distance between the bending segment 516c of the grounding line 516 and the first segment 515a of the second touch line is greater than the maximum distance between the first main segment 516a/the second main segment 516b of the grounding line 516 and the first segment 515a of the second touch line.
  • the maximum distance between the bent section 516c of the ground wire 516 and the first section 515a of the second touch wire is greater than the distance between the first main section 516a and the first section 515a of the second touch wire, and greater than the distance between the second main section 516b and the first section 515a of the second touch wire. In this way, the distance between the ground wire 516 and the second touch wire 515 at this position is increased, which helps to reduce the risk of short circuit between the ground wire 516 and the second touch wire 515.
  • the orthographic projection of the bending section 516c on the substrate 100 does not overlap with the orthographic projection of the second region 015 of the first organic layer 301 on the substrate 100, and is partially located within the orthographic projection of the second region 015 of the first organic layer 301 on the substrate 100.
  • the orthographic projection of the bending section 516c on the substrate 100 intersects with the orthographic projection of the edge of the second region 015 of the first organic layer 301 on the substrate 100 to form a first angle ⁇ , 0° ⁇ 90°.
  • the edge of the second region 015 of the first organic layer 301 does not cross the bending section 516c vertically, so that the etching metal residue path can be extended, further reducing the risk of short circuit between the second touch wiring 515 and the grounding wire 516.
  • the bending segment 516c includes a first sub-bending segment 16c1, a second sub-bending segment 16c2 and a third sub-bending segment 16c3 connected in sequence, the second sub-bending segment 16c1 extends along the first direction X, the first sub-bending segment 16c1 connects the first main segment 516a and the second sub-bending segment 16c2, and the third sub-bending segment 16c3 connects the second main segment 516b and the second sub-bending segment 16c2; the orthographic projection of the first sub-bending segment 16c1 on the substrate substrate 100 does not overlap with the orthographic projection of the second area 015 of the first organic layer 301 on the substrate substrate 100, and the orthographic projection of the third sub-bending segment 16c3 on the substrate substrate 100 is located within the orthographic projection of the second area 015 of the first organic layer 301 on the substrate substrate 100. Furthermore, the orthographic projection of the second sub-bending segment 16c2 on the base substrate 100 intersects with the orthographic projection of the edge of the second region 015 of the first
  • the first organic layer 301 may not include the bump unit 016.
  • the first segment 514a of the first touch wiring 514 is distributed in the first conductive layer 501 or the second conductive layer 503
  • the first segment 515a of the second touch wiring 515 is distributed in the first conductive layer 501 or the second conductive layer 503
  • the first segment 514a of the first touch wiring 514 and the first segment 515a of the second touch wiring 515 are arranged in different layers.
  • the first touch routing 514 and the second touch routing 515 both further include a second segment 514b or 515b extending along a third direction Y and connected to the first segment 514a or 515a, and the third direction Y is not parallel to the first direction X;
  • the second segment 514b of the first touch routing 514 is distributed in two conductive layers, the first conductive layer 501 and the second conductive layer 503, and the orthographic projections of the routings distributed in different conductive layers in the first touch routing 514 on the base substrate 100 at least partially overlap, and the routings distributed in different conductive layers are connected through at least one first via 514c in the insulating layer 502;
  • the second segment 515b of the second touch routing 515 is distributed in two conductive layers, the first conductive layer 501 and the second conductive layer 503, and the orthographic projections of the routings distributed in different conductive layers in the first touch routing 514 on the base substrate 100 at least partially overlap, and the routings distributed in different conductive layers are connected through at least one
  • the first organic layer 301 may also include a bump unit 016 .
  • the configuration of the bump unit 016 may refer to any of the above embodiments and will not be described in detail here.
  • the present disclosure further provides a display panel, including a substrate 100, a first organic layer 301, a barrier dam 700, and a touch layer 500.
  • the substrate 100 includes a display area 110 and a peripheral area 120 located outside the display area 110, and the peripheral area 120 includes a first peripheral area 121 and a second peripheral area 122 located on a side of the first peripheral area 121 away from the display area 110.
  • the first organic layer 301 is disposed on one side of the substrate 100, and the first organic layer 301 includes a second area 015, and the second area 015 is located in the second peripheral area 122.
  • the barrier dam 700 is disposed on one side of the substrate 100, and the barrier dam 700 is located in the first peripheral area 121.
  • the touch layer 500 is disposed on a side of the first organic layer 301 away from the base substrate 100 .
  • the touch layer 500 includes a second touch trace 515 .
  • the second touch trace 515 includes a first segment 515 a extending along the first direction X.
  • the first segment 515 a of the second touch trace 515 is located in the second peripheral area 122 .
  • the touch layer 500 further includes a signal line 516, which is located on a side of the second touch line 515 away from the display area 110.
  • the signal line 516 includes a first main segment 516a and a second main segment 516b extending along the first direction X, and a bending segment 516c connected between the first main segment 516a and the second main segment 516b.
  • the orthographic projection of the first main segment 516a on the base substrate 100 does not overlap with the orthographic projection of the second region 015 of the first organic layer 301 on the base substrate 100, and the orthographic projection of the second main segment 516b on the base substrate 100 is located within the orthographic projection of the second region 015 of the first organic layer 301 on the base substrate 100.
  • the maximum distance between the bending segment 516c of the signal line 516 and the first segment 515a of the second touch line is greater than the maximum distance between the first main segment 516a, the second main segment 516b of the signal line 516 and the first segment 515a of the second touch line.
  • the signal line 516 may be used to carry a ground signal, and may also be used to carry other signals.
  • the bending segment 516c includes a first sub-bending segment 16c1, a second sub-bending segment 16c2 and a third sub-bending segment 16c3 connected in sequence, the second sub-bending segment 16c2 extends along the first direction, the first sub-bending segment 16c1 connects the first main segment 516a and the second sub-bending segment 16c2, and the third sub-bending segment 16c3 connects the second main segment 516b and the second sub-bending segment 16c2; the orthographic projection of the first sub-bending segment 16c1 on the substrate substrate 100 does not overlap with the orthographic projection of the second area 015 of the first organic layer 301 on the substrate substrate 100, and the orthographic projection of the third sub-bending segment 16c3 on the substrate substrate 100 is located within the orthographic projection of the second area 015 of the first organic layer 301 on the substrate substrate 100.
  • the orthographic projection of the bending segment 516c on the base substrate 100 intersects with the orthographic projection of the edge of the second region 015 of the first organic layer 301 on the base substrate 100 to form a first angle ⁇ , 0° ⁇ 90°. Further, the orthographic projection of the second sub-bending segment 16c2 on the base substrate 100 intersects with the orthographic projection of the edge of the second region 015 of the first organic layer 301 on the base substrate 100 to form a first angle.
  • the touch layer 500 further includes a first touch wiring 514
  • the first organic layer 301 further includes a bump unit 016, and the configuration thereof may refer to any of the above embodiments, which will not be described in detail herein.
  • the present disclosure also provides a method for manufacturing a display panel, comprising:
  • Step S100 providing a base substrate 100, comprising a display area 110 and a peripheral area 120 located outside the display area 110, wherein the peripheral area 120 comprises a first peripheral area 121 and a second peripheral area 122 located on a side of the first peripheral area 121 away from the display area 110;
  • Step S200 forming a first organic layer 301 and a barrier dam 700 on one side of the base substrate 100, wherein the first organic layer 301 includes a first region 014 and a second region 015, wherein the first region 014 is located in the first peripheral region 121, and the second region 015 is located in the second peripheral region 122; the barrier dam 700 is located in the first peripheral region 121, and includes the first region 014 of the first organic layer 301;
  • Step S300 forming a touch layer 500 on a side of the first organic layer 301 away from the base substrate 100, the touch layer 500 includes a first touch wiring 514 and a second touch wiring 515, the first touch wiring 514 and the second touch wiring 515 both include a first segment 514a or 515a extending along the first direction X, and the first segments 514a or 515a of the first touch wiring 514 and the second touch wiring 515 are both located in the second peripheral area 122;
  • the first segments 514a or 515a of the first touch trace 514 and the second touch trace 515 both include a first sub-segment 14a1 or 15a1 and a second sub-segment 14a2 or 15a2 that are connected to each other.
  • the distances between the first sub-segment 14a1 or 15a1 and the second sub-segment 14a2 or 15a2 of the first touch trace 514 and the substrate 100 are different.
  • the distances between the first sub-segment 14a1 or 15a1 and the second sub-segment 14a2 or 15a2 of the second touch trace 515 and the substrate 100 are different.
  • the orthographic projections of the first sub-segments 14a1 or 15a1 of the first touch wiring 514 and the second touch wiring 515 on the base substrate 100 do not overlap with the orthographic projection of the first organic layer 301 on the base substrate 100;
  • the orthographic projections of the second sub-segments 14a2 or 15a2 of the first touch wiring 514 and the second touch wiring 515 on the base substrate 100 are both located within the orthographic projection of the second region 015 of the first organic layer 301 on the base substrate 100;
  • the first organic layer 301 further includes a bump unit 016 , the orthographic projection of which on the base substrate 100 is at least partially located between the orthographic projections of the first subsegment 14a1 or 15a1 of the first touch trace 514 and the first subsegment 14a1 or 15a1 of the second touch trace 515 on the base substrate 100 .
  • the present disclosure also provides a display device, including a display panel, which can be a display panel of any of the above embodiments, and its specific structure and beneficial effects can refer to the embodiments of the display panel above, which will not be repeated here.
  • the display device of the present disclosure can be an electronic device such as a mobile phone, a tablet computer, a television, etc., which will not be listed one by one here.

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Abstract

本公开提供了一种显示面板及显示装置，属于显示技术领域。该显示面板包括第一有机层、第一触控走线和第二触控走线，第一触控走线和第二触控走线均包括沿第一方向延伸的第一段。第一触控走线和第二触控走线的第一段均包括相互连接的第一子段和第二子段，其中，第一子段与第一有机层在衬底基板上的正投影不重叠，第二子段在衬底基板上的正投影位于第一有机层的第二区域在衬底基板上的正投影之内。第一有机层还包括凸块单元，凸块单元在衬底基板上的正投影至少部分位于第一触控走线的第一子段和第二触控走线的第一子段之间，在一定程度上有助于降低该两条触控走线在刻蚀时发生短路的风险。

Description

显示面板及显示装置
交叉引用
本公开要求于2023年04月28日提交的申请号为202310487651.7名称为“显示面板及显示装置”的中国专利申请的优先权，该中国专利申请的全部内容通过引用全部并入本文。
技术领域
本公开涉及显示技术领域，尤其涉及一种显示面板及显示装置。
 背景技术
在显示面板超窄边框的设计中，位于显示面板下边框的部分触控走线会设置在显示面板阻隔坝(用于阻隔水氧)的外围，此部分触控走线不同部位与显示面板的衬底基板之间的距离不同，具有高度差，因此，在制作过程中容易发生短路(short)。
所述背景技术部分公开的上述信息仅用于加强对本公开的背景的理解，因此它可以包括不构成对本领域普通技术人员已知的现有技术的信息。
发明内容
本公开的目的在于提供一种显示面板及显示装置，有助于提升显示面板的质量。
为实现上述发明目的，本公开采用如下技术方案：
根据本公开的第一个方面，提供一种显示面板，包括：
衬底基板，包括显示区和位于所述显示区外围的外围区，所述外围区包括第一外围区和位于所述第一外围区远离所述显示区一侧的第二外围区；
第一有机层，设于所述衬底基板的一侧，所述第一有机层包括第二区域，所述第二区域位于所述第二外围区；
阻隔坝，设于所述衬底基板的一侧，所述阻隔坝位于所述第一外围区；
触控层，设于所述第一有机层远离所述衬底基板的一侧，所述触控层包括第一触控走线和第二触控走线，所述第一触控走线和所述第二触控走线均包括沿第一方向延伸的第一段，所述第一触控走线和所述第二触控走线的第一段均位于所述第二外围区；
其中，所述第一触控走线和所述第二触控走线的第一段均包括相互连接的第一子段和第二子段，所述第一触控走线的第一子段、第二子段与所述衬底基板之间的距离不等，所述第二触控走线的第一子段、第二子段与所述衬底基板之间的距离不等；
所述第一触控走线和所述第二触控走线的第一子段在所述衬底基板上的正投影均不与所述第一有机层在所述衬底基板上的正投影重叠；
所述第一触控走线和所述第二触控走线的第二子段在所述衬底基板上的正投影均位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
所述第一有机层还包括凸块单元，所述凸块单元在所述衬底基板上的正投影至少部分位于所述第一触控走线的第一子段和所述第二触控走线的第一子段两者在所述衬底基板上的正投影之间。
在本公开的一种示例性实施例中，所述显示面板还包括：
封装层，设于所述第一有机层和所述触控层之间，所述封装层包括沿远离所述衬底基板方向层叠设置的第一无机层、第二有机层和第二无机层，所述第二有机层在所述衬底基板上正投影位于所述阻隔坝在所述衬底基板上的正投影远离所述第二外围区的一侧。
在本公开的一种示例性实施例中，所述第一触控走线的第一段和所述第二触控走线的第一段在平行于所述衬底基板方向上的距离不大于20μm。
在本公开的一种示例性实施例中，所述凸块单元包括第一凸块；
所述第一有机层的第二区域具有沿第二方向延伸的第一边缘，所述第二方向与所述第一方向不平行；
所述第一有机层的第二区域的第一边缘的至少部分沿所述第一方向朝靠近第一子段方向凸起形成至少一个所述第一凸块。
在本公开的一种示例性实施例中，所述第一凸块在所述第一方向上的尺寸不小于35μm；
在平行于所述衬底基板方向上，所述第一凸块的边缘与所述第一触控走线或所述第二触控走线的最短距离不小于4μm。
在本公开的一种示例性实施例中，所述凸块单元还包括至少一个第二凸块，所述第二凸块设于第一凸块或所述第一有机层的第二区域远离所述衬底基板的一侧，至少部分所述第二凸块在所述衬底基板上的正投影位于所述第一凸块在所述衬底基板上的正投影之内。
在本公开的一种示例性实施例中，在垂直于所述衬底基板方向上，所述第一凸块和所述第二凸块的高度之和为1.5μm-2.5μm。
在本公开的一种示例性实施例中，所述凸块单元包括第一凸块单元，所述第一凸块单元包括多个第三凸块；
所述多个第三凸块在所述衬底基板上的正投影与所述第一有机层的第二区域不重叠，且所述多个第三凸块在所述衬底基板上的正投影位于所述第一触控走线的第一子段和所述第二触控走线的第一子段之间。
在本公开的一种示例性实施例中，所述凸块单元还包括第二凸块单元，所述第二凸块单元位于所述第一凸块单元在所述第一方向上的一侧，所述第二凸块单元包括多个第四凸块；
所述多个第四凸块阵列排布于所述第一触控走线的第一段和所述第二触控走线的第一段之间；
所述多个第四凸块在所述衬底基板上的正投影位于所述第一有机层的第二区域在所述衬底基板上的正投影之内。
在本公开的一种示例性实施例中，在垂直于所述衬底基板方向上，所述第三凸块的高度为1.5μm-2.5μm。
在本公开的一种示例性实施例中，所述第一凸块单元在所述第一方向上的尺寸不小于35μm，且所述凸块单元在所述第一方向上的尺寸不大于200μm。
在本公开的一种示例性实施例中，所述第二触控走线的第一段位于所述第一触控走线的第一段远离所述显示区的一侧；
所述触控层还包括接地线，所述接地线包括沿所述第一方向延伸的第一主段和第二主段，以及连接于所述第一主段和所述第二主段之间弯折段，所述第一主段在所述衬底基板上的正投影与所述第一有机层的第二区域在所述衬底基板上的正投影不重叠，所述第二主段在所述衬底基板上的正投影位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
所述接地线的弯折段与所述第二触控线的第一段之间的最大距离，大于所述接地线的第一主段、第二主段与所述第二触控线的第一段之间的最大距离。
在本公开的一种示例性实施例中，所述弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域的边缘在所述衬底基板上的正投影相交形成第一夹角α，0°＜α＜90°。
在本公开的一种示例性实施例中，所述弯折段包括依次连接的第一子弯折段、第二子弯折段和第三子弯折段，所述第二子弯折段沿所述第一方向延伸，所述第一子弯折段连接所述第一主段和所述第二子弯折段，所述第三子弯折段连接所述第二主段和所述第二子弯折段；
所述第一子弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域在所述衬底基板上的正投影不重叠，所述第三子弯折段在所述衬底基板上的正投影位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
所述第二子弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域的边缘在所述衬底基板上的正投影相交形成所述第一夹角。
在本公开的一种示例性实施例中，所述触控层还包括多个驱动电极和多个接收电极，所述驱动电极用于接收触控驱动信号，所述第一触控走线与所述接收电极连接，用于传输所述驱动电极和所述接收电极间的互感电容变化信号；
所述第二触控走线用于加载屏蔽信号。
在本公开的一种示例性实施例中，所述触控层还包括沿远离所述衬底基板方向层叠设置的第一导电层、绝缘层和第二导电层；
所述第一触控走线的第一段分布于所述第一导电层或所述第二导电层；
所述第二触控走线的第一段分布于所述第一导电层或所述第二导电层；
且所述第一触控走线的第一段和所述第二触控走线的第一段不同层设置。
在本公开的一种示例性实施例中，所述第一触控走线和所述第二触控走线均还包括沿第三方向延伸且与第一段连接的第二段，所述第三方向与所述第一方向不平行；
所述第一触控走线的第二段分布于所述第一导电层和所述第二导电层两层导电层中，所述第一触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通过所述绝缘层中的至少一个第一过孔连接；
所述第二触控走线的第二段分布于所述第一导电层和所述第二导电层两层导电层中，所述第二触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通过所述绝缘层中的至少一个第二过孔连接；
至少一个所述第一过孔在所述衬底基板上的正投影位于所述第一触控走线的第二段在所述衬底基板上的正投影之内；
至少一个所述第二过孔在所述衬底基板上的正投影位于所述第二触控走线的第二段在所述衬底基板上的正投影之内。
在本公开的一种示例性实施例中，所述触控层包括沿远离所述衬底基板方向层叠设置的第一导电层、绝缘层和第二导电层；
所述第一触控走线分布于所述第一导电层和所述第二导电层两层导电层中，所述第一触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通过所述绝缘层中的至少一个第一过孔连接；
所述第二触控走线分布于所述第一导电层和所述第二导电层两层导电层中，所述第一触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通过所述绝缘层中的至少一个第二过孔连接。
在本公开的一种示例性实施例中，所述第一触控走线和所述第二触控走线均还包括沿第三方向延伸且与第一段连接的第二段，所述第三方向与所述第一方向不平行；
至少一个所述第一过孔在所述衬底基板上的正投影位于所述第一触控走线的第二段在所述衬底基板上的正投影之内；
至少一个所述第二过孔在所述衬底基板上的正投影位于所述第二触控走线的第二段在所述衬底基板上的正投影之内。
在本公开的一种示例性实施例中，所述第一触控走线的第二段的线宽大于所述第一触控走线第一段的线宽；
所述第二触控走线第二段的线宽大于所述第二触控走线第一段的线宽。
在本公开的一种示例性实施例中，所述显示面板还包括驱动芯片；
所述第二外围区包括绑定区，所述第一有机层的第二区域至少部分位于所述绑定区，所述第一有机层的第二区域远离所述衬底基板的表面设有凹槽，所述驱动芯片位于所述凹槽内。
本公开提供一种显示面板，包括：
衬底基板，包括显示区和位于所述显示区外围的外围区，所述外围区包括第一外围区和位于所述第一外围区远离所述显示区一侧的第二外围区；
第一有机层，设于所述衬底基板的一侧，所述第一有机层包括第二区域，所述第二区域位于所述第二外围区；
阻隔坝，设于所述衬底基板的一侧，所述阻隔坝位于所述第一外围区；
触控层，设于所述第一有机层远离所述衬底基板的一侧，所述触控层包括第一触控走线和第二触控走线，所述第一触控走线和所述第二触控走线均包括沿第一方向延伸的第一段，所述第一触控走线和所述第二触控走线的第一段均位于所述第二外围区；
其中，所述第一触控走线和所述第二触控走线的第一段均包括相互连接的第一子段和第二子段，所述第一触控走线的第一子段、第二子段与所述衬底基板之间的距离不等，所述第二触控走线的第一子段、第二子段与所述衬底基板之间的距离不等；
所述第一触控走线和所述第二触控走线的第一子段在所述衬底基板上的正投影均不与所述第一有机层在所述衬底基板上的正投影重叠；
所述第一触控走线和所述第二触控走线的第二子段在所述衬底基板上的正投影均位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
所述触控层还包括沿远离所述衬底基板方向层叠设置的第一导电层、绝缘层和第二导电层，所述第一触控走线的第一段分布于所述第一导电层或所述第二导电层，所述第二触控走线的第一段分布于所述第一导电层或所述第二导电层，且所述第一触控走线的第一段和所述第二触控走线的第一段不同层设置。
在本公开的一种示例性实施例中，所述第一触控走线和所述第二触控走线均还包括沿第三方向延伸且与第一段连接的第二段，所述第三方向与所述第一方向不平行；
所述第一触控走线的第二段分布于所述第一导电层和所述第二导电层两层导电层中，所述第一触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通过所述绝缘层中的至少一个第一过孔连接；
所述第二触控走线的第二段分布于所述第一导电层和所述第二导电层两层导电层中，所述第二触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通过所述绝缘层中的至少一个第二过孔连接；
至少一个所述第一过孔在所述衬底基板上的正投影位于所述第一触控走线的第二段在所述衬底基板上的正投影之内；
至少一个所述第二过孔在所述衬底基板上的正投影位于所述第二触控走线的第二段在所述衬底基板上的正投影之内。
本公开还提供一种显示面板，包括：
衬底基板，包括显示区和位于所述显示区外围的外围区，所述外围区包括第一外围区和位于所述第一外围区远离所述显示区一侧的第二外围区；
第一有机层，设于所述衬底基板的一侧，所述第一有机层包括第二区域，所述第二区域位于所述第二外围区；
阻隔坝，设于所述衬底基板的一侧，所述阻隔坝位于所述第一外围区；
触控层，设于所述第一有机层远离所述衬底基板的一侧，所述触控层包括第二触控走线，所述第二触控走线包括沿第一方向延伸的第一段，所述第二触控走线的第一段位于所述第二外围区；
所述触控层还包括信号线，所述信号线位于所述第二触控走线远离所述显示区的一侧；
所述信号线包括沿第一方向延伸的第一主段和第二主段，以及连接于所述第一主段和所述第二主段之间弯折段，所述第一主段在所述衬底基板上的正投影与所述第一有机层的第二区域在所述衬底基板上的正投影不重叠，所述第二主段在所述衬底基板上的正投影位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
所述信号线的弯折段与所述第二触控线的第一段之间的最大距离，大于所述信号线的第一主段、第二主段与所述第二触控线的第一段之间的最大距离。
在本公开的一种示例性实施例中，所述弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域的边缘在所述衬底基板上的正投影相交形成第一夹角α，0°＜α＜90°。
在本公开的一种示例性实施例中，所述弯折段包括依次连接的第一子弯折段、第二子弯折段和第三子弯折段，所述第二子弯折段沿所述第一方向延伸，所述第一子弯折段连接所述第一主段和所述第二子弯折段，所述第三子弯折段连接所述第二主段和所述第二子弯折段；
所述第一子弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域在所述衬底基板上的正投影不重叠，所述第三子弯折段在所述衬底基板上的正投影位于所述第一有机层的第二区域在所述衬底基板上的正投影之内。
在本公开的一种示例性实施例中，所述弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域的边缘在所述衬底基板上的正投影相交形成第一夹角α，0°＜α＜90°；
所述弯折段包括依次连接的第一子弯折段、第二子弯折段和第三子弯折段，所述第二子弯折段沿所述第一方向延伸，所述第一子弯折段连接所述第一主段和所述第二子弯折段，所述第三子弯折段连接所述第二主段和所述第二子弯折段；
所述第一子弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域在所述衬底基板上的正投影不重叠，所述第三子弯折段在所述衬底基板上的正投影位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
所述第二子弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域的边缘在所述衬底基板上的正投影相交形成所述第一夹角。
在本公开的一种示例性实施例中，所述信号线用于加载接地信号。
在本公开的一种示例性实施例中，所述第一有机层还包括第一区域，所述第一区域位于所述第一外围区，所述阻隔坝包括所述第一有机层的第一区域。
根据本公开第二个方面，提供一种显示装置，包括如上所述的显示面板。
本公开提供的显示面板，第一触控走线和第二触控走线均包括沿第一方向延伸的第一段，该段位于衬底基板的第二外围区。第一触控走线和第二触控走线的第一段均包括相互连接的第一子段和第二子段，其中，第一子段与第一有机层在衬底基板上的正投影不重叠，第二子段在衬底基板上的正投影位于第一有机层的第二区域在衬底基板上的正投影之内，即，第一子段、第二子段与衬底基板之间的距离不等，具有高度差。本公开第一有机层还包括凸块单元，凸块单元在衬底基板上的正投影至少部分位于第一触控走线的第一子段和第二触控走线的第一子段之间，即该凸块单元将第一触控走线和第二触控走线的第一子段予以隔开，在一定程度上有助于降低该两条触控走线在刻蚀时发生短路的风险，从而提升显示面板的质量。
 附图说明
通过参照附图详细描述其示例实施方式，本公开的上述和其它特征及优点将变得更加明显。
图1是本公开示例性实施例中衬底基板结构示意图；
图2是本公开示例性实施例中显示面板显示区截面示意图；
图3是本公开示例性实施例中触控层平面结构示意图；
图4是图3中A部分走线一实施例结构示意图；
图5是本公开示例性实施例中第一有机层外围区结构示意图；
图6是本公开示例性实施例中阻隔坝结构示意图；
图7是图4中B部分一实施例结构示意图；
图8是图7中凸块单元截面示意图；
图9是图7中C1部分放大示意图；
图10是图4中D部分放大示意图；
图11是图4中B部分另一实施例结构示意图；
图12是图11中凸块单元截面示意图；
图13是图4中B部分又一实施例结构示意图；
图14是图13中凸块单元截面示意图；
图15是图4中B部分又一实施例结构示意图；
图16是图4中B部分又一实施例结构示意图；
图17是图16中C2部分放大示意图；
[根据细则26改正 29.03.2024]
图18是图16中凸块单元截面示意图；
图19是图3中A部分走线另一实施例结构示意图；
图20是图19中E部分放大示意图；
图21是本公开示例性实施例中分布于不同导电层走线连接示意图。
图中主要元件附图标记说明如下：100-衬底基板；110-显示区；120-外围区；121-第一外围区；122-第二外围区；1221-绑定区；200-驱动电路层；201-有源层；202-第一栅绝缘层；203-第一栅金属层；204-第二栅绝缘层；205-第二栅金属层；206-层间介质层；207-第一源漏层；208-第一平坦化层；209-第二源漏层；210-第二平坦化层；211-遮光层；212-钝化层；300-发光层；301-第一有机层；302-第一电极层；303-发光功能层；304-第二电极层；011-像素定义区；012-像素开口；013-隔离柱；014-第一区域；015-第二区域；015a-凹槽；015b-第一边缘；016-凸块单元；161-第一凸块；162-第二凸块；163-第一凸块单元；164-第三凸块；165-第二凸块单元；166-第四凸块；400-封装层；401-第一无机层；402-第二有机层；403-第二无机层；500-触控层；501-第一导电层；502-绝缘层；503-第二导电层；504-缓冲层；505-保护层；506-驱动电极；507-驱动电极组；508-接收电极；509-接收电极组；510-第一桥接线；511-第二桥接线；512-驱动触控走线；513-接收触控走线；514-第一触控走线；514a-第一段；14a1-第一子段；14a2-第二子段；514b-第二段；514c-第一过孔；515-第二触控走线；515a-第一段；15a1-第一子段；15a2-第二子段；515b-第二段；515c-第二过孔；516-接地线；516a-第一主段；516b-第二主段；516c-弯折段；16c1-第一子弯折段；16c2-第二子弯折段；16c3-第三子弯折段；600-驱动芯片；700-阻隔坝。
 具体实施方式
现在将参考附图更全面地描述示例实施例。然而，示例实施例能够以多种形式实施，且不应被理解为限于在此阐述的范例；相反，提供这些实施例使得本公开将更加全面和完整，并将示例实施例的构思全面地传达给本领域的技术人员。所描述的特征、结构或特性可以以任何合适的方式结合在一个或更多实施例中。在下面的描述中，提供许多具体细节从而给出对本公开的实施例的充分理解。
在图中，为了清晰，可能夸大了区域和层的厚度。在图中相同的附图标记表示相同或类似的结构，因而将省略它们的详细描述。
所描述的特征、结构或特性可以以任何合适的方式结合在一个或更多实施例中。在下面的描述中，提供许多具体细节从而给出对本公开的实施例的充分理解。然而，本领域技术人员将意识到，可以实践本公开的技术方案而没有所述特定细节中的一个或更多，或者可以采用其它的方法、组元、材料等。在其它情况下，不详细示出或描述公知结构、材料或者操作以避免模糊本公开的主要技术创意。
当某结构在其它结构“上”时，有可能是指某结构一体形成于其它结构上，或指某结构“直接”设置在其它结构上，或指某结构通过另一结构“间接”设置在其它结构上。
用语“一个”、“一”、“所述”用以表示存在一个或多个要素/组成部分/等；用语“包括”和“具有”用以表示开放式的包括在内的意思并且是指除了列出的要素/组成部分/等之外还可存在另外的要素/组成部分/等。用语“第一”和“第二”等仅作为标记使用，不是对其对象的数量限制。
相关技术中，在显示面板超窄边框的设计中，位于显示面板下边框的部分触控走线会设置在显示面板阻隔坝(用于阻隔水氧)的外围，此部分触控走线不同部位与显示面板的衬底基板之间的距离不同，具有高度差，因此，在刻蚀形成该类触控走线时，容易产生刻蚀残留物(remain)现象，导致相邻两根触控走线的之间发生短路(short)。
如图1至图7、图10所示，本公开提供一种显示面板，包括衬底基板100、第一有机层301、阻隔坝700和触控层500，其中，衬底基板100包括显示区110和位于显示区110外围的外围区120，外围区120包括第一外围区121和位于第一外围区121远离显示区110一侧的第二外围区122；第一有机层301设于衬底基板100的一侧，第一有机层301包括第二区域015，还包括第一区域,014，第一区域014位于第一外围区121，第二区域015位于第二外围区122；阻隔坝700设于衬底基板100的一侧，阻隔坝700位于第一外围区121，阻隔坝700包括第一有机层301的第一区域014；触控层500设于第一有机层301远离衬底基板100的一侧，触控层500包括第一触控走线514和第二触控走线515，第一触控走线514和第二触控走线515均包括沿第一方向X延伸的第一段514a或515a，第一触控走线514和第二触控走线515的第一段514a或515a均位于第二外围区122；其中，第一触控走线514和第二触控走线515的第一段514a或515a均包括相互连接的第一子段14a1或15a1和第二子段14a2或15a2，第一触控走线514的第一子段14a1或15a1、第二子段14a2或15a2与衬底基板100之间的距离不等，第二触控走线515的第一子段14a1或15a1、第二子段14a2或15a2与衬底基板100之间的距离不等；第一触控走线514和第二触控走线515的第一子段14a1或15a1在衬底基板100上的正投影均不与第一有机层301在衬底基板100上的正投影重叠；第一触控走线514和第二触控走线515的第二子段14a2或15a2在衬底基板100上的正投影均位于第一有机层301的第二区域015在衬底基板100上的正投影之内；第一有机层301还包括凸块单元016，凸块单元016在衬底基板100上的正投影至少部分位于第一触控走线514的第一子段14a1或15a1和第二触控走线515的第一子段14a1或15a1两者在衬底基板100上的正投影之间。
本公开提供的显示面板，第一触控走线514和第二触控走线515均包括沿第一方向X延伸的第一段514a或515a，该段位于衬底基板100的第二外围区122。第一触控走线514和第二触控走线515的第一段514a或515a均包括相互连接的第一子段14a1或15a1和第二子段14a2或15a2，其中，第一子段14a1或15a1与第一有机层301在衬底基板100上的正投影不重叠，第二子段14a2或15a2在衬底基板100上的正投影位于第一有机层301的第二区域015在衬底基板100上的正投影之内，即，第一子段14a1或15a1、第二子段14a2或15a2与衬底基板100之间的距离不等，具有高度差。本公开第一有机层301还包括凸块单元016，凸块单元016在衬底基板100上的正投影至少部分位于第一触控走线514的第一子段14a1或15a1和第二触控走线515的第一子段14a1或15a1之间，即该凸块单元016将第一触控走线514和第二触控走线515的第一子段14a1或15a1予以隔开，在一定程度上有助于降低该两条触控走线在刻蚀时发生短路的风险，从而提升显示面板的质量。
下面将结合附图和具体实施例对本公开提供的显示面板的各部件进行详细说明：
如图1至图7、图10所示，图4为图3中A区域示例性部分结构示意图，图7为图4中B区域示例性放大图，本公开提供的显示面板，可以是OLED(Organic Light-Emitting Diode，有机发光二极管)显示面板、Micro LED(微发光二极管，Micro Light Emitting Diode)显示面板、Mini LED(迷你发光二极管，Mini Light Emitting Diode)显示面板、QLED(Quantum Dots Light Emitting Diode，量子点发光二极管)显示面板。该显示面板包括衬底基板100、第一有机层301、阻隔坝700和触控层500。
如图1所示，衬底基板100的材料可以为钠钙玻璃(soda-lime glass)、石英玻璃、蓝宝石玻璃等玻璃材料，或者可以为不锈钢、铝、镍等金属材料。衬底基板100也可以为柔性衬底基板，举例而言，在本公开的一种实施方式中，衬底基板100的材料可以为聚酰亚胺(polyimide，PI)。衬底基板100还可以为多层材料的复合，举例而言，在本公开的一种实施方式中，衬底基板100可以包括依次层叠设置的底膜层(Bottom Film)、压敏胶层、第一聚酰亚胺层和第二聚酰亚胺层。
衬底基板100包括显示区110和位于显示区110外围的外围区120，外围区120包括第一外围区121和位于第一外围区121远离显示区110一侧的第二外围区122。在本公开一些实施例中，第二外围区122还包括绑定区1221。
如图2所示，第一有机层301设于衬底基板100的一侧。在本公开一些实施例中，显示面板还包括驱动电路层200和发光层300，发光层300包括第一有机层301和多个发光器件。驱动电路层200设于衬底基板100和发光层300之间。
驱动电路层200包括用于驱动发光器件发光的驱动电路，驱动电路包括位于显示区110的像素电路和位于外围区120的外围电路，像素电路的数量为多个，多个像素电路用于一一对应地驱动发光器件发光，其可以是7T1C、7T2C、6T1C或6T2C等像素电路，只要能驱动发光器件发光即可，在此不对其结构做特殊限定。像素电路的数量与发光器件的数量相同，且一一对应地与各发光器件连接，以便分别控制各个发光器件发光。其中，nTmC表示一个像素电路包括n个晶体管(用字母“T”表示)和m个电容(用字母“C”表示)。
外围电路位于外围区120，且外围电路与像素电路连接，用于向像素电路输入驱动信号，以便控制发光器件发光。外围电路可包括栅极驱动电路和发光控制电路，当然，还可包括其它电路，在此不对外围电路的具体结构做特殊限定。
以驱动电路中的晶体管为顶栅型薄膜晶体管为例，驱动电路层200包括有源层201、第一栅绝缘层202、第一栅金属层203、第二栅绝缘层204、第二栅金属层205、层间介质层206、第一源漏层207、第一平坦化层208、第二源漏层209和第二平坦化层210。
有源层201设于衬底基板100的一侧；第一栅绝缘层202设于有源层201远离衬底基板100的一侧，第一栅绝缘层202覆盖有源层201；第一栅金属层203设于第一栅绝缘层202远离衬底基板100的一侧，第一栅金属层203可包括晶体管的栅极和电容的第一极板。第二栅绝缘层204设于第一栅金属层203远离衬底基板100的一侧，第二栅绝缘层204覆盖第一栅金属层203；第二栅金属层205设于第二栅绝缘层204远离衬底基板100的一侧，第二栅金属层205可包括电容的第二极板，层间介质层206设于第二栅绝缘层204远离衬底基板100的一侧；第一源漏层207设于层间介质层206远离衬底基板100的一侧，第一源漏层207包括晶体管的源极和漏极，源极和漏极连接于有源层201。第一平坦化层208设于第一源漏层207远离衬底基板100的一侧，第二源漏层209设于第一平坦化层208远离衬底基板100的一侧，第二平坦化层210设于第二源漏层209远离衬底基板100的一侧。进一步地，驱动电路层200还包括遮光层211和钝化层212等，遮光层211设于衬底基板100和有源层201之间；钝化层212(图6)设于第一源漏层207和第一平坦化层208之间。
如图1至图3、图5所示，发光层300设于驱动电路层200和触控层500之间，发光层300包括第一有机层301。第一有机层301包括像素定义区011，像素定义区011至少部分位于显示区110。像素定义区011包含多个像素开口012，每个像素开口012限定出的范围即为一发光器件的范围。像素开口012的形状，即像素开口012在衬底基板100的正投影的轮廓的形状可为多边形、光滑的封闭曲线或其它形，在此不做特殊限定。
第一有机层301还包括隔离柱013，隔离柱013设于像素定义区011远离衬底基板100的一侧，隔离柱013的数量为多个，隔离柱013在衬底基板100上的正投影位于像素定义区011在衬底基板100上的正投影之内。
第一有机层301还包括第一区域014和第二区域015，第一区域014位于第一外围区121，第二区域015位于第二外围区122。进一步地，第一有机层301的第二区域015至少部分位于绑定区1221，显示面板还包括驱动芯片600，第一有机层301的第二区域015远离衬底基板100的表面设有凹槽015a，驱动芯片600位于凹槽015a内。在该实施例中，第一有机层301的第二区域015设置凹槽015a有助于降低在绑定时的弯折应力，提升绑定良率。
以发光器件为OLED发光器件为例，该发光器件包括沿远离衬底基板100方向依次设置的第一电极层302、发光功能层303和第二电极层304。第一电极层302可作为发光器件的阳极层。发光功能层303覆盖第一电极层302，第二电极层304覆盖发光功能层303。第一电极层302可与晶体管的源/漏极连接。第二电极层304可覆盖发光功能层303，其可作为发光器件的阴极层，第二电极层304可以是单层或多层结构，其材料可包括导电的金属、金属氧化物以及合金中的一种或多种。发光功能层303至少部分设于像素开口012内，且可包括沿远离衬底基板100的方向依次层叠空穴注入层、空穴传输层、发光材料层、电子传输层和电子注入层，可通过使空穴和电子在发光材料层复合成激子，由激子辐射光子，从而产生可见光，发光材料层为有机发光材料层，具体发光原理在此不再详述。
发光器件也可以为QLED发光器件，与OLED发光器件不同的是，发光材料层为量子点发光材料层。
如图1至图6所示，第一有机层301还包括第一区域014和第二区域015，第一区域014位于第一外围区121，第二区域015位于第二外围区122。其中，第一有机层301的第一区域014可环绕在像素定义区011的外围。阻隔坝700设于衬底基板100的一侧，阻挡坝用于阻隔水氧，以防止外界水氧对位于显示区110的发光器件、晶体管等器件造成腐蚀。阻隔坝700位于第一外围区121，阻隔坝700包括第一有机层301的第一区域014。
如图4、图5和图6所示，在本公开一些实施例中，阻隔坝700的数量可以为多个，举例而言，阻隔坝700的数量为两个，其中一个为第一阻隔坝701，另一个为第二阻隔坝702，第二阻隔坝702环绕在第一阻隔坝701的外围，即环绕在第一阻隔坝701远离显示区110的一侧。阻隔坝700除包含第一有机层301的第一区域014外，也可以包括其他膜层，如可包括第一平坦化层208或第二平坦化层210的部分区域，不同阻隔坝700所包含的膜层可有所不同，如第一阻隔坝701除包括第一有机层301的第一区域014外，还包括第一平坦化层208的部分区域，而第二阻隔坝702除包含第一有机层301的第二区域015外，还包括第一平坦化层208和第二平坦化层210的部分区域。
如图2、图3和图4所示，在本公开一些实施例中，显示面板还包括封装层400，设于第一有机层301和触控层500之间，具体设于发光层300和触控层500之间。封装层400可用于保护发光层300，阻隔外界的水、氧对发光器件造成侵蚀。在本公开的一些实施方式中，可采用薄膜封装(Thin-Film Encapsulation，TFE)的方式实现封装，具体而言，封装层400可包括沿远离衬底基板100方向层叠设置的第一无机层401、第二有机层402和第二无机层403，其中，第一无机层401覆盖于发光层300远离衬底基板100的表面，第二有机层402可设于第一无机层401远离衬底基板100的表面，且第二有机层402的边界限定于第一无机层401的边界的内侧，第二无机层403覆盖第二有机层402和未被第二有机层402覆盖的第一无机层401，可通过第二无机层403阻挡水氧侵入，通过具有柔性的第二有机层402实现平坦化。第二有机层402在衬底基板100上正投影位于阻隔坝700在衬底基板100上的正投影远离第二外围区122的一侧。进一步地，阻隔坝700还可以包括第一无机层401和第二无机层403的部分区域，其包含的第一无机层401和和第二无机层403的部分区域可以将该阻隔坝700的其他膜层予以包裹。
触控层500设于第一有机层301远离衬底基板100的一侧，具体设于封装层400远离衬底基板100的一侧。触控层500包括沿远离衬底基板100方向层叠设置的第一导电层501、绝缘层502和第二导电层503。触控层500还包括多个驱动电极506和多个接收电极508，多个驱动电极506和多个接收电极508间隔阵列排布；多个驱动电极506沿第三方向YY排列并相互连接形成驱动电极组507，多个接收电极508沿第一方向XX排列并相互连接形成接收电极组509。驱动电极组507和接收电极组509相互绝缘。驱动电极506和接收电极508在衬底基板100上的正投影大致为菱形，进一步地，驱动电极506和接收电极508同层设置，即驱动电极506和接收电极508采用同材料和同工艺形成。驱动电极506和接收电极508为网格状的电极块。多个驱动电极506和多个接收电极508交替排布形成棋盘结构。驱动电极组507中的相邻两个驱动电极506之间可通过第一桥接线510连接，接收电极组509中的相邻两个接收电极508之间可通过第二桥接线511连接。第一桥接线510和第二桥接线511分别分布于不同的导电层，且第一桥接线510和第二桥接线511在衬底基板100上的正投影至少部分重叠。
在一实施例中，驱动电极506、接收电极508和第一桥接线510分布于第一导电层501，第二桥接线511分布于第二导电层503。在另一实施例中，第一桥接线510分布于第一导电层501，驱动电极506、接收电极508和第二桥接线511分布于第一导电层501。
当用户手指触摸显示面板的可触控区域时，触控点处绝缘交叉设置的驱动电极组507和接收电极组509的互电容发生改变。驱动电路逐条扫描驱动电极组507和接收电极组509中的驱动电极组507，每扫描一条驱动电极组507的同时读取各条驱动电极组507和接收电极组509中探测电极组的信号，通过一轮扫描，便可以确定出触摸点的坐标，基于触摸点的坐标进行触摸操作对应的内容响应。
触控层500还包括驱动触控走线512和接收触控走线513，其中驱动触控走线512可与驱动电极组507连接，接收触控走线513可与接收电极组509连接。进一步地，触控层500还包括第一触控走线514和第二触控走线515，其中，第一触控走线514为接收触控走线513，即与接收电极508连接，用于传输驱动电极506和接收电极508间的互感电容变化信号。第二触控走线515用于加载屏蔽信号。第二触控走线515位于第一触控走线514远离显示区110的一侧。进一步地，触控层500还包括接地线516，接地线516位于第二触控走线515远离显示区110的一侧。
进一步地，第一触控走线514为所有接收触控走线513中最外侧的一条线，即在平行于衬底基板100方向上距离显示区110最远的一条接收触控走线513。第二触控走线515位于第一触控走线514和接地线516之间，用于加载屏蔽信号，以防止第一触控走线514和接地线516之间发生信号干扰。具体地，第二触控走线515可加载触控驱动信号。
第一触控走线514和第二触控走线515均包括沿第一方向X延伸的第一段514a或515a，第一触控走线514和第二触控走线515的第一段514a或515a均位于第二外围区122。在本公开一些实施例中，第一触控走线514的第一段514a和第二触控走线515的第一段515a在平行于衬底基板100方向上的距离不大于20μm。
如图4和图7所示，第一触控走线514和第二触控走线515的第一段514a或515a均包括相互连接的第一子段14a1或15a1和第二子段14a2或15a2，第一触控走线514的第一子段14a1、第二子段14a2与衬底基板100之间的距离不等，第二触控走线515的第一子段15a1、第二子段15a2与衬底基板100之间的距离不等。即，第一触控走线514的第一子段14a1和第二子段14a2相对于衬底基板100具有高度差，第二触控走线515的第一子段15a1和第二子段15a2相对于衬底基板100具有高度差。
具体地，第一触控走线514和第二触控走线515的第一子段14a1或15a1在衬底基板100上的正投影均不与第一有机层301在衬底基板100上的正投影重叠；第一触控走线514和第二触控走线515的第二子段14a2或15a2在衬底基板100上的正投影均位于第一有机层301的第二区域015在衬底基板100上的正投影之内。
第一有机层301还包括凸块单元016，凸块单元016在衬底基板100上的正投影至少部分位于第一触控走线514的第一子段14a1或15a1和第二触控走线515的第一子段14a1或15a1两者在衬底基板100上的正投影之间。进一步地，凸块单元016可位于第一子段14a1或15a1和第二子段14a2或15a2的交界处。如此，可将位于高度差位置处的第一触控走线514和第二触控走线515的第一子段14a1或15a1予以间隔，从而降低两者发生短路的风险。
凸块单元016的设置方式可以有多种，下面将结合不同的实施例来举例说明凸块单元016的设置方式。
如图7、图8、图9、图11和图12所示，图12为图11中凸块单元016在第三方向Y上的截面图，在本公开一些实施例中，凸块单元016包括第一凸块161；第一有机层301的第二区域015具有沿第二方向X0延伸的第一边缘015b，第二方向X0与第一方向X不平行。第二方向X0与第一方向X的夹角可以大于0°，小于等于90°。第一有机层301的第二区域015的第一边缘015b的至少部分沿第一方向X朝靠近第一子段14a1或15a1方向凸起形成至少一个第一凸块161。第一凸块161的数量可以为一个或多个。当第一凸块161的数量为多个时，多个第一凸块161可沿第三方向Y依次排列，第三方向Y与第一方向X大致垂直。
第一凸块161在衬底基板100上的正投影可以有多种，其可以是长方形、椭圆形或多边形等，具体可不做限定。优选地，第一凸块161在衬底基板100上的正投影大致为长方形。进一步地，第一凸块161在垂直于衬底基板100方向上的截面可以为长方形、正梯形、倒梯形或顶端为弧形、尖角等的不规则形状等。
第一凸块161的大小也可以有多种，举例而言，第一凸块161在第一方向X上的尺寸不小于35μm。即第一有机层301的第二区域015的第一边缘015b沿第一方向X朝靠近第一子段14a1或15a1方向凸起的长度L0不小于35μm。在平行于衬底基板100方向上，第一凸块161的边缘与第一触控走线514或第二触控走线515的最短距离h不小于4μm。如图7所示，当凸块单元016只包含一个第一凸块161时，该第一凸块161与第一触控走线514之间的距离不小于4μm，且该第一凸块161与第二触控走线515之间的距离也不小于4μm。如图11所示，当凸块单元016包括多个第一凸块161时，最靠近第一触控走线514的第一凸块161与第一触控走线514之间的距离不小于4μm，最靠近第二触控走线515的第一凸块161与第二触控走线515之间的距离不小于4μm。在该实施例中，对第一凸块161的尺寸限制是为了确保第一触控走线514和第二触控走线515在刻蚀时短路(short)现象发生路径的延长效果，以进一步降低对应位置处发生短路的风险。
如图13至图15所示，图14为图15中凸块单元016在第三方向Y上的截面图，在本公开另一些实施例中，凸块单元016还包括至少一个第二凸块162，第二凸块162设于第一凸块161或第一有机层301的第二区域015远离衬底基板100的一侧，至少部分第二凸块162在衬底基板100上的正投影位于第一凸块161在衬底基板100上的正投影之内。在该实施例中，多个第二凸块162可全部设于第一凸块161远离衬底基板100的一侧，且这些第二凸块162在衬底基板100上的正投影位于第一凸块161在衬底基板100上的正投影之内。在垂直于衬底基板100方向上，一个第一凸块161可对应设置一个或多个第二凸块162。此外，如图15所示，多个第二凸块162中，部分第二凸块162可设于第一凸块161远离衬底基板100的一侧，且该部分第二凸块162在衬底基板100上的正投影位于第一凸块161在衬底基板100上的正投影之内，剩余第二凸块162可设于第一有机层301的第二区域015远离衬底基板100的一侧，且该部分第二凸块162在衬底基板100上的正投影位于第一有机层301的第二区域015在衬底基板100上的正投影之内。
第二凸块162在衬底基板100上的正投影可以为圆形、椭圆形或多边形等，第二凸块162在垂直于衬底基板100方向上的截面可以为长方形、正梯形、倒梯形或其他多边形等。进一步地，如图14所示，在垂直于衬底基板100方向上，第一凸块161和第二凸块162的高度之和为1.5μm-2.5μm，在该范围内，不仅可确保第一触控走线514和第二触控走线515在刻蚀时短路(short)现象发生路径的延长效果，降低对应位置处发生短路的风险，同时也不影响其他膜层的制备，保证其他膜层的正常制作。
如图16至图18所示，图17为图16中C部分放大图，图18为图16中凸块单元016在第三方向Y上的截面图。在本公开又一些实施例中，凸块单元016包括第一凸块单元163，第一凸块单元163包括多个第三凸块164，多个第三凸块164阵列排布于第一触控走线514的第一段514a和第二触控走线515的第一段515a之间；多个第三凸块164在衬底基板100上的正投影与第一有机层301的第二区域015不重叠，且多个第三凸块164在衬底基板100上的正投影位于第一触控走线514的第一子段14a1和第二触控走线515的第一子段15a1之间。
第三凸块164在衬底基板100上的正投影可以为圆形、椭圆形或多边形等，第三凸块164在垂直于衬底基板100方向上的截面可以为长方形、正梯形、倒梯形或其他多边形等。进一步地，如图18所示，在垂直于衬底基板100方向上，第三凸块164的高度为1.5μm-2.5μm。同上述实施例，在该范围内，不仅可确保第一触控走线514和第二触控走线515在刻蚀时短路(short)现象发生路径的延长效果，降低对应位置处发生短路的风险，同时也不影响其他膜层的制备，保证其他膜层的正常制作。
凸块单元016还包括第二凸块单元165，第二凸块单元165位于第一凸块单元163在第一方向X上的一侧，第二凸块单元165包括多个第四凸块166；多个第四凸块166阵列排布于第一触控走线514的第一段514a和第二触控走线515的第一段515a之间；多个第四凸块166在衬底基板100上的正投影位于第一有机层301的第二区域015在衬底基板100上的正投影之内。
第四凸块166在衬底基板100上的正投影可以为圆形、椭圆形或多边形等，第四凸块166在垂直于衬底基板100方向上的截面可以为长方形、正梯形、倒梯形或其他多边形等。进一步地，在垂直于衬底基板100方向上，第四凸块166和第一有机层301第二区域015的高度之和为1.5μm-2.5μm。
如图17所示，第一凸块单元163在第一方向X上的尺寸L1不小于35μm，且凸块单元016在第一方向X上的尺寸L2不大于200μm。该数值设置不仅可确保第一触控走线514和第二触控走线515在刻蚀时短路(short)现象发生路径的延长效果，降低对应位置处发生短路的风险，同时也不影响其他膜层的制备，保证其他膜层的正常制作。进一步地，第一凸块单元163中最靠近第一有机层301第二区域015的第三凸块164与第一有机层301的第二区域015之间的距离不大于5μm，第一凸块单元163中最远离第一有机层301第二区域015的第三凸块164的外侧边缘与第一有机层301的第二区域015之间的距离不小于35μm，其中，第三凸块164的外侧边缘是指该第三凸块164远离第一有机层301第二区域015的边缘。
在本公开中，第一有机层301中所包括的各个结构，如像素定义区011、第一区域014、第二区域015、隔离柱013和凸块单元016等可通过一道光刻工艺形成。例如，可于第一电极层302远离衬底基板100的一侧形成第一有机材料层，随后采用半透膜掩膜板对该第一有机材料层进行图案化，以形成第一有机层301。
在本公开中，第一触控走线514和第二触控走线515可以是双层走线，也可以是单层走线，且第一触控走线514和第二触控走线515的不同走线段单双层设置方式可不同。
如图4、图8、图10和图21所示，在本公开一些实施例中，第一触控走线514分布于第一导电层501和第二导电层503两层导电层中，第一触控走线514中分布于不同导电层中的走线在衬底基板100上的正投影至少部分重叠，且分布于不同导电层中的走线通过绝缘层502中的至少一个第一过孔514c连接。第二触控走线515分布于第一导电层501和第二导电层503两层导电层中，第二触控走线515中分布于不同导电层中的走线在衬底基板100上的正投影至少部分重叠，且分布于不同导电层中的走线通过绝缘层502中的至少一个第二过孔515c连接。即，第一触控走线514和第二触控走线515为双层走线。其中，图21为分布于不同导电层中的走线过孔连接示意图。
进一步地，第一触控走线514和第二触控走线515均还包括沿第三方向Y延伸且与第一段514a或515a连接的第二段514b或515b，第三方向Y与第一方向X不平行。至少一个第一过孔514c在衬底基板100上的正投影位于第一触控走线514的第二段514b在衬底基板100上的正投影之内。至少一个第二过孔515c在衬底基板100上的正投影位于第二触控走线515的第二段515b在衬底基板100上的正投影之内。第一触控走线514的第二段514b的线宽大于第一触控走线514第一段514a的线宽。第二触控走线515第二段515b的线宽大于第二触控走线515第一段515a的线宽。在该实施例中，第三方向Y与第一方向X的夹角可以为45°-90°。如在一实施例中，第三方向Y与第一方向X的夹角为45°，在另一实施例中，第三方向Y与第一方向X大致垂直。
如图19、图20和图21所示，图20是图19中E部分放大图，在本公开另一些实施例中，第一触控走线514的第一段514a分布于第一导电层501或第二导电层503；第二触控走线515的第一段515a分布于第一导电层501或第二导电层503；且第一触控走线514的第一段514a和第二触控走线515的第一段515a不同层设置。如，第一触控走线514的第一段514a分布于第一导电层501，则第二触控走线515的第一段515a分布于第二导电层503；又如，第一触控走线514的第一段514a分布于第二导电层503，第二触控走线515的第一段515a分布于第一导电层501。在该实施例中，由于第一触控走线514的第一段514a和第二触控走线515的第一段515a分布于不同导电层，因此，可以缩短两者在平行于衬底基板100方向上的间距，有助于实现显示面板的窄边框设计。
在该类实施例中，第一触控走线514和第二触控走线515也可均还包括沿第三方向Y延伸且与第一段514a或515a连接的第二段514b或515b，第三方向Y与第一方向X不平行。其中，第一触控走线514的第二段514b和第二触控走线515的第二段515b可以为双层走线，即，第一触控走线514的第二段514b分布于第一导电层501和第二导电层503两层导电层中，第一触控走线514中分布于不同导电层中的走线在衬底基板100上的正投影至少部分重叠，且分布于不同导电层中的走线通过绝缘层502中的至少一个第一过孔514c连接。第二触控走线515的第二段515b分布于第一导电层501和第二导电层503两层导电层中，第二触控走线515中分布于不同导电层中的走线在衬底基板100上的正投影至少部分重叠，且分布于不同导电层中的走线通过绝缘层502中的至少一个第二过孔515c连接。至少一个第一过孔514c在衬底基板100上的正投影位于第一触控走线514的第二段514b在衬底基板100上的正投影之内。至少一个第二过孔515c在衬底基板100上的正投影位于第二触控走线515的第二段515b在衬底基板100上的正投影之内。第一触控走线514的第二段514b的线宽大于第一触控走线514第一段514a的线宽。第二触控走线515第二段515b的线宽大于第二触控走线515第一段515a的线宽。如此，第一触控走线514和第二触控走线515的第一段514a或515a单层走线设计有助于实现显示面板更窄边框设计，而第一触控走线514和第二触控走线515的第二段514b或515b的双层走线设计有助于降低电阻，提升传输信号的稳定性和均一性。
如图7所示，在本公开一些实施例中，触控层500所包括的接地线516可以为单层走线也可以为双层走线，具体可不做限定。接地线516包括沿第一方向X延伸的第一主段516a和第二主段516b，以及连接于第一主段516a和第二主段516b之间弯折段516c，第一主段516a在衬底基板100上的正投影与第一有机层301的第二区域015在衬底基板100上的正投影不重叠，第二主段516b在衬底基板100上的正投影位于第一有机层301的第二区域015在衬底基板100上的正投影之内。接地线516的弯折段516c与第二触控线的第一段515a之间的最大距离，大于接地线516的第一主段516a/第二主段516b与第二触控线的第一段515a之间的最大距离。即，接地线516的弯折段516c与第二触控线的第一段515a之间的最大距离大于第一主段516a与第二触控线的第一段515a之间的距离，且大于第二主段516b与第二触控线的第一段515a之间的距离。如此，增大了接地线516与第二触控走线515在该位置处的距离，有助于降低接地线516与第二触控走线515之间发生短路的风险。
其中，弯折段516c在衬底基板100上的正投影部分与第一有机层301的第二区域015在衬底基板100上的正投影不重叠，部分位于第一有机层301的第二区域015在衬底基板100上的正投影之内。弯折段516c在衬底基板100上的正投影与第一有机层301的第二区域015的边缘在衬底基板100上的正投影相交形成第一夹角α，0°＜α＜90°。即第一有机层301第二区域015的边缘与弯折段516c非垂直交叉，如此，可延长刻蚀金属残留路径，进一步降低第二触控走线515和接地线516之间发生短路的风险。
在一实施例中，弯折段516c包括依次连接的第一子弯折段16c1、第二子弯折段16c2和第三子弯折段16c3，第二子弯折段16c1沿第一方向X延伸，第一子弯折段16c1连接第一主段516a和第二子弯折段16c2，第三子弯折段16c3连接第二主段516b和第二子弯折段16c2；第一子弯折段16c1在衬底基板100上的正投影与第一有机层301的第二区域015在衬底基板100上的正投影不重叠，第三子弯折段16c3在衬底基板100上的正投影位于第一有机层301的第二区域015在衬底基板100上的正投影之内。进一步地，第二子弯折段16c2在衬底基板100上的正投影与第一有机层301的第二区域015的边缘在衬底基板100上的正投影相交形成第一夹角α。
如图19和图20所示，在本公开一些实施例中，第一有机层301也可不包含凸块单元016。在该类实施例中，第一触控走线514的第一段514a分布于第一导电层501或第二导电层503，第二触控走线515的第一段515a分布于第一导电层501或第二导电层503，且第一触控走线514的第一段514a和第二触控走线515的第一段515a不同层设置。
在该类实施例中，第一触控走线514和第二触控走线515均还包括沿第三方向Y延伸且与第一段514a或515a连接的第二段514b或515b，第三方向Y与第一方向X不平行；第一触控走线514的第二段514b分布于第一导电层501和第二导电层503两层导电层中，第一触控走线514中分布于不同导电层中的走线在衬底基板100上的正投影至少部分重叠，且分布于不同导电层中的走线通过绝缘层502中的至少一个第一过孔514c连接；第二触控走线515的第二段515b分布于第一导电层501和第二导电层503两层导电层中，第二触控走线515中分布于不同导电层中的走线在衬底基板100上的正投影至少部分重叠，且分布于不同导电层中的走线通过绝缘层502中的至少一个第二过孔515c连接；至少一个第一过孔514c在衬底基板100上的正投影位于第一触控走线514的第二段514b在衬底基板100上的正投影之内；至少一个第二过孔515c在衬底基板100上的正投影位于第二触控走线515的第二段515b在衬底基板100上的正投影之内。
此外，在该类实施例中，第一有机层301也可包括凸块单元016，凸块单元016的设置方式可参照上述任一实施例，在此不详细描述。
如图1至图7所示，本公开还提供一种显示面板，包括衬底基板100、第一有机层301、阻隔坝700和触控层500。衬底基板100包括显示区110和位于显示区110外围的外围区120，外围区120包括第一外围区121和位于第一外围区121远离显示区110一侧的第二外围区122。第一有机层301设于衬底基板100的一侧，第一有机层301包括第二区域015，第二区域015位于第二外围区122。阻隔坝700设于衬底基板100的一侧，阻隔坝700位于第一外围区121。触控层500设于第一有机层301远离衬底基板100的一侧，触控层500包括第二触控走线515，第二触控走线515包括沿第一方向X延伸的第一段515a，第二触控走线515的第一段515a位于第二外围区122。
触控层500还包括信号线516，信号线516位于第二触控走线515远离显示区110的一侧。信号线516包括沿第一方向X延伸的第一主段516a和第二主段516b，以及连接于第一主段516a和第二主段516b之间弯折段516c，第一主段516a在衬底基板100上的正投影与第一有机层301的第二区域015在衬底基板100上的正投影不重叠，第二主段516b在衬底基板100上的正投影位于第一有机层301的第二区域015在衬底基板100上的正投影之内；信号线516的弯折段516c与第二触控线的第一段515a之间的最大距离，大于信号线516的第一主段516a、第二主段516b与第二触控线的第一段515a之间的最大距离。在一实施例中，信号线516可用于加载接地信号，当然也可用于加载其他信号。
在一实施例中，弯折段516c包括依次连接的第一子弯折段16c1、第二子弯折段16c2和第三子弯折段16c3，第二子弯折段16c2沿第一方向延伸，第一子弯折段16c1连接第一主段516a和第二子弯折段16c2，第三子弯折段16c3连接第二主段516b和第二子弯折段16c2；第一子弯折段16c1在衬底基板100上的正投影与第一有机层301的第二区域015在衬底基板100上的正投影不重叠，第三子弯折段16c3在衬底基板100上的正投影位于第一有机层301的第二区域015在衬底基板100上的正投影之内。
弯折段516c在衬底基板100上的正投影与第一有机层301的第二区域015的边缘在衬底基板100上的正投影相交形成第一夹角α，0°＜α＜90°。进一步地，第二子弯折段16c2在衬底基板100上的正投影与第一有机层301的第二区域015的边缘在衬底基板100上的正投影相交形成第一夹角。
在该实施例中，触控层500还包括第一触控走线514，第一有机层301还包括凸块单,016，其设置方式可参照上述任一实施例，在此不详细赘述。
本公开还提供一种显示面板的制作方法，包括：
步骤S100，提供衬底基板100，包括显示区110和位于显示区110外围的外围区120，外围区120包括第一外围区121和位于第一外围区121远离显示区110一侧的第二外围区122；
步骤S200，于衬底基板100的一侧形成第一有机层301和阻隔坝700，第一有机层301包括第一区域014和第二区域015，第一区域014位于第一外围区121，第二区域015位于第二外围区122；阻隔坝700位于第一外围区121，阻隔坝700包括第一有机层301的第一区域014；
步骤S300，于第一有机层301远离衬底基板100的一侧形成触控层500，触控层500包括第一触控走线514和第二触控走线515，第一触控走线514和第二触控走线515均包括沿第一方向X延伸的第一段514a或515a，第一触控走线514和第二触控走线515的第一段514a或515a均位于第二外围区122；
其中，第一触控走线514和第二触控走线515的第一段514a或515a均包括相互连接的第一子段14a1或15a1和第二子段14a2或15a2，第一触控走线514的第一子段14a1或15a1、第二子段14a2或15a2与衬底基板100之间的距离不等，第二触控走线515的第一子段14a1或15a1、第二子段14a2或15a2与衬底基板100之间的距离不等；
第一触控走线514和第二触控走线515的第一子段14a1或15a1在衬底基板100上的正投影均不与第一有机层301在衬底基板100上的正投影重叠；
第一触控走线514和第二触控走线515的第二子段14a2或15a2在衬底基板100上的正投影均位于第一有机层301的第二区域015在衬底基板100上的正投影之内；
第一有机层301还包括凸块单元016，凸块单元016在衬底基板100上的正投影至少部分位于第一触控走线514的第一子段14a1或15a1和第二触控走线515的第一子段14a1或15a1两者在衬底基板100上的正投影之间。
本公开还提供一种显示装置，包括显示面板，该显示面板可为上述任意实施方式的显示面板，其具体结构和有益效果可参考上文中显示面板的实施方式，在此不再赘述。本公开的显示装置可以是手机、平板电脑、电视等电子设备，在此不再一一列举。
需要说明的是，尽管在附图中以特定顺序描述了本公开中方法的各个步骤，但是，这并非要求或者暗示必须按照该特定顺序来执行这些步骤，或是必须执行全部所示的步骤才能实现期望的结果。附加的或备选的，可以省略某些步骤，将多个步骤合并为一个步骤执行，以及/或者将一个步骤分解为多个步骤执行等，均应视为本公开的一部分。
应可理解的是，本公开不将其应用限制到本说明书提出的部件的详细结构和布置方式。本公开能够具有其他实施方式，并且能够以多种方式实现并且执行。前述变形形式和修改形式落在本公开的范围内。应可理解的是，本说明书公开和限定的本公开延伸到文中和/或附图中提到或明显的两个或两个以上单独特征的所有可替代组合。所有这些不同的组合构成本公开的多个可替代方面。本说明书的实施方式说明了已知用于实现本公开的最佳方式，并且将使本领域技术人员能够利用本公开。

Claims (30)

  1. 一种显示面板，其中，包括：
    衬底基板，包括显示区和位于所述显示区外围的外围区，所述外围区包括第一外围区和位于所述第一外围区远离所述显示区一侧的第二外围区；
    第一有机层，设于所述衬底基板的一侧，所述第一有机层包括第二区域，所述第二区域位于所述第二外围区；
    阻隔坝，设于所述衬底基板的一侧，所述阻隔坝位于所述第一外围区；
    触控层，设于所述第一有机层远离所述衬底基板的一侧，所述触控层包括第一触控走线和第二触控走线，所述第一触控走线和所述第二触控走线均包括沿第一方向延伸的第一段，所述第一触控走线和所述第二触控走线的第一段均位于所述第二外围区；
    其中，所述第一触控走线和所述第二触控走线的第一段均包括相互连接的第一子段和第二子段，所述第一触控走线的第一子段、第二子段与所述衬底基板之间的距离不等，所述第二触控走线的第一子段、第二子段与所述衬底基板之间的距离不等；
    所述第一触控走线和所述第二触控走线的第一子段在所述衬底基板上的正投影均不与所述第一有机层在所述衬底基板上的正投影重叠；
    所述第一触控走线和所述第二触控走线的第二子段在所述衬底基板上的正投影均位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
    所述第一有机层还包括凸块单元，所述凸块单元在所述衬底基板上的正投影至少部分位于所述第一触控走线的第一子段和所述第二触控走线的第一子段两者在所述衬底基板上的正投影之间。
  2. 根据权利要求1所述的显示面板，其中，所述显示面板还包括：
    封装层，设于所述第一有机层和所述触控层之间，所述封装层包括沿远离所述衬底基板方向层叠设置的第一无机层、第二有机层和第二无机层，所述第二有机层在所述衬底基板上正投影位于所述阻隔坝在所述衬底基板上的正投影远离所述第二外围区的一侧。
  3. 根据权利要求1所述的显示面板，其中，所述第一触控走线的第一段和所述第二触控走线的第一段在平行于所述衬底基板方向上的距离不大于20μm。
  4. 根据权利要求1所述的显示面板，其中，所述凸块单元包括第一凸块；
    所述第一有机层的第二区域具有沿第二方向延伸的第一边缘，所述第二方向与所述第一方向不平行；
    所述第一有机层的第二区域的第一边缘的至少部分沿所述第一方向朝靠近第一子段方向凸起形成至少一个所述第一凸块。
  5. 根据权利要求4所述的显示面板，其中，所述第一凸块在所述第一方向上的尺寸不小于35μm；
    在平行于所述衬底基板方向上，所述第一凸块的边缘与所述第一触控走线或所述第二触控走线的最短距离不小于4μm。
  6. 根据权利要求4所述的显示面板，其中，所述凸块单元还包括至少一个第二凸块，所述第二凸块设于第一凸块或所述第一有机层的第二区域远离所述衬底基板的一侧，至少部分所述第二凸块在所述衬底基板上的正投影位于所述第一凸块在所述衬底基板上的正投影之内。
  7. 根据权利要求6所述的显示面板，其中，在垂直于所述衬底基板方向上，所述第一凸块和所述第二凸块的高度之和为1.5μm-2.5μm。
  8. 根据权利要求1所述的显示面板，其中，所述凸块单元包括第一凸块单元，所述第一凸块单元包括多个第三凸块；
    所述多个第三凸块在所述衬底基板上的正投影与所述第一有机层的第二区域不重叠，且所述多个第三凸块在所述衬底基板上的正投影位于所述第一触控走线的第一子段和所述第二触控走线的第一子段之间。
  9. 根据权利要求8所述的显示面板，其中，所述凸块单元还包括第二凸块单元，所述第二凸块单元位于所述第一凸块单元在所述第一方向上的一侧，所述第二凸块单元包括多个第四凸块；
    所述多个第四凸块阵列排布于所述第一触控走线的第一段和所述第二触控走线的第一段之间；
    所述多个第四凸块在所述衬底基板上的正投影位于所述第一有机层 的第二区域在所述衬底基板上的正投影之内。
  10. 根据权利要求8所述的显示面板，其中，在垂直于所述衬底基板方向上，所述第三凸块的高度为1.5μm-2.5μm。
  11. 根据权利要求9所述的显示面板，其中，所述第一凸块单元在所述第一方向上的尺寸不小于35μm，且所述凸块单元在所述第一方向上的尺寸不大于200μm。
  12. 根据权利要求1所述的显示面板，其中，所述第二触控走线的第一段位于所述第一触控走线的第一段远离所述显示区的一侧；
    所述触控层还包括接地线，所述接地线包括沿所述第一方向延伸的第一主段和第二主段，以及连接于所述第一主段和所述第二主段之间弯折段，所述第一主段在所述衬底基板上的正投影与所述第一有机层的第二区域在所述衬底基板上的正投影不重叠，所述第二主段在所述衬底基板上的正投影位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
    所述接地线的弯折段与所述第二触控线的第一段之间的最大距离，大于所述接地线的第一主段、第二主段与所述第二触控线的第一段之间的最大距离。
  13. 根据权利要求12所述的显示面板，其中，所述弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域的边缘在所述衬底基板上的正投影相交形成第一夹角α，0°＜α＜90°。
  14. 根据权利要求13所述的显示面板，其中，所述弯折段包括依次连接的第一子弯折段、第二子弯折段和第三子弯折段，所述第二子弯折段沿所述第一方向延伸，所述第一子弯折段连接所述第一主段和所述第二子弯折段，所述第三子弯折段连接所述第二主段和所述第二子弯折段；
    所述第一子弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域在所述衬底基板上的正投影不重叠，所述第三子弯折段在所述衬底基板上的正投影位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
    所述第二子弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域的边缘在所述衬底基板上的正投影相交形成所述第一夹角。
  15. 根据权利要求12所述的显示面板，其中，所述触控层还包括多个驱动电极和多个接收电极，所述驱动电极用于接收触控驱动信号，所述第一触控走线与所述接收电极连接，用于传输所述驱动电极和所述接收电极间的互感电容变化信号；
    所述第二触控走线用于加载屏蔽信号。
  16. 根据权利要求1所述的显示面板，其中，所述触控层还包括沿远离所述衬底基板方向层叠设置的第一导电层、绝缘层和第二导电层；
    所述第一触控走线的第一段分布于所述第一导电层或所述第二导电层；
    所述第二触控走线的第一段分布于所述第一导电层或所述第二导电层；
    且所述第一触控走线的第一段和所述第二触控走线的第一段不同层设置。
  17. 根据权利要求16所述的显示面板，其中，所述第一触控走线和所述第二触控走线均还包括沿第三方向延伸且与第一段连接的第二段，所述第三方向与所述第一方向不平行；
    所述第一触控走线的第二段分布于所述第一导电层和所述第二导电层两层导电层中，所述第一触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通过所述绝缘层中的至少一个第一过孔连接；
    所述第二触控走线的第二段分布于所述第一导电层和所述第二导电层两层导电层中，所述第二触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通过所述绝缘层中的至少一个第二过孔连接；
    至少一个所述第一过孔在所述衬底基板上的正投影位于所述第一触控走线的第二段在所述衬底基板上的正投影之内；
    至少一个所述第二过孔在所述衬底基板上的正投影位于所述第二触控走线的第二段在所述衬底基板上的正投影之内。
  18. 根据权利要求1所述的显示面板，其中，所述触控层包括沿远离所述衬底基板方向层叠设置的第一导电层、绝缘层和第二导电层；
    所述第一触控走线分布于所述第一导电层和所述第二导电层两层导电层中，所述第一触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通过所述绝缘层中的至少一个第一过孔连接；
    所述第二触控走线分布于所述第一导电层和所述第二导电层两层导电层中，所述第一触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通过所述绝缘层中的至少一个第二过孔连接。
  19. 根据权利要求18所述的显示面板，其中，所述第一触控走线和所述第二触控走线均还包括沿第三方向延伸且与第一段连接的第二段，所述第三方向与所述第一方向不平行；
    至少一个所述第一过孔在所述衬底基板上的正投影位于所述第一触控走线的第二段在所述衬底基板上的正投影之内；
    至少一个所述第二过孔在所述衬底基板上的正投影位于所述第二触控走线的第二段在所述衬底基板上的正投影之内。
  20. 根据权利要求17或19所述的显示面板，其中，所述第一触控走线的第二段的线宽大于所述第一触控走线第一段的线宽；
    所述第二触控走线第二段的线宽大于所述第二触控走线第一段的线宽。
  21. 根据权利要求1所述的显示面板，其中，所述显示面板还包括驱动芯片；
    所述第二外围区包括绑定区，所述第一有机层的第二区域至少部分位于所述绑定区，所述第一有机层的第二区域远离所述衬底基板的表面设有凹槽，所述驱动芯片位于所述凹槽内。
  22. 一种显示面板，其中，包括：
    衬底基板，包括显示区和位于所述显示区外围的外围区，所述外围区包括第一外围区和位于所述第一外围区远离所述显示区一侧的第二外围区；
    第一有机层，设于所述衬底基板的一侧，所述第一有机层包括第二区域，所述第二区域位于所述第二外围区；
    阻隔坝，设于所述衬底基板的一侧，所述阻隔坝位于所述第一外围区；
    触控层，设于所述第一有机层远离所述衬底基板的一侧，所述触控层包括第一触控走线和第二触控走线，所述第一触控走线和所述第二触控走线均包括沿第一方向延伸的第一段，所述第一触控走线和所述第二触控走线的第一段均位于所述第二外围区；
    其中，所述第一触控走线和所述第二触控走线的第一段均包括相互连接的第一子段和第二子段，所述第一触控走线的第一子段、第二子段与所述衬底基板之间的距离不等，所述第二触控走线的第一子段、第二子段与所述衬底基板之间的距离不等；
    所述第一触控走线和所述第二触控走线的第一子段在所述衬底基板上的正投影均不与所述第一有机层在所述衬底基板上的正投影重叠；
    所述第一触控走线和所述第二触控走线的第二子段在所述衬底基板上的正投影均位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
    所述触控层还包括沿远离所述衬底基板方向层叠设置的第一导电层、绝缘层和第二导电层，所述第一触控走线的第一段分布于所述第一导电层或所述第二导电层，所述第二触控走线的第一段分布于所述第一导电层或所述第二导电层，且所述第一触控走线的第一段和所述第二触控走线的第一段不同层设置。
  23. 根据权利要求22所述的显示面板，其中，所述第一触控走线和所述第二触控走线均还包括沿第三方向延伸且与第一段连接的第二段，所述第三方向与所述第一方向不平行；
    所述第一触控走线的第二段分布于所述第一导电层和所述第二导电层两层导电层中，所述第一触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通过所述绝缘层中的至少一个第一过孔连接；
    所述第二触控走线的第二段分布于所述第一导电层和所述第二导电层两层导电层中，所述第二触控走线中分布于不同导电层中的走线在所述衬底基板上的正投影至少部分重叠，且分布于不同导电层中的走线通 过所述绝缘层中的至少一个第二过孔连接；
    至少一个所述第一过孔在所述衬底基板上的正投影位于所述第一触控走线的第二段在所述衬底基板上的正投影之内；
    至少一个所述第二过孔在所述衬底基板上的正投影位于所述第二触控走线的第二段在所述衬底基板上的正投影之内。
  24. 一种显示面板，其中，包括：
    衬底基板，包括显示区和位于所述显示区外围的外围区，所述外围区包括第一外围区和位于所述第一外围区远离所述显示区一侧的第二外围区；
    第一有机层，设于所述衬底基板的一侧，所述第一有机层包括第二区域，所述第二区域位于所述第二外围区；
    阻隔坝，设于所述衬底基板的一侧，所述阻隔坝位于所述第一外围区；
    触控层，设于所述第一有机层远离所述衬底基板的一侧，所述触控层包括第二触控走线，所述第二触控走线包括沿第一方向延伸的第一段，所述第二触控走线的第一段位于所述第二外围区；
    所述触控层还包括信号线，所述信号线位于所述第二触控走线远离所述显示区的一侧；
    所述信号线包括沿第一方向延伸的第一主段和第二主段，以及连接于所述第一主段和所述第二主段之间弯折段，所述第一主段在所述衬底基板上的正投影与所述第一有机层的第二区域在所述衬底基板上的正投影不重叠，所述第二主段在所述衬底基板上的正投影位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
    所述信号线的弯折段与所述第二触控线的第一段之间的最大距离，大于所述信号线的第一主段、第二主段与所述第二触控线的第一段之间的最大距离。
  25. 根据权利要求24所述的显示面板，其中，所述弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域的边缘在所述衬底基板上的正投影相交形成第一夹角α，0°＜α＜90°。
  26. 根据权利要求24所述的显示面板，其中，所述弯折段包括依次 连接的第一子弯折段、第二子弯折段和第三子弯折段，所述第二子弯折段沿所述第一方向延伸，所述第一子弯折段连接所述第一主段和所述第二子弯折段，所述第三子弯折段连接所述第二主段和所述第二子弯折段；
    所述第一子弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域在所述衬底基板上的正投影不重叠，所述第三子弯折段在所述衬底基板上的正投影位于所述第一有机层的第二区域在所述衬底基板上的正投影之内。
  27. 根据权利要求24所述的显示面板，其中，所述弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域的边缘在所述衬底基板上的正投影相交形成第一夹角α，0°＜α＜90°；
    所述弯折段包括依次连接的第一子弯折段、第二子弯折段和第三子弯折段，所述第二子弯折段沿所述第一方向延伸，所述第一子弯折段连接所述第一主段和所述第二子弯折段，所述第三子弯折段连接所述第二主段和所述第二子弯折段；
    所述第一子弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域在所述衬底基板上的正投影不重叠，所述第三子弯折段在所述衬底基板上的正投影位于所述第一有机层的第二区域在所述衬底基板上的正投影之内；
    所述第二子弯折段在所述衬底基板上的正投影与所述第一有机层的第二区域的边缘在所述衬底基板上的正投影相交形成所述第一夹角。
  28. 根据权利要求24所述的显示面板，其中，所述信号线用于加载接地信号。
  29. 根据权利要求1、22或24所述的显示面板，其中，所述第一有机层还包括第一区域，所述第一区域位于所述第一外围区，所述阻隔坝包括所述第一有机层的第一区域。
  30. 一种显示装置，其中，包括权利要求1-29任一项所述的显示面板。
PCT/CN2024/081524 2023-04-28 2024-03-13 显示面板及显示装置 Ceased WO2024222276A1 (zh)

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Citations (5)

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CN110047847A (zh) * 2019-03-29 2019-07-23 武汉华星光电技术有限公司 显示面板
CN110196656A (zh) * 2019-05-16 2019-09-03 云谷（固安）科技有限公司 显示面板和显示装置
CN112242431A (zh) * 2020-10-20 2021-01-19 京东方科技集团股份有限公司 触控显示面板及其制备方法、显示装置
WO2022199062A1 (zh) * 2021-03-25 2022-09-29 京东方科技集团股份有限公司 显示装置、显示面板及其制造方法
CN115793882A (zh) * 2022-11-24 2023-03-14 京东方科技集团股份有限公司 触控显示面板、显示装置

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CN110047847A (zh) * 2019-03-29 2019-07-23 武汉华星光电技术有限公司 显示面板
CN110196656A (zh) * 2019-05-16 2019-09-03 云谷（固安）科技有限公司 显示面板和显示装置
CN112242431A (zh) * 2020-10-20 2021-01-19 京东方科技集团股份有限公司 触控显示面板及其制备方法、显示装置
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