WO2024192811A1 - 显示面板及其驱动方法、电子装置 - Google Patents

显示面板及其驱动方法、电子装置 Download PDF

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Publication number
WO2024192811A1
WO2024192811A1 PCT/CN2023/085718 CN2023085718W WO2024192811A1 WO 2024192811 A1 WO2024192811 A1 WO 2024192811A1 CN 2023085718 W CN2023085718 W CN 2023085718W WO 2024192811 A1 WO2024192811 A1 WO 2024192811A1
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WIPO (PCT)
Prior art keywords
sub
pixel
data voltage
gate driving
driving unit
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
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PCT/CN2023/085718
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English (en)
French (fr)
Inventor
常书铭
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TCL China Star Optoelectronics Technology Co Ltd
Huizhou China Star Optoelectronics Display Co Ltd
Original Assignee
TCL China Star Optoelectronics Technology Co Ltd
Huizhou China Star Optoelectronics Display Co Ltd
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Application filed by TCL China Star Optoelectronics Technology Co Ltd, Huizhou China Star Optoelectronics Display Co Ltd filed Critical TCL China Star Optoelectronics Technology Co Ltd
Priority to US18/553,550 priority Critical patent/US12394389B2/en
Publication of WO2024192811A1 publication Critical patent/WO2024192811A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2074—Display of intermediate tones using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0242—Compensation of deficiencies in the appearance of colours

Definitions

  • the present application relates to the field of display technology, and in particular to the manufacture of display devices, and specifically to a display panel and a driving method thereof, and an electronic device.
  • Liquid crystal displays are currently the most widely used displays.
  • a three-gate drive architecture can be adopted to reduce the number of data lines to 1/3 of the normal drive architecture.
  • the number of scan lines is increased to 3 times of the normal drive architecture, so that the width and charging time of each gate pulse are also reduced to 1/3 of the normal drive architecture.
  • R, G, and B represent red sub-pixels, green sub-pixels, and blue sub-pixels, respectively.
  • the amplitude of the voltage transmitted by the data line (any one of D1, D2, D3 to Dn) is in a high-low change state, that is, it presents a heavy-loaded picture, resulting in a large power consumption of the source drive module, resulting in a reduction in the charging capacity of the data line; plus the opening time of the pixel drive circuit controlled by the gate line (any one of G1, G2, G3 to Gn) is also compressed, resulting in insufficient pixel charging time.
  • it will cause color deviation in the monochrome picture or the two-color mixed color picture, reducing the quality of the displayed picture.
  • the existing liquid crystal display with three-gate driving structure has a color shift phenomenon caused by the above reasons in the single-color picture or the two-color mixed-color picture, which is in urgent need of improvement.
  • the purpose of the present application is to provide a display panel and a driving method thereof, and an electronic device, so as to improve the color shift phenomenon in a monochrome picture or a two-color mixed picture in a liquid crystal display with an existing three-gate driving architecture.
  • the present application provides a display panel, comprising:
  • a first sub-pixel and a second sub-pixel are arranged adjacent to each other and connected to the same data line, the color of the first sub-pixel is different from the color of the second sub-pixel, and the data line is used to sequentially transmit a first data voltage and a second data voltage corresponding to the first sub-pixel and the second sub-pixel respectively;
  • a first gate driving unit and a second gate driving unit are connected to the first sub-pixel and the second sub-pixel respectively;
  • the second gate driving unit outputs the first effective scanning signal to control the second sub-pixel to turn on and load the second data voltage to emit light, and the first gate driving unit controls the first sub-pixel to turn off
  • the present application provides a display panel and a driving method and an electronic device thereof.
  • the first sub-pixel is controlled to be turned off (i.e., the first sub-pixel is not scanned) by controlling the first gate driving unit. That is, it can be considered that the scanning of the first sub-pixel and the second sub-pixel in sequence within the same time is changed to at least not scanning the first sub-pixel within the same time.
  • the time for scanning the second sub-pixel can be extended, that is, the time originally required for scanning the first sub-pixel is utilized, thereby increasing the charging time of the second sub-pixel, thereby improving the color deviation phenomenon and improving the quality of the displayed image.
  • FIG. 1 is a top view of a display panel with three-gate drive according to an embodiment of the present application.
  • FIG. 2 is a top view of another structure of a display panel with three gate drivers provided in an embodiment of the present application.
  • FIG. 3 and FIG. 4 are waveform diagrams of scan signals of two display panels provided in embodiments of the present application, respectively.
  • FIG. 10 are waveform diagrams of data signals of five display panels provided in embodiments of the present application.
  • FIG. 9 is a flow chart of a method for driving a display panel provided in an embodiment of the present application.
  • the "equal to" mentioned in the present application can be, but is not limited to, indicating that the two are equal, and can also indicate that the difference between the two is very small, for example, the absolute value of the difference between the two is less than a threshold value, and the threshold value can be set according to the actual situation, and it is intended to indicate that there is such a concept of "equal to”.
  • the "previous pixel unit” and “next pixel unit” mentioned in the present application can be understood as that among the two adjacent pixel units, the data line transmits the two data voltages corresponding to the "previous pixel unit” and "next pixel unit” respectively in the first and second order.
  • the present application provides a display panel, which may include but is not limited to the following embodiments and combinations of the following embodiments.
  • the display panel 100 includes: a data line 10; a first sub-pixel 201 and a second sub-pixel 202, which are adjacently arranged and connected to the same data line 10, and the color of the first sub-pixel 201 is different from the color of the second sub-pixel 202.
  • the data line 10 is used to sequentially transmit a first data voltage VB and a second data voltage VG corresponding to the first sub-pixel 201 and the second sub-pixel 202, respectively; a first gate driving unit 301 and a second gate driving unit 302, which are connected to the first sub-pixel 201 and the second sub-pixel 202, respectively; wherein, in the display stage of the first type of frame, the second gate driving unit 302 outputs a first valid scanning signal gate1 to control the second sub-pixel 202 (green sub-pixel G) to turn on, and the second data voltage VG controls the second sub-pixel 202 to emit light, and the first gate driving unit 301 controls the first sub-pixel 201 (blue sub-pixel B) to turn off.
  • the display stage of the first type of frame can be understood as displaying the first type of frame and scanning multiple sub-pixels in different rows in turn to control the time period occupied by the multiple sub-pixels being turned on.
  • each data line 10 is connected to a cyclically arranged first sub-pixel 201 (blue sub-pixel B) and a second sub-pixel 202 (green sub-pixel G), as shown in Figures 2 and 3, it can be considered that the time length occupied by each opening of the first sub-pixel 201 and the second sub-pixel 202 in a cycle is T0, and the time length occupied by opening the first sub-pixel 201 and the second sub-pixel 202 in all "cycles" is several T0s.
  • the first gate driving unit 301 controls the first sub-pixel 201 (blue sub-pixel B) to be turned off” can be understood as not scanning the first sub-pixel 201 (blue sub-pixel B), that is, no time is allocated in T0 for scanning the first sub-pixel 201.
  • the display panel 100 may include a plurality of sub-pixels, and the plurality of sub-pixels may include at least a first sub-pixel 201 and a second sub-pixel 202 of different colors.
  • the plurality of sub-pixels may include at least a first sub-pixel 201 and a second sub-pixel 202 of different colors.
  • the first sub-pixel 201 and the second sub-pixel 202 are blue sub-pixel B and green sub-pixel G respectively, but the above setting method is not limited to this.
  • sub-pixels located in the same row can be electrically connected to the corresponding gate driving unit 30 through the same gate line 40.
  • the first gate driving unit 301 and the second gate driving unit 302 can be electrically connected to the blue sub-pixel B and the green sub-pixel G of the corresponding row through the corresponding first gate line G4 and the corresponding second gate line G5, respectively.
  • the gate line 40 can transmit the scanning signal generated by the corresponding gate driving unit 30 to the sub-pixels of the corresponding row. If the scanning signal is a corresponding valid scanning signal, the sub-pixels of the corresponding row can be controlled to turn on, that is, the multiple transistors corresponding to the sub-pixels of the corresponding row can be controlled to turn on, so that the multiple sub-pixels of the row can be loaded with corresponding data voltages through multiple data lines 10, thereby emitting light to present corresponding brightness respectively.
  • the data line 10 transmits multiple data voltages corresponding to multiple sub-pixels from bottom to top in sequence
  • the first sub-pixel 201 (blue sub-pixel B) and the second sub-pixel 202 (green sub-pixel G) corresponding to the first data voltage VB and the second data voltage VG transmitted in sequence by the data line 10 can be located in the upper row and the lower row of each other, respectively.
  • the blue sub-pixel B in Figure 2 is located in the 4th row
  • the green sub-pixel G is located in the 5th row.
  • the display panel 100 in this embodiment has at least a display stage of a first type of frame, and in this stage, the second sub-pixel 202 is controlled to emit light based on the second data voltage VG, the first gate driving unit 301 does not scan the first sub-pixel 201, and the second gate driving unit 302 outputs a first effective scanning signal to control the second sub-pixel 202 to turn on, that is, it can be considered that the first sub-pixel 201 and the second sub-pixel 202 are scanned in sequence within the same time, and at least the first sub-pixel 201 can be not scanned within the same time.
  • the time for scanning the second sub-pixel 202 can be extended, that is, the time originally required for scanning the first sub-pixel 201 is utilized, so that the charging time of the second sub-pixel 202 can be increased to improve the color deviation phenomenon and improve the quality of the displayed image.
  • the first gate driving unit 301 does not scan the first sub-pixel 201, but it can be considered that the data line 10 will still transmit the first data voltage VB and the second data voltage VG in sequence, and it can be achieved that at least in the time period when the second sub-pixel 202 is turned on, the data line at least transmits the second data signal to act on the second sub-pixel 202.
  • the display panel 100 also includes: a timing control module, connected to the first gate driving unit 301 and the second gate driving unit 302; wherein, in the display stage of the first type of frame, the timing control module transmits a valid clock signal to the second gate driving unit 302 so that the second gate driving unit 302 outputs the first valid scanning signal gate1, the timing control module transmits an invalid clock signal to the first gate driving unit 301 so that the first gate driving unit 301 outputs an invalid scanning signal to the first sub-pixel 201, or the timing control module and the first gate driving unit 301 are disconnected so that the first gate driving unit 301 and the first sub-pixel 201 are disconnected.
  • a timing control module connected to the first gate driving unit 301 and the second gate driving unit 302; wherein, in the display stage of the first type of frame, the timing control module transmits a valid clock signal to the second gate driving unit 302 so that the second gate driving unit 302 outputs the first valid scanning signal gate1, the timing control module transmits an invalid clock signal to the first gate driving unit 301 so
  • the timing control module can be controlled to transmit an invalid clock signal to the first gate driving unit 301, so that the first gate driving unit 301 outputs an invalid scanning signal to the first sub-pixel 201 and does not scan the first sub-pixel 201.
  • the invalid scanning signal does not include the corresponding valid pulse to achieve not scanning the first sub-pixel 201; or the first sub-pixel 201 is not scanned by controlling the circuit between the timing control module and the first gate driving unit 301.
  • a switching element such as but not limited to a transistor can be set between the timing control module and the first gate driving unit 301 to control the passage and circuit break between the timing control module and the first gate driving unit 301.
  • the first gate driving unit 301 outputs a third effective scanning signal to control the first sub-pixel 201 to turn on, and the first data voltage VB controls the first sub-pixel 201 to emit light
  • the second gate driving unit 302 outputs the first effective scanning signal gate1 to control the second sub-pixel 202 to turn on, and the second data voltage VG controls the second sub-pixel 202 to emit light.
  • the present application can improve the display stage of the first type of frame, which can be understood as a stage in which the difference between the theoretical luminous brightness of the second sub-pixel 202 and the theoretical luminous brightness of the first sub-pixel 201 (which is 0) is large, resulting in a stage in which the second sub-pixel 202 located in the latter row has a risk of color deviation; of course, there is also a display stage of the second type of frame, which can be understood as a stage in which the difference between the theoretical luminous brightness of the second sub-pixel 202 and the theoretical luminous brightness of the first sub-pixel 201 is small, resulting in a stage in which the second sub-pixel 202 located in the latter row has no risk of color deviation, and at this time, the first sub-pixel 201 and the second sub-pixel 202 can be scanned normally in sequence, and the first sub-pixel 201 and the second sub-pixel 202 can be controlled to emit light with corresponding brightness, respectively.
  • the first data voltage VB at least includes a first sub-data voltage VB1, and the first sub-data voltage VB1 is equal to the second data voltage VG.
  • the data line 10 sequentially transmits the first sub-data voltage VB1 and the corresponding second data voltage VG.
  • the first data voltage VB is set to at least include a first sub-data voltage VB1 equal to the second data voltage VG, that is, when the second sub-pixel 202 is turned on, the first sub-data voltage VB transmitted by the data line 10 can be further set to be equal to the second data voltage VG on the basis of increasing the charging time of the second sub-pixel 202, so that before the second data voltage VG acts on the second sub-pixel (that is, before the second sub-pixel 202 is turned on), the data line 10 can transmit the first sub-data voltage VB1 equal to the second data voltage VG, thereby reducing the amount of signal attenuation of the second data voltage VG transmitted by the data line later, thereby improving the reliability of the second sub-pixel 202 emitting light.
  • the device further includes: a third sub-pixel 203, which is adjacent to the second sub-pixel 202 and connected to the same data line 10 as the second sub-pixel 202, wherein the color of the third sub-pixel 203 is different from the color of the first sub-pixel 201 and the color of the second sub-pixel 202, and the data line 10 is used to sequentially transmit the first data voltage VB, the second data voltage VG and the third data voltage VR corresponding to the first sub-pixel 201, the second sub-pixel 202 and the third sub-pixel 203 respectively arranged in succession; a third gate driving unit 303, which is connected to the third sub-pixel 203; wherein, in the display stage of the first type of frame, after the second sub-pixel 202 is turned on, the third gate driving unit 303 outputs the second effective scanning signal gate2 to control the third sub-pixel 203 (red sub-pixel R) to be turned on, and the third data voltage VR controls the third sub-pixel 203 to emit light or
  • the third gate driving unit 303 controls the third sub-pixel 203 to be turned off can also be understood as not scanning the third sub-pixel 203 (red sub-pixel R), that is, there is no need to allocate time in T0 for scanning the third sub-pixel 203.
  • the third sub-pixel 203 is taken as a red sub-pixel R for example, and it can be considered that the first sub-pixel 201 (blue sub-pixel B) and the third sub-pixel 203 can be located in the upper row and the lower row of the second sub-pixel 202 (green sub-pixel G), respectively.
  • the blue sub-pixel B in Figure 2 is located in the 4th row
  • the green sub-pixel G is located in the 5th row
  • the red sub-pixel R is located in the 6th row.
  • the second gate driving unit 302 outputs the first effective scanning signal to control the second sub-pixel 202 to turn on, and the first gate driving unit 301 does not scan the first sub-pixel 201.
  • a red sub-pixel R is provided after the green sub-pixel G, but there is no restriction on whether to scan the third sub-pixel 203 (red sub-pixel R) in the display stage of the first type of frame.
  • scanning the third sub-pixel 203 (red sub-pixel R) is taken as an example for example:
  • the first pulse pl1 in the first effective scanning signal gate1 for controlling the turning on of the second sub-pixel 202 (green sub-pixel G) and the second pulse pl2 in the second effective scanning signal gate2 for controlling the turning on of the third sub-pixel 203 (red sub-pixel R) may be spaced apart by a first time length t1; for another example, as shown in FIG4 , in the display stage of the first type of frame, there may be no time interval between the first pulse pl1 in the first effective scanning signal gate1 for controlling the turning on of the second sub-pixel 202 (green sub-pixel G) and the second pulse pl2 in the second effective scanning signal gate2 for controlling the turning on of the third sub-pixel 203 (red sub-pixel R).
  • the second data voltage VG is a larger value in the display stage of the first type of frame as an example for explanation: after the second sub-pixel 202 is turned on, the third sub-pixel 203 (red sub-pixel R) can also be turned on, as shown in Figures 5 to 7, and the third data voltage VR controls the third sub-pixel 203 not to emit light (for example, the third data voltage VR is a smaller value).
  • the data line 10 transmits the equal and higher first data voltage VB and the second data voltage VG, and the lower third data voltage VR in sequence; as shown in Figure 8, the third data voltage VR controls the third sub-pixel 203 to emit light (for example, the third data voltage VR is a larger value), then in the display stage of each first type of frame, the data line 10 transmits the three data voltages of equal and higher first data voltage VB, second data voltage VG and third data voltage VR in sequence.
  • the same data line 10 is connected to a plurality of the first sub-pixels 201 and a plurality of the second sub-pixels 202, and the data line 10 is at least used to sequentially transmit each of the first data voltages VB and the corresponding second data voltages VG; wherein, in the display stage of the first type of frame, the plurality of the second gate driving units 302 respectively output the corresponding plurality of the first effective scanning signals gate1 to control the plurality of the second sub-pixels 202 to be sequentially turned on and respectively loaded with the corresponding second data voltages to emit light, and each of the first gate driving units 301 controls the corresponding first sub-pixel 201 to be turned off (i.e., not scanned).
  • the plurality of second sub-pixels 202 are sequentially scanned, so that the duration of scanning each second sub-pixel 202 can be extended, and the charging duration of the second sub-pixel 202 is increased to improve the color shift phenomenon.
  • multiple third gate driving units 303 also output corresponding multiple second effective scanning signals gate2 to control the multiple third sub-pixels 203 to turn on in sequence. It can be considered that within the same time, multiple pixel units 20 are scanned in sequence, and the first sub-pixel 201, the second sub-pixel 202 and the third sub-pixel 203 are scanned in sequence in each pixel unit 20, and the second sub-pixel 202 and the third sub-pixel 203 are scanned in sequence in each pixel unit 20, so that the time for scanning each second sub-pixel 202 can be extended, thereby increasing the charging time of the second sub-pixel 202 to improve the color deviation phenomenon.
  • the display panel 100 includes a plurality of pixel units 20 connected to the same data line 10, each of the pixel units 20 includes the first sub-pixel 201, the second sub-pixel 202 and the third sub-pixel 203; wherein, in the display stage of the first type of frame, referring to Figures 3 and 4, the time period during which the third sub-pixel 203 (the red sub-pixel R located in the third row) in the previous pixel unit 20 is turned on (for example, the second pulse pl2 corresponding to the gate line G3 should at least transmit the third data voltage VR) has no intersection with the time period during which the data line 10 transmits the first sub-data voltage VB1 corresponding to the first sub-pixel 201 (the blue sub-pixel B located in the fourth row) in the next pixel unit 20.
  • the discussion here is based on two adjacent pixel units 20. Combined with the above discussion, even if the first sub-pixel 201 is not scanned, the data line 10 still transmits the first data voltage VB.
  • the first data voltage VB corresponding to the first sub-pixel 201 (the blue sub-pixel B located in the 4th row) at least includes the first sub-data voltage VB1 equal to the second data voltage VG.
  • This embodiment stipulates that the time period of the corresponding first sub-data voltage VB1 in the first sub-pixel 201 (the blue sub-pixel B located in the 4th row) cannot coincide with the time period when the third sub-pixel 203 (the red sub-pixel R located in the 3rd row) in the previous pixel unit 20 is turned on, which can avoid the first sub-data voltage VB1 from being mistakenly charged to the third sub-pixel 203 (the red sub-pixel R located in the 3rd row), resulting in the third sub-pixel 203 being unable to achieve the corresponding light-emitting state or not emitting light.
  • the first data voltage VB (for example but not limited to corresponding to the next pixel unit 20) also includes a second sub-data voltage VB2, and the second sub-data voltage VB2 is equal to the third data voltage VR.
  • the third sub-pixel 203 (the red sub-pixel R located in the third row) corresponding to the previous pixel unit 20 is turned on
  • the data line 10 sequentially transmits the third data voltage VR and the second sub-data voltage VB2.
  • the first sub-pixel 201 corresponding to the next pixel unit is turned off, and the data line 10 sequentially transmits the third data voltage VR, the second sub-data voltage VB2, and the first sub-data voltage VB1.
  • the second sub-data voltage VB2 and the first sub-data voltage VB1 in the first data voltage VB are also "lower voltage” and "higher voltage", respectively.
  • the durations occupied by the second sub-data voltage VB2 and the first sub-data voltage VB1 in the first data voltage VB may be equal, and as shown in FIG10, the durations occupied by the second sub-data voltage VB2 and the first sub-data voltage VB1 in the first data voltage VB may also be unequal, and here, only the former is taken as an example that it is smaller than the latter.
  • the first data voltage VB is set to also include a second sub-data voltage VB2 equal to the next pixel unit 20, and when the third sub-pixel 203 (the red sub-pixel R located in the third row) corresponding to the same pixel unit 20 is turned on, the data line 10 transmits the second sub-data voltage VB2 included in the first data voltage VB after transmitting the corresponding third data voltage VR.
  • the data line 10 can also transmit the second sub-data voltage VB2 equal to the third data voltage VR to maintain the second sub-data voltage VB2 equal to the third data voltage VR to continue to act on the third sub-pixel 203, to compensate for the signal attenuation of the third data voltage VR transmitted by the data line 10 in the early stage, thereby improving the reliability of the light emission of the third sub-pixel 203.
  • the second pulse pl2 (for example, corresponding to the red sub-pixel R located in the third row) and the first pulse pl1 (for example, corresponding to the green sub-pixel G located in the fifth row) adjacently set in two adjacent pixel units 20 are set to have a time interval, that is, a scanning blanking time period (the time interval between the above second pulse pl2 and the first pulse pl1) is set between the two adjacent (rows) pixel units 20.
  • the data line 10 can transmit the above-mentioned first sub-data voltage VB1 during the blanking time period.
  • the risk of the first sub-data voltage VB1 being mistakenly charged to the third sub-pixel 203 can be reduced.
  • the display panel 100 includes a plurality of pixel units 20 connected to the same data line 10 .
  • the third data voltage VR (for example but not limited to corresponding to the next pixel unit 20 ) includes a third sub-data voltage and a fourth sub-data voltage (not shown).
  • the difference (the absolute value of the difference) between the third sub-data voltage corresponding to the same pixel unit and the second data voltage VG corresponding to the previous pixel unit 20 is greater than the difference (the absolute value of the difference) between the fourth sub-data voltage and the second data voltage VG.
  • the third sub-pixel 203 red sub-pixel R
  • the data line 10 transmits the third sub-data voltage and the fourth sub-data voltage in sequence.
  • the third data voltage VR corresponding to the third sub-pixel 203 (red sub-pixel R) is set to include, in sequence, a third sub-data voltage that is relatively larger in difference from the second data voltage VG corresponding to the previous pixel unit 20 and a fourth sub-data voltage that is relatively smaller, so that the third sub-data voltage transmitted by the data line 10 can overdrive the third sub-pixel 203 before the fourth sub-data voltage arrives, thereby reducing the amount of signal attenuation of the third data voltage VR transmitted later by the data line 10, thereby improving the reliability of the light emission of the third sub-pixel 203.
  • the third gate driving unit 303 controls the third sub-pixel 203 to be turned off (i.e., the third sub-pixel 203 is not scanned).
  • the third data voltage VR includes at least a fifth sub-data voltage (not shown), and the fifth sub-data voltage corresponding to the same pixel unit is equal to the corresponding second data voltage VG.
  • the data line 10 transmits the second data voltage VG and the corresponding fifth sub-data voltage in sequence.
  • the second gate driving unit 302 outputs the first effective scanning signal to control the second sub-pixel 202 to turn on, that is, it can be considered that the time length for scanning the second sub-pixel 202 within the same time can also include the time originally required for scanning the third sub-pixel 203, thereby increasing the charging time length of the third sub-pixel 203 to improve the color deviation phenomenon; further, combined with the above discussion on the second sub-data voltage VB2, after the second data voltage VG acts on the second sub-pixel 202, the data line 10 can also transmit a fifth sub-data voltage equal to the second data voltage VG, which can make up for the amount of signal attenuation of the second data voltage VG transmitted by the data line 10 in the early stage, thereby improving the reliability of the second sub-pixel 202 emitting light.
  • the present application also provides an electronic device, which may include any display panel as described above.
  • the present application also provides a method for driving a display panel, which is used to drive any of the display panels described above, and in combination with FIG. 2 to FIG. 8 , as shown in FIG. 9 , may include but is not limited to the following steps:
  • controlling the second gate driving unit 302 e.g., corresponding to the gate line G2 to output the first effective scanning signal gate1 to control the second sub-pixel 302 (e.g., corresponding to the green sub-pixel G located in the second row) to turn on, and controlling the second data voltage VG to be loaded to the second sub-pixel 202, so that the second sub-pixel 202 emits light;
  • the first gate driving unit 301 is controlled not to scan the first sub-pixel 201
  • the second gate driving unit 302 is controlled to output a first effective scanning signal to control the second sub-pixel 202 to turn on.
  • the display panel 100 further includes a timing control module connected to the first gate driving unit and the second gate driving unit; wherein, the step S2 may include: S201, in the display stage of the first type of frame, controlling the timing control module to transmit an invalid clock signal to the first gate driving unit so that the first gate driving unit outputs an invalid scanning signal to the first sub-pixel, or controlling the circuit between the timing control module and the first gate driving unit to be disconnected so that the circuit between the first gate driving unit and the first sub-pixel is disconnected.
  • the timing control module can be controlled to transmit an invalid clock signal to the first gate driving unit 301, so that the first gate driving unit 301 outputs an invalid scanning signal to the first sub-pixel 201 and does not scan the first sub-pixel 201, or the first sub-pixel 201 is not scanned by controlling the circuit between the timing control module and the first gate driving unit 301.
  • the present application provides a display panel and a driving method and an electronic device thereof.
  • the first sub-pixel is controlled to be turned off (i.e., the first sub-pixel is not scanned) by controlling the first gate driving unit. That is, it can be considered that the scanning of the first sub-pixel and the second sub-pixel in sequence within the same time is changed to at least not scanning the first sub-pixel within the same time.
  • the time for scanning the second sub-pixel can be extended, that is, the time originally required for scanning the first sub-pixel is utilized, thereby increasing the charging time of the second sub-pixel, thereby improving the color deviation phenomenon and improving the quality of the displayed image.

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Abstract

本申请提供了显示面板及其驱动方法、电子装置，显示面板包括数据线、相邻且连接于同一数据线的第一子像素、第二子像素，在第一类帧的显示阶段，连接于第二子像素的第二栅极驱动单元输出第一有效扫描信号以控制第二子像素开启并加载第二数据电压以发光，连接于第一子像素的第一栅极驱动单元控制第一子像素关闭。

Description

显示面板及其驱动方法、电子装置 技术领域
本申请涉及显示技术领域，尤其涉及显示器件的制造，具体涉及显示面板及其驱动方法、电子装置。
 背景技术
液晶显示器作为目前使用广泛的显示器，目前考虑到数据驱动芯片的成本，可以采用三栅极驱动架构以使数据线数量降为正常驱动架构的1/3，同时扫描线数量增加为正常驱动架构的3倍，使得每个栅极脉冲的宽度和充电时间也降为正常驱动架构的1/3。
在三栅极驱动架构中，如图1所示，R、G、B分别表示红色子像素、绿色子像素和蓝色子像素，由图可知，当显示单色画面或者双色的混色画面时，数据线（D1、D2、D3至Dn中的任一者）所传输的电压的幅值循环处于高低变化状态，即呈现为重载画面，导致源极驱动模块的功耗较大，造成数据线的充电能力降低；加上栅极线（G1、G2、G3至Gn中的任一者）控制的像素驱动电路的开启时长也有所压缩，导致像素的充电时间不足。最终，会造成单色画面或者双色的混色画面存在色偏现象，降低显示画面的质量。
因此，现有的三栅极驱动架构的液晶显示器中存在上述原因造成的单色画面或者双色的混色画面存在色偏现象，急需改进。
 技术问题
本申请的目的在于提供显示面板及其驱动方法、电子装置，以改善现有的三栅极驱动架构的液晶显示器中单色画面或者双色的混色画面中的色偏现象。
 技术解决方案
本申请提供了显示面板，包括：
数据线；
第一子像素和第二子像素，相邻设置且连接于同一所述数据线，所述第一子像素的颜色和所述第二子像素的颜色不同，所述数据线用于依次传输分别对应于所述第一子像素、所述第二子像素的第一数据电压、第二数据电压；
第一栅极驱动单元和第二栅极驱动单元，分别连接于所述第一子像素和所述第二子像素；
其中，在第一类帧的显示阶段，所述第二栅极驱动单元输出第一有效扫描信号以控制所述第二子像素开启并加载所述第二数据电压以发光，所述第一栅极驱动单元控制所述第一子像素关闭
 有益效果
本申请提供了显示面板及其驱动方法、电子装置，在第一类帧的显示阶段，通过控制第一栅极驱动单元控制第一子像素关闭（即不扫描第一子像素），即可以认为在相同的时间内由依次扫描第一子像素和第二子像素，变换为在相同的时间内至少可以不扫描第一子像素，相对而言，扫描第二子像素的时长可以做到有所延长，即利用了原本扫描第一子像素所需的时间，从而可以增加第二子像素的充电时长，以改善色偏现象，提高了显示画面的质量。
 附图说明
下面通过附图来对本申请进行进一步说明。需要说明的是，下面描述中的附图仅仅是用于解释说明本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1为本申请实施例提供的一种具有三栅极驱动的显示面板的俯视视角的架构图。
图2为本申请实施例提供的另一种具有三栅极驱动的显示面板的俯视视角的架构图。
图3和图4分别为本申请实施例提供的两种显示面板的扫描信号的波形图。
图5至图8、图10分别为本申请实施例提供的五种显示面板的数据信号的波形图。
图9为本申请实施例提供的显示面板的驱动方法的流程图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整的描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本申请保护的范围。
在本申请的描述中，术语“第一”、“第二”等仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。另外，还需要说明的是，附图提供的仅仅是和本申请关系比较密切的结构，省略了一些与申请关系不大的细节，目的在于简化附图，使申请点一目了然，而不是表明实际中装置就是和附图一模一样，不作为实际中装置的限制。特别的，本申请提及的“等于”可以但不限于表示两者相等，也可以表示两者的差异非常小，例如两者的差值的绝对值小于一阈值，该阈值可以根据实际情况而设置，意在表示有这样一个“等于”的概念即可。特别的，本申请提及的“上一像素单元”、“下一像素单元”可以理解为，相邻的两像素单元之中，数据线先、后传输“上一像素单元”、“下一像素单元”分别对应的两数据电压。
在本文中提及“实施例”意味着，结合实施例描述的特定特征、结构或特性可以包含在本申请的至少一个实施例中。在说明书中的各个时间位置出现该短语并不一定均是指相同的实施例，也不是与其它实施例互斥的独立的或备选的实施例。本领域技术人员显式地和隐式地理解的是，本文所描述的实施例可以与其它实施例相结合。
本申请提供显示面板，所述显示面板可以包括但不限于以下实施例以及以下实施例的组合。
在一实施例中，结合图2至图8所示，所述显示面板100包括：数据线10；第一子像素201和第二子像素202，相邻设置且连接于同一所述数据线10，所述第一子像素201的颜色和所述第二子像素202的颜色不同，参考图5至图8，所述数据线10用于依次传输分别对应于所述第一子像素201、所述第二子像素202的第一数据电压VB、第二数据电压VG；第一栅极驱动单元301和第二栅极驱动单元302，分别连接于所述第一子像素201和所述第二子像素202；其中，在第一类帧的显示阶段，所述第二栅极驱动单元302输出第一有效扫描信号gate1以控制所述第二子像素202（绿色子像素G）开启，且所述第二数据电压VG控制所述第二子像素202发光，所述第一栅极驱动单元301控制所述第一子像素201（蓝色子像素B）关闭。
其中，第一类帧的显示阶段可以理解为显示第一类帧而依次对不同行的多个子像素进行扫描以控制多个子像素开启所占用的时间段，若每一数据线10连接有循环排列的第一子像素201（蓝色子像素B）和第二子像素202（绿色子像素G），如图2和图3所示，则可以认为每开启一个循环中的第一子像素201和第二子像素202占用时长为T0，开启完所有的“循环”中的第一子像素201和第二子像素202占用的时长为若干个T0。
其中，“所述第一栅极驱动单元301控制所述第一子像素201（蓝色子像素B）关闭”可以理解为不扫描所述第一子像素201（蓝色子像素B），即T0中无需分配时长用于扫描第一子像素201。
其中，显示面板100可以包括多个子像素，多个子像素可以至少包括颜色不同的第一子像素201和第二子像素202，本申请中为便于描述，仅以多个子像素阵列排布、位于同一列的子像素连接于同一数据线10、位于同一行的子像素连接于同一栅极驱动单元30、第一子像素201和第二子像素202分别为蓝色子像素B和绿色子像素G为例进行说明，但以上设置方式并不限于此。进一步的，位于同一行的子像素可以通过同一栅极线40电性连接至对应的栅极驱动单元30，例如第一栅极驱动单元301和第二栅极驱动单元302分别可以通过对应的第一栅极线G4、对应的第二栅极线G5电性连接于对应行的蓝色子像素B、应行的绿色子像素G，栅极线40可以将对应的栅极驱动单元30产生的扫描信号传输至对应行的子像素，若该扫描信号为对应的有效扫描信号，则可以控制对应行的子像素开启，即控制对应行的子像素所对应的多个晶体管开启，以使该行的多个子像素可以分别通过多条数据线10以加载对应的数据电压，从而发光，以分别呈现相应的亮度。
具体的，此处为便于描述，可以认为数据线10由下至上依次传输对应多个子像素的多个数据电压，且分别对应于数据线10依次传输的第一数据电压VB、第二数据电压VG的第一子像素201（蓝色子像素B）、第二子像素202（绿色子像素G）可以分别位于彼此的上一行、下一行，例如图2中的蓝色子像素B位于第4行，绿色子像素G位于第5行。
可以理解的，本实施例中的显示面板100至少具有第一类帧的显示阶段，且在此阶段，基于第二数据电压VG控制第二子像素202发光，第一栅极驱动单元301不扫描所述第一子像素201，第二栅极驱动单元302输出第一有效扫描信号以控制所述第二子像素202开启，即可以认为在相同的时间内由依次扫描第一子像素201和第二子像素202，变换为在相同的时间内至少可以不扫描第一子像素201，相对而言，扫描第二子像素202的时长可以做到有所延长，即利用了原本扫描第一子像素201所需的时间，从而可以增加第二子像素202的充电时长，以改善色偏现象，提高了显示画面的质量。
需要注意的，本实施例中只限定了在第一类帧的显示阶段，第一栅极驱动单元301不扫描所述第一子像素201，但是可以认为数据线10仍然会依次传输第一数据电压VB和第二数据电压VG，并且可以实现至少在第二子像素202开启时间段，数据线至少传输第二数据信号以作用于第二子像素202。
在一实施例中，基于图2至图4所示，显示面板100还包括：时序控制模块，连接于所述第一栅极驱动单元301和所述第二栅极驱动单元302；其中，在所述第一类帧的显示阶段，所述时序控制模块向所述第二栅极驱动单元302传输有效时钟信号，以使所述第二栅极驱动单元302输出所述第一有效扫描信号gate1，所述时序控制模块向所述第一栅极驱动单元301传输无效时钟信号，以使所述第一栅极驱动单元301输出无效扫描信号至所述第一子像素201，或者所述时序控制模块与所述第一栅极驱动单元301之间断路，以使所述第一栅极驱动单元301与所述第一子像素201之间断路。
可以理解的，本实施例中可以通过控制时序控制模块向第一栅极驱动单元301传输无效时钟信号，以使第一栅极驱动单元301输出无效扫描信号至第一子像素201的方式不扫描第一子像素201，可以理解未无效扫描信号中不包括对应的有效脉冲，以实现不扫描第一子像素201；或者通过控制时序控制模块与第一栅极驱动单元301之间断路的方式实现不扫描第一子像素201，例如可以在时序控制模块与第一栅极驱动单元301之间设置例如但不限于为晶体管的开关元件，以控制时序控制模块与第一栅极驱动单元301之间的通路与断路。
在一实施例中，基于图2所示，在第二类帧的显示阶段，所述第一栅极驱动单元301输出第三有效扫描信号以控制所述第一子像素201开启，且所述第一数据电压VB控制所述第一子像素201发光，所述第二栅极驱动单元302输出所述第一有效扫描信号gate1以控制所述第二子像素202开启，且所述第二数据电压VG控制所述第二子像素202发光。
需要注意的是，结合上文论述可知，本申请可以改善第一类帧的显示阶段，可以理解为第二子像素202理论上的发光亮度与第一子像素201理论上的发光亮度（为0）的差异较大，从而导致位于后一行的第二子像素202存在色偏风险的阶段；当然，也存在第二类帧的显示阶段，可以理解为第二子像素202理论上的发光亮度与第一子像素201理论上的发光亮度的差异较小，从而不会导致位于后一行的第二子像素202存在色偏风险的阶段，此时可以正常依次扫描第一子像素201和第二子像素202，并且控制第一子像素201和第二子像素202分别发出具有对应亮度的光线。
在一实施例中，参考图5至图8所示，在所述第一类帧的显示阶段，所述第一数据电压VB至少包括第一子数据电压VB1，所述第一子数据电压VB1等于所述第二数据电压VG，在所述第二子像素202开启时，所述数据线10依次传输所述第一子数据电压VB1、对应的所述第二数据电压VG。可以理解的，本实施例中进一步限定在第一类帧的显示阶段，第一数据电压VB设置为至少包括等于第二数据电压VG的第一子数据电压VB1，即，在第二子像素202开启时，本实施例可以在增加第二子像素202的充电时长的基础上，进一步将数据线10所传输的第一数据电压VB中靠近第二数据电压VG的第一子数据电压VB1，设置为等于第二数据电压VG，使得第二数据电压VG作用于第二子像素之前（即在第二子像素202开启之前），数据线10就可以传输等于第二数据电压VG的第一子数据电压VB1，降低数据线后期所传输的第二数据电压VG的信号衰减的量，从而提高第二子像素202发光的可靠性。
在一实施例中，如图2所示，还包括：第三子像素203，与所述第二子像素202相邻设置且与所述第二子像素202连接于同一所述数据线10，所述第三子像素203的颜色不同于所述第一子像素201的颜色和所述第二子像素202的颜色，所述数据线10用于依次传输分别对应于连续设置的所述第一子像素201、所述第二子像素202和所述第三子像素203的所述第一数据电压VB、所述第二数据电压VG和第三数据电压VR；第三栅极驱动单元303，连接于所述第三子像素203；其中，在所述第一类帧的显示阶段，所述第二子像素202开启后，所述第三栅极驱动单元303输出第二有效扫描信号gate2以控制所述第三子像素203（红色子像素R）开启，所述第三数据电压VR控制所述第三子像素203发光或者不发光，或者所述第三栅极驱动单元303控制所述第三子像素203关闭。
同理，“所述第三栅极驱动单元303控制所述第三子像素203关闭”也可以理解为不扫描所述第三子像素203（红色子像素R），即T0中也无需分配时长用于扫描第三子像素203。
同样的，此处为便于描述，以第三子像素203为红色子像素R为例进行说明，且可以认为第一子像素201（蓝色子像素B）和第三子像素203可以分别位于第二子像素202（绿色子像素G）的上一行、下一行，例如图2中的蓝色子像素B位于第4行，绿色子像素G位于第5行，红色子像素R位于第6行。
可以理解的，在第一类帧的显示阶段，第二栅极驱动单元302输出第一有效扫描信号以控制第二子像素202开启，且第一栅极驱动单元301不扫描第一子像素201的基础上，本实施例中进一步公开了绿色子像素G之后还设有红色子像素R，但是对于在第一类帧的显示阶段，是否扫描第三子像素203（红色子像素R）不做限制。
具体的，参考图3和图4，基于不扫描第一子像素201（可以认为至少扫描第一子像素201的时长，也即第一有效扫描信号gate1的第一脉冲pl1的宽度会增加，对第二有效扫描信号gate2的第二脉冲pl2的宽度是否增加不做限制），此处以扫描第三子像素203（红色子像素R）为例进行举例：
例如图3所示，在第一类帧的显示阶段，第一有效扫描信号gate1中用于控制第二子像素202（绿色子像素G）开启的第一脉冲pl1与第二有效扫描信号gate2中用于控制第三子像素203（红色子像素R）开启的第二脉冲pl2之间可以间隔第一时长t1；又例如图4所示，在第一类帧的显示阶段，第一有效扫描信号gate1中用于控制第二子像素202（绿色子像素G）开启的第一脉冲pl1与第二有效扫描信号gate2中用于控制第三子像素203（红色子像素R）开启的第二脉冲pl2之间可以没有时间间隔。
具体的，此处以在第一类帧的显示阶段，第二数据电压VG为一个较大的值为例进行说明：第二子像素202开启后，第三子像素203（红色子像素R）也可以开启，如图5至图7所示，第三数据电压VR控制第三子像素203不发光（例如第三数据电压VR为一个较小的值），例如图7所示，若第一数据电压VB等于第二数据电压VG，则每一第一类帧的显示阶段数据线10依次传输相等且较高的第一数据电压VB和第二数据电压VG、较低的第三数据电压VR；如图8所示，第三数据电压VR控制第三子像素203发光（例如第三数据电压VR为一个较大的值），则每一第一类帧的显示阶段数据线10依次传输相等且较高的第一数据电压VB、第二数据电压VG和第三数据电压VR这三个数据电压。
在一实施例中，同一所述数据线10连接有多个所述第一子像素201和多个所述第二子像素202，所述数据线10至少用于依次传输每一所述第一数据电压VB、对应的所述第二数据电压VG；其中，在所述第一类帧的显示阶段，多个所述第二栅极驱动单元302分别输出对应的多个所述第一有效扫描信号gate1以控制多个所述第二子像素202依次开启并分别加载对应的所述第二数据电压以发光，每一所述第一栅极驱动单元301控制对应的所述第一子像素201关闭（即不扫描）。如上文论述，可以认为在相同的时间内由交替扫描多个第一子像素201和多个第二子像素202，变换依次扫描多个第二子像素202，使得扫描每一第二子像素202的时长可以做到有所延长，增加了第二子像素202的充电时长，以改善色偏现象。
同样的，若存在第三子像素203，且在第一类帧的显示阶段，多个第三栅极驱动单元303也分别输出对应的多个第二有效扫描信号gate2以控制多个第三子像素203依次开启，可以认为在相同的时间内由依次扫描多个像素单元20，且每一像素单元20中依次扫描第一子像素201、第二子像素202和第三子像素203，变换每一像素单元20中依次扫描第二子像素202和第三子像素203，使得扫描每一第二子像素202的时长可以做到有所延长，增加了第二子像素202的充电时长，以改善色偏现象。
在一实施例中，结合图2至图8所示，显示面板100包括连接于同一所述数据线10的多个像素单元20，每一所述像素单元20包括所述第一子像素201、所述第二子像素202和所述第三子像素203；其中，在所述第一类帧的显示阶段，参考图3和图4，上一所述像素单元20中的所述第三子像素203（位于第3行的红色子像素R）开启的时间段（例如栅极线G3对应的第二脉冲pl2，至少应该传输第三数据电压VR）与所述数据线10传输下一所述像素单元20中的所述第一子像素201（位于第4行的蓝色子像素B）对应的所述第一子数据电压VB1的时间段无交集。
需要注意的是，在所述第一类帧的显示阶段，对应于上一所述像素单元20中的所述第三子像素203（位于第3行的红色子像素R）开启并加载对应的所述第三数据电压VR，且对应的所述第三数据电压VR不等于所述第一子数据电压VB1时，由于数据线10所传输的对应于上一像素单元20中的第三数据电压VR、对应于下一像素单元中的第一子数据电压VB1相邻设置且不相等，容易对彼此的子像素的发光亮度造成干涉。
具体的，此处基于相邻两像素单元20进行论述，结合上文论述，即使不扫描第一子像素201，但是数据线10仍然传输第一数据电压VB，例如对应于第一子像素201（位于第4行的蓝色子像素B）的第一数据电压VB至少包括等于第二数据电压VG的第一子数据电压VB1，本实施例进一步限定第一子像素201（位于第4行的蓝色子像素B）中对应的第一子数据电压VB1所处的时间段不能和上一像素单元20中的第三子像素203（位于第3行的红色子像素R）开启的时间段重合，可以避免第一子数据电压VB1错充到第三子像素203（位于第3行的红色子像素R），导致第三子像素203无法实现对应的发光情况或者不发光。
在一实施例中，参考图5和图10所示，在所述第一类帧的显示阶段，（例如但不限于对应于下一所述像素单元20的）所述第一数据电压VB还包括第二子数据电压VB2，所述第二子数据电压VB2等于所述第三数据电压VR，在对应于上一所述像素单元20中的所述第三子像素203（位于第3行的红色子像素R）开启时，所述数据线10依次传输所述第三数据电压VR、所述第二子数据电压VB2。进一步的，结合上文论述，对应于下一所述像素单元中的第一子像素201关闭，且数据线10依次传输第三数据电压VR、第二子数据电压VB2、第一子数据电压VB1。
具体的，如图10所示，此处以对应于上一像素单元20的第三数据电压VR为“较低的电压”、对应于下一像素单元的第二数据电压VG为“较高的电压”为例，则第一数据电压VB中的第二子数据电压VB2、第一子数据电压VB1也分别为“较低的电压”、“较高的电压”。并且，例如图5所示，第一数据电压VB中的第二子数据电压VB2、第一子数据电压VB1所占的时长可以相等，又例如图10所示，第一数据电压VB中的第二子数据电压VB2、第一子数据电压VB1所占的时长也可以不相等，此处仅以前者小于后者为例示意。
可以理解的，本实施例中将第一数据电压VB设置为还包括等于对应于下一像素单元20的第二子数据电压VB2，并且在对应于同一像素单元20中的第三子像素203（位于第3行的红色子像素R）开启时，数据线10在传输对应的第三数据电压VR之后，还会传输包含于第一数据电压VB中的第二子数据电压VB2，同理，可以在第三数据电压VR作用于第三子像素203之后，数据线10还可以传输等于第三数据电压VR的第二子数据电压VB2，以维持等于第三数据电压VR的第二子数据电压VB2继续作用于第三子像素203，弥补数据线10前期所传输的第三数据电压VR的信号衰减的量，从而提高第三子像素203发光的可靠性。
在一实施例中，结合图2和图3所示，在所述第一类帧的显示阶段，上一所述像素单元20中的所述第三子像素203（位于第3行的红色子像素R，对应栅极线G3）开启的结束时刻、下一所述像素单元20中的所述第二子像素202（位于第5行的绿色子像素G，对应栅极线G5）开启的起始时刻之间具有时间间隔。具体的，如图3所示，结合上文论述可知，本实施例将相邻两像素单元20中相邻设置的第二脉冲pl2（例如对应位于第3行的红色子像素R）和第一脉冲pl1（例如对应位于第5行的绿色子像素G）设置为具有时间间隔，也即在相邻两（行）像素单元20之间设置扫描的消隐时间段（以上第二脉冲pl2和第一脉冲pl1之间的时间间隔），例如数据线10可以在消隐时间段传输上文提及的第一子数据电压VB1，在降低数据线后期所传输的第二数据电压VG的信号衰减的量，从而提高第二子像素202发光的可靠性的基础上，可以降低第一子数据电压VB1错充到第三子像素203（位于第3行的红色子像素R）的风险。
在一实施例中，基于图2所示，即显示面板100包括连接于同一所述数据线10的多个像素单元20，在所述第一类帧的显示阶段，不同于图6中的第三数据电压VR为恒定值，（例如但不限于对应于下一所述像素单元20的）所述第三数据电压VR包括第三子数据电压和第四子数据电压（未示意），对应于同一所述像素单元的所述第三子数据电压与对应于上一所述像素单元20的所述第二数据电压VG的差异（差值的绝对值），大于所述第四子数据电压与所述第二数据电压VG的差异（差值的绝对值），在所述第三子像素203（红色子像素R）开启时，所述数据线10依次传输所述第三子数据电压、所述第四子数据电压。
可以理解的，本实施例中将第三子像素203（红色子像素R）对应的第三数据电压VR设置为依次包括与对应于上一像素单元20中的第二数据电压VG的差异相对而言较大的第三子数据电压、较小的第四子数据电压，使得数据线10传输的第三子数据电压可以在第四子数据电压到来之前对第三子像素203进行过驱动，降低数据线10后期所传输的第三数据电压VR的信号衰减的量，从而提高第三子像素203发光的可靠性。
在一实施例中，基于图2所示，在所述第一类帧的显示阶段，所述第三栅极驱动单元303控制所述第三子像素203关闭（即不扫描所述第三子像素203），不同于图5至图8中的第三数据电压VR为对应于第三子像素203，所述第三数据电压VR至少包括第五子数据电压（未示意），对应于同一所述像素单元的所述第五子数据电压等于对应的所述第二数据电压VG，在所述第二子像素202开启以及所述第三子像素203关闭时，所述数据线10依次传输所述第二数据电压VG、对应的所述第五子数据电压。
可以理解的，由于第三栅极驱动单元303不扫描第三子像素203，第二栅极驱动单元302输出第一有效扫描信号以控制所述第二子像素202开启，即可以认为在相同的时间内扫描第二子像素202的时长还可以包括原本扫描第三子像素203所需的时间，从而可以增加第三子像素203的充电时长，以改善色偏现象；进一步的，结合上文关于第二子数据电压VB2的论述，在第二数据电压VG作用于第二子像素202之后，数据线10还可以传输等于第二数据电压VG的第五子数据电压，可以弥补数据线10前期所传输的第二数据电压VG的信号衰减的量，从而提高第二子像素202发光的可靠性。
本申请还提供电子装置，所述电子装置可以包括如上文任一所述的显示面板。
本申请还提供显示面板的驱动方法，用于驱动如上文任一所述的显示面板，结合图2至图8，如图9所示，可以包括但不限于如下步骤：
S1，在所述第一类帧的显示阶段，控制所述第二栅极驱动单元302（例如对应栅极线G2）输出所述第一有效扫描信号gate1以控制所述第二子像素302（例如对应位于第2行的绿色子像素G）开启，且控制所述第二数据电压VG加载至所述第二子像素202，以使所述第二子像素202发光；
S2，在所述第一类帧的显示阶段，控制所述第一栅极驱动单元301控制所述第一子像素201关闭。
可以理解的，在第一类帧的显示阶段，控制第一栅极驱动单元301不扫描第一子像素201，并且控制第二栅极驱动单元302输出第一有效扫描信号以控制第二子像素202开启，结合上文论述可知，可以实现扫描第二子像素202的时长有所延长，从而可以增加第二子像素202的充电时长，以改善色偏现象，提高了显示画面的质量。
在一实施例中，基于图2所示，所述显示面板100还包括连接于所述第一栅极驱动单元和所述第二栅极驱动单元的时序控制模块；其中，所述步骤S2可以包括：S201，在所述第一类帧的显示阶段，控制所述时序控制模块向所述第一栅极驱动单元传输无效时钟信号，以使所述第一栅极驱动单元输出无效扫描信号至所述第一子像素，或者控制所述时序控制模块与所述第一栅极驱动单元之间断路，以使所述第一栅极驱动单元与所述第一子像素之间断路。
具体的，参照上文论述可知，在第一类帧的显示阶段，可以通过控制时序控制模块向第一栅极驱动单元301传输无效时钟信号，以使第一栅极驱动单元301输出无效扫描信号至第一子像素201的方式不扫描第一子像素201，或者通过控制时序控制模块与第一栅极驱动单元301之间断路的方式实现不扫描第一子像素201。
本申请提供了显示面板及其驱动方法、电子装置，在第一类帧的显示阶段，通过控制第一栅极驱动单元控制第一子像素关闭（即不扫描第一子像素），即可以认为在相同的时间内由依次扫描第一子像素和第二子像素，变换为在相同的时间内至少可以不扫描第一子像素，相对而言，扫描第二子像素的时长可以做到有所延长，即利用了原本扫描第一子像素所需的时间，从而可以增加第二子像素的充电时长，以改善色偏现象，提高了显示画面的质量。
以上对本申请实施例所提供的显示面板及其驱动方法、电子装置进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (20)

  1. 一种显示面板，其中，包括：
    数据线；
    第一子像素和第二子像素，相邻设置且连接于同一所述数据线，所述第一子像素的颜色和所述第二子像素的颜色不同，所述数据线用于依次传输分别对应于所述第一子像素、所述第二子像素的第一数据电压、第二数据电压；
    第一栅极驱动单元和第二栅极驱动单元，分别连接于所述第一子像素和所述第二子像素；
    其中，在第一类帧的显示阶段，所述第二栅极驱动单元输出第一有效扫描信号以控制所述第二子像素开启并加载所述第二数据电压以发光，所述第一栅极驱动单元控制所述第一子像素关闭。
  2. 如权利要求1所述的显示面板，其中，在所述第一类帧的显示阶段，所述第一数据电压至少包括第一子数据电压，所述第一子数据电压等于所述第二数据电压，在所述第二子像素开启时，所述数据线依次传输所述第一子数据电压、对应的所述第二数据电压。
  3. 如权利要求2所述的显示面板，其中，还包括：
    第三子像素，与所述第二子像素相邻设置且与所述第二子像素连接于同一所述数据线，所述第三子像素的颜色不同于所述第一子像素的颜色和所述第二子像素的颜色，所述数据线用于依次传输分别对应于连续设置的所述第一子像素、所述第二子像素和所述第三子像素的所述第一数据电压、所述第二数据电压和第三数据电压；
    第三栅极驱动单元，连接于所述第三子像素；
    其中，在所述第一类帧的显示阶段，所述第二子像素开启后，所述第三栅极驱动单元输出第二有效扫描信号以控制所述第三子像素开启并加载所述第三数据电压，或者所述第三栅极驱动单元控制所述第三子像素关闭。
  4. 如权利要求3所述的显示面板，其中，包括连接于同一所述数据线的多个像素单元，每一所述像素单元包括所述第一子像素、所述第二子像素和所述第三子像素；
    其中，在所述第一类帧的显示阶段，上一所述像素单元中的所述第三子像素开启的时间段与所述数据线传输下一所述像素单元中的所述第一子像素对应的所述第一子数据电压的时间段无交集。
  5. 如权利要求4所述的显示面板，其中，在所述第一类帧的显示阶段，所述第一数据电压还包括第二子数据电压，所述第二子数据电压等于所述第三数据电压，在对应于上一所述像素单元中的所述第三子像素开启以及对应于下一所述像素单元中的所述第一子像素关闭时，所述数据线依次传输所述第三数据电压、所述第二子数据电压、所述第一子数据电压。
  6. 如权利要求4所述的显示面板，其中，在所述第一类帧的显示阶段，上一所述像素单元中的所述第三子像素开启的结束时刻与下一所述像素单元中的所述第二子像素开启的起始时刻之间具有时间间隔。
  7. 如权利要求3所述的显示面板，其中，包括连接于同一所述数据线的多个像素单元，每一所述像素单元包括所述第一子像素、所述第二子像素和所述第三子像素；
    其中，在所述第一类帧的显示阶段，所述第三数据电压包括第三子数据电压和第四子数据电压，对应于同一所述像素单元的所述第三子数据电压与所述第二数据电压的差值的绝对值，大于所述第四子数据电压与所述第二数据电压的差值，在所述第三子像素开启时，所述数据线依次传输所述第三子数据电压、所述第四子数据电压。
  8. 如权利要求3所述的显示面板，其中，包括连接于同一所述数据线的多个像素单元，每一所述像素单元包括所述第一子像素、所述第二子像素和所述第三子像素；
    其中，在所述第一类帧的显示阶段，所述第三栅极驱动单元控制所述第三子像素关闭，所述第三数据电压至少包括第五子数据电压，对应于同一所述像素单元的所述第五子数据电压等于所述第二数据电压，在所述第二子像素开启以及所述第三子像素关闭时，所述数据线依次传输所述第二数据电压、对应的所述第五子数据电压。
  9. 如权利要求1所述的显示面板，其中，同一所述数据线连接有多个所述第一子像素和多个所述第二子像素，所述数据线至少用于依次传输所述第一数据电压和所述第二数据电压；
    其中，在所述第一类帧的显示阶段，多个所述第二栅极驱动单元分别输出对应的多个所述第一有效扫描信号以控制多个所述第二子像素依次开启并分别加载对应的所述第二数据电压以发光，每一所述第一栅极驱动单元控制对应的所述第一子像素关闭。
  10. 如权利要求1所述的显示面板，其中，还包括：
    时序控制模块，连接于所述第一栅极驱动单元和所述第二栅极驱动单元；
    其中，在所述第一类帧的显示阶段，所述时序控制模块向所述第二栅极驱动单元传输有效时钟信号，以使所述第二栅极驱动单元输出所述第一有效扫描信号，所述时序控制模块向所述第一栅极驱动单元传输无效时钟信号，以使所述第一栅极驱动单元输出无效扫描信号至所述第一子像素，或者所述时序控制模块与所述第一栅极驱动单元之间断路，以使所述第一栅极驱动单元与所述第一子像素之间断路
  11. 如权利要求1所述的显示面板，其中，在第二类帧的显示阶段，所述第一栅极驱动单元输出第三有效扫描信号以控制所述第一子像素开启并加载所述第一数据电压以发光，所述第二栅极驱动单元输出所述第一有效扫描信号以控制所述第二子像素开启并加载所述第二数据电压以发光。
  12. 一种显示面板的驱动方法，其中，用于驱动如权利要求1所述的显示面板，包括：
    在所述第一类帧的显示阶段，控制所述第二栅极驱动单元输出所述第一有效扫描信号以控制所述第二子像素开启，且控制所述第二数据电压加载至所述第二子像素，以使所述第二子像素发光；
    在所述第一类帧的显示阶段，控制所述第一栅极驱动单元控制所述第一子像素关闭。
  13. 如权利要求12所述的显示面板的驱动方法，其中，所述显示面板还包括连接于所述第一栅极驱动单元和所述第二栅极驱动单元的时序控制模块；
    其中，所述的在所述第一类帧的显示阶段，控制所述第一栅极驱动单元控制所述第一子像素关闭的步骤，包括：
    在所述第一类帧的显示阶段，控制所述时序控制模块向所述第一栅极驱动单元传输无效时钟信号，以使所述第一栅极驱动单元输出无效扫描信号至所述第一子像素，或者控制所述时序控制模块与所述第一栅极驱动单元之间断路，以使所述第一栅极驱动单元与所述第一子像素之间断路。
  14. 一种电子装置，其中，包括如权利要求1所述的显示面板。
  15. 如权利要求14所述的电子装置，其中，在所述第一类帧的显示阶段，所述第一数据电压至少包括第一子数据电压，所述第一子数据电压等于所述第二数据电压，在所述第二子像素开启时，所述数据线依次传输所述第一子数据电压、对应的所述第二数据电压。
  16. 如权利要求15所述的电子装置，其中，还包括：
    第三子像素，与所述第二子像素相邻设置且与所述第二子像素连接于同一所述数据线，所述第三子像素的颜色不同于所述第一子像素的颜色和所述第二子像素的颜色，所述数据线用于依次传输分别对应于连续设置的所述第一子像素、所述第二子像素和所述第三子像素的所述第一数据电压、所述第二数据电压和第三数据电压；
    第三栅极驱动单元，连接于所述第三子像素；
    其中，在所述第一类帧的显示阶段，所述第二子像素开启后，所述第三栅极驱动单元输出第二有效扫描信号以控制所述第三子像素开启并加载所述第三数据电压，或者所述第三栅极驱动单元控制所述第三子像素关闭。
  17. 如权利要求16所述的电子装置，其中，包括连接于同一所述数据线的多个像素单元，每一所述像素单元包括所述第一子像素、所述第二子像素和所述第三子像素；
    其中，在所述第一类帧的显示阶段，上一所述像素单元中的所述第三子像素开启的时间段与所述数据线传输下一所述像素单元中的所述第一子像素对应的所述第一子数据电压的时间段无交集。
  18. 如权利要求17所述的电子装置，其中，在所述第一类帧的显示阶段，所述第一数据电压还包括第二子数据电压，所述第二子数据电压等于所述第三数据电压，在对应于上一所述像素单元中的所述第三子像素开启以及对应于下一所述像素单元中的所述第一子像素关闭时，所述数据线依次传输所述第三数据电压、所述第二子数据电压、所述第一子数据电压。
  19. 如权利要求17所述的电子装置，其中，在所述第一类帧的显示阶段，上一所述像素单元中的所述第三子像素开启的结束时刻与下一所述像素单元中的所述第二子像素开启的起始时刻之间具有时间间隔。
  20. 如权利要求17所述的电子装置，其中，包括连接于同一所述数据线的多个像素单元，每一所述像素单元包括所述第一子像素、所述第二子像素和所述第三子像素；
    其中，在所述第一类帧的显示阶段，所述第三数据电压包括第三子数据电压和第四子数据电压，对应于同一所述像素单元的所述第三子数据电压与所述第二数据电压的差值的绝对值，大于所述第四子数据电压与所述第二数据电压的差值，在所述第三子像素开启时，所述数据线依次传输所述第三子数据电压、所述第四子数据电压。
PCT/CN2023/085718 2023-03-17 2023-03-31 显示面板及其驱动方法、电子装置 Ceased WO2024192811A1 (zh)

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