WO2024125227A1 - 一种电压合成式Doherty功率放大器 - Google Patents

一种电压合成式Doherty功率放大器 Download PDF

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Publication number
WO2024125227A1
WO2024125227A1 PCT/CN2023/132878 CN2023132878W WO2024125227A1 WO 2024125227 A1 WO2024125227 A1 WO 2024125227A1 CN 2023132878 W CN2023132878 W CN 2023132878W WO 2024125227 A1 WO2024125227 A1 WO 2024125227A1
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Prior art keywords
power amplifier
network
capacitor
input
transformer
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PCT/CN2023/132878
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English (en)
French (fr)
Inventor
彭艳军
宣凯
郭嘉帅
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深圳飞骧科技股份有限公司
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Publication of WO2024125227A1 publication Critical patent/WO2024125227A1/zh

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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • the present invention relates to the field of circuit technology, and in particular to a voltage synthesis type Doherty power amplifier.
  • RF power amplifiers have specific optimal load impedances.
  • the load is fixed, and the maximum output voltage and current swings are only achieved at the peak output power.
  • the efficiency is the highest at the peak power point, and the efficiency decreases rapidly when the power is backed off.
  • Doherty technology is based on load modulation at the output end.
  • the size of the output load is determined by the size of the carrier power amplifier and the peak power amplifier current ratio.
  • the load impedance is dynamically adjusted. According to the size of the load impedance value after modulation, the maximum efficiency can be achieved at different power points. It is the preferred solution for amplifying high peak-to-average ratio signals. Therefore, the Doherty structure is a common method for designing RF power amplifiers.
  • the Doherty power amplifier of the related art generally adopts a current synthesis structure and a voltage synthesis structure.
  • the Doherty power amplifier adopting the current synthesis structure is composed of two amplifiers, a carrier power amplifier and a peak power amplifier, connected in parallel.
  • the carrier power amplifier works in class AB
  • the peak power amplifier works in class C.
  • the load impedance matching network transforms the load Z L to R opt /2 (R opt is the optimal output impedance when the output power of the carrier power amplifier and the peak power amplifier is the maximum).
  • R opt is the optimal output impedance when the output power of the carrier power amplifier and the peak power amplifier is the maximum.
  • the Doherty power amplifier As the input power increases, when the output power of the carrier power amplifier approaches the saturation power, the efficiency of the carrier power amplifier reaches the first peak point, and the peak power amplifier is turned on at the same time.
  • the carrier power amplifier and the peak power amplifier work at the same time, and the Doherty power amplifier enters a high power mode.
  • the output power is the power obtained by synthesizing the output power of the carrier power amplifier and the peak power amplifier.
  • the load impedance of the carrier power amplifier gradually changes from 2R opt to R opt
  • the load impedance of the peak power amplifier gradually changes from infinity to R opt .
  • the Doherty power amplifier works in high power mode, its maximum output power is ⁇ 6dB higher than that in low power mode.
  • Load modulation is achieved by The Doherty power amplifier works in low power mode, the peak power amplifier is turned off, and the output impedance is infinite. After the quarter-wavelength transmission line transformation, the impedance is transformed into zero ohm, and the load impedance of the carrier power amplifier output is 2R opt . As the input power increases, the peak power amplifier is turned on, the carrier power amplifier and the peak power amplifier work at the same time, and the Doherty power amplifier enters the high power mode.
  • the load impedance of the carrier power amplifier gradually changes from 2R opt to R opt
  • the load impedance of the peak power amplifier gradually changes from infinity to R opt .
  • the outputs of the carrier power amplifier and the peak power amplifier are superimposed and power synthesized through the transformer.
  • the load impedance Z L needs to be transformed from 50 ohms to R opt /2
  • the voltage synthesis Doherty power amplifier only needs to be transformed from 50 ohms to 2R opt , which reduces the impedance transformation ratio and increases the bandwidth.
  • the peak power amplifier of the Doherty power amplifier of the related art is biased in class C, and the carrier power amplifier is biased in class AB, and the power gain of the peak power amplifier is lower than that of the carrier power amplifier.
  • the Doherty power amplifier operates in high output power mode, the load of the peak power amplifier is not modulated to a sufficiently low level, resulting in a small maximum output power, and the load impedance of the carrier power amplifier and the peak power amplifier cannot be fully modulated.
  • the combined output power of the carrier power amplifier and the peak power amplifier is lower than when the load is fully modulated, and the amplitude-amplitude modulation (AM-AM) characteristics are also deteriorated.
  • AM-AM amplitude-amplitude modulation
  • the load faced by the carrier power amplifier is pulled down early when the power is backed off, and the efficiency is also lowered.
  • the third-order intermodulation terms of the carrier power amplifier and the peak power amplifier cannot achieve ideal cancellation, and the linearity of the Doherty power amplifier is also deteriorated.
  • the present invention proposes a novel voltage synthesis Doherty power amplifier with self-distribution of input power.
  • the embodiment of the present invention provides a voltage synthesis A voltage synthesis Doherty power amplifier, wherein the voltage synthesis Doherty power amplifier comprises an adaptive input power divider, a power amplifier network and a voltage synthesis power synthesis network;
  • the adaptive input power divider includes a first capacitor, a second capacitor and a first inductor
  • the power amplifier network includes a first phase compensation network, a first input matching network, a carrier power amplifier, a second phase compensation network, a second input matching network, a peak power amplifier and an impedance inversion network;
  • the first phase compensation network is used to connect the input signal and shift the phase of the input signal
  • the first input matching network is used to achieve input impedance matching
  • the carrier power amplifier is used to amplify the power of the signal
  • the second phase compensation network is used to shift the phase of the input signal
  • the second input matching network is used to achieve input impedance matching
  • the peak power amplifier is used to amplify the power of the signal
  • the impedance inversion network is used to invert the input impedance
  • the voltage synthesis type power synthesis network includes a balun transformer unit and a port impedance transformation network, and the port impedance transformation network is used to achieve output impedance matching;
  • the first end of the first capacitor is used as the input end of the voltage synthesis Doherty power amplifier, and the first end of the first capacitor is respectively connected to the first end of the first inductor and the input end of the first phase compensation network; the second end of the first capacitor is grounded;
  • the output end of the first phase compensation network is connected to the input end of the first input matching network, the output end of the first input matching network is connected to the input end of the carrier power amplifier, the output end of the carrier power amplifier is connected to the input end of the second phase compensation network, and the output end of the second phase compensation network is connected to the first end of the primary coil of the balun transformer unit;
  • the second end of the first inductor is connected to the first end of the second capacitor and the input end of the second input matching network respectively; the second end of the second capacitor is grounded;
  • the output end of the second input matching network is connected to the input end of the peak power amplifier, the output end of the peak power amplifier is connected to the input end of the impedance inversion network, and the output end of the impedance inversion network is connected to the second end of the primary coil of the balun transformer unit;
  • a first end of the secondary coil of the balun transformer unit is connected to the input end of the port impedance transformation network, and a second end of the secondary coil of the balun transformer unit is grounded;
  • the output end of the port impedance conversion network serves as the output end of the voltage synthesis Doherty power amplifier.
  • the carrier power amplifier includes a first transformer, a third capacitor, a fourth capacitor, a first power amplifier, a third power amplifier and a fourth power amplifier;
  • the output end of the carrier power amplifier comprises two output ends, namely a first output end of the carrier power amplifier and a second output end of the carrier power amplifier;
  • the input end of the first power amplifier serves as the input end of the carrier power amplifier, and the output end of the first power amplifier is connected to the first end of the primary coil of the first transformer;
  • the second end of the primary coil of the first transformer is grounded, and the middle tap end of the primary coil of the first transformer is connected to a power supply voltage;
  • a first end of the secondary coil of the first transformer is connected to an input end of the third power amplifier and a first end of the fourth capacitor respectively;
  • the second end of the secondary coil of the first transformer is connected to the input end of the fourth power amplifier and the second end of the fourth capacitor respectively;
  • the middle tap end of the secondary coil of the first transformer is connected to the first end of the third capacitor; the second end of the third capacitor is grounded;
  • the output end of the third power amplifier serves as the first output end of the carrier power amplifier
  • the output end of the fourth power amplifier serves as the second output end of the carrier power amplifier.
  • the second phase compensation network comprises a seventh capacitor, an eighth capacitor, a first reactance element and a second reactance element, and the first reactance element and the second reactance element are both used to adjust the circuit passband;
  • the input end of the second phase compensation network includes two, which are respectively a first input end of the second phase compensation network and a second input end of the second phase compensation network;
  • the output end of the second phase compensation network includes two, which are respectively a first input end of the second phase compensation network and a second input end of the second phase compensation network; a first output terminal of the phase compensation network and a second output terminal of the second phase compensation network;
  • the first end of the seventh capacitor serves as the first input end of the second phase compensation network, and the first end of the seventh capacitor is connected to the first end of the first reactance element;
  • the second end of the first reactance element serves as the first output end of the second phase compensation network, and the second end of the first reactance element is connected to the first end of the eighth capacitor;
  • the second end of the seventh capacitor serves as the second input end of the second phase compensation network, and the second end of the seventh capacitor is connected to the first end of the second reactance element;
  • the second end of the second reactance element serves as the second output end of the second phase compensation network, and the second end of the second reactance element is connected to the second end of the eighth capacitor.
  • the peak power amplifier comprises a second transformer, a fifth capacitor, a sixth capacitor, a second power amplifier, a fifth power amplifier and a sixth power amplifier;
  • the output end of the peak power amplifier comprises two output ends, namely a first output end of the peak power amplifier and a second output end of the peak power amplifier;
  • the input end of the second power amplifier serves as the input end of the peak power amplifier, and the output end of the second power amplifier is connected to the first end of the primary coil of the second transformer;
  • a second end of the primary coil of the second transformer is grounded, and a middle tap end of the primary coil of the second transformer is connected to the power supply voltage;
  • a first end of the secondary coil of the second transformer is connected to an input end of the fifth power amplifier and a first end of the sixth capacitor respectively;
  • the second end of the secondary coil of the second transformer is connected to the input end of the sixth power amplifier and the second end of the sixth capacitor respectively;
  • the middle tap end of the secondary coil of the second transformer is connected to the first end of the fifth capacitor; the second end of the third capacitor is grounded;
  • the output end of the fifth power amplifier serves as the first output end of the peak power amplifier
  • the output end of the sixth power amplifier serves as the second output end of the peak power amplifier.
  • the impedance inversion network comprises a ninth capacitor, a tenth capacitor, a second inductor, a third inductor, a third reactance element and a fourth reactance element, and the third reactance element and the fourth reactance element are both used to adjust the circuit passband;
  • the input end of the impedance inversion network includes two and they are respectively the first input end of the impedance inversion network and the second input end of the impedance inversion network;
  • the output end of the impedance inversion network includes two and they are respectively the first output end of the impedance inversion network and the second output end of the impedance inversion network;
  • the first end of the ninth capacitor serves as the first input end of the impedance inversion network, and the first end of the ninth capacitor is connected to the first end of the third reactance element;
  • the second end of the third reactance element is connected to the first end of the second inductor
  • the second end of the second inductor serves as the first output end of the impedance inversion network, and the second end of the second inductor is connected to the first end of the tenth capacitor;
  • the second end of the ninth capacitor serves as the second input end of the impedance inversion network, and the second end of the ninth capacitor is connected to the first end of the fourth reactance element;
  • the second end of the fourth reactance element is connected to the first end of the third inductor
  • the second end of the third inductor serves as the second output end of the impedance inversion network, and the second end of the third inductor is connected to the second end of the tenth capacitor.
  • the balun transformer unit includes a third transformer and a fourth transformer;
  • the first end of the primary coil of the balun transformer unit includes two ends, which are respectively the first end of the primary coil of the third transformer and the second end of the primary coil of the third transformer;
  • a middle tap end of the primary coil of the third transformer is connected to the power supply voltage
  • the first end of the secondary coil of the third transformer serves as the first end of the secondary coil of the balun transformer unit
  • the second end of the secondary coil of the third transformer is connected to the first end of the secondary coil of the fourth transformer;
  • the second end of the primary coil of the balun transformer unit includes two terminals, which are the first end of the primary coil of the fourth transformer and the primary coil of the fourth transformer.
  • a middle tap end of the primary coil of the fourth transformer is connected to the power supply voltage
  • the second end of the secondary coil of the fourth transformer serves as the second end of the secondary coil of the balun transformer unit, and the second end of the secondary coil of the fourth transformer is grounded.
  • the port impedance transformation network is an eleventh capacitor, and the first end of the eleventh capacitor serves as the input end of the port impedance transformation network; the first end of the eleventh capacitor is grounded.
  • the carrier power amplifier has the same circuit structure as the peak power amplifier, and each component included in the carrier power amplifier corresponds one-to-one to each component included in the peak power amplifier, and the component performance and size are the same.
  • the optimal impedance of the carrier power amplifier and the optimal impedance of the peak power amplifier are both R opt ;
  • the first power amplifier, the second power amplifier, the third power amplifier, the fourth power amplifier, the fifth power amplifier and the sixth power amplifier are all implemented using transistors.
  • the voltage synthesis Doherty power amplifier of the present invention is provided with an adaptive input power divider, a power amplifier network and a voltage synthesis power synthesis network, wherein the adaptive input power divider includes a first capacitor, a second capacitor and a first inductor; the power amplifier network includes a first phase compensation network, a first input matching network, a carrier power amplifier, a second phase compensation network, a second input matching network, a peak power amplifier and an impedance inversion network; when the voltage synthesis Doherty power amplifier operates in a low power mode, the input power is in a low input power range, the peak power amplifier is turned off, and most of the input power is input to the carrier power amplifier.
  • the adaptive input power divider includes a first capacitor, a second capacitor and a first inductor
  • the power amplifier network includes a first phase compensation network, a first input matching network, a carrier power amplifier, a second phase compensation network, a second input matching network, a peak power amplifier and an impedance inversion network; when the
  • the input power is in the high input power range
  • the carrier power amplifier enters the saturated amplification state
  • most of the input power is input into the peak power amplifier, thereby increasing the gain of the peak power amplifier.
  • This circuit enables the voltage synthesis Doherty power amplifier of the present invention to dynamically control the power of the carrier power amplifier and the peak power amplifier input into the power amplifier network, and controls the power flowing into the carrier power amplifier and the peak power amplifier according to the input power, thereby making the power amplification efficiency of the voltage synthesis Doherty power amplifier of the present invention high.
  • the self-distribution and pre-distortion functions of the input power are realized by the adaptive input power divider with variable power distribution ratio, and the output power of the voltage synthesis Doherty power amplifier is linearized.
  • FIG1 is a schematic diagram of the circuit structure of a voltage synthesis Doherty power amplifier of the present invention.
  • FIG2 is a schematic diagram of the application circuit structure of the voltage synthesis Doherty power amplifier of the present invention.
  • FIG3 is a circuit diagram of a voltage synthesis Doherty power amplifier according to the present invention.
  • FIG. 4 is a schematic diagram of an adaptive input power divider of a voltage synthesis Doherty power amplifier according to an embodiment of the present invention.
  • the embodiment of the present invention provides a voltage synthesis Doherty power amplifier 100 .
  • FIG. 1 is a schematic diagram of the circuit structure of a voltage synthesis Doherty power amplifier 100 of the present invention
  • FIG. 2 is a schematic diagram of the application circuit structure of the voltage synthesis Doherty power amplifier 100 of the present invention.
  • the voltage synthesis Doherty power amplifier 100 includes an adaptive input power divider 1 , a power amplifier network 2 and a voltage synthesis power synthesis network 3 .
  • the adaptive input power divider 1 includes a first capacitor C1, a second capacitor C2 and a first inductor L1.
  • the voltage synthesis Doherty power amplifier 100 implements a predistortion function through an adaptive input power divider 1 with a variable power division ratio, thereby linearizing the output power of the voltage synthesis Doherty power amplifier 100.
  • the power amplifier network 2 includes a first phase compensation network 21, a first input matching network 22, a carrier power amplifier 23, a second phase compensation network 24, a second input matching network 25, a peak power amplifier 26 and an impedance inversion network 27.
  • the first phase compensation network 21 is used to shift the phase of the input signal.
  • the first input matching network 22 is used for input impedance matching.
  • the carrier power amplifier 23 is used for signal amplification.
  • the second phase compensation network 24 is used to shift the phase of the input signal, and the second input matching network 25 is used for input impedance matching.
  • the peak power amplifier 26 is used for signal amplification.
  • the impedance inversion network 27 is used to invert the input impedance.
  • the voltage synthesis type power synthesis network 3 includes a balun transformer unit 31 and a port impedance transformation network 32 .
  • the port impedance transformation network 32 is used to match the output impedance.
  • the circuit connection relationship of the voltage synthesis Doherty power amplifier 100 is as follows: the first end of the first capacitor C1 serves as the input end RFin of the voltage synthesis Doherty power amplifier 100, and the first end of the first capacitor C1 is respectively connected to the first end of the first inductor L1 and the input end of the first phase compensation network 21. The second end of the first capacitor C1 is grounded GND.
  • the output end of the first phase compensation network 21 is connected to the input end of the first input matching network 22, the output end of the first input matching network 22 is connected to the input end of the carrier power amplifier 23, the output end of the carrier power amplifier 23 is connected to the input end of the second phase compensation network 24, and the output end of the second phase compensation network 24 is connected to the first end of the primary coil LP1 of the balun transformer unit 31.
  • the second end of the first inductor L1 is respectively connected to the first end of the second capacitor C2 and the input end of the second input matching network 25.
  • the second end of the second capacitor C2 is grounded GND.
  • the output end of the second input matching network 25 is connected to the input end of the peak power amplifier 26 , the output end of the peak power amplifier 26 is connected to the input end of the impedance inversion network 27 , and the output end of the impedance inversion network 27 is connected to the second end of the primary coil LP1 of the balun transformer unit 31 .
  • a first end of the secondary coil LS1 of the balun transformer unit 31 is connected to the input end of the port impedance transformation network 32 , and a second end of the secondary coil LS1 of the balun transformer unit 31 is grounded GND.
  • the output end of the port impedance conversion network 32 serves as the output end RFout of the voltage synthesis Doherty power amplifier 100 .
  • the output terminal RFout of the voltage synthesis Doherty power amplifier 100 is used to connect to an external load RL .
  • This circuit enables the voltage synthesis Doherty power amplifier of the present invention to dynamically control the power input to the carrier power amplifier 23 and the peak power amplifier 26 of the power amplifier network 2, and controls the power flowing into the carrier power amplifier 23 and the peak power amplifier 26 according to the size of the input power, thereby making the power amplification efficiency of the voltage synthesis Doherty power amplifier 100 of the present invention high.
  • FIG. 3 is a circuit diagram of a voltage synthesis Doherty power amplifier 100 of the present invention.
  • the first phase compensation network 21, the first input matching network 22 and the second input matching network 25 all adopt module circuits commonly used in the art, and the circuit form and performance are selected and determined according to actual design requirements, and are not described in detail here.
  • the carrier power amplifier 23 includes a first transformer XFM1, a third capacitor C3, a fourth capacitor C4, a first power amplifier PA1, a third power amplifier PA3 and a fourth power amplifier PA4.
  • the output end of the carrier power amplifier 23 includes two output ends, namely a first output end of the carrier power amplifier 23 and a second output end of the carrier power amplifier 23 .
  • the internal circuit connection relationship of the carrier power amplifier 23 is:
  • An input end of the first power amplifier PA1 serves as an input end of the carrier power amplifier 23 , and an output end of the first power amplifier PA1 is connected to a first end of the primary coil LP2 of the first transformer XFM1 .
  • a second end of the primary coil LP2 of the first transformer XFM1 is connected to the ground GND, and a middle tap end of the primary coil LP2 of the first transformer XFM1 is connected to a power supply voltage VCC.
  • a first end of the secondary coil LS2 of the first transformer XFM1 is connected to an input end of the third power amplifier PA3 and a first end of the fourth capacitor C4 respectively.
  • the second end of the secondary coil LS2 of the first transformer XFM1 is connected to the input end of the fourth power amplifier PA4 and the second end of the fourth capacitor C4 respectively.
  • a middle tap end of the secondary coil LS2 of the first transformer XFM1 is connected to a first end of the third capacitor C3.
  • a second end of the third capacitor C3 is grounded GND.
  • the output end of the third power amplifier PA3 serves as the first output end of the carrier power amplifier 23 .
  • the output end of the fourth power amplifier PA4 serves as the second output end of the carrier power amplifier 23 .
  • the second phase compensation network 24 includes a seventh capacitor C7, an eighth capacitor C8, a first reactance element BW1 and a second reactance element BW2.
  • the first reactance element BW1 and the second reactance element BW2 are both used to adjust the passband of the circuit.
  • the first reactance element BW1 and the second reactance element BW2 are both reactance elements.
  • the passband is generated by the reactance elements (capacitors and inductors) in the amplifier circuit. Because reactance (capacitive reactance and inductive reactance) is a function of frequency, it changes with the change of frequency. For example, the emitter bypass capacitor has a greater capacitive reactance to the signal when the signal frequency is lower. As for inductance, the higher the signal frequency, the greater its inductive reactance. When the frequency drops to a certain value, the capacitive reactance in the circuit will significantly attenuate the signal at that frequency and below.
  • the inductive reactance in the circuit will also significantly attenuate the signal at that frequency and above.
  • the frequency range between the low and high values is the passband. Within the passband, the reactance in the circuit has little effect on signal attenuation and can be basically ignored.
  • the internal circuit connection relationship of the second phase compensation network 24 is:
  • the second phase compensation network 24 has two input terminals, namely, a first input terminal of the second phase compensation network 24 and a second input terminal of the second phase compensation network 24.
  • the second phase compensation network 24 has two output terminals, namely, a first output terminal of the second phase compensation network 24 and a second output terminal of the second phase compensation network 24.
  • the first end of the seventh capacitor C7 serves as the first input end of the second phase compensation network 24 , and the first end of the seventh capacitor C7 is connected to the first end of the first reactance element BW1 .
  • the second end of the first reactance element BW1 serves as the first output end of the second phase compensation network 24 , and the second end of the first reactance element BW1 is connected to the first end of the eighth capacitor C8 .
  • the second end of the seventh capacitor C7 serves as the second input end of the second phase compensation network 24 , and the second end of the seventh capacitor C7 is connected to the first end of the second reactance element BW2 .
  • the second end of the second reactance element BW2 serves as the second output end of the second phase compensation network 24 , and the second end of the second reactance element BW2 is connected to the second end of the eighth capacitor C8 .
  • the peak power amplifier 26 includes a second transformer XFM2, a fifth capacitor C5, a sixth capacitor C6, a second power amplifier PA2, a fifth power amplifier PA5 and a sixth power amplifier PA6.
  • the first power amplifier PA1, the second power amplifier PA2, the third power amplifier PA3, the fourth power amplifier PA4, the fifth power amplifier PA5 and the sixth power amplifier PA6 are all transistor amplifier circuits, which can be realized by integrated circuit technology, which is conducive to integration and suitable for radio frequency integration. Circuit.
  • the internal circuit connection relationship of the peak power amplifier 26 is:
  • the output end of the peak power amplifier 26 includes two output ends, namely a first output end of the peak power amplifier 26 and a second output end of the peak power amplifier 26 .
  • An input end of the second power amplifier PA2 serves as an input end of the peak power amplifier 26 , and an output end of the second power amplifier PA2 is connected to a first end of the primary coil LP3 of the second transformer XFM2 .
  • a second end of the primary coil LP3 of the second transformer XFM2 is grounded GND, and a middle tap end of the primary coil LP3 of the second transformer XFM2 is connected to the power supply voltage VCC.
  • a first end of the secondary coil LS3 of the second transformer XFM2 is connected to an input end of the fifth power amplifier PA5 and a first end of the sixth capacitor C6 respectively.
  • the second end of the secondary coil LS3 of the second transformer XFM2 is connected to the input end of the sixth power amplifier PA6 and the second end of the sixth capacitor C6 respectively.
  • a middle tap end of the secondary coil LS3 of the second transformer XFM2 is connected to a first end of the fifth capacitor C5.
  • a second end of the third capacitor C3 is grounded GND.
  • the output end of the fifth power amplifier PA5 serves as the first output end of the peak power amplifier 26 .
  • the output end of the sixth power amplifier PA6 serves as the second output end of the peak power amplifier 26 .
  • the carrier power amplifier 23 has the same circuit structure as the peak power amplifier 26.
  • the components included in the carrier power amplifier 23 correspond to the components included in the peak power amplifier 26 one by one, and the components have the same performance and size.
  • This circuit structure is conducive to integration and is suitable for radio frequency integrated circuits.
  • the impedance reversal network 27 includes a ninth capacitor C9, a tenth capacitor C10, a second inductor L2, a third inductor L3, a third reactance element BW3 and a fourth reactance element BW4, and the third reactance element BW3 and the fourth reactance element BW4 are both used to adjust the passband of the circuit.
  • the third reactance element BW3 and the fourth reactance element BW4 are both reactance elements.
  • the impedance inversion network 27 has two input terminals, namely, a first input terminal of the impedance inversion network 27 and a second input terminal of the impedance inversion network 27.
  • the impedance inversion network 27 has two output terminals, namely, a first output terminal of the impedance inversion network 27 and a second output terminal of the impedance inversion network 27.
  • the internal circuit connection relationship of the impedance inversion network 27 is:
  • the first end of the ninth capacitor C9 serves as the first input end of the impedance inversion network 27 , and the first end of the ninth capacitor C9 is connected to the first end of the third reactance element BW3 .
  • the second end of the third reactance element BW3 is connected to the first end of the second inductor L2.
  • the second end of the second inductor L2 serves as the first output end of the impedance inversion network 27 , and the second end of the second inductor L2 is connected to the first end of the tenth capacitor C10 .
  • the second end of the ninth capacitor C9 serves as the second input end of the impedance inversion network 27 , and the second end of the ninth capacitor C9 is connected to the first end of the fourth reactance element BW4 .
  • the second end of the fourth reactance element BW4 is connected to the first end of the third inductor L3.
  • the second end of the third inductor L3 serves as the second output end of the impedance inversion network 27 , and the second end of the third inductor L3 is connected to the second end of the tenth capacitor C10 .
  • the balun transformer unit 31 includes a third transformer XFM3 and a fourth transformer XFM4.
  • the first end of the primary coil LP1 of the balun transformer unit 31 includes two terminals, namely, a first end of the primary coil LP4 of the third transformer XFM3 and a second end of the primary coil LP4 of the third transformer XFM3 .
  • the internal circuit connection relationship of the balun transformer unit 31 is:
  • a center tap end of the primary winding LP4 of the third transformer XFM3 is connected to the power supply voltage VCC.
  • the first end of the secondary winding LS4 of the third transformer XFM3 serves as the balun A first end of the secondary coil LS1 of the transformer unit 31 .
  • a second end of the secondary winding LS4 of the third transformer XFM3 is connected to a first end of the secondary winding LS5 of the fourth transformer XFM4.
  • the second end of the primary coil LP1 of the balun transformer unit 31 includes two terminals, namely, a first end of the primary coil LP5 of the fourth transformer XFM4 and a second end of the primary coil LP5 of the fourth transformer XFM4 .
  • a center tap end of the primary winding LP5 of the fourth transformer XFM4 is connected to the power supply voltage VCC.
  • the second end of the secondary coil LS5 of the fourth transformer XFM4 serves as the second end of the secondary coil LS1 of the balun transformer unit 31 , and the second end of the secondary coil LS5 of the fourth transformer XFM4 is grounded GND.
  • the port impedance transformation network 32 is an eleventh capacitor C11, and a first end of the eleventh capacitor C11 serves as an input end of the port impedance transformation network 32. A first end of the eleventh capacitor C11 is grounded GND.
  • the circuit structure uses the eleventh capacitor C11 for impedance transformation, so that the circuit structure is simple.
  • the working principle of the voltage synthesis Doherty power amplifier 100 is:
  • the optimal impedance of the carrier power amplifier 23 and the optimal impedance of the peak power amplifier 26 are both R opt .
  • the input signal RFin is distributed proportionally through the adaptive input power divider 1 composed of the first capacitor C1, the second capacitor C2 and the first inductor L1.
  • the carrier power amplifier 23 and the peak power amplifier 26 have the same size and the optimal impedance is R opt . In the low power working mode, only the carrier power amplifier 23 is working, and the peak power amplifier 26 is turned off. The output impedance of the peak power amplifier 26 is infinite. After the inversion network 27 is transformed, the impedance of point G is grounded.
  • the adaptive input power divider 1 inputs more power to the input end of the carrier power amplifier 23 through the first phase compensation network 21 and the first input matching network 22.
  • the carrier power amplifier 23 and the peak power amplifier 26 work simultaneously, and the carrier power amplifier 23 enters a saturated state.
  • the adaptive input power divider 1 distributes more power to the peak power amplifier 26, thereby improving the gain of the peak power amplifier 26 path.
  • the load impedance seen by the peak power amplifier 26 gradually decreases from infinity to R opt
  • the load impedance seen by the carrier power amplifier 23 gradually decreases from infinity to R opt
  • the output powers of the carrier power amplifier 23 and the peak power amplifier 26 also gradually reach the maximum value, and the effective synthesis of the two-way power is achieved through the balun transformer unit 31 of the voltage synthesis power synthesis network 3.
  • FIG. 4 is a schematic diagram of an adaptive input power divider 1 of a voltage synthesis Doherty power amplifier 100 provided in an embodiment of the present invention.
  • the adaptive input power divider 1 is composed of a PI-type CLC, and G1 and G2 are the input admittances of the Port 1 carrier power amplifier 23 and the Port 2 peak power amplifier 26, respectively.
  • the reactance of the first inductor L1 connected in series is jX1
  • the reactance of the first capacitor C1 and the second capacitor C2 connected in parallel is jB0 .
  • the susceptance B 0 of the two ports can be selected as needed to control the power distribution ratio of the two ports when the voltage synthesis Doherty power amplifier 100 works at the back-off output power.
  • the values of G 1 , G 2 and B 0 are optimized so that when the voltage synthesis Doherty power amplifier 100 works in the low power mode, more power is input to the carrier power amplifier 23, and when it is in the high power mode, more power is input to the peak power amplifier 26.
  • the voltage synthesis type Doherty power amplifier of the present invention is provided with an adaptive input power divider, a power amplifier network and a voltage synthesis type power synthesis network, wherein the adaptive input power divider includes a first capacitor, a second capacitor and a first inductor; the power amplifier network includes a first phase compensation network, a first input matching network, a carrier power amplifier, a second phase compensation network, a second input matching network, a peak power amplifier and an impedance inversion network; when the voltage synthesis type Doherty power amplifier works in a low power mode, the input power is in a low input power range, the peak power amplifier is turned off, and most of the input power is input into the carrier power amplifier; when the voltage synthesis type Doherty power amplifier works in a high power mode, the input power is in a high input power range, the carrier power amplifier enters a saturated amplification state, and most of the input power is input into the peak power amplifier, thereby improving the gain of the peak power amplifier.
  • the adaptive input power divider
  • the circuit enables the voltage synthesis type Doherty power amplifier of the present invention to dynamically control the power of the carrier power amplifier and the peak power amplifier input into the power amplifier network, and control the power size flowing into the carrier power amplifier and the peak power amplifier according to the size of the input power, thereby making the power amplification efficiency of the voltage synthesis type Doherty power amplifier of the present invention high.
  • the input power self-distribution and pre-distortion functions are realized through an adaptive input power divider with a variable power distribution ratio, and the output power of the voltage synthesis Doherty power amplifier is linearized.

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Abstract

本发明提供一种电压合成式Doherty功率放大器，其包括自适应输入功率分配器、功率放大器网络以及电压合成式功率合成网络；自适应输入功率分配器包括第一电容、第二电容和第一电感；功率放大器网络包括第一相位补偿网络、第一输入匹配网络、载波功率放大器、第二相位补偿网络、第二输入匹配网络、峰值功率放大器以及阻抗反转网络；电压合成式功率合成网络包括巴伦变压器单元和端口阻抗变换网络。本发明电压合成式Doherty功率放大器的功率放大的输入功率自分配、效率高且输出功率的线性度高。

Description

一种电压合成式Doherty功率放大器 技术领域
本发明涉及电路技术领域，尤其涉及一种电压合成式Doherty功率放大器。
背景技术
目前，射频功率放大器有特定的最佳负载阻抗，负载固定，最大输出电压和电流摆幅仅在峰值输出功率处达到，在峰值功率点的效率最大，功率回退时的效率迅速降低。Doherty技术基于输出端的负载调制，输出负载的大小由载波功放和峰值功放电流比的大小决定，负载阻抗是动态调节的，根据调制后负载阻抗值的大小，可以在不同的功率点达到最大效率，是放大高峰均比信号的优选方案。因此，Doherty结构是射频功率放大器设计的一种常用方法。
相关技术的Doherty功率放大器一般采用电流合成的结构和电压合成式结构。其中，采用电流合成的结构的Doherty功率放大器由载波功放和峰值功放两个放大器并联连接而成，载波功放工作在AB类，峰值功放工作在C类，负载阻抗匹配网络将负载ZL变换到Ropt/2(Ropt为载波功放和峰值功放输出功率最大时的最佳输出阻抗)。输入功率较小时，Doherty功率放大器工作在低功率模式，峰值功放未打开，仅载波功放工作，其输出端负载阻抗为2Ropt。随着输入功率的增大，当载波功放输出功率接近饱和功率时，载波功放效率到达第一个峰值点，同时峰值功放打开，载波功放和峰值功放同时工作，Doherty功率放大器进入高功率模式，输出功率是载波功放和峰值功放输出功率合成后所得的功率,载波功放的负载阻抗从2Ropt逐步变换到Ropt，峰值功放的负载阻抗从无穷大逐步变换到Ropt。理想情况下，Doherty功率放大器工作在高功率模式时，其最大输出功率比低功率模式下最大输出功率增加～6dB。另外，采用电压合成式结构的Doherty功率放大器由载波功放和峰值功放两个放大器并联连接而成，而负载阻抗变换网络将负载ZL变换到ZL’＝2Ropt。负载调制是通过峰值功放输出端 的四分之一波长传输线来实现。输入功率较小时，Doherty功率放大器工作在低功率模式，峰值功放关闭，输出阻抗为无穷大，经过四分之一波长传输线变换后，阻抗变换为零欧姆，载波功放输出端的负载阻抗为2Ropt。随着输入功率的增大，峰值功放打开，载波功放和峰值功放同时工作，Doherty功率放大器进入高功率模式，载波功放的负载阻抗从2Ropt逐步变换到Ropt，峰值功放的负载阻抗从无穷大逐步变换到Ropt，载波功放和峰值功放的输出通过变压器实现输出电压的叠加和功率合成。相对于传统的电流合成式Doherty功率放大器负载阻抗ZL需要从50欧姆变换到Ropt/2，电压合成式Doherty功率放大器仅需要50欧姆变换到2Ropt，降低了阻抗变换比，增加了带宽。同时，在低输出功率区域，由于电压合成式Doherty功率放大器的载波功放与负载直接连接，不需要四分之一波长阻抗反转，可以实现更宽的频带范围内阻抗的良好匹配。
然而，相关技术的Doherty功率放大器的峰值功放偏置在C类，载波功放偏置在AB类，峰值功放的功率增益比载波功放的增益低。Doherty功率放大器工作在高输出功率模式时，峰值功放的负载没有被调制到足够低的水平，导致其最大输出功率小，载波功放和峰值功放的负载阻抗不能被完全调制，载波功放和峰值功放合成后的输出功率比负载完全调制时降低了，幅度-幅度调制(AM-AM)特性也变差。而且，由于峰值功放的软开关特性，导致了在功率回退时，载波功放面临的负载被提早向下牵引了，效率也被拉低了。同时，由于载波功放和峰值功放都没有达到理想的输出功率状态，载波功放和峰值功放的三阶互调项不能够实现理想的对消，Doherty功率放大器的线性度也恶化了。
因此，实有必要提供一种新的电压合成式Doherty功率放大器解决上述问题。
发明内容
针对以上现有技术的不足，本发明提出一种输入功率自分配的新型电压合成式Doherty功率放大器。
为了解决上述技术问题，本发明的实施例提供了一种电压合成 式Doherty功率放大器，所述电压合成式Doherty功率放大器包括自适应输入功率分配器、功率放大器网络以及电压合成式功率合成网络；
所述自适应输入功率分配器包括第一电容、第二电容和第一电感；
所述功率放大器网络包括第一相位补偿网络、第一输入匹配网络、载波功率放大器、第二相位补偿网络、第二输入匹配网络、峰值功率放大器以及阻抗反转网络；所述第一相位补偿网络用于连接输入信号并将输入信号进行移相，所述第一输入匹配网络用于实现输入阻抗匹配，所述载波功率放大器用于将信号的功率放大，所述第二相位补偿网络用于将输入信号进行移相，所述第二输入匹配网络用于实现输入阻抗匹配，所述峰值功率放大器用于将信号的功率放大，所述阻抗反转网络用于将输入的阻抗进行反转；
所述电压合成式功率合成网络包括巴伦变压器单元和端口阻抗变换网络，所述端口阻抗变换网络用于实现输出的阻抗匹配；
所述第一电容的第一端作为所述电压合成式Doherty功率放大器的输入端，且所述第一电容的第一端分别连接至所述第一电感的第一端和所述第一相位补偿网络的输入端；所述第一电容的第二端接地；
所述第一相位补偿网络的输出端连接至所述第一输入匹配网络的输入端，所述第一输入匹配网络的输出端连接至所述载波功率放大器的输入端，所述载波功率放大器的输出端连接至所述第二相位补偿网络的输入端，所述第二相位补偿网络的输出端连接至所述巴伦变压器单元的初级线圈的第一端；
所述第一电感的第二端分别连接至所述第二电容的第一端和所述第二输入匹配网络的输入端；所述第二电容的第二端接地；
所述第二输入匹配网络的输出端连接至所述峰值功率放大器的输入端，所述峰值功率放大器的输出端连接至所述阻抗反转网络的输入端，所述阻抗反转网络的输出端连接至所述巴伦变压器单元的初级线圈的第二端；
所述巴伦变压器单元的次级线圈的第一端连接至所述端口阻抗变换网络的输入端，所述巴伦变压器单元的次级线圈的第二端接地；
所述端口阻抗变换网络的输出端作为所述电压合成式Doherty功率放大器的输出端。
优选的，所述载波功率放大器包括第一变压器、第三电容、第四电容、第一功率放大器、第三功率放大器以及第四功率放大器；
所述载波功率放大器的输出端包括两个且分别为所述载波功率放大器的第一输出端和所述载波功率放大器的第二输出端；
所述第一功率放大器的输入端作为所述载波功率放大器的输入端，所述第一功率放大器的输出端连接至所述第一变压器的初级线圈的第一端；
所述第一变压器的初级线圈的第二端接地，所述第一变压器的初级线圈的中抽头端连接至电源电压；
所述第一变压器的次级线圈的第一端分别连接至所述第三功率放大器的输入端和所述第四电容的第一端；
所述第一变压器的次级线圈的第二端分别连接至所述第四功率放大器的输入端和所述第四电容的第二端；
所述第一变压器的次级线圈的中抽头端连接至所述第三电容的第一端；所述第三电容的第二端接地；
所述第三功率放大器的输出端作为所述载波功率放大器的第一输出端；
所述第四功率放大器的输出端作为所述载波功率放大器的第二输出端。
优选的，所述第二相位补偿网络包括第七电容、第八电容、第一电抗元件和第二电抗元件，所述第一电抗元件和所述第二电抗元件均用于调节电路通频带；
所述第二相位补偿网络的输入端包括两个且分别为所述第二相位补偿网络的第一输入端和所述第二相位补偿网络的第二输入端；所述第二相位补偿网络的输出端包括两个且分别为所述第二相 位补偿网络的第一输出端和所述第二相位补偿网络的第二输出端；
所述第七电容的第一端作为所述第二相位补偿网络的第一输入端，且所述第七电容的第一端连接至所述第一电抗元件的第一端；
所述第一电抗元件的第二端作为所述第二相位补偿网络的第一输出端，且所述第一电抗元件的第二端连接至所述第八电容的第一端；
所述第七电容的第二端作为所述第二相位补偿网络的第二输入端，且所述第七电容的第二端连接至所述第二电抗元件的第一端；
所述第二电抗元件的第二端作为所述第二相位补偿网络的第二输出端，且所述第二电抗元件的第二端连接至所述第八电容的第二端。
优选的，所述峰值功率放大器包括第二变压器、第五电容、第六电容、第二功率放大器、第五功率放大器以及第六功率放大器；
所述峰值功率放大器的输出端包括两个且分别为所述峰值功率放大器的第一输出端和所述峰值功率放大器的第二输出端；
所述第二功率放大器的输入端作为所述峰值功率放大器的输入端，所述第二功率放大器的输出端连接至所述第二变压器的初级线圈的第一端；
所述第二变压器的初级线圈的第二端接地，所述第二变压器的初级线圈的中抽头端连接至所述电源电压；
所述第二变压器的次级线圈的第一端分别连接至所述第五功率放大器的输入端和所述第六电容的第一端；
所述第二变压器的次级线圈的第二端分别连接至所述第六功率放大器的输入端和所述第六电容的第二端；
所述第二变压器的次级线圈的中抽头端连接至所述第五电容的第一端；所述第三电容的第二端接地；
所述第五功率放大器的输出端作为所述峰值功率放大器的第一输出端；
所述第六功率放大器的输出端作为所述峰值功率放大器的第二输出端。
优选的，所述阻抗反转网络包括第九电容、第十电容、第二电感、第三电感、第三电抗元件和第四电抗元件，所述第三电抗元件和所述第四电抗元件均用于调节电路通频带；
所述阻抗反转网络的输入端包括两个且分别为所述阻抗反转网络的第一输入端和所述阻抗反转网络的第二输入端；所述阻抗反转网络的输出端包括两个且分别为所述阻抗反转网络的第一输出端和所述阻抗反转网络的第二输出端；
所述第九电容的第一端作为所述阻抗反转网络的第一输入端，且所述第九电容的第一端连接至所述第三电抗元件的第一端；
所述第三电抗元件的第二端连接至所述第二电感的第一端；
所述第二电感的第二端作为所述阻抗反转网络的第一输出端，且所述第二电感的第二端连接至所述第十电容的第一端；
所述第九电容的第二端作为所述阻抗反转网络的第二输入端，且所述第九电容的第二端连接至所述第四电抗元件的第一端；
所述第四电抗元件的第二端连接至所述第三电感的第一端；
所述第三电感的第二端作为所述阻抗反转网络的第二输出端，且所述第三电感的第二端连接至所述第十电容的第二端。
优选的，所述巴伦变压器单元包括第三变压器和第四变压器；
所述巴伦变压器单元的初级线圈的第一端包括两个且分别为所述第三变压器的初级线圈的第一端和所述第三变压器的初级线圈的第二端；
所述第三变压器的初级线圈的中抽头端连接至所述电源电压；
所述第三变压器的次级线圈的第一端作为所述巴伦变压器单元的次级线圈的第一端；
所述第三变压器的次级线圈的第二端连接至所述第四变压器的次级线圈的第一端；
所述巴伦变压器单元的初级线圈的第二端包括两个且分别为所述第四变压器的初级线圈的第一端和所述第四变压器的初级线 圈的第二端；
所述第四变压器的初级线圈的中抽头端连接至所述电源电压；
所述第四变压器的次级线圈的第二端作为所述巴伦变压器单元的次级线圈的第二端，且所述第四变压器的次级线圈的第二端接地。
优选的，所述端口阻抗变换网络为第十一电容，所述第十一电容的第一端作为所述端口阻抗变换网络的输入端；所述第十一电容的第一端接地。
优选的，所述载波功率放大器与所述峰值功率放大器的电路结构相同，所述载波功率放大器包含各个元器件与所述峰值功率放大器包含各个元器件一一对应且元器件性能和尺寸相同。
优选的，所述载波功率放大器的最优阻抗与所述峰值功率放大器的最优阻均为Ropt；
所述的电压合成式Doherty功率放大器工作于低功率工作模式时，所述巴伦变压器单元的次级线圈的负载阻抗为ZL’，且满足：ZL’＝2Ropt，所述载波功率放大器的负载阻抗为ZCarrier，且满足：ZCarrier＝2Ropt；
所述的电压合成式Doherty功率放大器工作于高功率工作模式时，所述峰值功率放大器的负载阻抗为Zpeaking，且满足：Zpeaking＝Ropt。
优选的，所述第一功率放大器、所述第二功率放大器、所述第三功率放大器、所述第四功率放大器、所述第五功率放大器以及所述第六功率放大器均采用晶体管实现。
与相关技术相比，本发明的电压合成式Doherty功率放大器通过设置自适应输入功率分配器、功率放大器网络以及电压合成式功率合成网络，其中，所述自适应输入功率分配器包括第一电容、第二电容和第一电感；所述功率放大器网络包括第一相位补偿网络、第一输入匹配网络、载波功率放大器、第二相位补偿网络、第二输入匹配网络、峰值功率放大器以及阻抗反转网络；电压合成式Doherty功率放大器工作在低功率模式时，输入功率处于低输入功率区间，峰值功率放大器关闭，大部分输入功率输入到载波功率放 大器中；电压合成式Doherty功率放大器工作在高功率模式时，输入功率处于高输入功率区间，载波功率放大器进入饱和放大状态，大部分输入功率输入到峰值功率放大器中，提高了峰值功率放大器的增益。该电路使得本发明的电压合成式Doherty功率放大器可以动态控制输入到功率放大器网络的载波功率放大器和峰值功率放大器的功率，根据输入功率的大小控制流入到载波功率放大器和峰值功率放大器中功率大小，从而使得本发明的电压合成式Doherty功率放大器的功率放大的效率高。另外，通过功率分配比可变的自适应输入功率分配器实现输入功率自分配、预失真功能，线性化了电压合成式Doherty功率放大器的输出功率。
附图说明
下面结合附图详细说明本发明。通过结合以下附图所作的详细描述，本发明的上述或其他方面的内容将变得更清楚和更容易理解。附图中，
图1为本发明电压合成式Doherty功率放大器的电路结构示意图；
图2为本发明电压合成式Doherty功率放大器的应用电路结构示意图；
图3为本发明电压合成式Doherty功率放大器的电路原理图；
图4为本发明实施例提供的电压合成式Doherty功率放大器的自适应输入功率分配器的原理图。
具体实施方式
下面结合附图详细说明本发明的具体实施方式。
在此记载的具体实施方式/实施例为本发明的特定的具体实施方式，用于说明本发明的构思，均是解释性和示例性的，不应解释为对本发明实施方式及本发明范围的限制。除在此记载的实施例外，本领域技术人员还能够基于本申请权利要求书和说明书所公开的内容采用显而易见的其它技术方案，这些技术方案包括采用对在 此记载的实施例的做出任何显而易见的替换和修改的技术方案，都在本发明的保护范围之内。
本发明实施例提供一种电压合成式Doherty功率放大器100。
请同时参考图1-2所示，图1为本发明电压合成式Doherty功率放大器100的电路结构示意图；图2为本发明电压合成式Doherty功率放大器100的应用电路结构示意图。
所述电压合成式Doherty功率放大器100包括自适应输入功率分配器1、功率放大器网络2以及电压合成式功率合成网络3。
所述自适应输入功率分配器1包括第一电容C1、第二电容C2和第一电感L1。
所述电压合成式Doherty功率放大器100通过功率分配比可变的自适应输入功率分配器1实现预失真功能，线性化了电压合成式Doherty功率放大器100的输出功率。
所述功率放大器网络2包括第一相位补偿网络21、第一输入匹配网络22、载波功率放大器23、第二相位补偿网络24、第二输入匹配网络25、峰值功率放大器26以及阻抗反转网络27。其中，所述第一相位补偿网络21用于将输入信号进行移相。所述第一输入匹配网络22用于输入阻抗匹配。所述载波功率放大器23用于信号放大。所述第二相位补偿网络24用于将输入信号进行移相，所述第二输入匹配网络25用于输入阻抗匹配。所述峰值功率放大器26用于信号放大。所述阻抗反转网络27用于将输入的阻抗进行反转。
所述电压合成式功率合成网络3包括巴伦变压器单元31和端口阻抗变换网络32。
所述端口阻抗变换网络32用于将输出的阻抗匹配。
所述电压合成式Doherty功率放大器100的电路连接关系为：所述第一电容C1的第一端作为所述电压合成式Doherty功率放大器100的输入端RFin，且所述第一电容C1的第一端分别连接至所述第一电感L1的第一端和所述第一相位补偿网络21的输入端。所述第一电容C1的第二端接地GND。
所述第一相位补偿网络21的输出端连接至所述第一输入匹配网络22的输入端，所述第一输入匹配网络22的输出端连接至所述载波功率放大器23的输入端，所述载波功率放大器23的输出端连接至所述第二相位补偿网络24的输入端，所述第二相位补偿网络24的输出端连接至所述巴伦变压器单元31的初级线圈LP1的第一端。
所述第一电感L1的第二端分别连接至所述第二电容C2的第一端和所述第二输入匹配网络25的输入端。所述第二电容C2的第二端接地GND。
所述第二输入匹配网络25的输出端连接至所述峰值功率放大器26的输入端，所述峰值功率放大器26的输出端连接至所述阻抗反转网络27的输入端，所述阻抗反转网络27的输出端连接至所述巴伦变压器单元31的初级线圈LP1的第二端。
所述巴伦变压器单元31的次级线圈LS1的第一端连接至所述端口阻抗变换网络32的输入端，所述巴伦变压器单元31的次级线圈LS1的第二端接地GND。
所述端口阻抗变换网络32的输出端作为所述电压合成式Doherty功率放大器100的输出端RFout。
所述电压合成式Doherty功率放大器100的输出端RFout用于连接至外部负载RL。
该电路使得本发明的电压合成式Doherty功率放大器可以动态控制输入到功率放大器网络2的载波功率放大器23和峰值功率放大器26的功率，根据输入功率的大小控制流入到载波功率放大器23和峰值功率放大器26中功率大小，从而使得本发明的电压合成式Doherty功率放大器100的功率放大的效率高。
请参考图3所示，图3为本发明电压合成式Doherty功率放大器100的电路原理图。
所述第一相位补偿网络21、所述第一输入匹配网络22和所述第二输入匹配网络25均采用本领域常用的模块电路，具有电路形式和性能根据实际设计需求选择确定，在此，不作详细赘述。
所述载波功率放大器23包括第一变压器XFM1、第三电容C3、第四电容C4、第一功率放大器PA1、第三功率放大器PA3以及第四功率放大器PA4。
所述载波功率放大器23的输出端包括两个且分别为所述载波功率放大器23的第一输出端和所述载波功率放大器23的第二输出端。
所述载波功率放大器23的内部电路连接关系为：
所述第一功率放大器PA1的输入端作为所述载波功率放大器23的输入端，所述第一功率放大器PA1的输出端连接至所述第一变压器XFM1的初级线圈LP2的第一端。
所述第一变压器XFM1的初级线圈LP2的第二端接地GND，所述第一变压器XFM1的初级线圈LP2的中抽头端连接至电源电压VCC。
所述第一变压器XFM1的次级线圈LS2的第一端分别连接至所述第三功率放大器PA3的输入端和所述第四电容C4的第一端。
所述第一变压器XFM1的次级线圈LS2的第二端分别连接至所述第四功率放大器PA4的输入端和所述第四电容C4的第二端。
所述第一变压器XFM1的次级线圈LS2的中抽头端连接至所述第三电容C3的第一端。所述第三电容C3的第二端接地GND。
所述第三功率放大器PA3的输出端作为所述载波功率放大器23的第一输出端。
所述第四功率放大器PA4的输出端作为所述载波功率放大器23的第二输出端。
本实施例中，所述第二相位补偿网络24包括第七电容C7、第八电容C8、第一电抗元件BW1和第二电抗元件BW2。
所述第一电抗元件BW1和所述第二电抗元件BW2均用于调节电路通频带，所述第一电抗元件BW1和所述第二电抗元件BW2均为电抗元件。通频带是由于放大电路中存在的电抗元件(电容和电感)而产生的。因为电抗(容抗和感抗)是频率的函数，随着频率的变化而变化。比如射极旁路电容，信号频率越低时其对信号的容抗越大， 而电感则是信号频率越高时其感抗越大.当频率降到一定值时，电路中的容抗就会对该频率及以下的信号产生明显的衰减。反之，当频率升高到一定值时，电路中的感抗也会对该频率及以上的信号产生明显衰减,这一低一高的频率值之间就是通频带，在通频带内，电路中的电抗对于信号衰减较小，基本上可以忽略。
所述第二相位补偿网络24的内部电路连接关系为：
所述第二相位补偿网络24的输入端包括两个且分别为所述第二相位补偿网络24的第一输入端和所述第二相位补偿网络24的第二输入端。所述第二相位补偿网络24的输出端包括两个且分别为所述第二相位补偿网络24的第一输出端和所述第二相位补偿网络24的第二输出端。
所述第七电容C7的第一端作为所述第二相位补偿网络24的第一输入端，且所述第七电容C7的第一端连接至所述第一电抗元件BW1的第一端。
所述第一电抗元件BW1的第二端作为所述第二相位补偿网络24的第一输出端，且所述第一电抗元件BW1的第二端连接至所述第八电容C8的第一端。
所述第七电容C7的第二端作为所述第二相位补偿网络24的第二输入端，且所述第七电容C7的第二端连接至所述第二电抗元件BW2的第一端。
所述第二电抗元件BW2的第二端作为所述第二相位补偿网络24的第二输出端，且所述第二电抗元件BW2的第二端连接至所述第八电容C8的第二端。
本实施例中，所述峰值功率放大器26包括第二变压器XFM2、第五电容C5、第六电容C6、第二功率放大器PA2、第五功率放大器PA5以及第六功率放大器PA6。
本实施例中，所述第一功率放大器PA1、所述第二功率放大器PA2、所述第三功率放大器PA3、所述第四功率放大器PA4、所述第五功率放大器PA5以及所述第六功率放大器PA6均为晶体管放大电路，可以通过集成电路工艺实现，有利于集成化，适用于射频集成 电路。
所述峰值功率放大器26的内部电路连接关系为：
所述峰值功率放大器26的输出端包括两个且分别为所述峰值功率放大器26的第一输出端和所述峰值功率放大器26的第二输出端。
所述第二功率放大器PA2的输入端作为所述峰值功率放大器26的输入端，所述第二功率放大器PA2的输出端连接至所述第二变压器XFM2的初级线圈LP3的第一端。
所述第二变压器XFM2的初级线圈LP3的第二端接地GND，所述第二变压器XFM2的初级线圈LP3的中抽头端连接至所述电源电压VCC。
所述第二变压器XFM2的次级线圈LS3的第一端分别连接至所述第五功率放大器PA5的输入端和所述第六电容C6的第一端。
所述第二变压器XFM2的次级线圈LS3的第二端分别连接至所述第六功率放大器PA6的输入端和所述第六电容C6的第二端。
所述第二变压器XFM2的次级线圈LS3的中抽头端连接至所述第五电容C5的第一端。所述第三电容C3的第二端接地GND。
所述第五功率放大器PA5的输出端作为所述峰值功率放大器26的第一输出端。
所述第六功率放大器PA6的输出端作为所述峰值功率放大器26的第二输出端。
本实施例中，所述载波功率放大器23与所述峰值功率放大器26的电路结构相同，所述载波功率放大器23包含各个元器件与所述峰值功率放大器26包含各个元器件一一对应且元器件性能和尺寸相同。该电路结构有利于集成化，适用于射频集成电路。
本实施例中，所述阻抗反转网络27包括第九电容C9、第十电容C10、第二电感L2、第三电感L3、第三电抗元件BW3和第四电抗元件BW4，所述第三电抗元件BW3和所述第四电抗元件BW4均用于调节电路通频带。所述第三电抗元件BW3和所述第四电抗元件BW4均电抗元件。
所述阻抗反转网络27的输入端包括两个且分别为所述阻抗反转网络27的第一输入端和所述阻抗反转网络27的第二输入端。所述阻抗反转网络27的输出端包括两个且分别为所述阻抗反转网络27的第一输出端和所述阻抗反转网络27的第二输出端。
所述阻抗反转网络27的内部电路连接关系为：
所述第九电容C9的第一端作为所述阻抗反转网络27的第一输入端，且所述第九电容C9的第一端连接至所述第三电抗元件BW3的第一端。
所述第三电抗元件BW3的第二端连接至所述第二电感L2的第一端。
所述第二电感L2的第二端作为所述阻抗反转网络27的第一输出端，且所述第二电感L2的第二端连接至所述第十电容C10的第一端。
所述第九电容C9的第二端作为所述阻抗反转网络27的第二输入端，且所述第九电容C9的第二端连接至所述第四电抗元件BW4的第一端。
所述第四电抗元件BW4的第二端连接至所述第三电感L3的第一端。
所述第三电感L3的第二端作为所述阻抗反转网络27的第二输出端，且所述第三电感L3的第二端连接至所述第十电容C10的第二端。
本实施例中，所述巴伦变压器单元31包括第三变压器XFM3和第四变压器XFM4。
所述巴伦变压器单元31的初级线圈LP1的第一端包括两个且分别为所述第三变压器XFM3的初级线圈LP4的第一端和所述第三变压器XFM3的初级线圈LP4的第二端。
所述巴伦变压器单元31的内部电路连接关系为：
所述第三变压器XFM3的初级线圈LP4的中抽头端连接至所述电源电压VCC。
所述第三变压器XFM3的次级线圈LS4的第一端作为所述巴伦 变压器单元31的次级线圈LS1的第一端。
所述第三变压器XFM3的次级线圈LS4的第二端连接至所述第四变压器XFM4的次级线圈LS5的第一端。
所述巴伦变压器单元31的初级线圈LP1的第二端包括两个且分别为所述第四变压器XFM4的初级线圈LP5的第一端和所述第四变压器XFM4的初级线圈LP5的第二端。
所述第四变压器XFM4的初级线圈LP5的中抽头端连接至所述电源电压VCC。
所述第四变压器XFM4的次级线圈LS5的第二端作为所述巴伦变压器单元31的次级线圈LS1的第二端，且所述第四变压器XFM4的次级线圈LS5的第二端接地GND。
本实施例中，所述端口阻抗变换网络32为第十一电容C11，所述第十一电容C11的第一端作为所述端口阻抗变换网络32的输入端。所述第十一电容C11的第一端接地GND。该电路结构采用第十一电容C11进行阻抗变换，使得电路结构简单。
所述电压合成式Doherty功率放大器100的工作原理为：
本实施例中，所述载波功率放大器23的最优阻抗与所述峰值功率放大器26的最优阻均为Ropt。
所述的电压合成式Doherty功率放大器100工作于低功率工作模式时，所述巴伦变压器单元31的次级线圈LS1的负载阻抗为ZL’，且满足：ZL’＝2Ropt，所述载波功率放大器23的负载阻抗为ZCarrier，且满足：ZCarrier＝2Ropt。
所述的电压合成式Doherty功率放大器100工作于高功率工作模式时，所述峰值功率放大器26的负载阻抗为Zpeaking，且满足：Zpeaking＝Ropt。
输入信号RFin经过由第一电容C1、第二电容C2和第一电感L1组成的所述自适应输入功率分配器1完成输入功率的按比例分配。载波功率放大器23和峰值功率放大器26采用相同的尺寸，最优阻抗为Ropt。低功率工作模式时，仅载波功率放大器23放工作，峰值功率放大器26关闭，峰值功率放大器26输出阻抗为无穷大，经阻抗 反转网络27变换后，G点的阻抗为接地状态。所述自适应输入功率分配器1将较多的功率经过第一相位补偿网络21和第一输入匹配网络22输入到载波功率放大器23的输入端。巴伦变压器单元31将次级线圈LS1的负载阻抗为ZL’，并使得ZL’＝2Ropt变换为初级线圈LP1的阻抗ZC’，阻抗ZC’经过第二相位补偿网络24移相后，载波功率放大器23看到的负载阻抗ZCarrier＝2Ropt，负载阻抗提高了一倍，提升了效率。高功率工作模式时，载波功率放大器23和峰值功率放大器26同时工作，载波功率放大器23进入饱和状态，所述自适应输入功率分配器1将较多的功率分配给了峰值功率放大器26，提高了峰值功率放大器26通路的增益，峰值功率放大器26看到的负载阻抗从无穷大逐步降低到Ropt，载波功率放大器23看到的负载阻抗从无穷大逐步降低到Ropt，载波功率放大器23和峰值功率放大器26的输出功率也逐步达到最大值，通过所述电压合成式功率合成网络3的巴伦变压器单元31实现两路功率的有效合成。
请参考图4所示，图4为本发明实施例提供的电压合成式Doherty功率放大器100的自适应输入功率分配器1的原理图。所述自适应输入功率分配器1由PI型C-L-C组成，G1和G2分别为Port1载波功率放大器23和Port2峰值功放峰值功率放大器26的输入导纳。串联第一电感L1的电抗为jX1，并联第一电容C1和第二电容C2的电抗为jB0。选取第一电感L1电抗值jX1(X1＝2B0/(B0 2+G2 2))，使Port2端口的导纳Y2B＝G2+jB0变换为其共轭值Y* 2B＝G2-jB0。Y* 2B与Port1端口的导纳Y1B＝G1+jB0并联后的导纳Y0＝G1+G2＝0.02S,与信号源阻抗ZG(ZG＝1/(G1+G2)＝50Ω)匹配,实现信号的最大功率传输。Port1端口电压V1和Port2端口电压V2幅度相等，相位差φ0＝-2arctan(B0/G1)。两端口的电纳B0，可根据需要选择，控制电压合成式Doherty功率放大器100工作在回退输出功率时两端口的功率分配比。根据功率管的特性，优化G1、G2和B0值，使得电压合成式Doherty功率放大器100工作在低功率模式时，较多的功率输入到载波功率放大器23中，而在高功率模式时，较多的功率输入到峰值功率放大器26中。
需要指出的是，本发明采用的相关电路、电阻、电容、电感、 电抗元件、变压器及功率放大器均为本领域常用的电路、元器件，对应的具体的指标和参数根据实际应用进行调整，在此，不作详细赘述。
与相关技术相比，本发明的电压合成式Doherty功率放大器通过设置自适应输入功率分配器、功率放大器网络以及电压合成式功率合成网络，其中，所述自适应输入功率分配器包括第一电容、第二电容和第一电感；所述功率放大器网络包括第一相位补偿网络、第一输入匹配网络、载波功率放大器、第二相位补偿网络、第二输入匹配网络、峰值功率放大器以及阻抗反转网络；电压合成式Doherty功率放大器工作在低功率模式时，输入功率处于低输入功率区间，峰值功率放大器关闭，大部分输入功率输入到载波功率放大器中；电压合成式Doherty功率放大器工作在高功率模式时，输入功率处于高输入功率区间，载波功率放大器进入饱和放大状态，大部分输入功率输入到峰值功率放大器中，提高了峰值功率放大器的增益。该电路使得本发明的电压合成式Doherty功率放大器可以动态控制输入到功率放大器网络的载波功率放大器和峰值功率放大器的功率，根据输入功率的大小控制流入到载波功率放大器和峰值功率放大器中功率大小，从而使得本发明的电压合成式Doherty功率放大器的功率放大的效率高。另外，通过功率分配比可变的自适应输入功率分配器实现输入功率自分配、预失真功能，线性化了电压合成式Doherty功率放大器的输出功率。
需要说明的是，以上参照附图所描述的各个实施例仅用以说明本发明而非限制本发明的范围，本领域的普通技术人员应当理解，在不脱离本发明的精神和范围的前提下对本发明进行的修改或者等同替换，均应涵盖在本发明的范围之内。此外，除上下文另有所指外，以单数形式出现的词包括复数形式，反之亦然。另外，除非特别说明，那么任何实施例的全部或一部分可结合任何其它实施例的全部或一部分来使用。

Claims (10)

  1. 一种电压合成式Doherty功率放大器，其特征在于，所述电压合成式Doherty功率放大器包括自适应输入功率分配器、功率放大器网络以及电压合成式功率合成网络；
    所述自适应输入功率分配器包括第一电容、第二电容和第一电感；
    所述功率放大器网络包括第一相位补偿网络、第一输入匹配网络、载波功率放大器、第二相位补偿网络、第二输入匹配网络、峰值功率放大器以及阻抗反转网络；所述第一相位补偿网络用于连接输入信号并将输入信号进行移相，所述第一输入匹配网络用于实现输入阻抗匹配，所述载波功率放大器用于将信号的功率放大，所述第二相位补偿网络用于将输入信号进行移相，所述第二输入匹配网络用于实现输入阻抗匹配，所述峰值功率放大器用于将信号的功率放大，所述阻抗反转网络用于将输入的阻抗进行反转；
    所述电压合成式功率合成网络包括巴伦变压器单元和端口阻抗变换网络，所述端口阻抗变换网络用于实现输出的阻抗匹配；
    所述第一电容的第一端作为所述电压合成式Doherty功率放大器的输入端，且所述第一电容的第一端分别连接至所述第一电感的第一端和所述第一相位补偿网络的输入端；所述第一电容的第二端接地；
    所述第一相位补偿网络的输出端连接至所述第一输入匹配网络的输入端，所述第一输入匹配网络的输出端连接至所述载波功率放大器的输入端，所述载波功率放大器的输出端连接至所述第二相位补偿网络的输入端，所述第二相位补偿网络的输出端连接至所述巴伦变压器单元的初级线圈的第一端；
    所述第一电感的第二端分别连接至所述第二电容的第一端和所述第二输入匹配网络的输入端；所述第二电容的第二端接地；
    所述第二输入匹配网络的输出端连接至所述峰值功率放大器的输入端，所述峰值功率放大器的输出端连接至所述阻抗反转网络的输入端，所述阻抗反转网络的输出端连接至所述巴伦变压器单元 的初级线圈的第二端；
    所述巴伦变压器单元的次级线圈的第一端连接至所述端口阻抗变换网络的输入端，所述巴伦变压器单元的次级线圈的第二端接地；
    所述端口阻抗变换网络的输出端作为所述电压合成式Doherty功率放大器的输出端。
  2. 根据权利要求1所述的电压合成式Doherty功率放大器，其特征在于，所述载波功率放大器包括第一变压器、第三电容、第四电容、第一功率放大器、第三功率放大器以及第四功率放大器；
    所述载波功率放大器的输出端包括两个且分别为所述载波功率放大器的第一输出端和所述载波功率放大器的第二输出端；
    所述第一功率放大器的输入端作为所述载波功率放大器的输入端，所述第一功率放大器的输出端连接至所述第一变压器的初级线圈的第一端；
    所述第一变压器的初级线圈的第二端接地，所述第一变压器的初级线圈的中抽头端连接至电源电压；
    所述第一变压器的次级线圈的第一端分别连接至所述第三功率放大器的输入端和所述第四电容的第一端；
    所述第一变压器的次级线圈的第二端分别连接至所述第四功率放大器的输入端和所述第四电容的第二端；
    所述第一变压器的次级线圈的中抽头端连接至所述第三电容的第一端；所述第三电容的第二端接地；
    所述第三功率放大器的输出端作为所述载波功率放大器的第一输出端；
    所述第四功率放大器的输出端作为所述载波功率放大器的第二输出端。
  3. 根据权利要求2所述的电压合成式Doherty功率放大器，其特征在于，所述第二相位补偿网络包括第七电容、第八电容、第一电抗元件和第二电抗元件，所述第一电抗元件和所述第二电抗元件均用于调节电路通频带；
    所述第二相位补偿网络的输入端包括两个且分别为所述第二相位补偿网络的第一输入端和所述第二相位补偿网络的第二输入端；所述第二相位补偿网络的输出端包括两个且分别为所述第二相位补偿网络的第一输出端和所述第二相位补偿网络的第二输出端；
    所述第七电容的第一端作为所述第二相位补偿网络的第一输入端，且所述第七电容的第一端连接至所述第一电抗元件的第一端；
    所述第一电抗元件的第二端作为所述第二相位补偿网络的第一输出端，且所述第一电抗元件的第二端连接至所述第八电容的第一端；
    所述第七电容的第二端作为所述第二相位补偿网络的第二输入端，且所述第七电容的第二端连接至所述第二电抗元件的第一端；
    所述第二电抗元件的第二端作为所述第二相位补偿网络的第二输出端，且所述第二电抗元件的第二端连接至所述第八电容的第二端。
  4. 根据权利要求3所述的电压合成式Doherty功率放大器，其特征在于，所述峰值功率放大器包括第二变压器、第五电容、第六电容、第二功率放大器、第五功率放大器以及第六功率放大器；
    所述峰值功率放大器的输出端包括两个且分别为所述峰值功率放大器的第一输出端和所述峰值功率放大器的第二输出端；
    所述第二功率放大器的输入端作为所述峰值功率放大器的输入端，所述第二功率放大器的输出端连接至所述第二变压器的初级线圈的第一端；
    所述第二变压器的初级线圈的第二端接地，所述第二变压器的初级线圈的中抽头端连接至所述电源电压；
    所述第二变压器的次级线圈的第一端分别连接至所述第五功率放大器的输入端和所述第六电容的第一端；
    所述第二变压器的次级线圈的第二端分别连接至所述第六功率放大器的输入端和所述第六电容的第二端；
    所述第二变压器的次级线圈的中抽头端连接至所述第五电容的第一端；所述第三电容的第二端接地；
    所述第五功率放大器的输出端作为所述峰值功率放大器的第一输出端；
    所述第六功率放大器的输出端作为所述峰值功率放大器的第二输出端。
  5. 根据权利要求4所述的电压合成式Doherty功率放大器，其特征在于，所述阻抗反转网络包括第九电容、第十电容、第二电感、第三电感、第三电抗元件和第四电抗元件，所述第三电抗元件和所述第四电抗元件均用于调节电路通频带；
    所述阻抗反转网络的输入端包括两个且分别为所述阻抗反转网络的第一输入端和所述阻抗反转网络的第二输入端；所述阻抗反转网络的输出端包括两个且分别为所述阻抗反转网络的第一输出端和所述阻抗反转网络的第二输出端；
    所述第九电容的第一端作为所述阻抗反转网络的第一输入端，且所述第九电容的第一端连接至所述第三电抗元件的第一端；
    所述第三电抗元件的第二端连接至所述第二电感的第一端；
    所述第二电感的第二端作为所述阻抗反转网络的第一输出端，且所述第二电感的第二端连接至所述第十电容的第一端；
    所述第九电容的第二端作为所述阻抗反转网络的第二输入端，且所述第九电容的第二端连接至所述第四电抗元件的第一端；
    所述第四电抗元件的第二端连接至所述第三电感的第一端；
    所述第三电感的第二端作为所述阻抗反转网络的第二输出端，且所述第三电感的第二端连接至所述第十电容的第二端。
  6. 根据权利要求5所述的电压合成式Doherty功率放大器，其特征在于，所述巴伦变压器单元包括第三变压器和第四变压器；
    所述巴伦变压器单元的初级线圈的第一端包括两个且分别为所述第三变压器的初级线圈的第一端和所述第三变压器的初级线圈的第二端；
    所述第三变压器的初级线圈的中抽头端连接至所述电源电压；
    所述第三变压器的次级线圈的第一端作为所述巴伦变压器单元的次级线圈的第一端；
    所述第三变压器的次级线圈的第二端连接至所述第四变压器的次级线圈的第一端；
    所述巴伦变压器单元的初级线圈的第二端包括两个且分别为所述第四变压器的初级线圈的第一端和所述第四变压器的初级线圈的第二端；
    所述第四变压器的初级线圈的中抽头端连接至所述电源电压；
    所述第四变压器的次级线圈的第二端作为所述巴伦变压器单元的次级线圈的第二端，且所述第四变压器的次级线圈的第二端接地。
  7. 根据权利要求1所述的电压合成式Doherty功率放大器，其特征在于，所述端口阻抗变换网络为第十一电容，所述第十一电容的第一端作为所述端口阻抗变换网络的输入端；所述第十一电容的第一端接地。
  8. 根据权利要求4所述的电压合成式Doherty功率放大器，其特征在于，所述载波功率放大器与所述峰值功率放大器的电路结构相同，所述载波功率放大器包含各个元器件与所述峰值功率放大器包含各个元器件一一对应且元器件性能和尺寸相同。
  9. 根据权利要求8所述的电压合成式Doherty功率放大器，其特征在于，所述载波功率放大器的最优阻抗与所述峰值功率放大器的最优阻均为Ropt；
    所述的电压合成式Doherty功率放大器工作于低功率工作模式时，所述巴伦变压器单元的次级线圈的负载阻抗为ZL’，且满足：ZL’＝2Ropt，所述载波功率放大器的负载阻抗为ZCarrier，且满足：ZCarrier＝2Ropt；
    所述的电压合成式Doherty功率放大器工作于高功率工作模式时，所述峰值功率放大器的负载阻抗为Zpeaking，且满足：Zpeaking＝Ropt。
  10. 根据权利要求4所述的电压合成式Doherty功率放大器，其特征在于，所述第一功率放大器、所述第二功率放大器、所述第 三功率放大器、所述第四功率放大器、所述第五功率放大器以及所述第六功率放大器均采用晶体管实现。
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