WO2024116516A1 - Circuit board and semi-fabricated product of same - Google Patents

Abstract

Provided is a circuit board which makes it possible to improve heat dissipation. This circuit board 1 comprises: a circuit pattern 3 provided on a base 9 with an insulating material 11 interposed therebetween; a semiconductor chip 5 joined through a solder 13 onto the circuit pattern 3; and a heat dissipating frame 7 joined and fixed onto the circuit pattern 3 and disposed adjacent to the semiconductor chip 5, wherein when C [mm] is the clearance of the semiconductor chip 5 below the heat dissipating frame 7, A [mm²] is the surface area of the heat dissipating frame 7, and T [mm] is the thickness, the following equation is satisfied: 15.0 ≤ A^0.5 × C ^-1.2× T^0.2 ≤ 600

Description

Circuit boards and semi-finished products

This invention relates to a circuit board with improved heat dissipation properties and its semi-finished products.

An example of a conventional circuit board is that described in Patent Document 1. In this circuit board, a circuit pattern is formed on a base via an insulating material, and an overlay circuit pattern is formed on the circuit pattern by cold spraying.

　It is said that if electronic components such as power semiconductors are mounted on the built-up circuit pattern of this conventional circuit board, the heat can be diffused by the built-up circuit pattern, reducing thermal resistance and resulting in excellent heat dissipation properties.

However, because the built-up circuit pattern is formed by cold spraying, there are voids in the internal structure that reduce thermal conductivity, limiting heat dissipation.

JP 2006-319146 A

The problem we were trying to solve was the limited heat dissipation capacity.

The present invention provides a circuit board comprising a circuit pattern provided on an insulating substrate, an electronic component bonded onto the circuit pattern, and a heat dissipation frame bonded onto the circuit pattern and disposed adjacent to the electronic component. In this circuit board, when the clearance from the electronic component at the bottom of the heat dissipation frame is C [mm], the area of the bottom surface of the heat dissipation frame is A [mm2], and the thickness of the heat dissipation frame from the circuit pattern is T [mm], the following relationship is satisfied: 15.0≦A0.5×C-1.2×T0.2≦600.

The present invention also provides a semi-finished circuit board comprising a circuit pattern provided on an insulating substrate via an insulating material, and a heat dissipation frame disposed adjacent to an arrangement area of an electronic component to be bonded onto the circuit pattern. In this semi-finished circuit board, when the clearance from the arrangement area at the bottom of the heat dissipation frame is C [mm], the area of the lower surface of the heat dissipation frame is A [mm2], and the thickness of the heat dissipation frame from the circuit pattern is T [mm], the relationship 15.0≦A0.5×C-1.2×T0.2≦600 is satisfied.

The present invention can further improve the heat dissipation properties of circuit boards and their semi-finished products.

FIG. 1A is a cross-sectional view of a circuit board having a heat dissipation frame according to a first embodiment of the present invention, and FIG. 1B is a cross-sectional view of a circuit board having no heat dissipation frame according to a comparative example. FIG. 2 is a graph showing the rate of change in thermal resistance versus the area A [mm 2 ], clearance C [mm], and thickness T [mm] of the lower surface of the heat dissipation frame of the circuit board in FIG. FIG. 3 is a table showing the relationship between the area A [mm2], clearance C [mm], and thickness T [mm] of the circuit board in FIG. 1A, and the heat dissipation effect dimensional parameters and the thermal resistance reduction rate, together with comparative examples. FIG. 4 is a graph showing the relationship between the heat dissipation effect dimension parameter and the thermal resistance reduction rate of the circuit board of FIG. 1A together with a comparative example. 5(A) is a cross-sectional view of a circuit board for a comparative example having no heat dissipation frame of FIG. 1(B), and a table showing analysis results of dimensions, thermal conductivity, and thermal resistance, and FIG. 5(B) is a planar image showing the temperature distribution on the circuit board of FIG. 5(A). 6(A) is a diagram showing a cross-sectional view of the circuit board according to Example 1 of Example 1 in FIG. 3, and an analysis result of the dimensions, thermal conductivity, and thermal resistance, and FIG. 6(B) is a planar image showing the temperature distribution of the circuit board in FIG. 6(A). FIG. 7(A) is a graph showing the analysis results of the thermal resistance of a circuit board according to Example 2 of Example 1 of FIG. 3, and FIG. 7(B) is a planar image showing the temperature distribution of the circuit board of FIG. 7(A). FIG. 8(A) is a graph showing the analysis results of the thermal resistance of the circuit board according to Example 3 of Example 1 of FIG. 3, and FIG. 8(B) is a planar image showing the temperature distribution of the circuit board of FIG. 8(A). FIG. 9(A) is a graph showing the analysis results of the thermal resistance of a circuit board according to Example 4 of Example 1 of FIG. 3, and FIG. 9(B) is a planar image showing the temperature distribution of the circuit board of FIG. 9(A). FIG. 10A is a graph showing the analysis results of the thermal resistance of a circuit board according to Example 5 of Example 1 of FIG. 3, and FIG. 10B is a planar image showing the temperature distribution of the circuit board of FIG. 10A. 11A is a graph showing the analysis results of the thermal resistance of the circuit board according to Comparative Example 2 of FIG. 3, and FIG. 11B is a planar image showing the temperature distribution of the circuit board of FIG. 11A. 12A is a graph showing the analysis results of the thermal resistance of the circuit board according to Comparative Example 3 of FIG. 3, and FIG. 12B is a planar image showing the temperature distribution of the circuit board of FIG. 12A. 13A is a graph showing the analysis results of the thermal resistance of the circuit board according to Comparative Example 4 of FIG. 3, and FIG. 13B is a planar image showing the temperature distribution of the circuit board of FIG. 13A. 14(A) is a diagram showing the cross-sectional view, dimensions, and analysis results of thermal resistance when heat dissipation conditions are changed for the circuit board of Comparative Example 1 of FIG. 1(B), and FIG. 14(B) is a planar image showing the temperature distribution of the circuit board of FIG. 14(A). FIG. 15(A) is a diagram showing the cross-sectional view, dimensions, and analysis results of thermal resistance when heat dissipation conditions are changed for the circuit board of Example 1 of Example 1 of FIGS. 1(A) and 3, and FIG. 15(B) is a planar image showing the temperature distribution of the circuit board of FIG. 15(A). FIG. 16(A) is a graph showing the analysis results of thermal resistance when heat dissipation conditions are changed in a circuit board according to Example 2 of Example 1 of FIG. 3, and FIG. 16(B) is a planar image showing the temperature distribution in the circuit board of FIG. 16(A). FIG. 17(A) is a graph showing the analysis results of thermal resistance when heat dissipation conditions are changed in a circuit board according to Example 3 of Example 1 of FIG. 3, and FIG. 17(B) is a planar image showing the temperature distribution in the circuit board of FIG. 17(A). FIG. 18(A) is a graph showing the analysis results of thermal resistance when heat dissipation conditions are changed in a circuit board according to Example 4 of Example 1 of FIG. 3, and FIG. 18(B) is a planar image showing the temperature distribution in the circuit board of FIG. 18(A). FIG. 19(A) is a graph showing the analysis results of thermal resistance when heat dissipation conditions are changed in a circuit board according to Example 5 of Example 1 of FIG. 3, and FIG. 19(B) is a planar image showing the temperature distribution in the circuit board of FIG. 19(A). 20(A) is a graph showing the analysis results of thermal resistance when the heat dissipation conditions are changed in the circuit board of Comparative Example 2 of FIG. 3, and FIG. 20(B) is a planar image showing the temperature distribution in the circuit board of FIG. 20(A). 21(A) is a graph showing the analysis results of thermal resistance when the heat dissipation conditions are changed in the circuit board of Comparative Example 3 of FIG. 3, and FIG. 21(B) is a planar image showing the temperature distribution in the circuit board of FIG. 21(A). 22(A) is a graph showing the analysis results of thermal resistance when the heat dissipation conditions are changed in the circuit board of Comparative Example 4 of FIG. 3, and FIG. 22(B) is a planar image showing the temperature distribution in the circuit board of FIG. 22(A). FIG. 23 is a plan view showing the relationship between a semiconductor chip and a heat dissipation frame of a circuit board according to a modification of the first embodiment of FIG. FIG. 24 is a plan view showing the relationship between a semiconductor chip and a heat dissipation frame of a circuit board according to a modification of the first embodiment of FIG. FIG. 25 is a plan view showing the relationship between a semiconductor chip and a heat dissipation frame of a circuit board according to a modification of the first embodiment of FIG. FIG. 26 is a plan view showing the relationship between a semiconductor chip and a heat dissipation frame of a circuit board according to a modification of the first embodiment of FIG. FIG. 27 is a cross-sectional view showing a circuit board according to a modified example of the first embodiment of FIG. FIG. 28 is a graph showing the relationship between the heat dissipation effect dimension parameter and the thermal resistance reduction rate of the circuit board according to the second embodiment, together with the approximation lines of the comparative example and the first embodiment. FIG. 29(A) is a diagram showing a cross-sectional view of the circuit board of Example 2, and analysis results of dimensions, thermal conductivity, and thermal resistance, and FIG. 29(B) is a planar image showing the temperature distribution of the circuit board of FIG. 29(A). FIG. 30A is a graph showing the analysis results of the thermal resistance of the circuit board in Example 2, and FIG. 30B is a planar image showing the temperature distribution of the circuit board in FIG. 30A. FIG. 31(A) is a graph showing the analysis results of the thermal resistance of a circuit board according to a comparative example of Example 2, and FIG. 31(B) is a planar image showing the temperature distribution of the circuit board of FIG. 31(A). FIG. 32(A) is a diagram showing the cross-sectional view, dimensions, thermal conductivity, and thermal resistance analysis results of a circuit board with different heat dissipation conditions according to Example 2, and FIG. 32(B) is a planar image showing the temperature distribution of the circuit board in FIG. 32(A). FIG. 33(A) is a graph showing the analysis results of the thermal resistance of the circuit board of Example 2 in which the heat dissipation conditions are changed, and FIG. 33(B) is a planar image showing the temperature distribution of the circuit board of FIG. 33(A). FIG. 34(A) is a graph showing the analysis results of the thermal resistance of a circuit board for a comparative example of Example 2 in which the heat dissipation conditions were changed, and FIG. 34(B) is a planar image showing the temperature distribution of the circuit board in FIG. 34(A).

The goal of improving heat dissipation was achieved by providing a heat dissipation frame that surrounds the electronic components on the circuit pattern.

As shown in the figure, the circuit board 1 comprises a circuit pattern 3, electronic components 5, and a heat dissipation frame 7. The circuit pattern 3 is provided on an insulating substrate 8. The electronic components 5 are bonded onto the circuit pattern 3. The heat dissipation frame 7 is bonded onto the circuit pattern 3 and is provided adjacent to the electronic components 5.

The heat dissipation frame 7 satisfies 15.0≦A0.5×C-1.2×T0.2≦600, where the clearance from the electronic components 5 at the bottom is C [mm], the area of the bottom surface 7a is A [mm2], and the thickness from the circuit pattern 3 is T [mm].

The heat sink frame 7 can be made of various conductive materials such as copper or aluminum.

The heat sink frame 7 may face the solder 13 in the surface direction of the circuit pattern 3.

The heat dissipation frame 7 may also be a positioning frame for the electronic component 5.

The heat dissipation frame 7 can have various frame shapes. In one embodiment, the heat dissipation frame 7 has a frame shape in which the center of the electronic component 5 in a plan view is offset from the center of the external shape of the heat dissipation frame 7. In another embodiment, the heat dissipation frame 7 has a frame shape that contains multiple electronic components 5. In yet another embodiment, the heat dissipation frame 7 has a frame shape in which the clearance C is non-uniform in the circumferential direction. In yet another embodiment, the heat dissipation frame 7 may have an annular frame shape. The thickness of the heat dissipation frame 7 may also vary in the circumferential direction.

The semi-finished circuit board 1 includes the circuit pattern 3 and heat dissipation frame 7, and is before the electronic components 5 are mounted.

FIG. 1(A) is a cross-sectional view of a circuit board having a heat dissipation frame according to a first embodiment of the present invention, and FIG. 1(B) is a cross-sectional view of a circuit board having no heat dissipation frame according to a comparative example.

The circuit board 1 of this embodiment includes a circuit pattern 3, a semiconductor chip 5, and a heat dissipation frame 7.

The circuit pattern 3 is provided on an insulating substrate 8. The insulating substrate 8 may be any insulating substrate capable of forming the circuit pattern 3, such as a metal-based substrate or a ceramic substrate. In the present embodiment, the insulating substrate 8 has an insulating material 11 provided on a base 9.

The base 9 is a metal base, and is a plate-like member made of, for example, copper. The insulating material 11 is a plate-like insulating member bonded onto the base 9. The material of the insulating material 11 is not particularly limited, but may be made of epoxy resin, cyanate resin, or the like. The insulating material 11 may contain an inorganic filler.

The circuit pattern 3 is a plate- or foil-like member made of a conductive material, for example copper. It is also possible to use a plate- or foil-like member other than copper for the circuit pattern 3, so long as it is made of a conductive material. The circuit pattern 3 has an appropriate pattern according to the circuit configuration, and includes a placement area R for the semiconductor chip 5, which is an electronic component. The placement area R is an area that is the same size as or larger than the semiconductor chip 5 in plan view, and within which the semiconductor chip 5 is placed.

The semiconductor chip 5 is bonded onto the placement area R of the circuit pattern 3. The semiconductor chip 5 is bonded using solder 13, but it can also be bonded using a conductive paste such as silver paste or other conductive adhesives. This semiconductor chip 5 has a square plate shape when viewed from above. However, various shapes of the semiconductor chip 5 can be adopted.

The heat dissipation frame 7 is a component that is bonded onto the circuit pattern 3 and is disposed adjacent to the semiconductor chip 5. In this embodiment, the heat dissipation frame 7 is a frame-shaped component that surrounds the semiconductor chip 5. However, the heat dissipation frame 7 does not need to surround the semiconductor chip 5, and may be partially open and surround the semiconductor chip 5, or may be disposed adjacent to only a portion of the outer periphery of the semiconductor chip 5.

The heat dissipation frame 7 is formed into a frame shape from a plate material. The material of the heat dissipation frame 7 is copper, the same as the circuit pattern 3 and the base 9. However, the material of the heat dissipation frame 7 is not limited to copper, and other metals and other materials may be used.

The heat dissipation frame 7 in this embodiment has a frame shape with an inner periphery and an outer periphery that are similar square shapes to match the semiconductor chip 5. Note that the inner periphery and the outer periphery of the heat dissipation frame 7 are not limited to being similar shapes, and may be different shapes.

The heat dissipation frame 7 is joined to the circuit pattern 3 by ultrasonic bonding, which is a localized and instantaneous bond with relatively low heat input. This makes it possible to suppress warping of the circuit board 1 after bonding. Furthermore, tool marks from ultrasonic bonding remain on the top surface 7b of the heat dissipation frame 7, and no tool marks remain on the circuit pattern 3 on which the semiconductor chip 5 is mounted. This means that the molten solder 13 does not accumulate in the tool marks when bonding with the solder 13, making it possible to suppress the inhibition of heat dissipation caused by the solder 13.

This heat dissipation frame 7 is set with a clearance C [mm] from the semiconductor chip 5 (placement area R) in a plan view. In this embodiment, the inner periphery of the heat dissipation frame 7 is similar to the outer periphery of the semiconductor chip 5, and the clearance C is set uniformly around the inner periphery of the heat dissipation frame 7 and the entire periphery of the semiconductor chip 5.

Note that clearance C is the clearance between the lower part of heat dissipation frame 7 and semiconductor chip 5. The lower part of heat dissipation frame 7 is the lower part of heat dissipation frame 7 that faces semiconductor chip 5 in the surface direction, and is, for example, the lower region that is bonded onto circuit pattern 3.

Such a heat dissipation frame 7 can also function as a positioning frame that positions the semiconductor chip 5 with a clearance C. However, as described below, the clearance C does not need to be uniform around the entire circumference of the semiconductor chip 5, and the heat dissipation frame 7 may be set offset relative to the semiconductor chip 5. A portion of the heat dissipation frame 7 may be in contact with the semiconductor chip 5.

The cross-sectional shape of the heat dissipation frame 7 is rectangular, but may vary from the upper surface 7b to the lower surface 7a. Examples of such cross-sectional shapes include a curved upper surface 7b and a shape in which the width varies from the upper surface 7b to the lower surface 7a. In this embodiment, the lower surface 7a of the heat dissipation frame 7 is a flat surface defined by the inner and outer peripheries of the heat dissipation frame 7 in cross section. The area A [mm2] of the lower surface 7a is the area of the heat dissipation frame 7 in a planar view.

In addition, if the underside 7a of the heat dissipation frame 7 is other than flat, for example if it is curved or uneven in cross section, the area of the underside 7a may be the area in a plan view. The width in cross section of the heat dissipation frame 7 is defined as the plate width W, which is the difference between the outer diameter and the inner diameter, with the two-sided width of the inner circumference of the rectangle of the heat dissipation frame 7 being considered as the inner diameter and the two-sided width of the outer circumference of the same rectangle being considered as the outer diameter. In addition, if the heat dissipation frame 7 is annular, it will be the original outer diameter and inner diameter.

The thickness T [mm] of the heat dissipation frame 7 is set so that the upper surface 7b of the heat dissipation frame 7 protrudes beyond the surface 5a of the semiconductor chip 5. The thickness T is the dimension from the surface 3a of the circuit pattern 3 of the heat dissipation frame 7.

The heat dissipation frame 7 faces the solder 13 in the surface direction of the circuit pattern 3. Therefore, the heat dissipation frame 7 has the effect of preventing solder flow when the semiconductor chip 5 is soldered. Note that the surface direction refers to the direction along the surface of the circuit pattern 3.

The thermal resistance related to heat dissipation in response to heat generated by the semiconductor chip 5 in the circuit board 1 of FIG. 1(A) and the comparative circuit board 1 of FIG. 1(B) shows the trend shown in FIG. 2.

Figure 2 is a graph showing the rate of change in thermal resistance versus area A, clearance C, and thickness T of the heat sink frame 7 of the circuit board 1 in Figure 1(A). The thermal resistance is shown in Figure 5 between a point at the center of the front surface of the semiconductor chip 5 and a corresponding point on the rear surface of the base 9.

In Figure 2, three graphs are displayed, one on the left, one in the center, and one on the right, showing the rate of change in thermal resistance. The left graph in Figure 2 is for changes in area A (plate width W) shown on the horizontal axis, the center graph in Figure 2 is for changes in clearance C, and the right graph in Figure 2 is for changes in thickness T.

The dashed line level marked "without Cu frame" refers to the circuit board 1 without a heat dissipation frame in the comparative example in FIG. 1(B). The materials and dimensions of each part in the comparative example in FIG. 1(B) are the same as those in Example 1 in FIG. 1(A).

As shown in Figure 2, in comparison with "without Cu frame" (without heat dissipation frame 7), the circuit board 1 of this embodiment, equipped with a heat dissipation frame 7, had a clearance C = 0.5 mm, and a thickness T = 1.0 mm, and showed a thermal resistance change of up to -4.9% compared to "without Cu frame" due to the change in area A for board widths W = 2 mm to 14 mm.

When the plate width W = 4.0 mm and thickness T = 1.0 mm, a change in clearance C of 1 mm to 0.2 mm showed a thermal resistance change of up to -5.0%. When the plate width W = 4.0 mm and clearance C = 0.5 mm, a change in thickness T of 1 mm to 2 mm showed a thermal resistance change of up to -3.6%.

Therefore, we focused on the relationship between the area A, clearance C, and thickness T and the thermal resistance reduction effect, and obtained the results shown in Figures 3 and 4.

Fig. 3 is a chart showing the relationship between the area A, clearance C, and thickness T of the circuit board 1 in Fig. 1(A) and the thermal resistance reduction rate and heat dissipation effect dimensional parameters, along with comparative examples. Fig. 4 is a graph showing the relationship between the heat dissipation effect dimensional parameters and the thermal resistance reduction rate of the circuit board in Fig. 1(A) along with comparative examples.

Comparative example 1 in Figure 3 is for a circuit board 1 that does not have the heat dissipation frame of Figure 1 (B). Example 1 and comparative examples 2 to 4 in Figure 3 are for a circuit board 1 that has a heat dissipation frame 7. Figure 3 shows the results when the area, clearance, and thickness of the heat dissipation frame 7 are changed.

As shown in Figure 3, in Comparative Examples 2 to 4, the thermal resistance reduction rate is -1.8% or less. If the thermal resistance reduction rate is less than 2%, the thermal resistance reduction effect is low. Therefore, if the range excluding less than 2%, where the thermal resistance reduction effect is low, including Comparative Examples 2 to 4, is specified, the heat dissipation effect dimension parameter will be as shown in the following formula (1).

A0.5 x C-1.2 x T0.2 ... formula (1)

Looking at the heat dissipation effect dimension parameters for Comparative Examples 2 to 4 in Figure 3, A0.5 x C-1.2 x T0.2 < 15 for all.

On the other hand, in Examples 1 to 6 of Example 1 in FIG. 3 (hereinafter, Examples 1-1 to 1-6), the heat dissipation effect dimension parameters all satisfy the following formula (2). Note that the heat dissipation effect dimension parameter has a practical upper limit of 600.

15.0≦A0.5×C-1.2×T0.2≦600...Formula (2)

If we plot the results of Figure 3 on a graph, we get Figure 4.

The three data from the left in Figure 4 are the thermal resistance reduction rates versus the heat dissipation effect size parameters for Comparative Examples 2 to 4 in Figure 3. The data in Figure 4 excluding Comparative Examples 2 to 4 are the thermal resistance reduction rates versus the heat dissipation effect size parameters for Examples 1-1 to 1-5.

The approximate line based on the data from Comparative Examples 2 to 4 is L1, and the approximate line based on the data from Example 1 is L2. There is a clear critical point between the approximate lines L1 and L2 at the heat dissipation effect dimension parameter A0.5 x C-1.2 x T0.2 = 15.

Furthermore, the bottom row of Figure 3 shows the heat dissipation effect dimension parameters for Comparative Example 5, where area A is 64 mm2, clearance C is 0.5 mm, and thickness T is 0.08 mm. This heat dissipation effect dimension parameter was 11.1. The thermal resistance reduction rate for this heat dissipation effect dimension parameter can be obtained along the approximation line L1.

Also, Figure 3 shows the heat dissipation effect dimensional parameters for Example 1-6, where area A is 873 mm2, clearance C is 0.1 mm, and thickness T is 3 mm. This heat dissipation effect dimensional parameter can be obtained along approximation line L2, and was 583.37, which is close to the upper limit.

When manufacturing the circuit board 1, the circuit pattern 3 is formed on the insulating substrate 8. The heat sink frame 7 is ultrasonically bonded to the portion of the circuit pattern 3 surrounding the placement area R, completing the semi-finished circuit board 1.

The size of the heat dissipation frame 7 is area A and thickness T so that the clearance for the semiconductor chip 5 is C, and the relationship between C, A, and T regarding the heat dissipation properties of this heat dissipation frame 7 is given by formula (2).

For this semi-finished circuit board 1, the conductor chip 5 is bonded onto the circuit pattern 3, using the heat dissipation frame 7 as a positioning frame. In this embodiment, the semiconductor chip 5 is bonded onto the circuit pattern 3 with solder 13, and at this time the heat dissipation frame 7 prevents the solder from flowing outside the frame. The semiconductor chip 5 is then fixed onto the circuit pattern 3 by the hardened solder 13.

The circuit board 1 of this embodiment manufactured in this manner has improved heat dissipation properties due to the heat dissipation frame 7. In particular, the heat dissipation properties of the heat dissipation frame 7 can be further improved by setting the clearance C, area A, and thickness T with respect to the semiconductor chip 5 according to formula (2).

Figures 5 to 10 show the analysis results of the heat dissipation properties for the comparative example and examples 1-1 to 1-5. Figures 5(A) and 6(A) are diagrams showing cross-sectional views of the circuit boards for the comparative example and examples 1-1 to 1-5, respectively, along with the analysis results of the dimensions, thermal conductivity, and thermal resistance of each part, and Figures 5(B) and 6(B) are planar images showing the temperature distribution of the circuit boards for the comparative example and examples 1-1 to 1-5, respectively.

Fig. 7(A), Fig. 8(A), Fig. 9(A), and Fig. 10(A) are diagrams showing the analysis results of the thermal resistance of the circuit boards according to Comparative Examples 2 to 4, respectively, and Fig. 7(B), Fig. 8(B), Fig. 9(B), and Fig. 10(B) are planar images showing the temperature distribution of the circuit boards according to the Comparative Example and Examples 1-1 to 1-5, respectively.

The specifications of the circuit board 1 of Comparative Example 1 in FIG. 5(A), such as dimensions, are as follows: The specifications of the chip (semiconductor chip 5) are thickness: 0.1 mm, plane size: 5×5 mm, and thermal conductivity: 85 W/mK. The specifications of the solder (solder 13) are thickness: 0.2 mm, and thermal conductivity: 49 W/mK. The specifications of the copper circuit (circuit pattern 3) are material: C1020, thickness: 0.5 mm, size: 20×20 mm, and thermal conductivity: 390 W/mK. The specifications of the insulating material (insulating material 11) are material: resin (liquid crystal polymer) filled with alumina and boron nitride powder, thickness: 0.12 mm, and thermal conductivity: 7.5 W/mK. The specifications of the copper base (base 9) are material: C1921, thickness: 2 mm, and thermal conductivity: 364 W/mK.

The analysis results of the thermal resistance are Tmax: 150.7°C at the center point on the front surface of the semiconductor chip 5, T _{copper base chip bottom} : fixed at 20.0°C at the point on the back surface of the base 9 corresponding to this point, and thermal resistance R: 0.654 kW. The analysis of the thermal resistance was performed with a heat amount of 200 W. The temperature distribution at this time is shown in FIG. 5(B). This Comparative Example 1 is compared with Examples 1 to 5 of the Example 1. In FIG. 5(B), the center is the hottest and the temperature decreases toward the outside.

(Comparison between Example 1 and Comparative Example 1)
Example 1 in FIG. 6A relates to Example 1-1 in FIG. 3. The specifications of this circuit board 1, such as dimensions, are the same as those of the comparative example without a heat sink frame, except for the copper plate (heat sink frame 7). The specifications of the copper plate (heat sink frame 7) are: material: C1020 (same as circuit pattern 3), thickness: 1.0 mm, size: 10×10 mm (hole 6×6 mm), thermal conductivity: 390 W/mK. The size of the hole indicates the size of the inner circumference of the heat sink frame 7. The heat sink frame 7 has an area A of 64 mm2, a clearance C of 0.5 mm, and a thickness T of 1 mm, and the heat sink effect dimension parameter: 18.4 satisfies formula (2).

The thermal resistance analysis was performed under the same conditions as the comparative example, with a heat quantity of 200 W and a fixed temperature of the bottom of the board (T _{copper base chip under)} : 20.0°C. The analysis results were Tmax: 146.4°C at the center point of the surface of the semiconductor chip 5, T _{copper base chip under} : 20.0°C at the point on the back of the base 9 corresponding to this point, and thermal resistance R: 0.632 KW. The rate of change of thermal resistance was ΔR: 0.022 K/W, and the thermal resistance was reduced by 3.3% compared to the comparative example 1. The temperature distribution at this time is as shown in FIG. 6(B).

As is clear from Figures 5(A) and (B) and Figures 6(A) and (B), in Example 1-1, the heat dissipation performance is improved by setting the heat dissipation frame 7 to satisfy formula (2).

The thermal resistance analysis results in Figure 7 (A) relate to Example 1-2 in Figure 3. In this circuit board 1, the size of the copper plate (heat dissipation frame 7) is 10 x 10 mm (holes 5.4 x 5.4 mm), and the clearance is reduced compared to Example 1-1 in Figure 6. The area A of the heat dissipation frame 7 has been increased by 71 mm2. The heat dissipation effect dimension parameter: 58.1 resulting from the change in clearance C and area A of this heat dissipation frame 7 satisfies formula (2).

The analysis results of Example 1-2 are Tmax: 144.2°C, T _{copper base chip bottom} : fixed at 20.0°C, thermal resistance R: 0.621KW. The rate of change of thermal resistance is ΔR: 0.033K/W, and the thermal resistance is reduced by 5.0% compared to Comparative Example 1. The temperature distribution at this time is as shown in FIG. 7B.

As is clear from Figures 5(A) and (B) and Figures 7(A) and (B), in Example 1-2, the setting of the heat dissipation frame 7 satisfies formula (2), and the heat dissipation performance is further improved by reducing the clearance.

The thermal resistance analysis results in Figure 8 (A) are for Example 1-3 in Figure 3. In this circuit board 1, the thickness T of the copper plate (heat dissipation frame 7) has been increased to 2.0 mm compared to Example 1-1 in Figure 6. The heat dissipation effect dimension parameter: 21.1 due to the change in thickness T of the heat dissipation frame 7 satisfies formula (2).

The analysis results of Example 1-3 are Tmax: 146.0°C, T _{copper base chip bottom} : fixed at 20.0°C, thermal resistance R: 0.630KW. The rate of change of thermal resistance is ΔR: 0.023K/W, and the thermal resistance is reduced by 3.6% compared to Comparative Example 1. The temperature distribution at this time is as shown in FIG. 8(B).

As is clear from Figures 5(A) and (B) and Figures 8(A) and (B), in Example 1-3, the setting of the heat dissipation frame 7 satisfies formula (2), and the heat dissipation performance is further improved by increasing the thickness.

The analysis results of thermal resistance in Figure 9 (A) are for Example 1-4 in Figure 3. In this circuit board 1, the size of the copper plate (heat dissipation frame 7) is 20 x 20 mm (holes 6 x 6 mm) compared to Example 1-1 in Figure 6, and the outer diameter of the heat dissipation frame 7 is enlarged to increase the area. The heat dissipation effect dimension parameter: 43.8 due to the change in area A of this heat dissipation frame 7 satisfies formula (2).

The analysis results of this Example 1-4 are Tmax: 144.3°C, T _{copper base chip} : 20.0°C, and thermal resistance R: 0.622KW. The rate of change of thermal resistance is ΔR: 0.032K/W, and the thermal resistance is reduced by 4.9% compared to the comparative example. The temperature distribution at this time is as shown in FIG. 9(B).

As is clear from Figures 5(A) and (B) and Figures 9(A) and (B), in Example 1-4, the setting of the heat dissipation frame 7 satisfies formula (2), and the heat dissipation performance is further improved by increasing the area toward the outer diameter.

The thermal resistance analysis results in Figure 10 (A) are for Example 1-5 in Figure 3. In this circuit board 1, compared to Example 1-1 in Figure 6, the size of the copper plate (heat dissipation frame 7) is 20 x 20 mm (hole 5.4 x 5.4 mm), and the outer diameter of the heat dissipation frame 7 is enlarged while the inner diameter is reduced, increasing the area A to 371 mm2. Also, in Example 1-5, the clearance C is reduced to 0.2 mm, and the thickness T is increased to 2 mm. The heat dissipation effect dimension parameter: 152.6 resulting from changes in the area A, clearance C, and thickness T of this heat dissipation frame 7 satisfies formula (2).

The analysis results of Example 1-5 are Tmax: 140.1°C, T _{copper base chip bottom} : fixed at 20.0°C, thermal resistance R: 0.601K/W. The rate of change of thermal resistance is ΔR: -0.031K/W, and the thermal resistance is reduced by 8.1% compared to the comparative example. The temperature distribution at this time is as shown in Figure 10(B).

As is clear from Figures 5(A) and (B) and Figures 10(A) and (B), the heat dissipation effect dimension parameter: 152.6 due to the setting of the heat dissipation frame 7 satisfies formula (2), and the heat dissipation performance is further improved by increasing the area A and thickness T and decreasing the clearance C.

(Comparison between Comparative Example 1 and Comparative Examples 2 to 4)
Next, Comparative Example 1 will be compared with Comparative Examples 2 to 4.

Figures 11 to 13 show the analysis results of the heat dissipation properties for Comparative Examples 2 to 4. Figures 11(A), 12(A), and 13(A) are graphs showing the analysis results of the thermal resistance of the circuit boards for Comparative Examples 2 to 4, respectively, and Figures 11(B), 12(B), and 13(B) show the temperature distributions for Comparative Examples 2 to 4, respectively.

The analysis results of thermal resistance in Figure 11 (A) are for Comparative Example 2 in Figure 3. In this circuit board 1, compared to Example 1 in Figure 6, the size of the copper plate (heat dissipation frame 7) is 8 x 8 mm (holes 6 x 6 mm), and the outer diameter of the heat dissipation frame 7 is reduced to area A: 28 mm2. The heat dissipation effect dimension parameter: 12.2 due to the change in size of this heat dissipation frame 7 does not satisfy formula (2).

In this comparative example 2, Tmax: 148.4°C, T _{copper base chip bottom} : fixed at 20.0°C, thermal resistance R: 0.642 K/W. The rate of change in thermal resistance was ΔR: 0.010 K/W, and the thermal resistance was only reduced by 1.8% as shown on the approximation line L1 compared to comparative example 1. The temperature distribution at this time is shown in Figure 11 (B).

As is clear from Figures 5(A) and (B) and Figures 11(A) and (B), in Comparative Example 2, the heat dissipation effect dimension parameter: 12.2 due to the setting of the heat dissipation frame 7 did not satisfy formula (2), and there was no improvement in heat dissipation.

The analysis results of thermal resistance in Figure 12 (A) are for Comparative Example 3 in Figure 3. In this circuit board 1, compared to Example 1 in Figure 6, the size of the copper plate (heat dissipation frame 7) is 10 x 10 mm (hole 7 x 7 mm), and the inner diameter of the heat dissipation frame 7 is enlarged, decreasing the area A to 51 mm2. Clearance C is enlarged to 1 mm. The heat dissipation effect dimension parameter: 7.1 due to this change in the size of the heat dissipation frame 7 does not satisfy formula (2).

In this comparative example 3, Tmax: 148.7°C, T _{copper base chip bottom} : fixed at 20.0°C, thermal resistance R: 0.643 K/W. The rate of change in thermal resistance was ΔR: 0.011 K/W, and the thermal resistance was only reduced by 1.6% as shown on the approximation line L1 compared to comparative example 1. The temperature distribution at this time is shown in Figure 12 (B).

As is clear from Figures 5(A) and (B) and Figures 12(A) and (B), in Comparative Example 3, the heat dissipation effect dimension parameter: 7.1 due to the setting of the heat dissipation frame 7 did not satisfy formula (2), and there was no improvement in heat dissipation.

The analysis results of thermal resistance in Figure 13 (A) relate to Comparative Example 4 in Figure 3. In this circuit board 1, the size of the copper plate (heat dissipation frame 7) is 8 x 8 mm (holes 6 x 6 mm) compared to Example 1-1 in Figure 6, and the outer diameter of the heat dissipation frame 7 is reduced to reduce the area A to 28 mm2. Also, in Comparative Example 3, the thickness T is reduced to 0.5 mm. The heat dissipation effect dimension parameter: 10.6 resulting from this change in the size of the heat dissipation frame 7 does not satisfy formula (2).

The analysis results of this Comparative Example 4 are Tmax: 148.7°C, T _{copper base chip bottom} : fixed at 20.0°C, thermal resistance R: 0.644 K/W. The rate of change in thermal resistance is ΔR: 0.012 K/W, and the thermal resistance was only reduced by 1.5% as shown on the approximation line L1 compared to Comparative Example 1. The temperature distribution at this time is shown in Figure 13 (B).

As is clear from Figures 5(A) and (B) and Figures 13(A) and (B), in Comparative Example 4, the heat dissipation effect dimension parameter: 10.6 due to the setting of the heat dissipation frame 7 did not satisfy formula (2), and there was no improvement in heat dissipation.

(Comparison of analysis results with different heat dissipation conditions)
Fig. 14(A) is a diagram showing the analysis results of thermal resistance when the cross-sectional view, dimensions, and heat dissipation conditions of the circuit board according to Comparative Example 1 in Fig. 1(B) are changed, and Fig. 14(B) is a planar image showing the temperature distribution of the circuit board in Fig. 14(A). Fig. 15(A) is a diagram showing the analysis results of thermal resistance when the cross-sectional view, dimensions, thermal conductivity, and heat dissipation conditions of the circuit board according to Example 1-1 in Fig. 3 are changed, and Fig. 15(B) is a planar image showing the temperature distribution of the circuit board in Fig. 15(A).

Figs. 16 to 19 show the analysis results when the heat dissipation conditions are changed for the circuit boards of Examples 1-2 to 1-5 in Fig. 3. Figs. 16(A), 17(A), 18(A), and 19(A) are charts showing the analysis results of the thermal resistance of the circuit boards of Examples 1-2 to 1-5, respectively, and Figs. 16(B), 17(B), 18(B), and 19(B) are planar images showing the temperature distribution of the circuit boards of Examples 1-2 to 1-5, respectively.

The thermal resistance analysis in Figures 14 to 19 was performed with a heat quantity of 200 W, and the heat dissipation conditions were that the heat transfer coefficient of the bottom surface of the board was h = 30,000 W/m2·K, and the heat was dissipated into a 20°C environment.

The analysis results of the thermal resistance in Comparative Example 1 are Tmax: 175.2°C at the center point on the front surface of the semiconductor chip 5, T _{copper base chip under} the point on the back surface of the metal substrate 9 corresponding to this point: 53.7°C, and thermal resistance R: 0.607 K/W. The temperature distribution at this time is shown in FIG.

Comparative Example 1 and Examples 1 to 5 of Example 1 are compared when the heat dissipation conditions are changed as described above.

In Example 1-1 in Fig. 15(A), the heat dissipation conditions were changed for the circuit board 1 having the shape and dimensions of Example 1-1 in Fig. 3. The heat dissipation effect dimension parameter: 18.4 due to the thickness and size settings of the heat dissipation frame 7 satisfies formula (2) in the same way as when the temperature T of the bottom surface of the board ( _{below the copper base chip} ): is fixed at 20.0°C.

The analysis results of the thermal resistance are Tmax: 169.6°C at the center point on the front surface of the semiconductor chip 5, T _{copper base chip under} : 51.9°C at the point on the back surface of the metal substrate 9 corresponding to this point, and thermal resistance R: 0.588 K/W. The rate of change of thermal resistance is ΔR: -0.019 K/W, and the thermal resistance has decreased compared to Comparative Example 1, as in the case where the temperature of the bottom surface of the substrate is fixed at 20.0°C _{under the copper base chip} . The temperature distribution at this time is shown in Figure 15 (B).

As is clear from Figures 14(A) and (B) and Figures 15(A) and (B), in Example 1-1, the heat dissipation effect dimension parameter: 18.4 due to the setting of the heat dissipation frame 7 satisfied formula (2), and thus the heat dissipation performance improved even when the heat dissipation conditions were changed.

16A shows the above-mentioned change in heat dissipation conditions for the circuit board 1 having the shape and dimensions of Example 1-2 in FIG. 3. The heat dissipation effect dimension parameter: 58.1 due to the change in the clearance C and area A of the heat dissipation frame 7 from Example 1-1 satisfies formula (2) in the same way as when the temperature T of the bottom surface of the board ( _{below the copper base chip} ): is fixed at 20.0°C.

The analysis results of the thermal resistance are Tmax: 167.0°C at the center point on the front surface of the semiconductor chip 5, T _{copper base chip under} : 51.3°C at the point on the back surface of the metal substrate 9 corresponding to this point, and thermal resistance R: 0.578 K/W. The rate of change of thermal resistance is ΔR: -0.010 K/W, and the thermal resistance has decreased compared to Comparative Example 1, as in the case where the temperature of the bottom surface of the substrate is fixed at 20.0°C _{under the copper base chip} . The temperature distribution at this time is shown in FIG. 16(B).

As is clear from Figures 14(A) and (B) and Figures 16(A) and (B), in Example 1-2, the heat dissipation effect dimension parameter: 58.1 due to the setting of the heat dissipation frame 7 satisfies formula (2), and by reducing the clearance C and increasing the area A, the heat dissipation performance was improved even when the heat dissipation conditions were changed.

Figure 17 (A) shows the analysis results when the heat dissipation conditions were changed as described above for the circuit board 1 with the shape and dimensions of Example 3-3 in Figure 3. The heat dissipation effect dimension parameter: 21.1 due to the change in the thickness of this heat dissipation frame 7 compared to Example 1-1 satisfies formula (2).

The analysis results of the thermal resistance are Tmax: 169.1°C at the center point on the front surface of the semiconductor chip 5, T _{copper base chip under} : 51.8°C at the point on the back surface of the metal substrate 9 corresponding to this point, and thermal resistance R: 0.587 K/W. The rate of change of thermal resistance is ΔR: -0.002 K/W, and the thermal resistance has decreased compared to Comparative Example 1, as in the case where the temperature of the _bottom surface of the substrate is fixed at 20.0°C. The temperature distribution at this time is shown in Figure 17 (B).

As is clear from Figures 14(A) and (B) and Figures 17(A) and (B), in Example 1-3, the heat dissipation effect dimension parameter: 21.1 due to the setting of the heat dissipation frame 7 satisfies formula (2), and by increasing the thickness T, the heat dissipation performance improved even when the heat dissipation conditions were changed.

Figure 18 (A) shows the analysis results when the heat dissipation conditions were changed as described above for the circuit board 1 with the shape and dimensions of Example 1-4 in Figure 3. The heat dissipation effect dimension parameter: 43.8 resulting from the change in area A of the heat dissipation frame 7 compared to Example 1-1 satisfies formula (2).

The analysis results of the thermal resistance are Tmax: 166.0°C at the center point on the front surface of the semiconductor chip 5, T _{copper base chip under} : 50.2°C at the point on the back surface of the metal substrate 9 corresponding to this point, and thermal resistance R: 0.579 K/W. The rate of change of thermal resistance is ΔR: -0.009 K/W, and the thermal resistance has decreased compared to Comparative Example 1, as in the case where the temperature of the bottom surface of the substrate is fixed at 20.0°C _{under the copper base chip} . The temperature distribution at this time is shown in FIG. 18(B).

As is clear from Figures 14(A) and (B) and Figures 18(A) and (B), in Example 1-4, the heat dissipation effect dimension parameter: 43.8 due to the setting of the heat dissipation frame 7 satisfies formula (2), and by increasing the area A, the heat dissipation performance was improved even when the heat dissipation conditions were changed.

Figure 19 (A) shows the analysis results when the heat dissipation conditions were changed as described above for the circuit board 1 with the shape and dimensions of Example 1-5 in Figure 3. The heat dissipation effect dimension parameter: 152.6 due to the changes in area A, clearance C, and thickness T of this heat dissipation frame 7 compared to Example 1-1 satisfies formula (2).

The analysis results of the thermal resistance are Tmax: 166.0°C at the center point on the front surface of the semiconductor chip 5, T _{copper base chip under} : 50.2°C at the point on the back surface of the metal substrate 9 corresponding to this point, and thermal resistance R: 0.579 K/W. The rate of change of thermal resistance is ΔR: -0.027 K/W, and the thermal resistance has decreased compared to Comparative Example 1, as in the case where the temperature of the bottom surface of the substrate is fixed at 20.0°C _{under the copper base chip} . The temperature distribution at this time is shown in Figure 19 (B).

As is clear from Figures 14(A) and (B) and Figures 19(A) and (B), in Example 1-5, the heat dissipation effect dimension parameter: 152.6 due to the setting of the heat dissipation frame 7 satisfies formula (2), and by increasing the area A and thickness T and decreasing the clearance C, the heat dissipation performance improved even when the heat dissipation conditions were changed.

(Comparison of Comparative Examples 2 to 4 and Comparative Example 1 with different heat dissipation conditions)
FIG. 14B of Comparative Example 1 in which the heat dissipation conditions were changed as described above is compared with Comparative Examples 2 to 4 in which the heat dissipation conditions were changed as described above.

Figs. 20 to 22 show the analysis results when the heat dissipation conditions are changed for the circuit boards of Comparative Examples 2 to 4 in Fig. 3. Figs. 20(A), 21(A), and 22(A) are charts showing the analysis results of the thermal resistance of the circuit boards of Comparative Examples 2 to 4, respectively, and Figs. 20(B), 21(B), and 22(B) are planar images showing the temperature distribution of the circuit boards of Comparative Examples 2 to 4, respectively.

Fig. 20(A) shows the analysis results when the heat dissipation conditions were changed as described above for the circuit board 1 having the shape and dimensions of Comparative Example 2 in Fig. 3. The heat dissipation effect dimension parameter: 12.2 due to the change in the size of the heat dissipation frame 7 from Example 1-1 does not satisfy formula (2), similarly to the case where the temperature T of the bottom surface of the board ( _{below the copper base chip} ): is fixed at 20.0°C.

The analysis results of the example in which the heat dissipation conditions of Comparative Example 2 were changed as described above were Tmax: 172.3°C, T _{copper base chip under} : 52.9°C, and thermal resistance R: 0.597 K/W. The rate of change in thermal resistance was ΔR: 0.009 K/W, and no reduction in thermal resistance was observed compared to the example in Fig. 14 in which the heat dissipation conditions of Comparative Example 1 were changed as described above. The temperature distribution at this time is shown in Fig. 20(B).

As is clear from Figures 14(A) and (B) and Figures 20(A) and (B), in Comparative Example 2, the heat dissipation effect dimension parameter: 12.2 due to the setting of the heat dissipation frame 7 did not satisfy formula (2), and there was no improvement in heat dissipation even when the heat dissipation conditions were changed.

Fig. 21(A) shows the analysis results when the heat dissipation conditions were changed as described above for the circuit board 1 having the shape and dimensions of Comparative Example 3 in Fig. 3. The heat dissipation effect dimension parameter: 7.1 due to the change in size of the heat dissipation frame 7 from Example 1-1 does not satisfy formula (2), as in the case where the temperature T of the bottom surface of the board ( _{below the copper base chip)} : is fixed at 20.0°C.

The analysis results of the example where the heat dissipation conditions of Comparative Example 3 were changed as described above were Tmax: 172.4°C, T _{copper base chip bottom} : 52.7°C, and thermal resistance R: 0.598 K/W. The rate of change in thermal resistance was ΔR: 0.010 K/W, and no decrease in thermal resistance was observed compared to the example where the heat dissipation conditions of Comparative Example 1 were changed as described above. The temperature distribution at this time is shown in Figure 21 (B).

As is clear from Figures 14(A) and (B) and Figures 21(A) and (B), in Comparative Example 3, the heat dissipation effect dimension parameter: 7.1 due to the setting of the heat dissipation frame 7 did not satisfy formula (2), and there was no improvement in heat dissipation even when the heat dissipation conditions were changed.

Fig. 22(A) shows the analysis results when the heat dissipation conditions were changed as described above for the circuit board 1 having the shape and dimensions of Comparative Example 4 in Fig. 3. The heat dissipation effect dimension parameter: 10.6 resulting from the change in the size of the heat dissipation frame 7 from Example 1-1 does not satisfy formula (2), similarly to the case where the temperature T of the bottom surface of the board ( _{below the copper base chip} ): is fixed at 20.0°C.

The analysis results of the example in which the heat dissipation conditions of Comparative Example 4 were changed as described above were Tmax: 172.7°C, T _{copper base chip bottom} : 53.0°C, and thermal resistance R: 0.598 K/W. The rate of change in thermal resistance was ΔR: 0.010 K/W, and no decrease in thermal resistance was observed compared to the example in which the heat dissipation conditions of Comparative Example 1 were changed as described above. The temperature distribution at this time is shown in Figure 22 (B).

As is clear from Figures 14 (A) and (B) and Figures 22 (A) and (B), in Comparative Example 4, the heat dissipation effect dimension parameter: 10.6 due to the setting of the heat dissipation frame 7 did not satisfy formula (2), and there was no improvement in heat dissipation even when the heat dissipation conditions were changed.

[Modification]
23 to 26 are plan views showing the relationship between the semiconductor chip and the heat dissipation frame of the circuit board according to the modification of the first embodiment of FIG. 1A. Fig. 27 is a cross-sectional view of the circuit board showing a modification of the thickness of the heat dissipation frame according to the modification of the first embodiment of FIG.

In the modified example of FIG. 23, the center of the semiconductor chip 5 is shifted from the center of the external shape of the heat dissipation frame 7 in a plan view, creating a frame shape. The widths of each side of the heat dissipation frame 7 are B1/2, B2/2, B3/2, and B4/2. The area A of this heat dissipation frame 7 is the area of a square with one side B, simplified based on the widths B1, B2, B3, and B4, and this area A satisfies formula (2) in relation to the thickness T and clearance C.

In the modified example of FIG. 24, the heat dissipation frame 7 has a frame shape that encloses multiple semiconductor chips 5, for example two adjacent semiconductor chips 5. The widths of each side of the heat dissipation frame 7 are B1/2, B2/2, B3/2, B4/2, B5/2, B6/2, B7/2, and B8/2. The area A of the heat dissipation frame 7 is the area of a square with one side B, simplified based on the widths B1, B2, B3, B4, B5, B6, B7, and B8, and satisfies formula (2) in relation to the thickness T and the clearance C.

In the modified example of FIG. 25, the clearance is non-uniform in the circumferential direction. For example, the clearance between each side of the heat dissipation frame 7 and each side of the semiconductor chip 5 is set to have the relationship C4<C1<C2<C3. The size of the clearances C1 to C4 can be set arbitrarily, and C1 and C4 may be set to the same, and C2 and C3 may be set to the same. The clearance C that satisfies formula (2) is the average value C = Cave {C1, C2, ...}.

In the modified example shown in FIG. 26, the heat dissipation frame 7 is annular in shape for the semiconductor chip 5 which is rectangular in plan view. The clearance C that satisfies formula (2) is the average value C=Cave of the clearance between each side of the semiconductor chip 5 and the inner periphery of the heat dissipation frame 7.

In the modified example of FIG. 27, the thickness of the rectangular heat dissipation frame 7 is made to vary in the circumferential direction, for example, the thickness of one opposing side is set to T1>T2. The thickness of the other opposing side can be set to T1 or T2. The thickness of the other opposing side can also be formed in an inclined or stepped shape to connect T1 and T2.

In any case, the thickness T that satisfies formula (2) is the average value T = Tave{T1, T2, ...}.

In the first embodiment, the thickness T of the heat dissipation frame 7 is set to be greater than the thickness of the semiconductor chip 5, but the thickness T can be freely set as long as the heat dissipation effect dimension parameter satisfies formula (2).

The circuit pattern 3, heat dissipation frame 7, and base 9 are all made of copper, but they can be replaced with aluminum, aluminum alloy, stainless steel, etc., as long as the heat dissipation effect dimensional parameters satisfy formula (2) and the heat dissipation performance can be improved compared to Comparative Example 1, as in Example 1. In this case, it is not necessary to construct everything from the same material, and the material of one of the circuit pattern 3, heat dissipation frame 7, and base 9 can be changed relative to the others.

Figure 28 is a graph showing the relationship between the heat dissipation effect dimensional parameters and the thermal resistance reduction rate when the material of the heat dissipation frame of the circuit board in Figure 1 is replaced with aluminum in Example 2, along with the approximation lines for the comparative example and Example 1.

The basic configuration of this second embodiment is the same as that of the first embodiment, and components that are the same as or correspond to those of the first embodiment are given the same reference numerals, and duplicated explanations will be omitted.

The circuit board 1 of this second embodiment is the same as that of the first embodiment, except that the material of the heat sink frame 7 is changed to pure aluminum (A1050), and Figure 28 shows the result.

FIG. 28 corresponds to FIG. 4 of Example 1. In addition to the data and approximation lines L1 and L2 of Example 1, FIG. 28 shows the data and approximation lines L3 and L4 of Example 2. L3 is an approximation line of a comparative example related to Example 2, and L4 is an approximation line of Example 2. The approximation lines L3 and L4 of Example 2 showed the same tendency as the approximation lines L1 and L2 of Example 1.

Figure 29(A) is a diagram showing the cross-sectional view, dimensions, thermal conductivity, and thermal resistance analysis results of the circuit board of Example 2-1, and Figure 29(B) is a planar image showing the temperature distribution of the circuit board of Figure 29(A).

The thermal resistance analysis results in Figure 29 (A) relate to the data on the left side of the approximation line L4 in Figure 28. As shown in Figure 29 (A), the dimensions of the circuit board 1 in Example 2 are the same as those in Example 1. On the other hand, the pure aluminum plate (heat dissipation frame 7) is made of pure aluminum A1050 (different from the circuit pattern 3) and has a thermal conductivity of 220 W/mK. The heat dissipation effect parameter determined by the thickness and size settings of this heat dissipation frame 7 is 18.4, which satisfies formula (2).

The thermal resistance analysis was performed under the conditions of a heat quantity of 200 W and a fixed temperature T of the bottom surface of the board _{under the copper base chip} : 20.0°C. The analysis results were Tmax at the center point of the front surface of the semiconductor chip 5: 147.7°C, T at the corresponding point on the back surface of the base 9 _{under the copper base chip} : 20.0°C, and thermal resistance R: 0.638 kW. The thermal resistance was reduced by 2.4% compared to Comparative Example 1. The temperature distribution at this time is shown in FIG. 29(B).

As is clear from Figures 5(A) and (B) and Figures 29(A) and (B), even when the material of the heat dissipation frame 7 was changed to pure aluminum, the heat dissipation performance was improved by satisfying formula (2).

Fig. 30(A) is a diagram showing the analysis results of the thermal resistance of the circuit board in Example 2-2, and Fig. 30(B) is a planar image showing the temperature distribution of the circuit board in Fig. 30(A).

The thermal resistance analysis results in Figure 30 (A) relate to the data on the right side of the approximation line L4 in Figure 28. In this circuit board 1, the size of the pure aluminum plate (heat dissipation frame 7) is 20 x 20 mm (hole 5.4 x 5.4 mm) and the thickness is 2.0 mm, and the clearance has been reduced compared to the example in Figure 29, while the area of the heat dissipation frame 7 has been increased toward the outer diameter and the thickness has been increased. The heat dissipation effect parameter resulting from the changes in clearance C, area A, and thickness T of this heat dissipation frame 7 is 152.6, which satisfies formula (2).

The analysis results of Example 2-2 are Tmax: 143.0°C, T _{copper base chip bottom} : 20.0°C (fixed), and thermal resistance R: 0.615KW. The rate of change of thermal resistance is ΔR: 0.023K/W, and the thermal resistance is reduced by 5.9% compared to Comparative Example 1. The temperature distribution at this time is shown in FIG. 30(B).

As is clear from Figures 5(A) and (B) and Figures 30(A) and (B), in Example 2-2, even when the material of the heat dissipation frame 7 was changed to pure aluminum, formula (2) was satisfied, and the heat dissipation performance was further improved by reducing the clearance and increasing the area toward the outer diameter.

FIG. 31(A) is a graph showing the analysis results of the thermal resistance of the circuit board related to Comparative Example 2-1 of Example 2, and FIG. 31(B) is a planar image showing the temperature distribution of the circuit board in FIG. 31(A).

The thermal resistance analysis results in Figure 31 (A) relate to the data of the comparative example on the approximation line L3 in Figure 28. In this circuit board 1, the size of the pure aluminum plate (heat dissipation frame 7) is 10 x 10 mm (holes 7 x 7 mm) and the thickness is 1.0 mm, and the clearance has been enlarged and the area of the heat dissipation frame 7 has been reduced compared to the example in Figure 29. The heat dissipation effect parameter due to the changes in the clearance and area of this heat dissipation frame 7 is 7.1, which does not satisfy formula (2).

The analysis results for this comparative example were Tmax: 149.3°C, T _{copper base chip bottom} : 20.0°C (fixed), and thermal resistance R: 0.647KW. The rate of change in thermal resistance was ΔR: 0.008K/W, and the thermal resistance was only reduced by 1.0% compared to Comparative Example 1. The temperature distribution at this time is shown in FIG. 31(B).

As is clear from Figures 5(A) and (B) and Figures 31(A) and (B), even when the material of the heat dissipation frame 7 was changed to pure aluminum, increasing the clearance and decreasing the area did not satisfy formula (2), and no improvement in heat dissipation was observed.

In this way, the same effect was obtained even if the material of the heat dissipation frame 7 was changed, and the same effect was obtained even if the material of the heat dissipation frame 7 was different from that of the circuit pattern 3.

Figs. 32 to 34 correspond to Figs. 29 to 31, respectively, and show Examples 2-3, 2-4, and Comparative Example 2-2. In the analysis of Figs. 32 to 34, there are no changes to the other shapes, structures, materials (pure aluminum for heat sink frame 7), etc. of the circuit board. The heat dissipation conditions are that the heat transfer coefficient of the bottom surface of the board is h = 30,000 W/m2·K, and the board is left in a temperature of 20°C.

Comparing Fig. 29(B) with Fig. 32(B), Fig. 30(B) with Fig. 33(B), and Fig. 31(B) with Fig. 34(B), the heat dissipation results in Fig. 32 and Fig. 33 for the comparative example in Fig. 34 correspond to the heat dissipation results in Fig. 29 and Fig. 30 for the comparative example in Fig. 31.

In other words, the improvement in heat dissipation of Example 2 was obtained whether the bottom surface of the circuit board was fixed at 20°C or left in 20°C.

In addition, the same effects as those of Example 1 can be obtained in this Example 2.

REFERENCE SIGNS LIST 1 Circuit board 3 Circuit pattern 5 Semiconductor chip 7 Heat sink frame 9 Metal board 11 Insulating material 13 Solder A Area C Clearance T Thickness

Claims (10)

1. A circuit pattern provided on an insulating substrate;
   an electronic component bonded onto the circuit pattern;
   a heat dissipation frame bonded onto the circuit pattern and disposed adjacent to the electronic component;
   When the clearance between the lower part of the heat dissipation frame and the electronic component is C [mm], the area of the lower surface of the heat dissipation frame is A [mm ² ], and the thickness of the heat dissipation frame with respect to the circuit pattern is T [mm],
   15.0≦A ^0.5 × C ^−1.2 × T ^0.2 ≦600
   Fulfilling
   Circuit board.
2. 2. The circuit board of claim 1,
   The material of the heat sink frame is copper or aluminum.
   Circuit board.
3. 3. The circuit board according to claim 1 or 2,
   the electronic component is joined to the circuit pattern by soldering;
   the heat dissipation frame faces the solder in a surface direction of the circuit pattern;
   Circuit board.
4. 3. The circuit board according to claim 1 or 2,
   The heat dissipation frame is a positioning frame for the electronic component.
   Circuit board.
5. 3. The circuit board according to claim 1 or 2,
   The heat dissipation frame has a frame shape in which the center of the electronic component in a plan view is shifted from the center of the outer shape of the heat dissipation frame.
   Circuit board.
6. 3. The circuit board according to claim 1 or 2,
   The heat dissipation frame has a frame shape that contains a plurality of the electronic components.
   Circuit board.
7. 3. The circuit board according to claim 1 or 2,
   The heat dissipation frame has a frame shape in which the clearance is non-uniform in the circumferential direction.
   Circuit board.
8. 3. The circuit board according to claim 1 or 2,
   The heat dissipation frame has an annular frame shape.
   Circuit board.
9. 3. The circuit board according to claim 1 or 2,
   The heat dissipation frame has a thickness that varies in the circumferential direction.
   Circuit board.
10. A semi-finished circuit board according to claim 1 or 2,
    A circuit pattern provided on an insulating substrate via an insulating material;
    a heat dissipation frame disposed adjacent to an area in which an electronic component to be bonded on the circuit pattern is to be disposed;
    If the clearance between the lower portion of the heat dissipation frame and the arrangement region is C [mm], the area of the lower surface of the heat dissipation frame is A [mm ² ], and the thickness of the heat dissipation frame with respect to the circuit pattern is T [mm],
    15.0≦A ^0.5 × C ^−1.2 × T ^0.2 ≦600
    Fulfilling
    Semi-finished circuit board.
    
    
    

Images