WO2024087933A1 - 一种内存卡和计算设备 - Google Patents

一种内存卡和计算设备 Download PDF

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Publication number
WO2024087933A1
WO2024087933A1 PCT/CN2023/119202 CN2023119202W WO2024087933A1 WO 2024087933 A1 WO2024087933 A1 WO 2024087933A1 CN 2023119202 W CN2023119202 W CN 2023119202W WO 2024087933 A1 WO2024087933 A1 WO 2024087933A1
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WIPO (PCT)
Prior art keywords
hardware
slot
memory card
memory
circuit board
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Application number
PCT/CN2023/119202
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English (en)
French (fr)
Inventor
冉懋良
相雷
Original Assignee
超聚变数字技术有限公司
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Application filed by 超聚变数字技术有限公司 filed Critical 超聚变数字技术有限公司
Publication of WO2024087933A1 publication Critical patent/WO2024087933A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices

Definitions

  • the embodiments of the present application relate to the field of computer technology, and in particular, to a memory card and a computing device.
  • a computing device such as a server's motherboard is provided with a network card slot and a memory stick slot.
  • the network card slot is used to install a network card
  • the memory stick slot is used to install a memory stick.
  • different users may have different requirements for the number of network cards and memory sticks. Therefore, it is impossible to provide a more flexible adaptation solution for the user's business needs.
  • the embodiments of the present application provide a memory card and a computing device.
  • the computing device can flexibly use the slot to install a memory card or a network card, which expands the usage scenarios of the memory card and the network card, enriches the configuration specifications of the computing device, and can provide a more flexible adaptation solution for the user's business, thereby better meeting the user's needs.
  • a computing device comprising: a chassis; a motherboard, arranged in the chassis, and having at least one slot on the motherboard; at least one hardware, correspondingly arranged in the at least one slot, each hardware having an identity and being a network card or a memory card, the identity of the network card being different from the identity of the memory card; a processor and a hardware identification device, both arranged on the motherboard and communicatively connected via the motherboard, and the processor and the hardware identification device are also communicatively connected to the at least one hardware respectively via the motherboard, the hardware identification device being used to obtain the identity of the hardware installed in the slot, and identifying the hardware in the slot as a network card or a memory card according to the obtained identity, and the processor being used to communicate with the hardware in the slot using a suitable communication protocol according to the identification result of the hardware identification device.
  • the hardware identification device of the computing device can obtain the identity of the memory card, and identify the hardware installed in the slot as a memory card according to the identity of the memory card.
  • the processor can communicate with the hardware in the slot using a communication protocol such as the CXL protocol that is compatible with the memory card according to the recognition result of the hardware identification device (the hardware is a memory card).
  • the hardware identification device of the computing device can obtain the identity of the network card, and identify the hardware installed in the slot as a network card according to the identity of the network card.
  • the processor can communicate with the hardware in the slot using a communication protocol such as the PCIE protocol that is compatible with the network card according to the recognition result of the hardware identification device (the hardware is a network card).
  • the slot can not only install a network card, but also a memory card, that is, the slot can be flexibly used to install a network card or a memory card for use, which enriches the configuration specifications of the computing device and can provide a more flexible adaptation solution for the user's business, thereby better meeting user needs.
  • each of the hardware includes: a circuit board; a controller, which is arranged on the circuit board; a gold finger, which is arranged at one end of the circuit board and is communicatively connected with the controller through the circuit board; and a connector is arranged in the slot, and the gold finger is used to be inserted into the connector, and at least some of the multiple pins on the gold finger are communicatively connected with at least some of the multiple pins of the connector, so that the controller is communicatively connected with the processor through the gold finger and the connector.
  • the network card and the memory card may have similar hardware structures, such as both may include structures such as a circuit board, a controller and a gold finger, but the functions specifically implemented by these structures may be different.
  • the controller of the memory card may communicate with the CPU of the computing device using the CXL protocol
  • the controller of the network card may communicate with the CPU of the computing device using the PCIE protocol.
  • the multiple pins on the gold finger include at least one first pin; the identity of one of the network card and the memory card is that the at least one first pin does not receive the data signal sent by the circuit board, and the identity of the other is that the at least one first pin receives the data signal sent by the circuit board.
  • the circuit board in order to make the network card and the memory card have different identities, they can be distinguished by whether the circuit board sends a data signal to the first pin, that is, whether at least one first pin receives the data signal sent by the circuit board can be used as the identity of the network card and the memory card, and the first pin on the network card and the first pin on the memory card have the same position on the gold finger, for example, the first pin does not receive the data signal sent by the circuit board can be used as the identity of the network card, and the first pin receives the data signal sent by the circuit board can be used as the identity of the memory card, that is, the first pin is a spare pin/reserved pin of the network card, the network card does not use the first pin, and the memory card can use the first pin, so that the network card and the memory card can be distinguished by the first pin.
  • each of the hardware further includes: a non-volatile memory, which is arranged on the circuit board, and the hardware identity is stored in the non-volatile memory; a system management bus, which is arranged on the circuit board, and one end is connected to the non-volatile memory, and the other end is connected to the pin on the gold finger; and the hardware identification device can obtain the hardware identity in the non-volatile memory through the system management bus to determine whether the hardware in the slot is a network card or a memory card.
  • both the network card and the memory card are provided with non-volatile memories, which can store the hardware identity, so that when the network card is installed in the slot, the hardware identification device can read the network card identity stored in the non-volatile memory of the network card, and determine that the hardware installed in the slot is a network card; when the memory card is installed in the slot, the hardware identification device can read the memory card identity stored in the non-volatile memory of the memory card, and determine that the hardware installed in the slot is a memory card.
  • the hardware is a memory card
  • the hardware further includes at least one memory chip
  • the at least one memory chip is disposed on the circuit board
  • the controller is connected to the memory chip via the circuit board. That is, in this implementation, in order to store data, a memory chip may be disposed on the circuit board of the memory card, and the memory chip may be connected to the controller via the circuit board, so that the data stored in the memory chip may be read by the controller.
  • the hardware identification device determines that the hardware in the slot is a memory card, and the hardware communicates with the processor using a first communication protocol; the hardware identification device determines that the hardware in the slot is a network card, and the hardware communicates with the processor using a second communication protocol; wherein the second communication protocol is different from the first communication protocol. That is, in this implementation, when different hardware is installed in the slot, the communication protocols between the different hardware and the processor of the computing device may be different.
  • the first communication protocol is the Compute Express Link (CXL) protocol
  • the second communication protocol is the Peripheral Component Interconnect Express (PCIE) protocol. That is, in this implementation, the memory card and the processor of the computing device communicate using the CXL protocol; the network card and the processor of the computing device communicate using the PCIE protocol.
  • CXL Compute Express Link
  • PCIE Peripheral Component Interconnect Express
  • the hardware identification device includes a baseboard management controller BMC chip and a basic input and output system BIOS chip or includes a basic input and output system BIOS chip. That is to say, in this implementation, the BMC can identify whether the hardware in the slot is a network card or a memory card, and then send it to the BIOS; the BIOS can also identify whether the hardware in the slot is a network card or a memory card, and then the processor can select a communication protocol according to the hardware identification result obtained by the BIOS to ensure that the communication protocol used by the processor to communicate with the hardware in the slot is compatible with the hardware in the slot.
  • At least one opening is provided on the chassis, the slot is provided corresponding to the opening, and the at least one hardware is provided in the slot through the opening. That is, in this implementation, since the chassis is provided with an opening, and the slot on the mainboard corresponds to the opening on the chassis, the chassis does not need to be opened, and the network card can be installed in the slot or removed from the slot outside the chassis. Similarly, when a memory card is installed in the slot or removed from the slot, the chassis does not need to be opened.
  • the at least one opening includes a first opening and a second opening
  • the at least one slot includes a first slot and a second slot
  • the first opening corresponds to the first slot
  • the second opening corresponds to the second slot
  • the at least one hardware includes the network card and the memory card
  • the network card is arranged in the corresponding first opening and the first slot
  • the memory card is arranged in the corresponding second opening and the second slot. That is, in this implementation, the network card can be arranged in the first slot, and the memory card can be arranged in the second slot.
  • more slots can be arranged as needed to arrange other network cards or other memory cards.
  • a computing device comprising: a chassis provided with at least one opening; a motherboard arranged in the chassis, the motherboard provided with at least one slot, the slot corresponding to the opening; at least one memory card, comprising a circuit board and a gold finger arranged at one end of the circuit board, the memory card being arranged in the slot, and the gold finger being plugged into the slot.
  • the memory card can be placed in the slot or removed from the slot through the opening outside the chassis without opening the chassis, thereby facilitating the installation and removal of the memory card.
  • the computing device also includes: at least one network card, which can be set in the slot, and the network card and the memory card respectively have an identity, and the identity of the network card is different from the identity of the memory card; a processor and a hardware identification device, both of which are set on the mainboard and communicated through the mainboard, and the processor and the hardware identification device are also respectively communicated with the network card or the memory card installed in the slot through the mainboard, the hardware identification device is used to obtain the identity of the network card or the memory card installed in the slot, and identify that the network card or the memory card is installed in the slot according to the obtained identity, and the processor is used to communicate with the network card or the memory card in the slot using an adaptive communication protocol according to the identification result of the hardware identification device.
  • a memory card comprising: a circuit board; a controller and at least one memory chip, the controller and the at least one memory chip are arranged on the circuit board at intervals, the controller is connected to the circuit board;
  • the memory card is connected to the memory chip through the circuit board;
  • the gold finger is arranged at one end of the circuit board and is communicatively connected to the controller through the circuit board;
  • the memory card has an identity identifier, so that when the gold finger of the memory card is inserted into a slot for installing a network card of a computing device, the hardware identification device of the computing device obtains the identity identifier of the memory card through the gold finger, and identifies that a memory card is installed in the slot according to the obtained identity identifier, and then the processor of the computing device switches the communication protocol between the processor and the controller to a communication protocol compatible with the memory card according to the identification result of the hardware identification device.
  • the hardware identification device of the computing device can obtain the identity of the memory card through the slot and the gold finger, and then identify that the hardware installed in the slot is a memory card. Then, the processor of the computing device can communicate with the memory card using a communication protocol compatible with the memory card according to the recognition result of the hardware identification device (a memory card is installed in the slot). For example, when the network card is installed in the slot, the communication protocol between the network card and the CPU is the PCIE protocol.
  • the identity of the memory card installed in the slot can be obtained by the hardware identification device of the computing device, and the memory card is installed in the slot according to the obtained identity. Then, the processor can switch the communication protocol between it and the memory card to the CXL protocol according to the recognition result of the hardware identification device.
  • the memory card can be set in the network card slot for use, which expands the use scenario of the memory card, can flexibly use the slot, and better meet user needs.
  • the multiple pins on the gold finger include at least one first pin, the first pin corresponds to the pin on the gold finger of the network card that does not receive the data signal sent by the circuit board of the network card, and the identity of the memory card is that the at least one first pin receives the data signal sent by the circuit board; and/or, the memory card also includes a non-volatile memory, the non-volatile memory is arranged on the circuit board, and the identity of the memory card is stored in the non-volatile memory, so that when the memory card is installed in the slot of the computing device, the hardware identification device of the computing device can obtain the identity of the memory card stored in the non-volatile memory.
  • the schemes for making the memory card and the network card have different identities may include but are not limited to the following two: Scheme 1 - the position of the first pin on the memory card is the same as the position of the first pin on the network card, and the first pin is the spare pin/reserved pin/unconnected pin NCPIN on the gold finger of the network card, that is, the first pin of the network card is not connected to the data signal on the circuit board, and the network card does not use the first pin; the memory card can use the first pin, that is, the first pin on the memory card is connected to the data signal on the circuit board, so that the connection state of at least one first pin and the data signal on the circuit board can be used as the identity of the network card and the memory card, so that the hardware identification device of the computing device can determine whether the hardware installed in the slot is a memory card or a network card through the first pin.
  • Both the network card and the memory card are provided with a non-volatile memory, which stores the identity of the hardware.
  • the hardware identification device of the computing device can read the identity of the hardware stored in the non-volatile memory to determine whether the hardware installed in the slot is a memory card or a network card.
  • FIG1A is a schematic diagram of a partial structure of a computing device in a top view
  • FIG1B is a schematic diagram of the structure of a computing device provided in an embodiment of the present application.
  • FIG1C is a schematic diagram of an exemplary partial structure of the computing device shown in FIG1B ;
  • FIG2 is a schematic diagram of communication between a memory card of the computing device shown in FIG1C and a hardware identification device;
  • FIG3 is a schematic diagram of the structure of a memory card provided in an embodiment of the present application.
  • FIG4 is a schematic diagram of the structure of another memory card provided in an embodiment of the present application.
  • FIG5 is a flowchart of a hardware identification method provided in an embodiment of the present application.
  • first and second are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as “first” or “second” may explicitly or implicitly include one or more of the features.
  • the terms “installed”, “connected”, and “connected” should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, a conflicting connection, or an integrated connection; for ordinary technicians in this field, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.
  • FIG1A is a schematic diagram of a partial structure of a computing device in a top view.
  • a computing device such as a server includes a chassis 10 and a motherboard 20 disposed in the chassis 10.
  • the motherboard 20 is provided with a network card slot 201 and a memory stick slot 202.
  • the network card slot 201 is used to install a network card (not shown in the figure), and the memory stick slot 202 is used to install a memory stick (not shown in the figure). Since different users may have different requirements for the number of network cards and memory sticks, it is impossible to provide a more flexible adaptation solution for the user's business needs.
  • an embodiment of the present application provides a memory card and a computing device, and the computing device can flexibly use the slot to install a memory card or a network card for use, thereby expanding the usage scenarios of the memory card and the network card, enriching the configuration specifications of the computing device, and providing a more flexible adaptation solution for the user's business, thereby better meeting user needs.
  • FIG1B is a schematic diagram of the structure of a computing device provided in an embodiment of the present application.
  • FIG1C is an exemplary partial structural diagram of the computing device shown in FIG1B .
  • the computing device may include a chassis 1, a motherboard 2, at least one hardware 3, a processor 4, and a hardware identification device 5.
  • the motherboard 2 is disposed in the chassis 1, and at least one slot C is disposed on the motherboard 2.
  • At least one hardware 3 may be correspondingly disposed in at least one slot C.
  • the hardware 3 may be disposed in slots C one by one.
  • Each hardware 3 has an identity and is a network card 3a or a memory card 3b. The identity of the network card 3a is different from the identity of the memory card 3b.
  • the processor 4 and the hardware identification device 5 are connected to each other.
  • the identification devices 5 are all arranged on the mainboard 2 and are communicatively connected through the mainboard 2, and the processor 4 and the hardware identification device 5 are also communicatively connected with at least one hardware 3 through the mainboard 2 respectively.
  • the hardware identification device 5 is used to obtain the identity of the hardware 3 installed in the slot C, and identify the hardware 3 in the slot C as a network card 3a or a memory card 3b according to the obtained identity.
  • the processor 4 is used to communicate with the hardware 3 in the slot C using a suitable communication protocol according to the identification result of the hardware identification device 5.
  • the hardware identification device 5 determines that the hardware 3 in the slot is a memory card 3b, and the hardware 3 communicates with the processor 4 using a first communication protocol.
  • the hardware identification device 5 determines that the hardware 3 in the slot is a network card 3a, and the hardware 3 communicates with the processor 4 using a second communication protocol; wherein the second communication protocol is different from the first communication protocol.
  • the first communication protocol is a compute express link (CXL) protocol, which may be a CXL 2.0 protocol by way of example
  • the second communication protocol is a peripheral component interconnect express (PCI-Express, PCIE) protocol, which is a high-speed serial computer expansion bus standard.
  • CXL compute express link
  • PCIE peripheral component interconnect express
  • the system can automatically adapt to a CXL memory card or a PCIe network card according to the hardware installed in the slot.
  • the hardware identification device 5 may include a baseboard management controller BMC chip 51 and a basic input output system BIOS chip 52 or include a basic input output system BIOS chip 52. That is, the identity of the hardware 3 installed in the slot C can be obtained through the baseboard management controller (BMC), and the hardware 3 can be identified as a network card or a memory card, and then the identification result can be sent to the BIOS; the identity of the hardware 3 installed in the slot C can also be obtained through the basic input output system (BIOS), and the hardware 3 can be identified as a network card or a memory card.
  • BMC baseboard management controller
  • BIOS basic input output system
  • BIOS is an application program, which is generally stored in a flash memory chip, and can also be stored in a CPU.
  • BIOS can be written into a hardware device such as a BIOS chip in the form of firmware as the hardware identification device 5, and the BIOS chip can be a non-volatile memory, such as a flash memory chip.
  • BMC basic mobile phone
  • the hardware identification device of the computing device can obtain the identity of the memory card, and determine that the hardware in the slot is a memory card according to the identity of the memory card.
  • the processor can communicate with the hardware in the slot using a communication protocol such as the CXL protocol that is compatible with the memory card according to the recognition result of the hardware identification device (the hardware is a memory card).
  • the hardware identification device of the computing device can obtain the identity of the network card, and determine that the hardware in the slot is a network card according to the identity of the network card.
  • the processor can communicate with the hardware in the slot using a communication protocol such as the PCIE protocol that is compatible with the network card according to the recognition result of the hardware identification device (the hardware is a network card).
  • a communication protocol such as the PCIE protocol that is compatible with the network card according to the recognition result of the hardware identification device (the hardware is a network card).
  • the slot can be flexibly used to install a network card or a memory card for use, which expands the use scenarios of network cards and memory cards, enriches the configuration specifications of computing devices, and can provide a more flexible adaptation solution for the user's business, thereby better meeting user needs.
  • At least one opening K may be provided on the chassis 1, and a slot C is provided corresponding to the opening K, and at least one hardware 3 is provided in the slot C through the opening K.
  • the slot C of the motherboard 2 of a computing device such as a server may be provided corresponding to the opening K of the chassis 1, the network card 3a or the memory card 3b may be installed in the slot C or removed from the slot C through the opening K of the chassis 1 outside the chassis without opening the chassis 1, thereby improving the convenience of installing or removing the network card 3a or the memory card 3b on the computing device.
  • the slot C may also be provided in other locations, such as the slot C being provided on the hard disk backplane connected to the motherboard 2.
  • At least one opening K includes a first opening K1 and a second opening K2
  • at least one slot C includes a first slot C1 and a second slot C2
  • the first opening K1 corresponds to the first slot C1
  • the second opening K2 corresponds to the second slot C2
  • at least one hardware 3 includes a network card 3a and a memory card 3b
  • the network card 3a can be set in the corresponding first opening K1 and the first slot C1
  • the memory card 3b can be set in the corresponding second opening K2 and the second slot C2. That is, the network card 3a can be set in the first slot C1, and the memory card 3b can be set in the second slot C2.
  • more slots C can be set as needed to install other network cards 3a or other memory cards 3b.
  • the structures of the network card 3a and the memory card 3b may be similar, or, on the premise that both the network card 3a and the memory card 3b can be installed in the slot C, the structures of the network card 3a and the memory card 3b may be different.
  • the following is an example in which the structures of the network card 3a and the memory card 3b are similar.
  • the hardware 3 such as the network card 3a or the memory card 3b, may include a circuit board 31, a controller 32 disposed on the circuit board 31, and a gold finger 33 disposed at one end of the circuit board 31, and the gold finger 33 is communicatively connected with the controller 32 through the circuit board 31.
  • a connector (not shown in the figure) may be disposed in the slot C, and the gold finger 33 is used to be inserted into the connector, and at least some of the multiple pins on the gold finger 33 are communicatively connected with at least some of the multiple pins of the connector, and the controller 32 communicates with the processor 4 through the gold finger 33.
  • the hardware 3 may also include a heat sink 35, which is disposed on the side of the controller 32 away from the circuit board 31 and may contact the controller 32 to dissipate heat for the controller 32.
  • the hardware 3 may also include an auxiliary fixing device 36, which may be disposed at an end of the circuit board 31 opposite to the gold finger 33, and when the gold finger 33 is inserted into the slot C of the mainboard 2, the auxiliary fixing device 36 may be fixedly connected to the chassis 1 accommodating the mainboard 2.
  • the auxiliary fixing device 36 may be a captive screw.
  • the hardware 3 may also include a handle 37, which may be disposed at an end of the circuit board 31 away from the gold finger 33 and spaced apart from the auxiliary fixing device 36. The user may hold the handle 37 to install the hardware 3 into the slot C or remove the hardware 3 from the slot C.
  • the network card 3a and the memory card 3b may have similar hardware structures, such as both may include structures such as a circuit board 31, a controller 32 and a gold finger 33, the specific functions of these structures may be different.
  • the controller 32 of the network card 3a can communicate with a processor of a computing device such as a CPU using a PCIE protocol
  • the controller 32 of the memory card 3b can communicate with a processor of a computing device such as a CPU using a CXL protocol.
  • the hardware 3 is a memory card 3b, and the hardware 3 may also include at least one memory chip X, at least one memory chip X is disposed on the circuit board 31, and the controller 32 is connected to the memory chip X through the circuit board 31. That is, the circuit board 31 is used to connect the memory chip X, the controller 32, and the gold finger 33.
  • the memory chip X may be connected to the controller 32 through the circuit board 31, and the controller 32 may be connected to the gold finger 33 through the circuit board 31.
  • the gold finger 33 is inserted into the slot C, so that the controller 32 and the processor 4 can communicate with each other through the circuit board 31.
  • the controller 32 of the memory card 3b can receive the access request from the processor 4 through the golden finger 33, and send a read operation command or a write operation command to one or more memory chips X through the line on the circuit board 31 according to the access request, so that the memory chip X executes the read operation command or the write operation command.
  • the data read from the memory chip X by the controller 32 of the memory card 3b can also be transmitted to the processor 4.
  • a plurality of memory chips X and the controller 32 are arranged on the same side of the circuit board 31.
  • a plurality of memory chips X can be arranged on both sides of the circuit board 31.
  • the memory chip also called the memory card particle, is called dynamic random access memory (DRAM), which is used to store data and belongs to a kind of volatile storage, that is, the data will be lost after power failure and will not be persisted.
  • DRAM dynamic random access memory
  • SDRAM synchronous dynamic random access memory
  • the hardware identification device 5 needs to determine that the hardware C is installed in the slot C. For example, when the hardware 3 is inserted into the slot C, the motherboard 2 can sense that the hardware 3 is inserted into the slot C, and then generate a first signal and send the first signal to the hardware identification device 5. In other words, the first signal is used to indicate that the hardware 3 is inserted into the slot C.
  • the first signal can be a high level, for example. Then, after the hardware identification device 5 receives the first signal, the identity of the hardware 3, that is, the ID information, can be obtained from the hardware 3.
  • FIG2 is a schematic diagram of the communication between the memory card and the hardware identification device of the computing device shown in FIG1C.
  • the hardware identification device 5 of the computing device can identify the identity of the hardware 3 in the slot C in the following two ways, but not limited to:
  • the multiple pins on the gold finger 33 of the hardware 3 include at least one first pin, and the identity of one of the network card 3a and the memory card 3b is that at least one first pin does not receive the data signal sent by the circuit board 31, and the identity of the other is that at least one first pin receives the data signal sent by the circuit board 31.
  • the identity of the network card 3a is that at least one first pin does not receive the data signal sent by the circuit board 31, and the identity of the memory card 3b is that at least one first pin receives the data signal sent by the circuit board 31. That is to say, the first pin on the gold finger 33 of the memory card 3b is in the same position as the first pin on the gold finger 33 of the network card 3a, the first pin on the gold finger 33 of the network card 3a is a spare pin, and the first pin on the gold finger 33 of the memory card 3b is not a spare pin, but a pin that needs to be used and will receive the data signal sent by the circuit board.
  • the spare pin is also called a not connected pin (NC PIN) or a reserved pin.
  • the memory card includes two first pins, namely NC1 and NC2.
  • the memory card based on the CXL protocol can be designed with reference to the OCP3.0 specification, and the spare pins of the network card defined in the OCP3.0 specification are used as NC1 and NC2, so that the CXL memory card and the network card have different identity identifiers.
  • the spare pins at the same position of different hardware send different signals, which can represent or carry different hardware types, thereby establishing a mapping relationship between spare pins and hardware types, and the mapping relationship between hardware types and spare pins can be pre-configured in the hardware identification device 5.
  • the hardware 3 can select the corresponding spare pins to receive the data signal sent by the circuit board according to the type of the hardware, and the hardware identification device 5 can determine the hardware type according to the spare pins used by the acquired data signal and the mapping relationship between the hardware type and the spare pins, that is, the hardware is a network card 3a or a memory card 3b.
  • Each hardware 3 further includes a non-volatile memory 34 and a system management bus SMBus (not shown in the figure).
  • the non-volatile memory 34 is arranged on the circuit board 31.
  • the non-volatile memory 34 stores the hardware 3.
  • Different hardware types have different identity identifiers.
  • the identity identifier can be a string, and different strings represent different hardware types.
  • the system management bus is set on the circuit board 31, and one end is connected to the non-volatile memory 34, and the other end is connected to the pin on the gold finger 33; when the hardware identification device 5 determines that the hardware 3 is inserted into the slot C, the identity identifier of the hardware 3 in the non-volatile memory 34 can be obtained through the system management bus.
  • SMBUS is divided into system management data (system management data, SMDAT) link and system management clock (system management clock, SMCLK) link.
  • SMCLK system management clock
  • SMCLK pin and SMDAT pin are shown on the memory card.
  • the SMCLK pin is connected to the system management clock link/clock signal line of SMBus
  • the SMDAT pin is connected to the system management data link/data signal line of SMBus. The identity can be transmitted through the SMDAT link.
  • non-volatile memory refers to computer memory that does not lose stored data when the current is turned off.
  • the main types of non-volatile memory are: ROM (read-only memory), PROM (programmable read-only memory), EAROM (electrically alterable read only memory), EPROM (erasable programmable read only memory), EEPROM (electrically erasable programmable read only memory), Flash memory.
  • the non-volatile memory 34 may be an electrically erasable programmable read-only memory (EEPROM), which is a memory chip that does not lose data after power failure.
  • EEPROM electrically erasable programmable read-only memory
  • the EEPROM can be erased and reprogrammed on a computer or a dedicated device.
  • the same type of hardware 3 may have different forms.
  • the identity identifiers of different forms of the same type of hardware 3 may be different. Taking memory cards 3b of different forms as an example, their forms may be divided into small form factor (SFF) memory cards and large form factor (LFF) memory cards. For example, different spare pins or different numbers of spare pins may be used to identify memory cards of different forms, or different identity identifiers may be used to identify memory cards of different forms.
  • the identity identifiers of small-size memory cards and large-size memory cards may be as shown in Table 1.
  • the identification schemes of small-size memory cards and large-size memory cards can choose scheme 1 or scheme 2, and can also use both schemes at the same time.
  • the form of memory card 3b is SFF
  • two spare pins/NC pins can be used
  • the form of memory card 3b is LFF
  • four spare pins/NC pins can be used.
  • the memory card uses two schemes at the same time, that is, two spare pins NC pins, namely NC1 and NC2, are used, and the identity stored in the non-volatile memory can be read through the SMBUS connected to the SMCLK pin and the SMDAT pin.
  • the pins NC1, NC2, SMCLK, and SMDAT on the gold finger of the memory card are connected to a complex programmable logic device (CPLD)/field-programmable gate array (FPGA) through slot C, and the CPLD/FPGA is connected to a hardware identification device 5 such as BMC and BIOS.
  • CPLD complex programmable logic device
  • FPGA field-programmable gate array
  • the communication bus between CPLD and BMC can be one or more of a general-purpose input/output port (GPIO), a local bus, a serial general-purpose input/output (SGPIO) bus, an LPC bus (low pin count Bus), a serial peripheral interface (SPI), an inter-integrated circuit (I2C) bus, an enhanced serial peripheral interface (eSPI), and the like.
  • the communication bus between CPLD and BIOS can be one or more of GPIO, LPC bus, SPI, I2C bus, eSPI, etc.
  • the communication bus between BMC and BIOS can be any one or more of physical buses such as platform environment control interface (PECI), GPIO, PCIe, etc.
  • PECI platform environment control interface
  • GPIO platform environment control interface
  • PCIe PCIe
  • the BMC can use CPLD/FPGA to obtain the identity of the hardware 3 through pins NC1 and NC2 (Solution 1) or obtain the identity of the hardware 3 stored in the non-volatile memory 34 through pins SMCLK and SMDAT (Solution 2), and identify that the hardware 3 is a network card 3a or a memory card 3b based on the obtained identity, and then send the identification result to the BIOS, so that the processor 4 can communicate with the hardware 3 using an appropriate communication protocol based on the identification result obtained by the BIOS.
  • BIOS can use CPLD/FPGA to obtain the identity of hardware 3 through pins NC1 and NC2 (Solution 1) or obtain the identity of hardware 3 stored in non-volatile memory 34 through pins SMCLK and SMDAT (Solution 2), and identify that hardware 3 is a network card 3a or a memory card 3b based on the obtained identity, and then processor 4 communicates with hardware 3 using a suitable communication protocol based on the identification result obtained by receiving BIOS.
  • an embodiment of the present application further provides a computing device.
  • the computing device may include a chassis 1, a motherboard 2, and at least one memory card 3b.
  • the chassis 1 is provided with at least one opening K
  • the motherboard 2 is arranged in the chassis 1
  • at least one slot C is arranged on the motherboard 2, and the slot C corresponds to the opening K.
  • the at least one memory card 3b includes a circuit board 31 and a gold finger 33 arranged at one end of the circuit board 31, the memory card 3b is arranged in the slot C, and the gold finger 33 is plugged into the slot C.
  • the memory card 3b can be set in or removed from the slot C through the opening K outside the chassis 1 without opening the chassis 1, thereby facilitating the installation and removal of the memory card 3b.
  • the computing device may also include at least one network card 3a, a processor 4 and a hardware identification device 5.
  • the network card 3a can be set in the slot C, and the network card 3a and the memory card 3b have identity identifiers respectively, and the identity identifier of the network card 3a is different from the identity identifier of the memory card 3b.
  • the processor 4 and the hardware identification device 5 are both set on the motherboard 2 and are connected to each other through the motherboard 2, and the processor 4 and the hardware identification device 5 are also connected to each other through the motherboard 2 to communicate with the network card 3a or the memory card 3b installed in the slot C respectively, and the hardware identification device 5 is used to obtain the identity identifier of the network card 3a or the memory card 3b installed in the slot C, and identify that the network card 3a or the memory card 3b is installed in the slot C according to the obtained identity identifier, and the processor 4 is used to communicate with the network card 3a or the memory card 3b in the slot C using a suitable communication protocol according to the identification result of the hardware identification device 5.
  • the hardware identification device 5 determines that the hardware 3 in the slot is a memory card 3b, the hardware 3 communicates with the processor 4 using the first communication protocol, the hardware identification device 5 determines that the hardware 3 in the slot is a network card 3a, and the hardware 3
  • the processor 4 communicates with the processor 4 using a second communication protocol, wherein the second communication protocol is different from the first communication protocol.
  • the first communication protocol is a compute express link (CXL) protocol, exemplarily a CXL 2.0 protocol
  • the second communication protocol is a peripheral component interconnect express (PCI-Express, PCIE) protocol, which is a high-speed serial computer expansion bus standard.
  • the memory card 3b may further include a controller 32 and at least one memory chip X, the controller 32 and the at least one memory chip X are arranged at intervals on the circuit board 31, the controller 32 is connected to the memory chip X through the circuit board 31, and is connected to the gold finger 33 through the circuit board 31.
  • the controller 32 ensures that the memory card 3b and the processor 4 can communicate using the first communication protocol such as CXL.
  • FIG3 is a schematic diagram of the structure of a memory card provided in an embodiment of the present application.
  • the memory card includes a circuit board 31, a controller 32, at least one memory chip X and a gold finger 33.
  • the controller 32 and the at least one memory chip X are arranged on the circuit board 31 at intervals.
  • the controller 32 is connected to the memory chip X through the circuit board 31.
  • the gold finger 33 is arranged at one end of the circuit board 31 and is connected to the controller 32 through the circuit board 31.
  • the memory card has an identity identifier, so that when the gold finger 33 of the memory card is inserted into the slot of the computing device for installing the network card, the hardware identification device of the computing device obtains the identity identifier of the memory card through the gold finger 33, and identifies that the memory card is installed in the slot according to the obtained identity identifier, and then the processor of the computing device switches the communication protocol between the processor and the controller 32 of the memory card to a communication protocol compatible with the memory card according to the identification result of the hardware identification device.
  • the hardware identification device of the computing device can obtain the identity of the memory card through the slot and the gold finger, and then identify that the hardware installed in the slot is a memory card. Then, the processor of the computing device can communicate with the memory card using a communication protocol compatible with the memory card according to the recognition result of the hardware identification device (a memory card is installed in the slot). For example, when the network card is installed in the slot, the communication protocol between the network card and the CPU is the PCIE protocol.
  • the hardware installed in the slot can be first identified as a memory card through the hardware identification device of the computing device, such as the baseboard management controller (BMC) and the basic input output system (BIOS). Then, the processor can switch the communication protocol between it and the memory card to the CXL protocol according to the recognition result of the hardware identification device.
  • the memory card can be set in the network card slot for use, which expands the usage scenarios of the memory card, can flexibly utilize the slot, enrich the configuration specifications of the computing device, and provide a more flexible adaptation solution for the user's business, thereby better meeting user needs.
  • the memory card may have an identity identification in the following two ways, but not limited to:
  • the multiple pins on the gold finger 33 include at least one first pin, which corresponds to the pin on the gold finger of the network card that does not receive the data signal sent by the circuit board of the network card, that is, a spare pin or a reserved pin.
  • the identity of the memory card is that at least one first pin receives the data signal sent by the circuit board.
  • the first pin on the hardware gold finger is an unused pin, i.e., NC (not connect) PIN, and the hardware identification device of the computing device cannot obtain data signals through the first pin.
  • the first pin on the hardware gold finger is a used pin, and the hardware identification device of the computing device can obtain data signals through the first pin. In this way, the hardware identification device can distinguish between a memory card and a network card through the first pin.
  • the memory card also includes a non-volatile memory 34, which is disposed on the circuit board 31.
  • the non-volatile memory 34 stores the identity of the memory card, so that when the memory card is installed in the slot of the computing device, the hardware identification device of the computing device can obtain the identity of the memory card stored in the non-volatile memory 34.
  • non-volatile memory can be set on the circuit boards of both the network card and the memory card.
  • the non-volatile memory of the network card stores the identity of the network card
  • the non-volatile memory 34 of the memory card stores the identity of the memory card.
  • the hardware identification device of the computing device can obtain the identity in the non-volatile memory 34, and determine whether the hardware installed in the slot is a network card or a memory card based on the obtained identity.
  • the memory card may further include a heat sink 35, which is disposed on the side of the controller 32 away from the circuit board 31 and may contact the controller 32 to dissipate heat for the controller 32.
  • the memory card may further include an auxiliary fixing device 36, which may be disposed at an end of the circuit board 31 opposite to the gold finger 33, and when the gold finger 33 is inserted into the slot of the mainboard, the auxiliary fixing device 36 may be fixedly connected to the chassis accommodating the mainboard.
  • the auxiliary fixing device 36 may be a captive screw.
  • the memory card may further include a handle 37, which may be disposed at an end of the circuit board 31 away from the gold finger 33 and spaced apart from the auxiliary fixing device 36. The user may hold the handle 37 to install the memory card into the slot or remove the memory card from the slot.
  • OPC Open Computer Project
  • E1.S a short EDSFF 1U Short, referred to as E1.S, EDSFF is enterprise and datacenter 1U short SSD form factor, SSD is solid state disk
  • E3.S E3.S is a 2.5-inch disk version of E3 that is closer to U.2/U.3 in size, and the two can share a chassis
  • the embodiment of the present application designs a memory card based on the CXL protocol based on the OCP3.0 specification.
  • Fig. 4 is a schematic diagram of the structure of another memory card provided in an embodiment of the present application.
  • the memory card is a memory card designed based on the OCP3.0 specification. Similar to Fig. 3, in Fig. 4, the memory card may include a circuit board 31, a controller 32, at least one memory chip X, a gold finger 33, a heat sink 35, an auxiliary fixing device 36, and a handle 37.
  • the positions of these structures in the memory card shown in Fig. 4 are different from those in the memory card shown in Fig. 3, but the functions may be the same.
  • the OCP3.0 specification can be used as a basis to set up a CXL memory card controller on the circuit board, and set up hardware parts such as memory chips/memory card particles and peripheral circuits.
  • the memory card can use the NC pin of the network card defined by OCP3.0 to transmit data signals to the system such as the hardware identification device to identify the memory card, and then perform corresponding configurations such as switching communication protocols.
  • the memory card of the embodiment of the present application is provided with a memory card controller and a memory chip/memory card particle on the circuit board.
  • the identity (ID) information of the memory card is defined, which can be transmitted to the main system side for component identification.
  • the CXL memory card form factor based on the OCP3.0 specification can use the existing physical form of the OCP3.0 network card to expand the application boundaries of the CXL memory card and enrich the configuration specifications of the server.
  • the evolution of the CXL bus and the evolution of the Intel Data Center Persistent Memory Module (Intel DCPMM) memory card it can provide users with a more flexible adaptation solution.
  • FIG5 is a flowchart of a hardware identification method provided by an embodiment of the present application. As shown in FIG5 , the hardware identification method is executed by a baseboard management controller BMC or a basic input and output system BIOS of a computing device, and may specifically include the following steps:
  • the hardware to be identified may be a network card or a memory card.
  • the first signal is used to indicate that the slot is plugged with hardware.
  • the first signal may be an electrical signal with a preset level or code type.
  • the first signal may also be implemented in other ways.
  • the slot itself may have a signal generating function.
  • the slot When the hardware is inserted into the slot, the slot generates a first signal and sends the first signal to the BMC or BIOS.
  • the slot is located on the motherboard of the computing device. When the hardware is inserted into the slot, the motherboard can sense that the hardware is inserted into the slot, thereby generating a first signal and sending the first signal to the BMC or BIOS.
  • the second signal carries a hardware identifier.
  • the hardware identifier is information used to identify the type of hardware. Exemplarily, there may be but are not limited to the following two solutions:
  • the second signal is a signal sent by a spare pin, and the spare pin is mapped to the hardware type of the hardware to be identified.
  • the hardware identification can be represented by the spare pin, and the hardware type and the spare pin have a mapping relationship.
  • the signals sent by different spare pins represent or carry different hardware types.
  • the mapping relationship between the hardware type and the spare pin can be pre-configured into the BMC or BIOS, that is, the hardware identification unit.
  • the spare pin is also called the not connected PIN (NC PIN), which is a reserved pin in the slot.
  • the hardware can select the corresponding spare pin to send the second signal according to the type of the hardware and the mapping relationship between the spare pin and the hardware type.
  • the hardware identification unit obtains the second signal, it can obtain the hardware type corresponding to the second signal according to the mapping relationship between the hardware type and the spare pin based on the spare pin that sends the second signal.
  • Solution 2 The information carried by the second signal is preset identification information, and the identification information is used to indicate the hardware type of the hardware to be identified.
  • the hardware has a non-volatile memory, such as an electrically erasable programmable read only memory (EEPROM).
  • the non-volatile memory may store preset identification information, which may be used as a hardware identification to indicate the hardware type of the hardware. Different hardware types are indicated by different identification information.
  • the identification information may be a string, and different strings indicate different hardware types.
  • the hardware identification unit may obtain the preset identification information from the non-volatile memory of the hardware.
  • step 503a or 503b may be performed.
  • the details are as follows:
  • BMC will send the identification result (the hardware is a network card) to BIOS. Then, the processor communicates with the network card using a communication protocol such as the PICE protocol that is compatible with the network card according to the identification result obtained by the BIOS.
  • the processor communicates with the network card using a communication protocol such as PICE protocol adapted to the network card according to the identification result obtained by BIOS (the hardware is a network card).
  • a communication protocol such as PICE protocol adapted to the network card according to the identification result obtained by BIOS (the hardware is a network card).
  • the BMC sends the identification result (the hardware is a memory card) to the BIOS, and then the processor communicates with the memory card using a communication protocol such as the CXL protocol adapted to the memory card according to the identification result obtained by the BIOS.
  • a communication protocol such as the CXL protocol adapted to the memory card according to the identification result obtained by the BIOS.
  • the processor communicates with the memory card using a communication protocol such as PICE protocol adapted to the memory card according to the identification result obtained by BIOS (the hardware is a memory card).
  • a communication protocol such as PICE protocol adapted to the memory card according to the identification result obtained by BIOS (the hardware is a memory card).
  • the hardware identification device of the computing device can obtain the identity of the memory card, and determine that the hardware in the slot is a memory card according to the identity of the memory card, and the processor can communicate with the hardware in the slot using a communication protocol such as the CXL protocol that is compatible with the memory card according to the recognition result of the hardware identification device (the hardware is a memory card); when the memory card is removed from the slot and the network card is inserted into the slot, the hardware identification device of the computing device can obtain the identity of the network card, and determine that the hardware in the slot is a network card according to the identity of the network card, and the processor can communicate with the hardware in the slot using a communication protocol such as the PCIE protocol that is compatible with the network card according to the recognition result of the hardware identification device (the hardware is a network card).
  • a communication protocol such as the CXL protocol that is compatible with the memory card according to the recognition result of the hardware identification device
  • the slot can be flexibly used to install a network card or a memory card, which expands the use scenarios of network cards and memory cards, enriches the configuration specifications of computing devices, and can provide a more flexible adaptation solution for the user's business, thereby better meeting user needs.

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Abstract

提供一种内存卡和计算设备。计算设备包括：机箱；主板，设于机箱内，主板上设有至少一个插槽；至少一个硬件，对应设于至少一个插槽内，每个硬件具有身份标识且为网卡或内存卡，网卡和内存卡各自的身份标识不同；处理器和硬件识别装置，均设于主板并通过主板通信连接，还通过主板分别与至少一个硬件通信连接，硬件识别装置用于获取安装在插槽内的硬件的身份标识，并根据获取的身份标识识别插槽内的硬件为网卡或内存卡，处理器根据识别结果采用相适配的通信协议与插槽内的硬件进行通信。计算设备能灵活利用插槽安装内存卡或网卡，拓展了内存卡和网卡的使用场景，丰富了计算设备的配置规格，可为用户提供更加灵活的适配方案，更好地满足用户需求。

Description

一种内存卡和计算设备
本申请实施例要求于2022年10月26日提交中国专利局、申请号为202211319655.6、申请名称为“一种内存卡和计算设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请实施例中。
技术领域
本申请实施例涉及计算机技术领域，尤其涉及一种内存卡和计算设备。
背景技术
一般计算设备如服务器的主板上设置有网卡插槽和内存条插槽，网卡插槽用于安装网卡，内存条插槽用于安装内存条，但不同用户对网卡和内存条的需求数量可能不同，因此，无法为用户的业务需求提供更加灵活的适配方案。
发明内容
本申请实施例提供一种内存卡和计算设备，计算设备能够灵活利用插槽安装内存卡或网卡，拓展了内存卡和网卡的使用场景，丰富了计算设备的配置规格，可为用户的业务提供更加灵活的适配方案，从而更好地满足用户需求。
第一方面，提供一种计算设备，所述计算设备包括：机箱；主板，设置在所述机箱内，所述主板上设置有至少一个插槽；至少一个硬件，对应设置在所述至少一个插槽内，每个硬件具有身份标识且为网卡或内存卡，所述网卡的身份标识和所述内存卡的身份标识不同；处理器和硬件识别装置，均设置在所述主板上并通过所述主板通信连接，且所述处理器和所述硬件识别装置还通过所述主板分别与所述至少一个硬件通信连接，所述硬件识别装置用于获取安装在所述插槽内的硬件的身份标识，并根据获取的身份标识识别所述插槽内的硬件为网卡或内存卡，所述处理器用于根据所述硬件识别装置的识别结果采用相适配的通信协议与所述插槽内的硬件进行通信。
由于内存卡和网卡具有不同的身份标识，这样在内存卡插设在计算设备的插槽内时，计算设备的硬件识别装置能够获取内存卡的身份标识，并根据内存卡的身份标识识别出插槽内安装的硬件为内存卡，处理器可根据硬件识别装置的识别结果(硬件为内存卡)采用与内存卡相适配的通信协议如CXL协议与插槽内的硬件进行通信，将内存卡从插槽移除，并将网卡插设在该插槽内时，计算设备的硬件识别装置能够获取网卡的身份标识，并根据网卡的身份标识识别出插槽内安装的硬件为网卡，处理器可根据硬件识别装置的识别结果(硬件为网卡)采用与网卡相适配的通信协议如PCIE协议与插槽内的硬件进行通信。也就是说，插槽不仅能安装网卡，还能安装内存卡，即能够灵活利用插槽安装网卡或内存卡进行使用，丰富了计算设备的配置规格，可为用户的业务提供更加灵活的适配方案，从而更好地满足用户需求。
在一种可能的实现方式中，每个所述硬件包括：电路板；控制器，设置在所述电路板上；金手指，设置在所述电路板的一端，并通过所述电路板与所述控制器通信连接；并且，所述插槽内设置有连接器，所述金手指用于插设在所述连接器内，所述金手指上的多个引脚中的至少部分引脚与所述连接器的多个引脚中的至少部分引脚通信连接，以使所述控制器通过所述金手指和所述连接器与所述处理器通信连接。也就是说，在该实现方式中，为了使网卡或内存卡均能安装到插槽内，网卡和内存卡可具有类似的硬件结构，如均可包括电路板、控制器和金手指等结构，但该些结构具体实现的功能可能有所不同，例如，内存卡的控制器可与计算设备的CPU采用CXL协议进行通信，网卡的控制器可与计算设备的CPU采用PCIE协议进行通信。
在一种可能的实现方式中，所述金手指上的多个引脚包括至少一个第一引脚；所述网卡和所述内存卡中一者的身份标识为所述至少一个第一引脚未接收所述电路板发送的数据信号，另一者的身份标识为所述至少一个第一引脚接收所述电路板发送的数据信号。也就是说，在该实现方式中，为了使网卡和内存卡具有不同的身份标识，可通过电路板是否给第一引脚发送数据信号来区分，即至少一个第一引脚是否接收电路板发送的数据信号可作为网卡和内存卡的身份标识，网卡上的第一引脚与内存卡上的第一引脚在金手指上的位置相同，例如，第一引脚未接收电路板发送的数据信号可作为网卡的身份标识，第一引脚接收电路板发送的数据信号可作为内存卡的身份标识，即第一引脚为网卡的备用引脚/保留引脚，网卡未使用该第一引脚，内存卡可使用该第一引脚，从而通过第一引脚可区分网卡和内存卡。
在一种可能的实现方式中，每个所述硬件还包括：非易失性存储器，设置在所述电路板上，所述非易失性存储器内存储有所述硬件的身份标识；系统管理总线，设置在所述电路板上，且一端与所述非易失性存储器连接，另一端与所述金手指上的引脚连接；并且，所述硬件识别装置通过所述系统管理总线能够获取所述非易失性存储器内的所述硬件的身份标识，以确定所述插槽内的硬件为网卡或内存卡。也就是说，在该实现方式中，网卡和内存卡上均设置有非易失性存储器，其内部可存储硬件的身份标识，这样当网卡安装在插槽内时，硬件识别装置可读取网卡的非易失性存储器内存储的网卡的身份标识，确定插槽内安装的硬件为网卡，当内存卡安装在插槽内时，硬件识别装置可读取内存卡的非易失性存储器内存储的内存卡的身份标识，确定插槽内安装的硬件为内存卡。
在一种可能的实现方式中，所述硬件为内存卡，所述硬件还包括至少一个内存芯片，所述至少一个内存芯片设置在所述电路板上，所述控制器通过所述电路板和所述内存芯片连接。也就是说，在该实现方式中，为了存储数据，可在内存卡的电路板上设置内存芯片，并将内存芯片通过电路板与控制器连接，以便通过控制器读取内存芯片内存储的数据。
在一种可能的实现方式中，所述硬件识别装置确定所述插槽内的硬件为内存卡，所述硬件与所述处理器之间采用第一通信协议通信；所述硬件识别装置确定所述插槽内的硬件为网卡，所述硬件与所述处理器之间采用第二通信协议通信；其中，所述第二通信协议与所述第一通信协议不同。也就是说，在该实现方式中，插槽内安装不同的硬件时，不同硬件与计算设备的处理器之间的通信协议可不同。
在一种可能的实现方式中，所述第一通信协议为计算快速链接CXL协议；所述第二通信协议为外围组件互连高速PCIE协议。也就是说，在该实现方式中，内存卡与计算设备的处理器之间采用CXL协议进行通信；网卡与计算设备的处理器之间采用PCIE协议进行通信。
在一种可能的实现方式中，所述硬件识别装置包括基板管理控制器BMC芯片和基本输入输出系统BIOS芯片或包括基本输入输出系统BIOS芯片。也就是说，在该实现方式中，可通过BMC识别插槽内的硬件是网卡或内存卡，然后发送给BIOS；也可通过BIOS识别插槽内的硬件是网卡或内存卡，接着，处理器可根据BIOS获取的硬件的识别结果选择通信协议，以保证处理器与插槽内的硬件进行通信时采用的通信协议与插槽内的硬件相适配。
在一种可能的实现方式中，所述机箱上设置有至少一个开口，所述插槽与所述开口对应设置，所述至少一个硬件通过所述开口设置在所述插槽内。也就是说，在该实现方式中，由于机箱上设置有开口，且主板上的插槽与机箱上的开口对应，这样不需要打开机箱，可在机箱外部将网卡安装在插槽内或从插槽内拔下，同理在该插槽内安装内存卡或拔下内存卡时，也不需要打开机箱。
在一种可能的实现方式中，所述至少一个开口包括第一开口和第二开口，所述至少一个插槽包括第一插槽和第二插槽，所述第一开口与所述第一插槽对应，所述第二开口与所述第二插槽对应；所述至少一个硬件包括所述网卡和所述内存卡，所述网卡设置在对应的所述第一开口和所述第一插槽内，所述内存卡设置在对应的所述第二开口和所述第二插槽内。也就是说，在该实现方式中，第一插槽内可设置网卡，第二插槽内可设置内存卡。另外，在其他实现方式中，还可根据需要设置更多个插槽，来设置其他网卡或其他内存卡。
第二方面，提供一种计算设备，所述计算设备包括：机箱，设置有至少一个开口；主板，设置在所述机箱内，所述主板上设置有至少一个插槽，所述插槽与所述开口对应；至少一个内存卡，包括电路板和设置在所述电路板一端的金手指，所述内存卡设置在所述插槽内，且所述金手指与所述插槽插接。
由于机箱上设置有开口，主板上设置的插槽与开口对应，这样无需打开机箱，可在机箱外部将内存卡通过开口设置在插槽内或从插槽移除，从而方便了安装和移除内存卡。
在一种可能的实现方式中，所述计算设备还包括：至少一个网卡，所述网卡能够设置在所述插槽内，所述网卡和所述内存卡分别具有身份标识，且所述网卡的身份标识和所述内存卡的身份标识不同；处理器和硬件识别装置，均设置在所述主板上并通过所述主板通信连接，且所述处理器和所述硬件识别装置还通过所述主板分别与安装在所述插槽内的网卡或内存卡通信连接，所述硬件识别装置用于获取安装在所述插槽内的网卡或内存卡的身份标识，并根据获取的身份标识识别所述插槽内安装有网卡或内存卡，所述处理器用于根据所述硬件识别装置的识别结果采用相适配的通信协议与所述插槽内的网卡或内存卡进行通信。
第三方面，提供一种内存卡，所述内存卡包括：电路板；控制器和至少一个内存芯片，所述控制器和所述至少一个内存芯片间隔设置在所述电路板上，所述控制器通 过所述电路板和所述内存芯片连接；金手指，设置在所述电路板的一端，并通过所述电路板和所述控制器通信连接；其中，所述内存卡具有身份标识，以便在所述内存卡的金手指插设在计算设备的用于安装网卡的插槽内时，使所述计算设备的硬件识别装置通过金手指获取所述内存卡的身份标识，并根据获取的身份标识识别所述插槽内安装有内存卡，进而使所述计算设备的处理器根据所述硬件识别装置的识别结果将所述处理器与所述控制器之间的通信协议切换为与所述内存卡相适配的通信协议。
由于内存卡具有身份标识，这样在内存卡的金手指插设在计算设备的用于安装网卡的插槽内时，计算设备的硬件识别装置能够通过插槽和金手指获取内存卡的身份标识，进而识别出安装在插槽内的硬件是内存卡，接着，计算设备的处理器可根据硬件识别装置的识别结果(插槽内安装有内存卡)采用与内存卡相适配的通信协议与内存卡通信，例如，插槽内安装网卡时，网卡与CPU之间的通信协议为PCIE协议，将网卡拔下，在该插槽内安装内存卡时，可先通过计算设备的硬件识别装置获取插槽内安装的内存卡的身份标识，并根据获取的身份标识识别插槽内安装有内存卡，接着，处理器可根据硬件识别装置的识别结果将其与内存卡之间的通信协议切换为CXL协议。也就是说，该内存卡能够设置在网卡插槽内进行使用，拓展了内存卡的使用场景，能够灵活利用插槽，更好地满足了用户需求。
在一种可能的实现方式中，所述金手指上的多个引脚包括至少一个第一引脚，所述第一引脚对应网卡的金手指上未接收所述网卡的电路板发送的数据信号的引脚，所述内存卡的身份标识为所述至少一个第一引脚接收所述电路板发送的数据信号；和/或，所述内存卡还包括非易失性存储器，所述非易失性存储器设置在所述电路板上，所述非易失性存储器内存储有所述内存卡的身份标识，以便在所述内存卡安装在所述计算设备的插槽内时，使所述计算设备的硬件识别装置能够获取所述非易失性存储器内存储的所述内存卡的身份标识。也就是说，在该实现方式中，使内存卡与网卡具有不同的身份标识的方案可以有但不限于以下两种：方案1——内存卡上的第一引脚的位置与网卡上的第一引脚的位置相同，第一引脚为网卡的金手指上的备用引脚/保留引脚/未连接引脚NCPIN，即网卡的第一引脚与电路板上的数据信号未连接，网卡未使用该第一引脚；内存卡可使用该第一引脚，即内存卡上的第一引脚与电路板的数据信号连接，这样至少一个第一引脚与电路板上的数据信号的连接状态可作为网卡和内存卡的身份标识，以便计算设备的硬件识别装置通过第一引脚确定插槽内安装的硬件是内存卡或网卡。方案2——网卡和内存卡上均设置有非易失性存储器，其内存储有硬件的身份标识，在硬件安装到插槽内时，计算设备的硬件识别装置可读取非易失性存储器内存储的硬件的身份标识，来确定插槽内安装的硬件是内存卡或网卡。
本发明的其他特征和优点将在随后的具体实施例部分予以详细说明。
附图说明
下面对实施例或现有技术描述中所需使用的附图作简单地介绍。
图1A为一种计算设备的俯视方向的局部结构示意图；
图1B为本申请实施例提供的一种计算设备的结构示意图；
图1C为图1B所示的计算设备的一种示例性的局部结构示意图；
图2为图1C所示的计算设备的内存卡与硬件识别装置之间的通信示意图；
图3为本申请实施例提供的一种内存卡的结构示意图；
图4为本申请实施例提供的另一种内存卡的结构示意图；
图5为本申请实施例提供的一种硬件识别方法的流程图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述。显然，所描述的实施例仅是本申请实施例的一部分实施例，而不是全部的实施例。并且，具体特征、结构、材料或者特点可以在任何的一个或多个实施例以适合的方式结合。
在本申请实施例的描述中，除非另有说明，“/”表示或的意思，例如，A/B可以表示A或B；本文中的“和/或”仅仅是一种描述关联物体的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，在本申请实施例的描述中，“多个”是指两个或多于两个。
在本申请实施例的描述中，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。术语“包括”、“包含”、“具有”及它们的变形都意味着“包括但不限于”，除非是以其他方式另外特别强调。
在本申请实施例的描述中，术语“中心”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请实施例和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请实施例的限制。并且，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如可以是固定连接，也可以是可拆卸连接，还可以是抵触连接或一体的连接；对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请实施例中的具体含义。
图1A为一种计算设备的俯视方向的局部结构示意图。如图1A所示，计算设备如服务器包括机箱10和设置在机箱10内的主板20，主板20上设置有网卡插槽201和内存条插槽202，网卡插槽201用于安装网卡(图中未示出)，内存条插槽202用于安装内存条(图中未示出)。由于不同用户对网卡和内存条的需求数量可能不同，因此，无法为用户的业务需求提供更加灵活的适配方案。
鉴于此，本申请实施例提供一种内存卡和计算设备，计算设备能够灵活利用插槽安装内存卡或网卡进行使用，拓展了内存卡和网卡的使用场景，丰富了计算设备的配置规格，可为用户的业务提供更加灵活的适配方案，从而更好地满足用户需求。
图1B为本申请实施例提供的一种计算设备的结构示意图。图1C为图1B所示的计算设备的一种示例性的局部结构示意图。如图1B和图1C所示，计算设备可以包括机箱1、主板2、至少一个硬件3、处理器4和硬件识别装置5。主板2设置在机箱1内，主板2上设置有至少一个插槽C。至少一个硬件3可对应设置在至少一个插槽C内，示例性地，硬件3可一一对应地设置在插槽C内。每个硬件3具有身份标识且为网卡3a或内存卡3b，网卡3a的身份标识和内存卡3b的身份标识不同。处理器4和硬件识 别装置5均设置在主板2上并通过主板2通信连接，且处理器4和硬件识别装置5还通过主板2分别与至少一个硬件3通信连接，硬件识别装置5用于获取安装在插槽C内的硬件3的身份标识，并根据获取的身份标识识别插槽C内的硬件3为网卡3a或内存卡3b，处理器4用于根据硬件识别装置5的识别结果采用相适配的通信协议与插槽C内的硬件3进行通信。
示例性地，硬件识别装置5确定插槽内的硬件3为内存卡3b，硬件3与处理器4之间采用第一通信协议通信，硬件识别装置5确定插槽内的硬件3为网卡3a，硬件3与处理器4之间采用第二通信协议通信；其中，第二通信协议与第一通信协议不同。例如，第一通信协议为计算快速链接(compute express link，CXL)协议，示例的，可为CXL 2.0协议；第二通信协议为外围组件互连高速(PCI-Express，peripheral component interconnect express，PCIE)协议，其是一种高速串行计算机扩展总线标准。
也就是说，由于网卡与计算设备的处理器之间采用PCIE协议通信，比如PCIe4.0、PCIe5.0、PCIe6.0，而内存卡与计算设备的处理器之间采用CXL协议进行通信，而CXL底层物理总线与PCIe的底层物理总线一致，因此，系统可以根据安装在插槽内的硬件自动适配成CXL内存卡或者PCIe网卡。
其中，硬件识别装置5可包括基板管理控制器BMC芯片51和基本输入输出系统BIOS芯片52或包括基本输入输出系统BIOS芯片52。也就是说，可以通过基板管理控制器(baseboard management controller，BMC)获取安装在插槽C内的硬件3的身份标识，并识别出硬件3是网卡或内存卡，然后将识别结果发送给BIOS；也可通过基本输入输出系统(basic input output system，BIOS)获取安装在插槽C内的硬件3的身份标识，并识别出硬件3是网卡或内存卡。接着，处理器4可根据BIOS获取的硬件3的识别结果选择通信协议，以保证处理器4与插槽C内的硬件3进行通信时采用的通信协议与插槽C内的硬件3相适配。其中，BIOS是应用程序，一般存储在闪存芯片中，也可以存储在CPU中。例如，可将BIOS以固件的形式写入到硬件设备如BIOS芯片作为硬件识别装置5，BIOS芯片可以是非易失性存储器，如闪存芯片。
需要说明的是，不同公司的计算设备对BMC有不同的称呼，例如一些公司称为BMC，一些公司称为iLO，另一公司称为iDRAC。不论是叫BMC，还是叫iLO或iDRAC，都可以理解为是本发明实施例中的BMC。
由于内存卡和网卡具有不同的身份标识，这样在内存卡插设在计算设备的插槽内时，计算设备的硬件识别装置能够获取内存卡的身份标识，并根据内存卡的身份标识确定插槽内的硬件为内存卡，处理器可根据硬件识别装置的识别结果(硬件为内存卡)采用与内存卡相适配的通信协议如CXL协议与插槽内的硬件进行通信，将内存卡从插槽移除，并将网卡插设在该插槽内时，计算设备的硬件识别装置能够获取网卡的身份标识，并根据网卡的身份标识确定插槽内的硬件为网卡，处理器可根据硬件识别装置的识别结果(硬件为网卡)采用与网卡相适配的通信协议如PCIE协议与插槽内的硬件进行通信。这样能够灵活利用插槽安装网卡或内存卡进行使用，拓展了网卡和内存卡的使用场景，丰富了计算设备的配置规格，可为用户的业务提供更加灵活的适配方案，从而更好地满足用户需求。
继续参考图1C，机箱1上可设置有至少一个开口K，插槽C与开口K对应设置，至少一个硬件3通过开口K设置在插槽C内。由于计算设备如服务器的主板2的插槽C可对应机箱1的开口K设置，这样在不需要打开机箱1的情况下，可在机箱外部将网卡3a或内存卡3b通过机箱1的开口K安装在插槽C内或从插槽C内移除，提高了在计算设备上安装或移除网卡3a或内存卡3b的操作便利性。另外，在有需要的情况下，插槽C也可设置在其他位置，如插槽C设置在与主板2连接的硬盘背板上。
进一步地，在图1C中，至少一个开口K包括第一开口K1和第二开口K2，至少一个插槽C包括第一插槽C1和第二插槽C2，第一开口K1与第一插槽C1对应，第二开口K2与第二插槽C2对应；至少一个硬件3包括网卡3a和内存卡3b，网卡3a可设置在对应的第一开口K1和第一插槽C1内，内存卡3b可设置在对应的第二开口K2和第二插槽C2内。即第一插槽C1内可设置网卡3a，第二插槽C2内可设置内存卡3b。并且，在其他例子中，还可根据需要设置更多个插槽C，来安装其他网卡3a或其他内存卡3b。
另外，为了使网卡3a和内存卡3b均能安装在插槽C内，网卡3a和内存卡3b的结构可类似，或者，在保证网卡3a和内存卡3b均能安装在插槽C内的前提下，网卡3a和内存卡3b的结构也可不同。下面以网卡3a和内存卡3b的结构类似为例进行介绍。
如图1B和图1C所示，硬件3如网卡3a或内存卡3b可包括电路板31、设置在电路板31上的控制器32、设置在电路板31一端的金手指33，金手指33通过电路板31和控制器32通信连接。并且，插槽C内可设置有连接器(图中未示出)，金手指33用于插设在连接器内，金手指33上的多个引脚中的至少部分引脚与连接器的多个引脚中的至少部分引脚通信连接，控制器32通过金手指33与处理器4之间通信。
进一步地，硬件3还可包括散热器35，散热器35设置在控制器32的远离电路板31的侧面，并可与控制器32接触，以用于对控制器32进行散热。为了使硬件3能够可靠安装在插槽C内，硬件3还可包括辅助固定装置36，辅助固定装置36可设置在电路板31的与金手指33相对的一端，在金手指33插设在主板2的插槽C内时，辅助固定装置36可与容纳主板2的机箱1固定连接。在一些实施例中，辅助固定装置36可为松不脱螺钉。另外，为了方便安装拆卸硬件3，硬件3还可包括把手37，把手37可设置在电路板31的远离金手指33的一端，并与辅助固定装置36间隔设置。用户可手持把手37，将硬件3安装到插槽C或将硬件3从插槽C拔下。
另外，虽然网卡3a和内存卡3b可具有类似的硬件结构，如均可包括电路板31、控制器32和金手指33等结构，但该些结构具体的功能可能有所不同，例如，网卡3a的控制器32可与计算设备的处理器如CPU采用PCIE协议进行通信，内存卡3b的控制器32可与计算设备的处理器如CPU采用CXL协议进行通信。
并且，硬件3为内存卡3b，硬件3还可包括至少一个内存芯片X，至少一个内存芯片X设置在电路板31上，控制器32通过电路板31和内存芯片X连接。也就是说，电路板31用于连接内存芯片X、控制器32和金手指33。示例的，内存芯片X可通过电路板31上的线路与控制器32连接，控制器32与金手指33可通过电路板31上的线路连接。进一步地，金手指33插设到插槽C上，可使控制器32和处理器4之间通过 金手指33、插槽C通信连接。内存卡3b的控制器32可通过金手指33接收来自处理器4的访问请求，并根据该访问请求通过电路板31上的线路向一个或多个内存芯片X发生读操作命令或写操作命令，以使内存芯片X执行读操作命令或写操作命令。或者，内存卡3b的控制器32从内存芯片X中读取到的数据也可传递至处理器4。
在一个例子中，多个内存芯片X与控制器32设置在电路板31的同一侧面。另外，在有需要的情况下，也可在电路板31的两侧分别设置多个内存芯片X。其中，内存芯片，也叫内存卡颗粒，全称为动态随机存取存储器(dynamic random-access memory，DRAM)，用于存储数据，属于易失性储存的一种，即断电之后就会丢失数据不会持久化保持。例如，可为同步动态随机存储器(synchronous dynamic random-access memory，SDRAM)。
下面参考图2对硬件识别装置5获取硬件3的身份标识的过程进行详细介绍。首先，硬件识别装置5需要确定插槽C内安装了硬件C。例如，当硬件3插入插槽C内时，主板2可以感知到插槽C上插入了硬件3，进而可产生第一信号，并向硬件识别装置5发送第一信号。也就是说，第一信号用于表示插槽C内插入了硬件3。第一信号例如可为高电平。接着，在硬件识别装置5接收到第一信号后便可从硬件3获取硬件3的身份标识即ID信息。
图2为图1C所示的计算设备的内存卡与硬件识别装置之间的通信示意图。如图2所示，计算设备的硬件识别装置5识别插槽C内的硬件3的身份标识的方式可以有但不限于以下两种方案：
方案1——硬件3的金手指33上的多个引脚包括至少一个第一引脚，网卡3a和内存卡3b中一者的身份标识为至少一个第一引脚未接收电路板31发送的数据信号，另一者的身份标识为至少一个第一引脚接收电路板31发送的数据信号。
例如，网卡3a的身份标识为至少一个第一引脚未接收电路板31发送的数据信号，内存卡3b的身份标识为至少一个第一引脚接收电路板31发送的数据信号。也就是说，内存卡3b的金手指33上的第一引脚和网卡3a的金手指33上的第一引脚的位置相同，网卡3a的金手指33上的第一引脚为备用引脚，内存卡3b的金手指33上的第一引脚不是备用引脚，是需要使用的引脚，会接收电路板发送的数据信号。备用引脚也称为不连接引脚(not connected PIN，NC PIN)或保留(reserved)引脚。在图2中，内存卡包括两个第一引脚即NC1和NC2。示例性地，该基于CXL协议的内存卡可参照OCP3.0规范设计，采用OCP3.0规范定义的网卡的备用引脚作为NC1和NC2，以使CXL内存卡与网卡具备不同的身份标识。
这样不同硬件的相同位置的备用引脚发出的信号不同，可代表或者承载不同的硬件类型，从而建立了备用引脚和硬件类型的映射关系，并且，硬件类型和备用引脚的映射关系可以预先配置到硬件识别装置5中。硬件3可以根据该硬件的类型选择相应的备用引脚接收电路板发送的数据信号，硬件识别装置5根据获取到的数据信号使用的备用引脚，按照硬件类型和备用引脚的映射关系可确定硬件类型，即硬件为网卡3a或内存卡3b。
方案2——每个硬件3还包括非易失性存储器34和系统管理总线SMBus(图中未示出)，非易失性存储器34设置在电路板31上，非易失性存储器34内存储有硬件3 的身份标识。不同的硬件类型具有不同的身份标识。例如，身份标识可为字符串，不同的字符串表示不同的硬件类型。系统管理总线设置在电路板31上，且一端与非易失性存储器34连接，另一端与金手指33上的引脚连接；当硬件识别装置5确定硬件3插置到插槽C上时，便可通过系统管理总线获取非易失性存储器34内的硬件3的身份标识。
其中，SMBUS分为系统管理数据(system management data，SMDAT)链路和系统管理时钟(system management clock，SMCLK)链路。在图2中，内存卡上示出了SMCLK引脚、SMDAT引脚，SMCLK引脚与SMBus的系统管理时钟链路/时钟信号线相连，SMDAT引脚与SMBus的系统管理数据链路/数据信号线相连。身份标识可以通过SMDAT链路进行传输。
另外，非易失性存储器(non-volatile memory，NVM)，是指当电流关掉后，所存储的数据不会消失的电脑存储器。非易失性存储器主要有以下类型：ROM(read-only memory，只读内存)、PROM(programmable read-only memory，可编程只读内存)、EAROM(electrically alterable read only memory，电可改写只读内存)、EPROM(erasable programmable read only memory，可擦可编程只读内存)、EEPROM(electrically erasable programmable read only memory，电可擦可编程只读内存)、Flash memory(闪存)。
在一个例子中，非易失性存储器34可为带电可擦可编程非易失性存储器(electrically erasable programmable read-only memory，EEPROM)，其是一种掉电后数据不丢失的存储芯片。EEPROM可以在电脑上或专用设备上擦除已有信息，重新编程。
并且，同一类型的硬件3可以有不同的形态。进一步地，还可使同一类型的硬件3的不同形态的身份标识有所差异。以不同形态的内存卡3b为例，其形态可分为小尺寸(small form factor，SFF)内存卡和大尺寸(large form factor，LFF)内存卡。示例的，可以采用不同的备用引脚或不同数量的备用引脚来标识不同形态的内存卡，也可以采用不同的身份标识来标识不同形态的内存卡。在一个例子中，小尺寸内存卡和大尺寸内存卡的身份标识可如表1所示。
表1
也就是说，小尺寸内存卡和大尺寸内存卡的身份标识方案均可选择方案1或者方案2，还可同时使用两种方案。例如，如果内存卡3b的形态是SFF，可使用两个备用引脚/NC pin，如果内存卡3b的形态是LFF，可以使用四个备用引脚/NC pin。在图2中，内存卡同时使用了两种方案，即采用了两个备用引脚NC pin即NC1、NC2并可通过与SMCLK引脚和SMDAT引脚连接的SMBUS读取非易失性存储器中存储的身份标识。
继续参考图2，内存卡的金手指上的引脚NC1、NC2、SMCLK、SMDAT(通过插槽C)与复杂逻辑元件(complex programmable logic device，CPLD)/现场可编程门阵列(field-programmable gate array，FPGA)连接，CPLD/FPGA连接硬件识别装置5如BMC和BIOS。以CPLD为例，CPLD与BMC之间的通信总线可以是通用输入/输出口(general-purpose input/output，GPIO)、局部总线(local bus)、串行通用输入/输出(serial general purpose input/output，SGPIO)总线、LPC总线(low pin count Bus)、串行外设接口(serial peripheral interface，SPI)、集成电路(inter-integrated circuit，I2C)总线、增强串行外设接口(enhanced serial peripheral interface，eSPI)等中的一种或多种。CPLD与BIOS之间的通信总线可以是GPIO、LPC总线、SPI、I2C总线、eSPI等中的一种或多种。另外，BMC与BIOS之间的通信总线可以是平台环境式控制接口(platform environment control interface，PECI)、GPIO、PCIe等物理总线中的任一种或多种。
在一个例子中，BMC可利用CPLD/FPGA通过引脚NC1和NC2(方案1)获取硬件3的身份标识或通过引脚SMCLK、SMDAT(方案2)获取非易失性存储器34内存储的硬件3的身份标识，并根据获取的身份标识识别出硬件3是网卡3a或内存卡3b，然后将识别结果发送给BIOS，以便处理器4根据接收BIOS获取的识别结果采用相适配的通信协议与硬件3进行通信。
在另一个例子中，BIOS可利用CPLD/FPGA通过引脚NC1和NC2(方案1)获取硬件3的身份标识或通过引脚SMCLK、SMDAT(方案2)获取非易失性存储器34内存储的硬件3的身份标识，并根据获取的身份标识识别出硬件3是网卡3a或内存卡3b，然后处理器4根据接收BIOS获取的识别结果采用相适配的通信协议与硬件3进行通信。
另外，本申请实施例还提供一种计算设备。如图1B和图1C所示，该计算设备可包括机箱1、主板2、至少一个内存卡3b。机箱1设置有至少一个开口K，主板2设置在机箱1内，主板2上设置有至少一个插槽C，插槽C与开口K对应。至少一个内存卡3b包括电路板31和设置在电路板31一端的金手指33，内存卡3b设置在插槽C内，且金手指33与插槽C插接。
由于机箱1上设置有开口K，主板2上设置的插槽C与开口K对应，这样无需打开机箱1，内存卡3b在机箱1外部通过开口K可设置在插槽C内或从插槽C移除，从而方便了安装和移除内存卡3b。
进一步地，计算设备还可包括至少一个网卡3a、处理器4和硬件识别装置5。网卡3a能够设置在插槽C内，网卡3a和内存卡3b分别具有身份标识，且网卡3a的身份标识和内存卡3b的身份标识不同。处理器4和硬件识别装置5均设置在主板2上并通过主板2通信连接，且处理器4和硬件识别装置5还通过主板2分别与安装在插槽C内的网卡3a或内存卡3b通信连接，硬件识别装置5用于获取安装在插槽C内的网卡3a或内存卡3b的身份标识，并根据获取的身份标识识别插槽C内安装有网卡3a或内存卡3b，处理器4用于根据硬件识别装置5的识别结果采用相适配的通信协议与插槽C内的网卡3a或内存卡3b进行通信。
示例性地，硬件识别装置5确定插槽内的硬件3为内存卡3b，硬件3与处理器4之间采用第一通信协议通信，硬件识别装置5确定插槽内的硬件3为网卡3a，硬件3 与处理器4之间采用第二通信协议通信；其中，第二通信协议与第一通信协议不同。例如，第一通信协议为计算快速链接(compute express link，CXL)协议，示例的，可为CXL 2.0协议；第二通信协议为外围组件互连高速(PCI-Express，peripheral component interconnect express，PCIE)协议，其是一种高速串行计算机扩展总线标准。
其中，内存卡3b还可包括控制器32和至少一个内存芯片X，控制器32和至少一个内存芯片X间隔设置在电路板31上，控制器32通过电路板31和内存芯片X连接，并通过电路板31与金手指33连接。控制器32确保内存卡3b与处理器4之间能够采用第一通信协议如CXL进行通信。
并且，关于该计算设备的其他内容可参见上述实施例的计算设备的相关介绍。
图3为本申请实施例提供的一种内存卡的结构示意图。如图3所示，内存卡包括电路板31、控制器32、至少一个内存芯片X和金手指33。控制器32和至少一个内存芯片X间隔设置在电路板31上。控制器32通过电路板31和内存芯片X连接。金手指33设置在电路板31的一端，并通过电路板31和控制器32通信连接。
其中，内存卡具有身份标识，以便在内存卡的金手指33插设在计算设备的用于安装网卡的插槽内时，使计算设备的硬件识别装置通过金手指33获取内存卡的身份标识，并根据获取的身份标识识别插槽内安装有内存卡，进而使计算设备的处理器根据硬件识别装置的识别结果将处理器与内存卡的控制器32与之间的通信协议切换为与内存卡相适配的通信协议。
由于内存卡具有身份标识，这样在内存卡的金手指插设在计算设备的用于安装网卡的插槽内时，计算设备的硬件识别装置能够通过插槽和金手指获取内存卡的身份标识，进而识别出安装在插槽内的硬件是内存卡，接着，计算设备的处理器可根据硬件识别装置的识别结果(插槽内安装有内存卡)采用与内存卡相适配的通信协议与内存卡进行通信。例如，插槽内安装网卡时，网卡与CPU之间的通信协议为PCIE协议，将网卡移除，在该插槽内安装内存卡时，可先通过计算设备的硬件识别装置如基板管理控制器(baseboard management controller，BMC)和基本输入输出系统(basic input output system，BIOS)识别到插槽内安装的硬件为内存卡，接着，处理器可根据硬件识别装置的识别结果将其与内存卡之间的通信协议切换为CXL协议。也就是说，该内存卡能够设置在网卡插槽内进行使用，拓展了内存卡的使用场景，能够灵活利用插槽，丰富计算设备的配置规格，为用户的业务提供更加灵活的适配方案，从而更好地满足用户需求。
并且，使内存卡具有身份标识的方式可以有但不限于以下两种方案：
方案1——金手指33上的多个引脚包括至少一个第一引脚，第一引脚对应网卡的金手指上未接收网卡的电路板发送的数据信号的引脚即备用引脚或保留引脚，内存卡的身份标识为至少一个第一引脚接收电路板发送的数据信号。
也就是说，对于网卡，硬件的金手指上的第一引脚是未使用的引脚，即NC(not connect)PIN，计算设备的硬件识别装置通过第一引脚不能够获取数据信号。对于内存卡，硬件的金手指上的第一引脚是使用的引脚，计算设备的硬件识别装置能够通过第一引脚获取数据信号。这样硬件识别装置可通过第一引脚区分内存卡和网卡。
方案2——内存卡还包括非易失性存储器34，非易失性存储器34设置在电路板31上，非易失性存储器34内存储有内存卡的身份标识，以便在内存卡安装在计算设备的插槽内时，使计算设备的硬件识别装置能够获取非易失性存储器34内存储的内存卡的身份标识。
也就是说，网卡和内存卡的电路板上均可设置非易失性存储器。网卡的非易失性存储器中存储网卡的身份标识，内存卡的非易失性存储器34中存储内存卡的身份标识，这样当网卡或内存卡设置在插槽内时，计算设备的硬件识别装置能够获取非易失性存储器34内的身份标识，并根据获取的身份标识确定安装在插槽内的硬件是网卡或内存卡。
继续参考图3，内存卡还可包括散热器35，散热器35设置在控制器32的远离电路板31的侧面，并可与控制器32接触，以用于对控制器32进行散热。进一步地，为了使内存卡能够可靠安装在插槽内，内存卡还可包括辅助固定装置36，辅助固定装置36可设置在电路板31的与金手指33相对的一端，在金手指33插设在主板的插槽内时，辅助固定装置36可与容纳主板的机箱固定连接。在一些实施例中，辅助固定装置36可以为松不脱螺钉。另外，为了方便安装拆卸内存卡，内存卡还可包括把手37，把手37可设置在电路板31的远离金手指33的一端，并与辅助固定装置36间隔设置。用户可手持把手37，将内存卡安装到插槽或将内存卡从插槽拔下。
随着CXL总线的速率越来越高，CXL2.0总线中单通道(lane)的速率已经可以达到32GT/s，基于CXL总线的内存卡将变得越来越有市场，伴随着CXL规范的演进，基于CXL的内存卡形态也会越来越多。开发计算机工程(open computer project，OCP)规范是一个工业标准，它规范了过程控制和自动化软件与工业现场设备之间的接口。OPC卡作为OCP组织下面发展得最成功的形态规范，结合OCP3.0形态的内存卡未来必将在数据中心寻得一席之地。
考虑到当前基于CXL协议的内存卡形态一般为E1.S(一种短的EDSFF 1U Short，简称E1.S，EDSFF是enterprise and datacenter 1U short SSD form factor，SSD是固态硬盘(solid state disk))或者E3.S(E3.S是E3中尺寸比较接近U.2/U.3的2.5英寸盘的版本，二者可以共享一个机箱)，没有定义基于OCP3.0形态的内存卡。因此，本申请实施例基于OCP3.0规范设计了一种基于CXL协议的内存卡。
图4为本申请实施例提供的另一种内存卡的结构示意图。该内存卡为基于OCP3.0规范设计的内存卡，与图3类似地，在图4中，该内存卡可包括电路板31、控制器32、至少一个内存芯片X、金手指33、散热器35、辅助固定装置36和把手37等结构，但图4所示的内存卡中这些结构的位置与图3所示的内存卡中这些结构的位置有所不同，但功能可以相同。
也就是说，在硬件方案上，可以OCP3.0规范为基础，在电路板上设置CXL内存卡控制器，并设置内存芯片/内存卡颗粒、外围电路等硬件部分。进一步地，内存卡可利用OCP3.0定义的网卡的NC pin传递数据信号给系统如硬件识别装置，以对内存卡进行识别，进而进行相应配置如切换通信协议等。
本申请实施例的内存卡，在电路板上设置有内存卡控制器和内存芯片/内存卡颗粒。并且，定义内存卡的身份标识(Identity，ID)信息，其可传递给主系统侧做部件识 别和配置适配。这样基于OCP3.0规范的CXL内存卡形态，可利用OCP3.0网卡的已有物理形态，拓展CXL内存卡的应用边界，丰富服务器的配置规格，伴随着CXL总线的演进和英特尔数据中心级持久性内存模块(intel data centre persistent memory module，intel DCPMM)内存卡的演进，可为用户的业务提供更加灵活的适配方案。
图5为本申请实施例提供的一种硬件识别方法的流程图。如图5所示，该硬件识别方法由计算设备的基板管理控制器BMC或基本输入输出系统BIOS执行，具体可包括以下步骤：
501，接收第一信号，第一信号是在待识别硬件插置到插槽上时产生的。
其中，待识别硬件可为网卡或内存卡。第一信号用于表示插槽插置了硬件。示例性的，第一信号可为具有预设的电平或者码型的电信号。当然，第一信号还可以通过其他方式实现。
在一些实施例中，插槽本身可具有信号产生功能。当硬件插置到插槽时，插槽产生第一信号，并向BMC或BIOS发送第一信号。在一个实施例中，插槽位于计算设备的主板上。当硬件插置到插槽上时，主板可以感知到插槽上插置了硬件，进而产生第一信号，并向BMC或BIOS发送第一信号。
502，响应第一信号，从待识别硬件获取第二信号。
其中，第二信号承载了硬件标识。硬件标识是是用于标识硬件类型的信息。示例性地，可以有但不限于以下两种方案：
方案1——第二信号是备用引脚发送的信号，备用引脚映射到待识别硬件的硬件类型。
也就是说，硬件标识可以通过备用引脚表示，硬件类型和备用引脚具有映射关系。不同备用引脚发出的信号，代表或者承载不同的硬件类型。其中，硬件类型和备用引脚的映射关系可以预先配置到BMC或BIOS即硬件识别单元中。备用引脚也称为不连接引脚(not connected PIN，NC PIN)，是插槽中的保留(reserved)引脚。
通过建立备用引脚和硬件类型的映射关系，硬件可以根据该硬件的类型，按照备用引脚和硬件类型的映射关系，选择相应的备用引脚来发送第二信号。硬件识别单元在获取到第二信号时，可以根据发送第二信号的备用引脚，按照硬件类型和备用引脚之间的映射关系，得到第二信号对应的硬件类型。
方案2——第二信号承载的信息是预设的标识信息，标识信息用于表示待识别硬件的硬件类型。
示例性地，硬件具有非易失(non-volatile)存储器，例如，带电可擦可编程只读存储器(electrically erasable programmable read only memory，EEPROM)。非易失存储器可以存储有预设的标识信息，该预设的标识信息可以作为硬件标识，用于表示硬件的硬件类型。不同的硬件类型通过不同的标识信息表示。例如，标识信息可以为字符串，不同的字符串表示不同的硬件类型。当硬件插置到插槽上时，硬件识别单元可以从硬件的非易失存储器中获取该预设的标识信息。
在进行步骤502之后，接着，可以进行步骤503a或503b。具体如下：
503a，当第二信号承载的信息为网卡标识时，确认待识别硬件为网卡。
若上述硬件识别方法由BMC执行，则BMC会将识别结果(硬件为网卡)发送给BIOS， 然后，处理器根据BIOS获得的识别结果采用与网卡相适配的通信协议如PICE协议与网卡进行通信。
若上述硬件识别方法由BIOS执行，则处理器根据BIOS获得的识别结果(硬件为网卡)采用与网卡相适配的通信协议如PICE协议与网卡进行通信。
503b，当第二信号承载的信息为内存卡标识时，确认待识别硬件为内存卡。
若上述硬件识别方法由BMC执行，则BMC会将识别结果(硬件为内存卡)发送给BIOS，然后，处理器根据BIOS获得的识别结果采用与内存卡相适配的通信协议如CXL协议与内存卡进行通信。
若上述硬件识别方法由BIOS执行，则处理器根据BIOS获得的识别结果(硬件为内存卡)采用与内存卡相适配的通信协议如PICE协议与内存卡进行通信。
综上所述，由于内存卡和网卡具有不同的身份标识，这样在内存卡插设在计算设备的插槽内时，计算设备的硬件识别装置能够获取内存卡的身份标识，并根据内存卡的身份标识确定插槽内的硬件为内存卡，处理器可根据硬件识别装置的识别结果(硬件为内存卡)采用与内存卡相适配的通信协议如CXL协议与插槽内的硬件进行通信；将内存卡从插槽移除，并将网卡插设在该插槽内时，计算设备的硬件识别装置能够获取网卡的身份标识，并根据网卡的身份标识确定插槽内的硬件为网卡，处理器可根据硬件识别装置的识别结果(硬件为网卡)采用与网卡相适配的通信协议如PCIE协议与插槽内的硬件进行通信。这样能够灵活利用插槽安装网卡或内存卡，拓展了网卡和内存卡的使用场景，丰富了计算设备的配置规格，可为用户的业务提供更加灵活的适配方案，从而更好地满足用户需求。
最后说明的是：以上实施例仅用以说明本申请实施例的技术方案，而对其限制；尽管参照前述实施例对本申请实施例进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或替换，并不使相应技术方案的本质脱离本申请实施例各实施例技术方案的范围。

Claims (11)

  1. 一种计算设备，其特征在于，包括：
    机箱(1)；
    主板(2)，设置在所述机箱(1)内，所述主板(2)上设置有至少一个插槽(C)；
    至少一个硬件(3)，对应设置在所述至少一个插槽(C)内，每个硬件(3)具有身份标识且为网卡(3a)或内存卡(3b)，所述网卡(3a)的身份标识和所述内存卡(3b)的身份标识不同；
    处理器(4)和硬件识别装置(5)，均设置在所述主板(2)上并通过所述主板(2)通信连接，且所述处理器(4)和所述硬件识别装置(5)还通过所述主板(2)分别与所述至少一个硬件(3)通信连接，所述硬件识别装置(5)用于获取安装在所述插槽(C)内的硬件(3)的身份标识，并根据获取的身份标识识别所述插槽(C)内的硬件(3)为网卡(3a)或内存卡(3b)，所述处理器(4)用于根据所述硬件识别装置(5)的识别结果采用相适配的通信协议与所述插槽(C)内的硬件(3)进行通信。
  2. 根据权利要求1所述的计算设备，其特征在于，每个所述硬件(3)包括：
    电路板(31)；
    控制器(32)，设置在所述电路板(31)上；
    金手指(33)，设置在所述电路板(31)的一端，并通过所述电路板(31)与所述控制器(32)通信连接；
    并且，所述插槽(C)内设置有连接器，所述金手指(33)用于插设在所述连接器内，所述金手指(33)上的多个引脚中的至少部分引脚与所述连接器的多个引脚中的至少部分引脚通信连接，以使所述控制器(32)通过所述金手指(33)和所述连接器与所述处理器(4)通信连接。
  3. 根据权利要求2所述的计算设备，其特征在于，所述金手指(33)上的多个引脚包括至少一个第一引脚，所述网卡(3a)和所述内存卡(3b)中一者的身份标识为所述至少一个第一引脚未接收所述电路板(31)发送的数据信号，另一者的身份标识为所述至少一个第一引脚接收所述电路板(31)发送的数据信号。
  4. 根据权利要求2或3所述的计算设备，其特征在于，每个所述硬件(3)还包括：
    非易失性存储器(34)，设置在所述电路板(31)上，所述非易失性存储器(34)内存储有所述硬件(3)的身份标识；
    系统管理总线，设置在所述电路板(31)上，且一端与所述非易失性存储器(34)连接，另一端与所述金手指(33)上的引脚连接；
    并且，所述硬件识别装置(5)通过所述系统管理总线能够获取所述非易失性存储器(34)内的所述硬件(3)的身份标识，以确定所述插槽(C)内的硬件(3)为网卡(3a)或内存卡(3b)。
  5. 根据权利要求2-4中任一项所述的计算设备，其特征在于，所述硬件(3)为内 存卡(3b)，所述硬件(3)还包括至少一个内存芯片(X)，所述至少一个内存芯片(X)设置在所述电路板(31)上，所述控制器(32)通过所述电路板(31)和所述内存芯片(X)连接。
  6. 根据权利要求1-5中任一项所述的计算设备，其特征在于：
    所述硬件识别装置(5)确定所述插槽内的硬件(3)为内存卡(3b)，所述硬件(3)与所述处理器(4)之间采用第一通信协议通信；
    所述硬件识别装置(5)确定所述插槽内的硬件(3)为网卡(3a)，所述硬件(3)与所述处理器(4)之间采用第二通信协议通信；其中，所述第二通信协议与所述第一通信协议不同。
  7. 根据权利要求1-6中任一项所述的计算设备，其特征在于，所述硬件识别装置(5)包括基板管理控制器BMC芯片(51)和基本输入输出系统BIOS芯片(52)或包括基本输入输出系统BIOS芯片(52)。
  8. 根据权利要求1-7中任一项所述的计算设备，其特征在于，所述机箱(1)上设置有至少一个开口(K)，所述插槽(C)与所述开口(K)对应设置，所述至少一个硬件(3)通过所述开口(K)设置在所述插槽(C)内。
  9. 根据权利要求8所述的计算设备，其特征在于，所述至少一个开口(K)包括第一开口(K1)和第二开口(K2)，所述至少一个插槽(C)包括第一插槽(C1)和第二插槽(C2)，所述第一开口(K1)与所述第一插槽(C1)对应，所述第二开口(K2)与所述第二插槽(C2)对应；
    所述至少一个硬件(3)包括所述网卡(3a)和所述内存卡(3b)，所述网卡(3a)设置在对应的所述第一开口(K1)和所述第一插槽(C1)内，所述内存卡(3b)设置在对应的所述第二开口(K2)和所述第二插槽(C2)内。
  10. 一种计算设备，其特征在于，包括：
    机箱(1)，设置有至少一个开口(K)；
    主板(2)，设置在所述机箱(1)内，所述主板(2)上设置有至少一个插槽(C)，所述插槽(C)与所述开口(K)对应；
    至少一个内存卡(3a)，包括电路板(31)和设置在所述电路板(31)一端的金手指(33)，所述内存卡(3a)设置在所述插槽(C)内，且所述金手指(33)与所述插槽(C)插接。
  11. 一种内存卡，其特征在于，包括：
    电路板(31)；
    控制器(32)和至少一个内存芯片(X)，所述控制器(32)和所述至少一个内存芯片(X)间隔设置在所述电路板(31)上，所述控制器(32)通过所述电路板(31) 和所述内存芯片(X)连接；
    金手指(33)，设置在所述电路板(31)的一端，并通过所述电路板(31)和所述控制器(32)通信连接；
    其中，所述内存卡具有身份标识，以便在所述内存卡的金手指(33)插设在计算设备的用于安装网卡的插槽内时，使所述计算设备的硬件识别装置通过金手指(33)获取所述内存卡的身份标识，并根据获取的身份标识识别插槽内安装有内存卡，进而使所述计算设备的处理器根据所述硬件识别装置的识别结果将所述处理器与所述控制器(32)之间的通信协议切换为与所述内存卡相适配的通信协议。
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