WO2024082830A1 - 一种背光降功耗硬件电路及装置 - Google Patents

一种背光降功耗硬件电路及装置 Download PDF

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Publication number
WO2024082830A1
WO2024082830A1 PCT/CN2023/115398 CN2023115398W WO2024082830A1 WO 2024082830 A1 WO2024082830 A1 WO 2024082830A1 CN 2023115398 W CN2023115398 W CN 2023115398W WO 2024082830 A1 WO2024082830 A1 WO 2024082830A1
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WIPO (PCT)
Prior art keywords
diode
capacitor
feedback
hardware circuit
inductor
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Application number
PCT/CN2023/115398
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English (en)
French (fr)
Inventor
马骋宇
吉庆
张伟
于欢欢
王朝
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荣耀终端有限公司
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Publication of WO2024082830A1 publication Critical patent/WO2024082830A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30—Driver circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/10—Controlling the light source
    • H05B47/165—Controlling the light source following a pre-assigned programmed sequence; Logic control [LC]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present application relates to the field of circuit control, and in particular to a backlight power consumption reduction hardware circuit and device.
  • display screens are mainly LCDs, and LCDs themselves do not emit light. In order for LCDs to display images, they must use backlights. Common backlights are generally composed of several LED lights, and the number of LED lights is determined by the size of the screen.
  • LED has a very long life, and it does not contain Hg, which is very destructive to the environment. Due to these advantages of LED, it is more and more widely used in the field of display backlight sources.
  • the backlight chip driver circuit performs voltage doubling conversion: 1. It needs to use chips for control, which has a high production cost; 2. The voltage doubling efficiency is low, and the system power loss is high.
  • the conventional boost circuit uses MOS tubes to boost the voltage
  • the boost chip circuit is shown in Figure 1.
  • the boost chip needs to be controlled by a single-chip microcomputer to turn on and off the power.
  • Vin charges the inductor L1
  • the load LED relies on Cout for continuous current supply
  • Vout Vin + VL - VD1
  • the voltage is boosted.
  • the main purpose of the present application is to provide a backlight power consumption reduction hardware circuit, aiming to solve the technical problem that the existing boost chip has low voltage doubling efficiency during voltage boosting, resulting in high power loss.
  • the present application discloses a backlight power consumption reduction hardware circuit, the hardware circuit comprises a first boost unit, the first boost unit comprises a first diode D1, a second diode D2, a first capacitor C1 and a second capacitor C2;
  • the first end of the first diode D1 is connected to the first input end Vboost, the first input end Vboost is used to provide voltage to the first boost unit, and the second end of the first diode D1 is connected to the first end of the second diode D2;
  • the second end of the second diode D2 is an output end
  • the first end of the first capacitor C1 is connected to the second end of the first diode D1 and the first end of the second diode D2 respectively; the second end of the first capacitor C1 is connected to the second input end SW, and the second input end SW is used to provide voltage to the first boost unit;
  • a first end of the second capacitor C2 is connected to a second end of the second diode D2, and a second end of the second capacitor C2 is grounded.
  • the hardware circuit further includes a first inductor L1, a third diode D3, A third capacitor C3 and a fourth capacitor C4;
  • the first end of the first inductor L1 is connected to the third input end Vin, the third input end Vin is used to provide voltage to the hardware circuit, and the second end of the first inductor L1 is connected to the first end of the third diode D3;
  • the second end of the third diode D3 is connected to the first end of the first diode D1;
  • the first end of the fourth capacitor C4 is connected to the second end of the third diode D3 and the first end of the first diode D1 respectively, and the second end of the fourth capacitor C4 is grounded;
  • the node of the first end of the fourth capacitor C4, the second end of the third diode D3 and the first end of the first diode D1 is the first input end Vboost;
  • a first end of the third capacitor C3 is connected to the second end of the first inductor L1 , and a second end of the third capacitor C3 is grounded.
  • the hardware circuit further includes a second inductor L2 and a fifth capacitor C5;
  • the first end of the second inductor L2 is connected to the first end of the first inductor L1, and the second end of the second inductor L2 is connected to the first end of the third diode D3;
  • a first end of the fifth capacitor C5 is connected to the second input end SW and a first end of the second inductor L2 respectively, and a second end of the fifth capacitor C5 is grounded.
  • the first inductor L1 and the second inductor L2 are fixed inductors, and the first inductor L1 and the second inductor L2 are used for one or more of filtering and resonance.
  • the hardware circuit further includes a feedback unit, and the feedback unit includes a first feedback circuit and a second feedback circuit;
  • the first end of the first feedback circuit is respectively connected to the node of the second end of the third diode D3, the first end of the first diode D1 and the first end of the fourth capacitor C4, and the second end of the first feedback circuit is connected to the feedback end, and the feedback end is used to receive the feedback signal of the feedback unit;
  • the first end of the second feedback circuit is connected to the second end of the second diode D2 and the first end of the second capacitor C2 respectively, and the second end of the second feedback circuit is connected to the feedback end;
  • the first feedback circuit further includes a fourth diode D4, a first end of the fourth diode D4 is connected to the first end of the first feedback circuit, and a second end of the fourth diode D4 is connected to the feedback end.
  • the hardware circuit further includes at least one second boost unit cascaded with the first boost unit, and the second boost unit includes a fifth diode D5, a sixth diode D6, a first boost capacitor Cin and a first output capacitor Cout;
  • first end of the fifth diode D5 is connected to the second end of the second diode D2, and the second end of the fifth diode D5 is connected to the first end of the sixth diode D6;
  • the second end of the sixth diode D6 is an output end
  • the first end of the first boost capacitor Cin is connected to the second end of the fifth diode D5 and the first end of the sixth diode D6 respectively, and the second end of the first boost capacitor Cin is connected to the second input end SW, and the second input end SW is used to provide voltage to the first boost unit and the second boost unit;
  • a first end of the first output capacitor Cout is connected to a second end of the sixth diode D6 , and a second end of the first output capacitor Cout is grounded.
  • the present invention also provides a backlight power consumption reduction hardware device based on any of the above, the hardware device comprising:
  • a hardware circuit wherein the hardware circuit comprises a first boost unit
  • a backlight chip wherein the backlight chip is connected to the first boost unit, and the backlight chip provides a PWM periodic voltage signal for the first boost unit;
  • a display device wherein the display device provides light source for display through a hardware circuit.
  • the SW pin of the backlight chip is connected to the second input terminal SW of the hardware circuit.
  • the hardware device further comprises a feedback pin FB of the backlight chip connected to the feedback end of the feedback unit.
  • the hardware circuit further includes at least one second boost unit, and the second boost unit is cascaded with the first boost unit.
  • the backlight power consumption reduction hardware circuit Compared with the traditional backlight circuit, the backlight power consumption reduction hardware circuit provided by the present application achieves a double boosting effect of the hardware circuit through the first boosting unit, and uses the first input terminal Vboost and the second input terminal SW to provide voltage to the first boosting unit, thereby realizing imperceptible boosting of the display device, and does not require the control signal of the backlight chip to participate in the boosting process, thereby reducing the power consumption of the hardware circuit, improving the boosting efficiency, and reducing the production cost.
  • FIG1 is a chip circuit diagram of an existing backlight circuit
  • FIG2 is a chip circuit diagram of a backlight power consumption reduction hardware circuit provided in an embodiment of the present application.
  • FIG3 is a circuit schematic diagram 1 of a backlight power consumption reduction hardware circuit provided in an embodiment of the present application.
  • FIG4 is a timing diagram of the circuit diagram of FIG3 ;
  • FIG5 is a simulation waveform diagram of the circuit schematic diagram of FIG3 ;
  • FIG6 is a second circuit schematic diagram of a backlight power consumption reduction hardware circuit provided in an embodiment of the present application.
  • FIG7 is a third circuit schematic diagram of a backlight power consumption reduction hardware circuit provided in an embodiment of the present application.
  • FIG8 is a fourth circuit schematic diagram of a backlight power consumption reduction hardware circuit provided in an embodiment of the present application.
  • FIG. 9 is a fifth circuit schematic diagram of a backlight power consumption reduction hardware circuit provided in an embodiment of the present application.
  • At least one (item) means one or more, “more than one” means two or more, “at least two (items)” means two or three or more, and "and/or” is used to describe an associated pair.
  • the association relationship of objects indicates that there can be three kinds of relationships.
  • a and/or B can mean: only A exists, only B exists, and both A and B exist, where A and B can be singular or plural.
  • the character “/” generally indicates that the objects before and after the association are in an "or” relationship.
  • At least one of the following” or similar expressions refers to any combination of these items.
  • at least one of a, b or c can mean: a, b, c, "a and b", “a and c", “b and c", or "a and b and c".
  • the backlight power consumption reduction hardware circuit can be applied to electronic devices.
  • the electronic device can be a mobile phone, a wearable device, a tablet computer, a computer with wireless transceiver function, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, etc., without specific limitation here.
  • VR virtual reality
  • AR augmented reality
  • the present application provides a backlight power consumption reduction hardware device based on any of the above-mentioned ones, as shown in Figure 2, which is a circuit diagram of the hardware device provided by an embodiment of the present application.
  • the hardware device includes a hardware circuit, a backlight chip and a display device.
  • the hardware circuit includes a first boost unit, the backlight chip is connected to the first boost unit, and the backlight chip provides a PWM periodic voltage signal to the first boost unit; the display device provides a light source for display through the hardware circuit.
  • the display screen includes a display panel.
  • the display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, a quantum dot light-emitting diode (QLED), etc.
  • the electronic device may include 1 or N display screens, where N is a positive integer greater than 1.
  • the SW pin of the backlight chip is connected to the second input terminal SW of the hardware circuit, and the feedback pin FB is connected to the feedback terminal of the feedback unit.
  • Figure 3 is a backlight power consumption reduction hardware circuit provided by an embodiment of the present application, wherein the first boost unit includes a first diode D1, a second diode D2, a first capacitor C1 and a second capacitor C2; wherein, the first end of the first diode D1 is connected to the first input end Vboost, the first input end Vboost is used to provide voltage to the first boost unit, the second end of the first diode D1 is connected to the first end of the second diode D2; the second end of the second diode D2 is the output end; the second end of the first diode D1 is connected to the first end of the second diode D2; the second end of the first capacitor C1 is connected to the second input end SW, the second input end SW is used to provide voltage to the first boost unit; the first end of the second capacitor C2 is connected to the second end of the second diode D2, and the second end of the second capacitor C2 is grounded.
  • the first boost unit includes a first diode
  • a diode has unidirectional conductivity, that is, the current passing through a diode can only move in one direction and cannot move in the opposite direction. That is, when a forward voltage is applied to the anode of the diode, the diode is turned on; when a reverse voltage is applied to the anode and cathode, the diode is cut off.
  • the Zener diode is a special surface-contact semiconductor silicon diode that has the function of stabilizing voltage. Capacitors can be used in circuits such as resonance, filtering, charging and discharging, and energy storage, and the voltage across the capacitor cannot suddenly change.
  • the capacitor When the power switch in the circuit is not closed, the capacitor is not charged; when the power switch is closed, the free electrons on the positive plate of the capacitor are attracted by the power supply and pushed to the negative plate. Therefore, the positive plate becomes positively charged due to the reduction of electrons, and the negative plate becomes negatively charged due to the gradual increase in the base. The two poles of the capacitor are positively charged. A potential difference is generated between the plates. When the power supply is cut off, the capacitor can still maintain the charging voltage.
  • the backlight chip by setting a stable voltage at the first input terminal Vboost, the backlight chip provides a PWM periodic voltage signal through the SW pin for the first boost unit to boost.
  • the voltage of the first input terminal Vboost is set to 5V, and the backlight chip provides a voltage signal through the SW pin.
  • the voltage at the first capacitor C1 and the second capacitor C2 changes, and the voltage at the output terminal of the circuit load changes, achieving a boosting effect and reducing the power loss of the backlight chip.
  • the voltage at Vboost is close to the DC voltage, that is, the 5V voltage of Vboost directly passes through the first diode D1 and the second diode D2 in sequence to reach the load, that is, to the LED connected in series, to power the LED, and to make the backlight source emit light; on the other hand, the first capacitor C1 and the second capacitor C2 are charged in sequence, and the voltage at the first capacitor C1 and the second capacitor C2 are both 5V.
  • the square wave of SW becomes 5V
  • the voltage of the first capacitor C1 becomes 10V.
  • the voltage at the first capacitor C1 charges the second capacitor C2 on the one hand, and the voltages at the first capacitor C1 and the second capacitor C2 are both 7.5V at this time. On the other hand, it reaches the load through the second diode D2.
  • the square wave of the voltage signal at SW is restored to 0V. Since the voltage at the first capacitor C1 is provided by the SW pin of the backlight chip, when the voltage at SW is 0, the voltage at the first capacitor C1 is lost. At this time, the voltage at the first capacitor C1 is only 2.5V.
  • the voltage at the second capacitor C2 Since the second end of the second capacitor C2 is connected to the first end of the second diode D2, according to the unidirectional conductivity of the diode, the voltage at the second capacitor C2 will not be lost and remain at 7.5V.
  • the voltage of the second capacitor C2 reaches the load and supplies power to the LED. Since the voltage at Vboost is a stable voltage, that is, the voltage of Vboost will charge the first capacitor C1, so that the voltage at the first capacitor C1 is restored to 5V.
  • the voltage of the second input terminal SW reaches 5V, and the voltage value of the negative plate of the first capacitor C1 is 10V.
  • the first capacitor C1 reaches the load through the second diode D2 to power the LED lamp, and charges the second capacitor C2 on the other hand.
  • the voltages at the first capacitor C1 and the second capacitor C2 are both 8.8V.
  • the voltage at the output terminal is the sum of the voltage value of the first input terminal Vboost and the voltage value of the second input terminal SW, that is, the voltage value of the output terminal is twice the voltage value of the first input terminal Vboost.
  • the hardware circuit achieves a double boost effect.
  • the voltage at the first diode D1 is a constant value
  • the first input terminal Vboost charges and discharges the first capacitor C1 so that the output terminal voltage is equal to twice the voltage of the first input terminal Vboost
  • the hardware circuit does not require the participation of the control signal of the backlight chip circuit, and realizes imperceptible boosting for the display screen or LED lamp, reduces backlight loss, and reduces production costs, as shown in Figure 5, which is a waveform diagram of the simulation result of the backlight circuit of this embodiment.
  • the embodiment of the present application conducts a comparative experiment by using the boost circuit of the prior art and the hardware circuit of the present application on the same hardware device.
  • 6 LED lights are connected to the boost circuit of the prior art and the hardware circuit of the present application.
  • the experimental results of the boost circuit of the prior art are shown in Table 1, and the experimental results of the hardware circuit of the embodiment of the present application are shown in Table 2.
  • the hardware circuit further includes a first inductor L1, a third diode D3, a third capacitor C3 and a fourth capacitor C4; wherein, a first end of the first inductor L1 is connected to a third input terminal Vin, and the third input terminal Vin is used to provide a voltage to the hardware circuit, and a second end of the first inductor L1 is connected to a first end of the third diode D3; a second end of the third diode D3 is connected to a first end of the first diode D1; a first end of the fourth capacitor C4 is respectively connected to a second end of the third diode D3 and a first end of the first diode D1, and a second end of the fourth capacitor C4 is grounded; a node of the first end of the fourth capacitor C4, the second end of the third diode D3 and the first end of the first diode D1 is the first input terminal Vboost; a first end of the third capacitor C3 is connected to
  • the fourth capacitor C4 is used to filter out the noise at Vboost, which can effectively improve the voltage stabilization effect of the circuit.
  • the backlight chip provides a voltage signal square wave to the hardware circuit through the SW pin.
  • the hardware circuit achieves a boosting effect by setting a stable voltage at the first input terminal Vboost and providing a PWM periodic voltage signal at the second input terminal SW.
  • the charging and discharging of the first capacitor C1 and the second capacitor C2 are utilized to enable the hardware circuit to achieve imperceptible boosting. There is no need to participate in the boosting process through the control signal of the backlight chip. At the same time, the boosting efficiency is improved and the power loss of the backlight chip is reduced.
  • the hardware circuit further includes a second inductor L2 and a fifth capacitor C5; a first end of the second inductor L2 is connected to a first end of the first inductor L1, and a second end of the second inductor L2 is connected to a first end of the third diode D3; a first end of the fifth capacitor C5 is respectively connected to the second input terminal SW and a first end of the second inductor L2, and a second end of the fifth capacitor C5 is grounded.
  • an inductor is to keep the current on both sides of it constant.
  • the inductor and the capacitor together form an LC filter circuit.
  • the inductor can suppress interference signals and obtain a purer DC current at the output end.
  • the second input terminal SW is connected to the SW pin of the backlight chip. After SW is turned on and before it is turned off, that is, there is a voltage turned on at the second input terminal SW, and the voltage across the fifth capacitor C5 is 0V at this time; during the SW shutdown process, that is, there is no voltage turned on at the second input terminal SW, combined with Figures 1 and 7, at this time, the voltage across the second input terminal SW changes. Since the voltage across the capacitor cannot change suddenly, the input terminal voltage charges the fifth capacitor C5 at this time, and the voltage across the SW is gradually increased, reducing the turn-off loss generated at the SW.
  • the second inductor L2 oscillates and discharges with the fifth capacitor C5, and discharges the fifth capacitor C5 before the next moment SW is turned on, so that the voltage across the fifth capacitor C5 is 0V, further reducing the backlight loss efficiency.
  • the increase The added second inductor L2 is used to discharge the fifth capacitor C5 before the SW is turned off, thereby avoiding excessive turn-off loss caused by a sudden change in voltage across the SW when the SW is turned off, thereby affecting the backlight loss efficiency.
  • the voltage at the output end is twice the voltage at the first input end Vboost
  • the first boost unit achieves a double boost effect through the first capacitor C1, the second capacitor C2, the first diode D1 and the second diode D2.
  • the fifth capacitor C5 and the second inductor L2 are used to reduce the turn-on and turn-off losses of SW, thereby improving the boost efficiency and further reducing the loss of the backlight circuit.
  • the hardware circuit further includes a feedback unit, and the feedback unit includes a first feedback circuit and a second feedback circuit; the first end of the first feedback circuit is respectively connected to the node of the second end of the third diode D3, the first end of the first diode D1 and the first end of the fourth capacitor C4, and the second end of the first feedback circuit is connected to a feedback end, and the feedback end is used to receive a feedback signal from the feedback unit; the first end of the second feedback circuit is respectively connected to the second end of the second diode D2 and the first end of the second capacitor C2, and the second end of the second feedback circuit is connected to the feedback end; wherein the first feedback circuit further includes a fourth diode D4, the first end of the fourth diode D4 is connected to the first end of the first feedback circuit, and the second end of the fourth diode D4 is connected to the feedback end.
  • the hardware circuit can be regarded as two parts, the circuit before the first end of the first feedback circuit can be regarded as the first part of the hardware circuit, and the circuit after the first end can be regarded as the second part of the hardware circuit.
  • the first feedback circuit can be understood as a near-end feedback circuit, which is used to respond to the first part of the circuit in advance and feed back the output voltage of the first part of the circuit to the backlight chip;
  • the second feedback circuit can be understood as a far-end feedback circuit, which is used to respond to the second part of the circuit and feed back the output voltage of the output end of the hardware circuit to the backlight chip through the feedback end.
  • the first feedback circuit and the second feedback circuit are used to speed up the response of the hardware circuit, stabilize the loop output of the hardware circuit, enable the first boost unit to quickly boost, achieve a double boost effect, reduce the boost time, and improve the boost efficiency, thereby reducing the power consumption of the backlight circuit.
  • the hardware circuit also includes at least one second boost unit cascaded with the first boost unit, and the second boost unit includes a fifth diode D5, a sixth diode D6, a first boost capacitor Cin and a first output capacitor Cout; wherein the first end of the fifth diode D5 is connected to the second end of the second diode D2, and the second end of the fifth diode D5 is connected to the first end of the sixth diode D6; the second end of the sixth diode D6 is the output end; the first end of the first boost capacitor Cin is respectively connected to the second end of the fifth diode D5 and the first end of the sixth diode D6, and the second end of the first boost capacitor Cin is connected to the second input end SW, and the second input end SW is used to provide voltage to the first boost unit and the second boost unit; the first end of the first output capacitor Cout is connected to the second end of the sixth diode D6, and the second end of the first output capacitor Cout is grounded.
  • the second boost unit includes a fifth dio
  • the hardware circuit can cascade multiple second boost units for hardware circuit boosting, improve boosting efficiency, and reduce production costs.
  • the fifth diode D5 has the same function as the first diode D1 of the first boost unit
  • the sixth diode D6 has the same function as the second diode D2 of the first boost unit
  • the first boost capacitor Cin has the same function as the first capacitor C1 of the first boost unit
  • the first output capacitor Cout has the same function as the second capacitor C2 of the first boost unit.
  • the specific working principle of the second boost unit is the same as that of the first boost unit, which will not be repeated here.
  • the first diode D1, the second diode D2, the third diode D3, the fourth diode D4 and the fifth diode D5 are all voltage regulators, which are used to make the voltage of the hardware circuit a stable voltage; the first inductor L1 and the second inductor L2 are fixed inductors, and the first inductor L1 and the second inductor L2 are used for one or more of filtering or resonance.
  • This embodiment also provides a computer storage medium, in which computer instructions are stored.
  • the computer instructions When the computer instructions are executed on an electronic device, the electronic device executes the above-mentioned related method steps to implement the camera function control method in the above-mentioned embodiment.
  • This embodiment also provides a computer program product.
  • the computer program product When the computer program product is run on a computer, the computer is caused to execute the above-mentioned related steps to implement the camera function control method in the above-mentioned embodiment.
  • an embodiment of the present application also provides a device, which may specifically be a chip, a component or a module, and the device may include a connected processor and a memory; wherein the memory is used to store computer-executable instructions, and when the device is running, the processor may execute the computer-executable instructions stored in the memory so that the chip executes the camera function control method in the above-mentioned method embodiments.
  • the electronic device, computer storage medium, computer program product or chip provided in this embodiment is used to execute the corresponding method provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding method provided above and will not be repeated here.
  • the disclosed devices and methods can be implemented in other ways.
  • the device embodiments described above are only schematic.
  • the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed.
  • Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.
  • the unit described as a separate component may or may not be physically separated, and the component shown as a unit may be one physical unit or multiple physical units, that is, it may be located in one place or distributed in multiple different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.
  • the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium.
  • the technical solution of the embodiment of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the methods of each embodiment of the present application.
  • the aforementioned storage medium includes: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and other media that can store program codes.

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Abstract

一种背光降功耗硬件电路，硬件电路包括第一升压单元，第一升压单元包括第一二极管（D1）、第二二极管（D2）、第一电容（C1）以及第二电容（C2）；第一二极管（D1）的第一端与第一输入端Vboost连接，第一二极管（D1）的第二端与第二二极管（D2）的第一端连接；第二二极管（D2）的第二端为输出端；第一电容（C1）的第一端分别与第一二极管（D1）的第二端和第二二极管（D2）的第一端连接；第一电容（C1）的第二端与第二输入端（SW）连接；第二电容（C2）的第一端与第二二极管（D2）的第二端连接，第二电容（C2）的第二端接地。通过第一升压单元使硬件电路达到二倍升压效果，实现对显示装置的无感知升压，降低硬件电路功耗，提高升压效率。

Description

一种背光降功耗硬件电路及装置
本申请要求于2022年10月18日提交国家知识产权局、申请号为202211274803.7、发明名称为“一种背光降功耗硬件电路及装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电路控制领域，尤其涉及一种背光降功耗硬件电路及装置。
背景技术
目前显示屏主要以LCD为主，而LCD本身不会发光，要想让LCD显示画面，就必须使用背光源，常见的背光源一般由数个LED灯组成，LED灯的个数由屏的尺寸决定。
随着LED光效的逐渐提高，LED具有很长的寿命，且其本身不含有对环境有很大破坏作用的Hg元素。由于LED的这些优点，其在显示屏背光源领域应用越来越广泛，但是由于LED灯在更多情况下需要串联设计，因此在背光芯片驱动器驱动电路进行倍压转换时，就存在两个问题：1、需要利用芯片进行控制，生产成本较高；2、倍压效率低，系统功率损耗较高。
在现有技术中，传统boost电路通过利用MOS管进行升压，该boost芯片电路如图1所示。在现有的boost升压电路中，boost芯片需要利用单片机控制其进行通断电，当MOS管导通时，Vin给电感L1充电，此时负载LED依靠Cout续流供电；当MOS断开时，电感L1左右两端电压极性突变，Vout＝Vin+VL-VD1，实现升压。
发明内容
本申请的主要目的在于提供一种背光降功耗硬件电路，旨在解决现有boost芯片在升压时倍压效率低导致功率损耗较高的技术问题。
为实现上述技术目的，本申请采用如下技术方案：
本申请公开了一种背光降功耗硬件电路，所述硬件电路包括第一升压单元，所述第一升压单元包括第一二极管D1、第二二极管D2、第一电容C1以及第二电容C2；
其中，所述第一二极管D1的第一端与第一输入端Vboost连接，所述第一输入端Vboost用于给所述第一升压单元提供电压，所述第一二极管D1的第二端与所述第二二极管D2的第一端连接；
所述第二二极管D2的第二端为输出端；
所述第一电容C1的第一端分别与第一二极管D1的第二端和第二二极管D2的第一端连接；所述第一电容C1的第二端与第二输入端SW连接，所述第二输入端SW用于给所述第一升压单元提供电压；
所述第二电容C2的第一端与所述第二二极管D2的第二端连接，所述第二电容C2的第二端接地。
在本发明的一实施方式中，所述硬件电路还包括第一电感L1、第三二极管D3、第 三电容C3以及第四电容C4；
其中，所述第一电感L1的第一端与第三输入端Vin连接，所述第三输入端Vin用于给所述硬件电路提供电压，所述第一电感L1的第二端与所述第三二极管D3的第一端连接；
所述第三二极管D3的第二端与所述第一二极管D1的第一端连接；
所述第四电容C4的第一端分别与第三二极管D3的第二端和第一二极管D1的第一端连接，所述第四电容C4的第二端接地；
所述第四电容C4的第一端、第三二极管D3的第二端以及第一二极管D1的第一端的节点处为所述第一输入端Vboost；
所述第三电容C3的第一端与所述第一电感L1的第二端连接，所述第三电容C3的第二端接地。
在本发明的一实施方式中，所述硬件电路还包括第二电感L2以及第五电容C5；
所述第二电感L2的第一端连接于所述第一电感L1的第一端，所述第二电感L2的第二端与所述第三二极管D3的第一端连接；
所述第五电容C5的第一端分别与所述第二输入端SW和第二电感L2的第一端连接，所述第五电容C5的第二端接地。
在本发明的一实施方式中，所述第一电感L1和第二电感L2是固定电感，所述第一电感L1和所述第二电感L2用于滤波或者谐振中的一种或多种。
在本发明的一实施方式中，所述硬件电路还包括反馈单元，所述反馈单元包括第一反馈电路和第二反馈电路；
所述第一反馈电路的第一端分别与所述第三二极管D3的第二端、第一二极管D1的第一端以及第四电容C4的第一端的节点处连接，所述第一反馈电路的第二端连接反馈端，所述反馈端用于接收所述反馈单元的反馈信号；
所述第二反馈电路的第一端分别与第二二极管D2的第二端以及第二电容C2的第一端连接，所述第二反馈电路的第二端连接所述反馈端；
其中，所述第一反馈电路还包括第四二极管D4，所述第四二极管D4的第一端与所述第一反馈电路的第一端连接，所述第四二极管D4的第二端与所述反馈端连接。
在本发明的一实施方式中，所述硬件电路还包括至少一个与所述第一升压单元级联的第二升压单元，所述第二升压单元包括第五二极管D5、第六二极管D6、第一升压电容Cin以及第一输出电容Cout；
其中，所述第五二极管D5的第一端与第二二极管D2的第二端连接，所述第五二极管D5的第二端与第六二极管D6的第一端连接；
所述第六二极管D6的第二端为输出端；
所述第一升压电容Cin的第一端分别与所述第五二极管D5的第二端和第六二极管D6的第一端连接，所述第一升压电容Cin的第二端与所述第二输入端SW连接，所述第二输入端SW用于给第一升压单元和第二升压单元提供电压；
所述第一输出电容Cout的第一端与所述第六二极管D6的第二端连接，所述第一输出电容Cout的第二端接地。
本发明还提供一种基于上述任一所述的背光降功耗硬件装置，所述硬件装置包括：
硬件电路，所述硬件电路包括第一升压单元；
背光芯片，所述背光芯片与所述第一升压单元连接，所述背光芯片为所述第一升压单元提供PWM周期电压信号；
显示装置，所述显示装置通过硬件电路提供光源进行显示。
在本发明的一实施方式中，所述背光芯片的SW引脚与所述硬件电路的第二输入端SW连接。
在本发明的一实施方式中，所示硬件装置还包括背光芯片的反馈引脚FB与所述反馈单元的反馈端连接。
在本发明的一实施方式中，所述硬件电路还包括至少一个第二升压单元，所述第二升压单元与所述第一升压单元级联。
本申请提供的背光降功耗硬件电路相比于传统的背光电路，通过第一升压单元使硬件电路达到二倍升压效果，利用第一输入端Vboost和第二输入端SW对第一升压单元提供电压，从而实现对显示装置的无感知升压，并且不需要对背光芯片的控制信号参与升压过程，降低硬件电路功耗，提高升压效率，降低生产成本。
附图说明
图1为现有背光电路的芯片电路图；
图2为本申请实施例提供的一种背光降功耗硬件电路的芯片电路图；
图3为本申请实施例提供的一种背光降功耗硬件电路的电路原理图一；
图4为图3电路图的时序图；
图5是图3电路原理图的仿真波形图；
图6是本申请实施例提供的一种背光降功耗硬件电路的电路原理图二；
图7是本申请实施例提供的一种背光降功耗硬件电路的电路原理图三；
图8是本申请实施例提供的一种背光降功耗硬件电路的电路原理图四；
图9是本申请实施例提供的一种背光降功耗硬件电路的电路原理图五。
具体实施方式
为了使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请作进一步地描述。
本申请的说明书、权利要求书及附图中的术语“第一”和“第二”等仅用于区别不同对象，而不是用于描述特定顺序。此外，术语“包括”和“具有”以及它们的任何变形，意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、系统、产品或设备等，没有限定于已列出的步骤或单元，而是可选地还包括没有列出的步骤或单元等，或可选地还包括对于这些过程、方法、产品或设备等固有的其它步骤或单元。
在本申请中提及的“实施例”意味着，结合实施例描述的特定特征、结构或特性可以包含在本申请的至少一个实施例中。在说明书中的各个位置出现该短语并不一定均是指相同的实施例，也不是与其它实施例互斥的独立的或备选的实施例。本领域技术人员可以显式地和隐式地理解的是，本申请描述的实施例可以与其它实施例相结合。
在本申请中，“至少一个(项)”是指一个或者多个，“多个”是指两个或两个以上，“至少两个(项)”是指两个或三个及三个以上，“和/或”，用于描述关联对 象的关联关系，表示可以存在三种关系，例如，“A和/或B”可以表示：只存在A，只存在B以及同时存在A和B三种情况，其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达，是指这些项中的任意组合。例如，a，b或c中的至少一项(个)，可以表示：a，b，c，“a和b”，“a和c”，“b和c”，或“a和b和c”。
在本申请实施例中，背光降功耗硬件电路可以适用于电子设备上，可以理解的是，该电子设备可以是手机、穿戴式设备、平板电脑、带无线收发功能的电脑、虚拟现实(virtual reality，VR)终端设备、增强现实(augmented reality，AR)终端设备等等，在此不做具体限定。
实施例一
本申请提供了一种基于上述任一所述的背光降功耗硬件装置，如图2所示，图2是本申请一实施例提供的硬件装置电路图，硬件装置包括硬件电路、背光芯片和显示装置，硬件电路包括第一升压单元，背光芯片与第一升压单元连接，背光芯片为第一升压单元提供PWM周期电压信号；显示装置通过硬件电路提供光源进行显示。
作为本领域技术人员可以理解地，显示屏包括显示面板。显示面板可以采用液晶显示屏(liquid crystal display，LCD)，有机发光二极管(organic light-emittingdiode，OLED)，有源矩阵有机发光二极体或主动矩阵有机发光二极体(active-matrixorganic light emitting diode的，AMOLED)，柔性发光二极管(flex light-emittingdiode，FLED)，Miniled，MicroLed，Micro-oLed，量子点发光二极管(quantum dot lightemitting diodes，QLED)等。在一些实施例中，电子设备可以包括1个或N个显示屏，N为大于1的正整数。
在本申请的进一步实施例中，背光芯片的SW引脚与硬件电路的第二输入端SW连接，反馈引脚FB与反馈单元的反馈端连接。
实施例二
如图3所示，图3是本申请实施例提供的一种背光降功耗硬件电路，所述第一升压单元包括第一二极管D1、第二二极管D2、第一电容C1以及第二电容C2；其中，所述第一二极管D1的第一端与第一输入端Vboost连接，所述第一输入端Vboost用于给所述第一升压单元提供电压，所述第一二极管D1的第二端与所述第二二极管D2的第一端连接；所述第二二极管D2的第二端为输出端；所述第一二极管D1的第二端与第二二极管D2的第一端连接；所述第一电容C1的第二端与第二输入端SW连接，所述第二输入端SW用于给所述第一升压单元提供电压；所述第二电容C2的第一端与所述第二二极管D2的第二端连接，所述第二电容C2的第二端接地。
作为本领域技术人员可以理解地，二极管具有单向导电性，即通过二极管的电流只能朝一个方向运动，电流不能反向运动。即给二极管阳极加上正向电压时，二极管导通；当给阳极和阴极加上反向电压时，二极管截止。而稳压管是一种特殊的面接触型半导体硅二极管，具有稳定电压的作用。电容可用于谐振、滤波、充放电以及储能等电路中，且电容两端电压不能进行突变，当电路中的电源开关未合上时，电容不带电；当电源开关合上时，电容正极板上的自由电子被电源吸引，并推送到负极板上，因此正极板因电子减少而带上正电，负极板因底子逐渐增加而带上负电，电容两个极 板之间产生电位差，此时将电源切断，电容仍能保持充电电压。
如图4所示，具体地，结合本实例，通过在第一输入端Vboost设置稳定电压，背光芯片通过SW引脚提供PWM周期电压信号用于第一升压单元进行升压。可选的，第一输入端Vboost的电压设置为5V，背光芯片通过SW引脚提供电压信号，此时第一电容C1、第二电容C2处的电压发生变化，则电路负载输出端电压发生变化，达到升压效果，降低背光芯片功率损耗。具体的，在T1时刻，第二输入端SW处的电压信号为0V时，此时Vboost处的电压接近于直流电压，即Vboost的5V电压一方面直接依次通过第一二极管D1和第二二极管D2到达负载，即到达串联的LED处，给LED供电，使背光源发光；另一方面依次给第一电容C1和第二电容C2进行充电，此时第一电容C1和第二电容C2处的电压均为5V。在T2开始时刻，SW处方波变为5V，则第一电容C1的电压变为10V，在T2结束时刻，第一电容C1处的电压一方面给第二电容C2进行充电，此时第一电容C1和第二电容C2处的电压均为7.5V，另一方面通过第二二极管D2到达负载。在T3开始时刻，SW处的电压信号方波恢复到0V，由于第一电容C1处的电压是由背光芯片的SW引脚提供，当SW处电压为0时，则第一电容C1处的电压损失，此时第一电容C1处的电压只剩2.5V，而第二电容C2第二端由于与第二二极管D2的第一端进行连接，根据二极管具有单向导电性，第二电容C2处的电压不会发生损失，保持在7.5V，在T3结束时刻，此时第二电容C2的电压到达负载，给LED供电，由于Vboost处的电压是稳定电压，即Vboost的电压会给第一电容C1进行充电，使第一电容C1处的电压恢复至5V。在T4开始时刻，第二输入端SW的电压达到5V，此时第一电容C1的负极板电压值为10V，此时第一电容C1一方面通过第二二极管D2到达负载，给LED灯供电，另一方面给第二电容C2进行充电，则在T4结束时刻第一电容C1和第二电容C2处的电压均为8.8V。当第二输入端SW的电压在下一时刻恢复至0V，则第一电容C1和第二电容C2重复上述工作状态，直至第二电容C2处的电压值达到10V，则此时输出端的电压为第一输入端Vboost电压值与第二输入端SW电压值相加，即输出端的电压值为第一输入端Vboost电压值的两倍，此时硬件电路达到二倍升压效果。
在本申请实施例的实施方案中，第一二极管D1处电压为恒定值，第一输入端Vboost通过对第一电容C1进行充电和放电，使得输出端电压等于2倍的第一输入端Vboost的电压，并且在升压过程中，硬件电路不需要背光芯片电路的控制信号参与，对显示屏或者LED灯实现无感知升压，降低背光损耗，同时降低生产成本，如图5所示，图5是本实施例的背光电路的仿真结果波形图。
本申请实施例通过在相同的硬件装置上采用现有技术的升压电路与本申请的硬件电路进行对比实验，在本实施例的对比实验中现有技术的升压电路与本申请的硬件电路中均连接6个LED灯，现有技术升压电路的实验结果见表1，本申请实施例硬件电路的实验结果见表2。
表1

表2

实施例三
如图6所示，硬件电路还包括第一电感L1、第三二极管D3、第三电容C3以及第四电容C4；其中，所述第一电感L1的第一端与第三输入端Vin连接，所述第三输入端Vin用于给所述硬件电路提供电压，所述第一电感L1的第二端与所述第三二极管D3的第一端连接；所述第三二极管D3的第二端与所述第一二极管D1的第一端连接；所述第四电容C4的第一端分别与第三二极管D3的第二端和第一二极管D1的第一端连接，所述第四电容C4的第二端接地；所述第四电容C4的第一端、第三二极管D3的第二端以及第一二极管D1的第一端的节点处为所述第一输入端Vboost；所述第三电容C3的第一端与所述第一电感L1的第二端连接，所述第三电容C3的第二端接地。
在本申请实施例中，第四电容C4用于滤除Vboost处的噪声，能够有效提高电路的稳压效果，背光芯片通过SW引脚给硬件电路提供电压信号方波，通过在第一输入端Vboost设置稳定电压以及在第二输入端SW提供PWM周期电压信号使硬件电路达到升压效果，利用第一电容C1和第二电容C2的充电以及放电，使硬件电路实现无感知升压，无需通过背光芯片的控制信号参与升压过程，同时提高升压效率，降低背光芯片的功率损耗。
实施例四
如图7所示，所述硬件电路还包括第二电感L2以及第五电容C5；所述第二电感L2的第一端连接于所述第一电感L1的第一端，所述第二电感L2的第二端与所述第三二极管D3的第一端连接；所述第五电容C5的第一端分别与所述第二输入端SW和第二电感L2的第一端连接，所述第五电容C5的第二端接地。
作为本领域技术人员可以理解地，电感的特性是保持其两边的电流大小不变，电感与电容一起组成LC滤波电路，电感可以起到抑制干扰信号的作用，使输出端获得较纯净的直流电流。
具体地，结合本实施例，第二输入端SW与背光芯片的SW引脚连接，在SW导通之后，关断之前，即第二输入端SW处有电压导通，此时第五电容C5两端的电压为0V；在SW关断过程中，即第二输入端SW处没有电压导通，结合图1和图7所示，此时第二输入端SW两端的电压产生变化，由于电容两端的电压不能突变，此时输入端电压给第五电容C5进行充电，则SW处两端的电压逐步提升，减小SW处产生的关断损耗，此时第二电感L2与第五电容C5一起振荡放电，在下一时刻SW导通之前对第五电容C5进行放电，使第五电容C5两端电压为0V，进一步降低背光损耗效率。本实施例中增 加的第二电感L2用于在SW关断前给第五电容C5进行放电，因此避免了当SW关断时，SW两端的电压突变导致关断损耗过高，从而影响背光损耗效率。
在本申请实施例中，输出端的电压为第一输入端Vboost处电压的两倍，第一升压单元通过第一电容C1、第二电容C2、第一二极管D1以及第二二极管D2实现二倍升压效果，同时通过第五电容C5以及第二电感L2降低SW的开启和关断损耗，提高升压效率，从而进一步降低背光电路的损耗。
实施例五
如图8所示，硬件电路还包括反馈单元，所述反馈单元包括第一反馈电路和第二反馈电路；所述第一反馈电路的第一端分别与所述第三二极管D3的第二端、第一二极管D1的第一端以及第四电容C4的第一端的节点处连接，所述第一反馈电路的第二端连接反馈端，所述反馈端用于接收所述反馈单元的反馈信号；所述第二反馈电路的第一端分别与第二二极管D2的第二端以及第二电容C2的第一端连接，所述第二反馈电路的第二端连接所述反馈端；其中，所述第一反馈电路还包括第四二极管D4，所述第四二极管D4的第一端与所述第一反馈电路的第一端连接，所述第四二极管D4的第二端与所述反馈端连接。
作为本领域技术人员可以理解地，可以将硬件电路看作两个部分，将第一反馈电路的第一端之前的电路看作是硬件电路的第一部分，将第一端之后的电路看作是硬件电路的第二部分。第一反馈电路可以理解为近端反馈电路，用于提前响应第一部分电路，将第一部分电路的输出电压反馈回背光芯片；第二反馈电路可以理解为远端反馈电路，用于响应第二部分电路，将硬件电路输出端的输出电压反馈通过反馈端反馈回背光芯片，第一反馈电路和第二反馈电路用于加快硬件电路响应，稳定硬件电路的环路输出，能够使第一升压单元快速升压，达到二倍升压效果，减少升压时间，提高升压效率，从而降低背光电路的功耗。
实施例六
如图9所示，硬件电路还包括至少一个与所述第一升压单元级联的第二升压单元，所述第二升压单元包括第五二极管D5、第六二极管D6、第一升压电容Cin以及第一输出电容Cout；其中，所述第五二极管D5的第一端与第二二极管D2的第二端连接，所述第五二极管D5的第二端与第六二极管D6的第一端连接；所述第六二极管D6的第二端为输出端；所述第一升压电容Cin的第一端分别与所述第五二极管D5的第二端和第六二极管D6的第一端连接，所述第一升压电容Cin的第二端与所述第二输入端SW连接，所述第二输入端SW用于给第一升压单元和第二升压单元提供电压；所述第一输出电容Cout的第一端与所述第六二极管D6的第二端连接，所述第一输出电容Cout的第二端接地。
具体地，硬件电路可以级联多个第二升压单元用于硬件电路升压，提高升压效率，并降低生产成本。在第二升压单元中，第五二极管D5和第一升压单元的第一二极管D1的作用相同，第六二极管D6与第一升压单元的第二二极管D2作用相同，第一升压电容Cin与第一升压单元的第一电容C1作用相同，第一输出电容Cout与第一升压单元的第二电容C2作用相同。第二升压单元的具体工作原理和第一升压单元的工作原理相同，在此不再赘述。硬件电路级联一个第二升压单元时，硬件电路可以达到4倍升 压效果，降低硬件电路功耗。
在本申请的实施例中，所述第一二极管D1、第二二极管D2、第三二极管D3、第四二极管D4和所述第五二极管D5均是稳压管，用于使硬件电路的电压成为稳定电压；所述第一电感L1和第二电感L2是固定电感，所述第一电感L1和所述第二电感L2用于滤波或者谐振中的一种或多种。
本实施例还提供一种计算机存储介质，该计算机存储介质中存储有计算机指令，当该计算机指令在电子设备上运行时，使得电子设备执行上述相关方法步骤实现上述实施例中的相机功能控制方法。
本实施例还提供了一种计算机程序产品，当该计算机程序产品在计算机上运行时，使得计算机执行上述相关步骤，以实现上述实施例中的相机功能控制方法。
另外，本申请的实施例还提供一种装置，这个装置具体可以是芯片，组件或模块，该装置可包括相连的处理器和存储器；其中，存储器用于存储计算机执行指令，当装置运行时，处理器可执行存储器存储的计算机执行指令，以使芯片执行上述各方法实施例中的相机功能控制方法。
其中，本实施例提供的电子设备、计算机存储介质、计算机程序产品或芯片均用于执行上文所提供的对应的方法，因此，其所能达到的有益效果可参考上文所提供的对应的方法中的有益效果，此处不再赘述。
通过以上的实施方式的描述，所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成，即将装置的内部结构划分成不同的功能模块，以完成以上描述的全部或者部分功能。
在本申请所提供的几个实施例中，应该理解到，所揭露的装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，该模块或单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个装置，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
该作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是一个物理单元或多个物理单元，即可以位于一个地方，或者也可以分布到多个不同地方。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
该集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个可读取存储介质中。基于这样的理解，本申请实施例的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该软件产品存储在一个存储介质中，包括若干指令用以使得一个设备(可以是单片机，芯片等)或处理器(processor)执行本申请各个实施例方法的全部或部 分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
本说明书只为简要说明本申请电路方案的原理性架构，本领域内其他明显等同的变换方式也在本发明的保护范围之内，例如提高Vboost处的稳定电压；在电路的输出端级联多组第二升压单元以提高升压效果等。
最后应说明的是，以上实施例仅用以说明本申请的技术方案而非限制，尽管参照较佳实施例对本申请进行了详细说明，本领域的普通技术人员应当理解，可以对本申请的技术方案进行修改或等同替换，而不脱离本申请技术方案的精神和范围。

Claims (10)

  1. 一种背光降功耗硬件电路，其特征在于，所述硬件电路包括第一升压单元，所述第一升压单元包括第一二极管D1、第二二极管D2、第一电容C1以及第二电容C2；
    其中，所述第一二极管D1的第一端与第一输入端Vboost连接，所述第一输入端Vboost用于给所述第一升压单元提供电压，所述第一二极管D1的第二端与所述第二二极管D2的第一端连接；
    所述第二二极管D2的第二端为输出端；
    所述第一电容C1的第一端分别与第一二极管D1的第二端和第二二极管D2的第一端连接；所述第一电容C1的第二端与第二输入端SW连接，所述第二输入端SW用于给所述第一升压单元提供电压；
    所述第二电容C2的第一端与所述第二二极管D2的第二端连接，所述第二电容C2的第二端接地。
  2. 根据权利要求1所述的一种背光降功耗硬件电路，其特征在于，所述硬件电路还包括第一电感L1、第三二极管D3、第三电容C3以及第四电容C4；
    其中，所述第一电感L1的第一端与第三输入端Vin连接，所述第三输入端Vin用于给所述硬件电路提供电压，所述第一电感L1的第二端与所述第三二极管D3的第一端连接；
    所述第三二极管D3的第二端与所述第一二极管D1的第一端连接；
    所述第四电容C4的第一端分别与第三二极管D3的第二端和第一二极管D1的第一端连接，所述第四电容C4的第二端接地；
    所述第四电容C4的第一端、第三二极管D3的第二端以及第一二极管D1的第一端的节点处为所述第一输入端Vboost；
    所述第三电容C3的第一端与所述第一电感L1的第二端连接，所述第三电容C3的第二端接地。
  3. 根据权利要求2所述的一种背光降功耗硬件电路，其特征在于，所述硬件电路还包括第二电感L2以及第五电容C5；
    所述第二电感L2的第一端连接于所述第一电感L1的第二端，所述第二电感L2的第二端与所述第三二极管D3的第一端连接；
    所述第五电容C5的第一端分别与所述第二输入端SW和第二电感L2的第一端连接，所述第五电容C5的第二端接地。
  4. 根据权利要求3所述的一种背光降功耗硬件电路，其特征在于，所述第一电感L1和第二电感L2是固定电感，所述第一电感L1和所述第二电感L2用于滤波或者谐振中的一种或多种。
  5. 根据权利要求2所述的一种背光降功耗硬件电路，其特征在于，所述硬件电路还包括反馈单元，所述反馈单元包括第一反馈电路和第二反馈电路；
    所述第一反馈电路的第一端分别与所述第三二极管D3的第二端、第一二极管D1的第一端以及第四电容C4的第一端的节点处连接，所述第一反馈电路的第二端连接反馈端，所述反馈端用于接收所述反馈单元的反馈信号；
    所述第二反馈电路的第一端分别与第二二极管D2的第二端以及第二电容C2的第 一端连接，所述第二反馈电路的第二端连接所述反馈端；
    其中，所述第一反馈电路还包括第四二极管D4，所述第四二极管D4的第一端与所述第一反馈电路的第一端连接，所述第四二极管D4的第二端与所述反馈端连接。
  6. 根据权利要求1所述的一种背光降功耗硬件电路，其特征在于，所述硬件电路还包括至少一个与所述第一升压单元级联的第二升压单元，所述第二升压单元包括第五二极管D5、第六二极管D6、第一升压电容Cin以及第一输出电容Cout；
    其中，所述第五二极管D5的第一端与第二二极管D2的第二端连接，所述第五二极管D5的第二端与第六二极管D6的第一端连接；
    所述第六二极管D6的第二端为输出端；
    所述第一升压电容Cin的第一端分别与所述第五二极管D5的第二端和第六二极管D6的第一端连接，所述第一升压电容Cin的第二端与所述第二输入端SW连接，所述第二输入端SW用于给第一升压单元和第二升压单元提供电压；
    所述第一输出电容Cout的第一端与所述第六二极管D6的第二端连接，所述第一输出电容Cout的第二端接地。
  7. 一种基于权利要求1-6任一所述的背光降功耗硬件装置，其特征在于，所述硬件装置包括：
    硬件电路，所述硬件电路包括第一升压单元；
    背光芯片，所述背光芯片与所述第一升压单元连接，所述背光芯片为所述第一升压单元提供PWM周期电压信号；
    显示装置，所述显示装置通过硬件电路提供光源进行显示。
  8. 根据权利要求7所述的一种背光降功耗硬件装置，其特征在于，所述背光芯片的SW引脚与所述硬件电路的第二输入端SW连接。
  9. 根据权利要求7所述的一种背光降功耗硬件装置，其特征在于，所示硬件装置还包括背光芯片的反馈引脚FB与所述反馈单元的反馈端连接。
  10. 根据权利要求7所述的一种背光降功耗硬件装置，其特征在于，所述硬件电路还包括至少一个第二升压单元，所述第二升压单元与所述第一升压单元级联。
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