WO2024067031A1 - 一种电源切换电路及电子设备 - Google Patents

一种电源切换电路及电子设备 Download PDF

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Publication number
WO2024067031A1
WO2024067031A1 PCT/CN2023/117841 CN2023117841W WO2024067031A1 WO 2024067031 A1 WO2024067031 A1 WO 2024067031A1 CN 2023117841 W CN2023117841 W CN 2023117841W WO 2024067031 A1 WO2024067031 A1 WO 2024067031A1
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Prior art keywords
chip
buck
coupled
switch tube
switch
Prior art date
Application number
PCT/CN2023/117841
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English (en)
French (fr)
Inventor
蒋华熔
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荣耀终端有限公司
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Publication of WO2024067031A1 publication Critical patent/WO2024067031A1/zh

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/1566—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Definitions

  • the present application example relates to the field of circuit technology, and in particular to a power switching circuit and an electronic device.
  • a voltage converter (regulator) is required to convert the voltage of the power source (such as a battery) into the required operating voltage.
  • the most commonly used voltage converter is the DCDC converter (DCDC means “DC voltage to DC voltage", but the industry currently uses DCDC to describe switching power supplies).
  • the DCDC converter can achieve buck, boost, and buck-boost according to its topology.
  • the DCDC converter that performs the buck function is usually called a BUCK-type DCDC.
  • Buck type DCDC has the advantage of high conversion efficiency.
  • the quiescent current of buck (the current flowing through the ground pin when no load) is large, which easily causes power loss. Therefore, for mobile electronic devices that always require better battery life, excessive quiescent current is not good.
  • LDO low dropout linear regulator
  • LDO In the shutdown state, since the system is in light load mode, LDO is generally used for power supply to reduce system power consumption. However, if LDO is still used for power supply in the startup state, since the system is in a relatively heavy load mode, the efficiency of LDO is too low, which will cause serious heating of the device. Generally, BUCK type DCDC power supply is required. Therefore, how to efficiently power the laptop from the shutdown state to the startup state has become an urgent problem to be solved.
  • the present application provides a power switching circuit and an electronic device, which can select a suitable power supply system for power supply according to the different working states of a laptop computer.
  • a low-power power supply system is provided for the laptop computer to improve its battery life;
  • a high-efficiency power supply system is provided for it to ensure its normal operation and improve the working efficiency of the system.
  • the present application provides a power switching circuit, which is applied to a laptop computer and includes a system power supply, a BUCK power supply system, an LDO power supply system, and a power management chip.
  • the LDO power supply system includes an LDO chip and a first switch circuit, the LDO chip is coupled to the system power supply, the LDO chip is in a working state, and the power management chip is coupled to the LDO chip through the first switch circuit.
  • the BUCK power supply system includes a BUCK The BUCK chip is coupled to the system power supply, the power management chip is coupled to the BUCK chip through the second switch circuit, and the power management chip controls the state of the BUCK chip.
  • the first switch circuit and the second switch circuit are both coupled to the BUCK chip, and the BUCK chip controls one of the first switch circuit and the second switch circuit to be in the on state.
  • a suitable power supply system can be selected to power laptop computers in different states, such as using an LDO power supply system to supply power in the shutdown state to improve the battery life of the laptop computer, and using a BUCK power supply system to supply power in the startup state to improve the power supply efficiency of the laptop computer.
  • an LDO power supply system to supply power in the shutdown state to improve the battery life of the laptop computer
  • a BUCK power supply system to supply power in the startup state to improve the power supply efficiency of the laptop computer.
  • the state of the BUCK chip includes a working state and a non-working state.
  • the first switch circuit is in the on state
  • the second switch circuit is in the off state.
  • the BUCK chip is in the working state
  • the first switch circuit is in the off state
  • the second switch circuit is in the on state.
  • the circuit structure is simple, and no additional control elements are needed.
  • the first switch circuit includes a first switch tube, a control end of the first switch tube is coupled to a BUCK chip, and the BUCK chip controls a connection state of the first switch tube.
  • One end of a switch path of the first switch tube is coupled to the LDO chip, and the other end is coupled to the power management chip.
  • the on and off of the first switch circuit is controlled by setting the on and off of the first switch tube.
  • the circuit structure is simple, and the first switch tube can be an electronic switch device such as a field effect tube or a triode, which is low in cost.
  • the second switch circuit includes a second switch tube and a third switch tube, the control end of the second switch tube is coupled to the BUCK chip, and the BUCK chip controls the connection state of the second switch tube.
  • the control end of the third switch tube is coupled to the switch path of the second switch tube, and the connection state of the second switch tube controls the connection state of the third switch tube.
  • One end of the switch path of the third switch tube is coupled to the BUCK chip, and the other end is coupled to the power management chip.
  • the second switch circuit is controlled to be turned on and off by setting a combination of the second switch tube and the third switch tube.
  • the circuit structure is simple, and the second switch tube and the third switch tube can be electronic switch devices such as field effect tubes and triodes, which are low-cost.
  • the first switch tube is a P-MOS tube
  • the source of the first switch tube is coupled to the output pin of the LDO chip
  • the drain of the first switch tube is coupled to the power management chip
  • the gate of the first switch tube is coupled to the power normal indication pin of the BUCK chip.
  • the second switch tube is an N-MOS tube
  • the third switch tube is a P-MOS tube.
  • the drain and source of the second switch tube are coupled to the system power supply and the reference ground potential respectively, and the gate of the second switch tube is coupled to the power normal indication pin of the BUCK chip.
  • the source of the third switch tube is coupled to the BUCK chip.
  • the output pin of the third switch tube is coupled, the drain of the third switch tube is coupled to the power management chip, and the gate of the third switch tube is coupled to the drain of the second switch tube.
  • a sensor is further included, and the sensor is used to detect the opening and closing of the computer.
  • the sensor is coupled to the first switch circuit and the second switch circuit, and the sensor is coupled to the power management chip to send a detection signal to the power management chip.
  • the opening and closing state of the laptop can be detected to determine whether the laptop is in the shutdown state or in the on state, so as to select the corresponding power supply system to power the laptop according to the detection result.
  • the source management chip sends a control signal to the BUCK chip according to the detection signal sent by the sensor.
  • the control signal is a low-level signal
  • the BUCK chip is controlled to be in a non-working state.
  • the control signal is a high-level signal
  • the BUCK chip is controlled to be in a working state.
  • This design method shows an implementation method for controlling the state of the BUCK chip.
  • the present application provides an electronic device, which is a laptop computer.
  • the laptop computer includes the power switching circuit described in the first aspect and any possible design thereof.
  • beneficial effects that can be achieved by the electronic device described in the second aspect provided above can refer to the beneficial effects in the first aspect and any possible design method thereof, and will not be repeated here.
  • FIG1 is a circuit diagram of a power switching circuit provided in an embodiment of the present application.
  • FIG. 2 is a power switching timing diagram provided in an embodiment of the present application.
  • words such as “exemplary” or “for example” are used to indicate examples, illustrations or descriptions. Any embodiment or design described as “exemplary” or “for example” in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as “exemplary” or “for example” is intended to present related concepts in a specific way.
  • first and second are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features.
  • a feature defined as “first” or “second” may explicitly or implicitly include one or more of the features.
  • At least one means one or more, and “more than one” means two or more.
  • At least one of the following” or similar expressions refers to any combination of these items, including any combination of single or plural items.
  • at least one of a, b, or c can mean: a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, c can be single or multiple.
  • connection should be understood in a broad sense.
  • connection can be a fixed connection, a sliding connection, a detachable connection, or an integral connection, etc.; it can be a direct connection or an indirect connection through an intermediate medium.
  • the technical solution of the present application is mainly applied to laptop computers or products similar to laptop computers.
  • the upper cover with the display screen is generally separated from the body and maintained at a certain angle.
  • the upper cover is generally buckled onto the body to reduce space occupation.
  • a laptop computer is taken as an example to introduce the power switching circuit.
  • a traditional laptop computer After the upper cover is buckled with the body, the computer is generally in a shutdown state. When the upper cover is reopened, the user may need to restart the computer, which is troublesome. In order to improve the user experience of the laptop computer, it is necessary to realize the function of automatically turning on the laptop computer when the cover is opened. Therefore, when the upper cover is buckled with the body, the laptop computer needs to be kept powered.
  • a Hall sensor In order to detect whether the laptop computer has been opened, a Hall sensor is generally installed in the upper cover and body of the laptop computer to monitor the opening action of the laptop computer. The use of Hall sensors to detect whether the laptop computer is opened belongs to the prior art and will not be elaborated in this application.
  • a low-power power supply system can be used, generally an LDO power supply system.
  • LDO power supply system When the laptop is opened, each system operates normally, and the laptop is in a relatively heavy load mode. At this time, the working current is large. If the LDO system is continued to be used for power supply, the conversion efficiency of the LDO power supply system is too low, which can easily cause serious heating of the device. Therefore, when the laptop is opened, the BUCK power supply system is generally used for power supply to improve the working efficiency of the laptop when it is turned on.
  • a set of power supply systems is generally used to power a laptop computer, for example, only a BUCK power supply system is used to power the laptop computer, that is, when the laptop computer is turned on, the BUCK power supply system is used to power the laptop computer. It is impossible to realize the function of continuing to power the laptop computer after the upper cover is closed, and automatically turning on the laptop computer when the cover is opened, and switching the power supply system to the BUCK power supply system.
  • the embodiments of the present application Provided is a power switching circuit and electronic device, which use different power supply systems to power a laptop computer in different working modes, and synchronously switch the power supply system of the laptop computer when the laptop computer switches working modes, so that the laptop computer has the most efficient power supply system to power it in different working modes.
  • the embodiment of the present application is described below in conjunction with FIG1 and FIG2.
  • the control circuit of the embodiment of the present application includes a system power supply, a power management chip, a BUCK power supply system, and an LDO power supply system.
  • a Hall sensor is connected to the power management chip, and the Hall sensor detects the opening and closing of the laptop computer, and sends the detection signal to the power management chip, and the power management chip generates a control signal according to the detection signal received by the Hall sensor.
  • the input ends of the BUCK power supply system and the LDO power supply system are respectively connected to the system power supply of the laptop computer, and the input ends of the BUCK power supply system and the LDO power supply system are respectively electrically connected to the power management chip and the Hall sensor, so as to power the power management chip and the Hall sensor.
  • the LDO power supply system includes an LDO chip and a first switch circuit, the LDO chip is electrically connected to the system power supply, the first end of the first switch circuit is electrically connected to the LDO chip, and the second end of the first switch circuit is electrically connected to the power management chip and the Hall sensor respectively.
  • the BUCK power supply system includes a BUCK chip and a second switch circuit, the BUCK chip is electrically connected to the system power supply, the first end of the second switch circuit is electrically connected to the BUCK chip, and the second end of the second switch circuit is electrically connected to the power management chip and the Hall sensor respectively.
  • the control ends of the first switch circuit and the second switch circuit are both electrically connected to the BUCK chip, and the control signal output by the BUCK chip can control the on/off of the first switch circuit and the second switch circuit.
  • the first switch circuit and the second switch circuit will not be in the on/off state at the same time. Generally, when the first switch circuit is in the on state, the second switch circuit is in the off state; when the first switch circuit is in the off state, the second switch circuit is in the on state.
  • switching can be performed between the BUCK power supply system and the LDO power supply system, so that the power management chip and the Hall sensor can be powered by different power supply systems.
  • the LDO chip includes an input pin (I), an output pin (O), and an enable pin (EN)
  • the BUCK chip includes an input pin (I), an output pin (O), an enable pin (EN), and a power good indication pin (Power Good, PG).
  • the PG pin of the BUCK chip is coupled to the power output by the output pin of the BUCK chip through the first pull-up resistor R1.
  • the first switch circuit includes a first switch tube Q1 and a first pull-up resistor R1
  • the second switch circuit includes a second switch tube Q2, a third switch tube Q3, and a second pull-up resistor R2.
  • first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 can be electronic switch devices such as field effect tubes and triodes.
  • first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are all MOS tubes for illustration, wherein the first switch tube Q1 can be a P-MOS tube, the second switch tube Q2 can be an N-MOS tube, and the third switch tube Q3 can be a P-MOS tube.
  • the control end of the first switch tube Q1 refers to the gate of the P-MOS tube
  • the control end of the second switch tube Q2 refers to the gate of the N-MOS tube
  • the control end of the third switch tube Q3 refers to the gate of the P-MOS tube.
  • the switch path of the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 refers to the path formed by their source and drain.
  • the resistance values of the first pull-up resistor R1 and the second pull-up resistor R2 can be selected according to actual design needs.
  • the input pin and enable pin on the LDO chip are coupled to the system power supply (VSYS), that is, the working state of the LDO chip is only controlled by the power supply.
  • VSYS system power supply
  • the LDO chip is in working state.
  • the output pin on the LDO chip is coupled to the source of the first switch tube Q1.
  • the first switch tube Q1 The drain of is coupled to the input end of the power management chip and the Hall sensor respectively, and the gate of the first switch tube Q1 is coupled to the PG pin of the BUCK chip.
  • the input pin on the BUCK chip is coupled to the system power supply (VSYS), and the enable pin on the BUCK chip is coupled to a pin on the power management chip.
  • the pin on the power management chip can output an enable signal to the BUCK chip to control the working state of the BUCK chip.
  • the working state of the BUCK chip is controlled by the system power supply and the power management chip.
  • the BUCK chip is in working state only when the system power supply has an electrical signal output and the enable signal output by the power management chip is at a high level.
  • the output pin on the BUCK chip is coupled to the source of the third switch tube Q3, the drain of the third switch tube Q3 is coupled to the input end of the power management chip and the Hall sensor respectively, and the gate of the third switch tube Q3 is coupled to the drain of the second switch tube Q2.
  • the drain of the second switch tube Q2 is coupled to the system power supply (VSYS) through the second pull-up resistor R2, the source of the second switch tube Q2 is coupled to the reference ground potential (grounded), and the gate of the second switch tube Q2 is coupled to the PG pin of the BUCK chip.
  • the on/off of the first switch tube Q1 directly affects the on/off of the first switch circuit.
  • the input and output ends of the third switch tube Q3 in the second switch circuit are respectively connected to the BUCK chip and the power management chip and the Hall sensor to be powered, the on/off of the third switch tube Q3 directly affects the on/off of the second switch circuit.
  • the on state/off state of the first switch circuit can be realized by controlling the level signal of the PG pin on the BUCK chip. Specifically, since the gate of the first switch tube Q1 is coupled to the PG pin of the BUCK chip, if the PG pin of the BUCK chip is controlled to output a low level signal, the signal received by the gate of the first switch tube Q1 is a low level. Since the first switch tube Q1 is a P-MOS tube, the first switch tube Q1 is in the on state at this time, and the first switch circuit is in the on state.
  • the PG pin of the BUCK chip is controlled to output a high level signal, the signal received by the gate of the first switch tube Q1 is a high level, and the first switch tube Q1 is in the off state at this time, then the first switch circuit is in the off state.
  • the on/off state of the second switch circuit can also be achieved by controlling the level signal of the PG pin on the BUCK chip. Specifically, since the gate of the second switch tube Q2 is coupled to the PG pin of the BUCK chip, if the PG pin of the BUCK chip is controlled to output a high-level signal, the signal received by the gate of the second switch tube Q2 is a high-level signal. Since the second switch tube Q2 is an N-MOS tube, the second switch tube Q2 is in the on state at this time. Since the source of the second switch tube Q2 is coupled to the reference ground potential (grounded), the gate of the third switch tube Q3 is coupled to the drain of the second switch tube Q2.
  • both the source and the drain are low-level, and the signal received by the gate of the third switch tube Q3 is also low-level. If the third switch tube Q3 is a P-MOS tube, the third switch tube Q3 is in the on state at this time, and the second switch circuit is in the on state at this time.
  • the signal received by the gate of the second switch tube Q2 is a low-level signal. Since the second switch tube Q2 is an N-MOS tube, the second switch tube Q2 is in the disconnected state at this time.
  • the drain of the second switch tube Q2 is coupled to the system power supply (VSYS) through the second pull-up resistor R2, and the source of the second switch tube Q2 is coupled to the reference ground potential (grounded). Since the second switch tube Q2 is in the disconnected state at this time, the drain of the second switch tube Q2 will not be pulled to a low level by the reference ground potential, but will be pulled to a high level by the system power supply (VSYS) through the second pull-up resistor R2.
  • the signal received by the gate of the third switch tube Q3 is also High level, since the third switch tube Q3 is a P-MOS tube, the third switch tube Q3 is in an off state at this time, and the second switch circuit is in an off state at this time.
  • the power management chip and the Hall sensor can be powered by an LDO power supply system or a BUCK power supply system, and the conduction of the first switch circuit and the second switch circuit can be switched to control the use of different power supply systems to power the laptop computer in different states.
  • LDO power supply system or a BUCK power supply system
  • the conduction of the first switch circuit and the second switch circuit can be switched to control the use of different power supply systems to power the laptop computer in different states.
  • the technical solution in this application is: when the notebook is in the shutdown state (the upper cover is closed on the body), the Hall sensor sends a first detection signal to the power management chip, and the notebook computer is powered by the LDO power supply system.
  • the Hall sensor sends a second detection signal to the power management chip, and the notebook computer is powered by the BUCK power supply system.
  • the input pin and enable pin of the LDO chip are coupled to the system power supply (VSYS).
  • VSYS system power supply
  • the output pin of the LDO chip can also provide an electrical signal output. Therefore, when the battery of the notebook is in place or the adapter is connected (the system power supply (VSYS) comes from the output of the battery or adapter, so the default system power supply (VSYS) has an output), the LDO chip also maintains the output state.
  • the LDO chip can maintain the output state without any other control and operation, so as to power the laptop in the off state.
  • the state of the laptop computer is mainly determined by detecting whether the upper cover and the body of the laptop computer are closed by the Hall sensor.
  • the Hall sensor sends a first detection signal to the power management chip, indicating that the laptop computer is in a shutdown state.
  • the power management chip After receiving the first detection signal sent by the Hall sensor, the power management chip sends a low-level enable signal to the BUCK chip.
  • the input pin of the BUCK is coupled to the system power supply, since the signal received by its enable pin is a low-level signal, the BUCK chip is in a non-working state, and no electrical signal is output from its output end.
  • the BUCK chip Since the BUCK chip is in a non-working state, that is, the BUCK chip has no electrical signal output, its output pin is at a low level.
  • the PG pin on the BUCK chip is coupled to the output pin on the BUCK through the first pull-up resistor R1, so the PG pin is also at a low level.
  • the gate of the first switch tube Q1 is coupled to the PG pin of the BUCK chip, so the signal received by the gate of the first switch tube Q1 is also a low-level signal, and the first switch tube Q1 is in a conducting state, so the first switch circuit is also in a conducting state. Since the LDO chip is always connected to the system power supply and is in an output state.
  • the system power supply can power the power management chip and the Hall sensor through the LDO chip and the first switch circuit to ensure that the laptop is still powered when it is turned off.
  • the Hall sensor can monitor whether the laptop is open, and the power management chip can perform corresponding control according to the detection signal of the Hall sensor, so as to perform corresponding power supply system switching after the laptop is opened.
  • the Hall sensor When the upper cover is separated from the body and maintains a certain angle, the Hall sensor sends a second detection signal to the power management chip, indicating that the laptop is in working state.
  • the angle can be set according to actual conditions. For example, if the angle between the upper cover and the body is greater than 10°, the laptop is considered to be in working state. Of course, in actual use, the angle is generally greater than or equal to 90°, so that users can use it normally.
  • the power management chip After receiving the second detection signal from the Hall sensor, the power management chip sends a high-level enable signal to the BUCK chip.
  • the input pin of the BUCK chip is coupled to the system power supply, and the BUCK chip
  • the signal received by the enable pin is a high-level signal, so the BUCK chip is in working state, its output end is in output state, and the output pin of the BUCK chip is at a high level.
  • the PG pin on the BUCK chip Since the output pin of the BUCK chip is at a high level, and the PG pin on the BUCK chip is coupled to the output pin on the BUCK through the first pull-up resistor R1, the PG pin is pulled to a high level through the pull-up resistor.
  • the gate of the first switch tube Q1 is coupled to the PG pin of the BUCK chip, so the signal received by the gate of the first switch tube Q1 is also a high level signal. At this time, the first switch tube Q1 is in an off state, so the first switch circuit is also in an off state.
  • the gate of the second switch tube Q2 is also coupled to the PG pin of the BUCK chip, the signal received by the gate of the second switch tube Q2 is also a high-level signal, and the second switch tube Q2 is an N-MOS tube, so the second switch tube Q2 is in the on state at this time. Since the source of the second switch tube Q2 is connected to the reference ground potential, at this time, the source and drain of the second switch tube Q2 are pulled down to a low level by the reference ground potential.
  • the gate of the third switch tube Q3 is coupled to the drain of the second switch tube Q2, the signal received by the gate of the third switch tube Q3 is a low-level signal, and the third switch tube Q3 is a P-MOS tube, so the third switch tube Q3 is in the on state.
  • the source and drain of the third switch tube Q3 are respectively coupled to the output pin of the BUCK chip and the power management chip and the Hall sensor that need to be powered. At this time, the second switch circuit is in the on state.
  • the BUCK chip is connected to the system power supply and is in working state, and the second switch circuit is in the on state; although the LDO chip is also connected to the system power supply and is in the output state, the first switch circuit is in the off state. Therefore, the LDO power supply system cannot supply power to the power management chip and the Hall sensor, and the power management chip and the Hall sensor are powered by the BUCK power supply system. In other words, the switch from the LDO power supply system to the BUCK power supply system is realized.
  • the Hall sensor When the user closes the upper cover and the body of the laptop, the Hall sensor will send a first detection signal to the power management chip.
  • the power supply system of the laptop is switched to the LDO power supply system, and the BUCK power supply system does not supply power at this time. That is, when the upper cover of the laptop is closed, the power supply system of the laptop is switched from the BUCK power supply system to the LDO power supply system.
  • the opening and closing of the laptop is detected by the Hall sensor, and the power management chip controls the working state of the BUCK chip according to the detection result of the Hall sensor, thereby controlling the on/off of the first switch circuit and the second switch circuit, thereby realizing the switching between the LDO power supply system and the BUCK power supply system.
  • the laptop can match different power supply systems when working in different states.
  • the LDO power supply system supplies power to the laptop computer, that is, the default state is that the laptop computer is in the shutdown state.
  • the power supply system of the laptop computer switches from the LDO power supply system to the BUCK power supply system.
  • the VSYS line in Figure 2 represents the timing diagram of the system power electrical signal.
  • the first switch tube Q1 is in the on state, and the system power supplies the LDO chip, and then the power management chip and the Hall sensor are powered through the LDO power supply system.
  • the LDO_OUT line in Figure 2 represents the level change timing diagram of the output pin on the LDO chip, which is slightly later than the level change time of the system power electrical signal.
  • the POWER_OUT line in Figure 2 represents the level change time at the input end of the power management chip at this time. Since the input end of the power management chip is connected to the output pin on the chip, the power management chip and the Hall sensor are powered on. It is in the on state, so the level change time on the input of the power management chip is the same as the level change time of the output pin on the LDO chip.
  • the HALL_OUT line in Figure 2 represents the timing diagram of the Hall sensor transmitting a detection signal to the power management chip. Its change time is later than the change time of LDO_OUT, indicating that the laptop switches from the LDO power supply system in the default state to the BUCK power supply system.
  • the EC_BUCK_EN line in Figure 2 represents the level change timing of the enable signal sent by the power management chip to the BUCK chip. Since the enable signal is sent after the Hall sensor transmits the detection signal to the power management chip, its change time is later than the change time of HALL_OUT.
  • the BUCK_OUT line and BUCK_OUT_PG line in Figure 2 respectively represent the level change timing of the output pin on the BUCK chip and the level change timing of the PG pin on the BUCK chip. Since the BUCK chip is in working state and outputs electrical signals only after receiving the enable signal at a high level. Therefore, the level change time of the output pin on the BUCK chip is later than the change time of the enable signal sent by the power management chip to the BUCK chip, and the level change of the PG pin on the BUCK chip is affected by the level change of the output pin on the BUCK chip. Therefore, the level change time of the PG pin on the BUCK chip is later than the level change time of the output pin on the BUCK chip.
  • an embodiment of the present application provides an electronic device, which includes a power switching circuit described in the above embodiment, and the electronic device can be a laptop computer.

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Abstract

一种电源切换电路及电子设备，其中，电源切换电路应用于笔记本电脑，能够根据笔记本电脑处于不同的状态选择合适的供电系统，以提升其续航能力和电源供电效率。电源切换电路包括系统电源（VSYS）、BUCK供电系统、LDO供电系统、电源管理芯片（EC）。其中，LDO供电系统包括LDO芯片和第一开关电路，LDO芯片与系统电源（VSYS）耦合，LDO芯片处于工作状态，电源管理芯片（EC）通过第一开关电路与LDO芯片耦合。BUCK供电系统包括BUCK芯片和第二开关电路，BUCK芯片与系统电源（VSYS）耦合，电源管理芯片（EC）通过第二开关电路与BUCK芯片耦合，电源管理芯片（EC）对BUCK芯片的状态进行控制。第一开关电路和第二开关电路均与BUCK芯片耦合，BUCK芯片控制第一开关电路和第二开关电路其中一个处于导通状态。

Description

一种电源切换电路及电子设备
本申请要求于2022年9月29日提交国家知识产权局、申请号为202211203370.6、发明名称为“一种电源切换电路及电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实例涉及电路技术领域，尤其涉及一种电源切换电路及电子设备。
背景技术
在通信和计算机领域，包括消费电子设备在内的各种电子设备都需要电源来维持工作。在使用直流源的电子设备中(例如笔记本电脑)，需要采取电压变换器(稳压器)将电源(如电池)的电压转换为所需的工作电压。
目前常用的电压变换器是DCDC变换器(DCDC是指“直流电压转直流电压”，但业界目前多将DCDC用于表述开关电源)。DCDC变换器根据其拓扑结构可以实现降压(buck)、升压(boost)，升降压(buck-boost)。完成降压功能的DCDC变换器通常称为BUCK型DCDC。
BUCK型DCDC具有转换效率高的优势。然而，BUCK的静态电流(空载时流过接地引脚的电流)较大，容易造成电量损失。因此，对于始终要求更佳续航能力的移动电子设备而言，过大的静态电流是不利的。
另一种常用的降压变换器是LDO(低压差线性稳压器)。LDO具有负载响应快，噪声低等优势，但和BUCK型DCDC相比，其主要不足是转换效率低。
随着科技的发展，为了提升笔记本电脑用户的使用体验，需要实现笔记本电脑开盖自动开机的功能，这就需要笔记本电脑在关机状态(关上上盖)的情况下带电。
在关机状态下，由于系统处于轻载模式，所以在关机状态下，一般采用LDO供电，以降低系统功耗。但是，在开机状态若继续使用LDO供电，由于系统处于相对重载的模式，LDO的效率太低，会导致器件发热严重，一般需要使用BUCK型DCDC供电。因此，如何高效地为笔记本电脑从关机状态到开机状态进行供电，成为一个亟待解决的问题。
发明内容
本申请提供一种电源切换电路及电子设备，该电源切换电路及电子设备可以根据笔记本电脑处于不同的工作状态选择合适的供电系统进行供电，在笔记本电脑处于关机状态时，为笔记本电脑提供低功耗的供电系统，以提升其续航能力；在笔记本电脑处于正常工作状态时，为其提供高效率高的供电系统，以保证其正常工作，提升系统的工作效率。
第一方面，本申请提供一种电源切换电路，该电源切换电路应用于笔记本电脑，包括系统电源、BUCK供电系统、LDO供电系统、电源管理芯片。其中，LDO供电系统包括LDO芯片和第一开关电路，LDO芯片与系统电源耦合，LDO芯片处于工作状态，电源管理芯片通过第一开关电路与LDO芯片耦合。BUCK供电系统包括BUCK 芯片和第二开关电路，BUCK芯片与系统电源耦合，电源管理芯片通过第二开关电路与BUCK芯片耦合，电源管理芯片对BUCK芯片的状态进行控制。第一开关电路和第二开关电路均与BUCK芯片耦合，BUCK芯片控制第一开关电路和第二开关电路其中一个处于导通状态。
在此基础上，通过设置两套供电系统，可以选择合适的供电系统对处于不同状态的笔记本电脑进行供电，如在关机状态下采用LDO供电系统进行供电，以提升笔记本电脑的续航能力，在开机状态下采用BUCK供电系统进行供电，以提升笔记本电脑的电源供电效率。通过设置第一开关电路和第二开关电路，并将第一开关电路和第二开关电路的控制端耦合在BUCK供电系统的BUCK芯片上，通过控制BUCK的状态即可控制第一开关电路和第二开关电路的导通与断开，从而实现在BUCK供电系统和LDO供电系统中进行切换。本申请中电源切换电路可以对笔记本电脑中现有的BUCK芯片和LDO芯片加以利用，通过设置开关电路即可进行不同的供电系统的切换，不用新增电子元件或者使用集成电源芯片，可以减少笔记本电脑的成本。
在第一方面的一种可能的设计方式中，BUCK芯片的状态包括工作状态和非工作状态。当BUCK芯片处于非工作状态时，第一开关电路处于导通状态，第二开关电路处于断开状态。当BUCK芯片处于工作状态时，第一开关电路处于断开状态，第二开关电路处于导通状态。
在此基础上，通过设置BUCK芯片处于工作状态和非工作状态，来控制第一开关电路和第二开关电路的导通与断开，电路结构简单，不需要增加额外的控制元件。
在第一方面的一种可能的设计方式中，第一开关电路包括第一开关管，第一开关管的控制端与BUCK芯片耦合，BUCK芯片控制第一开关管的连接状态。第一开关管的开关通路的一端与LDO芯片耦合，另一端与电源管理芯片耦合。
在此基础上，通过设置第一开关管的导通与断开来控制第一开关电路的导通与断开，电路结构简单，第一开关管可以为场效应管、三极管等电子开关器件，成本低廉。
在第一方面的一种可能的设计方式中，第二开关电路包括第二开关管和第三开关管，第二开关管的控制端与BUCK芯片耦合，BUCK芯片控制第二开关管的连接状态。第三开关管的控制端与第二开关管的开关通路耦合，第二开关管的连接状态控制第三开关管的连接状态。第三开关管的开关通路的一端与BUCK芯片耦合，另一端与电源管理芯片耦合。
在此基础上，通过设置第二开关管和第三开关管组合的形式来控制第二开关电路的导通与断开，电路结构简单，且第二开关管和第三开关管可以为场效应管、三极管等电子开关器件，成本低廉。
在第一方面的一种可能的设计方式中，第一开关管为P-MOS管，第一开关管的源极与LDO芯片的输出引脚耦合，第一开关管的漏极与电源管理芯片耦合，第一开关管的栅极与BUCK芯片的电源正常指示引脚耦合。该设计方式示出了第一开关管的一种具体的结构，并且示出了第一开关管在第一开关电路中的具体连接方式。
在第一方面的一种可能的设计方式中，第二开关管为N-MOS管，第三开关管为P-MOS管。其中，第二开关管的漏极和源极分别与系统电源和参考地势耦合，第二开关管的栅极与BUCK芯片的电源正常指示引脚耦合。第三开关管的源极与BUCK芯片 的输出引脚耦合，第三开关管漏极与电源管理芯片耦合，第三开关管的栅极与第二开关管的漏极耦合。该设计方式示出了第二开关管和第三开关管的一种具体的结构，并且示出了第二开关管和第三开关管在第二开关电路中的具体连接方式。
在第一方面的一种可能的设计方式中，还包括传感器，传感器用于检测本电脑的开合。传感器与第一开关电路和第二开关电路耦合，传感器与电源管理芯片耦合，以发送检测信号给电源管理芯片。
在此基础上，通过设置传感器，可以对笔记本电脑的开合状态进行检测，以判断笔记本电脑是关机状态还是状态，从而根据其检测结果选择相应的供电系统对笔记本电脑进行供电。
在第一方面的一种可能的设计方式中，源管理芯片根据传感器发送的检测信号，向BUCK芯片发送控制信号。控制信号为低电平信号时，控制BUCK芯片处于非工作状态。控制信号为高电平信号时，控制BUCK芯片处于工作状态。该设计方式示出了对BUCK芯片的状态进行控制的一种实现方式。
第二方面，本申请提供一种电子设备，该电子设备为笔记本电脑，笔记本电脑包括第一方面及其任一种可能的设计方式所述的电源切换电路。
可以理解地，上述提供的第二方面所述的电子设备所能达到的有益效果，可参考如第一方面及其任一种可能的设计方式中的有益效果，此处不再赘述。
附图说明
图1为本申请实施例提供的一种电源切换电路的电路图；
图2为本申请实施例提供的一种电源切换时序图。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
在本申请实施例中，“示例性的”或者“例如”等词用于表示作例子、例证或说明。本申请实施例中被描述为“示例性的”或者“例如”的任何实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。确切而言，使用“示例性的”或者“例如”等词旨在以具体方式呈现相关概念。
在本申请的实施例中，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。
应理解，在本文中对各种所述示例的描述中所使用的术语只是为了描述特定示例，而并非旨在进行限制。如在对各种所述示例的描述中所使用的那样，单数形式“一个(“a”，“an”)”和“该”旨在也包括复数形式，除非上下文另外明确地指示。
本申请中，“至少一个”是指一个或者多个，“多个”是指两个或两个以上。“以下至少一项(个)”或其类似表达，是指的这些项中的任意组合，包括单项(个)或复数项(个)的任意组合。例如，a,b,或c中的至少一项(个)，可以表示：a,b,c,a-b,a-c,b-c,或a-b-c，其中a,b,c可以是单个，也可以是多个。
还应理解，本文中所使用的术语“和/或”是指并且涵盖相关联的所列出的项目中的一个或多个项目的任何和全部可能的组合。术语“和/或”，是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在 A和B，单独存在B这三种情况。另外，本申请中的字符“/”，一般表示前后关联对象是一种“或”的关系。
还应理解，在本申请中，除非另有明确的规定和限定，术语“连接”应做广义理解，例如，“连接”可以是固定连接，也可以是滑动连接，还可以是可拆卸连接，或成一体等；可以是直接相连，也可以通过中间媒介间接相连。
还应理解，术语“包括”(也称“includes”、“including”、“comprises”和/或“comprising”)当在本说明书中使用时指定存在所陈述的特征、整数、步骤、操作、元素、和/或部件，但是并不排除存在或添加一个或多个其他特征、整数、步骤、操作、元素、部件、和/或其分组。
应理解，说明书通篇中提到的“一实施例”、“另一实施例”、“一种可能的设计方式”意味着与实施例或实现方式有关的特定特征、结构或特性包括在本申请的至少一个实施例中。因此，在整个说明书各处出现的“在本申请一实施例中”或“在本申请另一实施例中”、“一种可能的设计方式”未必一定指相同的实施例。此外，这些特定的特征、结构或特性可以任意适合的方式结合在一个或多个实施例中。
为了便于理解本申请的技术方案，在撰写本申请实施例前，先对与本申请技术方案相关的技术背景进行简单的介绍。
本申请的技术方案主要应用于笔记本电脑中，或者与笔记本电脑类似的产品中，这类产品在使用过程中，一般将带有显示屏的上盖与机身分离并保持一定的角度，在不需要使用时，一般将上盖扣合在机身上，减少对空间的占用。本申请实施例中，以笔记本电脑为例，对电源切换电路进行介绍。
传统的笔记本电脑中，将上盖与机身扣合后，电脑一般就处于关机状态，当将上盖重新打开后，可能需要用户重新进行开机启动等操作，较为麻烦。为了提升笔记本电脑的使用体验，需要实现笔记本电脑开盖自动开机的功能，因此，在上盖与机身扣合的情况下，需要使笔记本电脑保持带电状态。为了检测笔记本电脑是否进行了开盖操作，一般在笔记本电脑的上盖和机身中安装有霍尔传感器，以监测笔记本电脑的开盖动作。关于利用霍尔传感器检测笔记本电脑是否开盖则属于现有技术，本申请中不作赘述。
笔记本电脑在关机状态下，无需进行相应的任务处理，主要对电源管理芯片、霍尔传感器进行供电即可，此时笔记本电脑处于轻载模式，产生的功耗较低，可以采用低功耗的供电系统，一般采用LDO供电系统。当笔记本电脑开盖后，各个系统正常运行，笔记本电脑处于相对重载的模式，此时工作电流较大，若继续采用LDO系统进行供电，LDO供电系统的转换效率太低，容易造成器件发热严重，因此，当笔记本电脑开盖后，一般采用BUCK供电系统进行供电，以提升笔记本电脑在开机状态下的工作效率。
现有技术中，一般采用一套供电系统对笔记本电脑进行供电，例如只采用BUCK供电系统对笔记本电脑进行供电，也即，当笔记本电脑开机后，通过BUCK供电系统对笔记本电脑进行供电。无法实现笔记本电脑在合上上盖后继续对其进行供电，并实现开盖自动开机，将供电系统切换为BUCK供电系统的功能。
为了实现对笔记本电脑在不同工作模式下进行合理、高效地供电，本申请实施例 提供一种电源切换电路及电子设备，对笔记本电脑在不同工作模式下采用不同的供电系统进行供电，并对笔记本在进行工作模式切换时，同步切换笔记本电脑的供电系统，使得笔记本电脑在不同的工作模式下，都有最高效的供电系统进行供电。下面结合图1和图2对本申请实施例进行说明。
参考图1，图1为本申请实施例提供的一种电源切换电路的电路图。如图1所示，本申请实施例的控制电路，包括系统电源、电源管理芯片、BUCK供电系统、LDO供电系统。其中，电源管理芯片上连接有霍尔传感器，霍尔传感器对笔记本电脑的开合进行检测，并将检测信号发送给电源管理芯片，电源管理芯片根据接收到的霍尔传感器的检测信号生成控制信号。BUCK供电系统和LDO供电系统输入端分别与笔记本电脑的系统电源连接，BUCK供电系统和LDO供电系统输入端分别与电源管理芯片和霍尔传感器电连接，以便为电源管理芯片和霍尔传感器进行供电。
其中，LDO供电系统中包括LDO芯片和第一开关电路，LDO芯片与系统电源电连接，第一开关电路的第一端与LDO芯片电连接，第一开关电路的第二端分别与电源管理芯片和霍尔传感器电连接。BUCK供电系统中包括BUCK芯片和第二开关电路，BUCK芯片与系统电源电连接，第二开关电路的第一端与BUCK芯片电连接，第二开关电路的第二端分别与电源管理芯片和霍尔传感器电连接。第一开关电路和第二开关电路的控制端均与BUCK芯片电连接，BUCK芯片输出的控制信号可以控制第一开关电路和第二开关电路的导通/断开。其中，第一开关电路和第二开关电路不会同时处于导通/断开状态。一般为，当第一开关电路处于导通状态时，第二开关电路处于断开状态；当第一开关电路处于断开状态时，第二开关电路处于导通状态。
通过调节第一开关电路、第二开关电路的导通和断开，可以在BUCK供电系统和LDO供电系统中进行切换，实现通过不同的供电系统对电源管理芯片和霍尔传感器进行供电。
如图1所示，LDO芯片上包括一个输入引脚(I)、输出引脚(O)和使能引脚(EN)，BUCK芯片上包括一个输入引脚(I)、输出引脚(O)、使能引脚(EN)和电源正常指示引脚(Power Good，PG)。BUCK芯片的PG引脚通过第一上拉电阻R1与BUCK芯片的输出引脚所输出的电源耦合。第一开关电路中包括第一开关管Q1以及第一上拉电阻R1，第二开关电路中包括第二开关管Q2、第三开关管Q3和第二上拉电阻R2。
需要说明的是，第一开关管Q1、第二开关管Q2和第三开关管Q3可以是场效应管、三极管等电子开关器件。本申请实施例中，以第一开关管Q1、第二开关管Q2和第三开关管Q3均为MOS管为例进行说明，其中，第一开关管Q1可以是P-MOS管，第二开关管Q2可以是N-MOS管，第三开关管Q3可以是P-MOS管。第一开关管Q1的控制端是指P-MOS管的栅极，第二开关管Q2的控制端是指N-MOS管的栅极，第三开关管Q3的控制端是指P-MOS管的栅极。第一开关管Q1、第二开关管Q2和第三开关管Q3的开关通路是指其源极和漏极所形成的通路。第一上拉电阻R1和第二上拉电阻R2的阻值可以根据实际的设计需要进行选取。
如图1所示，LDO芯片上的输入引脚和使能引脚均与系统电源(VSYS)耦合，即LDO芯片的工作状态只受电源的控制，当系统电源有电信号输出时，LDO芯片即处于工作状态。LDO芯片上的输出引脚与第一开关管Q1的源极耦合，第一开关管Q1 的漏极分别与电源管理芯片和霍尔传感器的输入端耦合，第一开关管Q1的栅极与BUCK芯片的PG引脚耦合。
BUCK芯片上的输入引脚与系统电源(VSYS)耦合，BUCK芯片上的使能引脚与电源管理芯片上的一个引脚耦合，电源管理芯片上的该引脚可以输出一个使能信号给BUCK芯片，以控制BUCK芯片的工作状态。也即，BUCK芯片的工作状态受系统电源和电源管理芯片的控制，当系统电源有电信号输出且电源管理芯片输出的使能信号为高电平时，BUCK芯片才处于工作状态。
BUCK芯片上的输出引脚与第三开关管Q3的源极耦合，第三开关管Q3的漏极分别与电源管理芯片和霍尔传感器的输入端耦合，第三开关管Q3的栅极与第二开关管Q2的漏极耦合。第二开关管Q2的漏极通过第二上拉电阻R2与系统电源(VSYS)耦合，第二开关管Q2的源极与参考地势耦合(接地)，第二开关管Q2的栅极与BUCK芯片的PG引脚耦合。
由于第一开关电路中的第一开关管Q1的输入端和输出端分别连接LDO芯片和需要被供电的电源管理芯片与霍尔传感器，因此第一开关管Q1的导通/断开直接影响第一开关电路的导通/断开。同理，由于第二开关电路中的第三开关管Q3的输入端和输出端分别连接BUCK芯片和需要被供电的电源管理芯片与霍尔传感器，因此第三开关管Q3的导通/断开直接影响第二开关电路的导通/断开。
第一开关电路的导通状态/断开状态可以通过控制BUCK芯片上PG引脚的电平信号来实现。具体的，由于第一开关管Q1的栅极与BUCK芯片的PG引脚耦合，若控制BUCK芯片的PG引脚输出一个低电平信号，则第一开关管Q1的栅极所接收到的信号为低电平，由于第一开关管Q1为P-MOS管，则第一开关管Q1此时处于导通状态，则第一开关电路处于导通状态。若控制BUCK芯片的PG引脚输出一个高电平信号，第一开关管Q1的栅极所接收到的信号为高电平，第一开关管Q1此时处于断开状态，则第一开关电路处于断开状态。
第二开关电路的导通状态/断开状态也可以通过控制BUCK芯片上PG引脚的电平信号来实现。具体的，由于第二开关管Q2的栅极与BUCK芯片的PG引脚耦合，若控制BUCK芯片的PG引脚输出一个高电平信号，则第二开关管Q2的栅极所接收到的信号为高电平，由于第二开关管Q2为N-MOS管，则第二开关管Q2此时处于导通状态。由于第二开关管Q2的源极与参考地势耦合(接地)，第三开关管Q3的栅极与第二开关管Q2的漏极耦合。因此，当第二开关管Q2处于导通状态时，源极和漏极上都为低电平，则第三开关管Q3的栅极所接收到的信号也为低电平。而第三开关管Q3为P-MOS管，则第三开关管Q3此时处于导通状态，则第二开关电路此时处于导通状态。
若控制BUCK芯片的PG引脚输出一个低电平信号，则第二开关管Q2的栅极所接收到的信号为低电平，由于第二开关管Q2为N-MOS管，则第二开关管Q2此时处于断开状态。第二开关管Q2的漏极通过第二上拉电阻R2与系统电源(VSYS)耦合，第二开关管Q2的源极与参考地势耦合(接地)，由于第二开关管Q2此时处于断开状态，则第二开关管Q2的漏极不会被参考地势拉至低电平，而会通过第二上拉电阻R2被系统电源(VSYS)拉至高电平。此时，第三开关管Q3的栅极所接收到的信号也为 高电平，由于第三开关管Q3为P-MOS管，因此第三开关管Q3此时处于断开状态，则第二开关电路此时处于断开状态。
本申请实施例中，可以通过LDO供电系统或BUCK供电系统对电源管理芯片和霍尔传感器进行供电，并可以通过切换第一开关电路和第二开关电路的导通，来控制对不同状态下的笔记本电脑采用不同的供电系统进行供电，下面对具体的原理进行介绍。
需要说明的是，本申请中的技术方案为：当笔记本处于关机状态(上盖盖合在机身上)时，霍尔传感器向电源管理芯片发出第一检测信号，此时笔记本电脑采用LDO供电系统进行供电。当笔记本处于工作状态(上盖处于开盖状态，与机身之间保持一定的角度)时，霍尔传感器向电源管理芯片发出第二检测信号，此时笔记本电脑采用BUCK供电系统进行供电。
如图1所示，LDO芯片的输入引脚和使能引脚都是与系统电源(VSYS)耦合，当电源一直有电信号输出时，则LDO芯片的输出引脚也可以一直提供电信号输出。因此，当笔记本的电池在位或者适配器处于连接状态时(系统电源(VSYS)来自电池或适配器的输出，因此默认系统电源(VSYS)有输出)，则LDO芯片也一直保持输出状态。当笔记本电脑处于关机状态(上盖盖合在机身上)时，LDO芯片不需要进行其它任何控制和操作也可以保持输出状态，以便为关机状态下的笔记本电脑进行供电。
本申请实施例中，主要通过霍尔传感器检测笔记本电脑的上盖与机身之间是否盖合，来判断笔记本电脑的状态。当上盖盖合在机身上时，霍尔传感器向电源管理芯片发送第一检测信号，表明笔记本电脑处于关机状态。电源管理芯片收到霍尔传感器所发出的第一检测信号后，向BUCK芯片发送一个低电平的使能信号。虽然BUCK的输入引脚与系统电源耦合，但是由于其使能引脚收到的信号为低电平信号，因此BUCK芯片处于非工作状态，其输出端无电信号输出。
由于BUCK芯片处于非工作状态，也即BUCK芯片无电信号输出，因此其输出引脚上为低电平。而BUCK芯片上的PG引脚通过第一上拉电阻R1与BUCK上的输出引脚耦合，因此PG引脚上也为低电平。而第一开关管Q1的栅极与BUCK芯片的PG引脚耦合，因此，第一开关管Q1的栅极接收到的信号也为低电平信号，第一开关管Q1处于导通状态，因此，第一开关电路也处于导通状态。由于LDO芯片与系统电源一直保持连接状态，并且处于输出状态。因此，系统电源可以通过LDO芯片和第一开关电路为电源管理芯片和霍尔传感器进行供电，保证笔记本电脑在关机状态下依然处于带电状态。而霍尔传感器可以监测笔记本电脑是否开盖，电源管理芯片可以根据霍尔传感器的检测信号进行相应的控制，以便在笔记本电脑开盖后进行相应的供电系统切换。
当上盖与机身分离并保持一定角度时，霍尔传感器向电源管理芯片发送第二检测信号，表明笔记本电脑处于工作状态。需要说明的是，该角度可以根据实际情况进行设置，例如上盖与机身的角度大于10°即可认为笔记本电脑处于工作状态，当然，在实际的使用过程中，该角度一般为大于或者等于90°，以便用户进行正常的使用。
电源管理芯片收到霍尔传感器所发出的第二检测信号后，向BUCK芯片发送一个高电平的使能信号。此时，BUCK芯片的输入引脚与系统电源耦合，且BUCK芯片的 使能引脚收到的信号为高电平信号，因此BUCK芯片处于工作状态，其输出端呈输出状态，BUCK芯片的输出引脚上为高电平。
由于BUCK芯片的输出引脚上为高电平，而BUCK芯片上的PG引脚通过第一上拉电阻R1与BUCK上的输出引脚耦合，因此PG引脚通过该上拉电阻被拉至高电平。而第一开关管Q1的栅极与BUCK芯片的PG引脚耦合，因此，第一开关管Q1的栅极接收到的信号也为高电平信号，此时第一开关管Q1处于断开状态，因此，第一开关电路也处于断开状态。
由于第二开关管Q2的栅极也与BUCK芯片的PG引脚耦合，因此，第二开关管Q2的栅极接收到的信号也为高电平信号，而第二开关管Q2为N-MOS管，因此第二开关管Q2此时处于导通状态。由于第二开关管Q2的源极与参考地势连接，因此此时，第二开关管Q2的源极和漏极都被参考地势拉低至低电平。由于第三开关管Q3的栅极与第二开关管Q2的漏极耦合，则第三开关管Q3的栅极所接收到的信号为低电平信号，第三开关管Q3为P-MOS管，因此第三开关管Q3为导通状态。而第三开关管Q3的源极和漏极分别耦合于BUCK芯片的输出引脚以及需要供电的电源管理芯片与霍尔传感器，此时第二开关电路处于导通状态。
该种情况下，BUCK芯片与系统电源处于连接状态且为工作状态，第二开关电路处于导通状态；虽然LDO芯片也与系统电源保持连接状态，并且处于输出状态，但由于第一开关电路处于断开状态。因此，LDO供电系统无法为电源管理芯片和霍尔传感器进行供电，此时电源管理芯片和霍尔传感器通过BUCK供电系统进行供电。也即，实现了从LDO供电系统到BUCK供电系统的切换。
当用户将笔记本电脑的上盖和机身合上后，则霍尔传感器会向电源管理芯片发送第一检测信号，根据前述描述可知，笔记本电脑的供电系统切换为LDO供电系统，此时BUCK供电系统不进行供电。也即，当笔记本电脑的上盖合上后，笔记本电脑的供电系统由BUCK供电系统切换为了LDO供电系统。
本申请实施例所提供的技术方案中，通过霍尔传感器对笔记本电脑的开合进行检测，电源管理芯片根据霍尔传感器的检测结果对BUCK芯片的工作状态进行控制，进而实现对第一开关电路和第二开关电路的导通/断开进行控制，从而实现对LDO供电系统和BUCK供电系统的切换。使得笔记本电脑工作在不同的状态下，可以匹配不同的供电系统。
图1所示的电源切换电路中，默认状态下，由LDO供电系统对笔记本电脑进行供电，也即，默认状态为笔记本电脑处于关机状态。笔记本电脑处于工作状态后，笔记本电脑的供电系统由LDO供电系统切换到BUCK供电系统。下面对笔记本电脑进行电源切换时的时序进行简单介绍。
参考图2，图2为本申请实施例提供的一种电源切换时序图。如图2所示，图2中的VSYS线表示系统电源电信号的时序图，在默认状态下，第一开关管Q1处于导通状态，系统电源对LDO芯片进行供电，然后通过LDO供电系统对电源管理芯片和霍尔传感器进行供电。图2中的LDO_OUT线表示LDO芯片上输出引脚的电平变化时序图，其稍晚于系统电源电信号的电平变化时间。图2中POWER_OUT线表示此时电源管理芯片输入端上的电平变化时间，由于电源管理芯片输入端与芯片上的输出引脚 处于导通状态，因此，电源管理芯片输入端上的电平变化时间与LDO芯片上输出引脚的电平变化时间相同。
图2中的HALL_OUT线表示霍尔传感器向电源管理芯片上发射检测信号的时序图，其变化时间晚于LDO_OUT的变化时间，表示笔记本电脑从默认状态下的LDO供电系统切换到BUCK供电系统。图2中EC_BUCK_EN线表示电源管理芯片向BUCK芯片发送的使能信号的电平变化时序，由于该使能信号是在霍尔传感器向电源管理芯片上发射检测信号后才发送的，因此其变化时间晚于HALL_OUT的变化时间。图2中的BUCK_OUT线和BUCK_OUT_PG线分别表示BUCK芯片上输出引脚的电平变化时序和BUCK芯片上PG引脚的电平变化时序，由于BUCK芯片在接收到使能信号为高电平后，才处于工作状态并输出电信号。因此BUCK芯片上输出引脚的电平变化时间晚于电源管理芯片向BUCK芯片发送的使能信号的变化时间，而BUCK芯片上PG引脚的电平变化受BUCK芯片上输出引脚的电平变化的影响，因此BUCK芯片上PG引脚的电平变化的时间晚于BUCK芯片上输出引脚的电平变化时间。
基于同一发明构思，本申请实施例提供一种电子设备，该电子设备包括上述实施例所描述的一种电源切换电路，该电子设备可以为笔记本电脑。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。
本说明书中的各个实施例均采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似的部分互相参见即可。
尽管已描述了本申请实施例的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例做出另外的变更和修改。所以，本申请保护范围包括优选实施例以及落入本申请实施例范围的所有变更和修改。
以上对本申请所提供的一种屏幕显示状态切换的控制电路及电子设备，进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想；同时，对于本领域的一般技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。
以上内容，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何在本申请揭露的技术范围内的变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (9)

  1. 一种电源切换电路，其特征在于，应用于笔记本电脑，包括系统电源、BUCK供电系统、LDO供电系统、电源管理芯片；
    所述LDO供电系统包括LDO芯片和第一开关电路，所述LDO芯片与所述系统电源耦合，所述LDO芯片处于工作状态，所述电源管理芯片通过所述第一开关电路与所述LDO芯片耦合；
    所述BUCK供电系统包括BUCK芯片和第二开关电路，所述BUCK芯片与所述系统电源耦合，所述电源管理芯片通过所述第二开关电路与所述BUCK芯片耦合，所述电源管理芯片对所述BUCK芯片的状态进行控制；
    所述第一开关电路和所述第二开关电路均与所述BUCK芯片耦合，所述BUCK芯片控制所述第一开关电路和所述第二开关电路其中一个处于导通状态。
  2. 根据权利要求1所述的电源切换电路，其特征在于，所述BUCK芯片的状态包括工作状态和非工作状态；
    当所述BUCK芯片处于非工作状态时，所述第一开关电路处于导通状态，所述第二开关电路处于断开状态；
    当所述BUCK芯片处于工作状态时，所述第一开关电路处于断开状态，所述第二开关电路处于导通状态。
  3. 根据权利要求1或2所述的电源切换电路，其特征在于，所述第一开关电路包括第一开关管；
    所述第一开关管的控制端与所述BUCK芯片耦合，所述BUCK芯片控制所述第一开关管的连接状态；
    所述第一开关管的开关通路的一端与所述LDO芯片耦合，另一端与所述电源管理芯片耦合。
  4. 根据权利要求1至3任意一项所述的电源切换电路，其特征在于，所述第二开关电路包括第二开关管和第三开关管；
    所述第二开关管的控制端与所述BUCK芯片耦合，所述BUCK芯片控制所述第二开关管的连接状态；
    所述第三开关管的控制端与所述第二开关管的开关通路耦合，所述第二开关管的连接状态控制所述第三开关管的连接状态；
    所述第三开关管的开关通路的一端与所述BUCK芯片耦合，另一端与所述电源管理芯片耦合。
  5. 根据权利要求3所述的电源切换电路，其特征在于，所述第一开关管为P-MOS管，所述第一开关管的源极与所述LDO芯片的输出引脚耦合，所述第一开关管的漏极与所述电源管理芯片耦合，所述第一开关管的栅极与所述BUCK芯片的电源正常指示引脚耦合。
  6. 根据权利要求4所述的电源切换电路，其特征在于，所述第二开关管为N-MOS管，所述第三开关管为P-MOS管；
    所述第二开关管的漏极和源极分别与所述系统电源和参考地势耦合，所述第二开关管的栅极与所述BUCK芯片的电源正常指示引脚耦合；
    所述第三开关管的源极与所述BUCK芯片的输出引脚耦合，所述第三开关管漏极与所述电源管理芯片耦合，所述第三开关管的栅极与所述第二开关管的漏极耦合。
  7. 根据权利要求1至6任意一项所述的电源切换电路，其特征在于，还包括传感器，所述传感器用于检测所述本电脑的开合；
    所述传感器与所述第一开关电路和所述第二开关电路耦合，所述传感器与所述电源管理芯片耦合，以发送检测信号给所述电源管理芯片。
  8. 根据权利要求7所述的电源切换电路，其特征在于，所述电源管理芯片根据所述传感器发送的检测信号，向所述BUCK芯片发送控制信号；
    所述控制信号为低电平信号时，控制所述BUCK芯片处于非工作状态；
    所述控制信号为高电平信号时，控制所述BUCK芯片处于工作状态。
  9. 一种电子设备，其特征在于，该电子设备为笔记本电脑，所述笔记本电脑包括权利要求1至8中任一项所述的电源切换电路。
PCT/CN2023/117841 2022-09-29 2023-09-08 一种电源切换电路及电子设备 WO2024067031A1 (zh)

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