WO2024031976A1 - 一种超高分辨率micro-led显示器件及其金属薄膜键合方法 - Google Patents

一种超高分辨率micro-led显示器件及其金属薄膜键合方法 Download PDF

Info

Publication number
WO2024031976A1
WO2024031976A1 PCT/CN2023/080233 CN2023080233W WO2024031976A1 WO 2024031976 A1 WO2024031976 A1 WO 2024031976A1 CN 2023080233 W CN2023080233 W CN 2023080233W WO 2024031976 A1 WO2024031976 A1 WO 2024031976A1
Authority
WO
WIPO (PCT)
Prior art keywords
micro
array
ultra
led
protective layer
Prior art date
Application number
PCT/CN2023/080233
Other languages
English (en)
French (fr)
Inventor
周雄图
叶金宇
张永爱
吴朝兴
郭太良
孙捷
严群
林志贤
Original Assignee
福州大学
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 福州大学 filed Critical 福州大学
Publication of WO2024031976A1 publication Critical patent/WO2024031976A1/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0066Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

Definitions

  • the present invention relates to the technical field of manufacturing semiconductor light-emitting devices, in particular to an ultra-high-resolution Micro-LED display device and its metal film bonding method.
  • LED has the advantages of high brightness, high light efficiency, long life, high contrast, and nanosecond response time. At the same time, LED is prepared using semiconductor processing technology and is compatible with IC technology. It has extremely high device processing accuracy and stability. It is expected to achieve ultra-high resolution and facilitate integration with tactile, auditory, olfactory and other sensors to achieve high-precision spatial positioning. and tactile perception, making more realistic AR and VR possible.
  • Ultra-high-resolution Micro-LED light-emitting display refers to extremely high-resolution LED display technology with nano-scale pixels. As display terminals have increasingly higher requirements for the amount of displayed information and functional integration, ultra-high-resolution Micro-LED light-emitting displays are an inevitable trend in the development of display technology. However, there are many scientific and technical problems in ultra-high-resolution Micro-LED light-emitting displays, which urgently require new strategies and transformative technologies to solve.
  • the purpose of the present invention is to provide an ultra-high-resolution Micro-LED display device and a metal film bonding method thereof, which simplifies the preparation process and can reduce edge effects and size effects that may occur in the etching process. .
  • an ultra-high-resolution Micro-LED display device The driving backplane of the Micro-LED display device and the Micro-LED chip array are interconnected using a metal film bonding method.
  • the Micro-LED chip array uses high-resistance GaN as a partition and etching protective layer; one pixel of the Micro-LED display device corresponds to N Micro-LED light-emitting arrays or Nano-LED light-emitting arrays, and N is greater than or equal to 1.
  • the high-resistance GaN includes high-defect-density GaN formed by selective high-energy ion, electron, and laser injection methods and unactivated doped GaN.
  • the metal thin film is an alloy, eutectic or multi-layer thin film array formed by mixing one or more of In, Sn, Cu, Ag, Au, Pt and Ti materials.
  • the invention also provides an ultra-high-resolution Micro-LED display device and a metal film bonding method thereof, which adopts the above-mentioned ultra-high-resolution Micro-LED display device and includes the following steps:
  • Step S11 Deposit an ion implantation protective layer on the surface of the Micro-LED epitaxial wafer, use ultraviolet lithography, electron beam lithography, variable parameter lithography or nanoimprinting to form a photoresist array on the ion implantation protective layer, and use Photoresist is used as protection to remove the exposed ion implantation protective layer to form an ion implantation protective layer array;
  • Step S12 Use the ion implantation method to control the implantation depth and lateral diffusion degree through various injection energies, and sequentially destroy the LED structure without a protective layer, including the P-type GaN layer and the multi-quantum well layer, so that the ion implantation area loses its luminescence ability and removes Ion implantation into the protective layer array forms an ultra-high-resolution Micro-LED light-emitting array;
  • Step S13 Deposit a layer of P-type GaN metal contact film on the surface of the ultra-high-resolution Micro-LED light-emitting array obtained in step S12;
  • Step S14 Spin-coat photoresist on the CMOS drive backplane and expose and develop it to form a pattern that corresponds to the ultra-high-resolution Micro-LED light-emitting array obtained in step S13. Then deposit a layer of bonding metal film and use photolithography to The adhesive is peeled off to form a patterned bonding metal film array, and finally a bonding layer metal bump array is formed through a thermal reflow process;
  • Step S15 Align and bond the ultra-high-resolution Micro-LED light-emitting array obtained in step S13 to the CMOS driving backplane obtained in step S14.
  • the undamaged area of the Micro-LED light-emitting array corresponds to the CMOS driving array one by one, and Peel off the substrate of Micro-LED epitaxial wafer;
  • Step S16 Spin-coat photoresist on the surface of the structure after peeling off the substrate obtained in step S15, and expose and develop it to form a photoresist patterned array of Micro-LED light-emitting sub-pixels as an etching protective layer.
  • the photoresist pattern The size is larger than the Micro-LED light-emitting sub-pixel size;
  • Step S17 Use a dry etching process to etch through the metal film obtained in step S13. Since the photoresist pattern size is larger than the Micro-LED light-emitting sub-pixel size, the side wall of the Micro-LED chip has high resistance. With GaN protection, the metal particles produced during the etching of the metal film will not affect the sidewalls, which can improve the luminous efficiency; remove the photoresist and obtain ultra-high-resolution Micro-LED display devices.
  • the invention also provides an ultra-high-resolution Micro-LED display device and a metal film bonding method thereof, which adopts the above-mentioned ultra-high-resolution Micro-LED display device and includes the following steps:
  • Step S21 Deposit an ion implantation protective layer on the surface of the Micro-LED epitaxial wafer, use ultraviolet lithography, electron beam lithography, variable parameter lithography or nanoimprinting to form a photoresist array on the ion implantation protective layer, and use Photoresist is used as protection to remove the exposed ion implantation protective layer to form an ion implantation protective layer array;
  • Step S22 Use the ion implantation method to control the implantation depth and lateral diffusion degree through various injection energies, and sequentially destroy the LED structure without a protective layer, including the P-type GaN layer and the multi-quantum well layer, so that the ion implantation area loses its luminescence ability and removes Ion implantation into the protective layer array forms an ultra-high-resolution Micro-LED light-emitting array;
  • Step S23 Deposit a layer of P-type GaN metal contact film on the surface of the ultra-high-resolution Micro-LED light-emitting array obtained in step S22;
  • Step S24 Deposit a layer of bonding metal film on the CMOS driving backplane
  • Step S25 Align and bond the ultra-high-resolution Micro-LED light-emitting array obtained in step S23 to the CMOS driving backplane obtained in step S24.
  • the undamaged area of the Micro-LED light-emitting array corresponds to the CMOS driving array one by one, and Peel off the substrate of Micro-LED epitaxial wafer;
  • Step S26 Spin-coat photoresist on the surface of the structure after peeling off the substrate obtained in step S25, and expose and develop it to form a photoresist patterned array of Micro-LED light-emitting sub-pixels as an etching protective layer.
  • the photoresist pattern The size is larger than the Micro-LED light-emitting sub-pixel size;
  • Step S27 Use a dry etching process to etch through the metal film obtained in steps S23 and S24. Since the photoresist pattern size is larger than the size of the Micro-LED light-emitting sub-pixel, the side wall of the Micro-LED chip has High-resistance GaN protection, the metal particles produced during the etching process of the metal film will not affect the sidewall, which can improve the luminous efficiency; remove the photoresist and obtain an ultra-high-resolution Micro-LED display device.
  • the invention also provides an ultra-high-resolution Micro-LED display device and a metal film bonding method thereof, which adopts the above-mentioned ultra-high-resolution Micro-LED display device and includes the following steps:
  • Step S31 Deposit an ion implantation protective layer on the surface of the Micro-LED epitaxial wafer, and use ultraviolet lithography, electron beam lithography, variable parameter lithography or nanoimprinting to form a photoresist nanoarray on the ion implantation protective layer, and Using photoresist as protection, remove the exposed ion implantation protective layer to form a nano-ion implantation protective layer array;
  • Step S32 Use the ion implantation method to control the injection depth and lateral diffusion degree through various injection energies, and sequentially destroy the LED structure without a protective layer, including the P-type GaN layer and the multi-quantum well layer, so that the ion implantation area loses its luminescence ability and removes Ions are implanted into the protective layer nanoarray to form an ultra-high-resolution Nano-LED light-emitting array;
  • Step S33 Deposit a layer of P-type GaN metal contact film on the surface of the ultra-high-resolution Nano-LED light-emitting array obtained in step S32;
  • Step S34 Deposit a layer of bonding metal film on the CMOS driving backplane
  • Step S35 Bond the ultra-high-resolution Nano-LED light-emitting array obtained in step S33 to the CMOS driving backplane obtained in step S34 without alignment, and peel off the substrate of the Micro-LED epitaxial wafer;
  • Step S36 Spin-coat photoresist on the surface of the structure after peeling off the substrate obtained in step S35, and expose and develop it to form a photoresist patterned array of Nano-LED light-emitting sub-pixels as an etching protective layer;
  • Step S37 Use a dry etching process to etch through the metal film obtained in steps S33 and S34.
  • the side walls of the Nano-LED chip are protected by high-resistance GaN, and the metal particles generated during the etching of the metal film are not It will affect the sidewall; remove the photoresist and obtain an ultra-high resolution Micro-LED display device.
  • CMOS driving pixel corresponds to M Nano-LEDs.
  • M is greater than or equal to 1.
  • the present invention has the following beneficial effects:
  • the present invention uses a metal film to connect the CMOS drive backplane and Micro-LED to replace the traditional bump bonding process, which can reduce or even avoid the phenomenon of uneven bonding and even circuit breakage of alignment bumps caused by the undulations of the table. .
  • the present invention adopts the method of selective ion implantation into the epitaxial layer structure. On the one hand, it can achieve excellent isolation effect between Micro-LED sub-pixels. On the other hand, the high-resistance area wrapped around the Micro-LED sub-pixels can be used as a sidewall protective layer. To avoid the impact of etching damage on sub-pixels.
  • the present invention uses a P contact film to cover N (N>1) Nano-LED sub-pixels, and then directly presses the CMOS driving backplane onto the Micro-LED array, avoiding cumbersome and complicated alignment bonding.
  • the process can also ensure that there is an effective Nano-LED light-emitting array under each piece of P contact film.
  • the present invention simplifies the preparation process, reduces the edge effect and size effect that may occur in the preparation and etching process of the independent driving electrodes of the Micro-LED array, and achieves electrical isolation between device units to a great extent, which is useful for reducing Chip cost and improving chip quality are of great significance.
  • Figure 1 is a schematic diagram of the final effect of the preparation method of the ultra-high-resolution Micro-LED display device according to the preferred embodiment 1 of the present invention.
  • FIGS 2-8 are schematic diagrams of the preparation process of the ultra-high-resolution Micro-LED display device according to the preferred embodiment 1 of the present invention.
  • Figure 9 is a schematic diagram of the final effect of the method for preparing the ultra-high-resolution Micro-LED display device according to the preferred embodiment 2 of the present invention.
  • FIGS 10-16 are schematic diagrams of the preparation process of the ultra-high-resolution Micro-LED display device according to the preferred embodiment 2 of the present invention.
  • Figure 17 is a schematic diagram of the final effect of the preparation method of the ultra-high-resolution Micro-LED display device according to the preferred embodiment 3 of the present invention.
  • Figures 18-24 are schematic diagrams of the preparation process of the ultra-high resolution Micro-LED display device according to the preferred embodiment 3 of the present invention.
  • This embodiment provides an ultra-high resolution Micro-LED display device, including an N-type GaN array 201, a multi-quantum well array 202, a P-type GaN array 203, an isolation area 301 between light-emitting sub-pixels, P contact film array 401, CMOS driving backplane 402, and bonding layer metal bump array 403.
  • a bonding layer metal bump array 403 is provided on one side of the CMOS driving backplane 402 facing the N-type GaN array 201, and a light-emitting sub-pixel array is provided on one end of the N-type GaN array 201 facing the CMOS driving backplane 402.
  • the isolation area 301 between the light-emitting sub-pixels is provided with a multi-quantum well array 202 between the isolation area 301 and the N-type GaN array 201, and a P-type GaN array 203 is provided inside the isolation area 301 between the light-emitting sub-pixels. .
  • embodiments of the present invention also provide a method for preparing the above-mentioned ultra-high-resolution Micro-LED display device, which includes the following steps:
  • Step S11 Deposit an ion implantation protective layer on the surface of the Micro-LED epitaxial wafer, use ultraviolet lithography, electron beam lithography, variable parameter lithography or nanoimprinting to form a photoresist array on the ion implantation protective layer, and use Photoresist is used as protection to remove the exposed ion implantation protective layer to form an ion implantation protective layer array;
  • Step S12 Use the ion implantation method to control the implantation depth and lateral diffusion degree through various injection energies, and sequentially destroy the LED structure without a protective layer, including the P-type GaN layer and the multi-quantum well layer, so that the ion implantation area loses its luminescence ability and removes Ion implantation into the protective layer array forms an ultra-high-resolution Micro-LED light-emitting array;
  • Step S13 Deposit a layer of P-type GaN metal contact film on the surface of the ultra-high-resolution Micro-LED light-emitting array obtained in step S12;
  • Step S14 Spin-coat photoresist on the CMOS drive backplane and expose and develop it to form a pattern that corresponds to the ultra-high-resolution Micro-LED light-emitting array obtained in step S13. Then deposit a layer of bonding metal film and use photolithography to The adhesive is peeled off to form a patterned bonding metal film array, and finally a bonding layer metal bump array is formed through a thermal reflow process;
  • Step S15 Align and bond the ultra-high-resolution Micro-LED light-emitting array obtained in step S13 to the CMOS driving backplane obtained in step S14.
  • the undamaged area of the Micro-LED light-emitting array corresponds to the CMOS driving array one by one, and Peel off the substrate of the Micro-LED epitaxial wafer.
  • Step S16 Spin-coat photoresist on the surface of the structure after peeling off the substrate obtained in step S15, and expose and develop it to form a photoresist patterned array of Micro-LED light-emitting sub-pixels as an etching protective layer.
  • the photoresist pattern The size is larger than the Micro-LED light-emitting sub-pixel size;
  • Step S17 Use a dry etching process to etch through the metal film obtained in step S13. Since the photoresist pattern size is larger than the Micro-LED light-emitting sub-pixel size, the side wall of the Micro-LED chip has high resistance. With GaN protection, the metal particles produced during the etching of the metal film will not affect the sidewalls, which can improve the luminous efficiency; remove the photoresist and obtain ultra-high-resolution Micro-LED display devices.
  • the high-energy ions used to form high-resistance GaN are fluorine ions or other particles that have the ability to destroy the GaN lattice structure.
  • the metal film is an alloy, eutectic and multi-layer film array formed by mixing one or more of In, Sn, Cu, Ag, Au, Pt and Ti materials.
  • this embodiment provides an ultra-high resolution Micro-LED display device, including an N-type GaN array 201, a multi-quantum well array 202, a P-type GaN array 203, an isolation area 301 between light-emitting sub-pixels, P contact film array 401, CMOS driving backplane 402, metal film array 403.
  • a metal film array 403 is provided on the side of the CMOS driving backplane 402 facing the N-type GaN array 201.
  • a P contact film array 401 is provided between the metal film array 403 and the N-type GaN array 201.
  • the N-type GaN array 201 faces the N-type GaN array 201.
  • One end of the CMOS driving backplane 402 is provided with an isolation area 301 between the light-emitting sub-pixels.
  • a multi-quantum well array 202 is provided between the isolation area 301 between the light-emitting sub-pixels and the N-type GaN array 201.
  • a P-type GaN array 203 is provided inside the isolation area 301 between pixels.
  • this embodiment also provides a method for preparing the above-mentioned ultra-high-resolution Micro-LED display device, which includes the following steps:
  • Step S21 Deposit an ion implantation protective layer on the surface of the Micro-LED epitaxial wafer, use ultraviolet lithography, electron beam lithography, variable parameter lithography or nanoimprinting to form a photoresist array on the ion implantation protective layer, and use Photoresist is used as protection to remove the exposed ion implantation protective layer to form an ion implantation protective layer array;
  • Step S22 Use the ion implantation method to control the implantation depth and lateral diffusion degree through various injection energies, and sequentially destroy the LED structure without a protective layer, including the P-type GaN layer and the multi-quantum well layer, so that the ion implantation area loses its luminescence ability and removes Ion implantation into the protective layer array forms an ultra-high-resolution Micro-LED light-emitting array;
  • Step S23 Deposit a layer of P-type GaN metal contact film on the surface of the ultra-high-resolution Micro-LED light-emitting array obtained in step S22;
  • Step S24 Deposit a layer of bonding metal film on the CMOS driving backplane
  • Step S25 Align and bond the ultra-high-resolution Micro-LED light-emitting array obtained in step S23 to the CMOS driving backplane obtained in step S24.
  • the undamaged area of the Micro-LED light-emitting array corresponds to the CMOS driving array one by one, and Peel off the substrate of Micro-LED epitaxial wafer;
  • Step S26 Spin-coat photoresist on the surface of the structure after peeling off the substrate obtained in step S25, and expose and develop it to form a photoresist patterned array of Micro-LED light-emitting sub-pixels as an etching protective layer.
  • the photoresist pattern The size is larger than the Micro-LED light-emitting sub-pixel size;
  • Step S27 Use a dry etching process to etch through the metal film obtained in steps S23 and S24. Since the photoresist pattern size is larger than the size of the Micro-LED light-emitting sub-pixel, the side wall of the Micro-LED chip has High-resistance GaN protection, the metal particles produced during the etching process of the metal film will not affect the sidewall, which can improve the luminous efficiency; remove the photoresist and obtain an ultra-high-resolution Micro-LED display device.
  • this embodiment provides an ultra-high resolution Micro-LED display device, including an N-type GaN array 201, a multi-quantum well array 202, a P-type GaN array 203, an isolation area 301 between light-emitting sub-pixels, P contact film array 401, CMOS driving backplane 402, metal film array 403.
  • a metal film array 403 is provided on the side of the CMOS driving backplane 402 facing the N-type GaN array 201.
  • a P contact film array 401 is provided between the metal film array 403 and the N-type GaN array 201.
  • the N-type GaN array 201 faces the N-type GaN array 201.
  • One end of the CMOS driving backplane 402 is provided with an isolation area 301 between the light-emitting sub-pixels.
  • a multi-quantum well array 202 is provided between the isolation area 301 between the light-emitting sub-pixels and the N-type GaN array 201.
  • a P-type GaN array 203 is provided inside the isolation area 301 between pixels.
  • this embodiment also provides a method for preparing the above-mentioned ultra-high-resolution Micro-LED display device, which includes the following steps:
  • Step S31 Deposit an ion implantation protective layer on the surface of the Micro-LED epitaxial wafer, and use ultraviolet lithography, electron beam lithography, variable parameter lithography or nanoimprinting to form a photoresist nanoarray on the ion implantation protective layer, and Using photoresist as protection, remove the exposed ion implantation protective layer to form a nano-ion implantation protective layer array;
  • Step S32 Use the ion implantation method to control the injection depth and lateral diffusion degree through various injection energies, and sequentially destroy the LED structure without a protective layer, including the P-type GaN layer and the multi-quantum well layer, so that the ion implantation area loses its luminescence ability and removes Ions are implanted into the protective layer nanoarray to form an ultra-high-resolution Nano-LED light-emitting array;
  • Step S33 Deposit a layer of P-type GaN metal contact film on the surface of the ultra-high-resolution Nano-LED light-emitting array obtained in step S32;
  • Step S34 Deposit a layer of bonding metal film on the CMOS driving backplane
  • Step S35 Bond the ultra-high-resolution Nano-LED light-emitting array obtained in step S33 to the CMOS driving backplane obtained in step S34 without alignment, and peel off the substrate of the Micro-LED epitaxial wafer;
  • Step S36 Spin-coat photoresist on the surface of the structure after peeling off the substrate obtained in step S35, and expose and develop it to form a photoresist patterned array of Nano-LED light-emitting sub-pixels as an etching protective layer;
  • Step S37 Use a dry etching process to etch through the metal film obtained in steps S33 and S34.
  • the side walls of the Nano-LED chip are protected by high-resistance GaN, and the metal particles generated during the etching of the metal film are not It will affect the sidewall and improve the luminous efficiency; remove the photoresist and obtain ultra-high-resolution Micro-LED display devices.
  • the metal film bonding method of an ultra-high-resolution Micro-LED display device is characterized in that two layers of metal films are used for bonding, and alignment is not required; during etching Only low alignment accuracy is required, and one CMOS driving pixel corresponds to M (greater than or equal to 1) Nano-LED light-emitting arrays.
  • the present invention uses an ion implantation method to define pixels.
  • the sub-pixels can be made smaller while ensuring uniformity.
  • the high-resistance GaN formed by ion implantation serves as a partition and etching protective layer, which can reduce sidewall etching damage and etching. Conductive particles produced by etching metal will affect the performance of the device.
  • the use of metal film bonding methods can reduce problems such as low bonding yield caused by uneven bump heights.
  • the present invention also proposes that one CMOS driving pixel corresponds to M (greater than or equal to 1) Nano-LED light-emitting arrays. It can ensure that there is at least one effective light-emitting pixel under one CMOS driving pixel without precise alignment. This method can solve the problem of micro-nano The problem of difficult alignment between CMOS and LED under pixel size.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Device Packages (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Led Devices (AREA)

Abstract

本发明提供了一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法,Micro-LED显示器件的驱动背板和Micro-LED芯片阵列采用金属薄膜键合方法进行互联,所述Micro-LED芯片阵列采用高阻GaN作为隔断和刻蚀保护层;所述Micro-LED显示器件1个像素对应N个Micro-LED发光阵列或Nano-LED发光阵列,N大于或等于1。应用本技术方案可实现简化制备工艺流程,可以减少刻蚀工艺中可能会产生的边缘效应和尺寸效应。

Description

一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法 技术领域
本发明涉及半导体发光器件制造技术领域,特别是一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法。
背景技术
 LED具有高亮度、高光效、长寿命、高对比度,以及纳秒级的响应时间等优势。同时,LED采用半导体加工工艺进行制备,并且与IC工艺兼容,具有极高的器件加工精度和稳定性,有望实现超高解析度,便于与触觉、听觉、嗅觉等传感器集成,实现高精度空间定位和触觉感知、使更具真实感的AR、VR成为可能。超高分辨率Micro-LED发光显示指具有纳米级像素的极高分辨率的LED显示技术。随着显示终端对显示信息量和功能集成度要求越来越高,超高分辨率Micro-LED发光显示是显示技术发展的必然趋势。然而,超高分辨率Micro-LED发光显示存在诸多科学技术问题,亟需全新的应对策略和变革性技术来解决。
技术问题
当发光显示像素尺寸低至微米甚至纳米级别,其电极的引出具有巨大的挑战,是超高分辨率Micro-LED发光显示要解决的关键技术难题之一,传统LED显示阵列是采用光刻和刻蚀手段来定义像素,像素与像素之间凹凸不平,且与CMOS的对位键合不均问题更是难以解决。
技术解决方案
有鉴于此,本发明的目的在于提供一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法,简化了制备工艺流程,可以减少刻蚀工艺中可能会产生的边缘效应和尺寸效应。
为实现上述目的,本发明采用如下技术方案:一种超高分辨率Micro-LED显示器件,Micro-LED显示器件的驱动背板和Micro-LED芯片阵列采用金属薄膜键合方法进行互联,所述Micro-LED芯片阵列采用高阻GaN作为隔断和刻蚀保护层;所述Micro-LED显示器件1个像素对应N个Micro-LED发光阵列或Nano-LED发光阵列,N大于或等于1。
在一较佳的实施例中,所述高阻GaN包括采用选择性高能离子、电子、激光注入方法形成的高缺陷密度GaN和未激活的掺杂GaN。
在一较佳的实施例中,所述金属薄膜为In、Sn、Cu、Ag、Au、Pt、Ti材料中的一种或多种混合形成的合金、共晶和多层薄膜阵列。
本发明还提供了一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法,采用了上述的一种超高分辨率Micro-LED显示器件,包括以下步骤:
步骤S11:在Micro-LED外延片表面沉积一层离子注入保护层,采用紫外光刻、电子束光刻、变参量光刻或纳米压印在离子注入保护层上形成光刻胶阵列,并以光刻胶作为保护,去除暴露的离子注入保护层,形成离子注入保护层阵列;
步骤S12:采用离子注入方法,通过多种注入能量控制注入深度和横向扩散程度,依次破坏没有保护层的LED结构,包括P型GaN层和多量子阱层,使离子注入区域失去发光能力,去除离子注入保护层阵列,形成超高分辨率Micro-LED发光阵列;
步骤S13:在步骤S12得到的超高分辨率Micro-LED发光阵列表面沉积一层P型GaN金属接触薄膜;
步骤S14:在CMOS驱动背板上旋涂光刻胶并曝光显影形成和步骤S13得到的超高分辨率Micro-LED发光阵列一一对应的图案,接着沉积一层键合金属薄膜,通过光刻胶剥离形成图案化的键合金属薄膜阵列,最后通过热回流工艺形成键合层金属凸点阵列;
步骤S15:将步骤S13得到的超高分辨率Micro-LED发光阵列对准键合到步骤S14得到的CMOS驱动背板上,Micro-LED发光阵列未被破坏区域与CMOS驱动阵列一一对应,并剥离Micro-LED外延片的衬底;
步骤S16:在步骤S15得到的剥离衬底后的结构表面旋涂光刻胶,并曝光显影形成Micro-LED发光子像素的光刻胶图案化阵列作为刻蚀保护层,所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸;
步骤S17:采用干法刻蚀工艺进行刻蚀,直至刻穿由步骤S13得到的金属薄膜,由于所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸,Micro-LED芯片侧壁有高阻GaN保护,在刻蚀金属薄膜过程中产生的金属颗粒不会对侧壁产生影响,可提高发光效率;去除光刻胶,得到超高分辨率Micro-LED显示器件。
本发明还提供了一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法,采用了上述的一种超高分辨率Micro-LED显示器件,包括以下步骤:
步骤S21:在Micro-LED外延片表面沉积一层离子注入保护层,采用紫外光刻、电子束光刻、变参量光刻或纳米压印在离子注入保护层上形成光刻胶阵列,并以光刻胶作为保护,去除暴露的离子注入保护层,形成离子注入保护层阵列;
步骤S22:采用离子注入方法,通过多种注入能量控制注入深度和横向扩散程度,依次破坏没有保护层的LED结构,包括P型GaN层和多量子阱层,使离子注入区域失去发光能力,去除离子注入保护层阵列,形成超高分辨率Micro-LED发光阵列;
步骤S23:在步骤S22得到的超高分辨率Micro-LED发光阵列表面沉积一层P型GaN金属接触薄膜;
步骤S24:在CMOS驱动背板上沉积一层键合金属薄膜;
步骤S25:将步骤S23得到的超高分辨率Micro-LED发光阵列对准键合到步骤S24得到的CMOS驱动背板上,Micro-LED发光阵列未被破坏区域与CMOS驱动阵列一一对应,并剥离Micro-LED外延片的衬底;
步骤S26:在步骤S25得到的剥离衬底后的结构表面旋涂光刻胶,并曝光显影形成Micro-LED发光子像素的光刻胶图案化阵列作为刻蚀保护层,所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸;
步骤S27:采用干法刻蚀工艺进行刻蚀,直至刻穿由步骤S23和S24得到的金属薄膜,由于所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸,Micro-LED芯片侧壁有高阻GaN保护,在刻蚀金属薄膜过程中产生的金属颗粒不会对侧壁产生影响,可提高发光效率;去除光刻胶,得到超高分辨率Micro-LED显示器件。
本发明还提供了一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法,采用了上述的一种超高分辨率Micro-LED显示器件,包括以下步骤:
步骤S31:在Micro-LED外延片表面沉积一层离子注入保护层,采用紫外光刻、电子束光刻、变参量光刻或纳米压印在离子注入保护层上形成光刻胶纳米阵列,并以光刻胶作为保护,去除暴露的离子注入保护层,形成纳米离子注入保护层阵列;
步骤S32:采用离子注入方法,通过多种注入能量控制注入深度和横向扩散程度,依次破坏没有保护层的LED结构,包括P型GaN层和多量子阱层,使离子注入区域失去发光能力,去除离子注入保护层纳米阵列,形成超高分辨率Nano-LED发光阵列;
步骤S33:在步骤S32得到的超高分辨率Nano-LED发光阵列表面沉积一层P型GaN金属接触薄膜;
步骤S34:在CMOS驱动背板上沉积一层键合金属薄膜;
步骤S35:将步骤S33得到超高分辨率Nano-LED发光阵列键合到步骤S34得到的CMOS驱动背板上,无需对位,并剥离Micro-LED外延片的衬底;
步骤S36:在步骤S35得到的剥离衬底后的结构表面旋涂光刻胶,并曝光显影形成Nano-LED发光子像素的光刻胶图案化阵列作为刻蚀保护层;
步骤S37:采用干法刻蚀工艺进行刻蚀,直至刻穿由步骤S33和S34得到的金属薄膜,Nano-LED芯片侧壁有高阻GaN保护,在刻蚀金属薄膜过程中产生的金属颗粒不会对侧壁产生影响;去除光刻胶,得到超高分辨率Micro-LED显示器件。
在一较佳的实施例中,采用两层金属薄膜键合,并且不需要对位;在刻蚀时只需要较低的对位精度,所述1个CMOS驱动像素对应M个Nano-LED发光阵列,M大于等于1。
有益效果
与现有技术相比,本发明具有以下有益效果:
1.本发明采用金属薄膜连接CMOS驱动背板与Micro-LED的方式来代替传统凸点键合工艺,可以降低甚至避免因台面起伏所造成的对位凸点难以键合不均匀甚至断路的现象。
2.本发明采用选区离子注入外延层结构的方式,一方面可以达到Micro-LED子像素之间优良的隔离效果,一方面包裹在Micro-LED子像素周围的高阻区域可以作为侧壁保护层来避免刻蚀损伤对子像素的影响。
3.本发明采用一块P接触薄膜覆盖N(N>1)个Nano-LED子像素的方式,之后直接将CMOS驱动背板压合在Micro-LED阵列上,避免了繁琐复杂的对位键合工艺,也能保证每一块P接触薄膜下都存在有效的Nano-LED发光阵列。
4.本发明简化了制备工艺流程,降低了Micro-LED阵列独立驱动电极的制备刻蚀工艺中可能会产生的边缘效应和尺寸效应,极大程度上实现器件单元之间的电学隔离,对于降低芯片成本,提高芯片质量方面具有重要意义。
附图说明
图1是本发明优选实施例1的超高分辨率Micro-LED显示器件的制备方法的最终效果示意图。
图2-8是本发明优选实施例1的超高分辨率Micro-LED显示器件的制备流程示意图;
图9是本发明优选实施例2的超高分辨率Micro-LED显示器件的制备方法的最终效果示意图。
图10-16是本发明优选实施例2的超高分辨率Micro-LED显示器件的制备流程示意图;
图17是本发明优选实施例3的超高分辨率Micro-LED显示器件的制备方法的最终效果示意图;
图18-24是本发明优选实施例3的超高分辨率Micro-LED显示器件的制备流程示意图。
本发明的实施方式
下面结合附图及实施例对本发明做进一步说明。
应该指出,以下详细说明都是例示性的,旨在对本申请提供进一步的说明。除非另有指明,本文使用的所有技术和科学术语具有与本申请所属技术领域的普通技术人员通常理解的相同含义。
需要注意的是,这里所使用的术语仅是为了描述具体实施方式,而非意图限制根据本申请的示例性实施方式;如在这里所使用的,除非上下文另外明确指出,否则单数形式也意图包括复数形式,此外,还应当理解的是,当在本说明书中使用术语“包含”和/或“包括”时,其指明存在特征、步骤、操作、器件、组件和/或它们的组合。
实施例
请参照图1,本实施例提供一种超高分辨率Micro-LED显示器件,包括N型GaN阵列201、多量子阱阵列202、P型GaN阵列203、发光子像素之间的隔离区域301、P接触薄膜阵列401、CMOS驱动背板402、键合层金属凸点阵列403。
CMOS驱动背板402面向所述N型GaN阵列201的一面设置有键合层金属凸点阵列403,所述N型GaN阵列201面向所述CMOS驱动背板402的一端设置有发光子像素之间的隔离区域301,所述发光子像素之间的隔离区域301与N型GaN阵列201之间设置有多量子阱阵列202,发光子像素之间的隔离区域301的内部设置有P型GaN阵列203。
如图2-8所示,本发明实施例还提供了上述超高分辨率Micro-LED显示器件的制备方法,包括如下步骤:
步骤S11:在Micro-LED外延片表面沉积一层离子注入保护层,采用紫外光刻、电子束光刻、变参量光刻或纳米压印在离子注入保护层上形成光刻胶阵列,并以光刻胶作为保护,去除暴露的离子注入保护层,形成离子注入保护层阵列;
步骤S12:采用离子注入方法,通过多种注入能量控制注入深度和横向扩散程度,依次破坏没有保护层的LED结构,包括P型GaN层和多量子阱层,使离子注入区域失去发光能力,去除离子注入保护层阵列,形成超高分辨率Micro-LED发光阵列;
步骤S13:在步骤S12得到的超高分辨率Micro-LED发光阵列表面沉积一层P型GaN金属接触薄膜;
步骤S14:在CMOS驱动背板上旋涂光刻胶并曝光显影形成和步骤S13得到的超高分辨率Micro-LED发光阵列一一对应的图案,接着沉积一层键合金属薄膜,通过光刻胶剥离形成图案化的键合金属薄膜阵列,最后通过热回流工艺形成键合层金属凸点阵列;
步骤S15:将步骤S13得到的超高分辨率Micro-LED发光阵列对准键合到步骤S14得到的CMOS驱动背板上,Micro-LED发光阵列未被破坏区域与CMOS驱动阵列一一对应,并剥离Micro-LED外延片的衬底。
步骤S16:在步骤S15得到的剥离衬底后的结构表面旋涂光刻胶,并曝光显影形成Micro-LED发光子像素的光刻胶图案化阵列作为刻蚀保护层,所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸;
步骤S17:采用干法刻蚀工艺进行刻蚀,直至刻穿由步骤S13得到的金属薄膜,由于所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸,Micro-LED芯片侧壁有高阻GaN保护,在刻蚀金属薄膜过程中产生的金属颗粒不会对侧壁产生影响,可提高发光效率;去除光刻胶,得到超高分辨率Micro-LED显示器件。
优选的,所述形成高阻GaN所采用的高能离子是氟离子或其它具有破坏GaN晶格结构能力的粒子。
优选的,所述金属薄膜为In、Sn、Cu、Ag、Au、Pt、Ti材料中的一种或多种混合形成的合金、共晶和多层薄膜阵列。
实施例
如图9所示,本实施例提供了超高分辨率Micro-LED显示器件,包括N型GaN阵列201、多量子阱阵列202、P型GaN阵列203、发光子像素之间的隔离区域301、P接触薄膜阵列401、CMOS驱动背板402、金属薄膜阵列403。
CMOS驱动背板402面向所述N型GaN阵列201的一面设置有金属薄膜阵列403,金属薄膜阵列403与N型GaN阵列201之间设置有P接触薄膜阵列401,所述N型GaN阵列201面向所述CMOS驱动背板402的一端设置有发光子像素之间的隔离区域301,所述发光子像素之间的隔离区域301与N型GaN阵列201之间设置有多量子阱阵列202,发光子像素之间的隔离区域301的内部设置有P型GaN阵列203。
如图10-16所示,本实施例还提供了上述超高分辨率Micro-LED显示器件的制备方法,包括如下步骤:
步骤S21:在Micro-LED外延片表面沉积一层离子注入保护层,采用紫外光刻、电子束光刻、变参量光刻或纳米压印在离子注入保护层上形成光刻胶阵列,并以光刻胶作为保护,去除暴露的离子注入保护层,形成离子注入保护层阵列;
步骤S22:采用离子注入方法,通过多种注入能量控制注入深度和横向扩散程度,依次破坏没有保护层的LED结构,包括P型GaN层和多量子阱层,使离子注入区域失去发光能力,去除离子注入保护层阵列,形成超高分辨率Micro-LED发光阵列;
步骤S23:在步骤S22得到的超高分辨率Micro-LED发光阵列表面沉积一层P型GaN金属接触薄膜;
步骤S24:在CMOS驱动背板上沉积一层键合金属薄膜;
步骤S25:将步骤S23得到的超高分辨率Micro-LED发光阵列对准键合到步骤S24得到的CMOS驱动背板上,Micro-LED发光阵列未被破坏区域与CMOS驱动阵列一一对应,并剥离Micro-LED外延片的衬底;
步骤S26:在步骤S25得到的剥离衬底后的结构表面旋涂光刻胶,并曝光显影形成Micro-LED发光子像素的光刻胶图案化阵列作为刻蚀保护层,所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸;
步骤S27:采用干法刻蚀工艺进行刻蚀,直至刻穿由步骤S23和S24得到的金属薄膜,由于所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸,Micro-LED芯片侧壁有高阻GaN保护,在刻蚀金属薄膜过程中产生的金属颗粒不会对侧壁产生影响,可提高发光效率;去除光刻胶,得到超高分辨率Micro-LED显示器件。
实施例
如图17所示,本实施例提供了超高分辨率Micro-LED显示器件,包括N型GaN阵列201、多量子阱阵列202、P型GaN阵列203、发光子像素之间的隔离区域301、P接触薄膜阵列401、CMOS驱动背板402、金属薄膜阵列403。为了描述准确方便,所述曝光显影形成每块光刻胶覆盖N(N大于等于1)个Nano-LED发光子像素的光刻胶图案化阵列在示意图中取N=5。
CMOS驱动背板402面向所述N型GaN阵列201的一面设置有金属薄膜阵列403,金属薄膜阵列403与N型GaN阵列201之间设置有P接触薄膜阵列401,所述N型GaN阵列201面向所述CMOS驱动背板402的一端设置有发光子像素之间的隔离区域301,所述发光子像素之间的隔离区域301与N型GaN阵列201之间设置有多量子阱阵列202,发光子像素之间的隔离区域301的内部设置有P型GaN阵列203。
如图18-24所示,本实施例还提供了上述超高分辨率Micro-LED显示器件的制备方法,包括如下步骤:
步骤S31:在Micro-LED外延片表面沉积一层离子注入保护层,采用紫外光刻、电子束光刻、变参量光刻或纳米压印在离子注入保护层上形成光刻胶纳米阵列,并以光刻胶作为保护,去除暴露的离子注入保护层,形成纳米离子注入保护层阵列;
步骤S32:采用离子注入方法,通过多种注入能量控制注入深度和横向扩散程度,依次破坏没有保护层的LED结构,包括P型GaN层和多量子阱层,使离子注入区域失去发光能力,去除离子注入保护层纳米阵列,形成超高分辨率Nano-LED发光阵列;
步骤S33:在步骤S32得到的超高分辨率Nano-LED发光阵列表面沉积一层P型GaN金属接触薄膜;
步骤S34:在CMOS驱动背板上沉积一层键合金属薄膜;
步骤S35:将步骤S33得到超高分辨率Nano-LED发光阵列键合到步骤S34得到的CMOS驱动背板上,无需对位,并剥离Micro-LED外延片的衬底;
步骤S36:在步骤S35得到的剥离衬底后的结构表面旋涂光刻胶,并曝光显影形成Nano-LED发光子像素的光刻胶图案化阵列作为刻蚀保护层;
步骤S37:采用干法刻蚀工艺进行刻蚀,直至刻穿由步骤S33和S34得到的金属薄膜,Nano-LED芯片侧壁有高阻GaN保护,在刻蚀金属薄膜过程中产生的金属颗粒不会对侧壁产生影响,提高发光效率;去除光刻胶,得到超高分辨率Micro-LED显示器件。
在第三实施例中,所述的一种超高分辨率Micro-LED显示器件的金属薄膜键合方法,其特征在于,采用两层金属薄膜键合,并且不需要对位;在刻蚀时只需要较低的对位精度,所述1个CMOS驱动像素对应M(大于等于1)个Nano-LED发光阵列。
本发明采用离子注入方法来定义像素,在保证均匀性的同时子像素可以做的更小,另外离子注入形成的高阻GaN作为隔断和刻蚀保护层,可以减小侧壁刻蚀损伤以及刻蚀金属产生导电颗粒对器件的性能影响。此外,采用金属薄膜键合方法可以降低因凸点高度不均而造成的键合良率低等问题。本发明还提出1个CMOS驱动像素对应M(大于等于1)个Nano-LED发光阵列,不用精确对位也可以保证1个CMOS驱动像素下至少有一个有效发光像素,这种方法可以解决微纳像素尺寸下CMOS与LED对位难的问题。
以上所述仅为本发明的较佳实施例,凡依本发明申请专利范围所做的均等变化与修饰,皆应属本发明的涵盖范围。

Claims (7)

  1. 一种超高分辨率Micro-LED显示器件,其特征在于,Micro-LED显示器件的驱动背板和Micro-LED芯片阵列采用金属薄膜键合方法进行互联,所述Micro-LED芯片阵列采用高阻GaN作为隔断和刻蚀保护层;所述Micro-LED显示器件1个像素对应N个Micro-LED发光阵列或Nano-LED发光阵列,N大于或等于1。
  2. 根据权利要求1所述的一种超高分辨率Micro-LED显示器件,其特征在于,所述高阻GaN包括采用选择性高能离子、电子、激光注入方法形成的高缺陷密度GaN和未激活的掺杂GaN。
  3. 根据权利要求1所述的一种超高分辨率Micro-LED显示器件,其特征在于,所述金属薄膜为In、Sn、Cu、Ag、Au、Pt、Ti材料中的一种或多种混合形成的合金、共晶和多层薄膜阵列。
  4. 一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法,其特征在于,采用了上述权利要求1至3任意一项所述的一种超高分辨率Micro-LED显示器件,包括以下步骤:
    步骤S11:在Micro-LED外延片表面沉积一层离子注入保护层,采用紫外光刻、电子束光刻、变参量光刻或纳米压印在离子注入保护层上形成光刻胶阵列,并以光刻胶作为保护,去除暴露的离子注入保护层,形成离子注入保护层阵列;
    步骤S12:采用离子注入方法,通过多种注入能量控制注入深度和横向扩散程度,依次破坏没有保护层的LED结构,包括P型GaN层和多量子阱层,使离子注入区域失去发光能力,去除离子注入保护层阵列,形成超高分辨率Micro-LED发光阵列;
    步骤S13:在步骤S12得到的超高分辨率Micro-LED发光阵列表面沉积一层P型GaN金属接触薄膜;
    步骤S14:在CMOS驱动背板上旋涂光刻胶并曝光显影形成和步骤S13得到的超高分辨率Micro-LED发光阵列一一对应的图案,接着沉积一层键合金属薄膜,通过光刻胶剥离形成图案化的键合金属薄膜阵列,最后通过热回流工艺形成键合层金属凸点阵列;
    步骤S15:将步骤S13得到的超高分辨率Micro-LED发光阵列对准键合到步骤S14得到的CMOS驱动背板上,Micro-LED发光阵列未被破坏区域与CMOS驱动阵列一一对应,并剥离Micro-LED外延片的衬底;
    步骤S16:在步骤S15得到的剥离衬底后的结构表面旋涂光刻胶,并曝光显影形成Micro-LED发光子像素的光刻胶图案化阵列作为刻蚀保护层,所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸;
    步骤S17:采用干法刻蚀工艺进行刻蚀,直至刻穿由步骤S13得到的金属薄膜,由于所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸,Micro-LED芯片侧壁有高阻GaN保护,在刻蚀金属薄膜过程中产生的金属颗粒不会对侧壁产生影响,可提高发光效率;去除光刻胶,得到超高分辨率Micro-LED显示器件。
  5. 一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法,其特征在于,采用了上述权利要求1至3任意一项所述的一种超高分辨率Micro-LED显示器件,包括以下步骤:
    步骤S21:在Micro-LED外延片表面沉积一层离子注入保护层,采用紫外光刻、电子束光刻、变参量光刻或纳米压印在离子注入保护层上形成光刻胶阵列,并以光刻胶作为保护,去除暴露的离子注入保护层,形成离子注入保护层阵列;
    步骤S22:采用离子注入方法,通过多种注入能量控制注入深度和横向扩散程度,依次破坏没有保护层的LED结构,包括P型GaN层和多量子阱层,使离子注入区域失去发光能力,去除离子注入保护层阵列,形成超高分辨率Micro-LED发光阵列;
    步骤S23:在步骤S22得到的超高分辨率Micro-LED发光阵列表面沉积一层P型GaN金属接触薄膜;
    步骤S24:在CMOS驱动背板上沉积一层键合金属薄膜;
    步骤S25:将步骤S23得到的超高分辨率Micro-LED发光阵列对准键合到步骤S24得到的CMOS驱动背板上,Micro-LED发光阵列未被破坏区域与CMOS驱动阵列一一对应,并剥离Micro-LED外延片的衬底;
    步骤S26:在步骤S25得到的剥离衬底后的结构表面旋涂光刻胶,并曝光显影形成Micro-LED发光子像素的光刻胶图案化阵列作为刻蚀保护层,所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸;
    步骤S27:采用干法刻蚀工艺进行刻蚀,直至刻穿由步骤S23和S24得到的金属薄膜,由于所述光刻胶图案尺寸大于Micro-LED发光子像素尺寸,Micro-LED芯片侧壁有高阻GaN保护,在刻蚀金属薄膜过程中产生的金属颗粒不会对侧壁产生影响,可提高发光效率;去除光刻胶,得到超高分辨率Micro-LED显示器件。
  6. 一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法,其特征在于,采用了上述权利要求1至3任意一项所述的一种超高分辨率Micro-LED显示器件,包括以下步骤:
    步骤S31:在Micro-LED外延片表面沉积一层离子注入保护层,采用紫外光刻、电子束光刻、变参量光刻或纳米压印在离子注入保护层上形成光刻胶纳米阵列,并以光刻胶作为保护,去除暴露的离子注入保护层,形成纳米离子注入保护层阵列;
    步骤S32:采用离子注入方法,通过多种注入能量控制注入深度和横向扩散程度,依次破坏没有保护层的LED结构,包括P型GaN层和多量子阱层,使离子注入区域失去发光能力,去除离子注入保护层纳米阵列,形成超高分辨率Nano-LED发光阵列;
    步骤S33:在步骤S32得到的超高分辨率Nano-LED发光阵列表面沉积一层P型GaN金属接触薄膜;
    步骤S34:在CMOS驱动背板上沉积一层键合金属薄膜;
    步骤S35:将步骤S33得到超高分辨率Nano-LED发光阵列键合到步骤S34得到的CMOS驱动背板上,无需对位,并剥离Micro-LED外延片的衬底;
    步骤S36:在步骤S35得到的剥离衬底后的结构表面旋涂光刻胶,并曝光显影形成Nano-LED发光子像素的光刻胶图案化阵列作为刻蚀保护层;
    步骤S37:采用干法刻蚀工艺进行刻蚀,直至刻穿由步骤S33和S34得到的金属薄膜,Nano-LED芯片侧壁有高阻GaN保护,在刻蚀金属薄膜过程中产生的金属颗粒不会对侧壁产生影响;去除光刻胶,得到超高分辨率Micro-LED显示器件。
  7. 根据权利要求6所述的一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法,其特征在于,采用两层金属薄膜键合,并且不需要对位;在刻蚀时只需要较低的对位精度,所述1个CMOS驱动像素对应M个Nano-LED发光阵列,M大于等于1。
PCT/CN2023/080233 2022-08-12 2023-03-08 一种超高分辨率micro-led显示器件及其金属薄膜键合方法 WO2024031976A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202210965384.5 2022-08-12
CN202210965384.5A CN115332238A (zh) 2022-08-12 2022-08-12 一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法

Publications (1)

Publication Number Publication Date
WO2024031976A1 true WO2024031976A1 (zh) 2024-02-15

Family

ID=83923078

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2023/080233 WO2024031976A1 (zh) 2022-08-12 2023-03-08 一种超高分辨率micro-led显示器件及其金属薄膜键合方法

Country Status (2)

Country Link
CN (1) CN115332238A (zh)
WO (1) WO2024031976A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115332238A (zh) * 2022-08-12 2022-11-11 福州大学 一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012084778A (ja) * 2010-10-14 2012-04-26 Hitachi Cable Ltd 半導体発光素子
CN107887331A (zh) * 2017-11-11 2018-04-06 福州大学 一种Micro‑LED发光显示器件的制备方法
CN110010542A (zh) * 2019-04-18 2019-07-12 广东省半导体产业技术研究院 微型led器件、微型led阵列及制造方法
CN215955302U (zh) * 2021-10-26 2022-03-04 中国科学院苏州纳米技术与纳米仿生研究所 基于光电隔离的Micro-LED器件
CN115332238A (zh) * 2022-08-12 2022-11-11 福州大学 一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012084778A (ja) * 2010-10-14 2012-04-26 Hitachi Cable Ltd 半導体発光素子
CN107887331A (zh) * 2017-11-11 2018-04-06 福州大学 一种Micro‑LED发光显示器件的制备方法
CN110010542A (zh) * 2019-04-18 2019-07-12 广东省半导体产业技术研究院 微型led器件、微型led阵列及制造方法
CN215955302U (zh) * 2021-10-26 2022-03-04 中国科学院苏州纳米技术与纳米仿生研究所 基于光电隔离的Micro-LED器件
CN115332238A (zh) * 2022-08-12 2022-11-11 福州大学 一种超高分辨率Micro-LED显示器件及其金属薄膜键合方法

Also Published As

Publication number Publication date
CN115332238A (zh) 2022-11-11

Similar Documents

Publication Publication Date Title
TW564492B (en) Display element and display unit using the same
TW527739B (en) Method for patterning devices
TW550733B (en) Wiring method and element arranging method using the same, and method of producing image display devices
WO2024031976A1 (zh) 一种超高分辨率micro-led显示器件及其金属薄膜键合方法
CN104617121A (zh) 一种提高有源矩阵微型led显示器光学性能的方法
KR102524797B1 (ko) 전기적 컨택이 향상된 초소형 led 전극 어셈블리 및 이의 제조 방법
CN113299803B (zh) 一种Micro LED芯片单体器件的制备方法、显示模块及显示装置
CN111883553A (zh) 无需巨量转移操作的Micro LED显示面板制备方法
US20230154932A1 (en) Array substrate and fabrication method thereof, and display device
TWI664750B (zh) Led晶片及其製造方法、顯示面板以及電子設備
CN110444562A (zh) 一种显示面板及显示装置
WO2021203501A1 (zh) 阵列基板的制造方法、阵列基板和显示装置
JP2003209295A (ja) 電子部品及びその製造方法、これを用いた画像表示装置
WO2023142203A1 (zh) 一种彩色Micro LED显示芯片模组的制造方法
WO2021102764A1 (zh) 一种显示基板及其制造方法
CN114843317A (zh) 一种无机-有机led混合彩色显示器件及其制备方法
JP2003078171A (ja) 配線及びその形成方法、接続孔及びその形成方法、配線形成体及びその形成方法、表示素子及びその形成方法、画像表示装置及びその製造方法
CN113437189A (zh) 一种可寻址纳米led发光显示阵列结构及其制备方法
CN116093217A (zh) 微米发光器件及其制备方法
TWI676285B (zh) 無電極遮光之發光二極體顯示器的結構及其製程
CN214898480U (zh) 一种Micro LED芯片单体器件、显示模块及显示装置
CN107452769B (zh) 一种oled微型显示器及其焊盘键合方法
CN216054776U (zh) 新型微型led封装结构
CN112802886A (zh) 一种Micro OLED显示器及其生产方法
CN219658728U (zh) 一种Micro LED显示器件和Micro LED芯片

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 23851212

Country of ref document: EP

Kind code of ref document: A1