WO2024002549A1 - Circuit d'évaluation pour un capteur et système de capteur - Google Patents

Circuit d'évaluation pour un capteur et système de capteur Download PDF

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Publication number
WO2024002549A1
WO2024002549A1 PCT/EP2023/060807 EP2023060807W WO2024002549A1 WO 2024002549 A1 WO2024002549 A1 WO 2024002549A1 EP 2023060807 W EP2023060807 W EP 2023060807W WO 2024002549 A1 WO2024002549 A1 WO 2024002549A1
Authority
WO
WIPO (PCT)
Prior art keywords
evaluation circuit
sensor
output
designed
amplifier stage
Prior art date
Application number
PCT/EP2023/060807
Other languages
German (de)
English (en)
Inventor
Yunan Fu
Tobias Maier
Alice LANNIEL
Original Assignee
Robert Bosch Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch Gmbh filed Critical Robert Bosch Gmbh
Publication of WO2024002549A1 publication Critical patent/WO2024002549A1/fr

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/14—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
    • G01D5/24—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance

Definitions

  • the present invention relates to an evaluation circuit for a sensor and a sensor system.
  • the present invention relates to an evaluation circuit for a capacitive sensor and a sensor system with a capacitive sensor.
  • Sensors can be used, for example, to provide an output signal corresponding to a physical quantity.
  • a voltage signal corresponding to the monitored physical quantity can be provided as an output variable.
  • MEMS microelectromechanical systems
  • the document DE 10 2012 200 929 B4 describes, for example, a micromechanical acceleration sensor and a corresponding manufacturing process.
  • a sensor variable such as an acceleration
  • a change in capacitance within the sensor can be detected.
  • a voltage change in a node between two capacitive elements can be monitored in order to draw conclusions about the sensor value.
  • an evaluation circuit can be connected in particular to the node, which provides an output signal corresponding to the change in capacity and thus to the change in voltage.
  • An evaluation circuit for a capacitive sensor with an input connection, an amplifier stage and an integrator The input port is designed to be electrically coupled to an output port of the capacitive sensor.
  • the amplifier stage is electrically coupled to the input terminal. Furthermore, the amplifier stage is designed to provide an output current that corresponds to an electrical voltage at the input connection.
  • the integrator includes an operational amplifier. The integrator is designed to integrate the output current of the amplifier stage over a predetermined period of time. Furthermore, the integrator is designed to provide an electrical output voltage that corresponds to the integrated current.
  • a sensor system with a capacitive sensor and an evaluation circuit according to the invention is designed to provide an electrical voltage corresponding to a sensor size.
  • the present invention is based on the knowledge that the processing of a signal provided by a sensor for further processing is of crucial importance.
  • the generally relatively weak signals from the sensor must be amplified with as little noise as possible with sufficient bandwidth and without any further influences.
  • it is desirable to have a signal with sufficient output as the output signal To provide output power in a form that is suitable for further processing.
  • a corresponding evaluation circuit is usually connected to the sensor connection of a sensor.
  • the output variable provided by the sensor should be amplified with as little noise as possible and without or at least with as little influence as possible.
  • a signal as an output signal that has both power and signal form, i.e. H. Current or voltage can meet the requirements for desired further processing.
  • Sensors or sensor systems with sensor components based on microelectronic systems in particular generally initially provide a sensor signal, which must be amplified and processed.
  • accelerations can be detected by a sensor element in which the sensor element comprises a mass element between two capacitive elements.
  • This mass element can be deflected by an acting acceleration, so that the capacities of the capacitive elements change accordingly.
  • This also changes an electrical voltage at a node in the series connection of these two capacitive elements. This voltage change can be detected and processed using an appropriate evaluation circuit in order to provide a corresponding output signal.
  • a transconductance amplifier can be understood as any type of circuit arrangement which supplies an electrical output current corresponding to this electrical input voltage from an electrical input voltage.
  • An integrator is considered to be a circuit arrangement which continuously sums up or integrates the current output by the amplifier stage, in particular over a predetermined period of time, and outputs a corresponding signal, for example an electrical voltage corresponding to the sum or the integral.
  • a corresponding signal for example an electrical voltage corresponding to the sum or the integral.
  • the corresponding output signal can continue to be output constantly.
  • This constant output signal can be output constantly for a further predetermined period of time.
  • a new summation or integration period can then be carried out. If necessary, the previous integrated value can be reset at the beginning of this new summation or integration section. Alternatively, the previous integrated value can be retained and used as starting values for the next summation or integration.
  • the integrator of the evaluation circuit is not only implemented by a capacitor, which is charged by the output current of the transconductance amplifier, but by an electronic circuit, in particular a circuit with an operational amplifier.
  • the integrator therefore includes at least one operational amplifier and possibly other components.
  • a capacitor can be between one Input connection of such an operational amplifier and the output connection of the operational amplifier may be provided.
  • Such an arrangement of the integrator with operational amplifier can reduce the noise, so that a significantly lower-noise gain can be achieved.
  • the amplifier stage can comprise a two-stage amplifier device with an input amplifier and a downstream transconductance amplifier. This means that an offset in the amplifier stage can be compensated for without necessarily having to provide coupling capacitors or the like. This has an advantageous effect on the noise behavior.
  • the transconductance amplifier of the amplifier stage and/or the integrator may be designed to operate with Correlated Double Seedling (CDS). For example, an undesirable offset can be compensated for using such correlated double scanning.
  • CDS Correlated Double Seedling
  • the evaluation circuit comprises a control device.
  • the control device can be designed to periodically set several phases one after the other in the evaluation circuit.
  • at least one integration phase and one readout phase can be periodically set in the evaluation circuit.
  • the electrical current output by the amplifier stage can first be summed up or integrated for the duration of the integration phase. The result can then be made available at the end of this integration phase for the duration of the readout phase.
  • the evaluation circuit is designed to integrate the output current of the amplifier stage in the integration phase. After completion of the integration phase, an output signal corresponding to the integrated current can be provided. The value of the previous integration phase can then be reset before the start of another integration phase. Alternatively, it is also possible that the The subsequent integration phase uses the value of the previous integration phase as starting values.
  • the evaluation circuit is designed to provide an output voltage in the readout phase that corresponds to the integrated current at the end of the previous integration phase. Accordingly, a constant value is available during this readout phase, which corresponds to the integrated current at the end of the integration phase.
  • the evaluation circuit comprises a sample-and-hold (S&H) element.
  • This sample-and-hold element can be designed to sample the electrical voltage provided by the integrator at predetermined times and to provide an output signal corresponding to the sampled voltage. Accordingly, the value sampled by the sample-and-hold element is constantly available as a readout value for a predetermined period of time.
  • control device is designed to set a reset phase before the integration phase.
  • the amplifier stage can be coupled to a reference potential on the input side. In this way, a kind of initialization can be carried out in order to compensate for an existing offset or similar or to reset the values integrated up to this point in time.
  • Fig. 4 a schematic representation of an exemplary circuit diagram of an evaluation circuit for a sensor system according to an embodiment.
  • FIG. 1 shows a schematic representation of a block diagram of a sensor system according to an embodiment.
  • the sensor system includes a sensor 2 and an evaluation circuit 1 connected to the sensor 2.
  • the sensor 2 can be, for example, an acceleration sensor.
  • a series connection of two capacitive elements CI and C2 can be designed in such a way that a mass element at a node K between the two capacitive elements CI and C2 is deflected when an acceleration occurs, thereby changing the capacitances of the capacitive elements CI and C2.
  • the potential at node K also changes accordingly. This change in voltage at node K can be caused by the connected evaluation circuit 1 are detected and a corresponding output signal is generated.
  • the sensor 2 can be implemented, for example, using a microelectromechanical system (MEMS).
  • MEMS microelectromechanical system
  • a sensor connection S electrically coupled to the node K can be electrically coupled to an input connection E of the evaluation circuit 1.
  • an electrical connection can be established between the sensor connection S and the input connection E.
  • An electrical voltage is therefore present at the input connection E of the evaluation circuit 1, which corresponds to the voltage at the node K between the two capacitive elements CI and CI.
  • the electrical voltage present at the input connection E can be supplied to an amplifier stage 10. If necessary, an optional element, for example a capacitor, can be provided between the input terminal E and the amplifier stage 10.
  • the amplifier stage 10 generates an electrical output current which corresponds to the electrical voltage at the input of the amplifier stage 10 and thus the electrical voltage at the input connection E.
  • the amplifier stage 10 can include a transconductance amplifier or similar. This electrical current is provided at an output of the amplifier stage 10.
  • the output current of the amplifier stage 10 is fed to an integrator 20.
  • This integrator 20 integrates or sums the electrical current output by the amplifier stage 10 and outputs an output signal corresponding to the integral or the sum.
  • an integrator 20 with an operational amplifier or similar can be provided for this purpose.
  • This output signal can be, for example, an electrical voltage whose level corresponds to the sum or the integral of the electrical current provided on the input side.
  • This output signal of the Integrator 20 can be provided at an output connection A of the evaluation circuit 1.
  • the operation of the evaluation circuit 1 can be divided into at least two phases.
  • the integrator 20 can already integrate the output current from the amplifier stage 10.
  • this integration can be stopped or interrupted and an output signal can be provided which corresponds to the result of the integration up to this point in time.
  • a switch S2 can be provided between the amplifier stage 10 and the integrator 20. This switch S2 can be closed during the integration phase in order to connect the output of the amplifier stage 10 to the input of the integrator 20. During the output phase, this switch S2 is opened so that no further integration of a current takes place and a constant value is output at the output of the integrator 20.
  • a further switch S1 is closed, which is arranged between the output of the amplifier stage 10 and, for example, the reference potential.
  • the electrical current output by the amplifier stage 10 can therefore flow through this switch S1 during the output phase.
  • FIG. 2 shows a time diagram of the integration and readout times to illustrate the processes in the previously described arrangement with the evaluation circuit 1.
  • a first time period II of the integration phase the switch S2 between the output of the amplifier stage 10 and the input of the integrator 20 is closed, so that the electrical current output by the amplifier stage 10 is summed up or integrated by the integrator 20.
  • the switch S1 is open here.
  • the switch S2 is open and the switch S1 is closed.
  • time period I there is no further integration of the electrical current output by the amplifier stage 10, so that a constant signal is output at the output of the integrator 20.
  • the change between integration phase and The output phase can, for example, take place periodically with a period duration T.
  • an integration can take place for half a period T/2 and an output phase for the remaining half a period T/2.
  • other relationships between the integration phase and the output phase are also possible.
  • the integration value is not reset at the beginning of the integration or between the individual integration phases I.
  • the integration adds the input signal to the final value of the previous integration.
  • a reset of the integration value can be provided. For example, such a reset can prevent the integration value from reaching a maximum possible value and then no further summation/integration being possible.
  • FIG. 3 shows a schematic representation of the block diagram of a sensor system with an evaluation circuit 1 according to a further embodiment.
  • the embodiment according to FIG. 3 differs from the previously described embodiment according to FIG. 1 in particular in that a sample-and-hold element 30 is also connected downstream of the integrator 20. This sample and hold element 30 detects the output value of the integrator 20 at a predetermined time or times and then provides a constant output signal which corresponds to the value received on the input side.
  • the individual components such as amplifier stage 10, integrator 20 and possibly also the sample-and-hold element 30, can be designed as components with correlated double sampling (CDS).
  • CDS correlated double sampling
  • the input signal is processed and the corresponding output signal is output by the respective component.
  • the inverted output signal can be fed back to the input.
  • an offset of the input signal can be compensated. This process can be carried out regularly, for example periodically.
  • Figure 4 shows a schematic representation of an exemplary circuit diagram for a sensor system with an evaluation circuit 1 according to an embodiment.
  • the amplifier stage 10 is exemplary designed as an upstream voltage amplifier 11 with a downstream transconductance amplifier 12 for converting the output voltage from the voltage amplifier 11 into a corresponding electrical current.
  • Coupling capacitors C_k can be provided between the input connection E and the amplifier stage 10, as well as between the other components of the evaluation circuit 1.
  • the values of the coupling capacitors C_k between individual stages can be selected individually depending on the version.
  • the amplifier stage 10 is designed, for example, as a voltage amplifier 11 with a downstream transconductance amplifier 12 for current-voltage conversion.
  • the evaluation circuit 1 of this embodiment can be operated in three phases, for example.
  • a first reset phase the individual components can be reset or initialized.
  • a subsequent measurement and integration phase the previously described integration of the electrical current output by the amplifier stage 10 takes place.
  • readout phase 3 a constant signal value is output which corresponds to the value at the end of the integration phase. This value can be picked up, ie received, by the sample-and-hold element 30 in the readout phase 3 and then provided as an output value at the output of the sample-and-hold element 30.
  • the switching times of the individual switching elements are represented by the designations ⁇ j>l for the first time interval of the reset phase, ⁇ f>2 for the second time interval of the integration phase and ⁇ f>3 for the readout phase shown on the respective switching elements. Accordingly, for example, t
  • the present invention relates to an evaluation circuit for a capacitive sensor and a sensor system with such
  • the evaluation circuit includes a preferably two-stage amplifier stage with a transconductance amplifier for converting a voltage signal from the sensor into an electrical current and a downstream integration of the electrical current from the amplifier stage.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne un circuit d'évaluation pour un capteur capacitif et un système de capteur comprenant un tel circuit d'évaluation. Le circuit d'évaluation comprend un étage amplificateur avec un amplificateur à transconductance pour convertir un signal de tension provenant du capteur en un courant électrique, et une intégration en aval du courant électrique provenant de l'étage amplificateur.
PCT/EP2023/060807 2022-06-29 2023-04-25 Circuit d'évaluation pour un capteur et système de capteur WO2024002549A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102022206600.6 2022-06-29
DE102022206600.6A DE102022206600A1 (de) 2022-06-29 2022-06-29 Auswerteschaltung für einen Sensor und Sensorsystem

Publications (1)

Publication Number Publication Date
WO2024002549A1 true WO2024002549A1 (fr) 2024-01-04

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Application Number Title Priority Date Filing Date
PCT/EP2023/060807 WO2024002549A1 (fr) 2022-06-29 2023-04-25 Circuit d'évaluation pour un capteur et système de capteur

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DE (1) DE102022206600A1 (fr)
WO (1) WO2024002549A1 (fr)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020050861A1 (en) * 2000-02-15 2002-05-02 Nguyen Thinh Cat Variable transconductance variable gain amplifier utilizing a degenerated differential pair
US20090205436A1 (en) * 2005-09-29 2009-08-20 Garverick Steven L Wireless sensor platform for harsh environments
US20150061769A1 (en) * 2013-08-29 2015-03-05 Analog Devices Technology Closed loop control system, and an amplifier in combination with such a closed loop control system
US20170207761A1 (en) * 2016-01-15 2017-07-20 Melexis Technologies Sa Low noise amplifier circuit
US20190068146A1 (en) * 2016-01-15 2019-02-28 Melexis Technologies Sa Integration-based low noise amplifiers for sensors
DE102012200929B4 (de) 2012-01-23 2020-10-01 Robert Bosch Gmbh Mikromechanische Struktur und Verfahren zur Herstellung einer mikromechanischen Struktur

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3216455B2 (ja) 1994-12-22 2001-10-09 株式会社村田製作所 容量型静電サーボ加速度センサ
US11743647B2 (en) 2018-12-11 2023-08-29 Knowles Electronics, Llc. Multi-rate integrated circuit connectable to a sensor
DE102020203036A1 (de) 2020-03-10 2021-09-16 Robert Bosch Gesellschaft mit beschränkter Haftung Schaltung zum Betreiben eines kapazitiven Sensors sowie zugehörige Sensorvorrichtung

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020050861A1 (en) * 2000-02-15 2002-05-02 Nguyen Thinh Cat Variable transconductance variable gain amplifier utilizing a degenerated differential pair
US20090205436A1 (en) * 2005-09-29 2009-08-20 Garverick Steven L Wireless sensor platform for harsh environments
DE102012200929B4 (de) 2012-01-23 2020-10-01 Robert Bosch Gmbh Mikromechanische Struktur und Verfahren zur Herstellung einer mikromechanischen Struktur
US20150061769A1 (en) * 2013-08-29 2015-03-05 Analog Devices Technology Closed loop control system, and an amplifier in combination with such a closed loop control system
US20170207761A1 (en) * 2016-01-15 2017-07-20 Melexis Technologies Sa Low noise amplifier circuit
US20190068146A1 (en) * 2016-01-15 2019-02-28 Melexis Technologies Sa Integration-based low noise amplifiers for sensors

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DE102022206600A1 (de) 2024-01-04

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