WO2024001779A1 - Super junction power device - Google Patents
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
Abstract
Disclosed in the present application is a super junction power device. The super junction power device comprises a first semiconductor layer and a second semiconductor layer, which are arranged in a stacked manner, wherein the first semiconductor layer comprises an active region and a terminal region, the terminal region is arranged on an outer side of the active region in a surrounding manner, and the terminal region comprises a side terminal region and a corner terminal region, which are arranged at an interval in the circumferential direction of the active region; and the second semiconductor layer comprises a super junction region, the super junction region comprises a plurality of super junction columns, the contour of the super junction region in a first orthographic projection region of the first semiconductor layer comprises a first contour section, the first contour section corresponds to the corner terminal region, and the first contour section is an arc-shaped contour. By means of the super junction power device provided in the embodiments of the present application, the contour of a corner terminal region corresponding to a super junction region is set to be of a non-planar structure, such that the electric-field aggregation effect of the device is reduced, thereby improving the BV capability of the device.
Description
本申请基于并要求于2022年06月30日递交的申请号为202210777273.1、申请名称为“超级结功率器件”的中国专利申请的优先权。This application is based on and claims priority to the Chinese patent application with application number 202210777273.1 and the application name "Super Junction Power Device" submitted on June 30, 2022.
本申请特别涉及一种超级结功率器件，属于半导体技术领域。This application particularly relates to a super junction power device, which belongs to the field of semiconductor technology.
超级结(SJ，Super Junction)技术为高压大功率器件设计提供新的解决方案，使得功率器件在不牺牲反向耐压能力的前提下，有效改善器件的导通特性。目前，该技术已经在Si基功率器件得到验证和推广，如超级结MOSFET、超级结IGBT等。Super Junction (SJ) technology provides new solutions for the design of high-voltage and high-power devices, allowing power devices to effectively improve the conduction characteristics of the device without sacrificing reverse voltage withstand capability. At present, this technology has been verified and promoted in Si-based power devices, such as super junction MOSFET, super junction IGBT, etc.
超级结功率器件的结构如图1和图2所示，其主要包括有源区1、超级结3、截止环4、侧边终端区2和拐角终端区5；在该结构中，超级结的外侧轮廓、截止环在拐角位置均呈直角，而由于直角拐角位置的电场聚集效应，致使器件在拐角位置最容易发生方向击穿，从而限制了器件的方向承压能力。The structure of the super junction power device is shown in Figures 1 and 2, which mainly includes active area 1, super junction 3, cutoff ring 4, side terminal area 2 and corner terminal area 5; in this structure, the super junction The outer contour and cutoff ring are both at right angles at the corners. Due to the electric field concentration effect at the right-angle corners, the device is most likely to undergo directional breakdown at the corners, thus limiting the device's directional pressure-bearing capability.
申请内容Application content
本申请的主要目的在于提供一种超级结功率器件，从而克服现有技术中的不足。The main purpose of this application is to provide a super junction power device to overcome the deficiencies in the prior art.
为实现前述申请目的，本申请采用的技术方案包括：In order to achieve the aforementioned application purpose, the technical solutions adopted in this application include:
本申请实施例提供了一种超级结功率器件，包括叠层设置的第一半导体层和第二半导体层，所述第一半导体层包括有源区和终端区，所述终端区环绕设置在所述有源区外侧，且所述终端区包括沿有源区的周向间隔设置的侧边终端区和拐角终端区；所述第二半导体层包括超级结区，
所述超级结区包括多个超级结柱，所述超级结区在所述第一半导体层上的第一正投影区域的轮廓包括第一轮廓段，所述第一轮廓段与所述拐角终端区相对应且所述第一轮廓段为弧形轮廓。Embodiments of the present application provide a super junction power device, including a first semiconductor layer and a second semiconductor layer arranged in a stack. The first semiconductor layer includes an active region and a terminal region, and the terminal region is arranged around the outside the active region, and the terminal region includes side terminal regions and corner terminal regions spaced apart along the circumferential direction of the active region; the second semiconductor layer includes a super junction region, The super junction region includes a plurality of super junction pillars, an outline of a first orthographic projection area of the super junction region on the first semiconductor layer includes a first outline segment, and the first outline segment is connected to the corner terminal The first contour segment corresponds to the area and is an arc-shaped contour.
与现有技术相比，本申请的优点包括：Compared with the existing technology, the advantages of this application include:
1)本申请实施例提供的一种超级结功率器件，将超级结区对应拐角终端区的轮廓设置为非平面结构，而使器件超级结区拐角位置的电场平坦化，降低了器件的电场聚集效应，从而提升了器件的BV能力；1) In a super junction power device provided by the embodiment of the present application, the outline of the corner terminal area corresponding to the super junction area is set to a non-planar structure, thereby flattening the electric field at the corner position of the super junction area of the device and reducing the electric field concentration of the device. effect, thus improving the BV capability of the device;
2)本申请实施例提供的一种超级结功率器件，在新型终端结构中，直角终端引发的电场聚集效应得以减弱，同等器件尺寸条件下，本申请实施例提供的一种超级结功率器件的反向阻断能力显著提升。2) In the new terminal structure of the super junction power device provided by the embodiment of the present application, the electric field concentration effect caused by the right-angle terminal is weakened. Under the condition of the same device size, the super junction power device provided by the embodiment of the present application has The reverse blocking ability is significantly improved.
图1是现有技术中一种超级结功率器件的结构示意图；Figure 1 is a schematic structural diagram of a super junction power device in the prior art;
图2是现有技术中一种超级结功率器件的局部结构示意图；Figure 2 is a partial structural schematic diagram of a super junction power device in the prior art;
图3是本申请实施例1中的一种超级结功率器件的局部结构示意图；Figure 3 is a partial structural schematic diagram of a super junction power device in Embodiment 1 of the present application;
图4a、图4b分别是理想的平行平面结和实际平面结的结构示意图；Figure 4a and Figure 4b are the structural schematic diagrams of the ideal parallel plane junction and the actual plane junction respectively;
图5是本申请实施例2中的一种超级结功率器件的局部结构示意图；Figure 5 is a partial structural schematic diagram of a super junction power device in Embodiment 2 of the present application;
图6是本申请实施例3中的一种超级结功率器件的局部结构示意图。Figure 6 is a partial structural diagram of a super junction power device in Embodiment 3 of the present application.
鉴于现有技术中的不足，本案申请人经长期研究和大量实践，得以提出本申请的技术方案。如下将对该技术方案、其实施过程及原理等作进一步的解释说明。In view of the shortcomings in the existing technology, the applicant of this case was able to propose the technical solution of this application after long-term research and extensive practice. The technical solution, its implementation process and principles will be further explained below.
本申请实施例中所涉及的术语解释：Explanation of terms involved in the embodiments of this application:
超级结：Super Junction结构，由交叉分布的P型和N型掺杂区构成，当上述区域全部耗尽时，内部电场呈平坦分布，从而满足功率器件承压需求。Super Junction: Super Junction structure consists of cross-distributed P-type and N-type doped regions. When the above regions are all depleted, the internal electric field is flatly distributed, thus meeting the pressure requirements of power devices.
终端：为满足高压功率器件承压需求，在芯片外侧设计的外围结构，称为功率器件终端。
Terminal: In order to meet the pressure requirements of high-voltage power devices, the peripheral structure designed outside the chip is called the power device terminal.
本申请实施例提供了一种超级结功率器件，包括叠层设置的第一半导体层和第二半导体层，所述第一半导体层包括有源区和终端区，所述终端区环绕设置在所述有源区外侧，且所述终端区包括沿有源区的周向间隔设置的侧边终端区和拐角终端区；所述第二半导体层包括超级结区，所述超级结区包括多个超级结柱，所述超级结区在所述第一半导体层上的第一正投影区域的轮廓包括第一轮廓段，所述第一轮廓段与所述拐角终端区相对应且所述第一轮廓段为弧形轮廓。Embodiments of the present application provide a super junction power device, including a first semiconductor layer and a second semiconductor layer arranged in a stack. The first semiconductor layer includes an active region and a terminal region, and the terminal region is arranged around the outside the active region, and the terminal region includes side terminal regions and corner terminal regions spaced apart along the circumferential direction of the active region; the second semiconductor layer includes a super junction region, and the super junction region includes a plurality of Super junction pillar, the outline of the first orthographic projection area of the super junction area on the first semiconductor layer includes a first outline segment, the first outline segment corresponds to the corner terminal area and the first The contour segment is an arc contour.
在一具体实施案例中，所述第一轮廓段为向外凸出的弧形轮廓。In a specific implementation, the first profile segment is an outwardly protruding arc-shaped profile.
在一具体实施案例中，所述第一轮廓段为圆弧形轮廓。In a specific implementation, the first profile segment is an arc-shaped profile.
在一具体实施案例中，所述第一轮廓段对应的圆心角为90°。In a specific implementation, the central angle corresponding to the first contour segment is 90°.
在一具体实施案例中，所述第一轮廓段的曲率半径为所述超级结柱高度的0.2-5倍。In a specific implementation, the radius of curvature of the first contour segment is 0.2-5 times the height of the super junction column.
在一具体实施案例中，所述超级结区在所述第一半导体层上的正投影区域的轮廓为圆角矩形轮廓。In a specific implementation, the outline of the orthographic projection area of the super junction region on the first semiconductor layer is a rounded rectangular outline.
在一具体实施案例中，所述超级结区包括第一部分和第二部分，所述第一部分沿第一方向对应设置在所述第二部分的两侧，In a specific implementation, the super junction area includes a first part and a second part, and the first part is correspondingly arranged on both sides of the second part along the first direction,
所述第一部分包括沿第一方向间隔设置的多个超级结柱，每一所述超级结柱沿第二方向延伸，该第一部分所包含的超级结柱的中间部分与侧边终端区相对应，两端部分与拐角终端区相对应，且所述第一部分所包含的多个超级结柱于第二方向上的长度沿第一方向依次增大或减小。The first part includes a plurality of super junction columns spaced apart along the first direction, each of the super junction columns extends along the second direction, and the middle part of the super junction column included in the first part corresponds to the side terminal area. , the two end portions correspond to the corner terminal areas, and the lengths of the plurality of super junction columns included in the first portion in the second direction increase or decrease sequentially along the first direction.
在一具体实施案例中，所述第二部分包括沿第一方向间隔设置的多个超级结柱，该第二部分所包含的超级结柱的中间部分与有源区相对应，两端部分与侧边终端区相对应。In a specific implementation, the second part includes a plurality of super junction pillars spaced apart along the first direction. The middle part of the super junction pillar included in the second part corresponds to the active area, and the two end parts correspond to Corresponds to the side terminal area.
在一具体实施案例中，所述的超级结功率器件还包括截止环，所述截止环于第一半导体层上的第二正投影区域环绕所述第一正投影区域设置。In a specific implementation, the super junction power device further includes a cut-off ring, the cut-off ring is disposed around the first orthogonal projection region in the second orthographic projection region on the first semiconductor layer.
在一具体实施案例中，所述第二正投影区域的轮廓为方形轮廓或圆角矩形轮廓。In a specific implementation, the outline of the second orthographic projection area is a square outline or a rounded rectangular outline.
如下将结合附图以及具体实施案例对该技术方案、其实施过程及原理等作进一步的解释说明，除非特别说明的之外，本申请实施例中的有源区、终端区、超级结区、截止环的材质、尺寸等均可以是本领域件技术人员已知的，本申请实施例中的超级结功率器件也可以通过本领域技术人员已知的工艺制作形成，在此不再具体说明。The technical solution, its implementation process and principles will be further explained below with reference to the accompanying drawings and specific implementation cases. Unless otherwise specified, the active area, terminal area, super junction area, The material, size, etc. of the cut-off ring may be known to those skilled in the art. The super junction power device in the embodiment of the present application may also be formed by processes known to those skilled in the art, which will not be described in detail here.
实施例1
Example 1
请参阅图3，一种超级结功率器件，包括叠层设置的第一半导体层和第二半导体层，所述第一半导体层包括有源区1和终端区，所述终端区环绕设置在所述有源区1外侧，且所述终端区包括沿有源区1的周向间隔设置的侧边终端区2和拐角终端区5；所述第二半导体层包括超级结区，所述超级结区3包括多个超级结柱，所述超级结区3在所述第一半导体层上的第一正投影区域的轮廓包括第一轮廓段和第二轮廓段，所述第一轮廓段与所述拐角终端区5相对应且所述第一轮廓段为弧形轮廓，所述第二轮廓段与侧边终端区2相对应。Referring to Figure 3, a super junction power device includes a first semiconductor layer and a second semiconductor layer arranged in a stack. The first semiconductor layer includes an active region 1 and a terminal region. The terminal region is arranged around the outside the active region 1, and the terminal region includes side terminal regions 2 and corner terminal regions 5 spaced apart along the circumferential direction of the active region 1; the second semiconductor layer includes a super junction region, and the super junction region Area 3 includes a plurality of super junction pillars, and the outline of the first orthographic projection area of the super junction area 3 on the first semiconductor layer includes a first outline segment and a second outline segment, and the first outline segment is different from the first outline segment. The corner terminal area 5 corresponds to the first contour segment and is an arcuate contour, and the second contour segment corresponds to the side terminal area 2 .
在实施例中，所述超级结功率器件整体一般为方形(或者称之为矩形)结构，以方形结构为例，所述第一半导体层包括四个拐角终端区5和四个侧边终端区2，所述有源区1位于所述第一半导体层的中间区域，四个拐角终端区5和四个侧边终端区2对应设置在第一半导体层的周缘区域，所述周缘区域环绕所述中间区域，其中，四个拐角终端区5分别对应上设置在四个角处，四个侧边终端区2分别对应设置在四个边处，四个侧边终端区2包括两个沿第一方向对应设置在有源区两侧的侧边终端区和两个沿第二方向对应设置在有源区两侧的侧边终端区，其中，所述第一方向和第二方向可以是垂直的。In embodiments, the super junction power device as a whole is generally a square (or rectangular) structure. Taking a square structure as an example, the first semiconductor layer includes four corner terminal areas 5 and four side terminal areas. 2. The active area 1 is located in the middle area of the first semiconductor layer, and the four corner terminal areas 5 and the four side terminal areas 2 are correspondingly arranged in the peripheral area of the first semiconductor layer, and the peripheral area surrounds the The above-mentioned middle area, wherein the four corner terminal areas 5 are respectively arranged at the four corners, the four side terminal areas 2 are respectively arranged at the four sides, and the four side terminal areas 2 include two along the first There are side terminal areas correspondingly arranged on both sides of the active area in one direction and two side terminal areas correspondingly arranged on both sides of the active area along the second direction, wherein the first direction and the second direction may be vertical. of.
在本实施例中，所述超级结区3包括沿第一方向间隔设置的多个超级结柱，每一所述超级结柱沿第二方向延伸，所述第一正投影区域为多个超级结柱于第一半导体层上的多个正投影区域的组合，而所述第一正投影区域的轮廓是多个超级结柱于第一半导体层上的多个正投影区域的外周轮廓的组合。In this embodiment, the super junction area 3 includes a plurality of super junction columns spaced apart along the first direction, each of the super junction columns extends along the second direction, and the first orthographic projection area is a plurality of super junction columns. A combination of junction pillars on a plurality of orthographic projection areas on the first semiconductor layer, and the profile of the first orthographic projection area is a combination of a plurality of super junction pillars on the outer peripheral contours of a plurality of orthographic projection areas on the first semiconductor layer .
在本实施例中，所述超级结区3包括第一部分和第二部分，所述第一部分沿第一方向对应设置在所述第二部分的两侧，所述第一部分所包含的多个超级结柱的中间部分与侧边终端区相对应，两端部分与拐角终端区相对应，所述第二部分所包含的多个超级结柱的中间部分与有源区相对应，两端部分与侧边终端区相对应，且所述第一部分所包含的多个超级结柱于第二方向上的长度沿第一方向依次增大或减小，从而使超级结区于第一半导体层上的正投影区域具有呈弧形的第一轮廓段。In this embodiment, the super junction area 3 includes a first part and a second part. The first part is correspondingly arranged on both sides of the second part along the first direction. A plurality of super junctions contained in the first part The middle part of the junction pillar corresponds to the side terminal area, and the two end parts correspond to the corner terminal area. The middle part of the plurality of super junction pillars included in the second part corresponds to the active area, and the two end parts correspond to the active area. The side terminal regions correspond to each other, and the lengths of the plurality of super junction pillars included in the first part in the second direction increase or decrease sequentially along the first direction, so that the length of the super junction region on the first semiconductor layer The orthographic projection area has an arc-shaped first contour segment.
经测试发现，平行平面结是所有PN结类型中最简单的情况，理想PN结和一维的二极管都是平行平面结，平行平面结假设没有结边界，而且电场是一维的，图4a和图4b分别示出的为理想的平行平面结和实际平面结的情况，在实际的工艺制作过程中，PN结并不像理想平面结一
样，而是在PN结的边缘处有一定的弯曲，在掩膜版的边角区域出现柱面结或球面结，对于高压器件，当外加反偏电压时，终端越弯曲的地方，场强越大，越容易发生碰撞电离，因此也越容易发生击穿；突变结、线性缓变结、柱面结和球面结的击穿电压分别如公式2-1至2-4所示，其中，Na表示低掺杂侧的浓度，G表示线性缓变结的斜率。After testing, it was found that the parallel plane junction is the simplest case among all PN junction types. The ideal PN junction and the one-dimensional diode are both parallel plane junctions. The parallel plane junction assumes that there is no junction boundary and the electric field is one-dimensional. Figure 4a and Figure 4b shows the ideal parallel planar junction and the actual planar junction respectively. In the actual manufacturing process, the PN junction is not as good as the ideal planar junction. Like this, there is a certain bend at the edge of the PN junction, and cylindrical junctions or spherical junctions appear in the corner areas of the mask. For high-voltage devices, when a reverse bias voltage is applied, the more curved the terminal is, the greater the field strength. The larger it is, the easier it is for collision ionization to occur, and therefore the easier it is for breakdown to occur; the breakdown voltages of abrupt junctions, linear grade junctions, cylindrical junctions and spherical junctions are shown in formulas 2-1 to 2-4 respectively, where, Na represents the concentration of the low doping side, and G represents the slope of the linearly graded junction.
特别地，其中，rj表示柱面结或球面结的半径，Wc,PP表示最大耗尽区宽度。
BVpp＝5.34×1013NA -3/4 (2-1)
BVLpp＝9.14×109G-2/5 (2-2)
BVCYL≈6×1013NA -3/4{[(2+η)η]1/2-η} (2-3)
BVsp≈6×1013NA -3/4{[(3+η)η2]1/3-η} (2-4)In particular, Among them, r j represents the radius of the cylindrical junction or spherical junction, W c, PP represents the maximum depletion zone width.
BV pp =5.34×10 13 N A -3/4 (2-1)
BV Lpp ＝9.14×10 9G -2/5 (2-2)
BV CYL ≈6×10 13 N A -3/4 {[(2+η)η] 1/2 -η} (2-3)
BV sp ≈6×10 13 N A -3/4 {[(3+η)η 2 ] 1/3 -η} (2-4)
BVpp＝5.34×1013NA -3/4 (2-1)
BVLpp＝9.14×109G-2/5 (2-2)
BVCYL≈6×1013NA -3/4{[(2+η)η]1/2-η} (2-3)
BVsp≈6×1013NA -3/4{[(3+η)η2]1/3-η} (2-4)In particular, Among them, r j represents the radius of the cylindrical junction or spherical junction, W c, PP represents the maximum depletion zone width.
BV pp =5.34×10 13 N A -3/4 (2-1)
BV Lpp ＝9.14×10 9G -2/5 (2-2)
BV CYL ≈6×10 13 N A -3/4 {[(2+η)η] 1/2 -η} (2-3)
BV sp ≈6×10 13 N A -3/4 {[(3+η)η 2 ] 1/3 -η} (2-4)
如图4a和图4b所示的电场分布，PN结越深，其终端区的曲率半径也越大，弯曲度也越大，电场越不集中，因此结越深越不容易发生击穿，而浅结情况则刚好相反。由此可见，结终端的形状与器件耐压有很大的关系，且结越浅耐压越小，结越深耐压越高。而诸如VD-MOSFET、IGBT等均为浅结器件。As shown in the electric field distribution shown in Figure 4a and Figure 4b, the deeper the PN junction, the larger the curvature radius and the greater the curvature of the terminal area, and the less concentrated the electric field. Therefore, the deeper the junction, the less likely it is to undergo breakdown. The opposite is true for shallow knots. It can be seen that the shape of the junction terminal has a great relationship with the withstand voltage of the device, and the shallower the junction, the smaller the withstand voltage, and the deeper the junction, the higher the withstand voltage. And such as VD-MOSFET, IGBT, etc. are shallow junction devices.
本申请实施例提供的一种超级结功率器件，将器件超级结的外轮廓形状设置为具有圆角的矩形，芯片终端位置形成柱面结结构，以公式2-3进行器件反向承压能力评估可以获悉，随着曲率半径rj的增大，η会随之增大，最终使得BVCYL也增大。The embodiment of the present application provides a super junction power device. The outer contour shape of the super junction of the device is set to a rectangle with rounded corners. The terminal position of the chip forms a cylindrical junction structure. The reverse pressure bearing capacity of the device is determined according to Formula 2-3. It can be learned from the evaluation that as the radius of curvature r j increases, eta will increase accordingly, eventually causing BVCYL to also increase.
在本实施例中，所述第一部分所包含的多个超级结柱于第二方向上的长度在第一方向上沿远离有源区的方向依次增大或减小，需要说明的是，该增大或减小的幅度可以是均匀或不均匀的渐变，所述第二部分所包含的多个超级结柱于第二方向上的长度可以是相同的。In this embodiment, the lengths of the plurality of super junction pillars included in the first part in the second direction increase or decrease sequentially in the first direction away from the active area. It should be noted that, The amplitude of increase or decrease may be a uniform or uneven gradient, and the lengths of the plurality of super junction columns included in the second part in the second direction may be the same.
相应地，所述第一轮廓段可以是规则或不规则的弧形轮廓，优选为规则的弧形轮廓，这是因为不规则的弧形轮廓对器件反向承压能力提升效果有限；例如，所述第一轮廓段可以是单一的弧形轮廓或者是连续弯曲的弧形轮廓，优选的，所述第一轮廓段是圆弧形轮廓，更为优选的，所述第一轮廓段是1/4圆，即所述第一轮廓段对应的圆心角为90°。Correspondingly, the first profile segment may be a regular or irregular arc-shaped profile, preferably a regular arc-shaped profile, because an irregular arc-shaped profile has a limited effect on improving the reverse pressure bearing capacity of the device; for example, The first profile segment may be a single arc profile or a continuously curved arc profile. Preferably, the first profile segment is a circular arc profile. More preferably, the first profile segment is 1 /4 circle, that is, the central angle corresponding to the first contour segment is 90°.
在本实施例中，所述第一轮廓段为向外凸出的弧形轮廓，可以理解的，所述的向外是指指向远离有源区的方向。
In this embodiment, the first profile segment is an arc-shaped profile that protrudes outward. It can be understood that the outward refers to a direction away from the active area.
需要说明的是，图3中仅示出了超级结区与其中一个拐角终端区的配合结构，相相应地，所述超级结区在其余三个拐角区的结构均是相同的，在此不再赘述。It should be noted that FIG. 3 only shows the matching structure of the super junction area and one of the corner terminal areas. Correspondingly, the structures of the super junction area in the remaining three corner areas are the same. Again.
经本案申请人研究发现，超级结的外轮廓拐角位置的曲率半径与芯片的反向阻断能力正相关，即曲率半径越大，器件的反向阻断能力越好，但存在上限，两者非严格的线性关系，在实际芯片设计中，需重点优化拐角位置的曲率半径，经测试、分析发现，当所述第一轮廓段的曲率半径为所述超级结柱高度的0.2-5倍，优选为0.5-1.5倍时，器件的反向阻断能力最好。The applicant’s research found that the radius of curvature at the corners of the outer contour of the super junction is positively related to the reverse blocking capability of the chip, that is, the larger the radius of curvature, the better the reverse blocking capability of the device, but there is an upper limit for both. Non-strict linear relationship. In actual chip design, it is necessary to focus on optimizing the radius of curvature at the corner. After testing and analysis, it was found that when the radius of curvature of the first contour segment is 0.2-5 times the height of the super junction pillar, When it is preferably 0.5-1.5 times, the device has the best reverse blocking ability.
需要说明的是，所述超级结柱的高度为超级结柱沿第三方向上的尺寸，所述第三方向与所述第一方向、第二反向方向呈角度设置，例如，所述第一方向、第二方向、第三方向相互垂直，所述第三方向为垂直于第一半导体层的方向。It should be noted that the height of the super junction column is the size of the super junction column along a third direction, and the third direction is set at an angle to the first direction and the second reverse direction. For example, the first direction The direction, the second direction and the third direction are perpendicular to each other, and the third direction is a direction perpendicular to the first semiconductor layer.
在本实施例中，所述超级结区3在所述第一半导体层上的正投影区域的轮廓为圆角矩形轮廓。In this embodiment, the outline of the orthographic projection area of the super junction region 3 on the first semiconductor layer is a rounded rectangular outline.
在本实施例中，所述的超级结功率器件还包括截止环4，所述截止环4于第一半导体层上的第二正投影区域环绕所述第一正投影区域设置，所述第二正投影区域的轮廓为方形轮廓，或者，可以理解为，所述截止环4为矩形或方形结构，所述截止环4连续设置在与所述终端区对应的区域，且所述截止环4与拐角终端区对应的部分具有直角拐角。In this embodiment, the super junction power device further includes a cutoff ring 4. The cutoff ring 4 is disposed around the first orthographic projection area on the first semiconductor layer. The second orthographic projection area is disposed on the first semiconductor layer. The outline of the orthographic projection area is a square outline, or it can be understood that the cut-off ring 4 is a rectangular or square structure, the cut-off ring 4 is continuously arranged in the area corresponding to the terminal area, and the cut-off ring 4 is The corresponding portion of the corner terminal area has right-angled corners.
本申请采用圆形拐角设计思路，将超级结区的外轮廓对应于拐角终端区的部分由直角段为弧形的圆角段，直角终端引发的电场聚集效应得以减弱，从而有效提升器件的反向承压能力。This application adopts a circular corner design idea. The outer contour of the super junction area corresponding to the corner terminal area is changed from a right-angle section to an arc-shaped rounded section. The electric field concentration effect caused by the right-angle terminal is weakened, thereby effectively improving the response of the device. Ability to withstand pressure.
实施例2Example 2
请参阅图5，本实施例中的一种超级结功率器件的结构与实施例1基本相同，不同之处在于：本实施例中的截止环的轮廓形状为圆角矩形，即截止环与拐角终端区对应的部分的轮廓为弧形轮廓，截止环的弧形轮廓段的曲率半径、形状等可以与超级结区在该区域的弧形轮廓段的曲率半径、形状相同。Please refer to Figure 5. The structure of a super junction power device in this embodiment is basically the same as that in Embodiment 1. The difference is that the outline shape of the cut-off ring in this embodiment is a rounded rectangle, that is, the cut-off ring and the corners The contour of the corresponding part of the terminal area is an arcuate contour, and the curvature radius and shape of the arcuate contour segment of the cutoff ring can be the same as the curvature radius and shape of the arcuate contour segment of the super junction area in this area.
实施例3Example 3
请参阅图6，本实施例中的一种超级结功率器件的结构与实施例1基本相同，不同之处在于：本实施例中的超级结功率器件不设置截止环。
Please refer to FIG. 6 . The structure of a super junction power device in this embodiment is basically the same as that in Embodiment 1. The difference is that the super junction power device in this embodiment does not have a cutoff ring.
本申请实施例提供的一种超级结功率器件，将超级结区对应拐角终端区的轮廓设置为非平面结构，而使器件超级结区拐角位置的电场平坦化，降低了器件的电场聚集效应，从而提升了器件的BV能力。较之现有的超级结功率器件，本申请实施例提供的一种超级结功率器件，在新型终端结构中，直角终端引发的电场聚集效应得以减弱，同等器件尺寸条件下，本申请实施例提供的一种超级结功率器件的反向阻断能力显著提升。The embodiment of the present application provides a super junction power device that sets the contour of the super junction region corresponding to the corner terminal region as a non-planar structure, thereby flattening the electric field at the corner position of the super junction region of the device and reducing the electric field concentration effect of the device. This improves the BV capability of the device. Compared with existing super junction power devices, the embodiments of the present application provide a super junction power device. In the new terminal structure, the electric field concentration effect caused by the right-angle terminals is weakened. Under the same device size conditions, the embodiments of the present application provide The reverse blocking capability of a super junction power device has been significantly improved.
应当理解，上述实施例仅为说明本申请的技术构思及特点，其目的在于让熟悉此项技术的人士能够了解本申请的内容并据以实施，并不能以此限制本申请的保护范围。凡根据本申请精神实质所作的等效变化或修饰，都应涵盖在本申请的保护范围之内。
It should be understood that the above embodiments are only to illustrate the technical concepts and features of the present application. Their purpose is to enable those familiar with this technology to understand the contents of the present application and implement them accordingly. This does not limit the scope of protection of the present application. Any equivalent changes or modifications made based on the spirit and essence of this application shall be included in the protection scope of this application.
Claims (10)
- 一种超级结功率器件，包括叠层设置的第一半导体层和第二半导体层，所述第一半导体层包括有源区和终端区，所述终端区环绕设置在所述有源区外侧，且所述终端区包括沿有源区的周向间隔设置的侧边终端区和拐角终端区；所述第二半导体层包括超级结区，所述超级结区包括多个超级结柱，其特征在于：所述超级结区在所述第一半导体层上的第一正投影区域的轮廓包括第一轮廓段，所述第一轮廓段与所述拐角终端区相对应且所述第一轮廓段为弧形轮廓。A super junction power device includes a first semiconductor layer and a second semiconductor layer arranged in a stack, the first semiconductor layer includes an active area and a terminal area, and the terminal area is arranged around the outside of the active area, And the terminal area includes side terminal areas and corner terminal areas spaced apart along the circumference of the active area; the second semiconductor layer includes a super junction area, and the super junction area includes a plurality of super junction pillars, which are characterized by The method is: the outline of the first orthographic projection area of the super junction region on the first semiconductor layer includes a first outline segment, the first outline segment corresponds to the corner terminal area, and the first outline segment For curved outline.
- 根据权利要求1所述的超级结功率器件，其特征在于：所述第一轮廓段为向外凸出的弧形轮廓。The super junction power device according to claim 1, wherein the first profile segment is an outwardly protruding arc-shaped profile.
- 根据权利要求1或2所述的超级结功率器件，其特征在于：所述第一轮廓段为圆弧形轮廓。The super junction power device according to claim 1 or 2, characterized in that: the first profile segment is an arc-shaped profile.
- 根据权利要求3所述的超级结功率器件，其特征在于：所述第一轮廓段对应的圆心角为90°。The super junction power device according to claim 3, characterized in that: the central angle corresponding to the first contour segment is 90°.
- 根据权利要求3所述的超级结功率器件，其特征在于：所述第一轮廓段的曲率半径为所述超级结柱高度的0.2-5倍。The super junction power device according to claim 3, wherein the curvature radius of the first contour section is 0.2-5 times the height of the super junction pillar.
- 根据权利要求3所述的超级结功率器件，其特征在于：所述超级结区在所述第一半导体层上的正投影区域的轮廓为圆角矩形轮廓。The super junction power device according to claim 3, wherein the outline of the orthographic projection area of the super junction region on the first semiconductor layer is a rounded rectangular outline.
- 根据权利要求3所述的超级结功率器件，其特征在于：所述超级结区包括第一部分和第二部分，所述第一部分沿第一方向对应设置在所述第二部分的两侧，The super junction power device according to claim 3, characterized in that: the super junction region includes a first part and a second part, and the first part is correspondingly arranged on both sides of the second part along the first direction,所述第一部分包括沿第一方向间隔设置的多个超级结柱，每一所述超级结柱沿第二方向延伸，该第一部分所包含的超级结柱的中间部分与侧边终端区相对应，两端部分与拐角终端区相对应，且所述第一部分所包含的多个超级结柱于第二方向上的长度沿第一方向依次增大或减小。 The first part includes a plurality of super junction pillars spaced apart along the first direction, each of the super junction pillars extends along the second direction, and the middle part of the super junction pillar included in the first part corresponds to the side terminal area. , the two end portions correspond to the corner terminal areas, and the lengths of the plurality of super junction columns included in the first portion in the second direction increase or decrease sequentially along the first direction.
- 根据权利要求6所述的超级结功率器件，其特征在于：所述第二部分包括沿第一方向间隔设置的多个超级结柱，该第二部分所包含的超级结柱的中间部分与有源区相对应，两端部分与侧边终端区相对应。The super junction power device according to claim 6, characterized in that: the second part includes a plurality of super junction pillars spaced along the first direction, and the middle part of the super junction pillar included in the second part is connected with a plurality of super junction pillars. The source area corresponds to the two end portions corresponding to the side terminal areas.
- 根据权利要求1所述的超级结功率器件，其特征在于，还包括截止环，所述截止环于第一半导体层上的第二正投影区域环绕所述第一正投影区域设置。The super-junction power device according to claim 1, further comprising a cut-off ring, the cut-off ring is arranged around the first orthogonal projection region in the second orthographic projection region on the first semiconductor layer.
- 根据权利要求9所述的超级结功率器件，其特征在于：所述第二正投影区域的轮廓为方形轮廓或圆角矩形轮廓。 The super junction power device according to claim 9, wherein the outline of the second orthographic projection area is a square outline or a rounded rectangular outline.
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| WO2013008543A1 (en) * | 2011-07-14 | 2013-01-17 | 富士電機株式会社 | High-voltage semiconductor device |
| US9806186B2 (en) * | 2015-10-02 | 2017-10-31 | D3 Semiconductor LLC | Termination region architecture for vertical power transistors |
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- 2022-06-30 CN CN202210777273.1A patent/CN115188800A/en active Pending
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- 2023-06-14 WO PCT/CN2023/100163 patent/WO2024001779A1/en unknown
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| CN115188800A (en) | 2022-10-14 |
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