WO2024000410A1 - 液晶光控面板及显示装置 - Google Patents

液晶光控面板及显示装置 Download PDF

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Publication number
WO2024000410A1
WO2024000410A1 PCT/CN2022/102838 CN2022102838W WO2024000410A1 WO 2024000410 A1 WO2024000410 A1 WO 2024000410A1 CN 2022102838 W CN2022102838 W CN 2022102838W WO 2024000410 A1 WO2024000410 A1 WO 2024000410A1
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WIPO (PCT)
Prior art keywords
substrate
light
liquid crystal
shielding
control panel
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PCT/CN2022/102838
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English (en)
French (fr)
Inventor
张亚东
吴博
李挺
李必奇
韩静
李豪豪
王昌义
张正东
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202280002074.1A priority Critical patent/CN117642693A/zh
Priority to PCT/CN2022/102838 priority patent/WO2024000410A1/zh
Publication of WO2024000410A1 publication Critical patent/WO2024000410A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes

Definitions

  • the present application relates to the field of display technology, and in particular to a liquid crystal light control panel and a display device.
  • Liquid crystal displays (English: Liquid Crystal Display, abbreviated as: LCD) have the advantages of good picture quality, small size, light weight, low driving voltage, low power consumption, no radiation and relatively low manufacturing cost. They have been widely used in tablet computers, In electronic products such as TVs, mobile phones and car monitors.
  • the LCD can be produced using a double-layer LCD panel (BD cell) display solution.
  • the structure of the double-layer liquid crystal panel includes: a stacked liquid crystal display panel and a liquid crystal light control panel. Among them, the liquid crystal display panel is used to display pictures; the liquid crystal light control panel is used to adjust the brightness of each area according to the picture to be displayed by the liquid crystal display panel.
  • the embodiment of the present application provides a liquid crystal light control panel and a display device, which can improve the display effect of the display device.
  • the technical solution is as follows:
  • a liquid crystal light control panel including: a first array substrate and a cover plate arranged oppositely, and a plurality of support pillars located between the first array substrate and the cover plate;
  • the first array substrate includes: a first substrate, and a plurality of transistors located on the first substrate;
  • the cover plate includes: a second substrate, and a light-shielding layer located on the second substrate , the light-shielding layer has a plurality of first light-shielding blocks corresponding to the plurality of support pillars, and a plurality of second light-shielding blocks corresponding to the plurality of transistors;
  • the orthographic projection of the support pillar on the first substrate is located within the orthographic projection of the corresponding first light-shielding block on the first substrate, and the orthographic projection of the transistor on the first substrate is The projection is located within the orthographic projection of the corresponding second light-shielding block on the first substrate, and a side surface of one second light-shielding block is in contact with a side surface of at least one first light-shielding block.
  • the plurality of support columns are arranged in multiple rows, and a row of first light-shielding blocks corresponding to one row of the support columns includes: a plurality of main light-shielding blocks and a plurality of auxiliary light-shielding blocks;
  • the plurality of main light-shielding blocks correspond to the plurality of second light-shielding blocks in a row of second light-shielding blocks, and the side surfaces of the main light-shielding blocks are in contact with the side surfaces of the corresponding second light-shielding blocks;
  • At least one auxiliary light-shielding block is arranged between two adjacent main light-shielding blocks.
  • the number of the auxiliary light-shielding blocks arranged between every two adjacent main light-shielding blocks is the same.
  • auxiliary light-shielding blocks when at least two auxiliary light-shielding blocks are arranged between two adjacent main light-shielding blocks in a row of first light-shielding blocks, in the at least two auxiliary light-shielding blocks, in the target direction
  • the center distance between any two auxiliary light-shielding blocks is greater than 0, and the target direction is perpendicular to the overall arrangement direction of a row of first light-shielding blocks.
  • the side surface of the second light-shielding block is in contact with the side surface of at least one of the auxiliary light-shielding blocks.
  • the first array substrate further includes: a common signal line located on the first substrate, and a common electrode layer located on a side of the plurality of transistors facing away from the first substrate;
  • the first array substrate has a plurality of first via holes, and the common electrode layer is electrically connected to the plurality of common signal lines through the plurality of first via holes;
  • the light-shielding layer also has: a plurality of third light-shielding blocks corresponding to the plurality of first via holes, and the orthographic projection of the first via hole on the first substrate is located at the corresponding third The light shielding block is within the orthographic projection on the first substrate.
  • the first array substrate further includes: a plurality of first gate lines and a plurality of first data signal lines located on the first substrate, one of the first gate lines and each of the transistors in a row The gates of the transistors are electrically connected, and one of the first data signal lines is electrically connected to the first electrodes of each transistor in a column of transistors;
  • the common signal line and the first data signal line are arranged on the same layer and made of the same material, and the orthographic projections of the plurality of first gate lines on the first substrate are located on the light shielding layer on the first substrate. within the orthographic projection on the first substrate.
  • the first gate line includes: a plurality of first sub-gate lines and a plurality of second sub-gate lines, the plurality of first sub-gate lines and the plurality of second sub-gate lines are alternately distributed, The first end of the first sub-gate line is connected to the first end of the second sub-gate line, and the second end of the first sub-gate line is connected to the second end of the second sub-gate line, And the extension direction of the first sub-gate line intersects with the extension direction of the second sub-gate line.
  • the orthographic projection of the portion connecting the first end of the first sub-grid line and the first end of the second sub-grid line on the first substrate is different from the first light-shielding block.
  • the orthographic projections on the first substrate overlap;
  • the orthographic projection of the portion connecting the second end of the first sub-grid line and the second end of the second sub-grid line on the first substrate is different from the position of the third light-shielding block on the first substrate. Orthographic projections on the substrate overlap.
  • the plurality of first grid lines correspond to the plurality of rows of support pillars, and the first grid lines have a plurality of protrusions corresponding to the plurality of support pillars in the corresponding row of support pillars. part, and the orthographic projection of the convex part on the first substrate is located within the orthographic projection of the corresponding support column on the first substrate.
  • the location where the first end of the first sub-grid line and the first end of the second sub-grid line are connected has one of the protrusions, and the first sub-grid line and the second sub-grid line are connected to each other.
  • the number of the convex portions distributed on the grid line is greater than or equal to 2.
  • the orthographic projections of the plurality of transistors on the first substrate and the orthographic projections of the plurality of first gate lines on the first substrate are both located where the common electrode layer is. within the orthographic projection on the substrate.
  • the common electrode layer has a plurality of slits, and the orthographic projection of the plurality of slits on the first substrate is the same as the orthographic projection of the plurality of transistors on the first substrate. does not coincide with the orthographic projection of the plurality of first gate lines on the first substrate.
  • the first array substrate further includes: a plurality of pixel electrodes corresponding to the plurality of transistors, and the second electrodes of the transistors are electrically connected to the corresponding pixel electrodes;
  • the pixel electrode and the first gate line are arranged in the same layer but have different materials.
  • the first array substrate further includes: a gate insulating layer, the gate of the transistor is located on a side of the gate insulating layer close to the first substrate, the first electrode of the transistor and The second electrodes are located on the side of the gate insulating layer facing away from the first substrate;
  • the gate insulating layer has a plurality of second via holes corresponding to the plurality of transistors one by one, and the second electrodes of the transistors are electrically connected to the corresponding pixel electrodes through the corresponding second via holes.
  • the first array substrate further includes: a flat layer located between the plurality of transistors and the common electrode layer, the flat layer having the plurality of first via holes.
  • a display device which device includes: a stacked liquid crystal light control panel and a liquid crystal display panel, and the liquid crystal light control panel is the above-mentioned liquid crystal light control panel.
  • the liquid crystal light control panel has a plurality of light control areas arranged in an array
  • the liquid crystal display panel has a plurality of sub-pixel areas arranged in an array
  • the shape of the light control area is consistent with the shape of the sub-pixel area. The shapes are different.
  • the display device further includes: a backlight module located on a side of the liquid crystal light control panel facing away from the liquid crystal display panel.
  • Embodiments of the present application provide a liquid crystal light control panel, including: a first array substrate, a cover plate, and a plurality of support pillars; the first array substrate includes a first substrate and a plurality of transistors, and the cover plate includes a second substrate and a plurality of transistors. shading layer. Because when the side surface of a second light-shielding block overlaps the side surface of at least one first light-shielding block, a common support column exists between two adjacent light control areas. In this way, the total number of support pillars in two adjacent light control areas can be reduced while ensuring that the number of support pillars in each light control area remains unchanged.
  • the total number of first light-shielding blocks in two adjacent light control areas will also be reduced.
  • the number of first light-shielding blocks provided in the cover plate can be effectively reduced, so that the orthographic projection area of the light-shielding layer on the second substrate is smaller, thereby making the aperture ratio and light transmittance of the liquid crystal light control panel higher. , which can improve the display effect of the display device integrated with this liquid crystal light control panel.
  • Figure 1 is an example of a currently common LCD light control panel
  • Figure 2 is a cross-sectional view of the liquid crystal light control panel shown in Figure 1 at A-A’;
  • Figure 3 is a top view of a liquid crystal light control panel provided by an embodiment of the present application.
  • Figure 4 is a cross-sectional view of the liquid crystal light control panel shown in Figure 3 at B-B';
  • FIG. 5 is a top view of another liquid crystal light control panel provided by an embodiment of the present application.
  • Figure 6 is a cross-sectional view of the liquid crystal light control panel shown in Figure 5 at C-C';
  • Figure 7 is a schematic structural diagram of a gate line provided by an embodiment of the present application.
  • Figure 8 is a top view of another liquid crystal light control panel provided by an embodiment of the present application.
  • FIG. 9 is a schematic diagram of a display device provided by an embodiment of the present application.
  • Figure 1 is an example of a currently common liquid crystal light control panel.
  • Figure 2 is a cross-sectional view of the liquid crystal light control panel shown in Figure 1 at A-A’.
  • the liquid crystal light control panel 00 includes: a first array substrate 01 and a cover plate 02 arranged opposite each other, and a plurality of supports 03 and first liquid crystal layers 04 located between the first array substrate 01 and the cover plate 02 .
  • the liquid crystal light control panel 00 has a plurality of light control areas 0a arranged in an array.
  • a certain number of support pillars 03 need to be distributed in each light control area 0a.
  • 6 support columns 03 are provided in each light control area 0a, and 12 support columns 03 need to be provided in two adjacent light control areas 0a.
  • the support pillar 03 is generally made of transparent material, part of the light emitted from the light control area 0a will pass through the support pillar 03. This part of the light will be refracted when passing through the support column 03, changing the exit direction of this part of the light, resulting in a poor dimming effect of the liquid crystal light control panel 00. Therefore, in order to block this part of the light, it is necessary to set light-shielding blocks 021 in the cover plate 02 corresponding to the plurality of support columns 03, and it is necessary to ensure that the orthographic projection of each support column 03 on the first array substrate 01 is located at the corresponding The light-shielding blocks 021 are within the orthographic projection of the corresponding first array substrate 01 .
  • the number of support pillars 03 in the current liquid crystal light control panel is relatively large, resulting in a large number of light shielding blocks 021 provided in the cover plate 02 . Since the light passing through the first array substrate 01 will be transmitted from the area of the cover plate 02 where the light shielding block 021 is not provided, it will not be transmitted from the area of the cover plate 02 where the light shielding block 021 is provided. Therefore, when the number of light-shielding blocks 021 provided in the cover 02 is large, the light transmittance of the liquid crystal light control panel 00 will be low, which will lead to a poor display effect of the display device integrating the liquid crystal light control panel 00. Difference.
  • Figure 3 is a top view of a liquid crystal light control panel provided by an embodiment of the present application.
  • Figure 4 is a cross-sectional view of the liquid crystal light control panel shown in Figure 3 at B-B'.
  • the liquid crystal light control panel 000 may include: a first array substrate 100 and a cover plate 200 arranged oppositely, and a plurality of support pillars 300 located between the first array substrate 100 and the cover plate 200.
  • the first array substrate 100 in the liquid crystal light control panel 000 may include: a first substrate 101, and a plurality of transistors 102 located on the first substrate 101.
  • the plurality of transistors 102 in the first array substrate 100 may be located on a side of the first substrate 101 close to the cover plate 200 .
  • the liquid crystal light control panel 000 has a plurality of light control areas 00a arranged in an array.
  • the plurality of light control areas 00a correspond to a plurality of transistors 102.
  • Each transistor 102 may be located in a corresponding light control area 00a.
  • the cover 200 in the liquid crystal light control panel 000 may include: a second substrate 201, and a light-shielding layer 202 located on the second substrate 201.
  • the light shielding layer 202 in the cover plate 200 may be located on the side of the second substrate 201 close to the first array substrate 100 .
  • the light-shielding layer 202 has: a plurality of first light-shielding blocks 2021 corresponding to the plurality of support pillars 300 and a plurality of second light-shielding blocks 2022 corresponding to the plurality of transistors 102 .
  • the orthographic projection of the support pillar 300 on the first substrate 101 is located within the orthographic projection of the corresponding first light-shielding block 2021 on the first substrate 101 , so that the first light-shielding block 2021 can block the first array substrate 100 Among the light rays, the light rays are directed toward the support column 300. In this way, the support column 300 is blocked by the first light shielding block 2021, which can improve the dimming effect of the liquid crystal light control panel 000.
  • the orthographic projection of the transistor 102 on the first substrate 101 is located within the orthographic projection of the corresponding second light-shielding block 2022 on the first substrate 101, so that the second light-shielding block 2022 can block the light passing through the first array substrate 100. The light incident on the transistor 102 is blocked by the second light shielding block 2022 , thereby improving the dimming effect of the liquid crystal light control panel 000 .
  • the side surface of a second light-shielding block 2022 is in contact with the side surface of at least one first light-shielding block 2021. That is, the partial boundary of the orthographic projection of a second light-shielding block 2022 on the first substrate 101 coincides with the partial boundary of the orthographic projection of at least one first light-shielding block 2021 on the first substrate 101 .
  • the liquid crystal light control panel 000 may also include: a first liquid crystal layer 400 located between the first array substrate 100 and the cover plate 200 .
  • the plurality of support pillars 300 can ensure the uniformity of the alignment between the first array substrate 100 and the cover plate 200, thereby ensuring that the first liquid crystal layer 400 can be evenly distributed between the first array substrate 100 and the cover plate 200.
  • the uniformity of the first liquid crystal layer 400 is higher, the dimming effect of the multiple light control areas 00a is more uniform, so that the liquid crystal light control panel 000 can have better dimming effect.
  • a common support column 300 exists between two adjacent light control areas 00a.
  • the support pillar 300a can be used as the support pillar 300 in the light control area 00a on the left side of the support pillar 300a, and can also be used as the support pillar 300 in the light control area 00a on the right side of the support pillar 300a. In this way, the total number of support pillars 300 in two adjacent light control areas 00a can be reduced while ensuring that the number of support pillars 300 in each light control area 00a remains unchanged.
  • the total number of first light-shielding blocks 2021 in two adjacent light control areas 00a will also be reduced. For example, there are still 6 support pillars 300 in each light control area 00a. However, the number of support pillars 300 in two adjacent light control areas 00a is 11. Correspondingly, the total number of first light-shielding blocks 2021 in two adjacent light control areas 00a is also 11.
  • the number of the first light-shielding blocks 2021 provided in the cover plate 200 can be effectively reduced, so that the orthographic projection area of the light-shielding layer 202 on the second substrate 201 is smaller, thereby making the aperture ratio of the liquid crystal light control panel 000 and The light transmittance is high, which can improve the display effect of the display device integrated with the liquid crystal light control panel 000 .
  • a liquid crystal light control panel including: a first array substrate, a cover plate and a plurality of support pillars; the first array substrate includes a first substrate and a plurality of transistors, and the cover plate includes second substrate and light shielding layer. Because when the side surface of a second light-shielding block coincides with the side surface of at least one first light-shielding block, a common support column exists between two adjacent light control areas. In this way, the total number of support pillars in two adjacent light control areas can be reduced while ensuring that the number of support pillars in each light control area remains unchanged. Correspondingly, the total number of first light-shielding blocks in two adjacent light control areas will also be reduced.
  • the number of first light-shielding blocks provided in the cover plate can be effectively reduced, so that the orthographic projection area of the light-shielding layer on the second substrate is smaller, thereby making the aperture ratio and light transmittance of the liquid crystal light control panel higher. , which can improve the display effect of the display device integrated with this liquid crystal light control panel.
  • FIG. 5 is a top view of another liquid crystal light control panel provided by the embodiment of the present application.
  • the plurality of support pillars 300 in the liquid crystal light control panel 000 are arranged in multiple rows. Because the plurality of first light-shielding blocks 2021 in the cover plate 200 can correspond to the plurality of support columns 300 one-to-one. Therefore, the plurality of first light-shielding blocks 2021 can also be arranged in multiple rows, and the multiple rows of first light-shielding blocks 2021 can correspond to the multiple rows of support columns 300 one-to-one.
  • the plurality of transistors 102 in the first array substrate 100 can be arranged in multiple rows in an array, and the plurality of second light shielding blocks 2022 in the cover plate 200 can correspond to the plurality of transistors 102 one by one. Therefore, the plurality of second light-shielding blocks 2022 can also be arranged in multiple rows, and the multiple rows of second light-shielding blocks 2022 can correspond to the multiple rows of transistors 102 one-to-one.
  • each support column 300 in a row of support columns 300 is not arranged in a linear array, but is arranged in an array according to a polygonal structure.
  • a row of first light-shielding blocks 2021 is also arranged in an array according to a zigzag structure.
  • a row of transistors 102 is arranged in a linear array.
  • a row of second light shielding blocks 2022 is also arranged in a linear array.
  • a row of first light-shielding blocks 2021 corresponding to a row of support columns 300 may include: a plurality of main light-shielding blocks 2021a and a plurality of auxiliary light-shielding blocks 2021b.
  • the plurality of main light-shielding blocks 2021a correspond to the plurality of second light-shielding blocks 2022 in a row of second light-shielding blocks 2022, and the side surfaces of the main light-shielding blocks 2021a are in contact with the side surfaces of the corresponding second light-shielding blocks 2022.
  • At least one auxiliary light-shielding block 2021b is arranged between two adjacent main light-shielding blocks 2021a.
  • the side surfaces of the second light-shielding block 2022 and the side surfaces of the auxiliary light-shielding block 2021b may or may not be in contact with each other.
  • the side surface of the second light-shielding block 2022 is in contact with the side surface of at least one auxiliary light-shielding block 2021b.
  • the side of the second light-shielding block 2022 when the side of the second light-shielding block 2022 is in contact with the side of the auxiliary light-shielding block 2021b, the side of the second light-shielding block 2022 not only coincides with the side of the main light-shielding block 2021a, but also overlaps with the auxiliary light-shielding block 2021b.
  • the side surfaces of the second light-shielding block 2022 coincide with the side surfaces of the two first light-shielding blocks 2021, so that the area of the orthographic projection of the light-shielding layer 202 on the second substrate 201 can be further reduced.
  • Improve the aperture ratio and light transmittance of the liquid crystal light control panel 000 improve the aperture ratio and light transmittance of the liquid crystal light control panel 000.
  • the number of auxiliary light-shielding blocks 2021b arranged between every two adjacent main light-shielding blocks 2021a is the same.
  • the number of auxiliary light-shielding blocks 2021b arranged between every two adjacent main light-shielding blocks 2021a is four.
  • the plurality of first light-shielding blocks 2021 correspond to the plurality of support columns 300 one-to-one, when the number of auxiliary light-shielding blocks 2021b arranged between every two adjacent main light-shielding blocks 2021a is the same, two adjacent main light-shielding blocks 2021a The number of supporting columns 300 arranged between two adjacent supporting columns 300 corresponding to the main light-shielding block 2021a is also the same. In this way, various areas of the liquid crystal light control panel 000 receive similar support forces from the support pillars 300 . This further ensures the uniformity of the first liquid crystal layer 400 and improves the dimming effect of the liquid crystal light control panel 000 .
  • auxiliary light-shielding blocks 2021b are arranged between two adjacent main light-shielding blocks 2021a in a row of first light-shielding blocks 2021, in the at least two auxiliary light-shielding blocks 2021b, in the target direction Y
  • the center distance between any two auxiliary light-shielding blocks 2021b is greater than 0.
  • the target direction Y is perpendicular to the overall arrangement direction of a row of first light-shielding blocks 2021 .
  • auxiliary light-shielding blocks 2021b arranged between two adjacent main light-shielding blocks 2021a will not be located on the same straight line perpendicular to the target direction Y.
  • the undesirable phenomenon of rainbow streaks on the liquid crystal light control panel 000 caused by multiple auxiliary light shielding blocks 2021b being located on the same straight line can be avoided, thereby further improving the performance of the display device integrating the liquid crystal light control panel 000. dimming effect.
  • Figure 6 is a cross-sectional view of the liquid crystal light control panel shown in Figure 5 at C-C’.
  • the first array substrate 100 further includes: a common signal line 103 located on the first substrate 101, and a common electrode layer 106 located on a side of the plurality of transistors 102 facing away from the first substrate 102.
  • the first array substrate 100 has a plurality of first via holes V1, and the common electrode layer 106 is electrically connected to the plurality of common signal lines 103 through the plurality of first via holes V1.
  • the first array substrate 100 may further include: a flat layer 107 located between the plurality of transistors 102 and the common electrode layer 106, and the flat layer 107 has a plurality of first vias V1.
  • the light-shielding layer 202 also has: a plurality of third light-shielding blocks 2023 corresponding to the plurality of first via holes V1.
  • the orthographic projection of the first via holes V1 on the first substrate 101 is located in the corresponding third light-shielding block 2023. within the orthographic projection on the first substrate 101 .
  • the common electrode layer 106 needs to be electrically connected to the plurality of common signal lines 103 through the plurality of first vias V1. Therefore, part of the common electrode layer 106 needs to be located within the first via hole V1 , that is, the first via hole V1 is filled with conductive material. In this way, when the liquid crystal light control panel 000 applies an electric field to control the deflection of the liquid crystal in the first liquid crystal layer 400, the conductive material filled in the first via hole V1 will affect the distribution of the electric field in the first via hole V1, thereby affecting the distribution of the electric field in the first via hole V1.
  • the deflection angle of the liquid crystal at one via hole V1 causes the light intensity when the light passes through the first via hole V1 to be different from the light intensity when the light passes through other parts except the first via hole V1, which in turn causes the liquid crystal
  • the brightness distribution presented by the light control panel 000 is not uniform. After the first via hole V1 is blocked by the third light shielding block 2023, the light passing through the first via hole V1 can be prevented from emitting from the cover plate 200, effectively improving the uniformity of the brightness distribution presented by the liquid crystal light control panel 000. sex.
  • the first array substrate 100 further includes: a plurality of first gate lines 104 and a plurality of first data signal lines 105 located on the first substrate 101 .
  • the overall extending direction of the first gate line 104 intersects the overall extending direction of the first data signal line 105 .
  • a plurality of first gate lines 104 and a plurality of first data signal lines 105 surround a plurality of light control areas 00a.
  • two adjacent first gate lines 104 and two adjacent first data signal lines 105 may surround a light control area 00a.
  • a first gate line 104 is electrically connected to the gate electrode 102a of each transistor 102 in a row of transistors 102
  • a first data signal line 105 is electrically connected to the first electrode 102b of each transistor 102 in a column of transistors 102.
  • the common signal line 103 and the first data signal line 105 may be arranged in the same layer and made of the same material. That is, the common signal line 103 and the first data signal line 105 may be formed using the same patterning process. In this application, the extension direction of the first data signal line 105 may be parallel to the extension direction of the common signal line 103 .
  • the orthographic projections of the plurality of first gate lines 104 on the first substrate 101 are all located within the orthographic projection of the light shielding layer 202 on the first substrate 101 .
  • the material used to make the first gate line 104 may be a metal material.
  • the metal copper may be a metal material.
  • the width of the first grid line 104 is relatively wide. When light is emitted to the first grid line 104 in the liquid crystal light control panel 000, the reflectivity of the first grid line 104 to the light is relatively high, thereby affecting the liquid crystal light control panel 000. display effect.
  • the light shielding layer 202 can block the light directed to the first gate lines 104. of light, thereby improving the display effect of the liquid crystal light control panel 000.
  • the light shielding layer 202 also has a shielding line segment 2024.
  • the orthographic projection of the first grid line 104 on the first substrate 101 may be located within the orthographic projection of the shielding line segment 2024 on the first substrate 101 .
  • the width of the shielding line segment 2024 may be equal to the width of the first gate line 104 .
  • the boundary of the orthographic projection of the first grid line 104 on the first substrate 101 can be located at the boundary of the orthographic projection of the shielding line segment 2024 on the first substrate 101, so that the shielding line segment 2024 can be exactly aligned with the first grid line. 104 for occlusion.
  • the area of the orthographic projection of the light-shielding layer 202 on the second substrate 201 can be further reduced while ensuring that the shading line segment 2024 can effectively block the first gate line 104 .
  • the material used to make the common signal line 103 and the first data signal line 105 is usually a metal material.
  • the width of the common signal line 103 and the width of the first data signal line 105 are usually smaller. Therefore, the reflectivity of the common signal line 103 and the first data signal line 105 to light is low.
  • the light-shielding layer 202 in the cover 200 may not block the common signal line 103 and the first data signal line 105 .
  • FIG. 7 is a schematic structural diagram of a gate line provided by an embodiment of the present application.
  • the first gate line 104 includes: a plurality of first sub-gate lines 104a and a plurality of second sub-gate lines 104b.
  • a plurality of first sub-gate lines 104a and a plurality of second sub-gate lines 104b are alternately distributed.
  • the first end of the first sub-gate line 104a is connected to the first end of the second sub-gate line 104b.
  • the second end is connected to the second end of the second sub-gate line 104b, and the extending direction of the first sub-gate line 104a intersects the extending direction of the second sub-gate line 104b.
  • the first gate lines 104 can be distributed in a zigzag shape.
  • the shape of the light control area 00a surrounded by two adjacent first gate lines 104 and two adjacent first data signal lines 105 is an arrow-like shape.
  • the shape of the sub-pixel area in the liquid crystal display panel is usually rectangular. Therefore, when the liquid crystal light control panel 000 and the liquid crystal display panel in the present application are assembled into a display device, it can be ensured that the shape of the light control area 00a in the liquid crystal light control panel 000 is different from the shape of the sub-pixel area in the liquid crystal display panel. , thereby preventing rainbow patterns from appearing on the display device, thereby improving the display effect of the display device.
  • the orthographic projection of the portion connecting the first end of the first sub-grid line 104a and the first end of the second sub-grid line 104b on the first substrate 101 is the same as that of the first light shielding block 2021 on the first substrate.
  • the orthographic projections on the bottom overlap; the orthographic projection of the portion connecting the second end of the first sub-grid line 104a and the second end of the second sub-grid line 104b on the first substrate 101 is on the same side as the third light-shielding block 2023.
  • the orthographic projections on the first substrate overlap.
  • the orthographic projection of the portion connecting the first end of the first sub-grid line 104a and the first end of the second sub-grid line 104b on the first substrate 101, and a row of first light shielding The orthographic projections of the main light-shielding block 2021a in the block 2021 on the first substrate 101 overlap.
  • the orthographic projection of the auxiliary light-shielding block 2021b in the row of first light-shielding blocks 2021 on the first substrate 101 may overlap with the orthographic projection of the first sub-grid line 104a on the first substrate 101, or may overlap with the orthographic projection of the first sub-grid line 104a on the first substrate 101.
  • the orthographic projections of the two sub-gate lines 104b on the first substrate 101 overlap.
  • multiple rows of first light shielding blocks 2021 can correspond to multiple first grid lines 104 one-to-one, so that multiple rows of support pillars 300 can also correspond to multiple first grid lines 104 one-to-one.
  • each row of support pillars 300 can be supported by a corresponding first grid line 104 .
  • the arrangement of each row of support pillars 300 may be related to the structural shape of a corresponding first grid line 104 .
  • the first grid line 104 has a plurality of convex portions 104c that correspond one-to-one to the plurality of support pillars 300 in the corresponding row of support pillars 300 .
  • the convex portions 104c are on the first substrate 101
  • the orthographic projection on is located within the orthographic projection of the corresponding support pillar 300 on the first substrate 100 .
  • the support column 300 may be a truncated cone-shaped support column.
  • the area of the bottom surface of the truncated cone-shaped support column close to the first array substrate 100 is smaller than the area of the bottom surface of the truncated cone-shaped support column close to the second array substrate 200 .
  • the supporting pillar 300 can be supported by the protruding portion 104c.
  • the convex portion 104c can provide support for the support column 300 and improve the stability of the support column 300, thereby further ensuring the uniformity of the box alignment between the first array substrate 100 and the cover plate 200.
  • a convex portion 104c needs to be provided at a portion where the first end of the first sub-gate line 104a and the first end of the second sub-gate line 104b are connected.
  • the orthographic projection of the auxiliary light-shielding block 2021b in the row of first light-shielding blocks 2021 on the first substrate 101 can overlap with the orthographic projection of the first sub-grid line 104a on the first substrate 101, or, with Orthographic projections of the second sub-gate lines 104b on the first substrate 101 overlap. Therefore, at least one convex portion 104c needs to be provided on both the first sub-gate line 104a and the second sub-gate line 104b.
  • the number of convex portions 104c distributed on the first sub-grid line 104a and the second sub-grid line 104b is both greater than or equal to 2.
  • the number of the supporting pillars 300 corresponding to the convex portion 104c is both greater than or equal to 2
  • the number of the supporting pillars 300 is both greater than or equal to 2.
  • the area of the orthographic projection of the first light shielding block 2021 on the first substrate 101 may be equal to the area of the orthographic projection of the corresponding support pillar 300 on the first substrate 101 .
  • the boundary of the orthographic projection of the first light-shielding block 2021 on the first substrate 101 can coincide with the boundary of the orthographic projection of the corresponding support pillar 300 on the first substrate 101, so that the first light-shielding block 2021 can be exactly aligned with The support column 300 provides shielding.
  • the area of the orthographic projection of the light-shielding layer 202 on the second substrate 201 can be further reduced while ensuring that the first light-shielding block 2021 can effectively block the support column 300 .
  • FIG. 8 is a top view of another liquid crystal light control panel provided by the embodiment of the present application.
  • the orthographic projections of the plurality of transistors 102 on the first substrate 101 and the orthographic projections of the plurality of first gate lines 104 on the first substrate 101 are both located within the orthographic projection of the common electrode layer 106 on the substrate.
  • the external electric field can be shielded by the common electrode layer 106. In this way, the external electric field can be prevented from interfering with the signals in the plurality of first gate lines 104 and the signals in the transistor 102, thereby improving the liquid crystal light control. Electrical stability of Panel 000.
  • the side of a second light-shielding block 2022 coincides with the side of at least one first light-shielding block 2021, the total number of support pillars 300 is reduced, and multiple of the first grid lines 104 are The convex portions 104c correspond to the plurality of support pillars 300 one-to-one, so the number of the plurality of convex portions 104c in the first gate line 104 is also reduced. In this way, the overlapping area of the first gate line 104 and the common electrode layer 106 will also be reduced, effectively reducing the parasitic capacitance between the common electrode layer 106 and the first gate line 104, thereby further improving the performance of the liquid crystal light control panel 000 electrical stability.
  • the common electrode layer 106 has a plurality of slits 106a, orthographic projections of the plurality of slits 106a on the first substrate 101, and a plurality of transistors 102 on the first substrate 101.
  • the orthographic projection of does not coincide with the orthographic projection of the plurality of first gate lines 104 on the first substrate 101 . In this way, it can be ensured that the portion of the common electrode layer 106 where the slits 106 a are not provided can cover the plurality of transistors 102 and the plurality of first gate lines 104 .
  • the portion of the common electrode layer 106 without the slits 106a can better shield the external electric field, thereby preventing the external electric field from interfering with the signals in the plurality of first gate lines 104 and the signals in the plurality of transistors 102.
  • the side surface of a second light-shielding block 2022 coincides with the side surface of at least one first light-shielding block 2021, the total number of support pillars 300 can be reduced, and the plurality of convex portions 104c in the first grid line 104 are in line with the plurality of The support columns 300 correspond one to one.
  • the area of the orthographic projection of the first gate line on the first substrate 101 can be effectively reduced, so that the portion of the common electrode layer 106 covering the first gate line 104 (that is, no slits are provided in the common electrode layer 106
  • the area of the orthographic projection of the part 106a) on the first substrate 101 will also decrease, while the overall area of the first array substrate 100 facing the second array substrate 200 remains unchanged.
  • the area of the orthographic projection of the portion of the common electrode layer 106 where the slit 106 a is provided on the first substrate 101 will increase, thereby improving the aperture ratio and light transmittance of the liquid crystal light control panel 000 .
  • the first array substrate 100 further includes: a plurality of pixel electrodes 108 corresponding to a plurality of transistors 102 .
  • the second electrodes 102 c of the transistors 102 are electrically connected to the corresponding pixel electrodes 108 .
  • the pixel electrode 108 and the first gate line 104 are arranged in the same layer but have different materials. That is, the pixel electrode 108 and the first gate line 104 are formed using two patterning processes. One patterning process forms the conductive layer where the pixel electrode 108 is located, and another patterning process forms the conductive layer where the first gate line 104 is located.
  • Pixel electrode 108 may be a transparent conductive material, such as indium tin oxide.
  • the material of the first gate 104 may be metal, for example, copper.
  • the number of conductive layers in the liquid crystal light control panel 000 can be effectively reduced, so that the thickness of the liquid crystal light control panel 000 is lower, and thus the thickness of the liquid crystal light control panel 000 can be reduced.
  • the thickness of the display device integrated with the liquid crystal light control panel 000 is reduced.
  • the first array substrate 100 also includes: a gate insulating layer 109 .
  • the gate 102 a of the transistor 102 is located on a side of the gate insulating layer 109 close to the first substrate 101 .
  • the first electrode 102b and the second electrode 102c are both located on the side of the gate insulating layer 109 facing away from the first substrate 101.
  • the gate insulating layer 109 has a plurality of second via holes V2 corresponding to the plurality of transistors 102.
  • the second electrode 102c of the transistor 102 is electrically connected to the corresponding pixel electrode 108 through the corresponding second via hole V2.
  • a liquid crystal light control panel which includes: a first array substrate, a cover plate, and a plurality of support pillars; the first array substrate includes a first substrate and a plurality of transistors, and the cover plate includes second substrate and light-shielding layer. Because when the side surface of a second light-shielding block overlaps the side surface of at least one first light-shielding block, a common support column exists between two adjacent light control areas. In this way, the total number of support pillars in two adjacent light control areas can be reduced while ensuring that the number of support pillars in each light control area remains unchanged.
  • the total number of first light-shielding blocks in two adjacent light control areas will also be reduced.
  • the number of the first light-shielding blocks provided in the cover plate can be effectively reduced, so that the orthographic projection area of the light-shielding layer on the second substrate is smaller, thereby making the light transmittance of the liquid crystal light control panel higher, which can improve The display effect of the display device integrating this liquid crystal light control panel.
  • FIG. 9 is a schematic diagram of a display device provided by an embodiment of the present application.
  • the display device may include: a stacked liquid crystal light control panel 000 and a liquid crystal display panel 001.
  • the liquid crystal light control panel 000 is the above-mentioned liquid crystal light control panel 000.
  • the display device can be: a monitor, a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, a navigator, or any other product or component with a display function.
  • the liquid crystal display panel 001 may include: a second array substrate 500 , a color filter substrate 600 arranged oppositely, and a second liquid crystal layer 700 located between the second array substrate 500 and the color filter substrate 600 .
  • the second array substrate 500 may include: a third substrate, and a plurality of second gate lines and a plurality of second data signal lines located on the third substrate.
  • the plurality of second gate lines and the plurality of second data signal lines may surround multiple sub-pixel regions. For example, two adjacent second gate lines and two adjacent second data signal lines may form a sub-pixel area.
  • the liquid crystal light control panel 000 has a plurality of light control areas 00a arranged in an array, and the liquid crystal display panel 001 has a plurality of sub-pixel areas arranged in an array, and the shape of the light control area 00a is different from the shape of the sub-pixel area.
  • the shape of the light control area 00a of the liquid crystal light control panel is different from that of the sub-pixel area in the liquid crystal display panel, the undesirable phenomenon of rainbow streaks in the display device can be avoided, thus improving the display effect of the display device. .
  • the display device also includes: a backlight module 002 .
  • the backlight module 002 is located on the side of the liquid crystal light control panel 000 away from the liquid crystal display panel 001 .
  • the light emitted by the backlight module 002 passes through the liquid crystal light control panel 000 and enters the liquid crystal display panel 001.
  • the liquid crystal display panel 001 can adjust the color and brightness of the light emitted from each sub-pixel area to achieve various screen displays.
  • the liquid crystal light control panel 00 can adjust the brightness of the light emitted from each light control area 00a to improve the contrast of the picture displayed by the liquid crystal display panel 001, thereby improving the display effect of the liquid crystal display panel 001.
  • first and second are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
  • plurality refers to two or more than two, unless expressly limited otherwise.

Abstract

一种液晶光控面板(000)及显示装置，属于显示技术领域。液晶光控面板(000)包括：相对设置的第一阵列基板(100)和盖板(200)，以及位于第一阵列基板(100)和盖板(200)之间的多个支撑柱(300)；第一阵列基板(100)包括：第一衬底(101)，以及位于第一衬底(101)上的多个晶体管(102)；盖板(200)包括：第二衬底(201)，以及位于第二衬底(201)上的遮光层(202)，遮光层(202)具有与多个支撑柱(300)一一对应的多个第一遮光块(2021)，以及与多个晶体管(102)一一对应的多个第二遮光块(2022)；其中，支撑柱(300)在第一衬底(101)上的正投影位于对应的第一遮光块(2021)在第一衬底(101)上的正投影内，晶体管(102)在第一衬底(101)上的正投影位于对应的第二遮光块(2022)在第一衬底(101)上的正投影内，一个第二遮光块(2022)的侧面与至少一个第一遮光块(2021)的侧面贴接，可以提高液晶光控面板(000)的透光率。

Description

液晶光控面板及显示装置 技术领域
本申请涉及显示技术领域，特别涉及一种液晶光控面板及显示装置。
背景技术
液晶显示器(英文：Liquid Crystal Display，简称：LCD)具有画质好、体积小、重量轻、低驱动电压、低功耗、无辐射和制造成本相对较低等优点，已广泛应用在平板电脑、电视、手机和车载显示器等电子产品中。
为了提高液晶显示器的对比度，液晶显示器可以采用双层液晶面板(BD cell)的显示方案制作。该双层液晶面板的结构包括：层叠设的液晶显示面板和液晶光控面板。其中，液晶显示面板用于进行画面的显示；液晶光控面板用于根据液晶显示面板所要显示的画面调节各个区域的亮度。
然而，目前液晶光控面板的透光率较低，导致液晶显示器的显示效果较差。
发明内容
本申请实施例提供了一种液晶光控面板及显示装置，可以提高显示装置的显示效果，所述技术方案如下：
一方面，提供了一种液晶光控面板，包括：相对设置的第一阵列基板和盖板，以及位于所述第一阵列基板和所述盖板之间的多个支撑柱；
所述第一阵列基板包括：第一衬底，以及位于所述第一衬底上的多个晶体管；所述盖板包括：第二衬底，以及位于所述第二衬底上的遮光层，所述遮光层具有与所述多个支撑柱一一对应的多个第一遮光块，以及与所述多个晶体管一一对应的多个第二遮光块；
其中，所述支撑柱在所述第一衬底上的正投影位于对应的第一遮光块在所述第一衬底上的正投影内，所述晶体管在所述第一衬底上的正投影位于对应的第二遮光块在所述第一衬底上的正投影内，一个所述第二遮光块的侧面与至少一个所述第一遮光块的侧面贴接。
可选的，所述多个支撑柱排布为多排，与一排所述支撑柱对应的一排第一遮光块包括：多个主遮光块和多个辅助遮光块；
其中，所述多个主遮光块与一行第二遮光块内的多个第二遮光块一一对应，所述主遮光块的侧面与对应的第二遮光块的侧面贴接；
在一排所述第一遮光块中，两个相邻的所述主遮光块之间排布有至少一个所述辅助遮光块。
可选的，在一排所述第一遮光块中，每两个相邻的所述主遮光块之间排布的所述辅助遮光块的个数相同。
可选的，当一排所述第一遮光块中两个相邻的所述主遮光块之间排布至少两个辅助遮光块时，在所述至少两个辅助遮光块中，在目标方向上任意两个辅助遮光块之间的中心距离均大于0，所述目标方向垂直于一排所述第一遮光块的整体排布方向。
可选的，所述第二遮光块的侧面与至少一个所述辅助遮光块的侧面贴接。
可选的，所述第一阵列基板还包括：位于所述第一衬底上的公共信号线，以及位于所述多个晶体管背离所述第一衬底一侧的公共电极层；
所述第一阵列基板具有多个第一过孔，所述公共电极层通过所述多个第一过孔与所述多条公共信号线电连接；
所述遮光层还具有：与所述多个第一过孔一一对应的多个第三遮光块，所述第一过孔在所述第一衬底上的正投影，位于对应的第三遮光块在所述第一衬底上的正投影内。
可选的，所述第一阵列基板还包括：位于所述第一衬底上的多条第一栅线和多条第一数据信号线，一条所述第一栅线与一行晶体管内的各个晶体管的栅极电连接，一条所述第一数据信号线与一列晶体管内的各个晶体管的第一极电连接；
其中，所述公共信号线与所述第一数据信号线同层设置且材料相同，所述多条第一栅线在所述第一衬底上的正投影均位于所述遮光层在所述第一衬底上的正投影内。
可选的，所述第一栅线包括：多个第一子栅线和多个第二子栅线，所述多个第一子栅线和所述多个第二子栅线交替分布，所述第一子栅线的第一端和所述第二子栅线的第一端连接，所述第一子栅线的第二端和所述第二子栅线的第 二端连接，且所述第一子栅线的延伸方向与所述第二子栅线的延伸方向相交。
可选的，所述第一子栅线的第一端和所述第二子栅线的第一端连接的部分在所述第一衬底上的正投影，与所述第一遮光块在所述第一衬底上的正投影相交叠；
所述第一子栅线的第二端和所述第二子栅线的第二端连接的部分在所述第一衬底上的正投影，与所述第三遮光块在所述第一衬底上的正投影相交叠。
可选的，所述多条第一栅线与多排所述支撑柱一一对应，所述第一栅线具有与对应的一排支撑柱内的多个支撑柱一一对应的多个凸部，所述凸部在所述第一衬底上的正投影位于对应的支撑柱在所述第一衬底上的正投影内。
可选的，所述第一子栅线的第一端和所述第二子栅线的第一端连接的部位具有一个所述凸部，所述第一子栅线与所述第二子栅线上分布的所述凸部的数量均大于或等于2。
可选的，所述多个晶体管在所述第一衬底上的正投影与所述多条第一栅线在所述第一衬底上的正投影，均位于所述公共电极层在所述衬底上的正投影内。
可选的，所述公共电极层具有多个狭缝，所述多个狭缝在所述第一衬底上的正投影，与所述多个晶体管在所述第一衬底上的正投影不重合，且与所述多条第一栅线在所述第一衬底上的正投影不重合。
可选的，所述第一阵列基板还包括：与所述多个晶体管一一对应的多个像素电极，所述晶体管的第二极与对应的像素电极电连接；
其中，所述像素电极在所述第一衬底上的正投影与所述公共信号线在所述第一衬底上的正投影存在交叠区域。
可选的，所述像素电极与所述第一栅线同层设置但材料不同。
可选的，所述第一阵列基板还包括：栅极绝缘层，所述晶体管的栅极位于所述栅极绝缘层靠近所述第一衬底的一侧，所述晶体管的第一极和第二极均位于所述栅极绝缘层背离所述第一衬底的一侧；
其中，所述栅极绝缘层具有与所述多个晶体管一一对应的多个第二过孔，所述晶体管的第二极通过对应的第二过孔与对应的像素电极电连接。
可选的，所述第一阵列基板还包括：位于所述多个晶体管与所述公共电极层之间的平坦层，所述平坦层具有所述多个第一过孔。
另一方面，提供了一种显示装置，所述装置包括：层叠设置的液晶光控面板和液晶显示面板，所述液晶光控面板为上述的液晶光控面板。
可选的，所述液晶光控面板具有多个阵列排布的光控区域，所述液晶显示面板具有多个阵列排布的子像素区域，所述光控区域的形状与所述子像素区域的形状不同。
可选的，所述显示装置还包括：背光模组，所述背光模组位于所述液晶光控面板背离所述液晶显示面板的一侧。
本申请实施例提供的技术方案带来的有益效果至少包括：
本申请实施例提供了一种液晶光控面板，包括：第一阵列基板、盖板和多个支撑柱；第一阵列基板包括第一衬底和多个晶体管，盖板包括第二衬底和遮光层。由于当一个第二遮光块的侧面与至少一个第一遮光块的侧面重合上时，两个相邻的光控区域之间存在一个共用的支撑柱。这样，可以在保证每个光控区域里面的支撑柱的个数不变前提下，减少两个相邻的光控区域里面的支撑柱的总个数。相应的，两个相邻的光控区域里面的第一遮光块的总个数也会减少。这样，可以有效的降低盖板中设置的第一遮光块的数量，使得遮光层在第二衬底上的正投影的面积较小，进而使得液晶光控面板的开口率及透光率较高，可以提高集成了这种液晶光控面板的显示装置的显示效果。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是目前常见的一种液晶光控面板的示例图；
图2是图1示出的液晶光控面板在A-A’处的截面图；
图3是本申请实施例提供的一种液晶光控面板的俯视图；
图4是图3示出的液晶光控面板在B-B’处的截面图；
图5是本申请实施例提供的另一种液晶光控面板的俯视图；
图6是图5示出的液晶光控面板在C-C’处的截面图；
图7是本申请实施例提供的一种栅线的结构示意图；
图8是本申请实施例提供的又一种液晶光控面板的俯视图；
图9是本申请实施例提供的一种显示装置的示意图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请实施方式作进一步地详细描述。
请参考图1和图2，图1是目前常见的一种液晶光控面板的示例图，图2是图1示出的液晶光控面板在A-A’处的截面图。液晶光控面板00包括：相对设置的第一阵列基板01和盖板02，以及位于第一阵列基板01和盖板02之间的多个支撑住03和第一液晶层04。液晶光控面板00具有多个阵列排布的光控区域0a。
相关技术中，为了保证第一阵列基板01和盖板02之间的对盒时的均匀性，需要在每个光控区域0a内分布一定数量的支撑柱03。例如，每个光控区域0a内设置6个支撑柱03，两个相邻的光控区域0a需要设置12个支撑柱03。
然而，由于支撑柱03一般是由透明材料制成，光控区域0a出射的部分光线会穿过支撑柱03。这部分光线在穿过支撑柱03时会发生光的折射，改变了这部分光线的出射方向，导致影响液晶光控面板00的调光效果较差。因此，为了遮挡这部分光线，需要在盖板02中设置与多个支撑柱03一一对应的遮光块021，且需要保证每个支撑柱03在第一阵列基板01上的正投影，位于对应的遮光块021在对应的第一阵列基板01的正投影内。
但是，目前的液晶光控面板中的支撑柱03的数量较多，导致盖板02中设置的遮光块021的数量也较多。由于穿过第一阵列基板01的光线，会从盖板02中未设置遮光块021的区域透射出去，不会从盖板02中设置遮光块021的区域透射出去。因此，当盖板02中设置的遮光块021的数量也较多时，会导致液晶光控面板00的透光率较低，进而导致集成了这种液晶光控面板00的显示装置的显示效果较差。
请参考图3和图4，图3是本申请实施例提供的一种液晶光控面板的俯视图。图4是图3示出的液晶光控面板在B-B’处的截面图。液晶光控面板000可以包括：相对设置的第一阵列基板100和盖板200，以及位于第一阵列基板100和盖 板200之间的多个支撑柱300。
液晶光控面板000中的第一阵列基板100可以包括：第一衬底101，以及位于第一衬底101上的多个晶体管102。这里，第一阵列基板100中的多个晶体管102可以均位于第一衬底101靠近盖板200的一侧。液晶光控面板000具有多个阵列排布的光控区域00a，多个光控区域00a与多个晶体管102一一对应，每个晶体管102可以位于对应的光控区域00a内。
液晶光控面板000中的盖板200可以包括：第二衬底201，以及位于第二衬底201上的遮光层202。这里，其中，盖板200中的遮光层202可以位于第二衬底201靠近第一阵列基板100的一侧。其中，遮光层202具有：与多个支撑柱300一一对应的多个第一遮光块2021，以及与多个晶体管102一一对应的多个第二遮光块2022。
其中，支撑柱300在第一衬底101上的正投影位于对应的第一遮光块2021在第一衬底101上的正投影内，使得第一遮光块2021可以遮挡穿过第一阵列基板100的光线中射向支撑柱300的光线，如此，通过第一遮光块2021对支撑柱300进行遮挡，可以提高液晶光控面板000的调光效果。晶体管102在第一衬底101上的正投影位于对应的第二遮光块2022在第一衬底101上的正投影内，使得第二遮光块2022可以遮挡穿过第一阵列基板100的光线中射向晶体管102的光线，如此，通过第二遮光块2022对晶体管102进行遮挡，可以提高液晶光控面板000的调光效果。
在本申请中，一个第二遮光块2022的侧面与至少一个第一遮光块2021的侧面贴接。也即是，一个第二遮光块2022在第一衬底101上的正投影的部分边界，与至少一个第一遮光块2021在第一衬底101上的正投影的部分边界重合。
需要说明的是，液晶光控面板000还可以包括：位于第一阵列基板100和盖板200之间的第一液晶层400。通过多个支撑柱300可以保证第一阵列基板100和盖板200之间对盒时的均匀性，进而可以保证第一液晶层400能够均匀分布在第一阵列基板100与盖板200之间。而当第一液晶层400的均匀性越高时，多个光控区域00a的调光效果就越均匀，使得液晶光控面板000的可以具有更好调光效果。
在本申请实施例中，当一个第二遮光块2022的侧面与至少一个第一遮光块2021的侧面重合上时，两个相邻的光控区域00a之间存在一个共用的支撑柱 300。例如，支撑柱300a既能够作为这个支撑柱300a左侧的光控区域00a内的支撑柱300，又能够作为这个支撑柱300a右侧的光控区域00a内的支撑柱300。这样，可以在保证每个光控区域00a里面的支撑柱300的个数不变前提下，减少两个相邻的光控区域00a里面的支撑柱300的总个数。相应的，两个相邻的光控区域00a里面的第一遮光块2021的总个数也会减少。例如，每个光控区域00a里面还是6个支撑柱300。但是，两个相邻的光控区域00a里面支撑柱300的个数为11个。相应的，两个相邻的光控区域00a里面的第一遮光块2021的总个数也是11个。这样，可以有效的降低盖板200中设置的第一遮光块2021的数量，使得遮光层202在第二衬底201上的正投影的面积较小，进而使得液晶光控面板000的开口率及透光率较高，可以提高集成了这种液晶光控面板000的显示装置的显示效果。
综上所述，本申请实施例提供了一种液晶光控面板，包括：第一阵列基板、盖板和多个支撑柱；第一阵列基板包括第一衬底和多个晶体管，盖板包括第二衬底和遮光层。由于当一个第二遮光块的侧面与至少一个第一遮光块的侧面重合上时，两个相邻的光控区域之间存在一个共用的支撑柱。这样，可以在保证每个光控区域里面的支撑柱的个数不变前提下，减少两个相邻的光控区域里面的支撑柱的总个数。相应的，两个相邻的光控区域里面的第一遮光块的总个数也会减少。这样，可以有效的降低盖板中设置的第一遮光块的数量，使得遮光层在第二衬底上的正投影的面积较小，进而使得液晶光控面板的开口率及透光率较高，可以提高集成了这种液晶光控面板的显示装置的显示效果。
在本申请实施例中，请参考图5，图5是本申请实施例提供的另一种液晶光控面板的俯视图。液晶光控面板000中的多个支撑柱300排布为多排。由于盖板200中的多个第一遮光块2021可以与多个支撑柱300一一对应。因此，多个第一遮光块2021也可以排布为多排，且多排第一遮光块2021可以与多排支撑柱300一一对应。又由于第一阵列基板100中的多个晶体管102可以阵列排布为多行，且盖板200中的多个第二遮光块2022可以与多个晶体管102一一对应。因此，多个第二遮光块2022也可以排布为多行，且多行第二遮光块2022可以与多行晶体管102一一对应。
需要说明的是，在图5中一排支撑柱300内的各个支撑柱300并非是按照一条直线阵列排布为一行的，而是按照折线型结构进行阵列排布的。相应的， 一排第一遮光块2021也是按照折线型结构进行阵列排布的。
还需要说明的是，在图5中一行晶体管102是按照一条直线阵列排布为一行的，相应的，一行第二遮光块2022也是按照一条直线阵列排布为一行的。
在本申请中，与一排支撑柱300对应的一排第一遮光块2021可以包括：多个主遮光块2021a和多个辅助遮光块2021b。其中，多个主遮光块2021a与一行第二遮光块2022内的多个第二遮光块2022一一对应，主遮光块2021a的侧面与对应的第二遮光块2022的侧面贴接。在一排第一遮光块2021中，两个相邻的主遮光块2021a之间排布有至少一个辅助遮光块2021b。其中，第二遮光块2022的侧面与辅助遮光块2021b的侧面可以贴接，也可以不贴接。可选的，第二遮光块2022的侧面与至少一个辅助遮光块2021b的侧面贴接。
在这种情况下，当第二遮光块2022的侧面与一个辅助遮光块2021b的侧面贴接时，一个第二遮光块2022的侧面不仅与主遮光块2021a的侧面重合，还与辅助遮光块2021b的侧面重合，也即，一个第二遮光块2022的侧面与两个第一遮光块2021的侧面重合，从而能够进一步降低遮光层202在第二衬底201上的正投影的面积，以进一步的提高液晶光控面板000的开口率及透光率。
在本申请实施例中，如图5所示，在一排第一遮光块2021中，每两个相邻的主遮光块2021a之间排布的辅助遮光块2021b的个数相同。例如，每两个相邻的主遮光块2021a之间排布的辅助遮光块2021b的个数均为4个。
由于多个第一遮光块2021与多个支撑柱300一一对应，因此，当每两个相邻的主遮光块2021a之间排布的辅助遮光块2021b的个数相同时，两个相邻的主遮光块2021a对应的两个相邻的支撑柱300之间，排布的支撑柱300个数也相同。这样，液晶光控面板000的各个区域受到的支撑柱300的支撑力相近，如此，可以进一步保证第一液晶层400的均匀性，提高液晶光控面板000的调光效果。
可选的，当一排第一遮光块2021中两个相邻的主遮光块2021a之间排布至少两个辅助遮光块2021b时，在至少两个辅助遮光块2021b中，在目标方向Y上任意两个辅助遮光块2021b之间的中心距离均大于0。其中，目标方向Y垂直于一排第一遮光块2021的整体排布方向。
在这种情况下，对于两个相邻的主遮光块2021a之间排布的至少两个辅助遮光块2021b，不会位于与目标方向Y垂直的同一条直线上。这样，能够避免 因多个辅助遮光块2021b位于同一条直线上，而导致液晶光控面板000出现彩虹纹的不良现象，从而可以进一步的提高了集成了这种液晶光控面板000的了显示装置的调光效果。
在本申请中，请参考图5和图6，图6是图5示出的液晶光控面板在C-C’处的截面图。第一阵列基板100还包括：位于第一衬底101上的公共信号线103，以及位于多个晶体管102背离第一衬底102一侧的公共电极层106。第一阵列基板100具有多个第一过孔V1，公共电极层106通过多个第一过孔V1与多条公共信号线103电连接。示例性的，第一阵列基板100还可以包括：位于多个晶体管102与公共电极层106之间的平坦层107，平坦层107具有多个第一过孔V1。
遮光层202还具有：与多个第一过孔V1一一对应的多个第三遮光块2023，第一过孔V1在第一衬底101上的正投影，位于对应的第三遮光块2023在第一衬底101上的正投影内。
在这种情况下，由于公共电极层106需要通过多个第一过孔V1与多条公共信号线103电连接。因此，公共电极层106中的部分需要位于第一过孔V1内，也即是，第一过孔V1内填充有导电材料。这样，当液晶光控面板000施加电场以控制第一液晶层400中的液晶偏转时，第一过孔V1处填充的导电材料，会影响第一过孔V1处的电场的分布，进而影响第一过孔V1处的液晶的偏转角度，导致光线在穿过第一过孔V1时的光强，与光线穿过除第一过孔V1之外的其他部位时的光强不同，进而导致液晶光控面板000所呈现的亮度分布并不均匀。而在通过第三遮光块2023对第一过孔V1进行遮挡后，可以防止穿过第一过孔V1的光线射出盖板200，有效的提高了液晶光控面板000所呈现的亮度分布的均匀性。
可选的，如图5所示，第一阵列基板100还包括：位于第一衬底101上的多条第一栅线104和多条第一数据信号线105。第一栅线104的整体延伸方向与第一数据信号线105的整体延伸方向相交。多条第一栅线104和多条第一数据信号线105围成多个光控区域00a。例如，两条相邻的第一栅线104与两条相邻的第一数据信号线105可以围成一个光控区域00a。
在本申请中，一条第一栅线104与一行晶体管102内的各个晶体管102的栅极102a电连接，一条第一数据信号线105与一列晶体管102内的各个晶体管 102的第一极102b电连接。
其中，公共信号线103可以与第一数据信号线105同层设置且材料相同，也即是，公共信号线103可以与第一数据信号线105是采用同一次构图工艺形成的。在本申请中，第一数据信号线105的延伸方向可以与公共信号线103的延伸方向平行。
多条第一栅线104在第一衬底101上的正投影均位于遮光层202在第一衬底101上的正投影内。在本申请中，用于制成第一栅线104的材料可以为金属材料。例如，金属铜。且第一栅线104的宽度较宽，当有光线射向液晶光控面板000内的第一栅线104时，第一栅线104对光线的反射率较高，进而影响液晶光控面板000的显示效果。而当多条第一栅线104在第一衬底101上的正投影均位于遮光层202在第一衬底101上的正投影内时，通过遮光层202可以遮挡射向第一栅线104的光线，从而提高了该液晶光控面板000的显示效果。
示例的，遮光层202还具有遮光线段2024。其中，第一栅线104在第一衬底101上的正投影，可以位于遮光线段2024在第一衬底101上的正投影内。可选的，遮光线段2024的宽度可以等于第一栅线104的宽度。这样，第一栅线104在第一衬底101上的正投影的边界，可以位于遮光线段2024在第一衬底101上的正投影的边界重合，使得遮光线段2024能够正好对第一栅线104进行遮挡。如此，可以在保证遮光线段2024能够对第一栅线104进行有效遮挡的前提下，进一步的减小遮光层202在第二衬底201上的正投影的面积。
需要说明的是，用于制成公共信号线103与第一数据信号线105的材料通常也为金属材料。但是，公共信号线103的宽度与第一数据信号线105的宽度通常较小。因此，公共信号线103与第一数据信号线105对光线的反射率较低。盖板200中的遮光层202可以不对公共信号线103与第一数据信号线105进行遮挡。
可选的，请参见图7，图7是本申请实施例提供的一种栅线的结构示意图。第一栅线104包括：多个第一子栅线104a和多个第二子栅线104b。多个第一子栅线104a和多个第二子栅线104b交替分布，第一子栅线104a的第一端和第二子栅线104b的第一端连接，第一子栅线104a的第二端和第二子栅线104b的第二端连接，且第一子栅线104a的延伸方向与第二子栅线104b的延伸方向相交。
这里，通过交替分布的多个第一子栅线104a和多个第二子栅线104b，可以 让第一栅线104呈折线型分布。这样，两条相邻的第一栅线104与两条相邻的第一数据信号线105所围成的光控区域00a的形状为类似箭头的形状。而液晶显示面板中的子像素区域的形状通常为矩形。因此，在将本申请中的液晶光控面板000与液晶显示面板组装为显示装置时，可以保证液晶光控面板000中的光控区域00a的形状与液晶显示面板中的子像素区域的形状不同，从而可以避免显示装置出现彩虹纹，因此提高了该显示装置的显示效果。
在本申请中，第一子栅线104a的第一端和第二子栅线104b的第一端连接的部分在第一衬底101上的正投影，与第一遮光块2021在第一衬底上的正投影相交叠；第一子栅线104a的第二端和第二子栅线104b的第二端连接的部分在第一衬底101上的正投影，与第三遮光块2023在第一衬底上的正投影相交叠。
示例的，如图5所示，第一子栅线104a的第一端和第二子栅线104b的第一端连接的部分在第一衬底101上的正投影，与一排第一遮光块2021中的主遮光块2021a在第一衬底101上的正投影相交叠。而一排第一遮光块2021中的辅助遮光块2021b在第一衬底101上的正投影，可以与第一子栅线104a在第一衬底101上的正投影相交叠，或者，与第二子栅线104b在第一衬底101上的正投影相交叠。
在这种情况下，多排第一遮光块2021可以与多条第一栅线104一一对应，使得多排支撑柱300也可以与多条第一栅线104一一对应。这样，每排支撑柱300均能够被对应的一条第一栅线104支撑。如此，通过第一栅线104的支撑，可以提高支撑柱300对相对设置的第一阵列基板100和盖板200进行支撑时的稳定性。并且，每排支撑柱300的排布方式可以与对应的一条第一栅线104的结构形状相关。当第一栅线104呈折线型分布时，与第一栅线104对应的一排支撑柱300也按照折线型结构进行阵列排布。
可选的，如图7所示，第一栅线104具有与对应的一排支撑柱300内的多个支撑柱300一一对应的多个凸部104c，凸部104c在第一衬底101上的正投影位于对应的支撑柱300在第一衬底100上的正投影内。示例性，支撑柱300可以为圆台形支撑柱。圆台形支撑柱中靠近第一阵列基板100的底面的面积，小于圆台形支撑柱中靠近第二阵列基板200的底面的面积。此时，即使凸部104c在第一衬底101上的正投影位于对应的支撑柱300在第一衬底100上的正投影内，通过凸部104c也能够为支撑柱300提供支撑。
在这种情况下，通过凸部104c可以为支撑柱300提供支撑，提高支撑柱300的稳定性，进而可以进一步保证第一阵列基板100和盖板200之间对盒时的均匀性。
示例的，由于第一子栅线104a的第一端和第二子栅线104b的第一端连接的部分在第一衬底101上的正投影，与一排第一遮光块2021中的主遮光块2021a在第一衬底101上的正投影相交叠。因此，第一子栅线104a的第一端和第二子栅线104b的第一端连接的部分需要设置一个凸部104c。
又由于一排第一遮光块2021中的辅助遮光块2021b在第一衬底101上的正投影，可以与第一子栅线104a在第一衬底101上的正投影相交叠，或者，与第二子栅线104b在第一衬底101上的正投影相交叠。因此，第一子栅线104a和第二子栅线104b上均需要设置至少一个凸部104c。
可选的，第一子栅线104a和第二子栅线104b上分布的凸部104c的数量均大于或等于2。在这种情况下，在第一子栅线104a和第二子栅线104b上，与凸部104c对应的支撑柱300的数量均大于或等于2，而支撑柱300数量均大于或等于2时，可以对液晶光控面板000发出的光线的规律性进行有效干扰，从而能够降低因发出的光线的规律性较高而发生摩尔纹的概率。
在本申请中，第一遮光块2021在第一衬底101上的正投影的面积，可以等于对应的支撑柱300在第一衬底101上的正投影的面积。这样，第一遮光块2021在第一衬底101上的正投影的边界，可以与对应的支撑柱300在第一衬底101上的正投影的边界重合，使得第一遮光块2021能够正好对支撑柱300进行遮挡。如此，可以在保证第一遮光块2021能够对支撑柱300进行有效遮挡的前提下，进一步的减小遮光层202在第二衬底201上的正投影的面积。
在本申请实施例中，请参见图8，图8是本申请实施例提供的又一种液晶光控面板的俯视图。多个晶体管102在第一衬底101上的正投影与多条第一栅线104在第一衬底101上的正投影，均位于公共电极层106在衬底上的正投影内。
在这种情况下，通过公共电极层106能够对外界电场进行屏蔽，如此，可以避免外界电场对多条第一栅线104内的信号以及晶体管102内的信号造成干扰，从而提高了液晶光控面板000的电学稳定性。并且，在本申请实施例中，由于一个第二遮光块2022的侧面与至少一个第一遮光块2021的侧面重合，减少了支撑柱300的总个数，而第一栅线104中的多个凸部104c与多个支撑柱300 一一对应，因此也减小了第一栅线104中的多个凸部104c的数量。这样，第一栅线104与公共电极层106的交叠面积也会降低，有效的降低了公共电极层106与第一栅线104之间的寄生电容，从而进一步提高了该液晶光控面板000的电学稳定性。
在本申请中，如图8所示，公共电极层106具有多个狭缝106a，多个狭缝106a在第一衬底101上的正投影，与多个晶体管102在第一衬底101上的正投影不重合，且与多条第一栅线104在第一衬底101上的正投影不重合。如此，可以确保公共电极层106中未设置狭缝106a的部分，能够覆盖多个晶体管102和多条第一栅线104。而公共电极层106中未设置狭缝106a的部分可以更佳的屏蔽外界电场，从而避免了外界电场对多条第一栅线104内的信号以及多个晶体管102内的信号造成干扰。并且，当一个第二遮光块2022的侧面与至少一个第一遮光块2021的侧面重合时，可以减少支撑柱300的总个数，而第一栅线104中的多个凸部104c与多个支撑柱300一一对应。这样，可以有效的降低第一栅线在第一衬底101上的正投影的面积，使得公共电极层106中覆盖第一栅线104的部分(也即，公共电极层106中未设置狭缝106a的部分)在第一衬底101上的正投影的面积也会降低，而第一阵列基板100朝向第二阵列基板200一侧的整体面积是不变。如此，公共电极层106中设置狭缝106a的部分在第一衬底101上的正投影的面积会增大，从而可以提高液晶光控面板000的开口率及透光率。
可选的，请继续参见图6，第一阵列基板100还包括：与多个晶体管102一一对应的多个像素电极108，晶体管102的第二极102c与对应的像素电极108电连接。其中，像素电极108在第一衬底101上的正投影与公共信号线103在第一衬底101上的正投影存在交叠区域。这样，像素电极108与公共信号线103之间可以形成存储电容。
在本申请中，像素电极108与第一栅线104同层设置但材料不同。也即是，像素电极108与第一栅线104是采用两次构图工艺形成的。一次构图工艺形成像素电极108所在的导电层，另一次构图工艺形成第一栅线104所在的导电层。像素电极108可以是透明导电材料，例如，氧化铟锡。第一栅极104的材料可以金属，例如，铜。当像素电极108是透明导电材料时，可以提高液晶光控面板的透光性。在本申请中，通过将像素电极108与第一栅线104同层设置，可以有效的减少液晶光控面板000中的导电层的层数，使得液晶光控面板000的 厚度较低，进而可以降低集成了液晶光控面板000的显示装置的厚度。
可选的，请继续参考图6，第一阵列基板100还包括：栅极绝缘层109，晶体管102的栅极102a位于栅极绝缘层109靠近第一衬底101的一侧，晶体管102的第一极102b和第二极102c均位于栅极绝缘层109背离第一衬底101的一侧。
其中，栅极绝缘层109具有与多个晶体管102一一对应的多个第二过孔V2，晶体管102的第二极102c通过对应的第二过孔V2与对应的像素电极108电连接。
综上所述，本申请实施例提供了一种液晶光控面板，包括：第一阵列基板、盖板和多个支撑柱；第一阵列基板包括第一衬底和多个晶体管，盖板包括第二衬底和遮光层。由于当一个第二遮光块的侧面与至少一个第一遮光块的侧面重合上时，两个相邻的光控区域之间存在一个共用的支撑柱。这样，可以在保证每个光控区域里面的支撑柱的个数不变前提下，减少两个相邻的光控区域里面的支撑柱的总个数。相应的，两个相邻的光控区域里面的第一遮光块的总个数也会减少。这样，可以有效的降低盖板中设置的第一遮光块的数量，使得遮光层在第二衬底上的正投影的面积较小，进而使得液晶光控面板的透光率较高，可以提高集成了这种液晶光控面板的显示装置的显示效果。
请参考图9，图9是本申请实施例提供的一种显示装置的示意图。该显示装置可以包括：层叠设置的液晶光控面板000和液晶显示面板001，该液晶光控面板000为上述的液晶光控面板000。该显示装置可以为：显示器、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
液晶显示面板001可以包括：相对设置的第二阵列基板500、彩膜基板600，以及位于第二阵列基板500和彩膜基板600之间的第二液晶层700。其中，第二阵列基板500可以包括：第三衬底，以及位于第三衬底上的多条第二栅线和多条第二数据信号线。多条第二栅线和多条第二数据信号线可以围成多个子像素区域。例如，两条相邻的第二栅线与两条相邻的第二数据信号线可以围成一个子像素区域。
可选的，液晶光控面板000具有多个阵列排布的光控区域00a，液晶显示面板001具有多个阵列排布的子像素区域，光控区域00a的形状与子像素区域的 形状不同。在这种情况下，由于液晶光控面板的光控区域00a与液晶显示面板中的子像素区域的形状不同，从而可以避免显示装置出现彩虹纹的不良现象，因此提高了该显示装置的显示效果。
请继续参考图9，显示装置还包括：背光模组002，背光模组002位于液晶光控面板000背离液晶显示面板001的一侧。背光模组002发出的光线，经过液晶光控面板000，进入液晶显示面板001。液晶显示面板001可以调整各个子像素区域出射的光线的颜色和亮度，以实现各种画面的显示。液晶光控面板00可以调节各个光控区域00a出射的光线的亮度，以提高液晶显示面板001显示的画面的对比度，从而提高液晶显示面板001的显示效果。
需要指出的是，在附图中，为了图示的清晰可能夸大了层和区域的尺寸。而且可以理解，当元件或层被称为在另一元件或层“上”时，它可以直接在其他元件上，或者可以存在中间的层。另外，可以理解，当元件或层被称为在另一元件或层“下”时，它可以直接在其他元件下，或者可以存在一个以上的中间的层或元件。另外，还可以理解，当层或元件被称为在两层或两个元件“之间”时，它可以为两层或两个元件之间惟一的层，或还可以存在一个以上的中间层或元件。通篇相似的参考标记指示相似的元件。
在本申请中，术语“第一”和“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性。术语“多个”指两个或两个以上，除非另有明确的限定。
以上所述仅为本申请的可选的实施例，并不用以限制本申请，凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本申请的保护范围之内。

Claims (20)

  1. 一种液晶光控面板，其特征在于，包括：相对设置的第一阵列基板和盖板，以及位于所述第一阵列基板和所述盖板之间的多个支撑柱；
    所述第一阵列基板包括：第一衬底，以及位于所述第一衬底上的多个晶体管；所述盖板包括：第二衬底，以及位于所述第二衬底上的遮光层，所述遮光层具有与所述多个支撑柱一一对应的多个第一遮光块，以及与所述多个晶体管一一对应的多个第二遮光块；
    其中，所述支撑柱在所述第一衬底上的正投影位于对应的第一遮光块在所述第一衬底上的正投影内，所述晶体管在所述第一衬底上的正投影位于对应的第二遮光块在所述第一衬底上的正投影内，一个所述第二遮光块的侧面与至少一个所述第一遮光块的侧面贴接。
  2. 根据权利要求1所述的液晶光控面板，其特征在于，所述多个支撑柱排布为多排，与一排所述支撑柱对应的一排第一遮光块包括：多个主遮光块和多个辅助遮光块；
    其中，所述多个主遮光块与一行第二遮光块内的多个第二遮光块一一对应，所述主遮光块的侧面与对应的第二遮光块的侧面贴接；
    在一排所述第一遮光块中，两个相邻的所述主遮光块之间排布有至少一个所述辅助遮光块。
  3. 根据权利要求2所述的液晶光控面板，其特征在于，在一排所述第一遮光块中，每两个相邻的所述主遮光块之间排布的所述辅助遮光块的个数相同。
  4. 根据权利要求2所述的液晶光控面板，其特征在于，当一排所述第一遮光块中两个相邻的所述主遮光块之间排布至少两个辅助遮光块时，在所述至少两个辅助遮光块中，在目标方向上任意两个辅助遮光块之间的中心距离均大于0，所述目标方向垂直于一排所述第一遮光块的整体排布方向。
  5. 根据权利要求2所述的液晶光控面板，其特征在于，所述第二遮光块的侧 面与至少一个所述辅助遮光块的侧面贴接。
  6. 根据权利要求1至5任一所述的液晶光控面板，其特征在于，所述第一阵列基板还包括：位于所述第一衬底上的公共信号线，以及位于所述多个晶体管背离所述第一衬底一侧的公共电极层；
    所述第一阵列基板具有多个第一过孔，所述公共电极层通过所述多个第一过孔与所述多条公共信号线电连接；
    所述遮光层还具有：与所述多个第一过孔一一对应的多个第三遮光块，所述第一过孔在所述第一衬底上的正投影，位于对应的第三遮光块在所述第一衬底上的正投影内。
  7. 根据权利要求6所述的液晶光控面板，其特征在于，所述第一阵列基板还包括：位于所述第一衬底上的多条第一栅线和多条第一数据信号线，一条所述第一栅线与一行晶体管内的各个晶体管的栅极电连接，一条所述第一数据信号线与一列晶体管内的各个晶体管的第一极电连接；
    其中，所述公共信号线与所述第一数据信号线同层设置且材料相同，所述多条第一栅线在所述第一衬底上的正投影均位于所述遮光层在所述第一衬底上的正投影内。
  8. 根据权利要求7所述的液晶光控面板，其特征在于，所述第一栅线包括：多个第一子栅线和多个第二子栅线，所述多个第一子栅线和所述多个第二子栅线交替分布，所述第一子栅线的第一端和所述第二子栅线的第一端连接，所述第一子栅线的第二端和所述第二子栅线的第二端连接，且所述第一子栅线的延伸方向与所述第二子栅线的延伸方向相交。
  9. 根据权利要求8所述的液晶光控面板，其特征在于，所述第一子栅线的第一端和所述第二子栅线的第一端连接的部分在所述第一衬底上的正投影，与所述第一遮光块在所述第一衬底上的正投影相交叠；
    所述第一子栅线的第二端和所述第二子栅线的第二端连接的部分在所述第一衬底上的正投影，与所述第三遮光块在所述第一衬底上的正投影相交叠。
  10. 根据权利要求8所述的液晶光控面板，其特征在于，所述多条第一栅线与多排所述支撑柱一一对应，所述第一栅线具有与对应的一排支撑柱内的多个支撑柱一一对应的多个凸部，所述凸部在所述第一衬底上的正投影位于对应的支撑柱在所述第一衬底上的正投影内。
  11. 根据权利要求10所述的液晶光控面板，其特征在于，所述第一子栅线的第一端和所述第二子栅线的第一端连接的部位具有一个所述凸部，所述第一子栅线与所述第二子栅线上分布的所述凸部的数量均大于或等于2。
  12. 根据权利要求7至11任一所述的液晶光控面板，其特征在于，所述多个晶体管在所述第一衬底上的正投影与所述多条第一栅线在所述第一衬底上的正投影，均位于所述公共电极层在所述衬底上的正投影内。
  13. 根据权利要求12所述的液晶光控面板，其特征在于，所述公共电极层具有多个狭缝，所述多个狭缝在所述第一衬底上的正投影，与所述多个晶体管在所述第一衬底上的正投影不重合，且与所述多条第一栅线在所述第一衬底上的正投影不重合。
  14. 根据权利要求7至11任一所述的液晶光控面板，其特征在于，所述第一阵列基板还包括：与所述多个晶体管一一对应的多个像素电极，所述晶体管的第二极与对应的像素电极电连接；
    其中，所述像素电极在所述第一衬底上的正投影与所述公共信号线在所述第一衬底上的正投影存在交叠区域。
  15. 根据权利要求14所述的液晶光控面板，其特征在于，所述像素电极与所述第一栅线同层设置但材料不同。
  16. 根据权利要求15所述的液晶光控面板，其特征在于，所述第一阵列基板还包括：栅极绝缘层，所述晶体管的栅极位于所述栅极绝缘层靠近所述第一衬 底的一侧，所述晶体管的第一极和第二极均位于所述栅极绝缘层背离所述第一衬底的一侧；
    其中，所述栅极绝缘层具有与所述多个晶体管一一对应的多个第二过孔，所述晶体管的第二极通过对应的第二过孔与对应的像素电极电连接。
  17. 根据权利要求7至11任一所述的液晶光控面板，其特征在于，所述第一阵列基板还包括：位于所述多个晶体管与所述公共电极层之间的平坦层，所述平坦层具有所述多个第一过孔。
  18. 一种显示装置，其特征在于，包括：层叠设置的液晶光控面板和液晶显示面板，所述液晶光控面板为权利要求1至17任一所述的液晶光控面板。
  19. 根据权利要求18所述的显示装置，其特征在于，所述液晶光控面板具有多个阵列排布的光控区域，所述液晶显示面板具有多个阵列排布的子像素区域，所述光控区域的形状与所述子像素区域的形状不同。
  20. 根据权利要求18所述的显示装置，其特征在于，所述显示装置还包括：背光模组，所述背光模组位于所述液晶光控面板背离所述液晶显示面板的一侧。
PCT/CN2022/102838 2022-06-30 2022-06-30 液晶光控面板及显示装置 WO2024000410A1 (zh)

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JP2006030367A (ja) * 2004-07-13 2006-02-02 Toshiba Matsushita Display Technology Co Ltd アレイ基板及び液晶表示装置
CN104040415A (zh) * 2012-01-13 2014-09-10 夏普株式会社 液晶显示装置
CN105824146A (zh) * 2015-01-10 2016-08-03 南京瀚宇彩欣科技有限责任公司 液晶显示面板的像素结构及像素形成方法
CN111077712A (zh) * 2020-01-02 2020-04-28 上海中航光电子有限公司 液晶装置及其制作方法、光固化打印设备
CN112987357A (zh) * 2021-02-04 2021-06-18 Tcl华星光电技术有限公司 显示面板及其制备方法
CN113376904A (zh) * 2020-03-10 2021-09-10 成都京东方光电科技有限公司 一种单色液晶显示面板以及双层液晶显示装置

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JP2006030367A (ja) * 2004-07-13 2006-02-02 Toshiba Matsushita Display Technology Co Ltd アレイ基板及び液晶表示装置
CN104040415A (zh) * 2012-01-13 2014-09-10 夏普株式会社 液晶显示装置
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