WO2023273759A1 - 光互连系统及通信设备 - Google Patents
光互连系统及通信设备 Download PDFInfo
- Publication number
- WO2023273759A1 WO2023273759A1 PCT/CN2022/095941 CN2022095941W WO2023273759A1 WO 2023273759 A1 WO2023273759 A1 WO 2023273759A1 CN 2022095941 W CN2022095941 W CN 2022095941W WO 2023273759 A1 WO2023273759 A1 WO 2023273759A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- optical
- signal
- optical module
- chip
- receiving
- Prior art date
Links
- 230000003287 optical effect Effects 0.000 title claims abstract description 488
- 238000004891 communication Methods 0.000 title claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000011084 recovery Methods 0.000 claims description 119
- 230000005540 biological transmission Effects 0.000 abstract description 6
- 238000010586 diagram Methods 0.000 description 14
- 230000014509 gene expression Effects 0.000 description 7
- 239000013307 optical fiber Substances 0.000 description 7
- 238000004904 shortening Methods 0.000 description 4
- 239000000470 constituent Substances 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 230000000712 assembly Effects 0.000 description 2
- 238000000429 assembly Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000002457 bidirectional effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000000835 fiber Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/40—Transceivers
Definitions
- the present application relates to the technical field of optical communication, in particular to an optical interconnection system and communication equipment.
- the mainstream optical interconnect architecture of current optical interface communication products is pluggable optical modules.
- On-board optical interconnection is to move the optical interconnection components from the panel side where the pluggable optical module is located to the periphery of the main chip.
- the optical interconnection components still exist in the form of modules, called on-board optical modules (on-board optics) , referred to as OBO) or on-board optical module.
- the link between the onboard optical module and the main chip can be shortened, so as to reduce the power consumption of the onboard optical interconnection architecture.
- the area around the main chip where the onboard optical module can be placed is small.
- the size of the onboard optical module can only be installed in some The peripheral area of the main chip of the communication device, and the size of the current on-board optical module is difficult to be so small, so it is difficult to obtain a low-power optical interconnection architecture.
- Embodiments of the present application provide an optical interconnection system and communication equipment capable of improving layout flexibility.
- the present application provides an optical interconnection system, including a substrate and a signal transceiving unit disposed on the substrate, the signal transceiving unit includes a main chip, a plurality of on-board optical modules for sending ends, and a plurality of receiving ends On-board optical module; each of the sending-end on-board optical modules is used to receive the output electrical signal output by the main chip, convert the output electrical signal into an output optical signal, and output the output optical signal; each The on-board optical module of the receiving end is used to receive the input optical signal, convert the input optical signal into an input electrical signal, and transmit the input electrical signal to the main chip; wherein, the plurality of transmitting end boards The optical-carrying module or the multiple receiving-end on-board optical modules are close to the main chip and arranged along at least part of the periphery of the main chip.
- the on-board optical module at the sending end and one of the on-board optical modules at the receiving end are arranged close to and arranged along the periphery of the main chip, which shortens the distance between the on-board optical module at the sending end and the on-board optical module at the receiving end close to the main chip.
- the link between them reduces the power consumption of the optical interconnection system.
- the on-board optical module at the transmitting end Since the distance between the on-board optical module at the transmitting end and the on-board optical module at the receiving end is relatively small and the distance between the on-board optical module at the transmitting end and the on-board receiving end is relatively large, the on-board optical module at the transmitting end
- the length of the link from the module to the main chip is inconsistent with the length of the link from the onboard optical module at the receiving end to the main chip (that is, the sending and receiving link is asymmetrical), which means that only some components of the original complete onboard optical module can be placed close to the periphery of the main chip Placement, while the rest of the original complete onboard optical module can be placed far away, which improves the layout flexibility of the optical interconnection system while reducing the power consumption of the optical interconnection system.
- the transmitting onboard optical module includes a transmitting component, an electrical interface, and an optical interface, and the transmitting component passes through the transmitting onboard optical module.
- the electrical interface receives the output electrical signal output by the main chip, and the sending end component outputs the output optical signal through the optical interface of the sending end onboard optical module;
- the receiving end onboard optical module includes the The receiving end component, the electrical interface and the optical interface, the receiving end component receives the input optical signal through the optical interface of the receiving end onboard optical module, and the receiving end component receives the input optical signal through the receiving end
- the electrical interface of the onboard optical module transmits the input electrical signal to the main chip.
- the sending end component and the receiving end component are arranged in different onboard optical modules, which reduces the size limit of the sending end onboard optical module and reduces the size limit of the receiving end onboard optical module, thereby reducing the size of the sending end onboard optical module.
- the manufacturing process difficulty of the onboard optical module at the sending end and the onboard optical module at the receiving end also makes it possible to flexibly set the onboard optical module at the sending end and the onboard optical module at the receiving end according to the surrounding area of the main chip.
- the onboard optical module at the sending end further includes a signal recovery chip, and the signal The recovery chip is electrically connected between the electrical interface of the onboard optical module at the sending end and the component at the sending end, and the signal recovery chip is used to input the output of the electrical interface of the onboard optical module at the sending end
- the electrical signal provides relay and signal recovery; multiple receiving-end on-board optical modules are arranged close to and along the periphery of the main chip.
- the receiving-end on-board optical module may be located between the sending-end on-board optical module and the main chip.
- the on-board optical module of the sending end is set in an area far from the main chip. Although the link between the on-board module and the main chip of the sending end is long, the signal recovery chip in the on-board optical module of the sending end can recover the electrical signal. Effectively improve the link driving capability of the onboard optical module at the sending end.
- the receive-end on-board optical module without a signal recovery chip that is, the receive-end on-board optical module with weak driving ability among the transmit-end on-board optical module and the receive-end on-board optical module
- the receive-end on-board optical module without a signal recovery chip that is, the receive-end on-board optical module with weak driving ability among the transmit-end on-board optical module and the receive-end on-board optical module
- the onboard optical module at the receiving end further includes signal recovery Chip, the signal recovery chip is electrically connected between the receiving end component and the electrical interface of the receiving end onboard optical module, and the signal recovery chip is used for the input of the output of the receiving end component
- the electrical signal provides relay and signal recovery; multiple on-board optical modules of the sending end are arranged close to and along the periphery of the main chip.
- the on-board optical module at the sending end may be located between the on-board optical module at the receiving end and the main chip.
- the onboard optical module at the receiving end is set in an area far from the main chip.
- the signal recovery chip in the onboard optical module at the receiving end can recover electrical signals. Signal recovery effectively improves the link driving capability of the onboard optical module at the sending end.
- the on-board optical module at the sending end without a signal recovery chip that is, the on-board optical module at the sending end and the on-board receiving optical module at the receiving end
- the on-board optical module at the sending end without a signal recovery chip is placed close to and along the periphery of the main chip, shortening the The link between the on-board optical module at the sending end without a signal recovery chip and the main chip is improved, and the loss of the high-speed link from the main chip to the on-board optical module at the sending end is reduced.
- the onboard optical module at the sending end further includes a signal recovery chip
- the signal recovery chip of the on-board optical module at the sending end is electrically connected between the electrical interface of the on-board optical module at the sending end and the component at the sending end, and is used for the electrical interface of the on-board optical module at the sending end
- the inputted output electrical signal provides relay and signal recovery and transmits to the sending end component
- the signal recovery chip of the receiving end onboard optical module is used to provide relay for the input electrical signal of the receiving end component and signal recovery
- the signal recovery chip includes a serial-to-parallel converter, and the serial-to-parallel conversion between the on-board optical module at the sending end and the signal recovery chip near the periphery of the main chip in the on-board optical module at the receiving end
- the device is an ultra-short-distance serial-to-parallel converter, and the driving capability of the serial-
- Both the on-board optical module at the sending end and the on-board optical module at the receiving end have added a signal recovery chip, but the driving capability of the signal recovery chip in the on-board optical module near the periphery of the main chip is weaker than that of the other signal recovery chip. In this way, the driving capability of the signal recovery chip in the on-board optical module arranged away from the periphery of the main chip is improved, so that circuit boards, electrical interfaces (electrical connectors), sending end components, and receiving end components with low cost but poor loss or performance can be used. components.
- the drive capability of the signal recovery chip connected to the sending end component and the signal recovery chip connected to the receiving end component are different, so that the placement distance between the sending end component and the receiving end component is different from the main chip. While ensuring the low power consumption of the optical interconnect system architecture, it also improves the flexibility of the optical interconnect system layout.
- the present application provides an optical interconnection system, including a substrate and a signal transceiver unit disposed on the substrate, the signal transceiver unit includes a main chip and a plurality of on-board optical modules separately arranged, each of which The on-board optical module includes a sending-end component and a receiving-end component, and each of the sending-end components is used to receive the output electrical signal output by the main chip, convert the output electrical signal into an output optical signal, and convert the output optical signal into an output optical signal.
- each of the receiving end components is used to receive an input optical signal, convert the input optical signal into an input electrical signal, and deliver the input electrical signal to the main chip; wherein, the multiple The sending-end component or the multiple receiving-end components are close to the main chip and arranged along at least part of the periphery of the main chip.
- One of the sending-end component and the receiving-end component is close to and arranged along the periphery of the main chip, which shortens the link between the one of the sending-end component and the receiving-end component that is close to the main chip and the main chip, and reduces the optical interconnection.
- the power consumption of the system Since the distance between the sending-end component and the receiving-end component and the main chip is small, the distance between the sending-end component and the receiving-end component and the main chip is relatively large, so that the link between the sending-end component and the main chip is the same as the link between the receiving-end component and the main chip.
- the length of the link is inconsistent (that is, the sending and receiving link is asymmetrical), which improves the layout flexibility of the optical interconnection system while reducing the power consumption of the optical interconnection system.
- the sending end component and the receiving end component are integrated in the same on-board optical module, which facilitates the assembly of the optical interconnection system.
- each of the onboard optical modules further includes an electrical interface, an optical interface, and a signal recovery chip
- the sending end component receives The output electrical signal output by the main chip and the output optical signal through the optical interface
- the receiving end component receives the input optical signal through the optical interface, and transmits the input optical signal through the electrical interface
- the input electrical signal is sent to the main chip; the sending component is arranged between the receiving component and the electrical interface; the signal recovery chip is electrically connected between the electrical interface and the receiving component, and
- the signal recovery chip is used to provide relay and signal recovery on-board optical module for the input electrical signal output from the receiving end component.
- the sending end component occupies the space where the electrical interface of the onboard optical module is located, and the distance between the sending end component and the main chip is short and the link is short, which is conducive to reducing the power consumption of the optical interconnection system.
- the receiving component is located away from the space where the electrical interface of the onboard optical module is located. The distance between the receiving component and the main chip is longer and the link is longer. Due to the increase in the signal recovery between the electrical interface and the receiving component The chip ensures the signal transmission quality and transmission speed.
- each of the onboard optical modules further includes an electrical interface, an optical interface, and A signal recovery chip, the sending end component receives the output electrical signal output by the main chip through the electrical interface and outputs the output optical signal through the optical interface, and the receiving end component receives the output signal through the optical interface
- the input optical signal, and the input electrical signal is transmitted to the main chip through the electrical interface;
- the receiving end component is arranged between the sending end component and the electrical interface;
- the signal recovery chip is electrically connected between the electrical interface and the originating component, and the signal recovery chip is used to provide relay and signal recovery on-board optical module for the output electrical signal input from the electrical interface.
- the receiving end component occupies the space where the electrical interface of the onboard optical module is located.
- the distance between the receiving end component and the main chip is short and the link is short, which is beneficial to reduce the power consumption of the optical interconnection system.
- the sending end component is located far away from the space where the electrical interface of the onboard optical module is located.
- the distance between the sending end component and the main chip is longer and the link is longer. Due to the addition of a signal recovery chip electrically connected between the electrical interface and the sending end component, it ensures Signal transmission quality and transmission speed.
- the optical interconnection system further includes The optical cross component on the substrate, the optical interface is connected to the optical cross component through an optical fiber, which reduces the wiring crossing on the substrate and shortens the wiring length, which is conducive to improving the simplicity of the line structure of the optical interconnection system to ensure that the main chip On-board optical modules to adjacent receiving ends do not need to cross on the substrate wiring.
- the sending end component includes a driver and a modulator
- the driver is used to drive the external light source to emit light
- the modulator is used to modulate the light emitted by the external light source into output light according to the output electrical signal Signal.
- the receiving end component includes a photodetector and a transimpedance amplifier
- the photodetector is connected to the optical interface
- the photodetector is used to detect the input optical signal and generate an input signal according to the input optical signal.
- the transimpedance amplifier is connected between the photodetector and the electrical interface, and the transimpedance amplifier is used to receive the input electrical signal generated by the photodetector and amplify it before outputting it to the electrical interface.
- the present application provides a communication device, including the optical interconnection system according to the foregoing possible implementation manner.
- FIG. 1 is a structural block diagram of a communication device provided in a first embodiment of the present application
- FIG. 2 is a structural block diagram of the onboard optical module at the sending end of the optical interconnection system provided in the first embodiment of the present application;
- FIG. 3 is a structural block diagram of an on-board optical module at the receiving end of the optical interconnection system provided in the first embodiment of the present application;
- FIG. 4 is a schematic diagram of link performance analysis of the optical interconnection system provided in the first embodiment of the present application.
- Fig. 5 is a structural block diagram when the optical interconnection system provided in the first embodiment of the present application includes a signal transceiving unit;
- FIG. 6 is a structural block diagram of an optical interconnection system provided in a second embodiment of the present application.
- FIG. 7 is a structural block diagram of an on-board optical module at the sending end of the optical interconnection system provided in the second embodiment of the present application;
- FIG. 8 is a structural block diagram of an onboard optical module at the receiving end of the optical interconnection system provided in the second embodiment of the present application;
- FIG. 9 is a structural block diagram of an optical interconnection system provided in a third embodiment of the present application.
- FIG. 10 is a structural block diagram of an on-board optical module of an optical interconnection system provided in a third embodiment of the present application.
- FIG. 11 is a structural block diagram of an on-board optical module of an optical interconnection system provided in a fourth embodiment of the present application.
- FIG. 12 is a structural block diagram of an optical interconnection system provided in a fifth embodiment of the present application.
- FIG. 13 is a structural block diagram of an onboard optical module at the sending end of the optical interconnection system provided in the sixth embodiment of the present application;
- FIG. 14 is a structural block diagram of an onboard optical module at a receiving end of an optical interconnection system provided in a sixth embodiment of the present application.
- serial-to-parallel converters include long-range (LR) serial-to-parallel converters, very short-range (VSR) serial-to-parallel converters and extreme short-range (XSR) serial-to-parallel converters device.
- LR long-range
- VSR very short-range
- XSR extreme short-range serial-to-parallel converters
- signal recovery such as clock and data recovery, CDR
- On-board optical interconnection is to move the optical interconnection components from the panel side where the pluggable optical module is located to the periphery of the main chip. At this time, the optical interconnection components still exist in the form of modules, called on-board optical modules (on-board optics) , OBO) or on-board optical modules.
- OBO on-board optical modules
- the on-board optical interconnect reduces the driving capability of the serial-to-parallel converter of the link transceiver component by shortening the distance between the on-board optical module and the main chip, thereby reducing power consumption.
- the above-mentioned solutions related to on-board optical interconnection all require on-board optical modules to be placed close to the periphery of the main chip.
- the area around the main chip where on-board optical modules can be placed is small , for example, when the size of the onboard optical module is less than or equal to 15 ⁇ 15mm2 , it can only be installed in the peripheral area of the main chip of the optical interconnection system of some communication equipment (such as the routing cluster network board), while the current industry’s onboard optical module
- the size standard is 36x30, 36x40, 36x60mm 2 . Since the size of the existing on-board optical module is difficult to be so small, it is difficult to obtain an optical interconnection architecture with low power consumption.
- An optical interconnection system includes a substrate and a signal transceiving unit arranged on the substrate, the signal transceiving unit includes a main chip, a plurality of sending end onboard optical modules and a plurality of receiving end onboard optical modules; each of the The on-board optical module at the sending end is used to receive the output electrical signal output by the main chip, convert the output electrical signal into an output optical signal, and output the output optical signal; each of the on-board optical modules at the receiving end is used for receiving an input optical signal, converting the input optical signal into an input electrical signal, and transmitting the input electrical signal to the main chip;
- the end-board optical modules are close to the main chip and arranged along at least part of the periphery of the main chip.
- An optical interconnection system comprising a substrate and a signal transceiver unit arranged on the substrate, the signal transceiver unit includes a main chip and a plurality of onboard optical modules separately arranged, each of the onboard optical modules includes a sending end Components and receiving components, each of the transmitting components is used to receive the output electrical signal output by the main chip, convert the output electrical signal into an output optical signal, and output the output optical signal; each of the The receiving end component is used to receive the input optical signal, convert the input optical signal into an input electrical signal, and transmit the input electrical signal to the main chip; wherein, the plurality of sending end components or the plurality of The receiving end components are close to the main chip and arranged along at least part of the periphery of the main chip.
- the first embodiment of the present application provides a communication device 100 , including an optical interconnection system 30 and a system circuit board 50 .
- the communication device 100 performs information exchange with other external devices through the optical interconnection system 30 .
- description will be made by taking the communication device 100 as an example of a cluster router.
- the communication device 100 may also be other types of communication devices, such as a switch, a transmission network device, and an optical line terminal (Optical Line Terminal, OLT for short) of an access network.
- OLT optical Line Terminal
- the optical interconnection system 30 includes a substrate 301 and a plurality of signal transceiving units 303 disposed on the substrate 301 .
- the substrate 301 includes a printed circuit board (PCB for short).
- the number of signal transceiving units 303 is three.
- the signal transceiving unit 303 includes a main chip (payload IC) 31, a plurality of onboard optical modules 33 at the transmitting end (marked as OBO Tx in FIG. 1 ) and a plurality of onboard optical modules at the receiving end 35 (marked with OBO Rx in FIG. 1 ).
- the onboard optical module 33 at the sending end is used to receive the output electrical signal output by the main chip 31 and convert the output electrical signal into an output optical signal for output to the opposite end
- the onboard optical module 35 at the receiving end is used to receive and convert the input optical signal from the opposite end
- the input electrical signal is sent to the main chip 31.
- a plurality of receiving-end on-board optical modules 35 are arranged close to and arranged along the periphery of the main chip 31 .
- the onboard optical module 33 at the sending end is located on the side away from the main chip 31 of the onboard optical module 35 at the receiving end.
- the on-board optical module 33 at the sending end and the on-board optical module 35 at the receiving end are separate and independent on-board optical modules.
- the peripheral area of the chip 31 is only allocated to the onboard optical module 35 at the receiving end, so as to reduce the size restriction on the onboard optical module 33 at the sending end and the onboard optical module 35 at the receiving end, so as to facilitate the onboard optical module 33 at the sending end and the onboard optical module 35 at the receiving end.
- the onboard optical module 35 is arranged on the substrate 301 .
- each transmitting onboard optical module 33 includes an electrical interface 331 , a signal recovery chip 333 , a transmitting component (transmitter, Tx) 335 and an optical interface 337 .
- the electrical interface 331 is located on the side of the onboard optical module 33 facing the main chip 31 .
- the electrical interface 331 is electrically connected to the main chip 31 for receiving the output electrical signal output by the main chip 31 .
- the signal recovery chip 333 is electrically connected between the electrical interface 331 and the sending end component 335 .
- the signal recovery chip 333 is used to provide relay and signal recovery for the output electrical signal input from the electrical interface 331 , and transmit the recovered output electrical signal to the sending component 335 .
- the signal recovery chip 333 is a clock and data recovery (CDR for short) chip. It can be understood that, in other implementation manners, the signal recovery chip 333 may be an amplifier, and the amplifier is used to amplify electrical signals.
- the sending end component 335 is used for modulating the output electrical signal into an output optical signal.
- the optical interface 337 is used to output the output optical signal modulated by the transmitting end component 335 . It can be understood that the present application does not limit the location of the electrical interface 331 on the onboard optical module 33 of the transmitting end. For example, the electrical interface 331 is arranged in the middle of the onboard optical module 33 of the transmitting end.
- the electrical interface 331 is an electrical connector provided on the onboard optical module 33 at the sending end
- the optical interface 337 is an optical connector provided on the onboard optical module 33 at the sending end.
- the originating component 335 includes a driver 3351 and a modulator 3353 .
- the driver 3351 is used to drive the external light source to emit light
- the modulator 3353 is used to modulate the light emitted by the external light source into an output optical signal according to the output electrical signal. Since no light source is provided in the sending end assembly 335 , the structure of the sending end assembly 335 is simplified, which is beneficial to the miniaturization of the sending end assembly 335 . It can be understood that a built-in light source can be provided in the transmitting end component 335, so that the electric wire between the driver 3351 and the external light source and the optical fiber wiring between the modulator 3353 and the external light source are omitted.
- the receiving onboard optical module 35 includes an optical interface 351 , a receiving component (receiver, Rx for short) 353 , and an electrical interface 355 .
- the optical interface 351 is disposed on a side of the receiving-end on-board optical module 35 away from the main chip 31 for receiving input optical signals.
- the receiving end component 353 is used for modulating the input optical signal input from the optical interface 351 into an input electrical signal.
- the electrical interface 355 is disposed on a side of the receiving-end on-board optical module 35 facing the main chip 31 .
- the electrical interface 355 is electrically connected to the main chip 31 .
- the electrical interface 355 is used to transmit the input electrical signal to the main chip 31 .
- the present application does not limit the position of the electrical interface 355 on the receiving end onboard optical module 35.
- the electrical interface 355 is arranged in the middle of the receiving end onboard optical module 35.
- the position of the optical module 35 is not limited.
- the receiving end component 353 includes a photo detector (photo detector, PD) 3531 and a trans-impedance amplifier (trans-impedance amplifier, TIA) 3533 .
- the photodetector 3531 is connected to the optical interface 351 .
- the photodetector 3531 is used to detect the input optical signal and generate an input electrical signal according to the input optical signal.
- the transimpedance amplifier 3533 is connected between the photodetector 3531 and the electrical interface 355 for receiving the input electrical signal generated by the photodetector 3531 and amplifying it and outputting it to the electrical interface 355 .
- a photodetector is used in conjunction with a transimpedance amplifier.
- the photodetector is used to convert the weak optical signal received by the optical interface into an electrical signal.
- the generated electrical signal is a current signal, and then passed through the transimpedance amplifier.
- the impedance amplifier amplifies the current signal to a certain intensity to form a stable voltage signal.
- the present application does not limit the electrical interface 355 to be disposed on the side of the onboard optical module 35 at the receiving end facing the main chip 31 , as long as the electrical interface 355 and the main chip 31 can be electrically connected.
- the present application does not limit the optical interface 351 to be disposed on a side of the onboard optical module 35 at the receiving end away from the main chip 31 , as long as the optical interface 351 can receive input optical signals.
- Only one of the on-board optical module 33 at the transmitting end and the on-board optical module 35 at the receiving end is equipped with a signal recovery chip, which is called a one-way signal recovery chip (eg, one-way CDR).
- serial-parallel converters include but are not limited to long range (LR) serial-parallel converters, very short range (VSR) serial-parallel converters and extreme short range (referred to as XSR) serial-to-parallel converter.
- the driving capability of the LR serial-to-parallel converter is greater than that of the VSR serial-to-parallel converter, and the driving capability of the VSR serial-to-parallel converter is greater than that of the XSR serial-to-parallel converter.
- the driving capability indicates the maximum loss that the link can accept during normal communication, for example, 18dB. It can be understood that in other implementation manners, the serial-to-parallel converter of the signal recovery chip 333 can be set according to the required driving capability.
- the serial-to-parallel converter of the main chip 31 can use a long-distance serial-to-parallel converter
- the signal recovery chip 333 can use an ultra-short-distance serial-to-parallel converter
- the on-board optical module 35 at the receiving end does not have a signal recovery chip, so that the main
- the drive capability from the chip 31 to the onboard optical module 33 at the sending end is relatively strong, and the driving ability from the main chip 31 to the onboard optical module 35 at the receiving end is relatively weak.
- the driving capability of the light-carrying module 35 (receiving end) is asymmetric.
- the receiving-end on-board optical module 35 without a signal recovery chip is arranged close to and along the periphery of the main chip 31, that is, the receiving-end board with the weakest driving capability among the sending-end on-board optical module 33 and the receiving-end on-board optical module 35
- the light-carrying module 35 is arranged close to and along the periphery of the main chip 31, which shortens the link between the receiving-end on-board optical module 35 and the main chip 31 without a signal recovery chip, and reduces the distance between the main chip 31 and the receiving-end on-board optical module 31. The loss of the link of the module 35.
- the onboard optical module 33 at the sending end includes a signal recovery chip 333, which can relay and recover the output electrical signal, so the link between the onboard optical module 33 at the sending end and the main chip 31 can be relatively long.
- a plurality of onboard optical modules 33 at the originating end may be disposed in a region far from the periphery of the main chip 31 .
- the optical interconnection system 30 also includes an optical cross member 305
- the signal transceiving unit 303 also includes an output optical fiber 37 (only the output optical fiber 37 is shown exemplarily in FIG. An output fiber 37) is shown as an example.
- the output optical fiber 37 is connected between the optical interface 337 of each signal transceiving unit 303 and the optical cross member 305
- the input optical fiber 39 is connected between the optical interface 351 of each signal transceiving unit 303 and the optical cross member 305 .
- the optical cross-connect component 305 is also connected between the external light source and the modulator 3353 to provide connection and power distribution of the onboard optical module 33 at the transmitting end for the external light source.
- the optical cross component 305 is used to reduce the wiring crossing on the substrate 301, shorten the wiring length, and help improve the simplicity of the line structure of the optical interconnection system 30, so as to ensure that the main chip 31 does not need to be connected to the adjacent receiving end onboard optical module 35. Wiring crosses on the substrate 301 . In some implementations, the optical cross-connect component 305 is unnecessary under some hardware systems, such as line cards (line cards) and switches.
- the transceiver components (including Tx and Rx) are centrally arranged in the same on-board optical module, and it is difficult to constrain the size of the transceiver components to 36x30mm 2 to achieve a 16-channel specification through the existing technology.
- the onboard optical module 33 at the sending end is set separately from the onboard optical module 35 at the receiving end. 2 within an area of 2, the onboard optical module 33 of the transmitting end can realize 16 channels within an area of 36x40mm 2 , and the area constraint is relaxed to 233%. In this way, the manufacturing difficulty of the optical interconnection system 100 is reduced.
- Quantitative calculation of high-speed performance Take the signal recovery chip 333 in the onboard optical module 33 of the sending end as an example using a VSR serial-to-parallel converter commonly used in pluggable optical modules.
- the signal frequency is 28GHz
- the signal recovery chip 333 from the main chip 31 The driving capability of the full link is about 12dB
- the electrical interface 331 of the onboard optical module 33 at the sending end and the internal loss of the module are about 3dB
- the via holes of the optical interconnection system 30 (for signals between the multilayer circuit boards of the substrate 301 connected vias) and the high-speed margin is about 2dB
- the wiring loss of the optical interconnection system 30 can reach 7dB
- the equivalent wiring length is 7 inches (about 178mm).
- the link loss of the receiving component 353 from the main chip 31 to the transimpedance amplifier 3533 is about 6 to 10 dB.
- CTLE continuous-time linear equalization
- the link loss of receiving component 353 is in the range of 3.6 to 11.2dB (from the most The losses of the four curves from top to bottom on the right end are 3.6/7.4/9.6/11.2dB)
- the bit error level is only worsened by an order of magnitude
- the bit error rate (BER for short) is within BER standard 2.00E-4
- the difference in sensitivity is less than 0.5dB, indicating that the high-speed performance of the optical interconnection system 100 of the unidirectional CDR can meet the application requirements of the scene.
- An order of magnitude worsening of the error floor means that the rightmost ordinate values (BER values) of the four curves in Figure 4 are all in the range of 1.00E-7 to 1.00E-8, that is, the error floor
- the signal recovery chip 333 in the onboard optical module 33 of the transmitting end can be omitted.
- the number of signal transceiving units 303 is not limited.
- the number of signal transceiving units 303 is one, as shown in FIG. 5 .
- the structure of the optical interconnection system 30 provided by the second embodiment of the present application is similar to that of the optical interconnection system provided by the first embodiment.
- the signal recovery chip is omitted from the onboard optical module 33 at the sending end, and the onboard optical module 35 at the receiving end further includes a signal recovery chip 357 .
- each sending end onboard optical module 33 includes an electrical interface 331 , a sending end component 335 and an optical interface 337 .
- the electrical interface 331 is arranged on the side of the onboard optical module 33 at the sending end close to the main chip 31
- the optical interface 337 is arranged on the side of the onboard optical module 33 at the sending end away from the main chip 31 .
- the present application does not limit the electrical interface 331 to be disposed on the side of the onboard optical module 33 at the transmitting end facing the main chip 31 , as long as the electrical interface 331 and the main chip 31 can be electrically connected.
- the present application does not limit the optical interface 337 to be disposed on the side of the onboard optical module 33 at the transmitting end away from the main chip 31 , as long as the optical interface 337 can output the output optical signal.
- the receiving end onboard optical module 35 includes an optical interface 351 , a receiving end component 353 , an electrical interface 355 and a signal recovery chip 357 .
- the receiving end component 353 is used for modulating the input optical signal input from the optical interface 351 into an input electrical signal.
- the signal recovery chip 357 is used to forward the input electrical signal to the electrical interface 355 .
- the signal recovery chip 357 is a CDR chip.
- the signal recovery chip 357 can relay and recover the input electrical signal from the receiving end assembly 353, therefore, the signal recovery chip 357 and the main chip 31
- the high-speed link can be longer, and the onboard optical module 35 at the receiving end can be arranged on the side of the onboard optical module 33 at the sending end away from the main chip 31 .
- a plurality of onboard optical modules 33 at the sending end without a signal recovery chip are arranged close to and along the periphery of the main chip 31 to ensure that the loss of the high-speed link from the main chip 31 to the onboard optical module 33 at the sending end is small.
- the difference between the optical interconnection system 30 provided by the third embodiment of the present application and the optical interconnection system provided by the first embodiment is that the signal transceiver unit 303 includes a main chip 31 and a plurality of onboard optical modules 33, A plurality of onboard optical modules 33 are disposed close to and along the periphery of the main chip 31 .
- the onboard optical module 33 includes an electrical interface 331 , a receiving component 333 , a signal recovery chip 334 , a transmitting component 335 and an optical interface 337 arranged in sequence.
- the electrical interface 331 is disposed on the side of the onboard optical module 33 facing the main chip 31
- the receiving end component 333 is located between the signal recovery chip 334 and the electrical interface 331 .
- the optical interface 337 is disposed on a side of the onboard optical module 33 away from the main chip 31 .
- the sending end component 333 is located between the signal recovery chip 334 and the optical interface 337 .
- the receiving end component 333 occupies a space in the direction of the electrical interface 331 of the onboard optical module 33 .
- the sending end component 335 and the signal recovery chip 334 are placed in a space away from the electrical interface 331 of the onboard optical module 33 .
- the output electrical signal from the electrical interface 331 to the signal recovery chip 334 needs to pass through the space occupied by the receiving component 333; the optical fiber of the receiving component 333 passes through the signal recovery chip 334 and the sending component 335 to reach the optical interface 337 (not shown in FIG. output fiber).
- the electrical interface 331, the receiving end component 333, the signal recovery chip 334, the transmitting end component 335 and the optical interface 337 are all integrated into an on-board optical module 33, which is conducive to simplifying the structure of the optical interconnection system 30 and simplifying the wiring structure on the substrate 301 .
- the present application does not limit the position of the electrical interface 331 on the onboard optical module 33 , as long as the electrical interface 331 can transmit electrical signals.
- the present application does not limit the position of the optical interface 337 in the onboard optical module 33 , as long as the optical interface 337 can transmit optical signals.
- the difference between the optical interconnection system 30 provided by the fourth embodiment of the present application and the optical interconnection system provided by the third embodiment is that the onboard optical module 33 includes an electrical interface 331 and a signal recovery chip 334 arranged in sequence. , the sending end component 335 , the receiving end component 333 and the optical interface 337 .
- the electrical interface 331 is disposed on a side of the onboard optical module 33 close to the main chip 31 .
- the sending end component 335 occupies a space in the direction of the electrical interface 331 of the onboard optical module 33 , and the receiving end component 333 is placed in a space away from the electrical interface 331 of the onboard optical module 33 .
- the input optical signal from the receiving end assembly 333 to the signal recovery chip 332 needs to pass through the space occupied by the sending end assembly 335; ).
- the electrical interface 331, the receiving end component 333, the signal recovery chip 334, the transmitting end component 335 and the optical interface 337 are all integrated in an on-board optical module 33, which is conducive to simplifying the structure of the optical interconnection system 30 and facilitating the installation of the optical interconnection system 30. Assemble.
- the difference between the optical interconnection system 30 provided by the fifth embodiment of the present application and the optical interconnection system provided by the first embodiment is that in each signal transceiver unit 303 , the number of onboard optical modules 33 at the sending end is different.
- the number of onboard optical modules 35 at the receiving end is M1
- the sending end assembly 335 includes N1 channels
- the number of onboard optical modules 35 at the receiving end is M2
- the receiving end assembly 353 includes N2 channels
- M1 ⁇ N1 M2 ⁇ N2
- M1, M2, N1, and N2 are all integers.
- M1 is different from M2. In this embodiment, M1 is 8, M2 is 16, N1 is 4, and N2 is 2. It can be understood that the present application does not limit the values of N1, M1, N2 and M2.
- the on-board optical module 33 at the transmitting end including the signal recovery chip has a relatively large area, it can be flexibly placed after being further divided according to the number of channels, and the space near the periphery of the main chip 31 can be effectively utilized, thereby reducing high-speed link loss.
- the difference between the optical interconnection system 30 provided by the sixth embodiment of the present application and the optical interconnection system provided by the first embodiment is that the onboard optical module 35 at the receiving end also includes a signal recovery chip.
- both the transmitting onboard optical module 33 and the receiving onboard optical module 35 include a signal recovery chip.
- the signal recovery chip is a CDR chip
- the onboard optical module 33 at the transmitting end and the onboard optical module 35 at the receiving end both include a signal recovery chip, which can be called a bidirectional signal recovery chip (bidirectional CDR).
- each transmitting-end onboard optical module 33 includes an electrical interface 331 , a signal recovery chip 333 , a transmitting-end component 335 and an optical interface 337 .
- the receiving end onboard optical module 35 includes an optical interface 351 , a receiving end component 353 , an electrical interface 355 and a signal recovery chip 357 .
- the onboard optical module 35 at the receiving end is arranged closer to the periphery of the main chip 31 .
- the serial-to-parallel converter of the on-board optical module 33 at the transmitting end adopts a VSR serial-to-parallel converter
- the serial-to-parallel converter of the on-board optical module 35 at the receiving end adopts an XSR serial-to-parallel converter.
- the serial-to-parallel converter of the onboard optical module 35 at the receiving end may use other serial-to-parallel converters that are smaller than the driving capability of the VSR serial-to-parallel converter.
- the signal recovery chip 357 is also added to the receiving end onboard optical module 35 arranged near the periphery of the main chip, the driving capability of the signal recovery chip 357 is weaker than that of the signal recovery chip 333 in the sending end onboard optical module 33.
- the way is to improve the high-speed driving capability of the signal recovery chip 357 link, so as to use low-cost but poor loss or performance boards, connectors or optical transceiver components. Since the signal recovery chip 333 connected to the sending end assembly 335 and the different asymmetry of the drive capability of the signal recovery chip 357 connected to the receiving end assembly 353 are still maintained, the placement distance of the sending end assembly 335 and the receiving end assembly 353 from the main chip is allowed. Different, while ensuring the low power consumption of the architecture, it also improves the flexibility of layout.
- the sending end onboard optical module 33 is closer to the periphery of the main chip 31, and the serial-to-parallel converter of the sending end onboard optical module 33 adopts XSR serial parallel As for the converter, the serial-to-parallel converter of the onboard optical module 35 at the receiving end adopts a VSR serial-to-parallel converter.
- the onboard optical module 33 at the sending end and the onboard optical module 35 at the receiving end both include a signal recovery chip, and one of the onboard optical module 33 at the sending end and the onboard optical module 35 at the receiving end is arranged near the periphery of the main chip 31 ,
- the serial-to-parallel converter of the signal recovery chip near the periphery of the main chip 31 in the on-board optical module 33 at the sending end and the on-board optical module 35 at the receiving end is an ultra-short-distance serial-to-parallel converter.
- the driving capability of the serial-to-parallel converter of the other signal recovery chip in the light-carrying module 33 is smaller than that of the ultra-short-distance serial-to-parallel converter.
- the expression “and/or” includes any and all combinations of the associated listed words.
- the expression “A and/or B” may include A, may include B, or may include both A and B.
- expressions including ordinal numbers such as "first” and “second” may modify each element.
- elements are not limited by the above expressions.
- the above expressions do not limit the order and/or importance of elements.
- the above expressions are only used to distinguish one element from other elements.
- the first user equipment and the second user equipment indicate different user equipments, although both the first user equipment and the second user equipment are user equipments.
- a first element could be termed a second element
- a second element could be termed a first element, without departing from the scope of the present application.
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Optical Couplings Of Light Guides (AREA)
Abstract
本申请提供一种光互连系统及通信设备。光互连系统包括基板及设于所述基板上的信号收发单元,所述信号收发单元包括主芯片、多个发端板载光模块及多个收端板载光模块;每个所述发端板载光模块用于接收所述主芯片输出的输出电信号,将所述输出电信号转换成输出光信号,及将所述输出光信号输出;每个所述收端板载光模块用于接收输入光信号,并将所述输入光信号转换成输入电信号,及将所述输入电信号输送至所述主芯片;其中,所述多个发端板载光模块或所述多个收端板载光模块靠近所述主芯片,并沿所述主芯片的至少部分周缘排布设置。如此,在降低光互连系统的功耗的同时提高了布局的灵活性。
Description
本申请要求在2021年6月30日提交中国国家知识产权局、申请号为202110742173.0、申请名称为“光互连系统及通信设备”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
本申请涉及光通信技术领域,特别涉及一种光互连系统及通信设备。
当前光接口通信产品的主流光互连架构为可插拔光模块。在板光互连是将光互连部件从可插拔光模块所在的面板侧移动到主芯片周边,此时光互连部件仍然以模块的形态存在,称为板载光模块(on-board optics,简称OBO)或在板光模块。
通过缩短板载光模块与主芯片之间的距离可缩短板载光模块与主芯片之间的链路,以降低板载光互连架构的功耗。然而,在高密度的光互连架构的应用场景中,主芯片周边能够放置板载光模块的区域较小,例如,板载光模块的尺寸小于或等于15×15mm
2时才能设置于某些通信设备的主芯片的周边区域,而目前板载光模块的尺寸难以做到如此小,从而难以得到低功耗的光互连架构。
发明内容
本申请实施例提供了一种能够提高布局灵活性的光互连系统及通信设备。
第一方面,本申请提供了一种光互连系统,包括基板及设于所述基板上的信号收发单元,所述信号收发单元包括主芯片、多个发端板载光模块及多个收端板载光模块;每个所述发端板载光模块用于接收所述主芯片输出的输出电信号,将所述输出电信号转换成输出光信号,及将所述输出光信号输出;每个所述收端板载光模块用于接收输入光信号,并将所述输入光信号转换成输入电信号,及将所述输入电信号输送至所述主芯片;其中,所述多个发端板载光模块或所述多个收端板载光模块靠近所述主芯片,并沿所述主芯片的至少部分周缘排布设置。
发端板载光模块与收端板载光模块中的一个靠近并沿所述主芯片的周缘排布设置,缩短了发端板载光模块与收端板载光模块靠近主芯片的一个与主芯片之间的链路,降低了光互连系统的功耗。由于发端板载光模块与收端板载光模块一个与主芯片的间距较小,发端板载光模块与收端板载光模块中另一个与主芯片的间距较大,使得发端板载光模块到主芯片的链路与收端板载光模块到主芯片的链路长短不一致(即收发链路不对称),相当于可仅将原完整板载光模块的部分组件贴近主芯片的周缘放置,而原完整板载光模块的其余部分可拉远放置,使得在降低光互连系统的功耗的同时提高了光互连系统的布局灵活性。
根据第一方面,本申请第一方面的第一种可能的实现方式中,所述发端板载光模块包括发端组件、电接口及光接口,所述发端组件通过所述发端板载光模块的所述电接口接收所述主芯片输出的输出电信号,所述发端组件通过所述发端板载光模块的所述光接口输出所述输出光信号;所述收端板载光模块包括所述收端组件、所述电接口及所述光接口,所述收端组件通过所述收端板载光模块的所述光接口接收所述输入光信号,所述收端组件通过所述收端板载光模块的所述电接口将所述输入电信号输送至所述主芯片。
发端组件与收端组件分别设置在不同的板载光模块中,减小了发端板载光模块的尺寸限制,减小了收端板载光模块的尺寸限制,从而降低了发端板载光模块与收端板载光模块的制造工艺难度,亦使发端板载光模块与收端板载光模块可根据主芯片的周边区域面积进行灵活设置。
根据第一方面或本申请第一方面的第一种可能的实现方式,本申请第一方面的第二种可能的实现方式中,所述发端板载光模块还包括信号恢复芯片,所述信号恢复芯片电连接于所述发端板载光模块的所述电接口与所述发端组件之间,所述信号恢复芯片用于为所述发端板载光模块的所述电接口输入的所述输出电信号提供中继及信号恢复;多个所述收端板载光模块靠近并沿所述主芯片的周缘排布设置。
所述收端板载光模块可以位于所述发端板载光模块与所述主芯片之间。发端板载光模块设置于距离主芯片较远的区域,发端在板模块与主芯片之间的链路虽较长,但发端板载光模块中的信号恢复芯片能够对电信号进行信号恢复,有效提高了发端板载光模块的链路驱动能力。由于将未设置信号恢复芯片的收端板载光模块(即发端板载光模块与收端板载光模块两者中驱动能力弱的收端板载光模块)靠近并沿主芯片的周缘设置,缩短了未设置信号恢复芯片的收端板载光模块与主芯片之间的链路,降低了主芯片到收端板载光模块的高速链路的损耗。
根据第一方面或本申请第一方面的第一种至第二种可能的实现方式,本申请第一方面的第三种可能的实现方式中,所述收端板载光模块还包括信号恢复芯片,所述信号恢复芯片电连接于所述收端组件与所述收端板载光模块的所述电接口之间,所述信号恢复芯片用于对所述收端组件输出的所述输入电信号提供中继及信号恢复;多个所述发端板载光模块靠近并沿所述主芯片的周缘排布设置。
所述发端板载光模块可以位于所述收端板载光模块与所述主芯片之间。收端板载光模块设置于距离主芯片较远的区域,收端在板模块与主芯片之间的链路虽较长,但收端板载光模块中的信号恢复芯片能够对电信号进行信号恢复,有效提高了发端板载光模块的链路驱动能力。由于将未设置信号恢复芯片的发端板载光模块(即发端板载光模块与收端板载光模块两者中驱动能力弱的发端板载光模块)靠近并沿主芯片的周缘设置,缩短了未设置信号恢复芯片的发端板载光模块与主芯片之间的链路,降低了主芯片到发端板载光模块的高速链路的损耗。
根据第一方面或本申请第一方面的第一种至第三种可能的实现方式,本申请第一方面的第四种可能的实现方式中,所述发端板载光模块还包括信号恢复芯片;所述发端板载光模块的信号恢复芯片电连接于所述发端板载光模块的所述电接口与所述发端组件之间,用于对所述发端板载光模块的所述电接口输入的所述输出电信号提供中继及信号恢复并传输给所述发端组件;所述收端板载光模块的信号恢复芯片用于对所述收端组件的所述输入电信号提供中继及信号恢复;所述信号恢复芯片包括串并转换器,所述发端板载光模块与所述收端板载光模块中靠近所述主芯片周缘的一个的所述信号恢复芯片的串并转换器为超短距串并转换器,所述发端板载光模块与所述收端板载光模块中的另一个的所述信号恢复芯片的串并转换器的驱动能力小于超短距串并转换器的驱动能力。
发端板载光模块与收端板载光模块均增加了信号恢复芯片,但靠近主芯片周缘设置的板载光模块中的信号恢复芯片的驱动能力比另一个的信号恢复芯片的驱动能力弱,通过该方式提升远离主芯片周缘设置的板载光模块中的信号恢复芯片的驱动能力,以便采用低成本但损耗或性能较差的电路板、电接口(电连接器)、发端组件、收端组件。由于光互连系统中,与 发端组件连接的信号恢复芯片的驱动能力、与收端组件连接的信号恢复芯片的驱动能力不同,从而允许发端组件、收端组件距离主芯片的放置距离不同,在确保光互连系统架构低功耗的同时,亦提高了光互连系统排布的灵活性。
根据第一方面或本申请第一方面的第一种至第四种可能的实现方式,本申请第一方面的第五种可能的实现方式中,所述发端组件的数量为M1,每个所述发端组件包括N1个通道,所述收端组件的数量为M2,每个所述收端组件包括N2个通道,M1×N1=M2×N2,所述M1、所述N1、所述M2、所述N2均为整数,所述N1不同于所述N2,按通道数量分拆后可灵活放置并有效利用靠近主芯片周缘的空间,从而减小高速链路损耗。
第二方面,本申请提供一种光互连系统,包括基板及设于所述基板上的信号收发单元,所述信号收发单元包括主芯片及分离设置的多个板载光模块,每个所述板载光模块包括发端组件、收端组件,每个所述发端组件用于接收所述主芯片输出的输出电信号,将所述输出电信号转换成输出光信号,及将所述输出光信号输出;每个所述收端组件用于接收输入光信号,并将所述输入光信号转换成输入电信号,及将所述输入电信号输送至所述主芯片;其中,所述多个发端组件或所述多个收端组件靠近所述主芯片,并沿所述主芯片的至少部分周缘排布设置。
发端组件与收端组件中的一个靠近并沿所述主芯片的周缘排布设置,缩短了发端组件与收端组件中靠近主芯片的一个与主芯片之间的链路,降低了光互连系统的功耗。由于发端组件与收端组件一个与主芯片的间距较小,发端组件与收端组件中另一个与主芯片的间距较大,使得发端组件到主芯片的链路与收端组件到主芯片的链路长短不一致(即收发链路不对称),在降低光互连系统的功耗的同时提高了光互连系统的布局灵活性。发端组件与收端组件集成在同个板载光模块中,方便光互连系统的组装。
根据第二方面,本申请第二方面的第一种可能的实现方式中,每个所述板载光模块还包括电接口、光接口及信号恢复芯片,所述发端组件通过所述电接口接收所述主芯片输出的所述输出电信号及通过所述光接口输出所述输出光信号;所述收端组件通过所述光接口接收所述输入光信号,及通过所述电接口将所述输入电信号输送至所述主芯片;所述发端组件设于所述收端组件与所述电接口之间;所述信号恢复芯片电连接所述电接口与所述收端组件之间,所述信号恢复芯片用于对从所述收端组件输出的所述输入电信号提供中继及信号恢复板载光模块。
发端组件占据板载光模块的电接口所在的空间,发端组件与主芯片之间的间距较短而链路较短,有利于降低光互连系统的功耗。收端组件位于远离板载光模块的电接口所在的空间,收端组件与主芯片之间的间距较长而链路较长,由于增加了电连接电接口与收端组件之间的信号恢复芯片,确保信号传输质量及传输速度。
根据第二方面或本申请第二方面的第一种可能的实现方式,本申请第二方面的第二种可能的实现方式中,每个所述板载光模块还包括电接口、光接口及信号恢复芯片,所述发端组件通过所述电接口接收所述主芯片输出的所述输出电信号及通过所述光接口输出所述输出光信号,所述收端组件通过所述光接口接收所述输入光信号,及通过所述电接口将所述输入电信号输送至所述主芯片;所述收端组件设于所述发端组件与所述电接口之间;
所述信号恢复芯片电连接所述电接口与所述发端组件之间,所述信号恢复芯片用于对从所述电接口输入的所述输出电信号提供中继及信号恢复板载光模块。
收端组件占据板载光模块的电接口所在的空间,收端组件与主芯片之间的间距较短而链路较短,有利于降低光互连系统的功耗。发端组件位于远离板载光模块的电接口所在的空间, 发端组件与主芯片之间的间距较长而链路较长,由于增加了电连接电接口与发端组件之间的信号恢复芯片,确保信号传输质量及传输速度。
根据第二方面或本申请第二方面的第一种至第二种可能的实现方式,本申请第二方面的第三种可能的实现方式中,所述光互连系统还包括设于所述基板上的光交叉部件,所述光接口通过光纤与所述光交叉部件连接,减少基板上的布线交叉,缩短布线长度,有利于提高光互连系统的线路结构的简洁性,以保证主芯片到相邻的收端板载光模块无需在基板布线上交叉。
根据第二方面或本申请第二方面的第一种至第三种可能的实现方式,本申请第二方面的第三种可能的实现方式中,所述发端组件包括N1个通道,所述发端组件的数量为M1,所述收端组件包括N2个通道,所述收端组件数量为M2,M1×N1=M2×N2,所述N1、所述M1、所述N2、所述M2均为整数,所述N1不同于所述N2,按通道数量分拆后可灵活放置并有效利用靠近主芯片周缘的空间,从而减小高速链路损耗。
根据上述可能的实现方式,一种可能的实现方式中,发端组件包括驱动器及调制器,驱动器用于驱动外置光源发光,调制器用于根据输出电信号将外置光源发出的光调制成输出光信号。
根据上述可能的实现方式,一种可能的实现方式中,收端组件包括光电探测器、跨阻放大器,光电探测器与光接口对接,光电探测器用于探测输入光信号并根据输入光信号生成输入电信号,跨阻放大器连接于光电探测器与电接口之间,跨阻放大器用于接收光电探测器生成的输入电信号并将其进行放大后输出给电接口。
第三方面,本申请提供一种通信设备,包括根据上述可能实现方式所述的光互连系统。
图1为本申请第一实施方式提供的通信设备的结构框图;
图2为本申请第一实施方式提供的光互连系统的发端板载光模块的结构框图;
图3为本申请第一实施方式提供的光互连系统的收端板载光模块的结构框图;
图4为本申请第一实施方式提供的光互连系统的链路性能分析示意图;
图5为本申请第一实施方式提供的光互连系统包括一个信号收发单元时的结构框图;
图6为本申请第二实施方式提供的光互连系统的结构框图;
图7为本申请第二实施方式提供的光互连系统的发端板载光模块的结构框图;
图8为本申请第二实施方式提供的光互连系统的收端板载光模块的结构框图;
图9为本申请第三实施方式提供的光互连系统的结构框图;
图10为本申请第三实施方式提供的光互连系统的板载光模块的结构框图;
图11为本申请第四实施方式提供的光互连系统的板载光模块的结构框图;
图12为本申请第五实施方式提供的光互连系统的结构框图;
图13为本申请第六实施方式提供的光互连系统的发端板载光模块的结构框图;
图14为本申请第六实施方式提供的光互连系统的收端板载光模块的结构框图。
当前光接口通信产品的主流光互连架构为可插拔光模块。随着通信速率的不断提升,主芯片到可插拔光模块之间的高速链路损耗也逐渐增加。为保障链路高速性能,主要有两种实施的方案:其一,增强主芯片与可插拔光模块两者中的至少一个的串并转换器(serializer/deserializer,serDes)的驱动能力。根据驱动能力,串并转换器包括长距离 (long range,LR)串并转换器、超短距(Very short range,VSR)串并转换器及极端距(extreme short range,简称XSR)串并转换器。其二,增加信号恢复(例如时钟和数据恢复clock and data recovery,CDR)芯片。然而,此两种实施方案均会导致功耗急剧提升。为了解决这一功耗问题,在板光互连架构是业界探索的主要演进路线之一。
板载光互连是将光互连部件从可插拔光模块所在的面板侧移动到主芯片周边,此时光互连部件仍然以模块的形态存在,称为板载光模块(on-board optics,OBO)或在板光模块。板载光互连通过缩短板载光模块与主芯片的距离来降低链路收发组件的串并转换器的驱动能力,从而降低功耗。
上述在板光互连相关的方案均要求板载光模块靠近主芯片的周缘放置,然而,在高密度的光互连架构的应用场景中,主芯片周边能够放置板载光模块的区域较小,例如,板载光模块的尺寸小于或等于15×15mm
2时才能设置于某些通信设备(例如路由集群网板)的光互连系统的主芯片周边区域,而目前业界的板载光模块的尺寸标准为36x30、36x40、36x60mm
2。由于现有的板载光模块的尺寸难以做到如此小,从而难以得到低功耗的光互连架构。
基于此,本申请提供一种光互连系统及其相关的通信设备。一种光互连系统包括基板及设于所述基板上的信号收发单元,所述信号收发单元包括主芯片、多个发端板载光模块及多个收端板载光模块;每个所述发端板载光模块用于接收所述主芯片输出的输出电信号,将所述输出电信号转换成输出光信号,及将所述输出光信号输出;每个所述收端板载光模块用于接收输入光信号,并将所述输入光信号转换成输入电信号,及将所述输入电信号输送至所述主芯片;其中,所述多个发端板载光模块或所述多个收端板载光模块靠近所述主芯片,并沿所述主芯片的至少部分周缘排布设置。
一种光互连系统,包括基板及设于所述基板上的信号收发单元,所述信号收发单元包括主芯片及分离设置的多个板载光模块,每个所述板载光模块包括发端组件、收端组件,每个所述发端组件用于接收所述主芯片输出的输出电信号,将所述输出电信号转换成输出光信号,及将所述输出光信号输出;每个所述收端组件用于接收输入光信号,并将所述输入光信号转换成输入电信号,及将所述输入电信号输送至所述主芯片;其中,所述多个发端组件或所述多个收端组件靠近所述主芯片,并沿所述主芯片的至少部分周缘排布设置。
以下结合具体实施方式及附图对光互连系统及其相关的通信设备进行进一步说明。
第一实施方式
请参阅图1,本申请第一实施方式提供一种通信设备100,包括光互连系统30及系统电路板50。通信设备100通过光互连系统30与外部其他设备进行信息交互。本实施方式中,以通信设备100为集群路由器为例进行说明。可以理解,通信设备100还可以为其他类型的通信设备,例如交换机、传送网设备、接入网的光线路终端(Optical Line Terminal,简称OLT)。
光互连系统30包括基板301及设于基板301上的多个信号收发单元303。基板301包括电路板(printed circuit board,简称PCB)。本实施方式中,信号收发单元303的数量为3个。
信号收发单元303包括主芯片(payload IC)31、多个发端板载光模块33(图1中以OBO Tx标示)及多个收端板载光模块35(图1中以OBO Rx标示)。发端板载光模块33用于接收主芯片31输出的输出电信号并将输出电信号转换成输出光信号输出到对端,收端板载光模块35用于从对端接收输入光信号并转换成输入电信号输送至主芯片31。本实施方式中,多个收端板载光模块35靠近并沿主芯片31的周缘排布设置。发端板载光模块33位于收端板载光模 块35远离主芯片31的一侧。
发端板载光模块33与收端板载光模块35为相互分离且独立的板载光模块,而多个收端板载光模块35靠近并沿主芯片31的周缘排布设置,即靠近主芯片31的周缘的区域仅分配给收端板载光模块35,以减少对发端板载光模块33的尺寸与收端板载光模块35的尺寸限制,方便发端板载光模块33与收端板载光模块35在基板301上排布。
具体地,请参阅图2,每个发端板载光模块33包括电接口331、信号恢复芯片333、发端组件(transmitter,Tx)335及光接口337。本实施方式中,电接口331位于发端板载光模块33朝向主芯片31的一侧。电接口331与主芯片31电连接,用于接收主芯片31输出的输出电信号。信号恢复芯片333电连接于电接口331与发端组件335之间。信号恢复芯片333用于对从电接口331输入的输出电信号提供中继及信号恢复,并将信号恢复后的输出电信号传输给发端组件335。信号恢复芯片333为时钟和数据恢复(clock and data recovery,简称CDR)芯片。可以理解,在其他实施方式中,信号恢复芯片333可以为放大器,放大器用于放大电信号。发端组件335用于将输出电信号调制成输出光信号。光接口337用于输出由发端组件335调制成的输出光信号。可以理解,本申请对电接口331位于发端板载光模块33的位置不作限定,例如,电接口331设置于发端板载光模块33的中部。
本实施方式中,电接口331为设于发端板载光模块33上的电连接器,光接口337为设于发端板载光模块33上的光连接器。
发端组件335包括驱动器(driver)3351及调制器(modulator)3353。本实施方式中,驱动器3351用于驱动外置光源发光,调制器3353用于根据输出电信号将外置光源发出的光调制成输出光信号。由于发端组件335内未设置光源,从而简化发端组件335的结构,有利于发端组件335的微型化。可以理解,发端组件335中可以设置内置光源,如此,省略了驱动器3351与外置光源之间的电导线,及调制器3353与外置光源之间的光纤布线。
请参阅图3,收端板载光模块35包括光接口351、收端组件(receiver,简称Rx)353、电接口355。光接口351设于收端板载光模块35背离主芯片31的一侧,用于接收输入光信号。收端组件353用于将从光接口351输入的输入光信号调制成输入电信号。电接口355设于收端板载光模块35朝向主芯片31的一侧。电接口355与主芯片31电连接。电接口355用于将输入电信号输送至主芯片31。可以理解,本申请对电接口355位于收端板载光模块35的位置不作限定,例如,电接口355设置于收端板载光模块35的中部,本申请对光接口351位于收端板载光模块35的位置不作限定。
本实施方式中,收端组件353包括光电探测器(photo detector,PD)3531、跨阻放大器(trans-impedance amplifier,TIA)3533。光电探测器3531与光接口351对接。光电探测器3531用于探测输入光信号并根据输入光信号生成输入电信号。跨阻放大器3533连接于光电探测器3531与电接口355之间,用于接收光电探测器3531生成的输入电信号并将其进行放大后输出给电接口355。通常在光通信系统中,光电探测器与跨阻放大器是配合使用的,光电探测器用于将光接口收到的微弱的光信号转换成电信号,该生成的电信号为电流信号,再通过跨阻放大器将电流信号进行一定强度的放大形成稳定的电压信号。可以理解,本申请不限定电接口355设于收端板载光模块35朝向主芯片31的一侧,电接口355与主芯片31可实现电连接即可。本申请不限定光接口351设于收端板载光模块35背离主芯片31的一侧,光接口351能够接收到输入光信号即可。发端板载光模块33与收端板载光模块35中仅一个设置信号恢复芯片,则称为单向信号恢复芯片(例如单向CDR)。
芯片设有串并转换器(serializer/deserializer,简称serDes),串并转换器作为芯片 的输入输出串行接口。根据电路和算法复杂程度的不同,串并转换器可驱动的链路损耗也不同。串并转换器的驱动能力越强,功耗也就越高。根据驱动能力,串并转换器包括但不限定长距离(long range,简称LR)串并转换器、超短距(very short range,简称VSR)串并转换器及极端距(extreme short range,简称XSR)串并转换器。其中,LR串并转换器的驱动能力大于VSR串并转换器的驱动能力,VSR串并转换器的驱动能力大于XSR串并转换器的驱动能力。驱动能力表示链路正常通信时所能接受的最大损耗,例如18dB。可以理解,在其他实施方式中,可以根据所述需要的驱动能力,设置信号恢复芯片333的串并转换器。
本实施方式中,主芯片31的串并转换器可采用长距离串并转换器,信号恢复芯片333采用超短距串并转换器,收端板载光模块35未设信号恢复芯片,使得主芯片31到发端板载光模块33的驱动能力较强,主芯片31到收端板载光模块35的驱动能力较弱,换而言之,发端板载光模块33(发端)与收端板载光模块35(收端)的驱动能力不对称。由于将未设置信号恢复芯片的收端板载光模块35靠近并沿主芯片31的周缘设置,即发端板载光模块33与收端板载光模块35两者中驱动能力弱的收端板载光模块35靠近并沿主芯片31的周缘设置,缩短了未设置信号恢复芯片的收端板载光模块35与主芯片31之间的链路,降低了主芯片31到收端板载光模块35的链路的损耗。发端板载光模块33包括有信号恢复芯片333,信号恢复芯片333能够对输出电信号进行中继及信号恢复,因此发端板载光模块33与主芯片31之间的链路可以相对较长,多个发端板载光模块33可以设置于距离主芯片31的周缘较远的区域。
每个信号收发单元303中,发端板载光模块33的数量为M1,发端组件335包括N1个通道,收端板载光模块35的数量为M2,收端组件353包括N2个通道,M1×N1=M2×N2,M1、M2、N1、N2均为整数。本实施方式中,M1与M2均为8,N1与N2均为2。由于信号收发单元303中的发端板载光模块33的数量与收端板载光模块35的数量相同,方便了光互连系统100的组装。可以理解,本申请对N1、M1、N2与M2的数值不作限定。
请再次参阅图1,光互连系统30还包括光交叉部件305,信号收发单元303还包括输出光纤37(图1中仅示例性地示出输出光纤37)及输入光纤39(图1中仅示例性地示出输出光纤37)。输出光纤37连接于每个信号收发单元303的光接口337与光交叉部件305之间,输入光纤39连接于每个信号收发单元303的光接口351与光交叉部件305之间。光交叉部件305还连接于外置光源与调制器3353之间,为外置光源提供发端板载光模块33的连接及功率分配。光交叉部件305用于减少基板301上的布线交叉,缩短布线长度,有利于提高光互连系统30的线路结构的简洁性,以保证主芯片31到相邻的收端板载光模块35无需在基板301布线上交叉。在一些实施方式中,光交叉部件305在部分硬件系统下是不必要的,例如线卡(line card)和交换机。
在相关技术中,收发组件(包括Tx与Rx)集中设置在同一板载光模块内,通过现有工艺将收发组件的尺寸约束在36x30mm
2实现16通道规格较为困难。而本申请中,发端板载光模块33与收端板载光模块35分离设置,将收端板载光模块35靠近并沿主芯片31的周缘设置,收端板载光模块35可在36x30mm
2的面积内实现16通道规格,发端板载光模块33可在36x40mm
2的面积内实现16通道规格,实现面积约束放宽至233%,如此,降低了光互连系统100的制程难度。
高速性能的定量计算以发端板载光模块33中的信号恢复芯片333采用可插拔光模块常用的VSR串并转换器为例,在信号频率为28GHz下时,主芯片31到信号恢复芯片333的全链路驱动能力约为12dB,发端板载光模块33的电接口331及模块内部损耗约为3dB,光互连系统30的过孔(基板301的多层电路板之间的用于信号连接的过孔)及高速余量约为2dB,则光 互连系统30的布线损耗可达7dB,折合布线长度7英寸(约178mm)。收端组件353从主芯片31到跨阻放大器3533的链路损耗约6至10dB。如图4所示,在收端组件353连续时间线性均衡(continuous-time linear equalization,简称CTLE)自适应时,收端组件353的链路损耗在3.6至11.2dB范围内(图4中从最右端从上至下的四条曲线的损耗分别为3.6/7.4/9.6/11.2dB),误码平层仅恶化一个数量级,误码率(bit error rate,简称BER)在BER标准2.00E-4的灵敏度差异小于0.5dB,表明单向CDR的光互连系统100的高速性能可以满足场景应用需求。误码平层恶化一个数量级是指,图4中的四条曲线的最右端的纵坐标值(BER数值)均在1.00E-7至1.00E-8范围内,即误码平层恶化一个数量级。
可以理解,发端板载光模块33中的信号恢复芯片333可以省略。
可以理解,信号收发单元303的数量不作限定,例如,通信设备100为交换机时,信号收发单元303的数量为一个,如图5所示。
第二实施方式
请参阅图6、图7、图8,本申请第二实施方式提供的光互连系统30与第一实施方式提供的光互连系统的结构相似,不同在于,多个发端板载光模块33靠近沿主芯片31的周缘排布设置,发端板载光模块33中省略了信号恢复芯片,收端板载光模块35还包括信号恢复芯片357。
具体地,每个发端板载光模块33包括电接口331、发端组件335及光接口337。电接口331设于发端板载光模块33靠近主芯片31的一侧,光接口337设于发端板载光模块33远离主芯片31的一侧。可以理解,本申请不限定电接口331设于发端板载光模块33朝向主芯片31的一侧,电接口331与主芯片31可实现电连接即可。本申请不限定光接口337设于发端板载光模块33背离主芯片31的一侧,光接口337能够对输出光信号进行输出即可。
收端板载光模块35包括光接口351、收端组件353、电接口355及信号恢复芯片357。收端组件353用于将从光接口351输入的输入光信号调制成输入电信号。信号恢复芯片357用于将输入电信号转发至电接口355。信号恢复芯片357为CDR芯片。由于收端板载光模块35中设置有信号恢复芯片357,信号恢复芯片357可以将来自收端组件353的输入电信号进行中继及信号恢复,因此,信号恢复芯片357与主芯片31之间的高速链路可以较长,收端板载光模块35可以设置于发端板载光模块33远离主芯片31的一侧。
第二实施方式中,未设置信号恢复芯片的多个发端板载光模块33靠近并沿主芯片31周缘设置,以保证主芯片31到发端板载光模块33的高速链路损耗较小。
第三实施方式
请参阅图9,本申请第三实施方式提供的光互连系统30与第一实施方式提供的光互连系统的不同在于,信号收发单元303包括主芯片31及多个板载光模块33,多个板载光模块33靠近并沿主芯片31的周缘设置。
请参阅图10,板载光模块33包括依次设置的电接口331、收端组件333、信号恢复芯片334、发端组件335及光接口337。电接口331设于板载光模块33朝向主芯片31的一侧,收端组件333位于信号恢复芯片334与电接口331之间。光接口337设于板载光模块33背离主芯片31的一侧。发端组件333位于信号恢复芯片334与光接口337之间。收端组件333占据了板载光模块33的电接口331方向的空间。发端组件335和信号恢复芯片334在板载光模块33的远离电接口331的空间放置。电接口331到信号恢复芯片334的输出电信号需穿过收端 组件333所占据的空间;收端组件333的光纤穿过信号恢复芯片334及发端组件335到达光接口337(图9中未画出光纤)。
电接口331、收端组件333、信号恢复芯片334、发端组件335及光接口337均集成在一个板载光模块33中,有利于简化光互连系统30的结构,简化基板301上的布线结构。
可以理解,本申请不限定电接口331于板载光模块33的位置,电接口331能够传输电信号即可。
可以理解,本申请不限定光接口337在板载光模块33的位置,光接口337能够传输光信号即可。
第四实施方式
请参阅图11,本申请第四实施方式提供的光互连系统30与第三实施方式提供的光互连系统的不同在于,板载光模块33包括依次设置的电接口331、信号恢复芯片334、发端组件335、收端组件333及光接口337。电接口331设置于板载光模块33靠近主芯片31的一侧。
发端组件335占据板载光模块33的电接口331方向的空间,收端组件333在板载光模块33远离电接口331的空间放置。相应地,收端组件333到信号恢复芯片332的输入光信号需穿过发端组件335所占据的空间;发端组件335的光纤穿过收端组件333到达光接口337(图11中未示意出光纤)。
电接口331、收端组件333、信号恢复芯片334、发端组件335及光接口337均集成在一个板载光模块33中,有利于简化光互连系统30的结构,方便光互连系统30的组装。
第五实施方式
请参阅图12,本申请第五实施方式提供的光互连系统30与第一实施方式提供的光互连系统的不同在于,每个信号收发单元303中,发端板载光模块33的数量不同于收端板载光模块35的数量。具体地,信号收发单元303中,发端板载光模块33的数量为M1,发端组件335包括N1个通道,收端板载光模块35的数量为M2,收端组件353包括N2个通道,M1×N1=M2×N2,M1、M2、N1、N2均为整数。M1不同于M2。本实施方式中,M1为8,M2为16,N1为4,N2为2。可以理解,本申请对N1、M1、N2与M2的数值不作限定。
由于包括信号恢复芯片的发端板载光模块33的面积较大,进一步按通道数量分拆后可灵活放置并有效利用靠近主芯片31周缘的空间,从而减小高速链路损耗。
在一实施方式中,发端组件335或收端组件353靠近并沿主芯片31的周缘设置,发端组件353的数量为M1,每个发端组件335包括N1个通道,收端组件数量为M2,每个收端组件353包括N2个通道,M1×N1=M2×N2,所述N1、所述M1、所述N2、所述M2均为整数,所述N1不同于所述N2,以按通道数量分拆后可灵活放置并有效利用靠近主芯片31周缘的空间,从而减小高速链路损耗。
第六实施方式
请参阅图13与图14,本申请第六实施方式提供的光互连系统30与第一实施方式提供的光互连系统的不同在于,收端板载光模块35亦包括信号恢复芯片,换句话说,发端板载光模块33与收端板载光模块35均包括信号恢复芯片。信号恢复芯片为CDR芯片,发端板载光模块33与收端板载光模块35中均包括信号恢复芯片,可称为双向信号恢复芯片(双向CDR)。
具体地,每个发端板载光模块33包括电接口331、信号恢复芯片333、发端组件335及 光接口337。
收端板载光模块35包括光接口351、收端组件353、电接口355及信号恢复芯片357。
相较于发端板载光模块33,收端板载光模块35更为靠近主芯片31的周缘设置。本实施方式中,发端板载光模块33的串并转换器采用VSR串并转换器,收端板载光模块35的串并转换器采用XSR串并转换器。可以理解,收端板载光模块35的串并转换器可以采用其他的小于VSR串并转换器驱动能力的串并转换器。
虽然靠近主芯片周缘设置的收端板载光模块35也增加了信号恢复芯片357,但信号恢复芯片357的驱动能力比发端板载光模块33中的信号恢复芯片333的驱动能力弱,通过该方式提升信号恢复芯片357链路的高速驱动能力,以便采用低成本但损耗或性能较差的板材、连接器或光收发组件。由于仍然保持与发端组件335连接的信号恢复芯片333、及与收端组件353连接的信号恢复芯片357驱动能力不同的不对称性,从而允许发端组件335、收端组件353距离主芯片的放置距离不同,在确保架构低功耗的同时,亦提高了排布的灵活性。
可以理解,在一实施方式中,相较于收端板载光模块35,发端板载光模块33更为靠近主芯片31的周缘,发端板载光模块33的串并转换器采用XSR串并转换器,收端板载光模块35的串并转换器采用VSR串并转换器。
综上,发端板载光模块33与收端板载光模块35均包括信号恢复芯片,发端板载光模块33与收端板载光模块35中的一个靠近主芯片31的周缘排布设置,发端板载光模块33与收端板载光模块35中靠近主芯片31周缘的一个的信号恢复芯片的串并转换器为超短距串并转换器,发端板载光模块35与收端板载光模块33中的另一个的信号恢复芯片的串并转换器的驱动能力小于超短距串并转换器的驱动能力。
应当理解的是,可以在本申请中使用的诸如“包括”以及“可以包括”之类的表述表示所公开的功能、操作或构成要素的存在性,并且并不限制一个或多个附加功能、操作和构成要素。在本申请中,诸如“包括”和/或“具有”之类的术语可解释为表示特定特性、数目、操作、构成要素、部件或它们的组合,但是不可解释为将一个或多个其它特性、数目、操作、构成要素、部件或它们的组合的存在性或添加可能性排除在外。
此外,在本申请中,表述“和/或”包括关联列出的词语中的任意和所有组合。例如,表述“A和/或B”可以包括A,可以包括B,或者可以包括A和B这二者。
在本申请中,包含诸如“第一”和“第二”等的序数在内的表述可以修饰各要素。然而,这种要素不被上述表述限制。例如,上述表述并不限制要素的顺序和/或重要性。上述表述仅用于将一个要素与其它要素进行区分。例如,第一用户设备和第二用户设备指示不同的用户设备,尽管第一用户设备和第二用户设备都是用户设备。类似地,在不脱离本申请的范围的情况下,第一要素可以被称为第二要素,类似地,第二要素也可以被称为第一要素。
当部件被称作“连接”或“接入”其他部件时,应当理解的是:该部件不仅直接连接到或接入到其他部件,而且在该部件和其它部件之间还可以存在另一部件。另一方面,当部件被称作“直接连接”或“直接接入”其他部件的情况下,应该理解它们之间不存在部件。
以上所述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以所述权利要求的保护范围为准。
Claims (11)
- 一种光互连系统,其特征在于,包括基板及设于所述基板上的信号收发单元,所述信号收发单元包括主芯片、多个发端板载光模块及多个收端板载光模块;每个所述发端板载光模块用于接收所述主芯片输出的输出电信号,将所述输出电信号转换成输出光信号,及将所述输出光信号输出;每个所述收端板载光模块用于接收输入光信号,并将所述输入光信号转换成输入电信号,及将所述输入电信号输送至所述主芯片;其中,所述多个发端板载光模块或所述多个收端板载光模块靠近所述主芯片,并沿所述主芯片的至少部分周缘排布设置。
- 根据权利要求1所述的光互连系统,其特征在于,所述发端板载光模块包括发端组件、电接口及光接口,所述发端组件通过所述发端板载光模块的所述电接口接收所述主芯片输出的输出电信号,所述发端组件通过所述发端板载光模块的所述光接口输出所述输出光信号;所述收端板载光模块包括所述收端组件、所述电接口及所述光接口,所述收端组件通过所述收端板载光模块的所述光接口接收所述输入光信号,所述收端组件通过所述收端板载光模块的所述电接口将所述输入电信号输送至所述主芯片。
- 根据权利要求2所述的光互连系统,其特征在于,所述发端板载光模块还包括信号恢复芯片,所述信号恢复芯片电连接于所述发端板载光模块的所述电接口与所述发端组件之间,所述信号恢复芯片用于对从所述发端板载光模块的所述电接口输入的所述输出电信号提供中继及信号恢复;多个所述收端板载光模块靠近并沿所述主芯片的周缘排布设置。
- 根据权利要求2所述的光互连系统,其特征在于,所述收端板载光模块还包括信号恢复芯片,所述信号恢复芯片电连接于所述收端组件与所述收端板载光模块的所述电接口之间的信号恢复芯片,所述信号恢复芯片用于对从所述收端组件的输出的所述输入电信号提供中继及信号恢复;多个所述发端板载光模块靠近并沿所述主芯片的周缘排布设置。
- 根据权利要求2所述的光互连系统,其特征在于,所述发端板载光模块还包括信号恢复芯片,所述发端板载光模块的所述信号恢复芯片电连接于所述发端板载光模块的所述电接口与所述发端组件之间,用于对从所述发端板载光模块的所述电接口输出的所述输出电信号提供中继及信号恢复;所述收端板载光模块还包括信号恢复芯片,所述收端板载光模块的所述信号恢复芯片电连接于所述收端板载光模块的所述电接口与所述收端组件之间,用于对从所述收端组件输出的所述输入电信号提供中继及信号恢复;所述信号恢复芯片包括串并转换器,所述发端板载光模块与所述收端板载光模块中靠近所述主芯片周缘的一个的所述信号恢复芯片的串并转换器为超短距串并转换器,所述发端板载光模块与所述收端板载光模块中的另一个的所述信号恢复芯片的串并转换器的驱动能力小于所述超短距串并转换器的驱动能力。
- 根据权利要求2-5任意一项所述的光互连系统,其特征在于,所述发端组件的数量为M1,每个所述发端组件包括N1个通道,所述收端组件的数量为M2,每个所述收端组件包括 N2个通道,M1×N1=M2×N2,所述M1、所述N1、所述M2、所述N2均为整数,所述N1不同于所述N2。
- 一种光互连系统,其特征在于,包括基板及设于所述基板上的信号收发单元,所述信号收发单元包括主芯片及分离设置的多个板载光模块,每个所述板载光模块包括发端组件、收端组件,每个所述发端组件用于接收所述主芯片输出的输出电信号,将所述输出电信号转换成输出光信号,及将所述输出光信号输出;每个所述收端组件用于接收输入光信号,并将所述输入光信号转换成输入电信号,及将所述输入电信号输送至所述主芯片;其中,所述多个发端组件或所述多个收端组件靠近所述主芯片,并沿所述主芯片的至少部分周缘排布设置。
- 根据权利要求7所述的光互连系统,其特征在于,每个所述板载光模块还包括电接口、光接口及信号恢复芯片;所述发端组件通过所述电接口接收所述主芯片输出的所述输出电信号及通过所述光接口输出所述输出光信号;所述收端组件通过所述光接口接收所述输入光信号,及通过所述电接口将所述输入电信号输送至所述主芯片;所述发端组件设于所述收端组件与所述电接口之间;所述信号恢复芯片板载光模块电连接所述电接口与所述收端组件之间,所述信号恢复芯片用于对从所述收端组件输出的所述输入电信号提供中继及信号恢复。
- 根据权利要求7所述的光互连系统,其特征在于,每个所述板载光模块还包括电接口、光接口及信号恢复芯片;所述发端组件通过所述电接口接收所述主芯片输出的所述输出电信号及通过所述光接口输出所述输出光信号;所述收端组件通过所述光接口接收所述输入光信号,及通过所述电接口将所述输入电信号输送至所述主芯片;所述收端组件设于所述发端组件与所述电接口之间;所述信号恢复芯片板载光模块电连接所述电接口与所述发端组件之间,所述信号恢复芯片用于对从所述电接口输入的所述输出电信号提供中继及信号恢复。
- 根据权利要求7-9任意一项所述的光互连系统,其特征在于,所述发端组件的数量为M1,每个所述发端组件包括N1个通道,所述收端组件数量为M2,每个所述收端组件包括N2个通道,M1×N1=M2×N2,所述M1、所述N1、所述M2、所述N2均为整数,所述N1不同于所述N2。
- 一种通信设备,其特征在于,包括根据权利要求1-10任意一项所述的光互连系统。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110742173.0 | 2021-06-30 | ||
CN202110742173.0A CN115549794A (zh) | 2021-06-30 | 2021-06-30 | 光互连系统及通信设备 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2023273759A1 true WO2023273759A1 (zh) | 2023-01-05 |
Family
ID=84692514
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2022/095941 WO2023273759A1 (zh) | 2021-06-30 | 2022-05-30 | 光互连系统及通信设备 |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN115549794A (zh) |
WO (1) | WO2023273759A1 (zh) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012013726A (ja) * | 2010-06-29 | 2012-01-19 | Hitachi Ltd | 光インターコネクションモジュールおよびそれを用いた光電気混載回路ボード |
CN110474688A (zh) * | 2019-08-16 | 2019-11-19 | 武汉光迅信息技术有限公司 | 一种光模块 |
US10826613B1 (en) * | 2019-12-06 | 2020-11-03 | Inphi Corporation | Integrated compact in-package light engine |
-
2021
- 2021-06-30 CN CN202110742173.0A patent/CN115549794A/zh active Pending
-
2022
- 2022-05-30 WO PCT/CN2022/095941 patent/WO2023273759A1/zh active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012013726A (ja) * | 2010-06-29 | 2012-01-19 | Hitachi Ltd | 光インターコネクションモジュールおよびそれを用いた光電気混載回路ボード |
CN110474688A (zh) * | 2019-08-16 | 2019-11-19 | 武汉光迅信息技术有限公司 | 一种光模块 |
US10826613B1 (en) * | 2019-12-06 | 2020-11-03 | Inphi Corporation | Integrated compact in-package light engine |
Non-Patent Citations (2)
Title |
---|
SUN WEI, WANG KE: "Study on Cost Reduction of GPON ONT Equipment", GUANGTONGXIN-YANJIU = STUDY ON OPTICAL COMMUNICATIONS, WUHAN, vol. 4, no. 178, 26 July 2013 (2013-07-26), XP093017781, ISSN: 1005-8788, DOI: 10.13756/j.gtxyj.2013.04.014 * |
SUN WEI: "Research of GPON ONT Using BOSA on Board Technology", THESIS, 15 August 2014 (2014-08-15), XP093017782, ISBN: 978-4-502-37651-1 * |
Also Published As
Publication number | Publication date |
---|---|
CN115549794A (zh) | 2022-12-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8121139B2 (en) | Communication module and communication apparatus | |
JP6294838B2 (ja) | 高密度に実装された光インターコネクトを有するチップアセンブリ構成 | |
US6947672B2 (en) | High-speed optical data links | |
Pepeljugoski et al. | Low power and high density optical interconnects for future supercomputers | |
US7380993B2 (en) | Optical transceiver for 100 gigabit/second transmission | |
US7734183B2 (en) | XFI-XAUI integrated circuit for use with 10GBASE-LX4 optical transceivers | |
CN110176960B (zh) | 一种新型单纤双向多通道输入光模块 | |
US8774639B2 (en) | Ultra high density pin-compatible four-channel enhanced small form-factor pluggable module | |
CN216700004U (zh) | 一种通信设备、通信系统及光模块 | |
WO2017016416A1 (zh) | 一种光互联背板、传输设备及信号调度方法 | |
US10120826B2 (en) | Single-chip control module for an integrated system-on-a-chip for silicon photonics | |
US9225423B1 (en) | Optical engines and optical cable assemblies capable of low-speed and high-speed optical communication | |
CN105634611A (zh) | 光模块及信号处理的方法 | |
KR101077250B1 (ko) | 광 입/출력 버스 시스템 | |
EP2996267B1 (en) | Optical engines and optical cable assemblies having electrical signal conditioning | |
US10566714B2 (en) | High-density small form-factor pluggable module, housing, and system | |
WO2017162146A1 (zh) | 一种实现板间通信的方法和装置 | |
WO2023273759A1 (zh) | 光互连系统及通信设备 | |
CN113037387A (zh) | 一种光通信装置 | |
CN216565179U (zh) | 一种PCIe接口的百兆可见光单向网卡 | |
Chujo et al. | A 25-Gb/s× 4-Ch, 8× 8 mm2, 2.8-mm thick compact optical transceiver module for on-board optical interconnect | |
US20240223349A1 (en) | Communication device, communication system, and optical module | |
CN112567650A (zh) | 光学引擎 | |
JP2004537894A (ja) | 高速光データ・リンク | |
CN114488433B (zh) | 一种单光纤高速全双工数据传输装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 22831581 Country of ref document: EP Kind code of ref document: A1 |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 22831581 Country of ref document: EP Kind code of ref document: A1 |