WO2017016416A1 - 一种光互联背板、传输设备及信号调度方法 - Google Patents

一种光互联背板、传输设备及信号调度方法 Download PDF

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Publication number
WO2017016416A1
WO2017016416A1 PCT/CN2016/090456 CN2016090456W WO2017016416A1 WO 2017016416 A1 WO2017016416 A1 WO 2017016416A1 CN 2016090456 W CN2016090456 W CN 2016090456W WO 2017016416 A1 WO2017016416 A1 WO 2017016416A1
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WIPO (PCT)
Prior art keywords
optical
module
light receiving
light emitting
backplane
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PCT/CN2016/090456
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English (en)
French (fr)
Inventor
梅君瑶
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中兴通讯股份有限公司
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Priority to EP16829782.8A priority Critical patent/EP3316014A4/en
Publication of WO2017016416A1 publication Critical patent/WO2017016416A1/zh

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    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/43Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4204Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4249Packages, e.g. shape, construction, internal or external details comprising arrays of active devices and fibres
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/80Optical aspects relating to the use of optical transmission for specific applications, not provided for in groups H04B10/03 - H04B10/70, e.g. optical power feeding or optical transmission through water
    • H04B10/801Optical aspects relating to the use of optical transmission for specific applications, not provided for in groups H04B10/03 - H04B10/70, e.g. optical power feeding or optical transmission through water using optical interconnects, e.g. light coupled isolators, circuit board interconnections
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/0001Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005Switch and router aspects
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/0001Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005Switch and router aspects
    • H04Q2011/0052Interconnection of switches
    • H04Q2011/0058Crossbar; Matrix

Definitions

  • the present application relates to, but is not limited to, the field of communications, and in particular, to an optical interconnect backplane, a transmission device, and a signal scheduling method.
  • an existing transmission device usually adopts the following structure: multiple service boards are configured to implement multiple service access and access functions; the backplane is configured to implement interconnection between service boards, but The backplanes are usually passive and only provide communication channels.
  • One or more crossover boards are configured to: implement signal scheduling between service boards; the service boards and cross boards are PCBs (Printed Circuit Boards).
  • the boards include a backplane socket; the backplane also includes a backplane socket for use with the backplane socket of the service board/crossboard to implement connection with the service board/cross board.
  • the structure is shown in Figure 1.
  • the service board has at least one pair of external transceiver ports, and the external receiving port receives the service signal, the service board processes the service, and then the lower back board, and then the back board transmits the signal to the cross board; at the same time, the service board receives the cross board from the back board.
  • the transmitted signal is processed and sent out from the external port.
  • the service board and the cross-board are directly inserted into the backplane through the backplane socket to implement interconnection with the backplane.
  • the cross board receives signals from the service board transmitted from the backplane, and then performs scheduling and forwarding. As shown in Figure 2, the service board 1, the service board 2, and the service board n all have external transceivers. The signals received by the service board through the external receiver are transmitted to the cross-board through the backplane, and the cross-board is transmitted through the backplane. Send it to other service boards and send them out through the external port.
  • the limitation of the cross-capacity of the service signal in the above transmission equipment mainly depends on the limited bandwidth bottleneck of the current electrical interconnection of the PCB board.
  • the loss is large, the transmission distance is short, the anti-interference is poor, and the crosstalk is severe.
  • the cross-board needs to electrically relay the high-speed signals received from the backplane. How to simplify the design under the premise of ensuring the signal transmission distance/quality and flexible service scheduling is a problem that needs to be solved.
  • This document provides an optical interconnect backplane, and a transmission device and a signal scheduling method using the optical interconnect backplane, which can replace the backplane and the crossbar, and can realize flexible scheduling of services without considering the transmission distance of signals. It also eliminates the need for electrical relays, which simplifies design, reduces costs, and increases the stability of equipment operation.
  • An optical interconnect backplane comprising: a printed circuit board;
  • An optical interconnect layer comprising one or more optical waveguides
  • a light emitting module configured to: modulate an electrical signal received from the printed circuit board into an optical signal
  • the light receiving module is configured to: convert the received optical signal into an electrical signal and send the signal to the printed circuit board;
  • a first waveguide coupling module configured to: couple an optical signal generated by the light emitting module into the optical interconnect layer;
  • a second waveguide coupling module configured to: couple an optical signal transmitted by the optical interconnect layer into the light receiving module
  • One or more switch chips set to: implement cross-matching of any input to any of the outputs Set
  • Each of the switch chips is connected to at least one of the light emitting module and the light receiving module.
  • the light emitting module comprises a laser array and a laser driving circuit chip
  • the light receiving module comprises a photodetector array and a detector driving circuit chip.
  • the laser in the laser array is a vertical cavity surface emitting laser
  • the photodetector in the photodetector array is a PIN photodetector
  • the laser in the laser array is soldered to the laser driving circuit chip by flip chip bonding
  • the photodetector in the photodetector array is soldered to the detector driving circuit chip by flip chip bonding.
  • the light emitting surface of the laser and the light receiving surface of the photodetector face the optical interconnect layer.
  • the optical interconnect layer comprises an upper cladding layer, a core layer and a lower cladding layer; the core layer comprises one or more optical waveguides, and each optical waveguide is arranged in parallel.
  • the laser array comprises m lasers;
  • the photodetector array comprises m photodetectors,
  • the core layer comprises m optical waveguides, and the first waveguide coupling module and the second waveguide are coupled
  • the modules respectively comprise m waveguide couplers;
  • m is an integer greater than or equal to 1;
  • One end of the m waveguide couplers in the first waveguide coupling module is in one-to-one correspondence with the light-emitting ports of the m lasers, and the other end is in one-to-one correspondence with the input ends of the m optical waveguides;
  • One end of the m waveguide couplers in the second waveguide coupling module is in one-to-one correspondence with the light receiving ports of the m photodetectors, and the other end is in one-to-one correspondence with the output ends of the m optical waveguides.
  • the printed circuit board is a multilayer printed circuit board, and the optical interconnect layer is placed under or in the middle of the multilayer printed circuit board, the optical interconnect layer and the multilayer The printed circuit board is glued together;
  • the light emitting module and the light receiving module are placed on a top layer of the multilayer printed circuit board.
  • the light in the optical interconnect layer and the light emitted by the light emitting module and the light received by the light receiving module are both at an angle of 90°.
  • the optical interconnect backplane further includes:
  • One or more backplane sockets configured to provide a high between the service board and the optical interconnect backplane Speed signal interface
  • Each of the backplane sockets is connected to the switch chip in one-to-one correspondence through an electric trace of the printed circuit board;
  • Each of the switch chips is connected to the service board in a one-to-one correspondence through the corresponding backplane socket.
  • the light emitting module, the light receiving module, the first waveguide coupling module, and the second waveguide coupling module are both (P-1) ⁇ 2, and the light emitting module and the first waveguide coupling module are a corresponding connection, the light receiving module is connected to the second waveguide coupling module in one-to-one correspondence;
  • the switching chips are P, and are connected one-to-one with the service board;
  • P is the number of service boards;
  • Each of the switch chips is sequentially connected; the first and last switch chips are connected to one of the light emitting modules, one of the light receiving modules; and the other switch chips are connected to one of the light emitters for transmission in the first direction a module and one of the light receiving modules, and one of the light emitting modules and one of the light receiving modules for second direction transmission;
  • the first switch chip is connected to the light receiving module connected to the next switch chip for transmission in the first direction through the connected light emitting module; and is connected to the next switch chip through the connected light receiving module for the first The light emitting modules transmitted in the two directions are connected;
  • the last switch chip is connected to the light emitting module for the first direction transmission connected to the previous switch chip through the connected light receiving module; and connected to the previous switch chip by the connected light emitting module for the second The light receiving modules of the direction transmission are connected;
  • one switch chip is connected to the other one of the switch chips for connection in the first direction by the connected light emitting module for the first direction of transmission
  • the light receiving module is connected to be connected to the light emitting module for second direction transmission connected by the connected light receiving module and connected to another switch chip;
  • connection between the light emitting module and the light receiving module refers to a second waveguide coupling module in which the light emitting module is connected to the light receiving module through a correspondingly connected first waveguide coupling module and the optical interconnect layer.
  • each of the switch chips has a (P+1)*K pair electrical transceiver port, including:
  • K is an electrical transceiver port for connecting the backplane socket
  • P*K is used for connecting the electrical transceiver port of the light emitting module
  • P*K are used for connecting the electrical transceiver port of the light receiving module
  • One of the light emitting modules includes P*K/2 lasers
  • One of the light receiving modules includes P*K/2 photodetectors
  • each of the switch chips has a K*P pair of electrical transceivers, including:
  • One of the light emitting modules includes (P-1)*K/2 lasers;
  • One of the light receiving modules includes (P-1)*K/2 photodetectors.
  • the switch chip is further configured to: communicate with the central control unit through an electrical trace of the printed circuit board to implement cross-scheduling between different electrical transceiver ports.
  • a transmission device comprising: one or more service boards;
  • the switch chip in the optical interconnect backplane is connected to the service board in a one-to-one correspondence.
  • a signal scheduling method is implemented based on the optical interconnect backplane described above, including:
  • the switching chip sends the received electrical signal to the connected light emitting module or the electrical trace of the printed circuit board according to a predetermined cross configuration strategy
  • the light emitting module modulates the electrical signal into an optical signal, and then sends the electrical signal to the optical interconnect layer through a first waveguide coupling module;
  • the second waveguide coupling module couples an optical signal transmitted through the optical interconnect layer to the light receiving module
  • the light receiving module converts the optical signal into an electrical signal and sends the optical signal to the connected switching chip.
  • the electrical signals received by the switch chip include:
  • a computer readable storage medium storing computer executable instructions that, when executed by a processor, implement the above method.
  • the solution of the embodiment of the present invention combines the advantages of optical transmission and electrical transmission with the related technologies, and fully utilizes the advantages of high optical transmission rate, small loss, long transmission distance, strong anti-interference, and the electrical layer.
  • the flexible scheduling combines the cross-board and the backplane of the traditional transmission equipment into one, which solves the bottleneck of the device's cross-capacity limitation, effectively improves the cross-capacity of the transmission equipment, and the single-channel bandwidth, and reduces the communication equipment.
  • the complexity of interconnections saves costs.
  • FIG. 1 is a schematic structural diagram of a transmission device of a related art
  • FIG. 3 is a schematic diagram of an optical interconnect backplane of Embodiment 1;
  • Figure 4 is a schematic view showing the 45° mirror coupling in the first embodiment
  • FIG. 5 is a schematic view of an MT connector in the first embodiment
  • FIG. 6 is a schematic diagram of a connection between a service board and an optical interconnect backplane in Embodiment 1;
  • Figure 7 is a signal flow diagram of Figure 6;
  • FIG. 8 is a schematic structural view of an example of the first embodiment
  • Embodiment 9 is a flowchart of a method for signal scheduling in Embodiment 3.
  • Embodiment 10 is a schematic view of a path in Embodiment 1;
  • FIG. 11 is a schematic diagram of a path in Embodiment 2.
  • Figure 12 is a second schematic diagram of the path in the second embodiment
  • FIG. 13 is a schematic diagram of a path in Embodiment 3.
  • Embodiment 1 An optical interconnect backplane, as shown in FIG. 3, includes:
  • An optical interconnect layer 51 comprising one or more optical waveguides
  • a light emitting module 53 that modulates an electrical signal received from the printed circuit board 52 into an optical signal
  • One or more switch chips configured to: implement a cross configuration of any of the inputs to any of the outputs;
  • Each of the switch chips is connected to at least one of the light emitting module and the light receiving module.
  • optical interconnect backplane of the embodiment of the invention can replace the backplane and the crossover board, so it can also be called an optical interconnect cross-backplane.
  • the optical signal has the advantages of high bandwidth, low loss, long transmission distance, no crosstalk, strong anti-interference ability, etc., but the optical layer scheduling is difficult; while the electrical layer has the characteristics of flexible scheduling.
  • an optical interconnect layer including an optical waveguide is added outside the PCB to form an EOPCB (Electro-Optical Printed Circuit Board), which can fully combine the advantages of light and electricity.
  • EOPCB Electro-Optical Printed Circuit Board
  • the photoelectric printed circuit board utilizes the advantages of high bandwidth, high density, and no EMI (Electromagnetic Interference), thereby improving data transmission rate and safety, reducing emission noise, and having low loss and light weight. In addition, the cost of the printed circuit board can be reduced.
  • optical transceivers such as VCSEL (Vertical Cavity Surface Emitting Laser) and PIN-PD (positive-intrinsic-negative photodiode) are embedded in the optoelectronics.
  • the laser as a light source generates an optical signal directly coupled to the optical waveguide, and the detector receives the optical signal coupled from the optical waveguide to restore the electrical signal, thus forming a path.
  • electrical signals are transmitted in the PCB 52 by conventional "wires" of copper wires, while high-frequency optical signals are transmitted over long distances through the optical interconnect layer 51.
  • the optical channel of the optical interconnect backplane of this embodiment is as shown in FIG.
  • the optical signal emitted by the light emitting module 53 is coupled into the optical waveguide through the first waveguide coupling module 551 for propagation.
  • the optical signal is coupled into the light receiving module 54 through the second waveguide coupling module 552 to restore the optical signal to electric signal.
  • the printed circuit board 52 is a conventional multilayer printed circuit board, and the optical interconnect layer 51 is placed under or in the middle of a conventional multilayer printed circuit board.
  • the optical interconnect layer 51 Glued with a multilayer printed circuit board.
  • the light emitting module 53, and the light receiving module 54 are placed on the top layer of the multilayer printed circuit board.
  • the light emitting module 53 includes a laser array 532 and a laser driving circuit chip 531.
  • the light receiving module 54 includes a photodetector array 542 and a detector driving circuit chip 541.
  • the high speed signal data stream is transmitted to the laser driving circuit chip through the electric trace of the printed circuit board 52; the laser driving circuit chip 531 modulates the laser light to modulate the high speed signal data stream onto the optical signal; the optical signal passes through the first waveguide coupling module 551. Coupled to an optical waveguide embedded in the printed circuit board 52; at the optical waveguide output, the optical signal is coupled to the photodetector via a second waveguide coupling module 552; the photodetector restores the optical signal to an electrical signal, It is transmitted to the detector driving circuit chip 541 connected to the photodetector and transmitted to the printed circuit board 52.
  • a high speed signal refers to a signal that exceeds 1 Gbps.
  • the laser in the laser array 532 can be, but is not limited to, a VCSEL, and the photodetector in the photodetector array 542 can be, but is not limited to, a PIN-PD detector.
  • the laser in the laser array 532 and the photodetector in the photodetector array 542 are respectively soldered together with the laser/detector driving circuit chip by flip chip bonding, so that the emitting surface of the laser and the photodetection The light receiving surface of the device is oriented toward the optical interconnect layer 51.
  • each laser/detector drive circuit chip drives m lasers/m photodetectors a detector, where m is the number of lasers included in the light emitting module 53 / the number of photodetectors included in the light receiving module 54 is an integer greater than or equal to 1, and the value of m is determined by the light emitting module 53 / light receiving
  • the model of module 54 depends on the model.
  • the light emitting module 53 and the light receiving module 54 may be, but are not limited to, packaged on a printed circuit board by a BGA (Ball Grid Array).
  • the optical interconnect layer 51 includes an upper cladding layer 511, a core layer 512, and a lower cladding layer 513.
  • the core layer 512 includes one or more optical waveguides, each of which is arranged in parallel.
  • the optical waveguide is arranged to transmit a high rate of optical signal, the number of optical waveguides depending on the number of high speed signals that the optical interconnect backplane needs to transmit.
  • Each optical waveguide needs to correspond to one laser, one photodetector and a pair of waveguide coupling modules to realize optical communication. Only one optical channel is shown in Figure 3.
  • the core layer 512 may include m optical waveguides; the first waveguide coupling module 551 and the second waveguide coupling module 552 in FIG. 3 may both be
  • the m waveguide couplers are included to couple the m optical signals emitted by the laser array 532 into the optical waveguide or to couple the m optical signals from the optical waveguide to the photodetector array 542.
  • One end of the m waveguide couplers in the first waveguide coupling module 551 is in one-to-one correspondence with the light-emitting ports of the m lasers, and the other end is in one-to-one correspondence with the input ends of the m optical waveguides;
  • One end of the m waveguide couplers in the waveguide coupling module 552 is in one-to-one correspondence with the light receiving ports of the m photodetectors, and the other end is in one-to-one correspondence with the output ends of the m optical waveguides.
  • a feature of the coupling between the optical interconnect layer 51 and the light emitting module 53 / the light receiving module 54 is that the light in the optical interconnect layer 51 and the light/light receiving module 54 from the light emitting module 53 receive The light is at an angle of 90° because the function of the waveguide coupling module is to achieve a 90° angular conversion of the light.
  • the first and second waveguide coupling modules adopt 45° mirror coupling, and the 45° mirror faces wavelength independent and has high coupling efficiency.
  • the principle is as shown in FIG. 4: the optical signal emitted by the laser 5321 passes through the waveguide.
  • the 45° mirror of the coupling module 55 is mirrored into the core layer such that the light emitted by the laser 5321 is at an angle of 90° to the fiber transmitted in the core layer.
  • the first and second waveguide coupling modules adopt an MT connector.
  • the MT connector is a coupling method commonly used in fiber arrays, which has small size, accurate positioning and insertion loss. Small and other advantages.
  • FIG. 5 is a schematic diagram of an MT connector 553 composed of four 45° end face fiber arrays with a pitch of 250 um, respectively connected to a light emitting module/light receiving module. The optical signal of the light emitting module is reflected into the optical interconnect layer 51 through the 45° end surface, or the optical signal of the optical interconnect layer 51 is emitted into the light receiving module through the 45° end surface, thereby realizing the light emitting module/light receiving module and the optical waveguide. coupling.
  • the light emitting module 53 and the light receiving module 54 are all one or more;
  • the optical interconnect backplane further includes:
  • One or more backplane sockets configured to: provide a high-speed electrical signal interface between the service board and the optical interconnect backplane;
  • Each of the backplane sockets is connected to the switch chip in one-to-one correspondence by an electrical trace of the printed circuit board in the optical interconnect backplane; each of the switch chips passes the corresponding backplane socket and service The boards are connected one by one.
  • the service board 1 to the service board n shown in FIG. 6 are connected to the optical interconnect backplane 50 through the backplane socket 60.
  • the service boards can be connected to the optical interconnects in a row, which can flexibly implement cross-scheduling between different service boards.
  • each of the service boards 1 to 2 has an external transceiver port. The signals received by the service board through the external interface are transmitted to other service boards through the optical interconnect backplane 50, and then sent out through the external port.
  • the top layer of the multi-layer printed circuit board is soldered with a plurality of rows of backplane sockets, and is configured to provide a high-speed electrical signal interface between the P service boards and the optical interconnect backplane, where P is an integer of ⁇ 3.
  • Each row of backplane sockets forwards K pairs of high speed electrical signals coming from the communication device: Ti_1, Ti_2, ..., Ti_K; Ri_1, Ri_2, ..., Ri_K, integers of K ⁇ 1, integers of 1 ⁇ i ⁇ P, i The number for the business board.
  • the switch chip is configured to: implement K*(P+1) ⁇ K*(P+1) group cross connection (when P is even), or K*P ⁇ K*P group cross connection (P is odd) At the time), it can realize the cross configuration of any input to any output.
  • the switch chip can be configured to communicate with a central CU (Control Unit) through an electrical trace of the multi-layer printed circuit board to implement cross-scheduling between different electrical transceiver ports.
  • a central CU Control Unit
  • the light emitting module, the light receiving module, the first waveguide coupling module, and the second waveguide coupling module are both (P-1) ⁇ 2, and the light emitting module and the first waveguide coupling module are a corresponding connection, the light receiving module is connected to the second waveguide coupling module in one-to-one correspondence;
  • the switching chips are P, and are connected one-to-one with the service board;
  • P is the number of service boards;
  • Each of the switch chips is sequentially connected; the first and last switch chips are connected to one of the light emitting modules, one of the light receiving modules; and the other switch chips are connected to one of the light emitters for transmission in the first direction a module and one of the light receiving modules, and one of the light emitting modules and one of the light receiving modules for second direction transmission;
  • the first switch chip is connected to the light receiving module connected to the next switch chip for transmission in the first direction through the connected light emitting module; and is connected to the next switch chip through the connected light receiving module for the first The light emitting modules transmitted in the two directions are connected;
  • the last switch chip is connected to the light emitting module for the first direction transmission connected to the previous switch chip through the connected light receiving module; and connected to the previous switch chip by the connected light emitting module for the second The light receiving modules of the direction transmission are connected;
  • one switch chip is connected to the other one of the switch chips for connection in the first direction by the connected light emitting module for the first direction of transmission
  • the light receiving module is connected to be connected to the light emitting module for second direction transmission connected by the connected light receiving module and connected to another switch chip;
  • connection between the light emitting module and the light receiving module refers to a second waveguide coupling module in which the light emitting module is connected to the light receiving module through a correspondingly connected first waveguide coupling module and the optical interconnect layer.
  • each of the switch chips has a (P+1)*K pair electrical transceiver port, and the identifier is:
  • K for the electrical transceiver port for connecting the backplane socket, P*K for connecting the electrical transceiver port of the light emitting module, and P*K for connecting the electrical transceiver port of the light receiving module;
  • one of the light emitting module/light receiving modules includes P*K/2 lasers/photodetectors.
  • one of the light emitting module/light receiving modules includes (P-1)*K/2 lasers/photodetectors.
  • Ti_1/Ri_1, Ti_2/Ri_2, ..., Ti_K/Ri_K electrical transceiver ports are connected to the backplane socket, receive K high-speed electrical signals coming from the service board, or send K high-speed electrical signals to the service board.
  • Ti_R1, Ti_R2, ... are connected to the light emitting module on the right side of the switch chip; Ri_R1, Ri_R2, ... are connected to the light receiving module on the right side of the switch chip.
  • Ti_L1, Ti_L2, ... are connected to the light emitting module on the left side of the switch chip; Ti_L1, Ti_L2, ... are connected to the light receiving module on the left side of the switch chip.
  • Each of the light emitting modules includes a laser array and a laser driving circuit chip.
  • the light receiving module includes a photodetector array and a detector driving circuit chip.
  • the laser and photodetector are flip-chip bonded to the corresponding driver circuit chip such that the light-emitting surface of the laser and the light-receiving surface of the photodetector face the optical interconnect layer.
  • Each driver circuit chip can drive P*K/2 lasers or P*K/2 photodetectors, where P is an even number and K is an integer greater than or equal to 1; or each driver circuit chip can be driven (P- 1) *K/2 lasers or (P-1)*K/2 photodetectors, where P is an odd number and K is an integer greater than or equal to one.
  • the light emitting module and the light receiving module are packaged on the circuit board in the form of a BGA.
  • the optical signal generated by the light emitting module on the right side of the switch chip is coupled into the optical interconnect layer through the waveguide coupling module, and then the optical signal is coupled to the light receiving module on the left side of the switch chip downstream thereof through the waveguide coupling module;
  • the light receiving module on the right side of the switching chip is passed through the waveguide coupling module
  • the optical interconnect layer receives the optical signal emitted by the light emitting module on the left side of its downstream switch chip.
  • the optical signal generated by the light emitting module on the left side of the switch chip is coupled into the optical interconnect layer through the waveguide coupling module, and then the optical signal is coupled to the right side of the switch chip via the waveguide coupling module.
  • the light receiving module on the left side of the switching chip receives the optical signal emitted by the light emitting module on the right side of the upstream switching chip from the optical interconnect layer through the waveguide coupling module.
  • the waveguide coupling module is an array arranged by P*K/2 (P is an even number) or (P-1)*K/2 (P is an odd number) waveguide couplers, and realizes P*K emitted by the laser array.
  • a feature of the coupling between the optical interconnect layer and the optical transceiver module is that the light in the optical interconnect layer and the light in the optical transceiver module are at an angle of 90°, so the waveguide coupling module achieves a 90° angle of light. change.
  • a via is pre-designed on the multilayer PCB of the optical interconnect backplane such that the waveguide coupling module passes through the multilayer printed circuit board and is glued to the optical interconnect layer.
  • One side of the waveguide coupling module is strictly aligned with P*K/2 (P is even) or (P-1)*K/2 (P is odd) optical waveguides in the optical interconnection layer so that light can be coupled from the waveguide coupling module Enter the optical waveguide for transmission, or enter the waveguide coupling module from the optical waveguide.
  • the other side of the waveguide coupling module is strictly aligned with the light emitting surface of the laser array or the light receiving surface of the photodetector array to ensure that the plurality of waveguide couplers correspond to the light emitting ports of the plurality of lasers or the light receiving ports of the plurality of photodetectors.
  • the electrical signal is transmitted through a conventional copper "electrical interconnection", while the high frequency optical signal is transmitted over a long distance through the optical interconnect layer.
  • the backplane socket receives the high-speed signal data stream from the service board, and transmits the short-distance electric trace of the multi-layer printed circuit board to one of the electric receiving ports of the switch chip; and then the central control unit controls the switch chip to realize the high speed of the electric receiving port.
  • the signal data flows to the cross-scheduling between any one of the electrical outlets, and then transmitted to the laser driving circuit chip; the laser driving circuit chip modulates the laser light to modulate the high-speed signal data stream onto the optical signal; the optical signal is coupled through the waveguide coupling module Transmitting into an optical waveguide embedded in a printed circuit board; at the output end of the optical waveguide, the optical signal is coupled to the downstream photodetector through a waveguide coupling module; the photodetector restores the optical signal to an electrical signal, and finally to the optical waveguide a detector driving circuit chip connected to the photodetector; the detector driving circuit chip and the lower The switch chip is connected.
  • the central control unit controls the switch chip to realize the high-speed signal data flow of the power-receiving port to the cross-distribution between any one of the power-distribution ports, and then transmits the high-speed signal data stream to the downstream backplane socket, and then to A service board connected to the backplane socket.
  • the flow direction of the signal in this alternative is: input signal (high-speed signal data stream) - backplane socket - switch chip - light-emitting module - waveguide coupling module - built-in optical waveguide - waveguide coupling module - - Light receiving module - Switching chip - Backplane socket - Output signal (high speed signal data stream).
  • the crossover capacity of the optical interconnect backplane is P*K* the rate of signals transmitted by each optical channel.
  • the network structure diagram of this example is shown in FIG. 8, and the optical interconnect backplane includes:
  • the optical signal is transmitted between the light emitting module and the light receiving module through the optical interconnect layer and the pair of waveguide coupling modules;
  • the top layer of the multilayer printed circuit board is also soldered with four backplane sockets, and each backplane socket is respectively corresponding to the switching chips S_1 ⁇ S_4 and the four service boards through the electrical traces of the multilayer printed circuit board. Connected.
  • the right side of the switch chips S_1 S S_3 has one light emitting module and one light receiving module; the left side of the switch chips S_2 S S_4 has one light emitting module and one light receiving module.
  • the switch chip S_i has K*(P+1), that is, 10 pairs of electrical transceiver ports, and the identifier is:
  • the Ti_1/Ri_1 and Ti_2/Ri_2 electrical transceiver ports are connected to the backplane socket, receive two high-speed electrical signals coming from the service board, or send two high-speed electrical signals to the service board.
  • Ti_R1/Ri_R1, Ti_R2/Ri_R2, Ti_R3/Ri_R3, Ti_R4/Ri_R4 are connected to the light-receiving module on the right side thereof; Ti_L1/Ri_L1, Ti_L2/Ri_L2, Ti_L3/Ri_L3, and Ti_L4/Ri_L4 are connected to the light-receiving module on the left side thereof.
  • the left side of the switch chip S_1 and the right side of the switch chip S_4 in FIG. 8 are not connected to other switch chips, so the corresponding power transceiver ports are not shown in the figure.
  • the light emitting module of this example uses a VCSEL transmitting module, which integrates four VCSEL lasers and a laser driving circuit chip, and has four independent VCSEL pixels, which can convert electrical signals into optical signals.
  • the light receiving module adopts a PIN-PD receiving module, which integrates four PIN-PD detectors and a detector driving circuit chip, and has four independent PIN-PD pixels, which can convert optical signals into electrical signals.
  • the waveguide coupling module of this example is an MT connector.
  • Each service board is connected to a switch chip through a backplane socket, and the switch chip communicates with the outside through a light emitting or light receiving module, and an optical waveguide based optical interconnect technology is used between the switch chips.
  • the input and output data of the backplane of each service board is realized by the switch chip to realize the data connection in each direction, and then converted into an optical signal by the VCSEL laser, and the waveguide coupler introduces the light into the optical waveguide built in the circuit board; to the next When the chip is exchanged, it is converted into an electrical signal by the PIN-PD photodetector, and then distributed by the switch chip and finally transmitted to the target service board through the backplane socket.
  • cross-scheduling between each service board requires multiple electrical exchanges and optical transmission, which basically solves the problems of crosstalk and interference during transmission, and greatly improves the communication rate.
  • the optical interconnect backplane of this example is formed by bonding an optical interconnect layer and a multilayer PCB board, and the optical interconnect layer may be located in the middle or below the multilayer PCB board.
  • the optical interconnect layer is composed of an upper cladding layer, an lower cladding layer and a core layer, and eight optical waveguides are laid in the core layer.
  • the optical waveguide in the core layer of this example uses a multimode fiber because the core area of the multimode fiber is large.
  • the eight optical waveguides of the optical interconnect layer of this example are arranged in a one-dimensional array with a pitch of 250 um and an error of 0.5 um.
  • the multilayer PCB board of the optical interconnect backplane of this example is pre-designed with vias so that the MT connector passes through the multilayer PCB board and is glued to the optical interconnect layer.
  • the optical signal transmission of this example is divided into two directions, each having four optical waveguides. Two MT connectors are placed on the left and right sides of each switch chip, one side of one of the MT connectors on one side is strictly aligned with the four optical waveguides in the optical interconnect layer, so that light can enter the optical waveguide from the MT connector. Medium transmission; the other side is strictly aligned with the light-emitting surface of the VCSEL laser array to ensure the illumination of 4 and 4 lasers in the MT connector The mouth is aligned one by one.
  • One side of the other MT connector on one side of the switch chip is strictly aligned with the other four optical waveguides in the optical interconnect layer so that the optical signal enters the MT connector from the optical waveguide; and the other side of the MT connector and the PIN-PD
  • the light-receiving surfaces of the array are strictly aligned to ensure that the four optical fibers in the 8MT connector are aligned with the light-receiving ports of the four PIN-PD detectors.
  • the switching chip of this example uses the VSC3321 chip, which has a total of 24 input and output ports, 8 of which are used for input, 8 for output, and the remaining 8 can be configured with input and output ports arbitrarily.
  • the switch chip can be configured as a 12x12 cross-connect or as an 8x16 or 16x8 cross-multiplex. This example is configured as a 10x10 cross-connect and the remaining 4 pins are idle.
  • Embodiment 2 A transmission device, including the optical interconnection backplane of Embodiment 1, and one or more service boards;
  • the switch chip in the optical interconnect backplane is connected to the service board in a one-to-one correspondence.
  • the optical interconnect backplane further includes one or more backplane sockets, and one backplane socket is connected to one of the service boards;
  • Each of the service boards also includes a backplane socket; each of the service boards is mounted to the optical interconnect backplane through its own backplane socket and a backplane socket on the backplane;
  • An electrical transceiver port for connecting the service board on the switch chip is connected to a backplane socket on the optical interconnect backplane to be connected to a service board mounted on the optical interconnect backplane.
  • Embodiment 3 As shown in FIG. 9 , a signal scheduling method based on the optical interconnect backplane of the first embodiment is used to implement cross-scheduling between service boards, including:
  • step 901 the switch chip sends the received electrical signal to the connected light emitting module or the electrical trace of the printed circuit board according to a predetermined cross configuration strategy.
  • Step 902 the light emitting module modulates the electrical signal into an optical signal, and then sends the electrical signal to the optical interconnect layer through a first waveguide coupling module;
  • Step 903 the second waveguide coupling module couples an optical signal sent through the optical interconnect layer to the light receiving module;
  • Step 904 the light receiving module converts the optical signal into an electrical signal and sends the optical signal to the connected switching chip.
  • the predetermined cross-configuration policy may be sent by the central control unit to the switch chip, or may be preset in the switch chip.
  • the electrical signals received by the switch chip include:
  • the switch chip sends the received electrical signal to the connected light emitting module according to a predetermined cross configuration policy, or the electrical trace of the printed circuit board includes:
  • the different electrical transceiver ports of the switch chip are respectively connected to the electric traces and the light emitting modules of the printed circuit board;
  • the switch chip sends the received electrical signal to the corresponding electrical transceiver according to a predetermined cross-configuration policy.
  • the service board E_i is self-intersecting on the optical interconnecting backplane, an integer of 1 ⁇ i ⁇ P, and i is the number of the service board.
  • the structure of the optical interconnect backplane is the same as the example shown in FIG. 8; this embodiment example
  • the signal circuit process in the process includes:
  • the service board E_i receives the service signal through the external receiving port, and after the conversion of its own service, becomes K high-speed electric signals to the backplane socket B_i;
  • the backplane socket B_i transmits the K high-speed electrical signals to the switch chip S_i through the electrical trace of the multilayer PCB board;
  • the central control unit controls the switch chip S_i such that the power outlets Ti_1, Ti_2, ..., Ti_K are connected to the electric receiving ports Ri_1, Ri_2, ..., Ri_K one by one;
  • the exchange chip S_i electric hair outlet Ti_1, Ti_2, ..., Ti_K will these K high-speed telecommunications
  • the number is transmitted back to the backplane socket B_i through the electrical trace of the multilayer PCB board;
  • the K high-speed electric signals are received by the service board E_i from the backplane, and then the service is switched, and the service is sent out from the external port.
  • the transmission path of the high-speed electrical signal is as shown in FIG. 10, and the two paths are respectively from the electrical receiving port R1_1 of the switching chip S_1 to the electrical outlet T1_1, and the electrical closing port R1_2 of the switching chip S_1. Go to the electric outlet T1_2.
  • the service boards E_i and E_i+1 or the service boards E_i and E_i-1 are cross-scheduled on the optical interconnect backplane, and integers of 1 ⁇ i, i+1, i-1 ⁇ P.
  • the service board E_i+1 is defined as the downstream of the service board E_i
  • the service board E_i-1 is the upstream of the service board E_i.
  • the y-th road of the downstream service board E_i+1 is scheduled by the x-th high-speed electric signal of the service board E_i as an example.
  • 1 ⁇ x, y ⁇ K, x may be equal to y or not equal to y, the light
  • the structure of the interconnect backplane is the same as the example shown in FIG. 8; the signal circuit process in this embodiment example includes:
  • the service board E_i receives the service signal through the external receiving port, after the conversion of its own business, becomes K high-speed electrical signals to the backplane socket B_i;
  • the backplane socket B_i transmits the K high-speed electrical signals to the switch chip S_i through the electrical trace of the multilayer PCB board;
  • the Ti_Ry of the switching chip S_i is connected to the laser driving circuit chip of the right side light emitting module through the electric trace of the multilayer PCB board, and the laser driving circuit chip emits light by modulating the yth laser of the laser light emitting array, and the service board E_i
  • the x-th high-speed electrical signal of the backplane is modulated onto the optical signal, and the optical signal is coupled to the optical waveguide embedded in the PCB through the waveguide coupling module for transmission;
  • the optical signal is coupled to the yth photodetector in the photodetector array on the left side of the downstream switching chip S_i+1 through the waveguide coupling module, and the photodetector will optically signal Reverting to an electrical signal, and finally transmitting it to the detector driving circuit chip connected to the photodetector, and then connecting to the electrical receiving port Ri+1_Ly of the switching chip S_i+1;
  • the service board E_i+1 receives the high-speed electrical signal from the switch chip S_i+1 electrical outlet Ti+1_y through the backplane socket B_i+1, thus implementing cross-scheduling of the high-speed electrical signal.
  • the y-th road of the upstream service board E_i-1 is scheduled by the x-th high-speed electric signal of the service board E_i as an example.
  • 1 ⁇ x, y ⁇ K, x may be equal to y or not equal to y, the light
  • the structure of the interconnect backplane is the same as the example shown in FIG. 8; the signal circuit process in this embodiment example includes:
  • the service board E_i receives the service through the external receiving port, and after the conversion of its own service, becomes K high-speed electric signals to the backplane socket B_i;
  • the backplane socket B_i transmits the K high-speed electrical signals to the switch chip S_i through the electrical trace of the multilayer PCB board;
  • the Ti_Ly of the switching chip S_i is connected to the laser driving circuit chip of the left side light emitting module through the electric trace of the multilayer PCB board, and the laser driving circuit chip emits light by modulating the yth laser of the laser light emitting array, and the service board E_i
  • the x-th high-speed electrical signal of the backplane is modulated onto the optical signal, and the optical signal is coupled to the optical waveguide embedded in the PCB through the waveguide coupling module for transmission;
  • the optical signal is coupled to the yth photodetector in the photodetector array on the right side of the upstream switching chip S_i-1 through the waveguide coupling module, and the photodetector restores the optical signal to an electrical signal, and finally It is transmitted to the detector driving circuit chip connected to the photodetector, and then connected to the electric receiving port Ri-1_Ry of the switching chip S_i-1;
  • the service board E_i-1 receives the high-speed electrical signal from the electrical outlet T-1_y of the switch chip S_i-1 through the backplane socket B_i-1, thus achieving cross-scheduling of the high-speed electrical signals.
  • the service board and its upstream or downstream service boards are cross-scheduled, and the different electrical transceiver ports of the switch chip are taken.
  • the cross-scheduling with the downstream is the electrical transceiver ports Ti_R1/Ri_R1, Ti_R2/Ri_R2, ...;
  • the cross-distribution with the upstream is that the electrical transceiver ports are Ti_L1/Ri_L1, Ti_L2/Ri_L2, ....
  • the backplane socket, the switch chip connected thereto, and the optical transceiver module on the left and right sides of the switch chip are defined as one node.
  • the cross-scheduling between the non-adjacent service boards is basically the same as the cross-scheduling between the adjacent service boards.
  • the central control unit controls the electrical transceiver ports connected to the optical transceiver module in the switch chip.
  • the cross-scheduling does not pass through the transceiver ports Ti_1/Ri_1, Ti_2/Ri_2, ..., Ti_K/Ri_K connected to the backplane socket.
  • the cross-scheduling of the x-th high-speed electric signal on the lower back of the service board E_i and the y-th road of the service board E_i+2 will be described as an example.
  • the structure of the optical interconnect backplane is the same as the example shown in FIG. 8; the signal circuit process in this embodiment example includes:
  • the service board E_i receives the service through the external receiving port, and after the conversion of its own service, becomes K high-speed electric signals to the backplane socket B_i;
  • the backplane socket B_i transmits the K high-speed electrical signals to the switch chip S_i through the electrical trace of the multilayer PCB board;
  • the Ti_Ry of the switching chip S_i is connected to the laser driving circuit chip of the right side light emitting module through the electric trace of the multilayer PCB board, and the laser driving circuit chip emits light by modulating the yth laser of the laser light emitting array, and the service board E_i
  • the x-th high-speed electrical signal of the backplane is modulated onto the optical signal, and the optical signal is coupled to the optical waveguide embedded in the PCB through the waveguide coupling module for transmission;
  • the optical signal is coupled to the yth photodetector in the photodetector array on the left side of the downstream switching chip S_i+1 through the waveguide coupling module, and the photodetector restores the optical signal to an electrical signal, and finally Transmitting to the detector driving circuit chip connected to the photodetector, and then connecting to the electric receiving port Ri+1_Ly of the switching chip S_i+1;
  • the Ti_Ry of the switching chip S_i+1 is connected to the right side light emitting module, and converted into an optical signal and coupled to the optical waveguide through the waveguide coupling module for transmission;
  • the optical signal is received by the optical receiving module on the left side of the downstream switching chip S_i+2 and restored to an electrical signal, and then connected to the electrical receiving port Ri+2_Ly of the switching chip S_i+2;
  • the service board E_i+2 receives the high-speed electrical signal from the switch chip S_i+2, and the high-speed electrical signal is cross-distributed through the backplane socket B_i+2.
  • the above three scenarios are typical cross-scheduling scenarios of the optical interconnecting backplane, but are not limited to the above scenarios, and the user can implement flexible scheduling according to requirements. It should be noted that the basic unit of scheduling is not the service board, but each high-speed electrical signal of the backplane of the service board.
  • cross-scheduling link in the above three application scenarios is not unique.
  • the user can flexibly schedule according to the actual situation, and no conflict occurs between each signal of the lower backplane.
  • the embodiment of the invention further provides a computer readable storage medium storing computer executable instructions, the computer executable instructions being implemented by the processor to implement the signal scheduling method.
  • the embodiments of the present invention combine the advantages of optical transmission and electrical transmission, and fully utilize the advantages of high optical transmission rate, small loss, long transmission distance, strong anti-interference, and flexible scheduling of the electrical layer, and the traditional transmission equipment is crossed.
  • the combination of the board and the backboard solves the bottleneck of the device's cross-capacity limitation, effectively improves the cross-capacity of the transmission equipment, and the single-channel bandwidth, and reduces the complexity of interconnection and intercommunication between communication devices, thereby saving costs.

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Abstract

一种光互联背板(50)、传输设备及信号调度方法。光互连背板(50)包括印制电路板(52)、包含一条或多条光波导的光互连层(51)、将从印制电路板(52)接收的电信号调制为光信号的光发射模块(53)、将接收到的光信号转换为电信号并发送给印刷电路板(52)的光接收模块(54)、将光发射模块(53)产生的光信号耦合进光互连层(51)的第一波导耦合模块(551)、将光互连层(51)传输的光信号耦合进光接收模块(54)的第二波导耦合模块(552)、一个或多个交换芯片。交换芯片设置为实现任一路输入到任一路输出的交叉配置。每个交换芯片连接至少一个光发射模块(53)及光接收模块(54)。

Description

一种光互联背板、传输设备及信号调度方法 技术领域
本申请涉及但不限于通信领域,尤其是一种光互联背板、传输设备及信号调度方法。
背景技术
随着通信和计算机技术等信息科学技术的发展,特别是近几年来高速信息通信网的飞速发展,信息量呈指数增长,要求计算机处理速度向着每秒千亿次、万亿次甚至更快的高性能计算机方向发展。宽带、高速、大容量的信息处理和传输对系统内印制电路板之间、板到背板之间、芯片之间的互联速率、带宽和密度提出了更高的要求。面对新世纪高速信息通信网传输速度的挑战,传统的金属线的“电互联”方式已越来越不适应高速信息处理与传输的要求。而计算机内的数据,例如芯片内的微处理器,其中的数据以惊人的速率传输。但是在芯片与芯片、电路板与电路板之间连接的导线,数据传输速率可以用“爬行”来形容。英特尔的奔腾4处理器工作主频高达4GHz以上,但是系统总线却只有几百MHz。如何消除电路板上数据传输的瓶颈,是一个关键问题,并是以后为之努力的方向。
在高速通信系统中,已有的传输设备通常采用如下结构:多个业务板,设置为:实现多种业务接入接出功能;背板,设置为:实现业务板之间的互联互通,但背板通常都是无源的,仅提供通信通道;一个或多个交叉板,设置为:实现业务板之间信号的调度;所述业务板及交叉板为PCB(Printed Circuit Board,印制电路板),均包括背板插座;所述背板上也包含背板插座,与业务板/交叉板上的背板插座配合使用,实现与业务板/交叉板的连接。结构如图1所示。
所述的业务板至少有一对对外收发口,对外收口接收业务信号,业务板对业务进行处理后下背板,然后由背板将信号传递到交叉板;同时,业务板接收交叉板从背板传递过来的信号,进行处理后再从对外发口发出去。所述的业务板和交叉板通过背板插座直接插在背板上实现与背板的互连互通。
所述的交叉板接收从背板传递过来的业务板的信号,然后进行调度转发。如图2所示,业务板1、业务板2、……、业务板n均具有对外收发口,业务板通过对外收口收到的信号通过背板传递到交叉板,由交叉板通过背板传递给其它业务板,再通过对外发口发送出去。
上述传输设备中业务信号交叉容量的受限主要取决于目前PCB板电互联的有限带宽瓶颈。当传输高速信号时,尤其是上GHz的电信号,损耗大,传输距离短,抗干扰性差,串扰严重,同时,交叉板还需要对从背板接收到的高速信号进行电中继。如何在保证信号传输距离/质量和业务灵活调度的前提下简化设计,是当前有待解决的一个问题。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本文提供了一种光互联背板,及采用该光互联背板的传输设备及信号调度方法,可代替背板和交叉板,既可实现业务的灵活调度,还无需考虑信号的传输距离受限,亦无需采用电中继,这样简化了设计、降低了成本,同时还提高了设备运行的稳定性。
一种光互连背板,包括:印制电路板;
包含一条或多条光波导的光互连层;
光发射模块,设置为:将从所述印制电路板接收的电信号调制为光信号;
光接收模块,设置为:将接收到的光信号转换为电信号并发送给所述印刷电路板;
第一波导耦合模块,设置为:将所述光发射模块产生的光信号耦合进所述光互连层;
第二波导耦合模块,设置为:将所述光互连层传输的光信号耦合进所述光接收模块;
一个或多个交换芯片,设置为:实现任一路输入到任一路输出的交叉配 置;
每个所述交换芯片连接至少一个所述光发射模块及光接收模块。
可选地,所述光发射模块包括激光器阵列和激光器驱动电路芯片;所述光接收模块包括光电探测器阵列和探测器驱动电路芯片。
可选地,所述激光器阵列中的激光器为垂直腔面发射激光器,所述光电探测器阵列中的光电探测器为PIN光电探测器。
可选地,所述激光器阵列中激光器用倒装焊的方式与激光器驱动电路芯片焊在一起,所述光电探测器阵列中光电探测器用倒装焊的方式与探测器驱动电路芯片焊在一起,所述激光器的发光面和光电探测器的受光面朝向所述光互连层。
可选地,所述光互连层包括上包层、纤芯层和下包层;所述纤芯层中包含一条或多条光波导,每条光波导平行排列。
可选地,所述激光器阵列包含m个激光器;所述光电探测器阵列包括m个光电探测器,所述纤芯层中包含m条光波导,所述第一波导耦合模块和第二波导耦合模块分别包含m个波导耦合器;m为大于或等于1的整数;
所述第一波导耦合模块中的m个波导耦合器的一端与m个激光器的发光口一一对应,另一端与所述m条光波导的输入端一一对应;
所述第二波导耦合模块中的m个波导耦合器的一端与所述m个光电探测器的受光口一一对应,另一端与所述m条光波导的输出端一一对应。
可选地,所述印制电路板为多层印制电路板,所述光互连层放置在所述多层印制电路板的下面或中间,所述光互连层与所述多层印制电路板胶合在一起;
所述光发射模块和光接收模块放置在所述多层印制电路板的顶层。
可选地,光互连层中的光线和所述光发射模块发出的光线、以及和所述光接收模块接收的光线均成90°角。
可选地,所述的光互连背板还包括:
一个或多个背板插座,设置为:提供业务板与所述光互连背板之间的高 速电信号接口;
每个所述背板插座通过所述印制电路板的电走线与所述交换芯片一一对应相连;
每个所述交换芯片通过对应的所述背板插座与业务板一一对应相连。
可选地,所述光发射模块、光接收模块、第一波导耦合模块、第二波导耦合模块均为(P-1)×2个,所述光发射模块与所述第一波导耦合模块一一对应连接,所述光接收模块与所述第二波导耦合模块一一对应连接;所述交换芯片为P个,与业务板一一对应连接;P为业务板的个数;
每个所述交换芯片依次连接;第一个和最后一个交换芯片均连接一个所述光发射模块,一个所述光接收模块;其它交换芯片均连接用于第一方向传输的一个所述光发射模块和一个所述光接收模块,以及用于第二方向传输的一个所述光发射模块和一个所述光接收模块;
第一个交换芯片通过所连接的光发射模块与下一个交换芯片所连接的用于第一方向传输的光接收模块相连;通过所连接的光接收模块与下一个交换芯片所连接的用于第二方向传输的光发射模块相连;
最后一个交换芯片通过所连接的光接收模块与前一个交换芯片所连接的用于第一方向传输的光发射模块相连;通过所连接的光发射模块与前一个交换芯片所连接的用于第二方向传输的光接收模块相连;
其它两个相邻的所述交换芯片之间,一个交换芯片通过所连接的用于第一方向传输的所述光发射模块与另一个所述交换芯片所连接的用于第一方向传输的所述光接收模块相连,通过所连接的用于第二方向传输的所述光接收模块与另一个所述交换芯片所连接的用于第二方向传输的所述光发射模块相连;
其中,光发射模块和光接收模块相连是指光发射模块通过对应连接的第一波导耦合模块及所述光互连层连接到光接收模块对应连接的第二波导耦合模块。
可选地,P为偶数时,每个所述交换芯片有(P+1)*K对电收发口,包括:
K对用于连接所述背板插座的电收发口,P*K个用于连接所述光发射模块的电收发口,P*K个用于连接所述光接收模块的电收发口;
一个所述光发射模块中包括P*K/2个激光器;
一个所述光接收模块中包括P*K/2个光电探测器;
P为奇数时,每个所述交换芯片有K*P对电发收口,包括:
K对用于连接所述背板插座的电收发口,(P-1)*K个用于连接所述光发射模块的电收发口,(P-1)*K个用于连接所述光接收模块的电收发口;
一个所述光发射模块中包括(P-1)*K/2个激光器;
一个所述光接收模块中包括(P-1)*K/2个光电探测器。
可选地,所述交换芯片还设置为:通过印制电路板的电走线与中央控制单元进行通信,实现不同电收发口之间的交叉调度。
一种传输设备,包括:一个或多个业务板;
上述的光互连背板;
所述光互连背板中的所述交换芯片与所述业务板一一对应相连。
一种信号调度方法,基于上述的光互连背板实现,包括:
所述交换芯片将收到的电信号根据预定的交叉配置策略相应发送给所连接的光发射模块,或所述印制电路板的电走线;
所述光发射模块将所述电信号调制为光信号后,通过第一波导耦合模块发送到所述光互连层;
所述第二波导耦合模块将通过所述光互连层发送来的光信号耦合到所述光接收模块;
所述光接收模块将所述光信号转换为电信号后发送给所连接的交换芯片。
可选地,所述交换芯片收到的电信号包括:
通过所述印制电路板的电走线收到的电信号、通过所连接的所述光接收模块收到的电信号。
一种计算机可读存储介质,存储有计算机可执行指令,所述计算机可执行指令被处理器执行时实现上述方法。
采用本发明实施例的方案,与相关技术相比,将光传输和电传输的优势结合在一起,充分利用光传输速率高、损耗小、传输距离长、抗干扰性强等优势,以及电层的灵活调度,将传统传输设备的交叉板和背板合二为一,解决了以往设备交叉容量受限的瓶颈,有效提高了传输设备的交叉容量,以及单信道带宽,且降低了通信设备间互联互通的复杂性,节省了成本。
在阅读并理解了附图和详细描述后,可以明白其他方面。
附图概述
图1为相关技术的传输设备的结构示意图;
图2为相关技术的传输设备的信号流向图;
图3为实施例一的光互连背板的示意图;
图4为实施例一中45°镜面耦合的示意图;
图5为实施例一中MT连接器的示意图;
图6为业务板与实施例一中的光互连背板的连接示意图;
图7为图6的信号流向图;
图8为实施例一的例子中的结构示意图;
图9为实施例三信号调度方法的流程图;
图10为实施示例1中的路径示意图;
图11为实施示例2中的路径示意图之一;
图12为实施示例2中的路径示意图之二;
图13为实施示例3中的路径示意图。
本发明的实施方式
下面将结合附图及实施例对本发明的实施方式进行说明。
需要说明的是,如果不冲突,本发明实施例以及实施例中的特征可以相互结合,均在本申请的保护范围之内。
实施例一、一种光互连背板,如图3所示,包括:
包含一条或多条光波导的光互连层51;
印制电路板52;
将从所述印制电路板52接收的电信号调制为光信号的光发射模块53;
将接收到的光信号转换为电信号并发送给所述印刷电路板52的光接收模块54;
将所述光发射模块53产生的光信号耦合进所述光互连层51的第一波导耦合模块551;
将所述光互连层51传输的光信号耦合进所述光接收模块54的第二波导耦合模块552;
一个或多个交换芯片,设置为:实现任一路输入到任一路输出的交叉配置;
每个所述交换芯片连接至少一个所述光发射模块及光接收模块。
本发明实施例的光互连背板可代替背板和交叉板,所以也可称为光互连交叉背板。
光信号具有高带宽、低损耗、传输距离长、无串扰、抗干扰能力强等优点,但光层调度难度大;而电层却具有调度灵活的特点。本实施例在PCB之外增加一层包含光波导的光互连层,形成EOPCB(Electro-Optical Printed Circuit Board,光电印制电路板),能将光和电的优点充分结合起来,将会在新一代超小型、高带宽、高速率、大容量的信息设备中得到广泛的应用。
光电印制电路板利用了光具有带宽高、密度高、没有EMI(Electromagnetic Interference,电磁干扰)等优势,从而提高数据的传输速率和安全性,降低发射噪声,具有低损耗、重量轻的特点,此外,可降低印制电路板的费用。光电印制电路板上,光收发设备如:VCSEL(Vertical Cavity Surface Emitting Laser,垂直腔面发射激光器)和PIN-PD(positive-intrinsic-negative photodiode,PIN光电二极管)探测器内嵌在光电 印制电路板的里面。激光器作为光源产生光信号直接耦合到光波导,探测器再接收从光波导耦合过来的光信号还原出电信号,如此形成通路。
本实施例中,电信号通过传统的铜线“电互联”在所述PCB 52中传输,而高频率的光信号则通过光互连层51进行长距离传输。
本实施例的光互连背板的光通道如图3所示。光发射模块53发出的光信号通过第一波导耦合模块551耦合进光波导中进行传播,在光波导输出端,光信号通过第二波导耦合模块552耦合进光接收模块54,将光信号还原成电信号。
可选地,所述印制电路板52为传统的多层印制电路板,所述光互连层51放置在传统的多层印制电路板的下面或中间,所述光互连层51与多层印制电路板胶合在一起。
所述光发射模块53,和光接收模块54放置在多层印制电路板的顶层。
可选地,所述光发射模块53包括激光器阵列532和激光器驱动电路芯片531。所述光接收模块54包括光电探测器阵列542和探测器驱动电路芯片541。
高速信号数据流通过印刷电路板52的电走线传送到激光器驱动电路芯片;激光器驱动电路芯片531通过调制激光器发光,将高速信号数据流调制到光信号上;光信号通过第一波导耦合模块551耦合到被嵌入在印制电路板52中的光波导中传输;在光波导输出端,光信号通过第二波导耦合模块552耦合到光电探测器中;光电探测器将光信号还原为电信号,传送到与光电探测器连接的探测器驱动电路芯片541上,传输到所述印制电路板52上。
在本文中,高速信号是指速率超过1Gbps的信号。
其中,所述激光器阵列532中的激光器可以但不限于为VCSEL,所述光电探测器阵列542中的光电探测器可以但不限于为PIN-PD探测器。
可选地,所述激光器阵列532中的激光器和光电探测器阵列542中的光电探测器分别用倒装焊的方式与激光器/探测器驱动电路芯片焊在一起,这样激光器的发光面和光电探测器的受光面是朝向光互连层51的。
可选地,每个激光器/探测器驱动电路芯片驱动m个激光器/m个光电探 测器,其中m是光发射模块53中包含的激光器的数量/光接收模块54中包含的光电探测器的数量,为大于或等于1的整数,m的取值视光发射模块53/光接收模块54的型号而定。
可选地,光发射模块53和光接收模块54可以但不限于通过BGA(Ball Grid Array,球栅阵列)的形式封装在印制电路板上。
可选地,所述光互连层51包括上包层511、纤芯层512和下包层513。纤芯层512中包含一条或多条光波导,每条光波导平行排列。光波导设置为:传输高速率的光信号,光波导的数量视光互连背板需要传输的高速信号的数量而定。每一条光波导要实现光通信需分别对应一个激光器、一个光电探测器和一对波导耦合模块。图3中只画出了某一个光通道。
相应地,当所述激光器和光电探测器均为m个时,所述纤芯层512中可包括m条光波导;图3中的第一波导耦合模块551和第二波导耦合模块552可以均包含m个波导耦合器,实现将激光器阵列532发射的m路光信号耦合进光波导,或者将m路光信号从光波导耦合到光电探测器阵列542。
其中,所述第一波导耦合模块551中的m个波导耦合器的一端与m个激光器的发光口一一对应,另一端与所述m条光波导的输入端一一对应;所述第二波导耦合模块552中的m个波导耦合器的一端与所述m个光电探测器的受光口一一对应,另一端与所述m条光波导的输出端一一对应。
本实施例中,光互连层51和光发射模块53/光接收模块54之间的耦合的一个特点在于,光互连层51中的光线和光发射模块53发出的光线/光接收模块54接收的光线均成90°角,因为波导耦合模块的功能是实现光线的90°角转换。
可选地,所述第一、第二波导耦合模块采用45°镜面耦合,45°镜面对波长无关并且具有很高的耦合效率,原理如图4所示:激光器5321发出的光信号通过波导耦合模块55的45°镜面反射到纤芯层中,使激光器5321发出的光线和纤芯层中传输的光纤成90°角。
可选地,所述第一、第二波导耦合模块采用MT连接器。MT连接器是目前常用于光纤阵列的一种耦合方式,它具有体积小、定位精准和插入损耗 小等优点。图5为一种MT连接器553的示意图,由间距为250um的4根45°端面光纤阵列组成,分别与光发射模块/光接收模块相连。光发射模块的光信号通过45°端面反射进光互连层51,或者光互连层51的光信号通过45°端面发射进光接收模块,从而实现光发射模块/光接收模块与光波导的耦合。
可选地,所述光发射模块53、光接收模块54均为一个或多个;
本实施例中,所述光互连背板还包括:
一个或多个背板插座,设置为:提供业务板与所述光互连背板之间的高速电信号接口;
每个所述背板插座通过所述光互连背板中印制电路板的电走线与所述交换芯片一一对应相连;每个所述交换芯片通过对应的所述背板插座与业务板一一对应相连。比如图6所示的业务板1~业务板n都通过背板插座60连接在所述光互连背板50上。
本可选方案中,业务板可成排插接在光互连背板上面,可灵活实现不同业务板之间的交叉调度。如图7所示,业务板1~业务板n每个具有对外收发口,业务板通过对外收口收到的信号经过光互连背板50传递给其它业务板,再通过对外发口发送出去。
可选地,所述多层印制电路板的顶层焊接多排背板插座,设置为:提供P个业务板与光互连背板的高速电信号接口,P为≥3的整数。每排背板插座转发从通信设备过来的K对高速电信号:Ti_1、Ti_2、……、Ti_K;Ri_1、Ri_2、……、Ri_K,K≥1的整数,1≤i≤P的整数,i为业务板的编号。
所述的交换芯片设置为:实现K*(P+1)×K*(P+1)组交叉连接(P为偶数的时候),或者K*P×K*P组交叉连接(P为奇数的时候),可实现任一路输入到任一路输出的交叉配置。
可选地,所述交换芯片亦可设置为:通过多层印制电路板的电走线与中央CU(Control Unit,控制单元)进行通信,实现不同电收发口之间的交叉调度。
可选地,所述光发射模块、光接收模块、第一波导耦合模块、第二波导耦合模块均为(P-1)×2个,所述光发射模块与所述第一波导耦合模块一一对应连接,所述光接收模块与所述第二波导耦合模块一一对应连接;所述交换芯片为P个,与业务板一一对应连接;P为业务板的个数;
每个所述交换芯片依次连接;第一个和最后一个交换芯片均连接一个所述光发射模块,一个所述光接收模块;其它交换芯片均连接用于第一方向传输的一个所述光发射模块和一个所述光接收模块,以及用于第二方向传输的一个所述光发射模块和一个所述光接收模块;
第一个交换芯片通过所连接的光发射模块与下一个交换芯片所连接的用于第一方向传输的光接收模块相连;通过所连接的光接收模块与下一个交换芯片所连接的用于第二方向传输的光发射模块相连;
最后一个交换芯片通过所连接的光接收模块与前一个交换芯片所连接的用于第一方向传输的光发射模块相连;通过所连接的光发射模块与前一个交换芯片所连接的用于第二方向传输的光接收模块相连;
其它两个相邻的所述交换芯片之间,一个交换芯片通过所连接的用于第一方向传输的所述光发射模块与另一个所述交换芯片所连接的用于第一方向传输的所述光接收模块相连,通过所连接的用于第二方向传输的所述光接收模块与另一个所述交换芯片所连接的用于第二方向传输的所述光发射模块相连;
其中,光发射模块和光接收模块相连是指光发射模块通过对应连接的第一波导耦合模块及所述光互连层连接到光接收模块对应连接的第二波导耦合模块。
P为偶数时,每个所述交换芯片有(P+1)*K对电收发口,标识为:
Ti_1/Ri_1、Ti_2/Ri_2、……、Ti_K/Ri_K,共K对;
Ti_R1/Ri_R1、Ti_R2/Ri_R2、……,共P*K/2对;
Ti_L1/Ri_L1、Ti_L2/Ri_L2、……,共P*K/2对。
包括K对用于连接所述背板插座的电收发口,P*K个用于连接所述光发射模块的电收发口,P*K个用于连接所述光接收模块的电收发口;
相应地,一个所述光发射模块/光接收模块中包括P*K/2个激光器/光电探测器。
如果P为奇数,则将P减去1再计算,即每个所述交换芯片有K*P对电发收口,标识为:
Ti_1/Ri_1、Ti_2/Ri_2、……、Ti_K/Ri_K,共K对;
Ti_R1/Ri_R1、Ti_R2/Ri_R2、……,共(P-1)*K/2对;
Ti_L1/Ri_L1、Ti_L2/Ri_L2、……,共(P-1)*K/2对。
包括K对用于连接所述背板插座的电收发口,(P-1)*K个用于连接所述光发射模块的电收发口,(P-1)*K个用于连接所述光接收模块的电收发口。
相应地,一个所述光发射模块/光接收模块中包括(P-1)*K/2个激光器/光电探测器。
其中,Ti_1/Ri_1、Ti_2/Ri_2、……、Ti_K/Ri_K电收发口与背板插座相连,接收从业务板过来的K个高速电信号,或者发送K个高速电信号往业务板。Ti_R1、Ti_R2、……与交换芯片右侧的光发射模块相连;Ri_R1、Ri_R2、……与交换芯片右侧的光接收模块相连。Ti_L1、Ti_L2、……与交换芯片左侧的光发射模块相连;Ti_L1、Ti_L2、……与交换芯片左侧的光接收模块相连。
每个所述光发射模块包括激光器阵列和激光器驱动电路芯片。光接收模块包括光电探测器阵列和探测器驱动电路芯片。激光器和光电探测器用倒装焊的方式与相应的驱动电路芯片焊在一起,这样激光器的发光面和光电探测器的受光面是朝向光互连层。每个驱动电路芯片可以驱动P*K/2个激光器或者P*K/2个光电探测器,其中P为偶数,K为大于或等于1的整数;或者每个驱动电路芯片可以驱动(P-1)*K/2个激光器或者(P-1)*K/2个光电探测器,其中P为奇数,K为大于或等于1的整数。光发射模块和光接收模块通过BGA的形式封装在电路板上。
所述的交换芯片右侧的光发射模块产生的光信号通过波导耦合模块耦合进光互连层传输,然后光信号再通过波导耦合模块耦合到其下游的交换芯片左侧的光接收模块;所述的交换芯片右侧的光接收模块通过波导耦合模块从 光互连层接收到其下游交换芯片左侧的光发射模块发射的光信号。
同理,所述的交换芯片左侧的光发射模块产生的光信号通过波导耦合模块耦合进光互连层传输,然后光信号再通过波导耦合模块耦合到其上游的交换芯片右侧的光接收模块;所述的交换芯片左侧的光接收模块通过波导耦合模块从光互连层接收到其上游交换芯片右侧的光发射模块发射的光信号。
所述的波导耦合模块是由P*K/2(P为偶数)或者(P-1)*K/2(P为奇数)个波导耦合器排成的阵列,实现激光器阵列发射的P*K/2(P为偶数)或者(P-1)*K/2(P为奇数)路光信号耦合进光互联层中的P*K/2(P为偶数)或者(P-1)*K/2(P为奇数)条光波导中,或者将P*K/2(P为偶数)或者(P-1)*K/2(P为奇数)路光信号从光波导耦合到光电探测器阵列。
在本发明实施例中,光互连层和光收发模块之间的耦合的一个特点在于,光互连层中的光线和光收发模块中光线成90°角,所以波导耦合模块实现光线的90°角改变。所述光互连背板的多层PCB板上预先设计好过孔,以便波导耦合模块穿过多层印制电路板,与光互连层胶合在一起。波导耦合模块的一面与光互联层中的P*K/2(P为偶数)或者(P-1)*K/2(P为奇数)条光波导严格对准,以便光线能从波导耦合模块进入光波导中进行传输,或者从光波导进入波导耦合模块。而波导耦合模块的另一面与激光器阵列的发光面或者光电探测器阵列的受光面严格对准,保证多个波导耦合器与多个激光器的发光口或者多个光电探测器的受光口一一对应。
本可选方案中,电信号通过传统的铜线“电互联”进行传输,而高频率的光信号则通过光互连层进行长距离传输。
背板插座接收来自业务板的高速信号数据流,通过多层印制电路板的短距离电走线传送到交换芯片的某一个电收口;然后由中央控制单元控制交换芯片实现该电收口的高速信号数据流到任意一路电发口之间的交叉调度,然后传送到激光器驱动电路芯片;激光器驱动电路芯片通过调制激光器发光,将高速信号数据流调制到光信号上;光信号通过波导耦合模块耦合到被嵌入在印制电路板中的光波导中传输;在光波导输出端,光信号通过波导耦合模块耦合到下游的光电探测器中;光电探测器将光信号还原为电信号,最后传送到与光电探测器连接的探测器驱动电路芯片上;探测器驱动电路芯片与下 游交换芯片相连,同样的,由中央控制单元控制交换芯片实现电收口的高速信号数据流到任意一路电发口之间的交叉调度,然后将高速信号数据流传递给下游背板插座,进而到与该背板插座相连的业务板。
反之亦然。
总结,本可选方案中信号的流向为:输入信号(高速信号数据流)——背板插座——交换芯片——光发射模块——波导耦合模块——内置光波导——波导耦合模块——光接收模块——交换芯片——背板插座——输出信号(高速信号数据流)。
本可选方案中,光互连背板的交叉容量为P*K*每路光通道所传输信号的速率。
本可选方案的一个实际例子中,K=2,P=4,本例子的网络结构图如图8所示,光互连背板包括:
多层印制电路板;
光发射模块11、21、31、24、34、44;
光接收模块12、22、32、23、33、43;
光发射模块和光接收模块之间通过光互连层及一对波导耦合模块传输光信号;
所述多层印制电路板顶层还焊接有4个背板插座,每个背板插座分别通过多层印制电路板的电走线与交换芯片S_1~S_4、以及4个业务板一一对应相连。
所述交换芯片S_1~S_3的右侧具有光发射模块和光接收模块各一;所述交换芯片S_2~S_4的左侧具有光发射模块和光接收模块各一。
所述的交换芯片S_i有K*(P+1)即10对电收发口,标识为:
Ti_1/Ri_1、Ti_2/Ri_2;Ti_R1/Ri_R1、Ti_R2/Ri_R2、Ti_R3/Ri_R3、Ti_R4/Ri_R4;Ti_L1/Ri_L1、Ti_L2/Ri_L2、Ti_L3/Ri_L3、Ti_L4/Ri_L4。其中,Ti_1/Ri_1、Ti_2/Ri_2电收发口与背板插座相连,接收从业务板过来的2个高速电信号,或者发送2个高速电信号往业务板。Ti_R1/Ri_R1、Ti_R2/Ri_R2、Ti_R3/Ri_R3、Ti_R4/Ri_R4与其右侧的光收发射模块相连; Ti_L1/Ri_L1、Ti_L2/Ri_L2、Ti_L3/Ri_L3、Ti_L4/Ri_L4与其左侧的光收发射模块相连。图8中交换芯片S_1的左侧和交换芯片S_4的右侧未连接其它交换芯片,因此相应的电收发口未在图中画出。
本例的光发射模块采用VCSEL发射模块,集成了4路VCSEL激光器和激光器驱动电路芯片,有4个独立VCSEL象元,可将电信号转换为光信号。光接收模块采用PIN-PD接收模块,集成了4路PIN-PD探测器和探测器驱动电路芯片,有4个独立PIN-PD象元,可将光信号转换为电信号。本例的波导耦合模块为MT连接器。
每一个业务板通过一个背板插座与一个交换芯片一一对应连接,交换芯片再通过光发射或者光接收模块与外界进行通信,而交换芯片之间采用的是基于光波导的光互连技术。每一个业务板下背板的输入输出数据经交换芯片实现每个方向的数据连接,再通过VCSEL激光器转换成光信号,由波导耦合器将光引入内置于电路板的光波导传输;到下一个交换芯片时,由PIN-PD光电探测器重新转换成电信号,再由交换芯片进行分配并通过背板插座最终传输到目标业务板。在该系统中,每个业务板间实现交叉调度需要经过多次电交换,光传输,基本解决了传输过程中串扰和干扰等问题,大大提高了通信速率。
本例的光互连背板,由光互连层和多层PCB板胶合而成,光互连层可位于多层PCB板的中间或者下面。所述的光互连层由上包层、下包层和纤芯层组成,纤芯层中铺设8条光波导。
为了提高光信号的耦合效率,本例纤芯层中的光波导采用多模光纤,因为多模光纤纤芯面积较大。本例的光互连层的8条光波导排列成一维阵列,间距为250um,误差在0.5um之内。
本例的光互连背板的多层PCB板上预先设计好过孔,以便MT连接器穿过多层PCB板,与光互连层胶合在一起。本例的光信号传输分为两个方向,每一个方向具有4条光波导。每一个交换芯片左右两侧分别放置2个MT连接器,某一侧其中1个MT连接器的一面与光互联层中的4条光波导严格对准,以便光线能从MT连接器进入光波导中进行传输;另一面与VCSEL激光器阵列的发光面严格对准,保证MT连接器中4条光纤与4个激光器的发光 口一一对准。交换芯片某一侧的另一个MT连接器的一面与光互联层中的另外4条光波导严格对准,以便光信号从光波导进入MT连接器;而MT连接器的另一面和PIN-PD阵列的受光面严格对准,保证8MT连接器中4条光纤与4个PIN-PD探测器的受光口一一对准。
本例的交换芯片采用VSC3321芯片,总共有24个输入输出端口,其中8个用于输入,8个用于输出,剩下的8个可任意配置输入输出端口。交换芯片可配置为12x12交叉连接,也可配置成8x16或16x8交叉复用形式。本实例配置成10x10交叉连接,剩下的4个管脚空闲不用。
本例的光互连背板,如果每路光通道传输的信号速率为25Gbit/s,那么光互连背板的交叉容量为4*2*25Gbit/s=200Gbit/s。
实施例二、一种传输设备,包括实施例一所述的光互连背板,及一个或多个业务板;
所述光互连背板中的所述交换芯片与所述业务板一一对应连接。
可选地,所述光互连背板还包括一个或多个背板插座,一个背板插座供一个所述业务板连接;
每个所述业务板也分别包括背板插座;每个业务板分别通过自己的背板插座和背板上的背板插座配合,安装到所述光互连背板上;
所述交换芯片上用于连接所述业务板的电收发口连接到所述光互连背板上的背板插座,从而与安装到所述光互连背板上的业务板连接。
实施例三、如图9所示,一种基于实施例一的光互连背板的信号调度方法,用于实现业务板之间的交叉调度,包括:
步骤901所述交换芯片将收到的电信号根据预定的交叉配置策略相应发送给所连接的光发射模块,或所述印制电路板的电走线;
步骤902,所述光发射模块将所述电信号调制为光信号后,通过第一波导耦合模块发送到所述光互连层;
步骤903,所述第二波导耦合模块将通过所述光互连层发送来的光信号耦合到所述光接收模块;
步骤904,所述光接收模块将所述光信号转换为电信号后发送给所连接的交换芯片。
其中,预定的交叉配置策略可以是由中央控制单元发送给所述交换芯片的,也可以是预置在交换芯片中的。
可选地,所述交换芯片收到的电信号包括:
通过所述印制电路板的电走线收到的电信号、通过所连接的所述光接收模块收到的电信号。
可选地,所述交换芯片将收到的电信号根据预定的交叉配置策略相应发送给所连接的光发射模块,或所述印制电路板的电走线包括:
所述交换芯片的不同电收发口分别连接所述印制电路板的电走线及光发射模块;
所述交换芯片将收到的电信号根据预定的交叉配置策略发送给相应的电收发口。
下面用三个实施示例分别描述不同场景下的信号调度方法。
实施示例1,场景一:业务板自交叉;
业务板E_i在光互连背板进行自交叉,1≤i≤P的整数,且i为业务板的编号,所述光互连背板的结构和图8所示的例子相同;本实施示例中的信号电路过程包括:
101、业务板E_i通过对外收口接收业务信号,经过自身业务转换后,变成K个高速电信号到背板插座B_i;
102、背板插座B_i将这K个高速电信号通过多层PCB板的电走线传送到交换芯片S_i;
103、中央控制单元控制交换芯片S_i,使其电发口Ti_1、Ti_2、……、Ti_K与其电收口Ri_1、Ri_2、……、Ri_K一一相连;
104、交换芯片S_i电发口Ti_1、Ti_2、……、Ti_K将这K个高速电信 号再通过多层PCB板的电走线传送回背板插座B_i;
105、K个高速电信号被业务板E_i从背板接收,再经过业务转换,从其对外发口将业务发送出去。
当i=1,K=2时,高速电信号的传输路径如图10所示,两条路径分别是从交换芯片S_1的电收口R1_1到电发口T1_1,以及从交换芯片S_1的电收口R1_2到电发口T1_2。
说明:业务板的自交叉不经过光互联背板的光互连层。
实施示例2,场景二:相邻业务板之间交叉调度;
业务板E_i、E_i+1之间,或者业务板E_i、E_i-1之间在光互连背板进行交叉调度,1≤i,i+1,i-1≤P的整数。本实施示例中,定义业务板E_i+1为业务板E_i的下游,业务板E_i-1为业务板E_i的上游。
以业务板E_i的第x路高速电信号调度到其下游业务板E_i+1的第y路为例进行说明,1≤x,y≤K,x可以等于y,亦可不等于y,所述光互连背板的结构和图8所示的例子相同;本实施示例中的信号电路过程包括:
201、业务板E_i通过对外收口接收业务信号,经过自身业务转换后,变成K个高速电信号到背板插座B_i;
202、背板插座B_i将这K个高速电信号通过多层PCB板的电走线传送到交换芯片S_i;
203、中央控制单元控制交换芯片S_i,使其电发口Ti_Ry与其电收口Ri_x相连,即Ti_Ry=Ri_x;
204、交换芯片S_i的Ti_Ry通过多层PCB板的电走线与其右侧光发射模块的激光器驱动电路芯片相连,激光器驱动电路芯片通过调制激光器发光阵列的第y个激光器发光,将业务板E_i下背板的第x路高速电信号调制到光信号上,光信号通过波导耦合模块耦合到被嵌入在PCB板中的光波导中传输;
205、在光波导输出端,光信号通过波导耦合模块耦合到下游的交换芯片S_i+1左侧光电探测器阵列中的第y个光电探测器,光电探测器将光信号 还原为电信号,最后传送到与光电探测器连接的探测器驱动电路芯片上,然后与交换芯片S_i+1的电收口Ri+1_Ly相连;
206、中央控制单元控制交换芯片S_i+1,使其电发口Ti+1_y与其电收口Ri+1_Ly相连,即Ti+1_y=Ri+1_Ly;
207、业务板E_i+1通过背板插座B_i+1接收来自于交换芯片S_i+1电发口Ti+1_y的高速电信号,如此实现高速电信号的交叉调度。
当i=2,K=2,x=2,y=1时,高速电信号的传输路径如图11所示,从交换芯片S_2的电收口R2_2到交换芯片S_3的电收口电发口T3_1。
以业务板E_i的第x路高速电信号调度到其上游业务板E_i-1的第y路为例进行说明,1≤x,y≤K,x可以等于y,亦可不等于y,所述光互连背板的结构和图8所示的例子相同;本实施示例中的信号电路过程包括:
301、业务板E_i通过对外收口接收业务,经过自身业务转换后,变成K个高速电信号到背板插座B_i;
302、背板插座B_i将这K个高速电信号通过多层PCB板的电走线传送到交换芯片S_i;
303、中央控制单元控制交换芯片S_i,使其电发口Ti_Ly与其电收口Ri_x相连,即Ti_Ly=Ri_x;
304、交换芯片S_i的Ti_Ly通过多层PCB板的电走线与其左侧光发射模块的激光器驱动电路芯片相连,激光器驱动电路芯片通过调制激光器发光阵列的第y个激光器发光,将业务板E_i下背板的第x路高速电信号调制到光信号上,光信号通过波导耦合模块耦合到被嵌入在PCB板中的光波导中传输;
305、在光波导输出端,光信号通过波导耦合模块耦合到上游的交换芯片S_i-1右侧光电探测器阵列中的第y个光电探测器,光电探测器将光信号还原为电信号,最后传送到与光电探测器连接的探测器驱动电路芯片上,然后与交换芯片S_i-1的电收口Ri-1_Ry相连;
306、中央控制单元控制交换芯片S_i+1,使其电发口Ti+1_y与其电收口Ri-1_Ry相连,即Ti-1_y=Ri-1_Ry;
307、业务板E_i-1通过背板插座B_i-1接收来自于交换芯片S_i-1电发口Ti-1_y的高速电信号,如此实现高速电信号的交叉调度。
当i=1,K=2,x=2,y=1时,高速电信号的传输路径如图12所示,从交换芯片S_2的电收口R2_2到交换芯片S_1的电收口电发口T1_1。
说明:业务板和其上游或者下游的业务板进行交叉调度,走的是交换芯片不同的电收发口。与下游的交叉调度走的是电收发口Ti_R1/Ri_R1、Ti_R2/Ri_R2、……;与上游的交叉调度走的是电收发口是Ti_L1/Ri_L1、Ti_L2/Ri_L2、……。
实施示例3,场景三:非相邻业务板之间交叉调度
定义背板插座、与其相连的交换芯片、交换芯片左右两侧的光收发模块为一个节点。非相邻业务板之间交叉调度与相邻业务板之间的交叉调度基本一致,只是在经过中间节点的时候,由中央控制单元控制交换芯片中与光收发模块相连的的电收发口之间的交叉调度,而不经过与背板插座相连的收发电口Ti_1/Ri_1、Ti_2/Ri_2、……、Ti_K/Ri_K。以业务板E_i下背部的第x路高速电信号与业务板E_i+2的第y路交叉调度为例进行说明。所述光互连背板的结构和图8所示的例子相同;本实施示例中的信号电路过程包括:
401、业务板E_i通过对外收口接收业务,经过自身业务转换后,变成K个高速电信号到背板插座B_i;
402、背板插座B_i将这K个高速电信号通过多层PCB板的电走线传送到交换芯片S_i;
403、中央控制单元控制交换芯片S_i,使其电发口Ti_Ry与其电收口Ri_x相连,即Ti_Ry=Ri_x;
404、交换芯片S_i的Ti_Ry通过多层PCB板的电走线与其右侧光发射模块的激光器驱动电路芯片相连,激光器驱动电路芯片通过调制激光器发光阵列的第y个激光器发光,将业务板E_i下背板的第x路高速电信号调制到光信号上,光信号通过波导耦合模块耦合到被嵌入在PCB板中的光波导中传输;
405、在光波导输出端,光信号通过波导耦合模块耦合到下游的交换芯片S_i+1左侧光电探测器阵列中的第y个光电探测器,光电探测器将光信号还原为电信号,最后传送到与光电探测器连接的探测器驱动电路芯片上,然后与交换芯片S_i+1的电收口Ri+1_Ly相连;
406、中央控制单元控制交换芯片S_i+1,使其电发口Ti+1_Ry与其电收口Ri+1_Ly相连,即Ti+1_Ry=Ri+1_Ly;
407、交换芯片S_i+1的Ti_Ry与其右侧光发射模块相连,转换成光信号经过波导耦合模块耦合到光波导中传输;
408、光信号被下游交换芯片S_i+2左侧的光接收模块接收并还原成电信号,然后与交换芯片S_i+2的电收口Ri+2_Ly相连;
409、中央控制单元控制交换芯片S_i+2,使其电发口Ti+2_y与其电收口Ri+2_Ly相连,即Ti+2_y=Ri+2_Ly;
410、业务板E_i+2通过背板插座B_i+2接收来自于交换芯片S_i+2电发口Ti+2_y的高速电信号,如此实现高速电信号的交叉调度。
当i=1,K=2,x=2,y=1时,高速电信号的传输路径如图13所示,从交换芯片S_1的电收口R1_2到交换芯片S_3的电收口电发口T3_1。
上述的三个场景为光互连背板的典型交叉调度场景,但不限于上述的场景,用户可根据需求实现灵活调度。需要说明的是,调度的基本单位并不是业务板,而是业务板下背板的每一路高速电信号。
此外,上面三个应用场景中的交叉调度链路并不是唯一的,用户可根据实际情况灵活调度,下背板的每个信号之间不产生冲突即可。
本发明实施例还提供一种计算机可读存储介质,存储有计算机可执行指令,所述计算机可执行指令被处理器执行时实现上述信号调度方法。
虽然本申请所揭露的实施方式如上,但所述的内容仅为便于理解本申请而采用的实施方式,并非用以限定本申请。任何本申请所属领域内的技术人员,在不脱离本申请所揭露的精神和范围的前提下,可以在实施的形式及细节上进行任何的修改与变化,但本申请的专利保护范围,仍须以所附的权利要求书所界定的范围为准。
工业实用性
本发明实施例将光传输和电传输的优势结合在一起,充分利用光传输速率高、损耗小、传输距离长、抗干扰性强等优势,以及电层的灵活调度,将传统传输设备的交叉板和背板合二为一,解决了以往设备交叉容量受限的瓶颈,有效提高了传输设备的交叉容量,以及单信道带宽,且降低了通信设备间互联互通的复杂性,节省了成本。

Claims (15)

  1. 一种光互连背板,包括:印制电路板;
    还包括:
    包含一条或多条光波导的光互连层;
    光发射模块,设置为:将从所述印制电路板接收的电信号调制为光信号;
    光接收模块,设置为:将接收到的光信号转换为电信号并发送给所述印刷电路板;
    第一波导耦合模块,设置为:将所述光发射模块产生的光信号耦合进所述光互连层;
    第二波导耦合模块,设置为:将所述光互连层传输的光信号耦合进所述光接收模块;
    一个或多个交换芯片,设置为:实现任一路输入到任一路输出的交叉配置;
    每个所述交换芯片连接至少一个所述光发射模块及光接收模块。
  2. 如权利要求1所述的光互连背板,其中:
    所述光发射模块包括激光器阵列和激光器驱动电路芯片;所述光接收模块包括光电探测器阵列和探测器驱动电路芯片。
  3. 如权利要求2所述的光互连背板,其中:
    所述激光器阵列中的激光器为垂直腔面发射激光器,所述光电探测器阵列中的光电探测器为PIN光电探测器。
  4. 如权利要求2所述的光互连背板,其中:
    所述激光器阵列中激光器用倒装焊的方式与激光器驱动电路芯片焊在一起,所述光电探测器阵列中光电探测器用倒装焊的方式与探测器驱动电路芯片焊在一起,所述激光器的发光面和光电探测器的受光面朝向所述光互连层。
  5. 如权利要求3所述的光互连背板,其中:
    所述光互连层包括上包层、纤芯层和下包层;所述纤芯层中包含一条或多条光波导,每条光波导平行排列。
  6. 如权利要求5所述的光互连背板,其中:
    所述激光器阵列包含m个激光器;所述光电探测器阵列包括m个光电探测器,所述纤芯层中包含m条光波导,所述第一波导耦合模块和第二波导耦合模块分别包含m个波导耦合器;m为大于或等于1的整数;
    所述第一波导耦合模块中的m个波导耦合器的一端与m个激光器的发光口一一对应,另一端与所述m条光波导的输入端一一对应;
    所述第二波导耦合模块中的m个波导耦合器的一端与所述m个光电探测器的受光口一一对应,另一端与所述m条光波导的输出端一一对应。
  7. 如权利要求1所述的光互连背板,其中:
    所述印制电路板为多层印制电路板,所述光互连层放置在所述多层印制电路板的下面或中间,所述光互连层与所述多层印制电路板胶合在一起;
    所述光发射模块和光接收模块放置在所述多层印制电路板的顶层。
  8. 如权利要求1所述的光互连背板,其中:
    光互连层中的光线和所述光发射模块发出的光线、以及和所述光接收模块接收的光线均成90°角。
  9. 如权利要求1所述的光互连背板,还包括:
    一个或多个背板插座,设置为:提供业务板与所述光互连背板之间的高速电信号接口;
    每个所述背板插座通过所述印制电路板的电走线与所述交换芯片一一对应相连;
    每个所述交换芯片通过对应的所述背板插座与业务板一一对应相连。
  10. 如权利要求1到9中任一项所述的光互连背板,其中:
    所述光发射模块、光接收模块、第一波导耦合模块、第二波导耦合模块均为(P-1)×2个,所述光发射模块与所述第一波导耦合模块一一对应连接,所述光接收模块与所述第二波导耦合模块一一对应连接;所述交换芯片为P 个,与业务板一一对应连接;P为业务板的个数;
    每个所述交换芯片依次连接;第一个和最后一个交换芯片均连接一个所述光发射模块,一个所述光接收模块;其它交换芯片均连接用于第一方向传输的一个所述光发射模块和一个所述光接收模块,以及用于第二方向传输的一个所述光发射模块和一个所述光接收模块;
    第一个交换芯片通过所连接的光发射模块与下一个交换芯片所连接的用于第一方向传输的光接收模块相连;通过所连接的光接收模块与下一个交换芯片所连接的用于第二方向传输的光发射模块相连;
    最后一个交换芯片通过所连接的光接收模块与前一个交换芯片所连接的用于第一方向传输的光发射模块相连;通过所连接的光发射模块与前一个交换芯片所连接的用于第二方向传输的光接收模块相连;
    其它两个相邻的所述交换芯片之间,一个交换芯片通过所连接的用于第一方向传输的所述光发射模块与另一个所述交换芯片所连接的用于第一方向传输的所述光接收模块相连,通过所连接的用于第二方向传输的所述光接收模块与另一个所述交换芯片所连接的用于第二方向传输的所述光发射模块相连;
    其中,光发射模块和光接收模块相连是指光发射模块通过对应连接的第一波导耦合模块及所述光互连层连接到光接收模块对应连接的第二波导耦合模块。
  11. 如权利要求10所述的光互连背板,其中:
    P为偶数时,每个所述交换芯片有(P+1)*K对电收发口,包括:
    K对用于连接所述背板插座的电收发口,P*K个用于连接所述光发射模块的电收发口,P*K个用于连接所述光接收模块的电收发口;
    一个所述光发射模块中包括P*K/2个激光器;
    一个所述光接收模块中包括P*K/2个光电探测器;
    P为奇数时,每个所述交换芯片有K*P对电发收口,包括:
    K对用于连接所述背板插座的电收发口,(P-1)*K个用于连接所述光发射模块的电收发口,(P-1)*K个用于连接所述光接收模块的电收发口;
    一个所述光发射模块中包括(P-1)*K/2个激光器;
    一个所述光接收模块中包括(P-1)*K/2个光电探测器。
  12. 如权利要求11所述的光互连背板,其中:
    所述交换芯片还设置为:通过印制电路板的电走线与中央控制单元进行通信,实现不同电收发口之间的交叉调度。
  13. 一种传输设备,包括:一个或多个业务板;还包括:
    如权利要求1~12中任一项所述的光互连背板;
    所述光互连背板中的所述交换芯片与所述业务板一一对应相连。
  14. 一种信号调度方法,基于权利要求1~12中任一项所述的光互连背板实现,包括:
    所述交换芯片将收到的电信号根据预定的交叉配置策略相应发送给所连接的光发射模块,或所述印制电路板的电走线;
    所述光发射模块将所述电信号调制为光信号后,通过第一波导耦合模块发送到所述光互连层;
    所述第二波导耦合模块将通过所述光互连层发送来的光信号耦合到所述光接收模块;
    所述光接收模块将所述光信号转换为电信号后发送给所连接的交换芯片。
  15. 如权利要求14所述的信号调度方法,其中,所述交换芯片收到的电信号包括:
    通过所述印制电路板的电走线收到的电信号、通过所连接的所述光接收模块收到的电信号。
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