WO2023272450A1

WO2023272450A1 - Chip packaging structure, camera module, and electronic device

Info

Publication number: WO2023272450A1
Application number: PCT/CN2021/102831
Authority: WO
Inventors: 刘燕妮
Original assignee: 欧菲光集团股份有限公司; 江西晶浩光学有限公司
Priority date: 2021-06-28
Filing date: 2021-06-28
Publication date: 2023-01-05

Abstract

A chip packaging structure, a camera module, and an electronic device, the chip packaging structure comprising a chip (10), a substrate (20), a plurality of gold fingers (30), and a first gold wire (41), the chip (10) being mounted on the substrate (20), the plurality of gold fingers (30) being spaced apart on the substrate (20) and positioned on at least one side of the chip (10), the first gold wire (41) comprising a first connecting part (411) and a second connecting part (412) facing away from one another and a middle part (413) positioned between the first connecting part (411) and the second connecting part (412), the first connecting part (411) being connected to a gold finger (30), the second connecting part (412) being connected to another gold finger (30), and the middle part (413) being arched in the direction away from the substrate (20). By means of employing the wiring method of connecting two different gold fingers (30) with a gold wire, when connecting lines need to be arranged in a crossed manner, the first gold wire (41) can cross over a lead wire disposed on the surface of the substrate (20) without the need to drill holes, saving wiring space and helping to reduce the size of the circuit board; in addition, by means of reducing the number of drilling holes, the thickness of the circuit board can be reduced, realising miniaturisation and thinning of the module.

Description

Chip packaging structure, camera module and electronic equipment

technical field

The present application belongs to the technical field of chip packaging, and in particular relates to a chip packaging structure, a camera module and electronic equipment.

Background technique

With the continuous improvement of people's living standards and more abundant spare time, photography has gradually become a common means for people to record travel and various daily life. Therefore, electronic devices with shooting functions (such as mobile phones, tablet computers and cameras, etc.) The more it is applied to people's daily life and work. Electronic devices with shooting functions are gradually developing toward miniaturization. Therefore, how to further reduce the size of camera modules has become a key point of fierce competition among major manufacturers.

The current camera module includes a circuit board, the surface of the circuit board is provided with a sensor chip, and then functional components such as capacitors and resistors need to be arranged around the sensor chip, and the lead connection between each component is likely to cause too much wiring on the surface of the circuit board The space makes the horizontal area of the camera module larger, which in turn makes the overall occupied volume of the camera module larger

Contents of the invention

The purpose of this application is to provide a chip packaging structure, camera module and electronic equipment, which can reduce the wiring space on the surface of the circuit board, thereby reducing the size of the circuit board, and is conducive to the miniaturization of the module.

For realizing the purpose of the application, the application provides the following technical solutions:

In the first aspect, the present application provides a chip packaging structure, including a chip, a substrate, a plurality of gold fingers and first gold wires, the chip is mounted on the substrate, and a plurality of the gold fingers are arranged at intervals on the On the substrate, and located on at least one side of the chip, the first gold wire includes a first connection part and a second connection part opposite to each other, and is located between the first connection part and the second connection part The first connecting portion is connected to one of the golden fingers, the second connecting portion is connected to the other golden finger, and the middle portion arches away from the substrate.

By using the wiring method of connecting two different gold fingers with gold wires, when the connecting wires need to be crossed, the use of the first gold wire can cross the lead wires arranged on the surface of the substrate without drilling holes, which saves wiring space and is beneficial Reducing the size of the circuit board and reducing the number of drilling holes is conducive to reducing the thickness of the circuit board and realizing the miniaturization and thinning of the module.

In one embodiment, the chip packaging structure further includes a patch component and leads, the patch component is arranged on the substrate and is located on at least one side of the golden finger away from the chip, and the leads are arranged On the surface of the substrate, the patch component is connected to at least one of the gold fingers through the lead. By arranging chip components and lead wires on the side of the chip, the peripheral circuit can be connected to the chip component through the lead wires, thereby achieving the purpose of signal transmission between the circuit board and the peripheral circuit.

In one embodiment, the multiple gold fingers include a first gold finger, a second gold finger and a third gold finger arranged in sequence along a straight line, and the first gold finger and the third gold finger pass through The first gold wire is connected, the second gold finger is connected to the patch component through the lead wire, and the middle part straddles the second gold finger in the linear direction. By using the first gold wire to connect the first gold finger and the third gold finger, it is beneficial to reduce the length of the connection line between the first gold finger and the third gold finger, thereby reducing the size of the first gold finger or the third gold finger. The dangerous angle of the connection line between the chip and the chip, thereby reducing the difficulty of wiring, that is, the risk of abnormal wiring. In addition, since the connection line between the first gold finger and the third gold finger intersects with the connection line between the second gold finger and the patch component, the use of the first gold wire connection does not require drilling, which simplifies the packaging of the chip process, saving wiring space.

In one embodiment, the gold finger includes a first gold finger, a second gold finger, a third gold finger, and a fourth gold finger, and the first gold finger, the second gold finger, and the third gold finger The fingers are arranged sequentially along a straight line, the fourth gold finger is arranged between the second gold finger and the patch component, the leads include a first lead and a second lead, and the first gold finger connected to the third gold finger through the first wire, the first gold wire straddles the first wire to connect the second gold finger to the fourth gold finger, and the fourth gold finger It is connected with the patch element through the second lead wire. By adding a fourth gold finger between the second gold finger and the SMD component, and connecting the second gold finger and the fourth gold finger through the first gold wire, the fourth gold finger and the SMD component are connected through a wire, which saves The wiring space and the number of drill holes are reduced without affecting the connection between the SMD component and the second golden finger.

In one embodiment, the first lead includes a first end, a transition portion, and a second end connected in sequence, the first end is connected to the first golden finger, and the second end is connected to the The third gold finger is connected, the transition part is located between the second gold finger and the fourth gold finger, and the transition part and the second gold finger and the fourth gold finger have separation distance. By connecting the first end of the first lead to the first gold finger, and the second end to the third gold finger respectively, the signal can be transmitted between the first gold finger and the third gold finger through the first lead. purpose, and the transition part is spaced apart from the second gold finger and the fourth gold finger, so as to avoid the problem of circuit short circuit.

In one embodiment, the gold finger includes a first gold finger, a second gold finger, a third gold finger, and a fourth gold finger, and the first gold finger, the second gold finger, and the third gold finger The fingers are arranged in sequence along a straight line, the fourth gold finger is arranged between the second gold finger and the patch component, the chip packaging structure also includes a second gold wire, and the first gold finger is connected to the third gold finger through the first gold wire, the second gold finger is connected to the fourth gold finger through the second gold wire, and the first gold wire is connected to the second gold finger The gold wires are arranged at intervals, and the fourth gold finger is connected to the patch component through the wires. The first gold finger and the third gold finger are connected by the first gold wire, the second gold finger and the fourth gold finger are connected by the second gold wire, and the first gold wire and the second gold wire are spaced apart Setting can not only avoid crossing wires, save wiring space and the number of drilling holes, but also help improve the quality of signal transmission because gold wires have better conductive characteristics than lead wires.

In one embodiment, the multiple gold fingers include grounding gold fingers and multiple signal transmission gold fingers, the multiple signal transmission gold fingers are arranged at intervals in a straight line, and the grounding gold fingers are located in multiple The signal transmission golden finger is close to the side of the chip. The signal transmission and grounding functions of the circuit are realized by respectively setting signal transmission gold fingers and grounding gold fingers on the substrate, and since the signal transmission gold fingers are spaced apart from each other, and the grounding gold fingers are connected to each other to form an integrated body, the grounding gold fingers It is arranged on the side close to the chip, which is beneficial to the wiring of the circuit board and makes the circuit wiring more neat and orderly.

In one embodiment, the chip includes a ground pin and a plurality of data signal pins, the chip package structure further includes a third gold wire and a fourth gold wire, and the plurality of data signal pins and the plurality of The signal transmission gold finger is connected through the third gold wire, and the ground pin is connected with the ground gold finger through a fourth gold wire. By using the third gold wire to connect the signal data pin and the number-limited transmission gold finger, and using the fourth gold wire to connect the ground pin to the ground gold finger, there is no need to consider whether the connecting wires cross or whether drilling is required when wiring, which is beneficial The wiring structure is simplified, the wiring space of the circuit board is saved, and the use of gold wire is conducive to improving the quality of high-speed signal transmission.

In a second aspect, the present application further provides a camera module, including a lens and the chip packaging structure described in any one of the above implementation manners, the lens is mounted on a side of the chip away from the substrate. By adopting the chip packaging structure provided by the present application in the camera module, it is beneficial to reduce the size of the circuit board, further reduce the volume of the camera module, and realize the miniaturization of the camera module.

In a third aspect, the present application further provides an electronic device, including a casing and the camera module according to the implementation manner of the second aspect, where the camera module is arranged in the casing. By adding the camera module provided in the embodiments of the present application to the electronic equipment, it is beneficial to realize the miniaturization of the electronic equipment.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some implementations of the present application. For those skilled in the art, other drawings can also be obtained according to these drawings without creative work.

FIG. 1 is a schematic diagram of a chip package structure of an embodiment of the present application;

Fig. 2 is a schematic diagram of an enlarged structure of part A of Fig. 1;

FIG. 3 is a schematic diagram of a chip package structure according to another embodiment of the present application;

Fig. 4 is a schematic diagram of an enlarged structure of part B in Fig. 3;

FIG. 5 is a cross-sectional view of a chip package structure according to an embodiment of the present application;

Fig. 6 is a schematic diagram of an enlarged structure of part C in Fig. 5;

FIG. 7 is a schematic diagram of a chip package structure according to another embodiment of the present application;

FIG. 8 is an enlarged structural schematic diagram of part D in FIG. 7 .

detailed description

The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the accompanying drawings in the embodiments of the application. Apparently, the described embodiments are only part of the embodiments of the application, not all of them. Based on the implementation manners in this application, all other implementation manners obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

Please refer to Fig. 1 and Fig. 2, the present application provides a kind of chip packaging structure, comprises chip 10, substrate 20, a plurality of gold fingers 30 and first gold wire 41, and chip 10 is installed on the substrate 20, and a plurality of gold fingers 30 intervals Arranged on the substrate 20 and located on at least one side of the chip 10, the first gold wire 41 includes a first connecting portion 411 and a second connecting portion 412 opposite to each other, and is located between the first connecting portion 411 and the second connecting portion 412. The first connecting portion 411 is connected to a gold finger, the second connecting portion 412 is connected to another gold finger, and the middle portion 413 arches away from the substrate 20 .

Specifically, the embodiment of the present application is applicable to various chips 10. The chip 10 is also called an integrated circuit (Integrated circuit, IC) or a microcircuit (Microcircuit). , photolithography, etching and other steps to prepare multiple semiconductor device integrated circuit structures on the silicon wafer, including but not limited to sensor chips, power chips, signal processing chips, logic control chips, memory chips, etc. The substrate 20 can be a PCB (Printed Circuit Board, printed circuit board) or a flexible printed circuit board (referred to as a flexible circuit board or FPC), and a circuit can be formed by mounting electrical components on its surface. The chip 10 is generally fixed on the substrate 20 by gluing, and may also be fixed on the substrate 20 by welding, plastic sealing, embedding and the like. The gold finger 30 is a conductive contact piece formed by plating a layer of gold on the substrate 20 and etching. As shown in FIG. 2 , the gold finger 30 includes a first gold finger 31 , a second gold finger 32 and a third gold finger 33 sequentially arranged along a straight line. The first connecting portion 411 of the first gold wire 41 is connected to the first The gold finger 31 is connected to fix the first connecting portion 411 of the first gold wire 41, the second connecting portion 412 is connected to another third gold finger 33 arranged at intervals to fix the second connecting portion 412, and the middle portion 413 is connected to the first The connection part 411 and the second connection part 412 are used to realize the electrical connection between the first gold finger 31 and the third gold finger 33, and the middle part 413 is arched toward the direction of the principle substrate 20 and spaced from the substrate 20, avoiding the first gold finger The wire 41 is in contact with the circuit on the surface of the substrate 20 causing a short circuit problem.

It can be understood that in the embodiment of the present application, there is one gold finger 30 between the two gold fingers 30 connected by the first gold wire 41 , and in other embodiments, the gap between the two gold fingers 30 connected by the first gold wire 41 The interval distance can be set freely according to need.

By using the first gold wire 41 to connect two different gold fingers 30, when the connecting wires need to be arranged crosswise, the first gold wire 41 can cross the connecting wires arranged on the surface of the substrate 20 without drilling, The wiring space is saved, which is conducive to reducing the size of the circuit board. At the same time, by reducing the number of drilling holes, it is beneficial to thin the thickness of the circuit board and realize the miniaturization and thinning of the module.

In one embodiment, please refer to FIG. 1 , the chip packaging structure further includes a chip component 50 and a lead 60, the chip component 50 is arranged on the substrate 20, and is located on at least one side of the golden finger 30 away from the chip 10, and the lead 60 is arranged On the surface of the substrate 20 , the chip component 50 is connected to at least one gold finger 30 through a wire 60 . Specifically, a plurality of chip components 50 are usually provided around the chip 10 for connecting with peripheral circuits, wherein the peripheral circuits usually include digital signal processor (digital signal processor, DSP) chips and memory chips, etc., the chip 10 Usually arranged in the middle area of the substrate 20, the patch element 50 is usually a circular or square metal copper block, and the lead wire 60 is a metal conductive layer arranged on the surface of the substrate 20, which is made of a material with better conductivity, such as a silver wire , copper wire, etc., the signal sent by the peripheral circuit can be transmitted to the chip 10 through the SMD component 50 and the lead 60, and the signal sent by the chip 10 can be transmitted to the peripheral circuit through the lead 60 and the SMD component 50. By arranging the chip component 50 and the lead 60 on the side of the substrate 20, the peripheral circuit can be connected with the chip component 50 through the lead 60, and the purpose of signal transmission between the circuit board and the peripheral circuit can be achieved.

In one embodiment, please refer to FIG. 1 and FIG. 2 , the first gold finger 31 and the third gold finger 33 are connected by the first gold wire 41, the second gold finger 32 is connected to the chip component 50 by the wire 60, and the middle part 413 straddles the second gold finger 32 in the direction in which the first gold finger 31 , the second gold finger 32 and the third gold finger 33 are arranged. In PCB circuit design, some pins of the chip 10 need to be connected. The chip 10 includes multiple pins. By connecting any two pins of the chip 10 to the first gold finger 31 and the third gold finger 33 respectively, The electrical connection of the two pins can be realized by leading out the signal of the internal circuit of the chip 10 , and then connecting the first gold finger 31 and the third gold finger 33 . In addition, the chip 10 needs to perform signal transmission with peripheral circuits or other components such as resistors and capacitors. By connecting the pins of the chip 10 to the second gold finger 32, and then connecting the second gold finger 32 to the chip component through the wire 60 50 for connection, when the peripheral circuit or other components are connected to the chip component 50, the signal transmission between the chip 10 and the peripheral circuit or the resistance and capacitance components can be realized. In this embodiment, the connection line between the first gold finger 31 and the third gold finger 33 and the connection line between the second gold finger 32 and the patch component 50 are perpendicular to each other, by making the first gold finger 31 and the third gold finger The gold finger 33 is connected with the first gold wire 41, the second gold finger 32 is connected with the SMD component 50 with the lead wire 60, the lead wire 60 is attached to the surface of the substrate 20, and the first gold wire 41 spans over the lead wire 60, so there is no need to open holes, and avoid cross-short circuit between different connecting lines. By using the first gold wire 41 to connect the first gold finger 31 and the third gold finger 33, it is beneficial to reduce the length of the connection line between the first gold finger 31 and the third gold finger 33, thereby reducing the size of the first gold finger. 31 or the dangerous angle of the connecting wire between the third golden finger 33 and the chip 10, thereby reducing the difficulty of wire bonding, that is, the risk of abnormal wire bonding. In addition, since the connection line between the first gold finger 31 and the third gold finger 33 crosses the connection line between the second gold finger 32 and the patch component 50, the first gold wire 41 does not need to be drilled for connection. The packaging process of the chip 10 is simplified, and the wiring space is saved.

In one embodiment, please refer to FIG. 3 , FIG. 4 and FIG. 6 , the gold finger 30 includes a first gold finger 31 , a second gold finger 32 , a third gold finger 33 and a fourth gold finger 34 , the first gold finger 31 , the second gold finger 32 and the third gold finger 33 are arranged sequentially along a straight line, the fourth gold finger 34 is arranged between the second gold finger 32 and the patch component 50, and the leads 60 include first leads 61 and second Lead 62, the first gold finger 31 and the third gold finger 33 are connected through the first lead 61, the second gold finger 32 and the fourth gold finger 34 are connected through the first gold wire 41, and the first gold wire 41 crosses the second A lead wire 61 , the fourth golden finger 34 is connected to the patch component 50 through a second lead wire 62 . Specifically, the first gold finger 31, the second gold finger 32 and the third gold finger 33 are arranged side by side, and the first gold finger 31 and the third gold finger 33 are respectively connected to the first end and the second end of the first lead 61, if To connect the second gold finger 32 to the patch component 50, the connection line crosses the first lead wire 61 between the first gold finger 31 and the third gold finger 33, so it can pass between the second gold finger 32 and the third gold finger 33. The patch components 50 are provided with first gold wires 41 for connection, wherein the first connection portion 411 of the first gold wire 41 is provided with a first solder ball, the second connection portion 412 is provided with a second solder ball, and the first solder ball is provided with a first solder ball. The ball is connected to the second gold finger 32 to fix the first connection part 411 of the first gold wire 41, the second solder ball is connected to the fourth gold finger 34 to fix the second connection part 412, and the middle part 413 is connected to the first connection part 411. part 411 and the second connecting part 412 to realize the electrical connection between the second gold finger 32 and the fourth gold finger 34, the middle part 413 is arched toward the direction of the principle substrate 20 and spaced from the substrate 20, avoiding the first gold wire 41 is in contact with the first lead wire 61 to cause a short circuit, by rationally designing the volumes of the first solder ball and the second solder ball, the durability of the first gold wire 41 can be improved. By reasonably designing the length of the middle part 413 , problems such as excessive stress caused by too short first gold wire 41 or cost waste caused by too long first gold wire 41 can be avoided. In addition, by making the first gold wire 41 straddle the first lead wire 61, it is possible to avoid drilling while avoiding the crossing of connecting wires. Compared with the method of connecting all wires 60, the first gold wire 41 is located above the substrate 20 In the space, there is no need to reserve wiring space on the surface of the substrate 20 . Since the first gold wire 41 cannot be directly connected to the patch element 50, the fourth gold finger 34 is arranged between the second gold finger 32 and the patch element 50 as a transition structure, and the first gold wire 41 is first used to connect the second gold finger 32 to the patch element 50. The second gold finger 32 is connected to the fourth gold finger 34 , and the second lead 62 is used to connect the fourth gold finger 34 to the SMD component 50 , so as to finally achieve the purpose of electrically connecting the second gold finger 32 to the SMD component 50 . By adding a fourth gold finger 34 between the second gold finger 32 and the patch component 50, and connecting the second gold finger 32 and the fourth gold finger 34 through the first gold wire 41, the fourth gold finger 34 and the patch The components 50 are connected through the second lead 62 , which not only saves the wiring space and the number of drilling holes, but also does not affect the communication between the patch component 50 and the second golden finger 32 .

In one embodiment, please refer to FIG. 3 and FIG. 4 , the first lead 61 includes a first end portion 611 , a transition portion 613 and a second end portion 612 connected in sequence, and the first end portion 611 is connected to the first golden finger 31 , the second end portion 612 is connected to the third gold finger 33, the transition portion 613 is located between the second gold finger 32 and the fourth gold finger 34, and the transition portion 613 is connected to the second gold finger 32 and the fourth gold finger 34. has a separation distance. The first lead 61 is a conductive metal layer attached to the substrate 20. For example, copper foil is plated on the substrate 20, and then the first lead 61 extending according to a prescribed path can be formed after etching. When the first end of the first lead 61 part 611 is connected to the first gold finger, and when the second end 612 is connected to the third gold finger 33, the signal output by the first gold finger 31 can be transmitted from the first end 611 to the second end 612 through the transition part 613, and transmitted to the circuit connected to the third gold finger 33. On the contrary, the signal output from the third gold finger 33 is transmitted to the first gold finger 31 through the first lead wire 61 . By connecting the first end 611 of the first lead wire 61 to the first gold finger 31 and the second end 612 to the third gold finger 33, it is possible to pass between the first gold finger 31 and the third gold finger 33. The purpose of the first lead wire 61 is to transmit signals, and the transition portion 613 is spaced apart from the second gold finger 32 and the fourth gold finger 34 to avoid the problem of circuit short circuit.

In one embodiment, please refer to FIG. 7 and FIG. 8 , the gold finger 30 includes a first gold finger 31 , a second gold finger 32 , a third gold finger 33 and a fourth gold finger 34 , the first gold finger 31 , the second gold finger The second gold finger 32 and the third gold finger 33 are arranged sequentially along a straight line, the fourth gold finger 34 is arranged between the second gold finger 32 and the chip component 50, the chip package structure also includes a second gold wire 42, the second gold finger 42 One gold finger 31 and the third gold finger 33 are connected by the first gold wire 41, the second gold finger 32 and the fourth gold finger 34 are connected by the second gold wire 42, and the first gold wire 41 and the second gold wire 42 are separated It is provided that the fourth golden finger 34 is connected to the patch component 50 through the wire 60 . Specifically, since the second gold finger 32 is arranged between the first gold finger 31 and the third gold finger 33, the connection using the first gold wire 41 can directly cross the second gold finger 32 and complete the connection from above the substrate 20 without the need for A space is reserved on the substrate 20 . Using the second gold wire 42 to connect the second gold finger 32 and the fourth gold finger 34 does not need to reserve a wiring space on the surface of the substrate 20 , thereby saving wiring space. It should be noted that the height of any point on the first gold wire 41 and any point on the second gold wire 42 cannot be the same, so that the first gold wire 41 and the second gold wire 42 are spaced apart to avoid the first The gold wire 41 and the second gold wire 42 are contacted and shorted. By connecting the first gold finger 31 and the third gold finger 33 with the first gold wire 41, connecting the second gold finger 32 and the fourth gold finger 34 with the second gold wire 42, and making the first gold wire 41 and the second gold wire 42 are arranged at intervals, which can not only avoid wire crossing, save wiring space and the number of drilling holes, but also help improve the quality of signal transmission because gold wires have better electrical conductivity than other lead wires.

In one embodiment, please refer to FIG. 1, a plurality of golden fingers 30 include a grounding golden finger 36 and a plurality of signal transmission golden fingers 35, the plurality of signal transmission golden fingers 35 are arranged at intervals in a straight line direction, and the grounding golden finger 36 Located on the side of the multiple signal transmission golden fingers 35 close to the chip 10 . Specifically, the multiple signal transmission gold fingers 35 are insulated from each other, and each signal transmission gold finger 35 can be connected to multiple pins of the chip 10 , or can be connected to one pin correspondingly. The grounding gold finger 36 is connected to multiple pins of the chip 10 at the same time so that the multiple pins connected to the threshold are all connected to the ground terminal, and the extension direction of the grounding gold finger 36 is parallel to the arrangement direction of the multiple signal transmission gold fingers 35, And it is arranged on a side close to the chip 10 to facilitate wiring. The grounding gold finger 36 is provided with a protruding portion 361, and the protruding portion 361 extends toward the side where the multiple signal transmission gold fingers 35 are located, and is arranged in parallel with the multiple signal transmission gold fingers 35 so as to be on the edge of the substrate 20, so as to facilitate grounding The golden finger 36 is connected with the peripheral circuit to lead out the ground signal. By setting the signal transmission gold finger 35 and the grounding gold finger 36 on the substrate 20 respectively, the signal transmission and grounding functions of the circuit are realized, and the grounding gold finger 36 is arranged on the side close to the chip 10, which is beneficial to the wiring of the circuit board. Make the circuit routing more neat and orderly.

In one embodiment, please refer to FIG. 1 and FIG. 5 , the chip 10 includes a plurality of data signal pins 11, the chip package structure further includes a third gold wire 43, the plurality of data signal pins 11 and a plurality of signal transmission gold fingers 35 are connected by a third gold wire 43. Specifically, a plurality of circuits are integrated inside the chip 10, such as control circuits, clock circuits, etc., and the input and output signals of each circuit are connected to the signal transmission gold finger 35 through the data signal pin 11. When the peripheral circuit or other functional elements 80 and the signal When the transmission golden fingers 35 are correspondingly connected, the signal transmission function between the internal circuit of the chip 10 and the peripheral circuit is realized. When the chip 10 is used as a receiving chip, the data signal sent by the peripheral circuit is transmitted to the data signal pin 11 through the chip component 50, the lead wire 60, the signal transmission gold finger 35 and the third gold wire 43 in sequence, and enters the internal circuit of the chip 10 ; When the chip 10 is used as a transmitting chip, the output signal of the internal circuit of the chip 10 is transmitted to the peripheral circuit through the third gold wire 43, the signal transmission gold finger 35, the lead wire 60 and the chip component 50 in sequence. In addition, the third gold wire 43 is used to connect the data signal pin 11 and the signal transmission gold finger 35. Since the gold wire has better electrical performance, it can improve the accuracy of signal transmission and avoid signal distortion. By using the third gold wire 43 to connect the data signal pin 11 and the signal transmission gold finger 35, there is no need to consider whether the connecting wires cross or whether holes need to be drilled when wiring, which is conducive to simplifying the wiring structure of the circuit board and saving wiring space. The wire is conducive to improving the quality of high-speed signal transmission.

In one embodiment, please refer to FIG. 1 , the chip 10 further includes a ground pin 12 , the chip package structure further includes a fourth gold wire 44 , and the ground pin 12 is connected to the ground gold finger 36 through the fourth gold wire 44 . Wherein, there are multiple ground pins 12 , and for convenience of wiring, multiple ground pins 12 may be connected to the same ground gold finger 36 . The fourth gold wire 44 is used to connect the ground pin to the gold finger to realize the ground function of the chip pin, which makes the wiring structure of the circuit board simple and facilitates high-speed signal transmission.

Referring to FIG. 5 , the present application also provides a camera module, including a lens 91 installed on the chip 10 and the chip package structure as in any of the above embodiments, and the lens 91 is installed on the side of the chip 10 away from the substrate 20 . Specifically, the camera module further includes a lens holder 92 and a filter 93 , the substrate 20 is fixed on the holder 92 and the chip 10 is arranged inside the holder 92 , and the lens 91 is arranged on the side of the holder 92 facing away from the chip 10 . The lens 91 is arranged on the side of the camera module close to the incident direction of the light, and is used to reflect and refract the light to form a satisfactory image. The lens 91 usually includes at least one lens, a diaphragm, and the like. The chip 10 is usually a silicon-based chip made by integrated circuit manufacturing technology. In this embodiment, the chip 10 uses a CCD (Charge Coupled Device, Charge Coupled Device), and the CCD is a high-end technical component used in photography and imaging. In other embodiments, the chip 10 can also be a CMOS (Complementary Metal-Oxide Semiconductor, Metal Oxide Semiconductor device), so as to be used in products with lower image quality. The bracket 92 is a groove structure with an opening at one end, and its opening is connected with the substrate 20 so that the chip 10 is accommodated inside the groove, thereby being separated from the external environment and preventing other signals from interfering with the chip 10 . One end of the bracket 92 facing away from the substrate 20 is connected to the lens 91 to fix the lens 91 on the light-incident side of the camera module. By adopting the chip packaging structure provided by the present application in the camera module, it is beneficial to reduce the size of the circuit board, further reduce the volume of the camera module, and realize the miniaturization of the camera module.

In addition, the camera module also includes a filter 93, the bracket 92 is provided with a light hole 921, the filter 93 is arranged on the side of the bracket 92 facing away from the chip 10, and the filter 93 is facing the light hole 921, wherein , the filter 93 can select the light of the required radiation band according to the needs, and currently adopts more such as an infrared cut filter (Infrared Cut Filter, IRCF), and the infrared cut filter can be a blue glass infrared cut filter or The infrared cut-off film is mounted directly on the glass surface. The optical filter 93 includes a central area and an edge area, the central area is facing the light hole 921, so that the light incident from the lens 91 is filtered by the optical filter 93 and then reaches the chip 10, and the edge area is connected with the support 92, so that The filter 93 is fixed on the bracket 92 . By arranging the optical filter 93 in the camera module, and the optical filter 93 is arranged facing the light hole 921, it is beneficial to eliminate the influence of infrared light on the chip 10 in the light incident from the lens 91, so as to improve the imaging effect. An embodiment of the present application provides a camera module, the camera module includes a lens barrel, an electronic photosensitive element and the optical system provided in the embodiment of the present application, the first lens to the eighth lens are all installed in the lens barrel, and the electronic photosensitive element It is arranged on the image side of the optical system, and is used to convert the light from the rectangular prism to the eighth lens incident on the electronic photosensitive element into an electrical signal of the image. The electronic photosensitive element can be a complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) or a charge-coupled device (Charge-coupled Device, CCD). The camera module can be an independent lens of a digital camera, or an imaging module integrated in electronic devices such as smart phones. The present application installs the rectangular prism to the eighth lens of the optical system in the camera module, and rationally configures the surface shape and refractive power of each lens from the first lens to the eighth lens, so that the camera module can simultaneously satisfy a wide range of zooming and miniaturization requirements.

The present application also provides an electronic device, which includes a casing and the camera module according to any one of the above embodiments, and the camera module is arranged in the casing. The electronic device can be a smartphone, personal digital assistant (PDA), tablet computer, smart watch, drone, e-book reader, dash cam, wearable device, etc. By adding the camera module provided in the embodiments of the present application to the electronic equipment, it is beneficial to realize the miniaturization of the electronic equipment.

What is disclosed above is only a preferred implementation mode of the application, and of course it cannot limit the scope of rights of the application. Those of ordinary skill in the art can understand all or part of the process of implementing the above implementation mode, and according to the rights of the application The equivalent changes required are still within the scope of the application.

Claims

A chip packaging structure, characterized in that it includes a chip, a substrate, a plurality of gold fingers and a first gold wire, the chip is mounted on the substrate, the plurality of gold fingers are arranged on the substrate at intervals, and Located on at least one side of the chip, the first gold wire includes a first connection part and a second connection part opposite to each other, and an intermediate part between the first connection part and the second connection part, The first connecting portion is connected to one of the golden fingers, the second connecting portion is connected to the other golden finger, and the middle portion is arched away from the substrate.
The chip packaging structure according to claim 1, characterized in that, the chip packaging structure further comprises a chip component and leads, and the chip component is arranged on the substrate and is located at the gold finger away from the chip On one side of the substrate, the leads are arranged on the surface of the substrate, and the patch component is connected to at least one of the gold fingers through the leads.
The chip packaging structure according to claim 2, wherein the plurality of gold fingers include a first gold finger, a second gold finger and a third gold finger sequentially arranged along a straight line, and the first gold finger The finger is connected to the third gold finger through the first gold wire, the second gold finger is connected to the patch element through the lead wire, and the middle part straddles the second gold finger in the straight line direction. Goldfinger.
The chip packaging structure according to claim 2, wherein the gold fingers include a first gold finger, a second gold finger, a third gold finger and a fourth gold finger, and the first gold finger, the second gold finger The second gold finger and the third gold finger are arranged in sequence along a straight line, the fourth gold finger is arranged between the second gold finger and the patch component, and the leads include a first lead and a second lead. Two leads, the first gold finger and the third gold finger are connected through the first lead, and the first gold wire crosses the first lead to connect the second gold finger and the fourth gold The fingers are connected, and the fourth gold finger is connected to the patch component through the second lead.
The chip package structure according to claim 4, wherein the first lead includes a first end, a transition portion and a second end connected in sequence, and the first end is connected to the first gold finger connected, the second end is connected to the third gold finger, the transition part is located between the second gold finger and the fourth gold finger, and the transition part is connected to the second gold finger There is a separation distance from the fourth gold finger.
The chip packaging structure according to claim 2, wherein the gold fingers include a first gold finger, a second gold finger, a third gold finger and a fourth gold finger, and the first gold finger, the second gold finger The second gold finger and the third gold finger are sequentially arranged along a straight line, the fourth gold finger is arranged between the second gold finger and the patch component, and the chip packaging structure further includes a second A gold wire, the first gold finger and the third gold finger are connected through the first gold wire, the second gold finger and the fourth gold finger are connected through the second gold wire, and the The first gold wire is spaced apart from the second gold wire, and the fourth gold finger is connected to the patch element through the wire.
The chip packaging structure according to claim 1, wherein the plurality of golden fingers include grounding golden fingers and a plurality of signal transmission golden fingers, and the plurality of signal transmission golden fingers are arranged at intervals in a straight line direction, The grounding golden finger is located on a side of the plurality of signal transmission golden fingers close to the chip.
The chip packaging structure according to claim 7, wherein the chip includes a ground pin and a plurality of data signal pins, the chip packaging structure further includes a third gold wire and a fourth gold wire, and the plurality of The data signal pin is connected to the plurality of signal transmission gold fingers through the third gold wire, and the ground pin is connected to the ground gold finger through the fourth gold wire.
A camera module, characterized in that it comprises a lens and the chip packaging structure according to any one of claims 1 to 8, the lens is installed on the side of the chip away from the substrate.
An electronic device, characterized by comprising a housing and the camera module according to claim 9, the camera module being arranged in the housing.