CN210092062U - Chip module and electronic equipment - Google Patents
Chip module and electronic equipment Download PDFInfo
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- CN210092062U CN210092062U CN201921190914.3U CN201921190914U CN210092062U CN 210092062 U CN210092062 U CN 210092062U CN 201921190914 U CN201921190914 U CN 201921190914U CN 210092062 U CN210092062 U CN 210092062U
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- chip
- substrate
- redistribution layer
- chip module
- circuit board
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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Abstract
The utility model relates to a chip module, electronic equipment, the chip module includes: the substrate comprises a core area and a peripheral area surrounding the core area, the substrate is provided with a first surface and a second surface which are opposite, a redistribution layer located in the peripheral area is formed on the second surface, and the redistribution layer comprises a first connecting end and a second connecting end; the front surface of the chip is provided with a bonding pad, the front surface of the chip, facing to the second surface of the substrate, corresponds to the core area in position, and the bonding pad is electrically connected with the first connecting end of the redistribution layer; at least one circuit board electrically connected to the second connection end of the redistribution layer. The thickness of the chip module is reduced.
Description
Technical Field
The utility model relates to a sensor technical field especially relates to a chip module and electronic equipment.
Background
With the rapid development of the electronic equipment industry, especially the mobile communication equipment industry, the intelligent degree of terminal products such as mobile phones and the like is continuously improved, the biological identification technology is more and more emphasized by people, especially the practicability of the fingerprint identification technology under the screen becomes the market requirement, and the optical sensor is also widely applied to fingerprint identification.
As the integration level inside the terminal equipment is higher and higher, the total thickness of the corresponding chip module is also more and more strictly required. While ensuring the functions of the chip module, the system integration requires increasingly thinner chip modules to satisfy the compact space inside the terminal.
In the prior art, a method of surface mounting and matching with a plurality of layers of PCBs is generally adopted to manufacture a PCB module carrying a chip, and the total thickness of the module is the total thickness of the chip, solder, the PCB and corresponding mechanical reinforcing components, but it is difficult to reduce the total thickness of the whole module by optimizing the structure of the conventional PCB hard board or soft board.
How to reduce the total thickness of the module is a problem to be solved.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the technical problem that a chip module and electronic equipment are provided, reduce the thickness of chip module.
In order to solve the above problem, the utility model provides a chip module, include: the substrate comprises a core area and a peripheral area surrounding the core area, the substrate is provided with a first surface and a second surface which are opposite, a redistribution layer located in the peripheral area is formed on the second surface, and the redistribution layer comprises a first connecting end and a second connecting end; the front surface of the chip is provided with a bonding pad, the front surface of the chip, facing to the second surface of the substrate, corresponds to the core area in position, and the bonding pad is electrically connected with the first connecting end of the redistribution layer; at least one circuit board electrically connected to the second connection end of the redistribution layer.
Optionally, the core region of the substrate at least includes a light-transmitting region; an optical assembly located on the light-transmitting area is formed on the first surface of the substrate.
Optionally, the at least one chip at least includes an optical sensing chip, and a sensing region of the optical sensing chip is opposite to the light-transmitting region.
Optionally, the first connection end and the second connection end include an under bump metallurgy layer, and the first connection end and the pad are electrically connected through a metal ball.
Optionally, the second connection terminal and the circuit board form the electrical connection through solder or conductive adhesive.
Optionally, an isolation layer is filled between the substrate and the chip.
Optionally, an insulating layer covering the peripheral region is formed on the second surface of the substrate, and the redistribution layer is formed on the surface of the insulating layer.
The technical scheme of the utility model an electronic equipment is still provided, including above-mentioned arbitrary chip module.
The utility model discloses a chip module, through the reasonable circuit that sets up the circuit board and the structure of chip, the redistribution layer through base plate second surface realizes the interconnection between chip and the circuit board. Because the chip and the circuit board are both connected with the redistribution layer, no stack exists in the vertical direction, and therefore the total thickness of the module can be greatly reduced.
Further, since it is not necessary to form an interconnection line on the back surface of the chip and to form a through-via structure in the chip, the back surface of the chip can be ground to a thinner thickness. In addition, no stack exists between the chip and the circuit board in the vertical direction, so that a metal reinforcing sheet does not need to be additionally formed to support the whole module structure, and the thickness of the module is further reduced.
Drawings
Fig. 1 to 6A are schematic structural views of a chip module according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a chip module according to an embodiment of the present invention.
Detailed Description
The following describes the chip module, the packaging method thereof, and the electronic device in detail with reference to the accompanying drawings.
Please refer to fig. 1 to fig. 6B, which are schematic structural diagrams illustrating a chip module packaging process according to an embodiment of the present invention.
Referring to fig. 1, a substrate 100 is provided, the substrate 100 having a core region 101 and a peripheral region 102 surrounding the core region, the substrate 100 having a first surface 1001 and a second surface 1002 opposite to each other.
The core area 101 corresponds to a chip to be packaged. Specifically, the fixed position of the chip to be packaged corresponds to the core area 101, and the structural features of the core area 101 also correspond to the chip type.
In this embodiment, the chip module to be formed is an optical sensor module for fingerprint recognition. The core region 101 of the substrate 100 includes a light-transmitting region, and an optical component 110 is further formed on the first surface 1001 of the substrate 100, where the optical component 110 is located on the light-transmitting region and is used to increase light entering the light-transmitting region 101, so as to increase a sensing effect of the optical sensing chip. The optical assembly 110 includes a single lens or a lens group distributed in an array, and may further include a filter or an antireflection film. In this embodiment, the substrate 100 is glass. In other embodiments, the substrate 100 may be made of organic glass or the like having at least a partially transparent region.
In other embodiments, if the chip to be packaged is not an optical sensor chip, the substrate 100 may also be made of a non-transparent material, and the first surface 1001 of the substrate 1001 does not need to have an optical component formed thereon. The material and structure of the substrate 100 may be chosen appropriately according to the particular chip type.
The substrate 100 is required to have a certain strength as a supporting structure of the whole chip module. In this embodiment, the substrate 100 has a thickness of 90 μm to 160 μm, for example, 100 μm or 150 μm, so as to provide sufficient support.
Referring to fig. 2, an insulating layer 200 covering the peripheral region 101 is formed on the second surface 1002 of the substrate 100.
The material of the insulating layer 200 may be silicon nitride, silicon oxide, or an insulating glue layer. To improve the insulating property of the surface of the peripheral region 102 of the substrate 100. In other embodiments, if the insulating property of the substrate 100 is high, this step may be omitted, and a redistribution layer may be formed directly on the second surface 1002.
Referring to fig. 3A and 3B, a redistribution layer 300 is formed on the insulating layer 200 on the surface of the peripheral region 102, and the redistribution layer 101 includes a first connection end 301 and a second connection end 302. Fig. 3A is a schematic cross-sectional view, and fig. 3B is a schematic top view of the second surface 1002.
The redistribution layer 300 further comprises wires 303 connecting the first connection end 301 and the second connection end 302.
The first connection end 301 is used for connecting to an input/output pad of a chip to be packaged, and therefore, the first connection end 301 is disposed around the core region 101.
The second connecting end 302 is used for connecting to a circuit board, and for facilitating connection with the circuit board, the second connecting end 302 is disposed on the same side of the substrate 100 and near an edge of the substrate 100. In other embodiments, if a plurality of circuit boards are required to be connected, the second connecting terminals 302 corresponding to the same circuit board are disposed on the same side of the substrate 100. The second connection terminals 302 corresponding to different circuit boards can be divided to be located on different sides of the substrate 100.
In this embodiment, the first connection end 301 and the second connection end 302 each include an Under Bump Metallurgy (UBM) layer, which is a single-layer or multi-layer structure and includes a single-layer or alloy layer of at least one of Cu, Ni, Sn, or Au.
Referring to fig. 4, a chip 400 is provided, the front surface of the chip 400 has pads 402; and forming a metal ball 403 on the surface of the pad 402.
In this specific embodiment, the chip 400 is a photo-sensing chip and includes a sensing region, and the bonding pad 402 is located at the periphery of the sensing region.
The bonding pads 402 are connected to the internal circuit of the chip 400 for connecting to an external circuit and outputting or inputting electrical signals. The positions of the pads 402 correspond to the positions of the first connection terminals 301 (see fig. 3B) to be connected one by one.
The metal balls 403 may be Au balls, and in other embodiments, the metal balls 403 may also be copper balls or solder balls.
Referring to fig. 5A and 5B, the surface of the chip 400 is faced to the second surface 1002 of the substrate 100, and an electrical connection is formed between the bonding pad 402 and the first connection end 301 of the redistribution layer 300. Fig. 5A is a schematic cross-sectional view, and fig. 5B is a schematic top view of one side of the chip 400.
The method of forming the chip 400 includes: forming a plurality of bare chips on the surface of the wafer, thinning the back of the wafer to a certain thickness, and cutting the wafer to form the chip 400. Because the utility model discloses an among the embodiment, need not be in form through-hole (TSV) structure in the chip 400, consequently, can thin down the chip to lower thickness. In this embodiment, the thickness of the chip 400 is 70 μm to 90 μm.
The pads 402 are electrically connected to the corresponding first connection terminals 301, which may be formed by solder, conductive paste, or other means.
In this embodiment, the pad 402 of the Chip 400 and the first connection end 301 may be electrically connected through the metal ball 403 by a Flip Chip (Flip Chip) process, so that the distance between the Chip 400 and the substrate 100 can be greatly reduced. The sensing region 401 of the chip 400 is opposite to the core region 101 of the substrate 100 and is located in the projection range of the light-transmitting region on the chip 400.
In other specific embodiments, a metal ball may also be formed on the surface of the UBM layer of the first connection end 301, and then the pad 402 is connected to the metal ball through a flip-chip process.
After the chip 400 is fixed on the second surface 1002 of the substrate 100, filling an isolation layer 500 in a gap between the chip 400 and the substrate 100 is further included. The isolation layer 500 has a certain viscosity, so that the chip 400 and the substrate 100 can be bonded together to fix the position of the chip 400, and the isolation layer 500 has a high insulation property, so that the metal ball 403 and the first connection end 301 can be well insulated and protected, and the reliability of electrical connection between the metal ball 403 and the first connection end 301 is ensured.
The isolation layer 500 may be an organic adhesive material such as resin, and has a thermal curing or ultraviolet curing property, and is cured after filling a gap between the chip 400 and the substrate 100.
In this embodiment, due to the light sensing characteristics of the chip 400, the isolation layer 500 also needs to have high light transmittance to avoid affecting the sensing performance of the chip 400.
Referring to fig. 6A and 6B, a circuit board 600 is provided, and an electrical connection is formed between the circuit board 600 and the second connection end 302 of the redistribution layer. Fig. 6A is a schematic cross-sectional view, and fig. 6B is a schematic top view.
The circuit board 600 may be a hard circuit board or a flexible circuit board (FPCB).
In this embodiment, an electrical connection is formed between the circuit board 600 and the second connection terminal 302 by solder 602 using a Surface Mount Technology (SMT) method. The signal output/output pad 601 on the circuit board 600 is connected to the second connection terminal 302 through the solder 602, and an electrical connection is formed between the optical sensing chip 301 and the first connection terminal 301 through the wire 303, so that an electrical connection between the optical sensing chip 301 and the circuit board 600 is realized.
In other embodiments, an electrical connection may be formed between the circuit board 600 and the second connection terminal 300 by an ACF (Anisotropic conductive film) bonding method.
In the above embodiments, a module in which a single chip is formed is taken as an example. In other specific embodiments, multiple chips may also be connected to the first connection end of the redistribution layer on the second surface of the substrate through a flip-chip process, and the chips may be interconnected through the redistribution layer.
Please refer to fig. 7, which is a schematic structural diagram of a chip module according to an embodiment of the present invention.
In this embodiment, the chip module includes a substrate 700, a redistribution layer 710 on a surface of the substrate 700, and an optical sensor chip 721, an optical sensor chip 722, an optical sensor chip 723, and a control chip 724 electrically connected to the redistribution layer 710 through a flip-chip process; the circuit board 730 is connected to the redistribution layer 710 by surface mount or conductive adhesive.
Electrical connections between the optical sensing chips 721-723 and the control chip 724, and between the control chip 722 and the circuit board 730 may be made through the redistribution layer 710. In fig. 7, the redistribution layer 710 is shown only as an illustration and does not represent the actual conductive path and connection means. Those skilled in the art can arrange the redistribution layer 710 circuit traces appropriately according to the specific circuit connection requirement.
In other specific embodiments, a plurality of circuit board connections may be electrically connected to the redistribution layer, and the electrical connection between each circuit board and the corresponding chip may be achieved through the redistribution layer.
More functions can be integrated in the same module through a plurality of chips or a plurality of circuit boards, so that the sensing area can be increased, more images of the shot object can be acquired, the total thickness of the chip module structure can be reduced, and the output of more functions can be synchronously realized.
In the forming method of the chip module, the interconnection between the chip and the circuit board is realized through the redistribution layer on the second surface of the substrate by reasonably arranging the circuit of the circuit board and the structure of the chip. Because the chip and the circuit board are both connected with the redistribution layer, no stack exists in the vertical direction, and therefore the total thickness of the module can be greatly reduced.
Furthermore, since it is not necessary to form an interconnection line on the back surface of the chip and to form a through-via structure in the chip, the back surface of the chip can be ground to a thinner thickness. In addition, no stack exists between the chip and the circuit board in the vertical direction, so that a metal reinforcing sheet does not need to be additionally formed to support the whole module structure, and the thickness of the module is further reduced.
The utility model discloses a specific embodiment still provides a chip module.
Please refer to fig. 6A and 6B, which are schematic structural diagrams of a chip module according to an embodiment of the present invention.
The chip module comprises a substrate 100, wherein the substrate 100 is provided with a core area 101 and a peripheral area 102 surrounding the core area, and the substrate 100 is provided with a first surface 1001 and a second surface 1002 which are opposite. The redistribution layer 300 is formed on the second surface 1002 and located in the peripheral region 101, and the redistribution layer 300 includes a first connection end 301, a second connection end 302, and a wire 303 connecting the first connection end 301 and the second connection end 302. In this embodiment, the first connection end 301 and the second connection end 302 each include an Under Bump Metallurgy (UBM) layer, which is a single-layer or multi-layer structure and includes a single-layer or alloy layer of at least one of Cu, Ni, Sn, or Au.
The chip module further includes a chip 400, and the front surface of the chip 400 has pads 402. In this specific embodiment, the chip 400 is a photo-sensing chip and includes a sensing region, and the bonding pad 402 is located at the periphery of the sensing region. The pad 402 is connected to the internal circuit of the chip 400 for connecting to an external circuit, outputting or outputting a signal. The positions of the pads 402 correspond to the positions of the first connection terminals 301 to be connected, and the first connection terminals 301 are arranged around the core region 101.
The pads of the chip 400 and the first connection terminals 301 are electrically connected through metal balls 403. The metal balls 403 may be Au balls, and in other embodiments, the metal balls 403 may also be copper balls or solder balls. In other embodiments, the pads 402 are electrically connected to the corresponding first connection terminals 301, and the electrical connection may be formed by solder, conductive paste, or other means.
In this embodiment, the core region 100 includes a light-transmitting region, and the sensing region of the chip 400 is opposite to the light-transmitting region of the substrate 100. The chip 400 has been thinned to a lower thickness. The thickness of the chip 400 may be 70 to 90 μm. In this embodiment, the thickness of the chip 400 is 80 μm. An optical assembly 110 is further formed on the first surface 1001 of the substrate 100, and the optical assembly 110 is located on the light-transmitting area and is used for increasing light entering the light-transmitting area 101 so as to increase the sensing effect of the optical sensing chip. The optical assembly 110 includes a single lens or a lens group distributed in an array, and may further include a filter or an antireflection film.
The gap between the chip 400 and the substrate 100 is filled with an isolation layer 500. The isolation layer 500 has a certain viscosity, so that the chip 400 and the substrate 100 can be bonded together to fix the position of the chip 400, and the isolation layer 500 has a high insulation property, so that the metal ball 403 and the first connection end 301 can be well insulated and protected, and the reliability of electrical connection between the metal ball 403 and the first connection end 301 is ensured. The isolation layer 500 may be an organic adhesive material such as resin, and has a thermal curing or ultraviolet curing property, and is cured after filling a gap between the chip 400 and the substrate 100. In this embodiment, due to the light sensing characteristics of the chip 400, the isolation layer 500 also needs to have high light transmittance to avoid affecting the sensing performance of the chip 400.
The chip module further includes a circuit board 600, and the circuit board 600 may be a hard circuit board or a flexible circuit board (FPCB). The circuit board 600 may be electrically connected to the second connection terminal 302 by solder 602 using a Surface Mount Technology (SMT) method. In other embodiments, an electrical connection between the circuit board 600 and the second connection terminal 300 may be formed by an ACF (Anisotropic Conductive Film).
The signal output/output pad 601 on the circuit board 600 is connected to the second connection terminal 302 through the solder 602, and an electrical connection is formed between the optical sensing chip 301 and the first connection terminal 301 through the wire 303, so that an electrical connection between the optical sensing chip 301 and the circuit board 600 is realized. To facilitate connection with the circuit board 600, the second connection end 302 is disposed on the same side of the substrate 100 and near the edge of the substrate 100. In other embodiments, if a plurality of circuit boards are required to be connected, the second connecting terminals 302 corresponding to the same circuit board are disposed on the same side of the substrate 100. The second connection terminals 302 corresponding to different circuit boards can be divided to be located on different sides of the substrate 100.
In other specific embodiments, a plurality of chips may be integrated in the chip module, and the redistribution layer may be used to interconnect the chips.
Please refer to fig. 7, which is a schematic structural diagram of a chip module according to another embodiment of the present invention.
In this embodiment, the chip module includes a substrate 700, a redistribution layer 710 on a surface of the substrate 700, and an optical sensing chip 721, an optical sensing chip 722, an optical sensing chip 723, and a control chip 724 electrically connected to the redistribution layer 710; a circuit board 730 is connected to the redistribution layer 710.
Electrical connections between the optical sensing chips 721-723 and the control chip 724, and between the control chip 722 and the circuit board 730 may be made through the redistribution layer 710. In fig. 7, the redistribution layer 710 is shown only as an illustration and does not represent the actual conductive path and connection. Those skilled in the art can arrange the redistribution layer 710 circuit traces appropriately according to the specific circuit connection requirement.
In other specific embodiments, a plurality of circuit boards may be electrically connected to the redistribution layer, and the electrical connection between each circuit board and the corresponding chip is realized through the redistribution layer.
Through many chips or a plurality of circuit boards, can be with more functions integration in same each module, not only can realize increasing sensing area, acquire more and be shot the object influence, can also reduce chip module structure gross thickness, also can realize the output of more functions in step.
The specific embodiment of the utility model also provides an electronic equipment including above-mentioned chip module. The electronic device may be a mobile terminal, such as a mobile phone, a tablet computer, and the like. In one embodiment, the chip in the chip module is an optical sensing chip, and the chip module is used for fingerprint identification. The electronic equipment is a hand mobile terminal, and the chip module is used as a fingerprint identification module under a screen of the mobile terminal and used for fingerprint identification. Because the utility model discloses a chip module gross thickness is less, is favorable to reducing electronic equipment's gross thickness.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the principle of the present invention, and these improvements and decorations should also be regarded as the protection scope of the present invention.
Claims (8)
1. A chip module, comprising:
the substrate comprises a core area and a peripheral area surrounding the core area, the substrate is provided with a first surface and a second surface which are opposite, a redistribution layer located in the peripheral area is formed on the second surface, and the redistribution layer comprises a first connecting end and a second connecting end;
the front surface of the chip is provided with a bonding pad, the front surface of the chip, facing to the second surface of the substrate, corresponds to the core area in position, and the bonding pad is electrically connected with the first connecting end of the redistribution layer;
at least one circuit board electrically connected to the second connection end of the redistribution layer.
2. The chip module according to claim 1, wherein the core region of the substrate comprises at least a light-transmissive region; an optical assembly located on the light-transmitting area is formed on the first surface of the substrate.
3. The die set of claim 2, wherein the at least one die comprises at least an optical sensor die, and the sensing area of the optical sensor die is opposite to the light transmissive area.
4. The chip module according to claim 1, wherein the first and second connection terminals comprise Under Bump Metallurgy (UBM) and the first connection terminal and the bonding pad are electrically connected by metal balls.
5. The chip module according to claim 1, wherein the electrical connection between the second connection terminal and the circuit board is formed by solder or conductive adhesive.
6. The chip module according to claim 1, wherein an isolation layer is filled between the substrate and the chip.
7. The chip module according to claim 1, wherein an insulating layer covering the peripheral region is formed on the second surface of the substrate, and the redistribution layer is formed on the surface of the insulating layer.
8. An electronic device comprising a chip module according to any one of claims 1 to 7.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921190914.3U CN210092062U (en) | 2019-07-26 | 2019-07-26 | Chip module and electronic equipment |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201921190914.3U CN210092062U (en) | 2019-07-26 | 2019-07-26 | Chip module and electronic equipment |
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| CN210092062U true CN210092062U (en) | 2020-02-18 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110379779A (en) * | 2019-07-26 | 2019-10-25 | 苏州多感科技有限公司 | Chip module and its packaging method, electronic equipment |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110379779A (en) * | 2019-07-26 | 2019-10-25 | 苏州多感科技有限公司 | Chip module and its packaging method, electronic equipment |
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