WO2023236696A1 - 图像采集卡及图像采集方法 - Google Patents

图像采集卡及图像采集方法 Download PDF

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Publication number
WO2023236696A1
WO2023236696A1 PCT/CN2023/092204 CN2023092204W WO2023236696A1 WO 2023236696 A1 WO2023236696 A1 WO 2023236696A1 CN 2023092204 W CN2023092204 W CN 2023092204W WO 2023236696 A1 WO2023236696 A1 WO 2023236696A1
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WIPO (PCT)
Prior art keywords
module
hard trigger
trigger signal
network data
ethernet
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PCT/CN2023/092204
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English (en)
French (fr)
Inventor
楼佳祥
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杭州海康机器人股份有限公司
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Publication of WO2023236696A1 publication Critical patent/WO2023236696A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/222—Studio circuitry; Studio devices; Studio equipment
    • H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/765—Interface circuits between an apparatus for recording and another apparatus

Definitions

  • the present application relates to the field of robot visual perception, and in particular to an image acquisition card and an image acquisition method.
  • Gigabit Ethernet industrial cameras using the GigE Vision (a Gigabit Ethernet-based image transmission standard initiated by the Automated Imaging Association (AIA)) protocol are currently commonly used machine vision solutions.
  • TOE Trigger Over Ethernet, Ethernet trigger
  • the external hard trigger signal first enters the GPIO (General Purpose Input/Output) module in the FPGA (Field Programmable Gate Array), recognizes the hard trigger signal, and then the FPGA
  • the hard trigger signal is sent to the industrial control PC (Personal Computer, personal computer) through the PCIe (Peripheral Component Interconnect Express, fast peripheral component interconnect interface) Switch (switch) and the PCIe interface, and then the CPU (Center Process Unit) in the industrial control PC , the central processing unit) detects the hard trigger signal, assembles the network data packet, sends it to the PCIe Switch through the PCIe interface, and then to the Gigabit network module and sends it to the industrial camera to complete the trigger picture function.
  • PC Personal Computer
  • PCIe Peripheral Component Interconnect Express, fast peripheral component interconnect interface
  • switch fast peripheral component interconnect interface
  • CPU Center Process Unit
  • the hard trigger signal needs to be collected through the FPGA and transmitted to the CPU of the industrial control PC.
  • the industrial control PC then assembles the network data packet and sends it to the industrial camera.
  • the entire link is too long and the industrial camera receives the trigger signal with delay. time is larger.
  • the CPU usage of the industrial control PC is relatively high, there are still problems such as lagging and delayed processing, which causes serious jitter in the trigger signal received by the industrial camera, affecting the picture output.
  • this application provides an image acquisition card and an image acquisition method.
  • an image capture card including: FPGA and Ethernet port physical layer PHY.
  • the FPGA includes a general input and output signal module GPIO module, a packet module and an Ethernet media intervention control layer.
  • MAC module among them:
  • the GPIO module is used to collect external hard trigger signals and send the collected hard trigger signals to the Package module;
  • the packet assembly module is used to assemble network data packets according to the hard trigger signal when receiving the hard trigger signal, and convert the network data through the Ethernet MAC module and the Ethernet PHY.
  • the packet is sent to the industrial camera, so that the industrial camera performs image rendering processing according to the network data packet.
  • an image acquisition method is provided, which is executed by an image acquisition card.
  • the image acquisition card includes an FPGA and an Ethernet port physical layer PHY.
  • the FPGA includes a general input and output signal module, a GPIO module, and a packaging module. and an Ethernet media intervention control layer MAC module; the method includes:
  • the network data packet is assembled according to the hard trigger signal, and the network data packet is sent to the industry through the Ethernet MAC module and the Ethernet PHY. camera, so that the industrial camera performs image rendering processing according to the network data packet.
  • the FPGA can include a GPIO module, a packet module and an Ethernet MAC module.
  • the GPIO module can collect external hard trigger signals and send the collected hard trigger signals to the group.
  • Packet module when the packet assembly module receives a hard trigger signal, it can assemble the network data packet based on the hard trigger signal, and send the network data packet to the industrial camera through the Ethernet MAC module and Ethernet PHY, so that the industrial camera Perform image processing based on network data packets.
  • the control efficiency of industrial camera image output is improved, the delay of industrial camera image output is reduced, and the stability of industrial camera image output control is improved.
  • Figure 1 is a schematic structural diagram of an image capture card provided by an embodiment of the present application.
  • Figure 2 is a schematic structural diagram of another image capture card provided by an embodiment of the present application.
  • Figure 3 is a schematic structural diagram of an image acquisition card based on TOE triggering provided by an embodiment of the present application
  • Figure 4 is a schematic flowchart of an image acquisition method provided by an embodiment of the present application.
  • sequence number of each step in the embodiment of the present application does not mean the order of execution.
  • the execution order of each process should be determined by its function and internal logic, and should not constitute any influence on the implementation process of the embodiment of the present application. limited.
  • the image acquisition card can include: FPGA110 and Ethernet PHY (port physical layer) 120.
  • FPGA110 includes a GPIO module 111, a packet module 112 and an Ethernet MAC (Media Access Control, media intervention control layer) module. 113.
  • the GPIO module 111 is used to collect external hard trigger signals and send the collected hard trigger signals to the packaging module 112.
  • the packet assembly module 112 is used to assemble the network data packet according to the hard trigger signal when receiving the hard trigger signal, and send the network data packet to the industrial camera through the Ethernet MAC module 113 and the Ethernet PHY 120, so that the industrial camera The camera performs image processing based on network data packets.
  • the industrial camera image output can be controlled through an image acquisition card including FPGA110 and Ethernet PHY120.
  • the image acquisition card can collect external hard trigger signals through the GPIO module 111 in the FPGA 110, and send the collected hard trigger signals to the packet assembly module 112 to trigger the packet assembly module 112 to assemble network data packets.
  • the FPGA 110 when the FPGA 110 collects an external hard trigger signal through the GPIO module, it does not need to assemble and send network data packets through an external PC. Instead, the packet assembly module 112 can assemble the network based on the hard trigger signal. data pack.
  • the network data packet is used to trigger the industrial camera to perform image processing.
  • the packet assembly module 112 When the packet assembly module 112 has assembled the network data packet, it can send the network data packet to the Ethernet MAC module 113, and send the network data packet to the Ethernet PHY 120 through the Ethernet MAC module 113, and the Ethernet PHY 120 will Network packets are sent to industrial cameras.
  • the industrial camera When the industrial camera receives the network data packet, it can perform image processing.
  • the FPGA can include a GPIO module, a packet module and an Ethernet MAC module.
  • the FPGA can collect external hard trigger signals through the GPIO module and collect the The hard trigger signal is sent to the packet assembly module.
  • the packet assembly module receives the hard trigger signal, it can assemble the network data packet based on the hard trigger signal and send the network data packet to the Ethernet MAC module and Ethernet PHY.
  • Industrial camera so that the industrial camera can perform image processing based on network data packets. Compared with the traditional solution of assembling network data packets through industrial control PCs, the control efficiency of industrial camera image output is improved and the time of industrial camera image output is reduced. delay, and improve the stability of industrial camera image control.
  • the GPIO module 111 may be specifically used to collect external hard trigger signals, perform signal adjustment on the external hard trigger signals, and send the adjusted hard trigger signals to the packaging module 112 .
  • the packet assembly module 112 usually needs to trigger the network data packet by the rising edge or falling edge of the hard trigger signal. Assembly, in order to improve the accuracy of drawing control, when the GPIO module 111 collects an external hard trigger signal, it can adjust the external hard trigger signal and send the adjusted hard trigger signal to the assembly module 112.
  • the GPIO module 111 can perform jitter filtering on the collected hard trigger signals to remove burrs from the hard trigger signals.
  • the number of the Ethernet PHY120, the packetization module 112, and the Ethernet MAC module 113 is multiple (Fig. 1 is a single schematic diagram), and the Ethernet PHY120, the packetization module 112, and the Ethernet MAC The number of modules 113 matches.
  • the above-mentioned image acquisition card may include multiple (two or more) Ethernet PHYs 120, and the FPGA 110 may also include multiple packaging modules 112 and multiple Ethernet PHYs.
  • MAC module 113 may be included in order to realize simultaneous picture output by multiple working cameras.
  • the multiple Ethernet PHY120 can be used to send network data packets to different industrial cameras respectively.
  • the plurality of packet assembly modules 112 can be used to assemble network data packets sent to different industrial cameras respectively, and synchronously send the network data packets to the corresponding industrial cameras through the corresponding Ethernet MAC module 113 and Ethernet PHY 120 respectively.
  • the GPIO module 111 is specifically configured to synchronously send the hard trigger signal to part or all of the multiple packetization modules 112, so that each packetization module 112 that receives the hard trigger signal assembles the network data packet, and The network data packets are synchronously sent to the corresponding industrial cameras through the corresponding Ethernet MAC module 113 and the Ethernet PHY120 respectively.
  • the GPIO module 111 can synchronously send the hard trigger signal to some or all of the multiple packaging modules 112 .
  • the FPGA 110 can synchronously send the hard trigger signal to the corresponding packaging module 112 through the GPIO module 111 according to the industrial camera that needs to produce pictures.
  • the image acquisition card includes 4 Ethernet PHYs 120, respectively corresponding to 4 different industrial cameras
  • the FPGA 110 includes 4 packet modules 112 and 4 Ethernet MAC modules 113.
  • the FPGA 110 can synchronously send the collected hard trigger signals to the four group packages through the GPIO module 111 when the GPIO module 111 collects the external hard trigger signals.
  • Module 112 assembles network data packets by the packet assembly module 112, and synchronously sends the network data packets to the corresponding industrial cameras through the corresponding Ethernet MAC module 113 and Ethernet PHY 120 respectively.
  • the GPIO module 111 may include multiple hard trigger input ports.
  • the GPIO module 111 can be specifically configured to synchronously send the external hard trigger signal to part or all of the multiple packaging modules 112 when an external hard trigger signal is collected through any hard trigger input port. , so that the packet assembly module 112 that receives the hard trigger signal assembles the network data packet, and synchronously sends the network data packet to the corresponding industrial camera through the corresponding Ethernet MAC module 113 and Ethernet PHY 120 respectively.
  • the GPIO module 111 may include multiple hard trigger input ports (IO ports), and each hard trigger input port may be used by the multiple packaging modules 112 to collect hard trigger signals.
  • IO ports hard trigger input ports
  • the GPIO module 111 collects an external hard trigger signal through any hard trigger input port
  • the external hard trigger signal can be synchronously sent to part or all of the multiple packaging modules 112, so that the received hard trigger signal
  • the packet assembly module 112 of the trigger signal assembles the network data packet, and synchronously sends the network data packet to the corresponding industrial camera through the corresponding Ethernet MAC module 113 and the Ethernet PHY 120 respectively.
  • the GPIO module 111 can be specifically configured to, when an external hard trigger signal is collected through any hard trigger input port, determine the grouping module 112 corresponding to the hard trigger input port, and convert the hard trigger signal Send to the packet assembly module 112, so that the packet assembly module 112 assembles network data packets according to the hard trigger signal, and sends the network data packets to the corresponding industrial camera through the corresponding Ethernet MAC module 113 and Ethernet PHY120.
  • the GPIO module 111 may include multiple hard trigger input ports (IO ports), and each hard trigger input port may correspond to a different packaging module 112 for collecting hard trigger signals for different packaging modules 112 .
  • IO ports hard trigger input ports
  • each hard trigger input port may correspond to a different packaging module 112 for collecting hard trigger signals for different packaging modules 112 .
  • the hard trigger input from which the external hard trigger signal is collected can be determined based on the corresponding relationship between the hard trigger input port and the grouping module 112
  • the packetization module 112 corresponding to the port (which may be called the target packetization module), and sends the hard trigger signal to the target packetization module.
  • the target packet assembly module When the target packet assembly module receives the hard trigger signal, it can assemble the network data packet according to the hard trigger signal, and send the network data packet to the corresponding industrial camera through the corresponding Ethernet MAC module 113 and Ethernet PHY120.
  • the GPIO module 111 can realize the correspondence between the hard trigger input port and the grouping module through a multiplexer.
  • the GPIO module 111 may include a multiplexer, and the inputs of the multiplexer correspond to different hard trigger input ports respectively.
  • the hard trigger signals collected from different hard trigger input ports can be passed through the multiplexer. Output to the corresponding packaging module 112.
  • the GPIO module 111 may include multiple multiplexers, one multiplexer may correspond to one packet module 112, and the inputs of the multiple multiplexers may be multiplexed and correspond to multiple hard trigger input ports respectively.
  • the hard trigger signal collected from any hard trigger input port can be output to the corresponding packaging module 112 through the multiplexer, that is, the hard trigger signal collected from any hard trigger input port can be output to Each packaging module 112 in the plurality of packaging modules 112 mentioned above.
  • the FPGA 110 may also include: a CPU (Center Process Unit, central processing unit) soft core (which may also be called a soft CPU or software reconfigurable processor) 114.
  • a CPU Center Process Unit, central processing unit
  • soft core which may also be called a soft CPU or software reconfigurable processor
  • the CPU soft core 114 can be used to receive configuration instructions from an external PC and configure structural parameters of network data packets according to the configuration instructions.
  • the packet assembly module 112 is specifically used to assemble the network data packet according to the structural parameters of the network data packet.
  • configuration instructions can be sent to the image acquisition card through an external PC, such as an industrial control PC, to configure the structural parameters of the network data packet.
  • an external PC such as an industrial control PC
  • the structural parameters may include, but are not limited to, MAC addresses, IP addresses, and data packet key values (such as protocol fields in network data packets).
  • the CPU soft core 114 can communicate with an external PC.
  • the CPU soft core 114 can communicate with an external PC through the PCIe interface.
  • the FPGA 110 can receive a configuration instruction from an external PC through the CPU soft core 114 and configure the structural parameters of the network data packet according to the configuration instruction.
  • the CPU soft core 114 can configure the structural parameters of the network data packet in the register of the FPGA 110 .
  • the packet assembly module 112 may assemble the network data packet according to the structural parameters of the network data packet.
  • the CPU soft core 114 can also be used to configure the type of the target hard trigger signal according to the configuration instruction.
  • the packet assembly module 112 may be specifically configured to assemble network data packets when it is determined that the type of the received hard trigger signal matches the type of the target hard trigger signal.
  • the FPGA 110 may collect different types of external hard trigger signals through the GPIO module 111, and the functions of different types of hard trigger signals usually are different. Therefore, in order to improve the accuracy of industrial camera image control,
  • the type of hard trigger signal used to trigger the industrial camera to output images (referred to as the target hard trigger signal in this article) can also be pre-configured.
  • the configuration of the target hard trigger signal type can be achieved by sending configuration instructions to the image acquisition card through an external PC.
  • the FPGA 110 can receive the configuration instruction of the external PC through the CPU soft core 114 and configure the type of the target hard trigger signal according to the configuration instruction.
  • the grouping module 112 may determine whether the type of the received hard trigger signal matches the type of the target hard trigger signal, and when the type of the received hard trigger signal matches the type of the target hard trigger signal, In this case, the network data packet is assembled, and the network data packet is sent to the industrial camera through the Ethernet MAC module 113 and the Ethernet PHY 120, so that the industrial camera performs image rendering processing based on the network data packet.
  • the packaging module 112 determines the type of the received hard trigger signal and the target hard trigger signal. In the case where the type does not match, the hard trigger signal may not be responded to, or may be processed according to other strategies, which is not limited in the embodiments of the present application.
  • FIG 3 is a schematic structural diagram of an image acquisition card triggered based on TOE (Trigger Over Ethernet, Ethernet trigger) provided by an embodiment of the present application.
  • the hardware architecture of the image capture card can be a single capture card board, which integrates FGPA, 4-way Gigabit Ethernet PHY, and PCIe interface.
  • FPGA includes GPIO module, packet module, Ethernet MAC module, soft CPU and PCIe controller. Among them, FPGA can realize the operation configuration of the capture card through the soft CPU, and use the high-speed PCIe interface to communicate with an external PC (such as an industrial control PC) through the PCIe controller to build a path between the industrial camera and the PC host computer.
  • an external PC such as an industrial control PC
  • each packet grouping module can first be initialized according to the Ethernet protocol, and the network data packet structure parameters such as MAC address, IP address, and data packet key value can be configured.
  • the FPGA can detect external hard trigger signals (such as trigger pulse signals) through the GPIO module, perform signal adjustments on the detected hard trigger signals, such as jitter filtering, and send the adjusted hard trigger signals to each package module.
  • Each packet module assembles network data packets and transmits them to the industrial camera through the Ethernet MAC module and Ethernet PHY.
  • the number of packaging modules and Ethernet MAC modules in the FPGA is 4, and the packaging modules, Ethernet modules, and Ethernet PHY correspond one to one, and each network port is independent of each other.
  • the four packet assembly modules can synchronously transmit the assembled network data packets to the industrial camera through the corresponding Ethernet MAC module and Ethernet PHY. That is, after the external hard trigger signal is sent to the FPGA, it can be synchronously released to the Ethernet MAC module and Ethernet PHY. Ethernet PHY and transmitted to industrial cameras, ensuring low latency and low jitter of industrial camera output.
  • Figure 4 is a schematic flow chart of an image acquisition method provided by an embodiment of the present application.
  • the image acquisition method can be applied to the FPGA in the image acquisition card in the above embodiment.
  • the image Collection methods can include:
  • Step S400 Collect external hard trigger signals through the GPIO module, and send the collected hard trigger signals to the packaging module.
  • Step S410 When the hard trigger signal is received through the packet assembly module, the network data packet is assembled according to the hard trigger signal, and the network data packet is sent to the industrial camera through the Ethernet MAC module and the Ethernet PHY. In order to enable the industrial camera to perform image processing based on network data packets.
  • the FPGA when the FPGA collects external hard trigger signals through the GPIO module, it is no longer necessary to assemble and send network data packets through an external PC. Instead, the network data packets can be assembled based on the hard trigger signals through the packet assembly module. .
  • the packet assembly module When the packet assembly module has assembled the network data packet, it can send the network data packet to the Ethernet MAC module, and send the network data packet to the Ethernet PHY through the Ethernet MAC module, and the Ethernet PHY will Sent to industrial cameras.
  • the industrial camera When the industrial camera receives the network data packet, it can perform image processing.
  • sending the collected hard trigger signal to the packaging module may include:
  • the packet assembly module when the GPIO module collects an external hard trigger signal, it can adjust the external hard trigger signal and send the adjusted hard trigger signal to the packaging module.
  • the GPIO module can perform jitter filtering on the collected hard trigger signals to remove burrs from the hard trigger signals.
  • the number of the above-mentioned Ethernet PHY, packetization module, and Ethernet MAC module is multiple, and the numbers of the Ethernet PHY, packetization module, and Ethernet MAC module match.
  • the image acquisition card can include multiple (two or more) Ethernet PHYs, and the FPGA can also include multiple packaging modules and multiple Ethernet MAC modules.
  • the multiple Ethernet PHYs can be used to send network data packets to different industrial cameras respectively, and the multiple packet assembly modules can be used to assemble network data packets sent to different industrial cameras respectively, and pass them through the corresponding Ethernet MAC module. and Ethernet PHY to synchronously send network data packets to the corresponding industrial camera.
  • sending the collected hard trigger signal to the packaging module may include:
  • the above-mentioned packet assembly module assembles the network data packet when receiving the hard trigger signal, and sends the network data packet to the industrial camera through the Ethernet MAC module and Ethernet PHY, which can include:
  • the network data packet is assembled through the packet assembly module that receives the hard trigger signal, and the network data packet is synchronously sent to the corresponding industrial camera through the corresponding Ethernet MAC module and Ethernet PHY.
  • the GPIO module when the GPIO module collects an external hard trigger signal, it can synchronously send the hard trigger signal to some or all of the multiple package modules.
  • the FPGA can synchronously send the hard trigger signal to the corresponding packaging module through the GPIO module based on the industrial camera that needs to produce pictures.
  • the GPIO module can include multiple hard trigger input ports
  • the above-mentioned method of sending the collected hard trigger signal to the packaging module may include:
  • the external hard trigger signal is synchronously sent to some or all of the multiple packaging modules
  • the packaging module corresponding to the hard trigger input port is determined, and the hard trigger signal is sent to the packaging module.
  • the GPIO module may include multiple hard trigger input ports (IO ports), and each hard trigger input port may be used for the above multiple package modules to collect hard trigger signals.
  • IO ports hard trigger input ports
  • each hard trigger input port can be used for the above multiple packaging modules to collect hard trigger signals.
  • the GPIO module collects an external hard trigger signal through any hard trigger input port
  • the external hard trigger signal can be sent to some or all of the multiple package modules synchronously, so that the package module that receives the hard trigger signal
  • the module assembles network data packets and synchronously sends the network data packets to the corresponding industrial cameras through the corresponding Ethernet MAC module and Ethernet PHY.
  • each hard trigger input port can respectively correspond to different packaging modules, and is used to collect hard trigger signals for different packaging modules.
  • the GPIO module collects an external hard trigger signal through any hard trigger input port
  • the group package corresponding to the hard trigger input port that collects the external hard trigger signal can be determined based on the corresponding relationship between the hard trigger input port and the package module.
  • module can be called the target packaging module, and sends the hard trigger signal to the target packaging module.
  • the target packet assembly module When the target packet assembly module receives the hard trigger signal, it can assemble network data packets based on the hard trigger signal. And send the network data packet to the corresponding industrial camera through the corresponding Ethernet MAC module and Ethernet PHY.
  • the GPIO module can realize the correspondence between the hard trigger input port and the grouping module through a multiplexer.
  • the GPIO module can include a multiplexer whose inputs correspond to different hard trigger input ports.
  • the hard trigger signals collected from different hard trigger input ports can be output through the multiplexer. Give the corresponding group package module.
  • the GPIO module can include multiple multiplexers, one multiplexer can correspond to one grouping module, and the inputs of the multiple multiplexers can be multiplexed and correspond to multiple hard trigger input ports respectively.
  • the hard trigger signal collected from any hard trigger input port can be output to the corresponding packet module through the multiplexer, that is, the hard trigger signal collected from any hard trigger input port can be output to the above Each package module in multiple package modules.
  • the image acquisition method provided by the embodiment of the present application may also include:
  • the CPU soft core receives the configuration instructions from the external PC and configures the structural parameters of the network data packet according to the configuration instructions.
  • the above-mentioned assembly of network data packets through the packet assembly module upon receipt of a hard trigger signal may include:
  • the network data packet is assembled according to the structural parameters of the network data packet.
  • configuration instructions can be sent to the image acquisition card through an external PC, such as an industrial control PC, to configure the structural parameters of the network data packet.
  • an external PC such as an industrial control PC
  • the structural parameters may include, but are not limited to, MAC addresses, IP addresses, and data packet key values (such as protocol fields in network data packets).
  • the CPU soft core can communicate with an external PC.
  • the CPU soft core can communicate with an external PC through the PCIe interface.
  • the FPGA can receive configuration instructions from an external PC through the CPU soft core, and configure the structural parameters of the network data packet according to the configuration instructions.
  • the CPU soft core can configure the structural parameters of the network data packet in the register of the FPGA.
  • the packet assembly module can assemble the network data packet according to the structural parameters of the network data packet.
  • the image acquisition method provided by the embodiment of the present application may further include:
  • the above-mentioned assembly of network data packets through the packet assembly module upon receipt of a hard trigger signal may include:
  • the network data packet is assembled through the packet assembly module when it is determined that the type of the received hard trigger signal matches the type of the target hard trigger signal.
  • the FPGA may collect different types of external hard trigger signals through the GPIO module, and the functions of different types of hard trigger signals usually are different. Therefore, in order to improve the control of industrial camera output, accuracy, the type of hard trigger signal used to trigger the industrial camera to produce images (referred to as the target hard trigger signal in this article) can also be pre-configured.
  • the configuration of the target hard trigger signal type can be achieved by sending configuration instructions to the image acquisition card through an external PC.
  • the FPGA can receive configuration instructions from the external PC through the CPU soft core, and configure the type of the target hard trigger signal based on the configuration instructions.
  • the packaging module can determine whether the type of the received hard trigger signal matches the type of the target hard trigger signal, and when the type of the received hard trigger signal matches the type of the target hard trigger signal, In this case, assemble the network data packet and send the network data packet to the industrial camera through the Ethernet MAC module and Ethernet PHY, so that the industrial camera can perform image processing based on the network data packet.
  • the embodiment of the present application also provides an image acquisition device, which is suitable for an image acquisition card.
  • the image acquisition card includes an FPGA and an Ethernet port physical layer PHY.
  • the FPGA includes a general input and output signal module, a GPIO module, and a group.
  • the packet module and Ethernet media are involved in the control layer MAC module.
  • the apparatus includes: a processor; and memory for storing instructions executable by the processor.
  • the processor is configured to execute the image acquisition method described in any of the preceding embodiments.
  • embodiments of the present application also provide a non-transitory computer-readable storage medium.
  • the processor is enabled to execute the image acquisition method described in any of the preceding embodiments.
  • the packet grouping module determines that the type of the received hard trigger signal does not match the type of the target hard trigger signal, it may not respond to the hard trigger signal, or process it according to other strategies. This application The embodiment does not limit this.

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Abstract

本申请提供一种图像采集卡及图像采集方法。该图像采集卡包括：FPGA以及以太网端口PHY，FPGA包括GPIO模块、组包模块以及以太网MAC模块。所述GPIO模块，用于采集外部硬触发信号，并将采集到的硬触发信号发送给所述组包模块。所述组包模块，用于在接收到所述硬触发信号的情况下，依据所述硬触发信号组装网络数据包，并通过所述以太网MAC模块以及所述以太网PHY将所述网络数据包发送给工业相机，以使所述工业相机依据所述网络数据包进行出图处理。本申请可以提高工业相机出图的控制效率，减少工业相机出图的时延，并提高工业相机出图控制的稳定性。

Description

图像采集卡及图像采集方法 技术领域
本申请涉及机器人视觉感知领域，尤其涉及一种图像采集卡及图像采集方法。
背景技术
使用GigE Vision(由自动化影像协会AIA(Automated Imaging Association)发起制定的一种基于千兆以太网的图像传输的标准)协议的千兆以太网工业相机是目前常用的机器视觉解决方案。TOE(Trigger Over Ethernet，以太网触发)把硬件IO(Input Output，输入输出)触发信号连接到网卡的IO模块中，把IO信号转换成相应的以太网数据包，发送到工业相机，完成工业相机的触发出图功能。
现有实现方式中，外部硬触发信号先进入FPGA(Field Programmable Gate Array，现场可编程门阵列)内的GPIO(General Purpose Input/Output，通用输入输出)模块，识别出该硬触发信号，然后FPGA把该硬触发信号通过PCIe(Peripheral Component Interconnect Express，快速外围组件互连接口)Switch(交换机)及PCIe接口发送到工控PC(Personal Computer，个人计算机)上，然后工控PC中的CPU(Center Process Unit，中央处理单元)检查到该硬触发信号后，组装网络数据包，经过PCIe接口发送到PCIe Switch，再到千兆网络模组，发送到工业相机端，完成触发出图功能。
实践发现，上述方案中，需要通过FPGA采集硬触发信号，传输到工控PC的CPU，再由工控PC组装网络数据包，发送到工业相机中，整个链路太长，工业相机接收到触发信号延时较大。同时当工控PC的CPU占用比较高时，还存在卡顿、处理不及时等问题，导致工业相机端接收到触发信号抖动严重，影响出图。
发明内容
有鉴于此，本申请提供一种图像采集卡及图像采集方法。
根据本申请实施例的第一方面，提供一种图像采集卡，包括：FPGA以及以太网端口物理层PHY，所述FPGA包括通用输入输出信号模块GPIO模块、组包模块以及以太网媒体介入控制层MAC模块；其中：
所述GPIO模块，用于采集外部硬触发信号，并将采集到的硬触发信号发送给所述 组包模块；
所述组包模块，用于在接收到所述硬触发信号的情况下，依据所述硬触发信号组装网络数据包，并通过所述以太网MAC模块以及所述以太网PHY将所述网络数据包发送给工业相机，以使所述工业相机依据所述网络数据包进行出图处理。
根据本申请第二方面，提供一种图像采集方法，由图像采集卡执行，所述图像采集卡包括FPGA以及以太网端口物理层PHY，所述FPGA包括通用输入输出信号模块GPIO模块、组包模块以及以太网媒体介入控制层MAC模块；所述方法包括：
通过所述GPIO模块采集外部硬触发信号，并将采集到的硬触发信号发送给所述组包模块；
通过所述组包模块在接收到硬触发信号的情况下，依据所述硬触发信号组装网络数据包，并通过所述以太网MAC模块以及所述以太网PHY将所述网络数据包发送给工业相机，以使所述工业相机依据所述网络数据包进行出图处理。
根据本申请实施例，通过部署FPGA以及以太网PHY，FPGA可以包括GPIO模块、组包模块以及以太网MAC模块，可以通过GPIO模块采集外部硬触发信号，并将采集到的硬触发信号发送给组包模块，组包模块在接收到硬触发信号的情况下，可以依据该硬触发信号组装网络数据包，并通过以太网MAC模块以及以太网PHY将网络数据包发送给工业相机，以使工业相机依据网络数据包进行出图处理。与传统方案中通过工控PC组装网络数据包的实现方案相比，提高了工业相机出图的控制效率，减少了工业相机出图的时延，并提高了工业相机出图控制的稳定性。
附图说明
图1是本申请实施例提供的一种图像采集卡的结构示意图；
图2是本申请实施例提供的另一种图像采集卡的结构示意图；
图3是本申请实施例提供的一种基于TOE触发的图像采集卡的结构示意图；
图4是本申请实施例提供的一种图像采集方法的流程示意图。
具体实施方式
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附 图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本申请相一致的所有实施方式。相反，它们仅是与如所附权利要求书中所详述的、本申请的一些方面相一致的装置和方法的例子。
在本申请使用的术语是仅仅出于描述特定实施例的目的，而非旨在限制本申请。在本申请和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式，除非上下文清楚地表示其他含义。
为了使本领域技术人员更好地理解本申请实施例提供的技术方案，并使本申请实施例的上述目的、特征和优点能够更加明显易懂，下面结合附图对本申请实施例中技术方案作进一步详细的说明。
需要说明的是，本申请实施例中各步骤的序号大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。
请参见图1，为本申请实施例提供的一种图像采集卡的结构示意图。如图1所示，该图像采集卡可以包括：FPGA110以及以太网PHY(端口物理层)120，FPGA110包括GPIO模块111、组包模块112以及以太网MAC(Media Access Control，媒体介入控制层)模块113。
GPIO模块111，用于采集外部硬触发信号，并将采集到的硬触发信号发送给组包模块112。
组包模块112，用于在接收到硬触发信号的情况下，依据该硬触发信号组装网络数据包，并通过以太网MAC模块113以及以太网PHY120将网络数据包发送给工业相机，以使工业相机依据网络数据包进行出图处理。
本申请实施例中，为了提高工业相机出图控制的效率和稳定性，可以通过包括FPGA110和以太网PHY120的图像采集卡控制工业相机出图。
该图像采集卡可以通过FPGA110中的GPIO模块111采集外部硬触发信号，并将采集到的硬触发信号发送给组包模块112，以触发组包模块112进行网络数据包组装。
本申请实施例中，FPGA110通过GPIO模块采集到外部硬触发信号的情况下，不需要再通过外部PC进行网络数据包的组装和发送，而是可以通过组包模块112依据该硬触发信号组装网络数据包。
其中，该网络数据包用于触发工业相机进行出图处理。
组包模块112组装好网络数据包的情况下，可以将该网络数据包发送给以太网MAC模块113，并通过以太网MAC模块113将该网络数据包发送给以太网PHY120，由以太网PHY120将网络数据包发送给工业相机。
工业相机在接收到该网络数据包的情况下，可以进行出图处理。
可见，基于图1所示的图像采集卡，通过部署FPGA以及以太网PHY，FPGA可以包括GPIO模块、组包模块以及以太网MAC模块，FPGA可以通过GPIO模块采集外部硬触发信号，并将采集到的硬触发信号发送给组包模块，组包模块在接收到硬触发信号的情况下，可以依据该硬触发信号组装网络数据包，并通过以太网MAC模块以及以太网PHY将网络数据包发送给工业相机，以使工业相机依据网络数据包进行出图处理，与传统方案中通过工控PC组装网络数据包的实现方案相比，提高了工业相机出图的控制效率，减少了工业相机出图的时延，并提高了工业相机出图控制的稳定性。
在一些实施例中，GPIO模块111，可以具体用于采集外部硬触发信号，对外部硬触发信号进行信号调整，并将调整后的硬触发信号发送给组包模块112。
在这些实施例中，考虑到GPIO模块111采集到的外部硬触发信号可能会存在抖动等不稳定情况，而组包模块112通常需要由硬触发信号的上升沿或下降沿来触发网络数据包的组装，为了提高出图控制的准确性，GPIO模块111采集到外部硬触发信号的情况下，可以对外部硬触发信号进行信号调整，并将调整后的硬触发信号发送给组包模块112。
例如，GPIO模块111可以对采集到的硬触发信号进行抖动过滤，去除硬触发信号的毛刺。
在一些实施例中，以太网PHY120、组包模块112，以及，以太网MAC模块113的数量均为多个(图1为单个的示意图)，且以太网PHY120、组包模块112以及以太网MAC模块113的数量相匹配。
这是考虑到实际场景中可能会存在多个工业相机需要同步出图的情况，例如，同一场景不同角度的多个工业相机。而传统方案中通过工控PC组装网络数据包的实现方案只能将多个网络数据包串行地发送给各工业相机，无法保证各工业相机同步出图。
因而，为了实现多个工作相机同步出图，上述图像采集卡中可以包括多个(两个或两个以上)以太网PHY120，FPGA110中也可以包括多个组包模块112以及多个以太网 MAC模块113。
该多个以太网PHY120可以分别用于向不同的工业相机发送网络数据包。该多个组包模块112可以分别用于组装发往不同工业相机的网络数据包，并分别通过对应的以太网MAC模块113和以太网PHY120，将网络数据包同步发送给对应的工业相机。
在这些实施例中，GPIO模块111具体用于将硬触发信号同步发送给多个组包模块112的部分或全部，以使接收到硬触发信号的每个组包模块112组装网络数据包，并分别通过对应的以太网MAC模块113以及以太网PHY120将网络数据包同步发送给对应的工业相机。
示例性的，GPIO模块111在采集到外部硬触发信号的情况下，可以将该硬触发信号同步发送给多个组包模块112的部分或全部。
例如，FPGA110可以依据存在出图需求的工业相机，通过GPIO模块111将硬触发信号同步发送给对应的组包模块112。
作为一个示例，图像采集卡包括4个以太网PHY120，分别对应4个不同的工业相机，且FPGA110中包括4个组包模块112和4个以太网MAC模块113。在该4个工业相机均存在同步出图需求的情况下，FPGA110可以在GPIO模块111采集到外部硬触发信号的情况下，通过GPIO模块111将采集到的硬触发信号同步发送给4个组包模块112，由组包模块112组装网络数据包，并分别通过对应的以太网MAC模块113以及以太网PHY120将网络数据包同步发送给对应的工业相机。
示例性的，GPIO模块111可以包括多个硬触发输入端口。
在一个示例中，GPIO模块111，可以具体用于在通过任一硬触发输入端口采集到外部硬触发信号的情况下，将该外部硬触发信号同步发送给多个组包模块112的部分或全部，以使接收到硬触发信号的组包模块112组装网络数据包，并分别通过对应的以太网MAC模块113以及以太网PHY120将网络数据包同步发送给对应的工业相机。
例如，GPIO模块111可以包括多个硬触发输入端口(IO端口)，各硬触发输入端口可以用于上述多个组包模块112进行硬触发信号采集。
相应地，在GPIO模块111通过任一硬触发输入端口采集到外部硬触发信号的情况下，可以将该外部硬触发信号同步发送给多个组包模块112的部分或全部，以使接收到硬触发信号的组包模块112组装网络数据包，并分别通过对应的以太网MAC模块113以及以太网PHY120将网络数据包同步发送给对应的工业相机。
在另一个示例中，GPIO模块111，可以具体用于在通过任一硬触发输入端口采集到外部硬触发信号的情况下，确定该硬触发输入端口对应的组包模块112，将该硬触发信号发送给该组包模块112，以使该组包模块112依据该硬触发信号组装网络数据包，并通过对应的以太网MAC模块113以及以太网PHY120将网络数据包发送给对应的工业相机。
例如，GPIO模块111可以包括多个硬触发输入端口(IO端口)，各硬触发输入端口可以分别对应不同的组包模块112，用于为不同组包模块112进行硬触发信号采集。
相应地，在GPIO模块111通过任一硬触发输入端口采集到外部硬触发信号的情况下，可以根据硬触发输入端口与组包模块112的对应关系，确定采集到外部硬触发信号的硬触发输入端口对应的组包模块112(可以称为目标组包模块)，并将该硬触发信号发送给目标组包模块。
目标组包模块接收到该硬触发信号时，可以依据该硬触发信号进行网络数据包组装，并通过对应的以太网MAC模块113以及以太网PHY120将网络数据包发送给对应的工业相机。
示例性的，在本申请实施例中，GPIO模块111可以通过多路选择器实现硬触发输入端口与组包模块的对应。
例如，GPIO模块111中可以包括一个多路选择器，该多路选择器的输入分别对应不同硬触发输入端口，对于从不同硬触发输入端口采集到的硬触发信号，可以通过该多路选择器输出给对应的组包模块112。
或者，GPIO模块111中可以包括多个多路选择器，一个多路选择器可以对应一个组包模块112，该多个多路选择器的输入可以复用，分别与多个硬触发输入端口对应。相应地，从任一硬触发输入端口采集到的硬触发信号，可以通过多路选择器输出给对应的组包模块112，即任一硬触发输入端口采集到的硬触发信号，均可以输出给上述多个组包模块112中的各组包模块112。
在一些实施例中，如图2所述，FPGA110还可以包括：CPU(Center Process Unit，中央处理单元)软核(也可以称为soft CPU或软件可重构处理器)114。
CPU软核114，可以用于接收外部PC的配置指令，并依据配置指令配置网络数据包的结构参数。
相应的，组包模块112，具体用于依据网络数据包的结构参数，组装网络数据包。
示例性的，可以通过外部PC，如工控PC，向图像采集卡发送配置指令，以实现对网络数据包的结构参数的配置。
示例性的，该结构参数可以包括但不限于MAC地址、IP地址，以及，数据包键值(如网络数据包中的协议字段)。
示例性的，该CPU软核114可以与外部PC进行通信。
例如，CPU软核114可以通过PCIe接口与外部PC进行通信。
示例性的，FPGA110可以通过CPU软核114接收外部PC的配置指令，并依据该配置指令配置网络数据包的结构参数。
示例性的，CPU软核114可以将网络数据包的结构参数配置在FPGA110的寄存器中。
示例性的，组包模块112在接收到硬触发信号的情况下，可以依据网络数据包的结构参数，组装网络数据包。
示例性的，CPU软核114，还可以用于依据配置指令配置目标硬触发信号的类型。
相应的，组包模块112，可以具体用于在确定接收到的硬触发信号的类型与目标硬触发信号的类型匹配的情况下，组装网络数据包。
这是考虑到实际场景中，FPGA110可能会通过GPIO模块111采集到不同类型的外部硬触发信号，且不同类型的硬触发信号的作用通常不同，因此，为了提高工业相机出图控制的准确性，还可以预先配置用于触发工业相机出图的硬触发信号(本文中称为目标硬触发信号)的类型。
例如，可以通过外部PC向图像采集卡发送配置指令的方式，实现目标硬触发信号的类型的配置。
相应地，FPGA110可以通过CPU软核114接收外部PC的配置指令，并依据该配置指令配置目标硬触发信号的类型。
组包模块112在接收到硬触发信号时，可以确定接收到的硬触发信号的类型是否与目标硬触发信号的类型匹配，并在接收到的硬触发信号的类型与目标硬触发信号的类型匹配的情况下，组装网络数据包，并通过以太网MAC模块113以及以太网PHY120将该网络数据包发送给工业相机，以使工业相机依据网络数据包进行出图处理。
需要说明的是，组包模块112在确定接收到的硬触发信号的类型与目标硬触发信号 的类型不匹配的情况下，可以不对该硬触发信号进行响应，或者，按照其它策略进行处理，本申请实施例对此不做限定。
为了使本领域技术人员更好地理解本申请实施例提供的技术方案，下面结合具体应用场景对本申请实施例提供的技术方案进行说明。
请参见图3，为本申请实施例提供的一种基于TOE(Trigger Over Ethernet，以太网触发)触发的图像采集卡的结构示意图。如图3所示，该图像采集卡的硬件架构可以为单个采集卡板卡，板卡集成FGPA、4路千兆以太网PHY，以及，PCIe接口。FPGA包括GPIO模块、组包模块、以太网MAC模块、soft CPU以及PCIe控制器。其中，FPGA可以通过soft CPU实现对采集卡的运行配置，并通过PCIe控制器，使用高速PCIe接口与外部PC(如工控PC)通信，搭建工业相机与PC上位机的通路。
在该实施例中，为了实现网络数据包的发送，可以先根据以太网协议对各组包模块进行初始化，配置MAC地址、IP地址以及数据包键值等网络数据包结构参数。
FPGA可以通过GPIO模块检测外部硬触发信号(如触发脉冲信号)，并对检测到的硬触发信号进行信号调整，如进行抖动过滤，并将调整后的硬触发信号发送给各组包模块，由各组包模块组装网络数据包，并通过以太网MAC模块和以太网PHY传输到工业相机端。
示例性的，FPGA中组包模块和以太网MAC模块的数量均为4个，且组包模块、以太网模块以及以太网PHY一一对应，且每路网口相互独立。
4个组包模块可以将组装得到的网络数据包，同步通过对应的以太网MAC模块和以太网PHY传输给工业相机，即外部硬触发信号到FPGA内部后，可以同步发布到以太网MAC模块和以太网PHY，并传输到工业相机，保证了工业相机出图的低延时和低抖动。
请参见图4，为本申请实施例提供的一种图像采集方法的流程示意图，其中，该图像采集方法可以应用于上述实施例中的图像采集卡中的FPGA，如图4所示，该图像采集方法可以包括：
步骤S400、通过GPIO模块采集外部硬触发信号，并将采集到的硬触发信号发送给组包模块。
步骤S410、通过组包模块在接收到硬触发信号的情况下，依据该硬触发信号组装网络数据包，并通过以太网MAC模块以及以太网PHY将该网络数据包发送给工业相机， 以使工业相机依据网络数据包进行出图处理。
本申请实施例中，FPGA通过GPIO模块采集到外部硬触发信号的情况下，不需要再通过外部PC进行网络数据包的组装和发送，而是可以通过组包模块依据硬触发信号组装网络数据包。
组包模块组装好网络数据包的情况下，可以将该网络数据包发送给以太网MAC模块，并通过以太网MAC模块将该网络数据包发送给以太网PHY，由以太网PHY将网络数据包发送给工业相机。
工业相机在接收到该网络数据包的情况下，可以进行出图处理。
在一些实施例中，上述将采集到的硬触发信号发送给组包模块，可以包括：
对采集到的硬触发信号进行信号调整，并将调整后的硬触发信号发送给组包模块。
在这些实施例中，考虑到GPIO模块采集到的外部硬触发信号可能会存在抖动等不稳定情况，而组包模块通常需要由硬触发信号的上升沿或下降沿来触发网络数据包的组装，为了提高出图控制的准确性，GPIO模块采集到外部硬触发信号的情况下，可以对外部硬触发信号进行信号调整，并将调整后的硬触发信号发送给组包模块。
例如，GPIO模块可以对采集到的硬触发信号进行抖动过滤，去除硬触发信号的毛刺。
在一些实施例中，上述以太网PHY、组包模块，以及，以太网MAC模块的数量均为多个，且以太网PHY、组包模块，以及，以太网MAC模块的数量相匹配。
这是考虑到实际场景中可能会存在多个工业相机需要同步出图的情况，例如，同一场景不同角度的多个工业相机。而传统方案中通过工控PC组装网络数据包的实现方案只能将多个网络数据包串行地发送给各工业相机，无法保证各工业相机同步出图。
因而，为了实现多个工作相机同步出图，图像采集卡中可以包括多个(两个或两个以上)以太网PHY，FPGA中也可以包括多个组包模块以及多个以太网MAC模块。
该多个以太网PHY可以分别用于向不同的工业相机发送网络数据包，该多个组包模块可以分别用于组装发往不同工业相机的网络数据包，并分别通过对应的以太网MAC模块和以太网PHY，将网络数据包同步发送给对应的工业相机。
在这些实施例中，上述将采集到的硬触发信号发送给组包模块，可以包括：
将采集到的硬触发信号同步发送给多个组包模块中的部分或全部。
上述通过组包模块在接收到硬触发信号的情况下，组装网络数据包，并通过以太网MAC模块以及以太网PHY将网络数据包发送给工业相机，可以包括：
通过接收到硬触发信号的组包模块组装网络数据包，并分别通过对应的以太网MAC模块以及以太网PHY将网络数据包同步发送给对应的工业相机。
示例性的，GPIO模块在采集到外部硬触发信号的情况下，可以将该硬触发信号同步发送给多个组包模块的部分或全部。
例如，FPGA可以依据存在出图需求的工业相机，通过GPIO模块将硬触发信号同步发送给对应的组包模块。
示例性的，GPIO模块可以包括多个硬触发输入端口；
上述将采集到的硬触发信号发送给组包模块，可以包括：
在通过任一硬触发输入端口采集到外部硬触发信号的情况下，将该外部硬触发信号同步发送给多个所述组包模块的部分或全部；
或，
在通过任一硬触发输入端口采集到外部硬触发信号的情况下，确定该硬触发输入端口对应的组包模块，将该硬触发信号发送给该组包模块。
示例性的，GPIO模块可以包括多个硬触发输入端口(IO端口)，各硬触发输入端口可以用于上述多个组包模块进行硬触发信号采集。
在一种实现方式中，各硬触发输入端口可以用于上述多个组包模块进行硬触发信号采集。在GPIO模块通过任一硬触发输入端口采集到外部硬触发信号的情况下，可以将该外部硬触发信号同步发送给多个组包模块的部分或全部，以使接收到硬触发信号的组包模块组装网络数据包，并分别通过对应的以太网MAC模块以及以太网PHY将网络数据包同步发送给对应的工业相机。
在另一种实现方式中，各硬触发输入端口可以分别对应不同的组包模块，用于为不同组包模块进行硬触发信号采集。在GPIO模块通过任一硬触发输入端口采集到外部硬触发信号的情况下，可以根据硬触发输入端口与组包模块的对应关系，确定采集到外部硬触发信号的硬触发输入端口对应的组包模块(可以称为目标组包模块)，并将该硬触发信号发送给目标组包模块。
目标组包模块接收到该硬触发信号时，可以依据该硬触发信号进行网络数据包组装， 并通过对应的以太网MAC模块以及以太网PHY将网络数据包发送给对应的工业相机。
示例性的，在本申请实施例中，GPIO模块可以通过多路选择器实现硬触发输入端口与组包模块的对应。
例如，GPIO模块中可以包括一个多路选择器，该多路选择器的输入分别对应不同硬触发输入端口，对于从不同硬触发输入端口采集到的硬触发信号，可以通过该多路选择器输出给对应的组包模块。
或者，GPIO模块中可以包括多个多路选择器，一个多路选择器可以对应一个组包模块，该多个多路选择器的输入可以复用，分别与多个硬触发输入端口对应。相应地，从任一硬触发输入端口采集到的硬触发信号，可以通过多路选择器输出给对应的组包模块，即任一硬触发输入端口采集到的硬触发信号，均可以输出给上述多个组包模块中的各组包模块。
在一些实施例中，本申请实施例提供的图像采集方法还可以包括：
通过CPU软核于接收外部PC的配置指令，并依据配置指令配置网络数据包的结构参数。
相应的，上述通过组包模块在接收到硬触发信号的情况下，组装网络数据包，可以包括：
通过组包模块在接收到硬触发信号的情况下，依据网络数据包的结构参数，组装网络数据包。
示例性的，可以通过外部PC，如工控PC，向图像采集卡发送配置指令，以实现对网络数据包的结构参数的配置。
示例性的，该结构参数可以包括但不限于MAC地址、IP地址，以及，数据包键值(如网络数据包中的协议字段)。
示例性的，该CPU软核可以与外部PC进行通信。
例如，CPU软核可以通过PCIe接口与外部PC进行通信。
示例性的，FPGA可以通过CPU软核接收外部PC的配置指令，并依据该配置指令配置网络数据包的结构参数。
示例性的，CPU软核可以将网络数据包的结构参数配置在FPGA的寄存器中。
示例性的，组包模块在接收到硬触发信号的情况下，可以依据网络数据包的结构参数，组装网络数据包。
示例性的，本申请实施例提供的图像采集方法还可以还包括：
通过CPU软核依据所述配置指令配置目标硬触发信号的类型；
相应的，上述通过组包模块在接收到硬触发信号的情况下，组装网络数据包，可以包括：
通过组包模块在确定接收到的硬触发信号的类型与目标硬触发信号的类型匹配的情况下，组装网络数据包。
示例性的，这是考虑到实际场景中，FPGA可能会通过GPIO模块采集到不同类型的外部硬触发信号，且不同类型的硬触发信号的作用通常不同，因此，为了提高工业相机出图控制的准确性，还可以预先配置用于触发工业相机出图的硬触发信号(本文中称为目标硬触发信号)的类型。
例如，可以通过外部PC向图像采集卡发送配置指令的方式，实现目标硬触发信号的类型的配置。
相应地，FPGA可以通过CPU软核接收外部PC的配置指令，并依据该配置指令配置目标硬触发信号的类型。
组包模块在接收到硬触发信号时，可以确定接收到的硬触发信号的类型是否与目标硬触发信号的类型匹配，并在接收到的硬触发信号的类型与目标硬触发信号的类型匹配的情况下，组装网络数据包，并通过以太网MAC模块以及以太网PHY将该网络数据包发送给工业相机，以使工业相机依据网络数据包进行出图处理。
进一步的，本申请实施例还提供了一种图像采集装置，适用于图像采集卡，所述图像采集卡包括FPGA以及以太网端口物理层PHY，所述FPGA包括通用输入输出信号模块GPIO模块、组包模块以及以太网媒体介入控制层MAC模块。
所述装置包括：处理器；和存储器，用于存储所述处理器可执行指令。
所述处理器用于执行前述任一实施例所述的图像采集方法。
进一步的，本申请实施例还提供了一种非临时性计算机可读存储介质。当所述存储介质中的指令由处理器执行时，使得处理器能够执行前述任一实施例所述的图像采集方法。
需要说明的是，组包模块在确定接收到的硬触发信号的类型与目标硬触发信号的类型不匹配的情况下，可以不对该硬触发信号进行响应，或者，按照其它策略进行处理，本申请实施例对此不做限定。
需要说明的是，在本文中，诸如目标和目标等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
以上所述仅为本申请的较佳实施例而已，并不用以限制本申请，凡在本申请的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本申请保护的范围之内。

Claims (14)

  1. 一种图像采集卡，其特征在于，包括：FPGA以及以太网端口物理层PHY，所述FPGA包括通用输入输出信号模块GPIO模块、组包模块以及以太网媒体介入控制层MAC模块；其中：
    所述GPIO模块，用于采集外部硬触发信号，并将采集到的硬触发信号发送给所述组包模块；
    所述组包模块，用于在接收到所述硬触发信号的情况下，依据所述硬触发信号组装网络数据包，并通过所述以太网MAC模块以及所述以太网PHY将所述网络数据包发送给工业相机，以使所述工业相机依据所述网络数据包进行出图处理。
  2. 根据权利要求1所述的图像采集卡，其特征在于，
    所述GPIO模块，还用于采集外部硬触发信号，对所述外部硬触发信号进行信号调整，并将调整后的硬触发信号发送给所述组包模块。
  3. 根据权利要求1所述的图像采集卡，其特征在于，所述图像采集卡包括多个所述以太网PHY、多个所述组包模块，以及，多个所述以太网MAC模块，且多个所述以太网PHY、多个所述组包模块，以及，多个所述以太网MAC模块的数量相匹配；
    所述GPIO模块，还用于将硬触发信号同步发送给多个所述组包模块的部分或全部，以使接收到硬触发信号的各组包模块组装网络数据包，并分别通过对应的以太网MAC模块以及所述以太网PHY将所述网络数据包同步发送给对应的工业相机。
  4. 根据权利要求3所述的图像采集卡，其特征在于，所述GPIO模块包括多个硬触发输入端口；
    所述GPIO模块，还用于在通过任一硬触发输入端口采集到外部硬触发信号的情况下，将所述外部硬触发信号同步发送给多个所述组包模块的部分或全部，以使接收到硬触发信号的组包模块组装网络数据包，并分别通过对应的以太网MAC模块以及所述以太网PHY将所述网络数据包同步发送给对应的工业相机；
    或，
    所述GPIO模块，还用于在通过任一硬触发输入端口采集到外部硬触发信号的情况下，确定所述硬触发输入端口对应的组包模块，将所述硬触发信号发送给所述组包模块，以使所述组包模块依据所述硬触发信号组装所述网络数据包，并通过对应的以太网 MAC模块以及所述以太网PHY将所述网络数据包发送给对应的工业相机。
  5. 根据权利要求1-4任一项所述的图像采集卡，其特征在于，所述FPGA还包括：中央处理单元CPU软核；其中：
    所述CPU软核，用于接收外部个人计算机PC的配置指令，并依据所述配置指令配置网络数据包的结构参数；所述结构参数包括MAC地址、IP地址以及数据包键值；
    所述组包模块，用于依据所述网络数据包的结构参数，组装所述网络数据包。
  6. 根据权利要求5所述的图像采集卡，其特征在于，
    所述CPU软核，还用于依据所述配置指令配置目标硬触发信号的类型；
    所述组包模块，还用于在确定接收到的硬触发信号的类型与所述目标硬触发信号的类型匹配的情况下，组装网络数据包。
  7. 一种图像采集方法，其特征在于，由图像采集卡执行，所述图像采集卡包括FPGA以及以太网端口物理层PHY，所述FPGA包括通用输入输出信号模块GPIO模块、组包模块以及以太网媒体介入控制层MAC模块；所述方法包括：
    通过所述GPIO模块采集外部硬触发信号，并将采集到的硬触发信号发送给所述组包模块；
    通过所述组包模块在接收到硬触发信号的情况下，依据所述硬触发信号组装网络数据包，并通过所述以太网MAC模块以及所述以太网PHY将所述网络数据包发送给工业相机，以使所述工业相机依据所述网络数据包进行出图处理。
  8. 根据权利要求7所述的方法，其特征在于，所述将采集到的硬触发信号发送给所述组包模块，包括：
    对采集到的所述硬触发信号进行信号调整，并将调整后的硬触发信号发送给所述组包模块。
  9. 根据权利要求7所述的方法，其特征在于，所述图像采集卡包括多个所述以太网PHY、多个所述组包模块，以及，多个所述以太网MAC模块，且多个所述以太网PHY、多个所述组包模块，以及，多个所述以太网MAC模块的数量相匹配；
    所述将采集到的硬触发信号发送给所述组包模块，包括：
    将采集到的硬触发信号同步发送给多个所述组包模块中的部分或全部；
    所述通过所述组包模块在接收到硬触发信号的情况下，组装网络数据包，并通过所述以太网MAC模块以及所述以太网PHY将所述网络数据包发送给工业相机，包括：
    通过接收到硬触发信号的组包模块组装网络数据包，并分别通过对应的以太网MAC模块以及所述以太网PHY将所述网络数据包同步发送给对应的工业相机。
  10. 根据权利要求9所述的方法，其特征在于，所述GPIO模块包括多个硬触发输入端口；
    所述将采集到的硬触发信号发送给所述组包模块，包括：
    在通过任一硬触发输入端口采集到外部硬触发信号的情况下，将所述外部硬触发信号同步发送给多个所述组包模块的部分或全部；
    或，
    在通过任一硬触发输入端口采集到外部硬触发信号的情况下，确定所述硬触发输入端口对应的组包模块，将所述硬触发信号发送给所述组包模块。
  11. 根据权利要求7-10任一项所述的方法，其特征在于，所述方法还包括：
    通过CPU软核接收外部个人计算机PC的配置指令，并依据所述配置指令配置网络数据包的结构参数；所述结构参数包括MAC地址、IP地址以及数据包键值；
    所述通过所述组包模块在接收到硬触发信号的情况下，组装网络数据包，包括：
    通过所述组包模块在接收到硬触发信号的情况下，依据所述网络数据包的结构参数，组装所述网络数据包。
  12. 根据权利要求11所述的方法，其特征在于，所述方法还包括：
    通过所述CPU软核依据所述配置指令配置目标硬触发信号的类型；
    所述通过所述组包模块在接收到硬触发信号的情况下，组装网络数据包，包括：
    通过所述组包模块在确定接收到的硬触发信号的类型与所述目标硬触发信号的类型匹配的情况下，组装所述网络数据包。
  13. 一种图像采集装置，适用于图像采集卡，所述图像采集卡包括FPGA以及以太网端口物理层PHY，所述FPGA包括通用输入输出信号模块GPIO模块、组包模块以及以太网媒体介入控制层MAC模块；所述装置包括：
    处理器；
    存储器，用于存储所述处理器可执行指令；
    所述处理器用于执行权利要求7-12任一所述的图像采集方法。
  14. 一种非临时性计算机可读存储介质，当所述存储介质中的指令由处理器执行时，使得处理器能够执行权利要求7-12中任一所述的图像采集方法。
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