WO2023221966A1 - 一种传输数据的方法和装置 - Google Patents

一种传输数据的方法和装置 Download PDF

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Publication number
WO2023221966A1
WO2023221966A1 PCT/CN2023/094462 CN2023094462W WO2023221966A1 WO 2023221966 A1 WO2023221966 A1 WO 2023221966A1 CN 2023094462 W CN2023094462 W CN 2023094462W WO 2023221966 A1 WO2023221966 A1 WO 2023221966A1
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WIPO (PCT)
Prior art keywords
bytes
data frame
overhead
time slot
indication information
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PCT/CN2023/094462
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English (en)
French (fr)
Inventor
孙亮
苏伟
维瑟斯马腾•佩特鲁斯•约瑟夫
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority claimed from CN202210957858.1A external-priority patent/CN117135498A/zh
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Publication of WO2023221966A1 publication Critical patent/WO2023221966A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems

Definitions

  • the present application relates to the field of optical communications, and more specifically, to a method and device for transmitting data.
  • OTN optical transport network
  • This application provides a data transmission method and device that can realize a small-bandwidth business data channel and at the same time enable the bandwidth to be flexibly defined according to different scene requirements.
  • the data frame is redesigned to reduce the delay of certain overheads and improve the statistical accuracy of overheads.
  • embodiments of the present application provide a method for transmitting data.
  • This method can be executed by the sending device or by a component of the sending device (such as a chip or a chip system, etc.), which is not limited in this application.
  • the method includes: mapping service data into a data frame and sending the data frame.
  • the data frame includes K time slot blocks, each time slot block of the K time slot blocks includes M bits and N*X bytes, and M1 bits among the M bits are used for Carrying N first indication information, each of the N first indication information is used to respectively indicate that the object carried by each X byte of N*X bytes includes at least service data or padding.
  • K is an integer greater than or equal to 1
  • N is an integer greater than or equal to 1
  • X is an integer greater than
  • M is an integer greater than or equal to N
  • M1 is less than M.
  • time slot block may also be called a resource unit or resource block, or with the development of technology, other names may exist, which are also applicable to this application.
  • the data frame may be an OTN frame or a metro transport network (metro transport network, MTN) frame.
  • MTN metro transport network
  • the first indication information used for the object carried by X bytes includes at least one of service data or padding, which can be divided into the following situations. Refers to the first information used to indicate that the objects carried by the corresponding X bytes are all data. Or the first information is used to indicate that the objects carried by the corresponding X bytes are all filled. The first information is used to indicate that the objects carried by the corresponding X bytes are only data and padding. Or the first information is used to indicate that the objects carried by the corresponding X bytes are data, padding, and other unmentioned information.
  • the second information when the first information is used to indicate that the objects carried by the corresponding
  • the second information may be used to indicate the number of service data in the object carried by X bytes or the second information may be used to indicate the number of padding in the object carried by X bytes.
  • preset information can also be used to indicate that the number of service data and padding carried by the X bytes is equal.
  • the "preset” may include predefined definitions, for example, protocol definitions. Among them, "pre-definition" can be realized by pre-saving corresponding codes, tables or other methods that can be used to indicate relevant information in the device. This application does not limit its specific implementation method.
  • the method of transmitting data is based on M bits + N*X byte time slots, so that the data frame supports X-byte small-granular time slots and supports low latency of small-granularity services. Low jitter, thereby providing better quality pipelines for customer operations.
  • the value of N can be flexibly selected according to system requirements to balance the storage delay caused by N Bytes indicate the overhead.
  • the first indication information indicates that the object carried by X bytes also includes second indication information, and the second indication information is located in the X bytes a specific byte, and the second indication information is used to indicate the number of bytes used to carry the service data among (X-1) bytes other than the specific byte.
  • the specific byte refers to that the second indication information is a specific position in the X byte, such as the first byte of the X byte or the last byte of the X byte or other
  • the position is not limited in this application, but it should be understood that for N X bytes, the position of the second indication information is the same, that is, the bytes occupied by the second indication information are among the X bytes. The location is fixed.
  • the second indication information is used to indicate the quantity of service data in the service pipeline, which is conducive to services that require clock recovery to perform clock recovery based on the number of data bytes in a unit time period.
  • the purpose of simplifying the chip is achieved through the code table of the second indication information.
  • bits in the specific bytes other than the bits occupied by the second indication information are used to correct transmission errors of the second indication information.
  • each X bytes among the N*X bytes is a time slot of the data frame.
  • N*X bytes the N*X bytes include N time slots.
  • Y*N*X bytes in Y adjacent time slot blocks are one time slot of the data frame, and the Y is An integer greater than or equal to 1. Based on this solution, according to different values of Y, time slot particles with a large bit width of Y*N*X can be realized, which improves the bandwidth capacity.
  • Z*N*X bytes in Z equally spaced time slot blocks are one time slot of the data frame, and Z is An integer greater than or equal to 1.
  • mixed time slots exist in the data frame, that is, the time slot includes Z*N*X bytes or the time slot is X bytes, that is, the bandwidth can be flexibly defined according to different scene requirements.
  • M2 bits among the M bits are used for error detection or correction of transmission errors of the N bits, where M2 is smaller than M.
  • the error detection information can be a cyclic redundancy check (CRC)
  • the correction information can be an instruction error correction technology (error checking and correcting).
  • the data frame further includes position indication information, and the position indication information is used to indicate a starting position of the time slot cycle.
  • the time slot period may be an optical channel service data tributary unit group (optical channel service data tributary unit group, OSTUG) or an optical channel data tributary unit group (optical channel data tributary unit group, ODTUG).
  • optical channel service data tributary unit group optical channel service data tributary unit group, OSTUG
  • optical channel data tributary unit group optical channel data tributary unit group, ODTUG
  • the number of bytes of the location indication information is 1 or 2.
  • the value of X is one of 8, 16, 24, and 32. It should be understood that for the small granularity bandwidth (for example, 10M) of service transmission with Considering the delay jitter in the chip and the implementation cost of the chip, the value of X can be 8, 16, 24, or 32.
  • the value of M is a multiple of 8. Based on the value of M, the control code of
  • the value can be determined based on the maximum allowable jitter of service transmission. For example, for OSU positioned for 10M granular service transmission, it is usually necessary to ensure that the service does not have excessive jitter on the transmission path and high-quality services require that the end-to-end (take 20 stations as an example) transmission delay jitter should not be greater than 500us.
  • the value of X will determine the transmission jitter and transmission delay of the 10M granularity service. Combined with the implementation cost of the chip, the value of
  • this application needs to balance overhead and delay when designing the values of M and N. For example, if 1 bit of first indication information is added for every X bytes to indicate at least one of data or padding, performing ECC protection on 1 bit of first indication information for each High overhead wastes transmission bandwidth, so N consecutive X-byte 1-bit control codes are placed together for ECC protection to reduce overhead waste. Since the centralized protection of N X bytes of control codes means that a storage delay of N X bytes will be introduced during data processing, the value of N needs to be balanced between overhead saving and delay increase. In addition, the M bits after adding the verification and error correction information to the centralized protection of N X-byte control codes should be multiples of 8 bits to facilitate the chip's delay processing.
  • the method can be executed by the sending device or by a component of the sending device (such as a chip or a chip system, etc.), which is not limited in this application.
  • the method includes: mapping service data into a first data frame, mapping the first data frame into one or more time slots of a second data frame, and sending the second data frame.
  • the payload area of the first data frame is used to carry the service data
  • the payload area of the first data frame includes at least one bearing unit
  • each bearing unit in the at least one bearing unit is associated with at least Corresponding to one check overhead
  • each check overhead in the at least one check overhead is used to perform bit interleaving parity check on the corresponding bearer unit
  • the bit rate of the first data frame is less than 1.25Gbit/s.
  • the bearer unit is represented by at least one area divided into the first data frame, which may also be called an area, an interval, a block, a short frame, etc., and is not limited in this application. .
  • the payload area of the data frame is divided into shorter intervals, so that the transmission delay of the verification overhead corresponding to the interval is reduced, and the school is improved at once. For the purpose of verifying the statistical accuracy of overhead.
  • the at least one verification overhead is located in the overhead area of the first data frame, and the at least one bearing unit is used to carry the service data. It should be understood that under this solution, the bearer unit is only used to carry service data, that is, it only includes a payload area.
  • the bearer unit includes an overhead area and a payload area, and the at least one verification overhead is located in the overhead area of the bearer unit. It should be understood that under this solution, the bearer unit is used not only to carry service data but also to carry verification overhead, that is, the bearer unit includes a payload area and an overhead area.
  • the overhead area of the bearer unit further includes at least one of protection switching overhead or mapping overhead.
  • the check overhead is X-bit interleaved parity BIP-8.
  • the overhead area of the first data frame includes path monitoring (PM) overhead, tandem connection monitoring 1 (TCM1) overhead, and tandem connection monitoring 2 (TCM2) overhead. and delay measurement overhead.
  • PM path monitoring
  • TCM1 tandem connection monitoring 1
  • TCM2 tandem connection monitoring 2
  • the frame structure of the first data frame is 4 rows*3824 column bytes or 2 rows*3824 column bytes.
  • the first data frame provided by the embodiment of the present application may be a structure of multiplexed ODU data frames, which is a modification of the ODU data frames.
  • embodiments of the present application provide a method for transmitting data.
  • the method may be executed by the receiving device or by a component of the receiving device (such as a chip or a chip system, etc.), which is not limited in this application.
  • the method includes: receiving a data frame, and demapping the service data from the data frame according to the N pieces of first indication information.
  • the data frame includes K time slot blocks, each time slot block of the K time slot blocks includes M bits and N*X bytes, and M1 bits among the M bits are used for Carrying N first indication information, each of the N first indication information is used to respectively indicate that the object carried by each X byte of N*X bytes includes at least service data or padding.
  • K is an integer greater than or equal to 1
  • N is an integer greater than or equal to 1
  • X is an integer greater than
  • M is an integer greater than or equal to N
  • M1 is less than M.
  • the first indication information indicates that the object carried by X bytes also includes second indication information, and the second indication information is located in the X bytes a specific byte, and the second indication information is used to indicate the number of bytes used to carry the service data among (X-1) bytes other than the specific byte.
  • bits in the specific bytes other than the bits occupied by the second indication information are used to correct transmission errors of the second indication information.
  • each X bytes among the N*X bytes is a time slot of the data frame.
  • Y*N*X bytes in Y adjacent time slot blocks are one time slot of the data frame, and the Y is An integer greater than or equal to 1.
  • the Z*N*X bytes in the Z equally spaced time slot blocks are one time slot of the data frame, and the Z is An integer greater than or equal to 1.
  • M2 bits among the M bits are used for error detection or correction of transmission errors of the N bits, where M2 is smaller than M.
  • the data frame further includes position indication information, and the position indication information is used to indicate the starting position of the time slot cycle.
  • the number of bytes of the location indication information is 1 or 2.
  • the value of X is one of 8, 16, 24, and 32.
  • the value of M is a multiple of 8.
  • embodiments of the present application provide a method for transmitting data.
  • the method may be executed by the receiving device or by a component of the receiving device (such as a chip or a chip system, etc.), which is not limited in this application.
  • the method includes receiving a first data frame, the first data frame including one or more time slots. Demap a second data frame from the first data frame, and demap the service data from the second data frame. Wherein, the payload area of the second data frame is used to carry service data, the payload area of the second data frame includes at least one bearing unit, and each bearing unit in the at least one bearing unit is associated with at least one calibration unit.
  • each verification overhead in the at least one verification overhead is used to perform a bit interleaved parity check on the corresponding bearer unit, and the bit rate of the first data frame is less than 1.25Gbit/s.
  • the at least one verification overhead is located in an overhead area of the first data frame, and the at least one bearing unit is used to carry the service data.
  • the bearer unit includes an overhead area and a payload area, and the at least one verification overhead is located in the overhead area of the bearer unit.
  • the overhead area of the bearer unit further includes at least one of protection switching overhead or mapping overhead.
  • the check overhead is X-bit interleaved parity BIP-8.
  • the overhead area of the first data frame includes path monitoring (PM) overhead, tandem connection monitoring 1 (TCM1) overhead, and tandem connection monitoring 2 (TCM2) overhead. and delay measurement overhead.
  • PM path monitoring
  • TCM1 tandem connection monitoring 1
  • TCM2 tandem connection monitoring 2
  • the frame structure of the first data frame is 4 rows*3824 column bytes or 2 rows*3824 column bytes.
  • embodiments of the present application provide a device for transmitting data.
  • the device is used to perform the method provided in the first aspect or to perform the method provided in the second aspect.
  • the device for transmitting data may include a unit and/or module for executing the method provided by the first aspect or any of the above implementations of the first aspect, or the device for transmitting data may include a unit for executing the first aspect.
  • the units and/or modules of the method provided by the second aspect or any of the above implementations of the second aspect such as the processing module and the transceiver module.
  • the device for transmitting data may include units and/or modules for executing the first aspect or the method provided by any of the above implementations of the first aspect, or may include units and/or modules for executing the second aspect or
  • the unit and/or module of the method provided by any of the above implementations of the second aspect is the sending end device.
  • the transceiver module can be a transceiver, or an input/output interface.
  • the processing module may be at least one processor.
  • the transceiver may be a transceiver circuit.
  • the input/output interface may be an input/output circuit.
  • the device for transmitting data is a chip, chip system or circuit in the sending device.
  • the transceiver module may be an input/output interface, interface circuit, output circuit, input circuit, pin or related circuit on the chip, chip system or circuit.
  • the processing module may be at least one processor, processing circuit or logic circuit, etc.
  • beneficial effects of the method shown in the above fifth aspect and its possible designs can be referred to the beneficial effects of the first aspect and its possible designs or to the beneficial effects of the second aspect and its possible designs.
  • embodiments of the present application provide a device for transmitting data.
  • the device is used to perform the method provided in the above third aspect or to perform the method provided in the above fourth aspect.
  • the device for transmitting data may include units and/or modules for performing the method provided by the third aspect, or the device for transmitting data may include units and/or modules for performing the method provided by the fourth aspect. , such as processing module and transceiver module.
  • the device for transmitting data is a receiving end device.
  • the transceiver can be a transceiver, or an input/output interface.
  • the processing module may be at least one processor.
  • the transceiver may be a transceiver circuit.
  • the input/output interface may be an input/output circuit.
  • the device for transmitting data is a chip, chip system or circuit in the receiving end device.
  • the transceiver module may be an input/output interface, interface circuit, output circuit, input circuit, pin or related circuit on the chip, chip system or circuit.
  • the processing module may be at least one processor, processing circuit or logic circuit, etc.
  • embodiments of the present application provide a processor for executing the methods provided in the above aspects.
  • processor output, reception, input and other operations can be understood as processor output, reception, input and other operations.
  • transmitting and receiving operations performed by the radio frequency circuit and the antenna, which is not limited in this application.
  • embodiments of the present application provide a computer-readable storage medium.
  • the computer-readable storage medium stores program code for device execution, and the program code includes the method provided by any one of the implementations of the first aspect, the second aspect, the third aspect, or the fourth aspect.
  • embodiments of the present application provide a computer program product containing instructions.
  • the computer program product When the computer program product is run on a computer, the computer is caused to execute the method provided by any one of the implementations of the first aspect, the second aspect, the third aspect, or the fourth aspect.
  • embodiments of the present application provide a chip.
  • the chip includes a processor and a communication interface.
  • the processor reads instructions stored in the memory through the communication interface and executes the above first aspect or the second aspect or the third aspect or Method provided by any implementation of the fourth aspect.
  • the chip also includes a memory, in which computer programs or instructions are stored.
  • the processor is used to execute the computer programs or instructions stored in the memory.
  • the processor is used to execute The method provided by any implementation of the second aspect, the second aspect, the third aspect, or the fourth aspect.
  • embodiments of the present application provide a communication system including at least two devices for transmitting data described in the fifth aspect.
  • embodiments of the present application provide a method for transmitting data.
  • This method can be executed by the sending device or by a component of the sending device (such as a chip or a chip system, etc.), which is not limited in this application.
  • the method includes: mapping service data into a data frame and sending the data frame.
  • the data frame includes K time slot blocks, each of the K time slot blocks includes M bits and N*X bytes, and the M bits are used to carry N first Indication information, each of the N first indication information is used to respectively indicate that the object carried by each X byte of N*X bytes includes at least one of service data or padding.
  • K is an integer greater than or equal to 1
  • N is an integer greater than or equal to 1
  • X is an integer greater than 1
  • M is an integer greater than or equal to N.
  • the N is equal to 1.
  • the first indication information indicates that the object carried by X bytes also includes second indication information.
  • the second indication information is located in a specific byte among the X bytes, and the second indication information is used to indicate that (X-1) bytes other than the specific byte are used to carry all Bytes describing business data Number of numbers.
  • bits in the specific bytes other than the bits occupied by the second indication information are used to correct the transmission of the second indication information. mistake.
  • the value of M is a multiple of 2.
  • the M bits are divided into N groups, and the bits included in each group of the N groups are used to carry the N first indications.
  • An instructional message within a message is used to carry the N first indications.
  • the value of M is 2, the value of X is 16, and the value of N is 1.
  • each X bytes among the N*X bytes is a time slot of the data frame.
  • Y*N*X bytes in Y adjacent blocks of time slots are one time slot of the data frame, and the Y is an integer greater than or equal to 1.
  • the Z*N*X bytes in the Z equally spaced time slot blocks are one time slot of the data frame, and the Z is an integer greater than or equal to 1.
  • the data frame further includes location indication information, where the location indication information is used to indicate a starting position of the timeslot cycle.
  • the number of bytes of the location indication information is 1 or 2.
  • the value of X is one of 8, 16, 24, and 32.
  • embodiments of the present application provide a method of transmitting data.
  • the method may be executed by the receiving device or by a component of the receiving device (such as a chip or a chip system, etc.), which is not limited in this application.
  • This includes: receiving a data frame, and demapping the service data from the data frame according to N pieces of first indication information.
  • the data frame includes K time slot blocks, each of the K time slot blocks includes M bits and N*X bytes, and the M bits are used to carry N first Indication information, each of the N first indication information is used to respectively indicate that the object carried by each X byte of N*X bytes includes at least one of service data or padding, where K is an integer greater than or equal to 1, N is an integer greater than or equal to 1, X is an integer greater than 1, and M is an integer greater than or equal to N.
  • the N is equal to 1.
  • the first indication information indicates that the object carried by X bytes also includes second indication information, and the second indication information is located in the A specific byte in the section, the second indication information is used to indicate the number of bytes used to carry the service data among the (X-1) bytes except the specific byte.
  • bits in the specific bytes other than the bits occupied by the second indication information are used to correct the transmission of the second indication information. mistake.
  • the value of M is a multiple of 2.
  • the M bits are divided into N groups, and the bits included in each group of the N groups are used to carry the N first indications.
  • An instructional message within a message is used to carry the N first indications.
  • the value of M is 2, the value of X is 16, and the value of N is 1.
  • each X bytes among the N*X bytes is a time slot of the data frame.
  • Y*N*X bytes in Y adjacent blocks of time slots are one time slot of the data frame, and the Y is an integer greater than or equal to 1.
  • Z*N*X bytes in Z equally spaced time slot blocks are one time slot of the data frame, and the Z is an integer greater than or equal to 1.
  • the data frame further includes position indication information, and the position indication information is used to indicate the starting position of the timeslot cycle.
  • the number of bytes of the location indication information is 1 or 2.
  • the value of X is one of 8, 16, 24, and 32.
  • embodiments of the present application provide a device for transmitting data.
  • the device is used to perform the method provided in the twelfth aspect above.
  • the device for transmitting data may include units and/or modules for executing the method provided by the twelfth aspect or any one of the above implementations of the twelfth aspect.
  • the device for transmitting data may include a unit and/or module for performing the method provided by the twelfth aspect or any one of the above implementations of the twelfth aspect, and is a sending end device.
  • the transceiver module can be a transceiver, or an input/output interface.
  • the processing module may be at least one processor.
  • the transceiver may be a transceiver circuit.
  • the input/output interface may be an input/output circuit.
  • the device for transmitting data is a chip, chip system or circuit in the sending device.
  • the transceiver module may be an input/output interface, interface circuit, output circuit, input circuit, pin or related circuit on the chip, chip system or circuit.
  • the processing module may be at least one processor, processing circuit or logic circuit, etc.
  • embodiments of the present application provide a device for transmitting data.
  • the device is used to perform the method provided in the thirteenth aspect.
  • the device for transmitting data may include units and/or modules for executing the method provided in the thirteenth aspect.
  • the device for transmitting data is a receiving end device.
  • the transceiver can be a transceiver, or an input/output interface.
  • the processing module may be at least one processor.
  • the transceiver may be a transceiver circuit.
  • the input/output interface may be an input/output circuit.
  • the device for transmitting data is a chip, chip system or circuit in the receiving end device.
  • the transceiver module may be an input/output interface, interface circuit, output circuit, input circuit, pin or related circuit on the chip, chip system or circuit.
  • the processing module may be at least one processor, processing circuit or logic circuit, etc.
  • embodiments of the present application provide a processor for executing the method provided in the twelfth aspect or the method provided in the thirteenth aspect.
  • processor output, reception, input and other operations can be understood as processor output, reception, input and other operations.
  • transmitting and receiving operations performed by the radio frequency circuit and the antenna, which is not limited in this application.
  • embodiments of the present application provide a computer-readable storage medium.
  • the computer-readable storage medium stores program code for device execution, and the program code includes the method provided by any one of the above-mentioned implementations of the twelfth or thirteenth aspect.
  • embodiments of the present application provide a computer program product containing instructions.
  • the computer program product When the computer program product is run on a computer, the computer is caused to execute the method provided by any one of the implementations of the twelfth aspect or the thirteenth aspect.
  • embodiments of the present application provide a chip.
  • the chip includes a processor and a communication interface.
  • the processor The instructions stored in the memory are read through the communication interface, and the method provided by any one of the above-mentioned implementations of the twelfth aspect or the thirteenth aspect is executed.
  • the chip also includes a memory, in which computer programs or instructions are stored.
  • the processor is used to execute the computer programs or instructions stored in the memory.
  • the processor is used to execute The method provided by any implementation of the twelfth aspect or the thirteenth aspect.
  • Figure 1 is a schematic diagram of a possible application scenario according to the embodiment of the present application.
  • Figure 2 is a schematic diagram of a possible network device hardware structure.
  • Figure 3 is a schematic diagram of the frame structure of an OTN frame.
  • Figure 4 is a schematic structural diagram of a 65-byte time slot block provided by an embodiment of the present application.
  • FIG. 5 is a diagram showing the first 16-byte width code provided by the embodiment of the present application.
  • FIG. 6 is a schematic diagram of the optical transport network data OTN frame structure corresponding to FIG. 4 provided by an embodiment of the present application.
  • Figure 7 is a schematic structural diagram of a 129-byte time slot block provided by an embodiment of the present application.
  • FIG. 8 is a 32-byte width code representation diagram provided by an embodiment of the present application.
  • Figure 9 is a schematic structural diagram of an 82-byte time slot block provided by an embodiment of the present application.
  • Figure 10 is a schematic structural diagram of a 162-byte time slot block provided by an embodiment of the present application.
  • Figure 11 is a schematic structural diagram of a 97-byte time slot block provided by an embodiment of the present application.
  • Figure 12 is a schematic structural diagram of an OTN data frame of adjacent 3*65 byte time slot blocks provided by an embodiment of the present application.
  • Figure 13 is a schematic structural diagram of a 192-byte time slot block provided by an embodiment of the present application.
  • Figure 14 is a schematic diagram of the OTN data frame structure of a fixed-interval 3*65-byte time slot block provided by an embodiment of the present application.
  • Figure 15 is a schematic diagram of the mapping hierarchy of the ODUnew frame provided by the embodiment of the present application.
  • Figure 16 is a schematic diagram of the first ODUnew frame structure provided by the embodiment of the present application.
  • Figure 17 is a schematic structural diagram of a carrying unit provided by an embodiment of the present application.
  • Figure 18 is a schematic diagram of the overhead of the bearer unit overhead area provided by the embodiment of the present application.
  • Figure 19 is a schematic diagram of the overhead area of the first ODUnew frame structure provided by the embodiment of the present application.
  • Figure 20 is a schematic diagram of the overhead area of the second ODUnew frame structure provided by the embodiment of the present application.
  • Figure 21 is a schematic diagram of the second ODUnew frame structure provided by the embodiment of the present application.
  • Figure 22 is a schematic flow chart of a data transmission method 2200 provided by an embodiment of the present application.
  • Figure 23 is a schematic flow chart of another data transmission method 2300 provided by an embodiment of the present application.
  • Figure 24 is a schematic structural diagram of a communication device provided by an embodiment of the present application.
  • Figure 25 is a diagram showing the second code representation of 16-byte width provided by the embodiment of the present application.
  • Figure 26 is a schematic structural diagram of a 130-bit time slot block provided by an embodiment of the present application.
  • Figure 27 is a schematic diagram of a time slot arrangement provided by an embodiment of the present application.
  • words such as “exemplary” or “for example” are used to express examples, illustrations or illustrations, and embodiments or designs described as “exemplary” or “for example” should not are to be construed as preferred or advantageous over other embodiments or designs.
  • the use of words such as “exemplary” or “such as” is intended to present related concepts in a concrete manner that is easier to understand.
  • service data refers to services carried by the optical transmission network or the metropolitan area transmission network.
  • it can be Ethernet services, packet services, wireless backhaul services, etc.
  • Business data can also be called business signals, customer data or customer business data. It should be understood that the type of service data is not limited in the embodiment of this application.
  • for instructions may include direct instructions and indirect instructions.
  • information when describing certain information to indicate A, it may include that the information directly indicates A or indirectly indicates A, but it does not mean that the information must contain A.
  • the character "*" is an operation symbol, indicating product.
  • optical transport network optical transport network
  • An OTN is usually composed of multiple devices connected through optical fibers, and can be formed into different topology types such as linear, ring, and mesh according to specific needs.
  • the OTN 100 shown in Figure 1 consists of 8 OTN devices 101, namely devices A-H. Among them, 102 indicates the optical fiber, used to connect two devices; 103 indicates the customer service interface, used to receive or send customer service data. As shown in Figure 1, OTN 100 is used to transmit business data for customer devices 1-3. Customer equipment is connected to OTN equipment through customer service interfaces. For example, in Figure 1, client devices 1-3 are connected to OTN devices A, H and F respectively.
  • OTN equipment is divided into optical layer equipment, electrical layer equipment and optical and electrical hybrid equipment.
  • Optical layer equipment refers to equipment that can process optical layer signals, such as: optical amplifier (optical amplifier, OA), optical add-drop multiplexer (optical add-drop multiplexer, OADM).
  • OA also known as optical line amplifier (OLA)
  • OLA optical line amplifier
  • OADM is used to spatially transform optical signals so that they can be output from different output ports (sometimes called directions).
  • Electrical layer equipment refers to equipment that can process electrical layer signals, such as equipment that can process OTN signals.
  • Optoelectronic hybrid equipment refers to equipment that has the ability to process optical layer signals and electrical layer signals. It should be noted that, depending on specific integration needs, an OTN device can integrate a variety of different functions. The technical solution provided in this application is suitable for OTN equipment containing electrical layer functions of different forms and integration levels.
  • the data frame structure used by the OTN device in the embodiment of this application is an OTN frame, which is used to carry various business data and provide rich management and monitoring functions.
  • the OTN frame can be an optical data unit frame (Optical Data Unit k, ODUk), ODUCn, ODUflex, or an optical channel transmission unit k (optical transport unit k, OTUk), OTUCn, or a flexible OTN (FlexO) frame, etc.
  • the difference between an ODU frame and an OTU frame is that an OTU frame includes an ODU frame and an OTU overhead.
  • ODU frame refers to any one of ODUk, ODUCn or ODUflex
  • OTU frame refers to any one of OTUk, OTUCn or FlexO. It should also be pointed out that with the development of OTN technology, new types of OTN frames may be defined, which are also applicable to this application.
  • FIG. 2 is a schematic diagram of a possible network device hardware structure.
  • the OTN device 200 includes a tributary board 201, a cross-connect board 202, a circuit board 203, an optical layer processing single board (not shown in the figure) and a system control board. Control and communication single board 204.
  • network equipment may contain different types and numbers of boards.
  • a network device serving as a core node does not have a tributary board 201 .
  • a network device serving as an edge node has multiple tributary boards 201 or no optical cross-connect board 202 .
  • network equipment that only supports electrical layer functions may not have optical layer processing boards.
  • the branch board 201, the cross-connect board 202 and the circuit board 203 are used to process the electrical layer signals of the OTN.
  • the tributary board 201 is used to realize the reception and transmission of various customer services, such as SDH services, packet services, Ethernet services and fronthaul services.
  • the tributary board 201 can be divided into a client-side optical transceiver module and a signal processor.
  • the client-side optical transceiver module can also be called an optical transceiver and is used to receive and/or send service data.
  • the signal processor is used to implement mapping and demapping of business data to data frames.
  • the cross-connect board 202 is used to realize the exchange of data frames and complete the exchange of one or more types of data frames.
  • the circuit board 203 mainly implements the processing of line-side data frames.
  • the circuit board 203 can be divided into a line-side optical module and a signal processor.
  • the line side optical module can be called an optical transceiver and is used to receive and/or send data frames.
  • the signal processor is used to implement multiplexing and demultiplexing, or mapping and demapping processing of data frames on the line side.
  • the system control and communication single board 204 is used to implement system control. Specifically, information can be collected from different boards, or control instructions can be sent to the corresponding boards.
  • a specific component such as a signal processor
  • each channel of business periodically transmits data according to the high-level defined time slot width.
  • the OSU time slot width can be 192 bytes.
  • the data transmission cycle is 148us.
  • the current TDM scheduling scheme based on OSU with a 192-byte time slot width has the problem of large transmission delay of small-bandwidth client signals.
  • the embodiment of the present application redefines a data frame division method based on the current OTN frame structure and OSU frame structure to reduce the delay of OTN equipment transmitting small bandwidth services in TDM mode.
  • FIG 3 is a schematic diagram of the frame structure of an OTN frame.
  • the OTN frame is a frame structure with four rows and multiple columns, including an overhead area, a payload area, and a Forward Error Correction (FEC) area.
  • FEC Forward Error Correction
  • the payload area of the OTN frame is divided into multiple payload blocks (Payload Block, PB).
  • PB payload Block
  • Each PB occupies a fixed-length (also called size) position in the payload area, such as 128 bytes.
  • the overhead that an OTN frame may include is shown in Table 1 below.
  • OTN frame structure is only an example.
  • Other deformed OTN frames are also applicable to this application.
  • OTN frames that do not contain the FEC area are also applicable to this application.
  • OTN frames that do not contain the FEC area are also applicable to this application.
  • OTN frames that do not contain the FEC area are also applicable to this application.
  • OTN frames that do not contain the FEC area are also applicable to this application.
  • Another example is a frame structure with a different number of rows and columns than the OTN frame 302.
  • PB can also be called a time slot, a time slot block, a time slice, etc. This application does not restrict its name.
  • Figure 4 is a schematic structural diagram of a 65-byte time slot block provided by an embodiment of the present application.
  • the corresponding OTN data frame structure is a data frame structure of 65-byte time slot blocks (also called resource blocks or resource units), and its time slot width is 16 bytes.
  • the structure of the 65-byte time slot block is defined as consisting of an independent byte and four 16-byte blocks.
  • the 4 bits contained in an independent 1 byte are used to independently indicate that the object carried in each 16 bytes includes data or At least one of the padding. That is, an independent bit is used to indicate the object carried by every 16 bytes. This indication bit can be called a control code.
  • the second information can be used to indicate the size of the service data (for example, the number of bytes) in the object carried in 16 bytes or the second information can be used to indicate the padding in the object carried in 16 bytes.
  • the size (such as the number of bytes, or the number of two bytes, or the number of bits, etc.).
  • 8 bits contained in an independent 1 byte can be used to independently indicate that the object carried in each 16 bytes includes data or At least one of the padding. That is, two bits are used to indicate the object carried by every 16 bytes, that is, the control code corresponding to each 16 bytes is two bits. At this time, 2 bits are used to independently indicate that the object carried in the corresponding 16 bytes includes at least one of data or padding, which can also be divided into the above four situations, which will not be described again here.
  • the OTN frame can also be divided using an independent time slot block interleaving method, for example, using a 130-bit time slot block interleaving method.
  • the time slot block division of the OTN frame can be as shown in Figure 26.
  • each 130-bit time slot block contains a 2-bit control indication and a 128-bit (16-byte) payload.
  • Figure 27 illustrates the time slot arrangement.
  • the OPU frame is divided into P time slots, and each time slot block is 130 bits.
  • a code table as shown in Figure 5 can be established for indication.
  • the 1-bit control code when the 1-bit control code is 0, it means that all 16 bytes are data.
  • the 1-bit control code is 1, the first byte in the 16 bytes is defined as the second indication information (extended control code in Figure 5), which contains a 4-bit valid data quantity indication, and a 4-bit Check information, the 4-bit valid data amount indicates the number of bytes carrying service data in the remaining 15 bytes.
  • a 4-bit padding quantity may also be used to indicate the number of bytes carrying padding in the remaining 15 bytes, which is not limited in this application.
  • the number of bits indicating padding or data in the above-mentioned second indication information is only an example and not a limitation. That is, other numbers of bits can be used for indication, which is not limited by this application.
  • a code table as shown in Figure 25 can be established for indication. Specifically, when the value of the 2-bit control code is 01, it means that all 16 bytes are data. When the value of the 2-bit control code is 10, it indicates that all or part of the 16 bytes are padding. When part of the 16 bytes is marked as padding, the first byte in the 16 bytes can be further defined as the second Indication information (extended control code C1 in Figure 25), which includes a 4-bit valid data quantity indication and 4-bit check information. The 4-bit valid data quantity indicates the remaining 15 bytes carrying service data. The number of bytes. It should be understood that a 4-bit padding quantity may also be used to indicate the number of bytes carrying padding in the remaining 15 bytes, which is not limited in this application.
  • the bytes used to carry the filling can also be defined as other indication information or control information, that is, the bytes used for the filling are used to transmit other indication information or control information.
  • the second byte among the 2-16 bytes indicates the type of the time slot in which the 16 bytes are located, for example, the time slot is an added time slot or a deleted time slot.
  • an indication field may be defined to indicate that the time slot in which the 16 bytes are located is a sending time slot or a receiving time slot.
  • a field used to indicate the identification of the time slot in which the 16 bytes are located may also be defined.
  • an indication field corresponding to the transmission error of the indication field can be added to the defined indication field to carry error correction indication information for correcting the transmission error of the defined indication field.
  • Figure 25 is only an example, and this application does not limit the position of the bytes occupied by each indication field. For example, more bits may be used to indicate an object carried by 16 bytes. When the number of indication bits is greater than 2 bits, error correction protection can also be performed on the 2-bit indication information.
  • the specific values of the 2 bits can be 01 and 10, or 00 and 11 to maintain the Hamming distance between the two values The distance is 2.
  • the use of single-bit instructions can save overhead and thereby improve the efficiency of data transmission.
  • an independent 1 byte is used to indicate that the corresponding 15-byte object carries only data and padding, such as The values of the extended control codes in the code table shown in Figure 5 are the same.
  • preset information can also be used to indicate that the number of service data and padding carried by the X bytes is equal to simplify the code table.
  • this independent byte can also use Hamming Code (HAMMING Code) HAMMING (8,4) encoding to perform error correction protection on the 4 independently indicated bits, or can use CRC code for error detection .
  • HAMMING Code Hamming Code
  • HAMMING (8,4) encoding to perform error correction protection on the 4 independently indicated bits, or can use CRC code for error detection .
  • the time slot blocks can be divided according to one line, which can be divided into 58 time slot blocks. For the remaining 65 bytes in a frame, all the remaining bytes can be used. For load-bearing filling. At this time, an OTN frame can be divided into 232 time slot blocks as shown in Figure 4, and 8 bits in columns 15 and 16 of a row can be used to indicate the starting position of each time slot block cycle.
  • FIG. 7 is a schematic structural diagram of a 129-byte time slot block provided by an embodiment of the present application.
  • the corresponding OTN data frame structure is a data frame structure of 129-byte time slot blocks.
  • the structure of the 129-byte time slot block is defined as an independent byte and four 32-byte blocks. Among them, the 4 bits contained in an independent 1 byte are used to independently indicate that the object carried in each 32 bytes includes at least one of data or padding.
  • the independent 1 byte can still use HAMMING (8,4) encoding to perform error correction protection on the 4 independently indicated bits, or it can be used CRC code for error detection.
  • a codebook composed of a 1-bit control code and a 4-bit extended control code is used to indicate that the object carried in each 32 bytes includes at least one of data or padding. It can be shown in Figure 8.
  • a 1-bit extension code is used to indirectly indicate the number of bytes carrying service data. That is, by defining the minimum value of valid data in a 32-byte time slot, using a 1-bit spreading code only indicates the amount of increase relative to the minimum value of valid data.
  • Figures 9 and 10 are respectively schematic structural diagrams of an 82-byte time slot block and a 162-byte time slot block provided by the embodiment of the present application.
  • Figure 9 uses 8-byte interleaving mode
  • Figure 10 uses 16-byte interleaving mode.
  • 10 bits are used to indicate each 8 bytes.
  • Figure 11 is a schematic structural diagram of a 97-byte time slot block provided by an embodiment of the present application.
  • the time slot of the corresponding OTN data frame is 24 bytes.
  • the frame structure of the OTN frame can be divided into multiple time slot blocks as shown in Figure 11. Among them, the 4 bits contained in 1 byte are used in the time slot block to independently indicate that the object carried in each 24 bytes is data or padding.
  • HAMMING(8,4) can be used to perform error correction protection on 4 independently indicated bits.
  • the embodiment of this application also provides a schematic diagram of the OTN data frame structure of a 3*65-byte time slot block as shown in Figure 12.
  • Figure 12 three adjacent 65 bytes form a new slot block structure.
  • the time slot of the OTN frame is 3*4*16, and the structure is shown in Figure 13.
  • Figure 13 192 bytes are used to carry data or padding, and 12 bits of 3 bytes are used to indicate the object carried by each 16 bytes.
  • the indication method of the 12 bits is the same as the indication method of the 65-byte time slot block shown in Figure 4, that is, each bit is used to independently indicate the object carried by the 16 bytes,
  • the instruction process can be referred to the relevant description in Figure 5 and will not be described again here.
  • the values of the 12 bits remain consistent. At this time, it indicates that the objects carried by the 192 bytes are the same.
  • adjacent first time slot blocks are defined as time slots with a larger bit width.
  • first time slot blocks at fixed intervals can also be combined into A time slot with a larger bit width, as shown in Figure 14.
  • 120 16-byte slots can be divided into the OPU0 area of ODU0. Assuming that the bandwidth corresponding to each 16-byte slot is 10M, the 65-byte first slot block will constitute a 40M bandwidth slot. , at this time, three 65 bytes with an interval of 40 can be logically defined as a 120M bandwidth time slot.
  • Figures 12 and 14 only select three 65-byte time slot blocks to define large bit width time slots.
  • the division of byte time slot blocks, the 162-byte time slot block shown in Figure 10, the 97-byte time slot block shown in Figure 11, and other time slot blocks listed in this application can all be divided as shown in Figure 12
  • the large bit-width time slot defined by bundling Y adjacent first time slot blocks, or the large bit-width time slot defined by bundling Z time slot blocks at fixed intervals as shown in Figure 14 can be used.
  • embodiments of the present application also provide an OTN frame structure.
  • this application uses ODUnew as the OTN frame for description. It should be noted that this name is only an example and does not limit the frame structure defined in this application.
  • the ODUnew may be a structure of 2 rows*3824 column bytes, or a structure of 4 rows*3824 column bytes.
  • an ODUnew frame with a byte structure of 4 rows*3824 columns is used as an example for explanation.
  • Figure 15 is a schematic diagram of adding the mapping level of the ODUnew frame. Specifically, as shown in Figure 15, business data is mapped to ODUnew, and then ODUnew is mapped to ODUflex, where ODUflex can be the above-mentioned method according to Figure 4, Figure 6, Figure 7, Figure 9 to Figure 11, Figure 12 or Figure 13 OTN frames divided into time slot blocks, and other OTN frames that meet the time slot block division requirements and are not described in detail in the embodiments of this application.
  • FIG 16 is a schematic diagram of the frame structure of the first ODUnew provided by the embodiment of the present application.
  • the ODUnew frame has a structure of 4 rows and 3824 columns of bytes, including the overhead area (the first 16 columns of 4 rows) and the payload area (the 17th to 3824th column of 4 rows).
  • Each of the payload area The row consists of two carrying units.
  • each bearer unit may correspond to at least one check overhead, and the check overhead area is used to perform bit-interleaved parity check on the corresponding bearer unit.
  • the bearer unit is represented by at least one area divided into the first data frame.
  • a domain may also be called an area, an interval, a block, a short frame, etc., and is not limited in this application.
  • the verification overhead may be BIP-X, such as BIP-8. This application is not limited.
  • the bearer unit can be divided into an overhead area and a payload area, and the overhead area of the bearer unit includes at least one verification overhead.
  • the overhead area of the bearer unit includes 8 bytes (17 to 24 columns), and the payload area includes 25 to 1920 columns.
  • the 8 bytes of the overhead area of the bearer unit can be defined as shown in Figure 18. Specifically, it includes 8-bit TCM2BIP8 overhead, 4-bit TCM2BEI overhead, 8-bit TCM1BIP8 overhead, 4-bit TCM1BEI overhead, 8-bit PM BIP8 overhead, 4-bit PM BEI overhead, 8-bit APS overhead and 20-bit mapping overhead.
  • the overhead area of a certain bearer unit is used to verify the objects carried by the payload area in the bearer unit transmitted before it. .
  • the OTN frame defines the overhead area of the low-speed pipeline in the payload area, that is, the overhead area of the bearer unit, through the bearer
  • the unit's overhead area raises the transmission time and statistical accuracy requirements for overheads such as APS, BIP8, and mapping.
  • the overhead area of the ODUnew frame shown in Figure 16 can reuse part of the ODUflex overhead in the current relevant standards, such as FAS/MFAS, PM, TCM1, TCM2, PM&TCM, GCC1, GCC2 and other overhead definitions, while adding nanosecond-level delay measurement (DM) overhead, as shown in Figure 19.
  • DM nanosecond-level delay measurement
  • the DM overhead in the embodiment of the present application is a more accurate delay measurement overhead.
  • the DM overhead may include a correction amount.
  • the correction amount is used to indicate that the receiving end receives the data frame sent by the transmitting end. The time to process this data frame. In other words, the correction amount is the period of time after the receiving end receives the data frame sent by the sending end and before sending a reply data frame to the sending end. Based on this DM overhead, the delay measurement of data frames can reach nanosecond level measurement, the results are more accurate, and the error of delay measurement is corrected.
  • the overhead area of the bearer unit shown in Figure 16 can be Reuse some of the ODUflex overhead in current relevant standards, such as FAS/MFAS, PM, PM&TCM, GCC1, GCC2 and other overhead definitions, while adding nanosecond-level DM overhead, and adding TCM2TTI, TCM1TTI and PM TTI overhead in the last line, and the remaining overhead Reserved, as shown in Figure 20.
  • current relevant standards such as FAS/MFAS, PM, PM&TCM, GCC1, GCC2 and other overhead definitions
  • nanosecond-level DM overhead and adding TCM2TTI, TCM1TTI and PM TTI overhead in the last line, and the remaining overhead Reserved, as shown in Figure 20.
  • 2 bytes of TCM1, 2 bytes of TCM2 and 2 bytes of PM overhead are set in each row and correspond to the current row.
  • the 2-byte PM overhead includes 8-bit BIP8 (used to verify the object carried in the range from 15 columns to 3824 in the previous row), 4-bit BEI/BIAE
  • FIG 21 is a schematic diagram of the frame structure of the second ODUnew provided by the embodiment of the present application.
  • the ODUnew frame has a structure of 4 rows and 3824 columns of bytes, including an overhead area (the first 4 rows and 16 columns) and a payload area (4 rows and 3824 columns).
  • Each row of the payload area includes a bearer unit.
  • the bearer unit of the second ODUnew frame can be defined as the structure shown in Figure 17, combined with the overhead area of the ODUnew frame shown in Figure 19.
  • the bearer unit of the second ODUnew frame can be defined as the overhead area only includes the mapping overhead, or the bearer unit is only the payload area of the ODUnew frame, combined with the overhead area of the ODUnew frame shown in Figure 20, which will not be described again here.
  • the overhead included in the overhead area of the 2-row * 3824-column byte structure ODUnew frame may be the same as the overhead included in the overhead area of the 4-row * 3824-column byte structure ODUnew frame, or less than 4 rows * 3824-column words.
  • Figure 22 shows a schematic flowchart of a data transmission method provided by this application.
  • the sending device can be OTN equipment, or executed by components of OTN equipment (such as chips or chip systems, etc.).
  • the receiving end device may be an OTN device, or may be executed by a component of the OTN device (such as a chip or chip system, etc.).
  • the method includes the following steps.
  • the sending end device maps the service data into a data frame.
  • the data frame includes K time slot blocks, where each time slot block of the K time slot blocks includes M bits and N*X bytes, M M1 bits among the bits are used to carry N pieces of first indication information, and each of the N pieces of first indication information is used to respectively indicate that the objects carried by each X byte of N*X bytes include At least one of business data or padding.
  • K is an integer greater than or equal to 1
  • N is an integer greater than or equal to 1
  • X is an integer greater than
  • M is an integer greater than or equal to N
  • M1 is less than M.
  • the sending device maps the service data to the OTN frame divided into time slot blocks according to any one of Figure 4, Figure 6, Figure 7, Figure 9 to Figure 11, Figure 12 or Figure 13 as mentioned above.
  • S2202 The sending device sends the data frame to the receiving device.
  • the receiving end device receives the data frame, and demaps the service data from the data frame according to the N pieces of first indication information.
  • Figure 23 shows a schematic flowchart of a data transmission method provided by this application.
  • the sending device may be an OTN device, or may be executed by a component of the OTN device (such as a chip or chip system, etc.).
  • the receiving end device may be an OTN device, or may be executed by a component of the OTN device (such as a chip or chip system, etc.).
  • the method includes the following steps.
  • the sending device maps the service data into the first data frame.
  • the payload area of the first data frame is used to carry the service data.
  • the payload area of the first data frame includes at least one bearer unit, and the payload area in the at least one bearer unit is Each bearer unit corresponds to at least one check overhead, and each check overhead in the at least one check overhead is used to perform bit interleaving parity check on the corresponding bearer unit.
  • the bit rate of the first data frame is less than 1.25 Gbit/s.
  • the sending device maps the service data into any OTN frame as shown in Figure 16 or Figure 21 above.
  • S2302 The sending device maps the first data frame into the second data frame.
  • the sending end device maps the first data frame to the OTN frame divided according to any one of the time slot blocks in FIG. 4, FIG. 6, FIG. 7, FIG. 9 to FIG. 11, FIG. 12 or FIG. 13.
  • the sending device sends the second data frame to the receiving device.
  • the receiving device receives the second data frame and demaps the first data frame from the second data frame.
  • S2305 The receiving device demaps the service data from the first data frame.
  • equipment in the existing network architecture is mainly used as an example for illustrative explanation (such as OTN equipment). It should be understood that the embodiments of the present application are not limited to the specific form of the equipment. For example, devices that can achieve the same functions in the future are applicable to the embodiments of this application.
  • the communication device provided by the embodiment of the present application will be described in detail below with reference to FIG. 24 . It should be understood that the description of the device embodiments corresponds to the description of the method embodiments. Therefore, for content that is not described in detail, please refer to the above method embodiments. For the sake of brevity, some content will not be described again.
  • Embodiments of the present application can divide the sending end device or the receiving end device into functional modules according to the above method examples.
  • each functional module can be divided corresponding to each function, or two or more functions can be integrated into one processing module. middle.
  • the above integrated modules can be implemented in the form of hardware or software function modules. It should be noted that the division of modules in the embodiment of the present application is schematic and is only a logical function division. In actual implementation, there may be other division methods. The following is an example of dividing each functional module according to each function.
  • Figure 24 is a schematic structural diagram of a possible network device.
  • network device 2400 includes a processor 2401, an optical transceiver 2402, and a memory 2403. Among them, memory 1603 is optional.
  • the network device 2400 can be applied to both the sending side device (for example, the network device 2400 can be the above-mentioned sending end device) and the receiving side device (for example, the network device 2400 can be the above-mentioned receiving end device).
  • the processor 2401 and the optical transceiver 2402 are used to implement the method performed by the sending-side device shown in FIG. 22 or FIG. 23 .
  • each step of the processing flow can complete the method performed by the sending device in the above figure through instructions in the form of hardware integrated logic circuits or software in the processor 2401.
  • the optical transceiver 2402 is used to receive and process the sent OTN frame to send to the opposite end device (also called the receiving end device).
  • the processor 2401 and the optical transceiver 2402 are used to implement the method performed by the receiving-side device shown in Figure 22 or Figure 23.
  • each step of the processing flow can be implemented by instructions in the form of hardware integrated logic circuits or software in the processor 2401 to complete the method executed by the receiving side device described in the preceding figures.
  • the optical transceiver 2402 is used to receive the OTN frame sent by the peer device (also called the transmitting device), and send it to the processor 2401 for subsequent processing.
  • Memory 2403 may be used to store instructions such that process 2401 may be used to perform steps as mentioned in the above figures. Alternatively, the storage 2403 can also be used to store other instructions to configure parameters of the processor 2401 to implement corresponding functions.
  • the processor 2401 and the memory 2403 may be located in a branch board, or may be located in a single board that combines a branch circuit and a line.
  • both the processor 2401 and the memory 2403 include multiple processors, which are respectively located on the branch circuit board and the circuit board, and the two boards cooperate to complete the foregoing method steps.
  • embodiments of the present application also provide a computer-readable storage medium.
  • the storage medium stores a software program.
  • the software program can implement the method provided by any one or more of the above embodiments.
  • the computer-readable storage medium may include: U disk, mobile hard disk, read-only memory, random access memory, magnetic disk or optical disk and other various media that can store program codes.
  • embodiments of the present application also provide a chip.
  • the chip includes a processor for implementing the functions involved in any one or more of the above embodiments, such as acquiring or processing the OTN frames involved in the above method.
  • the chip further includes a memory, and the memory is used for necessary program instructions and data executed by the processor.
  • the chip may be composed of chips or may include chips and other discrete devices.
  • processors mentioned in the embodiments of this application may be a central processing unit (CPU), or other general-purpose processor, digital signal processor (DSP), application specific integrated circuit ( application specific integrated circuit (ASIC), ready-made field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.
  • DSP digital signal processor
  • ASIC application specific integrated circuit
  • FPGA ready-made field programmable gate array
  • a general-purpose processor may be a microprocessor or the processor may be any conventional processor, etc.
  • non-volatile memory can be read-only memory (ROM), programmable ROM (PROM), erasable programmable read-only memory (erasable PROM, EPROM), electrically removable memory. Erase electrically programmable read-only memory (EPROM, EEPROM) or flash memory. Volatile memory can be random access memory (RAM). For example, RAM can be used as an external cache.
  • RAM may include the following forms: static random access memory (static RAM, SRAM), dynamic random access memory (dynamic RAM, DRAM), synchronous dynamic random access memory (synchronous DRAM, SDRAM) , double data rate synchronous dynamic random access memory (double data rate SDRAM, DDR SDRAM), enhanced synchronous dynamic random access memory (enhanced SDRAM, ESDRAM), synchronous link dynamic random access memory (synchlink DRAM, SLDRAM) and Direct memory bus random access memory (direct rambus RAM, DR RAM).
  • static random access memory static random access memory
  • dynamic RAM dynamic random access memory
  • DRAM synchronous dynamic random access memory
  • SDRAM synchronous DRAM
  • double data rate SDRAM double data rate SDRAM
  • DDR SDRAM double data rate SDRAM
  • ESDRAM enhanced synchronous dynamic random access memory
  • SLDRAM synchronous link dynamic random access memory
  • Direct memory bus random access memory direct rambus RAM, DR RAM
  • the processor is a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component
  • the memory storage module
  • the disclosed devices and methods can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or can be integrated into another system, or some features can be ignored, or not implemented.
  • the coupling or direct coupling or communication connection between each other shown or discussed may be through some interfaces, and the indirect coupling or communication connection of the devices or units may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed to multiple network units. Some or all of the units can be selected according to actual needs to implement the solution provided by this application.
  • each functional unit in each embodiment of the present application can be integrated into one unit, or each unit can exist physically alone, or two or more units can be integrated into one unit.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device.
  • the computer may be a personal computer, a server, or a network device.
  • the computer instructions may be stored in or transmitted from one computer-readable storage medium to another, e.g., the computer instructions may be transferred from a website, computer, server, or data center Transmission to another website, computer, server or data center by wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) means.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains one or more available media integrated.
  • the available media may be magnetic media (eg, floppy disk, hard disk, magnetic tape), optical media (eg, DVD), or semiconductor media (eg, solid state disk (SSD)), etc.
  • the aforementioned available media may include but are not limited to: U disk, mobile hard disk, read-only memory (ROM), random access memory (random access memory, RAM), magnetic disk or optical disk, etc.

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Abstract

本申请提供一种传输数据的方法和装置。该方法包括:将业务数据映射到数据帧中,并发送数据帧。其中,该数据帧包括K个时隙块,该K个时隙块的每一个时隙块包括M个比特和N*X个字节。M个比特的部分或者全部用于承载N个第一指示信息,N个第一指示信息中的每个第一指示信息用于分别指示N*X个字节的每X字节承载的对象包括业务数据或填充中的至少一个。K、N和M均为大于或等于1的整数,X为大于1的整数。本申请提供的帧结构能够针对小带宽的业务,提供低时延的数据传输。

Description

一种传输数据的方法和装置
本申请要求于2022年5月20日提交中国国家知识产权局、申请号为202210552313.2、申请名称为“一种传输数据的方法和装置”的中国专利申请的优先权,以及要求于2022年8月10日提交中国国家知识产权局、申请号为202210957858.1、申请名称为“一种传输数据的方法和装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及光通信领域,更具体地,涉及一种传输数据的方法和装置。
背景技术
伴随信息化和云化的发展,专线和视频业务承载需求越来越旺盛。这些客户业务的特点是带宽小、数量多,要求简单快捷的带宽灵活调整。光传送网(optical transport network,OTN)广泛部署在干线、城域核心和城域边缘,具有高品质、大容量、覆盖广的天然优势。因此,在OTN网络中增加小颗粒管道,提供更细的时隙颗粒度、更简洁的带宽无损调整机制,以承载高品质连接已成为当前的热点方向。
发明内容
本申请提供一种传输数据的方法和装置能够在实现小带宽的业务数据通道的同时,使得带宽能够根据不同的场景需求灵活定义。此外,通过对数据帧的重新设计来降低某些开销的时延,提升开销的统计精度。
第一方面,本申请实施例提供了一种传输数据的方法。该方法可以由发送设备或者由发送设备的部件(如芯片或芯片系统等)执行,本申请对此不作限定。该方法包括:将业务数据映射到数据帧中,并发送所述数据帧。其中,所述数据帧包括K个时隙块,所述K个时隙块的每一个时隙块包括M个比特和N*X个字节,所述M个比特中的M1个比特用于承载N个第一指示信息,所述N个第一指示信息中的每个第一指示信息用于分别指示N*X个字节的每X字节承载的对象包括业务数据或填充中的至少一个。K为大于或者等于1的整数,N为大于或等于1的整数,X为大于1的整数,M为大于或等于N的整数,M1小于M。
需要说明的是,在本申请实施例中,该时隙块也可以称为资源单元或者资源块,或者随着技术的发展,可能存在其他名称,也适用于本申请。
此外,在本申请实施例中,该数据帧可以是OTN帧或者城域传送网(metro transport network,MTN)帧。或者随着OTN技术以及MTN技术的发展,可能定义出新的类型的OTN帧和MTN帧,也适用于本申请。
应理解,第一指示信息用于X个字节承载的对象包括业务数据或填充中的至少一个可以分为如下几种情况。指第一信息用于指示对应的X个字节承载的对象全为数据。或者第一信息用于指示对应的X个字节承载的对象全为填充。第一信息用于指示对应的X个字节承载的对象仅为数据和填充。或者第一信息用于指示对应的X个字节承载的对象为数据、填充以及其他未提及的信息。
在一种可实现的方式中,当第一信息用于指示对应的X个字节承载的对象仅为数据和填 充时,可以使用第二信息来指示X个字节承载的对象中业务数据的数目或者可以使用第二信息指示X字节中承载的对象中填充的数目。当然的,对于某些特殊情况,例如,业务数据和填充的数量相同时,还可以采用预设的信息来指示该X字节承载的业务数据和填充的数量是相等的。此时,应理解,该“预设”可包括预先定义,例如,协议定义。其中,“预先定义”可以通过在设备中预先保存相应的代码、表格或其他可用于指示相关信息的方式来实现,本申请对于其具体的实现方式不做限定。
基于上述方案,本申请实施例提供的传输数据的方法,基于M个比特+N*X个字节时隙,使得数据帧支持X字节小颗粒的时隙,支持小颗粒业务的低时延低抖动,从而为客户业务提供更优质的管道。同时,通过将N个连续的X字节的第一指示信息集中放置,可以根据系统的要求灵活的选择N的取值,以平衡N个X字节带来的存储时延与对N个X字节进行指示的开销。
结合第一方面,在第一方面的某些实现方式中,所述第一指示信息指示X个字节承载的对象还包括第二指示信息,所述第二指示信息位于所述X字节中的一个特定字节,所述第二指示信息用于指示除所述特定字节之外的(X-1)个字节中用于承载所述业务数据的字节数的数量。
需要说明的是,在本申请实施例中,特定字节是指第二指示信息为X字节中的特定位置,例如X字节的首个字节或者X字节的最后一个字节或其他位置,本申请不做限定,但应理解的是,对于N个X字节来说,该第二指示信息的位置是相同的,即第二指示信息占用的字节在X个字节中的位置是固定的。
基于上述方案,通过第二指示信息指示业务管道内业务数据的数量,有利于对时钟恢复有需求的业务根据单位时间周期内的数据字节数进行时钟恢复。同时通过第二指示信息的码表实现简化芯片的目的。
结合第一方面,在第一方面的某些实现方式中,所述特定字节中除所述第二指示信息所占用的比特之外的比特用于纠正所述第二指示信息的传输错误。通过将第二指示信息的集中放置并进行纠正保护,能够避免开销的浪费。
结合第一方面,在第一方面的某些实现方式中,所述N*X个字节中的每X个字节为所述数据帧的一个时隙。
应理解,对于N*X个字节来说,该N*X个字节包括N个时隙。
结合第一方面,在第一方面的某些实现方式中,Y个相邻的所述时隙块中的Y*N*X个字节为所述数据帧的一个时隙,所述Y为大于或等于1的整数。基于该方案,根据Y的不同取值,能够实现Y*N*X的大位宽的时隙颗粒,提升了带宽容量。
结合第一方面,在第一方面的某些实现方式中,Z个等间隔的所述时隙块中的Z*N*X个字节为所述数据帧的一个时隙,所述Z为大于或等于1的整数。基于该方案,使得数据帧中存在混合时隙,即时隙包括Z*N*X个字节或时隙为X个字节,即使得带宽能够根据不同的场景需求灵活定义。
结合第一方面,在第一方面的某些实现方式中,所述M比特中的M2个比特用于检错或纠正所述N个比特的传输错误,其中,M2小于M。
示例性地,该检错信息可以为循环冗余校验码(cyclic redundancy check,CRC),纠正信息可以为指令纠错技术(error checking and correcting)。
应理解,对于每X个字节,需要增加一个第一指示信信息用于指示该X字节所承载的对象,单独对每X字节的第一指示信息进行检错或纠正将导致过高的开销,并浪费传输带宽, 因此将N个连续的X字节第一指示信息集中放置并保护,能够避免开销的浪费,从而提升传输数据的效率和可靠性。
结合第一方面,在第一方面的某些实现方式中,所述数据帧还包括位置指示信息,所述位置指示信息用于指示时隙周期的起始位置。
示例性的,该时隙周期可以是光通道业务数据支路单元组(optical channel service data tributary unit group,OSTUG)或者光通道数据支路单元组(optical channel data tributary unit group,ODTUG)。
结合第一方面,在第一方面的某些实现方式中,所述位置指示信息的字节数量为1或2。
结合第一方面,在第一方面的某些实现方式中,所述X的取值为8、16、24、32中的一个。应理解,对于X字节定位的业务传输的小颗粒度带宽(例如,10M)来说,需要保证业务在传输路径上不能存在过大的抖动,因此为了保证该品质业务对于端对端传输过程中的时延抖动,同时结合芯片的实现代价,X的取值可以为8、16、24、32。
结合第一方面,在第一方面的某些实现方式中,所述M的取值为8的倍数。基于该M的取值,使得X字节的控制码集中保护增加校验纠错信息之后的M比特为8比特的倍数,以方便芯片进行时延处理。
示例性的,M、N和X的取值构成的集合包括{M=8,N=4,X=16}、{M=8,N=4,X=32}、{M=16,N=10,X=8}、{M=16,N=10,X=16}。
需要说明的是,本申请在设计X字节时,可以基于业务传输的最大允许抖动来进行取值的。示例性的,对于OSU定位于10M粒度业务传输,通常要保证业务在传输路径上不能存在过大的抖动以及高品质业务要求端到端(以20站为例)的传输时延抖动不应大于500us。X的取值将决定10M粒度业务的传输抖动和传输时延,结合芯片的实现代价,X的取值可以为8、16、24、32。
此外,本申请在设计M和N的取值时,需要平衡开销和时延。示例性的,若每X个字节增加1比特的第一指示信息用于指示是数据或填充中的至少一种,单独对每个X字节的1第一指示信息进行ECC保护将导致过高的开销浪费了传输带宽,因此将N个连续的X个字节的1比特控制码集中放置进行ECC保护以减少开销浪费。由于N个X字节的控制码集中保护,意味着在数据处理时将引入N个X字节的存储时延,因此N的取值需要在开销节省和时延增加之间进行平衡。此外,N个X字节的控制码集中保护增加校验纠错信息之后的M比特应该是8比特的倍数以方便芯片进行时延处理。
第二方面,该方法可以由发送设备或者由发送设备的部件(如芯片或芯片系统等)执行,本申请对此不作限定。该方法包括:将业务数据映射到第一数据帧中,将所述第一数据帧映射到第二数据帧的一个或多个时隙中,并发送所述第二数据帧。其中,所述第一数据帧的净荷区用于承载所述业务数据,所述第一数据帧的净荷区包括至少一个承载单元,所述至少一个承载单元中的每个承载单元与至少一个校验开销对应,所述至少一个校验开销中的每个校验开销用于对对应的承载单元进行比特交错奇偶检验,所述第一数据帧的比特速率小于1.25Gbit/s。
需要说明的是,在本申请实施例中,承载单元表示为对第一数据帧所划分的至少一个区域,也可以称为区域(area)、区间、块或者短帧等,本申请不做限定。
基于上述方案,对于比特速率小于1.25Gbit/s的数据帧,将该数据帧的净荷区划分为更短的区间,使得该区间对应的校验开销的传输时延降低,一次达到提升该校验开销的统计精度的目的。
结合第二方面,在第二方面的某些实现方式中,所述至少一个校验开销位于所述第一数据帧的开销区,所述至少一个承载单元用于承载所述业务数据。应理解,在该方案下,承载单元仅用于承载业务数据,即仅包括净荷区。
结合第二方面,在第二方面的某些实现方式中,所述承载单元包括开销区和净荷区,所述至少一个校验开销位于所述承载单元的开销区。应理解,在该方案下,承载单元不仅用于承载业务数据还用于承载校验开销,即承载单元包括净荷区和开销区。
结合第二方面,在第二方面的某些实现方式中,所述承载单元的开销区还包括保护倒换开销或映射开销中的至少一个。
结合第二方面,在第二方面的某些实现方式中,所述校验开销为X比特交织奇偶校验BIP-8。
结合第二方面,在第二方面的某些实现方式中,所述第一数据帧的开销区包括路径监控(PM)开销、串联连接监控1(TCM1)开销、串联连接监控2(TCM2)开销和时延测量开销。基于该方案,第一数据帧通过纳秒级别的时延测量开销可以更精准的完成发送端和接收端之间的时延计算。
结合第二方面,在第二方面的某些实现方式中,所述第一数据帧的帧结构为4行*3824列字节或者2行*3824列字节。基于该方案,本申请实施例提供的该第一数据帧可以是复用ODU数据帧的结构,对ODU数据帧进行的改造。
第三方面,本申请实施例提供了一种传输数据的方法。该方法可以由接收设备或者由接收设备的部件(如芯片或芯片系统等)执行,本申请对此不作限定。该方法包括:接收数据帧,根据所述N个第一指示信息,从所述数据帧解映射出所述业务数据。其中,所述数据帧包括K个时隙块,所述K个时隙块的每一个时隙块包括M个比特和N*X个字节,所述M个比特中的M1个比特用于承载N个第一指示信息,所述N个第一指示信息中的每个第一指示信息用于分别指示N*X个字节的每X字节承载的对象包括业务数据或填充中的至少一个。其中,K为大于或者等于1的整数,N为大于或等于1的整数,X为大于1的整数,M为大于或等于N的整数,M1小于M。
结合第三方面,在第三方面的某些实现方式中,所述第一指示信息指示X个字节承载的对象还包括第二指示信息,所述第二指示信息位于所述X字节中的一个特定字节,所述第二指示信息用于指示除所述特定字节之外的(X-1)个字节中用于承载所述业务数据的字节数的数量。
结合第三方面,在第三方面的某些实现方式中,所述特定字节中除所述第二指示信息所占用的比特之外的比特用于纠正所述第二指示信息的传输错误。
结合第三方面,在第三方面的某些实现方式中,所述N*X个字节中的每X个字节为所述数据帧的一个时隙。
结合第三方面,在第三方面的某些实现方式中,Y个相邻的所述时隙块中的Y*N*X个字节为所述数据帧的一个时隙,所述Y为大于或等于1的整数。
结合第三方面,在第三方面的某些实现方式中,Z个等间隔的所述时隙块中的Z*N*X个字节为所述数据帧的一个时隙,所述Z为大于或等于1的整数。
结合第三方面,在第三方面的某些实现方式中,所述M比特中的M2个比特用于检错或纠正所述N个比特的传输错误,其中,M2小于M。
结合第三方面,在第三方面的某些实现方式中,所述数据帧还包括位置指示信息,所述位置指示信息用于指示时隙周期的起始位置。
结合第三方面,在第三方面的某些实现方式中,所述位置指示信息的字节数量为1或2。
结合第三方面,在第三方面的某些实现方式中,所述X的取值为8、16、24、32中的一个。
结合第三方面,在第三方面的某些实现方式中,所述M的取值为8的倍数。
上述第三方面带来的有益效果具体可以参考第一方面中有益效果的描述,此处不再赘述。
第四方面,本申请实施例提供了一种传输数据的方法。该方法可以由接收设备或者由接收设备的部件(如芯片或芯片系统等)执行,本申请对此不作限定。该方法包括:接收第一数据帧,所述第一数据帧包括一个或多个时隙。从所述第一数据帧中解映射出第二数据帧,并从所述第二数据帧中解映射出所述业务数据。其中,所述第二数据帧的净荷区用于承载业务数据,所述第二数据帧的净荷区包括至少一个承载单元,所述至少一个承载单元中的每个承载单元与至少一个校验开销对应,所述至少一个校验开销中的每个校验开销用于对对应的承载单元进行比特交错奇偶检验,所述第一数据帧的比特速率小于1.25Gbit/s。
结合第四方面,在第四方面的某些实现方式中,所述至少一个校验开销位于所述第一数据帧的开销区,所述至少一个承载单元用于承载所述业务数据。
结合第四方面,在第四方面的某些实现方式中,所述承载单元包括开销区和净荷区,所述至少一个校验开销位于所述承载单元的开销区。
结合第四方面,在第四方面的某些实现方式中,所述承载单元的开销区还包括保护倒换开销,或映射开销中的至少一个。
结合第四方面,在第四方面的某些实现方式中,所述校验开销为X比特交织奇偶校验BIP-8。
结合第四方面,在第四方面的某些实现方式中,所述第一数据帧的开销区包括路径监控(PM)开销、串联连接监控1(TCM1)开销、串联连接监控2(TCM2)开销和时延测量开销。
结合第四方面,在第四方面的某些实现方式中,所述第一数据帧的帧结构为4行*3824列字节或者2行*3824列字节。
上述第四方面带来的有益效果具体可以参考第二方面中有益效果的描述,此处不再赘述。
第五方面,本申请实施例提供了一种传输数据的装置。该装置用于执行上述第一方面提供的方法或用于执行上述第二方面提供的方法。具体地,该传输数据的装置可以包括用于执行第一方面或第一方面的上述任意一种实现方式提供的方法的单元和/或模块,或者,该传输数据的装置可以包括用于执行第二方面或第二方面的上述任意一种实现方式提供的方法的单元和/或模块,如处理模块和收发模块。
在一种实现方式中,该传输数据的装置可以包括用于执行第一方面或第一方面的上述任意一种实现方式提供的方法的单元和/或模块,或包括用于执行第二方面或第二方面的上述任意一种实现方式提供的方法的单元和/或模块,为发送端设备。收发模块可以是收发器,或,输入/输出接口。处理模块可以是至少一个处理器。可选地,收发器可以为收发电路。可选地,输入/输出接口可以为输入/输出电路。
在另一种实现方式中,该传输数据的装置为发送端设备中的芯片、芯片系统或电路。收发模块可以是该芯片、芯片系统或电路上的输入/输出接口、接口电路、输出电路、输入电路、管脚或相关电路等。处理模块可以是至少一个处理器、处理电路或逻辑电路等。
以上第五方面及其可能的设计所示方法的有益效果可参照第一方面及其可能的设计中的有益效果或参照第二方面及其可能的设计中的有益效果。
第六方面,本申请实施例提供了一种传输数据的装置。该装置用于执行上述第三方面提供的方法或用于执行上述第四方面提供的方法。具体地,该传输数据的装置可以包括用于执行第三方面提供的方法的单元和/或模块,或者,该传输数据的装置可以包括用于执行第四方面提供的方法的单元和/或模块,如处理模块和收发模块。
在一种实现方式中,该传输数据的装置为接收端设备。收发可以是收发器,或,输入/输出接口。处理模块可以是至少一个处理器。可选地,收发器可以为收发电路。可选地,输入/输出接口可以为输入/输出电路。
在另一种实现方式中,该传输数据的装置为接收端设备中的芯片、芯片系统或电路。收发模块可以是该芯片、芯片系统或电路上的输入/输出接口、接口电路、输出电路、输入电路、管脚或相关电路等。处理模块可以是至少一个处理器、处理电路或逻辑电路等。
第七方面,本申请实施例提供了一种处理器,用于执行上述各方面提供的方法。
对于处理器所涉及的发送和获取/接收等操作,如果没有特殊说明,或者,如果未与其在相关描述中的实际作用或者内在逻辑相抵触,则可以理解为处理器输出和接收、输入等操作,也可以理解为由射频电路和天线所进行的发送和接收操作,本申请对此不做限定。
第八方面,本申请实施例提供了一种计算机可读存储介质。该计算机可读存储介质存储用于设备执行的程序代码,该程序代码包括用于执行上述第一方面或第二方面或第三方面或第四方面的任意一种实现方式提供的方法。
第九方面,本申请实施例提供了提供一种包含指令的计算机程序产品。当该计算机程序产品在计算机上运行时,使得计算机执行上述第一方面或第二方面或第三方面或第四方面的任意一种实现方式提供的方法。
第十方面,本申请实施例提供了提供一种芯片,芯片包括处理器与通信接口,处理器通过通信接口读取存储器上存储的指令,执行上述第一方面或第二方面或第三方面或第四方面的任意一种实现方式提供的方法。
可选地,作为一种实现方式,芯片还包括存储器,存储器中存储有计算机程序或指令,处理器用于执行存储器上存储的计算机程序或指令,当计算机程序或指令被执行时,处理器用于执行上述第二方面或第二方面或第三方面或第四方面的任意一种实现方式提供的方法。
第十一方面,本申请实施例提供了提供一种通信系统,包括至少两个第五方面所述的传输数据的装置。
上述第六方面至第十一方面带来的有益效果具体可以参考第一方面中有益效果的描述或参考第二方面中有益效果的描述,此处不再赘述。
第十二方面,本申请实施例提供一种传输数据的方法。该方法可以由发送设备或者由发送设备的部件(如芯片或芯片系统等)执行,本申请对此不作限定。该方法包括:将业务数据映射到数据帧中,并发送所述数据帧。其中,所述数据帧包括K个时隙块,所述K个时隙块的每一个时隙块包括M个比特和N*X个字节,所述M个比特用于承载N个第一指示信息,所述N个第一指示信息中的每个第一指示信息用于分别指示N*X个字节的每X字节承载的对象包括业务数据或填充中的至少一个。其中,K为大于或者等于1的整数,N为大于或等于1的整数,X为大于1的整数,M为大于或等于N的整数。
结合第十二方面,在第十二方面的某些实现方式中,所述N等于1。
结合第十二方面,在第十二方面的某些实现方式中,所述第一指示信息指示X个字节承载的对象还包括第二指示信息。所述第二指示信息位于所述X字节中的一个特定字节,所述第二指示信息用于指示除所述特定字节之外的(X-1)个字节中用于承载所述业务数据的字节 数的数量。
结合第十二方面,在第十二方面的某些实现方式中,所述特定字节中除所述第二指示信息所占用的比特之外的比特用于纠正所述第二指示信息的传输错误。
结合第十二方面,在第十二方面的某些实现方式中,所述M的取值为2的倍数。
结合第十二方面,在第十二方面的某些实现方式中,所述M个比特分为N组,所述N组中的每一组包括的比特用于承载所述N个第一指示信息中的一个指示信息。
结合第十二方面,在第十二方面的某些实现方式中,M的取值为2,X的取值为16,N的取值为1。
结合第十二方面,在第十二方面的某些实现方式中,所述N*X个字节中的每X个字节为所述数据帧的一个时隙。
结合第十二方面,在第十二方面的某些实现方式中,Y个相邻的所述时隙块中的Y*N*X个字节为所述数据帧的一个时隙,所述Y为大于或等于1的整数。
结合第十二方面,在第十二方面的某些实现方式中,Z个等间隔的所述时隙块中的Z*N*X个字节为所述数据帧的一个时隙,所述Z为大于或等于1的整数。
结合第十二方面,在第十二方面的某些实现方式中,所述数据帧还包括位置指示信息,所述位置指示信息用于指示时隙周期的起始位置。
结合第十二方面,在第十二方面的某些实现方式中,所述位置指示信息的字节数量为1或2。
结合第十二方面,在第十二方面的某些实现方式中,所述X的取值为8、16、24和32中的一个。
第十三方面,本申请实施例提供一种传输数据的方法。该方法可以由接收设备或者由接收设备的部件(如芯片或芯片系统等)执行,本申请对此不作限定。该包括:接收数据帧,根据N个第一指示信息,从所述数据帧解映射出所述业务数据。其中,所述数据帧包括K个时隙块,所述K个时隙块的每一个时隙块包括M个比特和N*X个字节,所述M个比特用于承载N个第一指示信息,所述N个第一指示信息中的每个第一指示信息用于分别指示N*X个字节的每X字节承载的对象包括业务数据或填充中的至少一个,其中,K为大于或者等于1的整数,N为大于或等于1的整数,X为大于1的整数,M为大于或等于N的整数。
结合第十三方面,在第十三方面的某些实现方式中,所述N等于1。
结合第十三方面,在第十三方面的某些实现方式中,所述第一指示信息指示X个字节承载的对象还包括第二指示信息,所述第二指示信息位于所述X字节中的一个特定字节,所述第二指示信息用于指示除所述特定字节之外的(X-1)个字节中用于承载所述业务数据的字节数的数量。
结合第十三方面,在第十三方面的某些实现方式中,所述特定字节中除所述第二指示信息所占用的比特之外的比特用于纠正所述第二指示信息的传输错误。
结合第十三方面,在第十三方面的某些实现方式中,所述M的取值为2的倍数。
结合第十三方面,在第十三方面的某些实现方式中,所述M个比特分为N组,所述N组中的每一组包括的比特用于承载所述N个第一指示信息中的一个指示信息。
结合第十三方面,在第十三方面的某些实现方式中,M的取值为2,X的取值为16,N的取值为1。
结合第十三方面,在第十三方面的某些实现方式中,所述N*X个字节中的每X个字节为所述数据帧的一个时隙。
结合第十三方面,在第十三方面的某些实现方式中,Y个相邻的所述时隙块中的Y*N*X个字节为所述数据帧的一个时隙,所述Y为大于或等于1的整数。
结合第十三方面,在第十三方面的某些实现方式中,Z个等间隔的所述时隙块中的Z*N*X个字节为所述数据帧的一个时隙,所述Z为大于或等于1的整数。
结合第十三方面,在第十三方面的某些实现方式中,所述数据帧还包括位置指示信息,所述位置指示信息用于指示时隙周期的起始位置。
结合第十三方面,在第十三方面的某些实现方式中,所述位置指示信息的字节数量为1或2。
结合第十三方面,在第十三方面的某些实现方式中,所述X的取值为8、16、24和32中的一个。
第十四方面,本申请实施例提供了一种传输数据的装置。该装置用于执行上述第十二方面提供的方法。具体地,该传输数据的装置可以包括用于执行第十二方面或第十二方面的上述任意一种实现方式提供的方法的单元和/或模块。
在一种实现方式中,该传输数据的装置可以包括用于执行第十二方面或第十二方面的上述任意一种实现方式提供的方法的单元和/或模块,为发送端设备。收发模块可以是收发器,或,输入/输出接口。处理模块可以是至少一个处理器。可选地,收发器可以为收发电路。可选地,输入/输出接口可以为输入/输出电路。
在另一种实现方式中,该传输数据的装置为发送端设备中的芯片、芯片系统或电路。收发模块可以是该芯片、芯片系统或电路上的输入/输出接口、接口电路、输出电路、输入电路、管脚或相关电路等。处理模块可以是至少一个处理器、处理电路或逻辑电路等。
第十五方面,本申请实施例提供了一种传输数据的装置。该装置用于执行上述第十三方面提供的方法。具体地,该传输数据的装置可以包括用于执行第十三方面提供的方法的单元和/或模块。
在一种实现方式中,该传输数据的装置为接收端设备。收发可以是收发器,或,输入/输出接口。处理模块可以是至少一个处理器。可选地,收发器可以为收发电路。可选地,输入/输出接口可以为输入/输出电路。
在另一种实现方式中,该传输数据的装置为接收端设备中的芯片、芯片系统或电路。收发模块可以是该芯片、芯片系统或电路上的输入/输出接口、接口电路、输出电路、输入电路、管脚或相关电路等。处理模块可以是至少一个处理器、处理电路或逻辑电路等。
第十六方面,本申请实施例提供了一种处理器,用于执行上述第十二方面提供的方法或者十三方面提供的方法。
对于处理器所涉及的发送和获取/接收等操作,如果没有特殊说明,或者,如果未与其在相关描述中的实际作用或者内在逻辑相抵触,则可以理解为处理器输出和接收、输入等操作,也可以理解为由射频电路和天线所进行的发送和接收操作,本申请对此不做限定。
第十七方面,本申请实施例提供了一种计算机可读存储介质。该计算机可读存储介质存储用于设备执行的程序代码,该程序代码包括用于执行上述第十二方面或第十三方面的任意一种实现方式提供的方法。
第十八方面,本申请实施例提供了提供一种包含指令的计算机程序产品。当该计算机程序产品在计算机上运行时,使得计算机执行上述第十二方面或第十三方面的任意一种实现方式提供的方法。
第十九方面,本申请实施例提供了提供一种芯片,芯片包括处理器与通信接口,处理器 通过通信接口读取存储器上存储的指令,执行上述第十二方面或第十三方面的任意一种实现方式提供的方法。
可选地,作为一种实现方式,芯片还包括存储器,存储器中存储有计算机程序或指令,处理器用于执行存储器上存储的计算机程序或指令,当计算机程序或指令被执行时,处理器用于执行第十二方面或第十三方面的任意一种实现方式提供的方法。
附图说明
图1为本申请实施例的一种可能的应用场景示意图。
图2为一种可能的网络设备硬件结构示意图。
图3为一种OTN帧的帧结构的示意图。
图4为本申请实施例提供的一种65字节时隙块的结构示意图。
图5为本申请实施例提供的第一种16字节位宽的码表示意图。
图6为本申请实施例提供的对应于图4的光传送网数据OTN帧结构示意图。
图7为本申请实施例提供的一种129字节时隙块的结构示意图。
图8为本申请实施例提供的一种32字节位宽的码表示意图。
图9为本申请实施例提供的一种82字节时隙块的结构示意图。
图10为本申请实施例提供的一种162字节时隙块的结构示意图。
图11为本申请实施例提供的一种97字节时隙块的结构示意图。
图12为本申请实施例提供的一种相邻3*65字节时隙块的OTN数据帧结构示意图。
图13为本申请实施例提供的一种192字节时隙块的结构示意图。
图14为本申请实施例提供的一种固定间隔3*65字节时隙块的OTN数据帧结构示意图。
图15是本申请实施例提供的ODUnew帧的映射层次的示意图。
图16是本申请实施例提供的第一种ODUnew帧结构示意图。
图17是本申请实施例提供的承载单元的结构示意图。
图18是本申请实施例提供的承载单元开销区的开销示意图。
图19是本申请实施例提供的第一种ODUnew帧结构的开销区示意图。
图20是本申请实施例提供的第二种ODUnew帧结构的开销区示意图。
图21是本申请实施例提供的第二种ODUnew帧结构的示意图。
图22是本申请实施例提供的一种传输数据的方法2200的示意性流程图。
图23是本申请实施例提供的另一种传输数据的方法2300的示意性流程图。
图24是本申请实施例提供的一种通信装置的结构示意图。
图25为本申请实施例提供的第二种16字节位宽的码表示意图。
图26为本申请实施例提供的一种130比特时隙块的结构示意图。
图27为本申请实施例提供的一种时隙排布的示意图。
具体实施方式
下面将结合附图,对本申请中的技术方案进行描述。
为了便于理解本申请实施例,作出以下说明。
第一、在下文示出的本申请实施例中的文字说明或者附图中的术语,“第一”、“第二”等以及各种数字编号仅为描述方便进行的区分,而不必用于描述特定的顺序或者先后次序,并不用来限制本申请实施例的范围。例如,区分不同的数据帧等。
第二、下文示出的本申请实施例中的术语“包括”和“具有”以及它们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元,而是可以包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其他步骤或者单元。
第三、在本申请实施例中,“示例性的”或者“例如”等词用于表示例子、例证或说明,被描述为“示例性的”或者“例如”的实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。使用“示例性的”或者“例如”等词旨在以具体方式呈现相关概念,便于理解。
第四、在本申请实施例中,业务数据指的是光传送网络或城域传送网络承载的业务。例如,可以是以太网业务、分组业务、无线回传业务等。业务数据也可以称业务信号、客户数据或客户业务数据。应理解,本申请实施例中对于业务数据的类型不做限定。
第五、在本申请中,“用于指示”可以包括直接指示和间接指示。当描述某一信息用于指示A时,可以包括该信息直接指示A或间接指示A,而并不代表该信息中一定携带有A。
第六、在本申请实施例中,仅以OTN帧作为示例进行实施例的说明,应理解,在未来技术发展中,对于其他承载OTN帧以及MTN帧,也适用于本申请。
第七、在本申请实施例中字符“*”为运算符号,表示乘积。
本申请实施例适用于光网络,例如:光传送网(optical transport network,OTN)。一个OTN通常由多个设备通过光纤连接而成,可以根据具体需要组成如线型、环形和网状等不同的拓扑类型。如图1所示的OTN 100由8个OTN设备101组成,即设备A-H。其中,102指示光纤,用于连接两个设备;103指示客户业务接口,用于接收或发送客户业务数据。如图1所示,OTN 100用于为客户设备1-3传输业务数据。客户设备通过客户业务接口跟OTN的设备相连。例如,图1中,客户设备1-3分别和OTN设备A,H和F相连。
根据实际的需要,一个OTN设备可能具备不同的功能。一般地来说,OTN设备分为光层设备、电层设备以及光电混合设备。光层设备指的是能够处理光层信号的设备,例如:光放大器(optical amplifier,OA)、光分插复用器(optical add-drop multiplexer,OADM)。OA也可被称为光线路放大器(optical line amplifier,OLA),主要用于对光信号进行放大,以支持在保证光信号的特定性能的前提下传输更远的距离。OADM用于对光信号进行空间的变换,从而使其可以从不同的输出端口(有时也称为方向)输出。电层设备指的是能够处理电层信号的设备,例如:能够处理OTN信号的设备。光电混合设备指的是具备处理光层信号和电层信号能力的设备。需要说明的是,根据具体的集成需要,一个OTN设备可以集合多种不同的功能。本申请提供的技术方案适用于不同形态和集成度的包含电层功能的OTN设备。
需要说明的是,本申请实施例中的OTN设备使用的数据帧结构是OTN帧,用于承载各种业务数据,并提供丰富的管理和监控功能。OTN帧可以是光数据单元帧(Optical Data Unit k,ODUk)、ODUCn、ODUflex,或者光通道传输单元k(optical transport unit k,OTUk),OTUCn,或者灵活OTN(FlexO)帧等。其中,ODU帧和OTU帧区别在于,OTU帧包括ODU帧和OTU开销。k代表了不同的速率等级,例如,k=1表示2.5Gbps,k=4表示100Gbps;Cn表示可变速率,具体为100Gbps的正整数倍的速率。除非特殊的说明,ODU帧指的是ODUk、ODUCn或ODUflex的任意一种,OTU帧指的是OTUk、OTUCn或者FlexO的任意一种。还需要指出的是,随着OTN技术发展,可能定义出新的类型的OTN帧,也适用于本申请。
图2为一种可能的网络设备硬件结构示意图。例如,图1中的设备A。具体地,OTN设备200包括支路板201、交叉板202、线路板203、光层处理单板(图中未示出)以及系统控 制和通信类单板204。根据具体的需要,网络设备包含的单板类型和数量可能不相同。例如,作为核心节点的网络设备没有支路板201。又如,作为边缘节点的网络设备有多个支路板201,或者没有光交叉板202。再如,只支持电层功能的网络设备可能没有光层处理单板。
支路板201、交叉板202和线路板203用于处理OTN的电层信号。其中,支路板201用于实现各种客户业务的接收和发送,例如SDH业务、分组业务、以太网业务和前传业务等。更进一步地,支路板201可以划分为客户侧光收发模块和信号处理器。其中,客户侧光收发模块也可以称为光收发器,用于接收和/或发送业务数据。信号处理器用于实现对业务数据到数据帧的映射和解映射处理。交叉板202用于实现数据帧的交换,完成一种或多种类型的数据帧的交换。线路板203主要实现线路侧数据帧的处理。具体地,线路板203可以划分为线路侧光模块和信号处理器。其中,线路侧光模块可以称为光收发器,用于接收和/或发送数据帧。信号处理器用于实现对线路侧的数据帧的复用和解复用,或者映射和解映射处理。系统控制和通信类单板204用于实现系统控制。具体地,可以从不同的单板收集信息,或将控制指令发送到对应的单板上去。需要说明的是,除非特殊说明,具体的组件(例如信号处理器)可以是一个或多个,本申请不做限制。还需要说明的是,对设备包含的单板类型以及单板的功能设计和数量,本申请不做任何限制。需要说明的是,在具体的实现中,上述两个单板也可能设计为一个单板。此外,网络设备还可能包括用于备用的电源、用于散热的风扇等。
随着第5代固定网络(Fifth Generation Fixed Network,F5G)时代的到来,不同场景下的专线业务需求逐渐细化,例如,行业生产网、高品质用户终端等,其对于对高品质连接的需求日益增长。这些专线业务的特点是带宽小且数量多,要求能够灵活调整的带宽。当前,使用光业务单元(optical service unit,OSU)帧在OTN中承载小颗粒业务。OSU除了能够提供精细化的带宽粒度,还能不再依赖传统的OTN时隙结构,并能有效增强业务承载灵活性,匹配业务分组化演进趋势。其过程为基于灵活支路单元(flexible tributary unit,TUflex)的映射方式,即通过将多路业务分别映射封装到多路OSU中,不同的OSU对应不同的TUflex,然后将多路TUflex复用到光净荷单元(optical payload unit,OPU)帧中。
在时分复用(time division multiplexing,TDM)方案中,每一路业务按照高阶定义时隙位宽进行周期性的数据发送。其中,OSU时隙位宽可以为192字节,对于10.4Mbit/s的管道来说,其数据发送周期为148us。
尽管通过引入OSU技术可以实现2M~100Gbps不同颗粒度业务的高效承载。但对于一些更小带宽的业务信号,例如对于10M的业务信号,当该10M的业务信号映射到10.4Mbit/s的OSU管道时,需要缓存约185字节业务信号数据之后才能进行发送,这个过程需要耗时约148us,导致业务信号传输的时间大幅增加。此外,对于OSU的10.4Mbit/s时隙带宽,当中间节点进行TDM交换时,接收输入时隙数据被转发到指定发送出口时隙的过程中,甚至会存在一个发送周期的延时为148us。
因此,当前基于OSU的192字节时隙位宽的TDM调度方案存在小带宽客户信号传输时延大的问题。为了解决上述问题,本申请实施例基于当前OTN帧结构以及OSU帧结构,重新定义了一种数据帧的划分方法,来降低OTN设备以TDM方式传输小带宽业务的时延。
图3为一种OTN帧的帧结构的示意图。如图3所示,OTN帧为一种4行多列的帧结构,包括开销区、净荷区和前向纠错(Forward Error Correction,FEC)区域。具体地,OTN帧结构可以参考目前协议中相关描述,这里不再赘述。OTN帧的净荷区划分为多个净荷块(Payload Block,PB)。每个PB占据净荷区中固定长度(也可以称为大小)的位置,例如128个字节。示例性地,OTN帧可能包括的开销如下述表1所示。
表1 OTN帧可能携带的开销举例
应理解,上述对OTN帧结构的描述仅是一个示例。其他变形的OTN帧也适用于本申请。例如,不包含FEC区域的OTN帧。又如,行数和列数跟OTN帧302不同的帧结构。应理解,PB也可以称作时隙、时隙块或时间片等。本申请对其名称不做约束。
基于图3所示的OTN帧,图4为本申请实施例提供的一种65字节时隙块的结构示意图。对应的OTN数据帧结构为一种65字节时隙块(也可以称为资源块或者资源单元)的数据帧结构,其时隙位宽为16字节。如图4所示,该65字节时隙块的结构定义为由独立的1个字节以及4个16字节构成。
需要说明的是,在如图4所示的对OTN帧的时隙块划分中,独立的1个字节中包含的4个比特用于独立指示每个16字节中承载的对象包括数据或者填充中的至少一个。即每16个字节承载的对象使用一个独立的比特进行指示,该指示比特可以称为控制码。
应理解,4个比特用于独立指示每个16字节中承载的对象包括数据或者填充中的至少一个,可以分为如下几种情况。
1、1比特用于指示对应的16个字节承载的对象全为数据。
2、1比特用于指示对应的16个字节承载的对象全为填充。
3、1比特用于指示对应的16个字节承载的对象为数据和填充。
4、1比特用于指示对应的16个字节承载的对象为数据、填充和其他信息。
在上述场景3和场景4中,可以使用第二信息来指示16个字节承载的对象中业务数据的大小(例如字节数)或者可以使用第二信息指示16字节中承载的对象中填充的大小(例如字节数,或者两字节数,或比特数等)。
应理解,在如图4所示的对OTN帧的时隙块划分中,可以采用独立的1个字节中包含的8个比特用于独立指示每个16字节中承载的对象包括数据或者填充中的至少一个。即每16个字节承载的对象使用两个比特进行指示,即每个16字节对应的控制码为两个比特。此时,2个比特用于独立指示对应的16字节中承载的对象包括数据或者填充中的至少一个,同样可以分为上述的4种情况,此处不再赘述。
此外,也可以采用独立时隙块间插方式对OTN帧进行划分,例如采用130比特的时隙块间插方式进行划分。此时,对OTN帧的时隙块划分可以如图26所示,在这种场景下,每个130比特时隙块包含2比特控制指示和128比特(16字节)净荷。图27为其时隙排布示意,OPU帧划分为P个时隙,每个时隙块为130比特。
在一种可实现的方式中,当采用1个比特的控制码指示16字节时,可以建立如图5所码表进行指示。具体地,当1比特控制码为0时,表示16字节全部为数据。当1比特控制码为1时,定义16字节中的第一个字节为第二指示信息(如图5中的扩展控制码),其包含4比特的有效数据数量指示,以及4比特的校验信息,4比特的有效数据量指示剩余的15字节中的承载业务数据的字节的数量。应理解,还可以采用4比特的填充数量指示剩余的15字节中的承载填充的字节的数量,本申请不做限定。
应理解,上述第二指示信息中指示填充或数据的比特数目仅为示例而非限定,即可以采用其他数量的比特来指示,本申请不限定。
在另一种可实现的方式中,当采用2个比特的控制码指示16字节时,可以建立如图25所码表进行指示。具体地,当2个比特的控制码的值为01时,表示16字节全部为数据。当2个比特的控制码的值为10时,表示16字节全部或部分为填充,当标识16字节的部分为填充时,可以进一步定义16字节中的第一个字节为第二指示信息(如图25中的扩展控制码C1),其包含4比特的有效数据数量指示,以及4比特的校验信息,4比特的有效数据量指示剩余的15字节中的承载业务数据的字节的数量。应理解,还可以采用4比特的填充数量指示剩余的15字节中的承载填充的字节的数量,本申请不做限定。
此外,当第二指示信息指示的有效数据量为0时,还可以将用于承载填充的字节定义为其他指示信息或控制信息,即使用用于填充的自己传递其他的指示信息或者控制信息,例如,可以定义2-16字节中的第二个字节指示该16字节所在的时隙的类型,例如该时隙为被添加的时隙或者删除的时隙。或者还可以定义用于指示该16字节所在的时隙为发送时隙或接收时隙的指示字段。或者定义用于指示该16字节所在的时隙对应的数据帧的标识的指示字段。或者,还可以定义用于指示该16字节所在的时隙的标识的字段。此外,还可以在定义的指示字段的基础上增加对应于指示字段传输错误的指示域,用来承载对定义的指示字段的传输错误进行纠正的纠错指示信息。
需要说明的是,图25仅为示例,本申请对各个指示域所占用的字节的位置并不限定,例如采用更多的比特数来指示16字节承载的对象。当指示的比特数大于2比特时,还可以对2比特的指示信息进行纠错保护。
此外,2个比特的具体值,可以为01和10,或者00和11,以保持两个值之间的汉明距 离为2。采用单比特指示能够节约开销,从而提升数据传输的效率。
在另一种可实现的方式中,例如,业务数据和填充的数量相同时,此时,使用独立的1字节用于指示对应的15个字节承载的对象仅为数据和填充时,如图5所示的码表中扩展控制码的值相同。当然的,在这种特殊情况下,还可以采用预设的信息来指示该X字节承载的业务数据和填充的数量是相等的,以简化码表。
需要说明的是,该独立的1个字节还可以采用汉明码(HAMMING Code)HAMMING(8,4)编码对4个独立指示的比特进行误码纠错保护,或者可以采用CRC码进行检错。
此外,如图6所示,当OPU净荷区按照上述图4所示的65字节的时隙块进行时隙划分时,可以采用OTN帧结构中的第一行的第15列和第16列开销(两个字节)来指示时隙块周期的起始位置。
在一种可实现的方式中,时隙块的划分可以按照一行进行划分,则可以划分为58个时隙块,对于一帧中剩余的不够65个的字节,可将剩余字节全部用于承载填充。此时,一个OTN帧能够划分为232个如图4所示的时隙块,可采用一行中15列和16列中的8个比特来指示每个时隙块周期的起始位置。
图7为本申请实施例提供的一种129字节时隙块的结构示意图。对应的OTN数据帧结构为一种129字节时隙块的数据帧结构。如图7所示,该129字节时隙块的结构定义为独立的1个字节以及4个32字节构成。其中,独立的1个字节中包含的4个比特用于独立指示每个32字节中承载的对象包括数据或者填充中的至少一个。
在一种可实现的方式中,可以参照图4的描述,该独立的1个字节仍然可以采用HAMMING(8,4)编码对4个独立指示的比特进行误码纠错保护,或者可以采用CRC码进行检错。
当然的,按照图7所示的129字节划分OTN帧的时隙时,每个时隙的起始位置仍然可以采取图6中所示的方法,此处不再赘述。
当采用如图7所示的时隙块划分方式时,用于指示每个32字节中承载的对象包括数据或者填充中的至少一个的1比特控制码以及4比特扩展控制码构成的码本可以如图8所示。此时,由于采用一个字节扩展码无法直接指示出所有的数据字节组合,因此,使用1比特扩展码间接指示承载业务数据的字节数目。即,通过定义32字节时隙中有效数据的最小值,使用1比特的扩展码只指示相对有效数据最小值的增加数量。
图9和图10分别是本申请实施例提供的82字节时隙块和162字节时隙块的结构示意图。其中,图9采用8字节间插模式,图10采用16字节间插模式。具体的,对于如图9所示的82字节构成的时隙块和如图10所示的162字节构成的时隙块来讲,均采用10个比特分别指示每8个字节承载的对象或每16个字节承载的对象,同时可以采用2个比特检错或纠正用于指示的10个比特的传输错误。
图11是本申请实施例提供的97字节时隙块的结构示意图。当采用如图11所示的时隙块划分OTN帧时,对应的OTN数据帧的时隙为24字节。OTN帧的帧结构可以划分为多个如图11所示的时隙块。其中,时隙块中采用1个字节中包含的4个比特来独立指示每个24字节中承载的对象为数据或者填充。
同样的,可以采用HAMMING(8,4)对4个独立指示的比特进行误码纠错保护。
当按照图11所示的97字节划分OTN帧的时隙时,每个时隙的起始位置仍然可以采取图6中所示的方法,此处不再赘述。
应理解,对于上述图9至图11中所示的时隙块,仍然存在类似于图5或者图11所示的 码表。
为了满足一些大容量的场景的需求,例如,100M时隙粒度、T级别容量时,本申请实施例还提供了如图12所示的3*65字节时隙块的OTN数据帧结构示意图。在图12中,三个相邻的65字节构成一个新的时隙块结构。其中,该OTN帧的时隙为3*4*16,结构如图13所示。在图13中采用192字节承载数据或填充,采用3个字节中的12个比特来指示每16个字节所承载的对象。
在一种可能的实现方式中,该12个比特的指示方法同图4所示的65字节时隙块的指示方法相同,即每个比特用于单独指示16个字节所承载的对象,该指示的过程可以参考图5中的相关描述,此处不再赘述。
在另一种可实现的方式中,该12个比特的取值保持一致,此时,指示192字节所承载的对象相同。
在图12中,是通过将相邻的第一时隙块定义为更大位宽的时隙,在另一种可实现的方式中,还可以采用将固定间隔的第一时隙块组合为一个更大位宽的时隙,如图14所示。在图14中,可以在ODU0的OPU0区域划分出120个16字节,假定每个16字节时隙对应的带宽为10M,则65字节的第一时隙块将构成40M的带宽时隙,此时,可以将间隔为40的3个65字节在逻辑上定义为一个120M的带宽时隙。
需要说明的是,上述图12和图14仅选取了三个65字节的时隙块进行大位宽时隙的定义,对于上述图7所示的129时隙块、图9所示的82字节时隙块、图10所示的162字节时隙块、图11所示的97字节时隙块以及本申请位列举的其他时隙块的划分,均可以采用如图12所示的相邻Y个第一时隙块捆绑定义的大位宽时隙,或者可以采用如图14所示的固定间隔的Z个时隙块捆绑定义的大位宽时隙。
应理解,当采用如图12的方式相邻Y个第一时隙块捆绑定义获得大位宽时隙颗粒度时,对应的OTN帧中仅存在一种时隙,该时隙的字节数为Y*N*X个字节。当采用如图14的方式相邻Y个第一时隙块捆绑定义获得大位宽时隙颗粒度时,对应的OTN帧中可以存在多种时隙,例如字节数为Z*N*X个字节的时隙,或者X个字节的时隙,使得该对应的OTN帧不仅在支持大位宽时隙,大容量带宽的基础上,还可以支持小位宽,精细颗粒度的带宽,从而满足不同的应用场景。
为了提升OTN帧的校验能力、满足某些开销对传输时间和统计精度的要求,本申请实施例还提供了一种OTN帧结构。为了简化说明,本申请以ODUnew作为该OTN帧进行说明。需要说明的是,这个名称仅是一个示例,不对本申请定义的帧结构构成限定。示例性的,该ODUnew可以是2行*3824列字节的结构,或者是4行*3824列字节的结构。在本申请实施例中,以4行*3824列字节结构ODUnew帧为例进行说明。
图15为增加了ODUnew帧的映射层次的示意图。具体地,如图15所示,业务数据映射到ODUnew中,然后再由ODUnew映射到ODUflex中,其中ODUflex可以是上述按照图4、图6、图7、图9至图11、图12或图13中任意一种时隙块划分的OTN帧,以及符合时隙块划分要求的其他未在本申请实施例中详细说明的OTN帧。
图16为本申请实施例提供的第一种ODUnew的帧结构示意图。如图所示,ODUnew帧为4行3824列字节的结构,包括开销区(4行的前16列)和净荷区(4行的第17列到第3824列),净荷区的每行包括两个承载单元。具体地,每个承载单元可以与至少一个校验开销对应,校验开销区用于对对应的承载单元进行比特交错奇偶校验。
需要说明的是,在本申请实施例中,承载单元表示为对第一数据帧所划分的至少一个区 域,也可以称为区域(area)、区间、块或者短帧等,本申请不做限定。其中,校验开销可以是BIP-X,例如BIP-8。本申请不作限定。
在一种可实现的方式中,如图17所示,承载单元可以分为开销区和净荷区,该承载单元的开销区包括至少一个校验开销。具体地,该承载单元的开销区包括8个字节(为17~24列),净荷区为25~1920列。其中,该承载单元的开销区的8个字节可以定义为如图18所示。具体地,包括8比特TCM2BIP8开销、4比特TCM2BEI开销、8比特TCM1BIP8开销、4比特TCM1BEI开销、8比特PM BIP8开销、4比特PM BEI开销、8比特APS开销和20比特映射开销。
一般来说,某个承载单元的开销区和净荷区并不存在对应关系,某个承载单元的开销区用于对在其之前传输的承载单元中的净荷区所承载的对象进行校验。
应理解,相较于传统的OTN帧结构,在保持OTN帧整体结构不变的情况下,在OTN帧在净荷区定义低速管道的开销区,即,该承载单元的开销区,通过该承载单元的开销区提升诸如APS、BIP8和映射开销对传输时间和统计精度的要求。
在如图17所示的承载单元的设计下,图16所示的ODUnew帧的开销区可以复用当前相关标准中ODUflex的部分开销,例如FAS/MFAS、PM、TCM1、TCM2、PM&TCM、GCC1、GCC2等开销定义,同时增加纳秒级时延测量(delay measurement,DM)开销,如图19所示。
需要说明的是,本申请实施例中的DM开销为精确度更高的时延测量开销,该DM开销中可以包括修正量,该修正量用于表示接收端接收到发送端发送的数据帧后处理该数据帧的时间。换句话说,该修正量为接收端接收到发送端发送的数据帧之后,到向发送端发送回复的数据帧之前的一段时间。基于该DM开销,使得数据帧的时延测量可以达到纳秒级别的测量,结果更为精准,修正了时延测量的误差。
在另一种可实现的方式中,当承载单元的开销区仅包括映射开销或者承载单元仅为ODUnew帧的净荷区仅用于承载业务数据时,图16所示的ODUnew帧的开销区可以复用当前相关标准中ODUflex的部分开销,例如FAS/MFAS、PM、PM&TCM、GCC1、GCC2等开销定义,同时增加纳秒级DM开销,并在最后一行增加TCM2TTI、TCM1TTI和PM TTI开销,其余开销保留,如图20所示。具体地,在每行中设置有2个字节的TCM1、2个字节的TCM2以及2个字节的PM开销,并对应当前行。其中,2个字节的PM开销包括8比特的BIP8(用于校验上一行15列到3824区间承载的对象)、4比特的BEI/BIAE、1比特的BDI和3比特的STAT信息。
图21为本申请实施例提供的第二种ODUnew的帧结构示意图。如图所示,ODUnew帧为4行3824列字节的结构,包括开销区(前4行16列)和净荷区(4行3824列),净荷区的每行包括一个承载单元。具体地,该第二种ODUnew帧的承载单元可以定义为如图17所示的结构,并结合图19所示的ODUnew帧的开销区。或者该第二种ODUnew帧的承载单元可以定义为开销区仅包括映射开销或者承载单元仅为ODUnew帧的净荷区,并结合图20所示ODUnew帧的开销区,此处不再赘述。
需要说明的是,对于2行*3824列字节结构ODUnew帧,同样可以参考上述图17或图19的承载单元的划分方法,以及承载单元的开销示例。该2行*3824列字节结构ODUnew帧的开销区中所包括的开销可以与4行*3824列字节结构ODUnew帧的开销区中所包括的开销相同,或者少于4行*3824列字节结构ODUnew帧的开销区中所包括的开销。图22示出了本申请提供的一种传输数据的方法的流程示意图。如图22所示,其中,发送端设备可以是OTN 设备,或者由OTN设备的部件(如芯片或芯片系统等)执行。接收端设备可以是OTN设备,或者由OTN设备的部件(如芯片或芯片系统等)执行。具体的,该方法包括如下多个步骤。
S2201,发送端设备将业务数据映射到数据帧中,该数据帧包括K个时隙块,其中,K个时隙块的每一个时隙块包括M个比特和N*X个字节,M个比特中的M1个比特用于承载N个第一指示信息,N个第一指示信息中的每个第一指示信息用于分别指示N*X个字节的每X字节承载的对象包括业务数据或填充中的至少一个。K为大于或者等于1的整数,N为大于或等于1的整数,X为大于1的整数,M为大于或等于N的整数,M1小于M。
具体地,发送端设备将业务数据映射到如上述按照图4、图6、图7、图9至图11、图12或图13中任意一种时隙块划分的OTN帧。
S2202,发送端设备将数据帧发送给接收端设备。
S2203,接收端设备接收数据帧,根据N个第一指示信息,从数据帧解映射出业务数据。
图23示出了本申请提供的一种传输数据的方法的流程示意图。如图23所示,其中,发送端设备可以是OTN设备,或者由OTN设备的部件(如芯片或芯片系统等)执行。接收端设备可以是OTN设备,或者由OTN设备的部件(如芯片或芯片系统等)执行。具体的,该方法包括如下多个步骤。
S2301,发送端设备将业务数据映射到第一数据帧中,第一数据帧的净荷区用于承载业务数据,第一数据帧的净荷区包括至少一个承载单元,至少一个承载单元中的每个承载单元与至少一个校验开销对应,至少一个校验开销中的每个校验开销用于对对应的承载单元进行比特交错奇偶检验,第一数据帧的比特速率小于1.25Gbit/s。
具体地,发送端设备将业务数据映射到如上述图16或图21中任意一种OTN帧中。
S2302,发送端设备将第一数据帧映射到第二数据帧中。
具体地,发送端设备将第一数据帧映射到上述按照图4、图6、图7、图9至图11、图12或图13中任意一种时隙块划分的OTN帧。
S2303,发送端设备将第二数据帧发送给接收端设备。
S2304,接收端设备接收第二数据帧,并从第二数据帧解映射出第一数据帧。
S2305,接收端设备从第一数据帧解映射出业务数据。
应理解,本申请实施例中的图4至图21所示的具体的例子只是为了帮助本领域技术人员更好地理解本申请实施例,而非限制本申请实施例的范围。还应理解,上述各过程的序号的大小并不意味着执行顺序的先后,各过程的执行顺序应以其功能和内在逻辑确定,而不应对本申请实施例的实施过程构成任何限定。
还应理解,在本申请的各个实施例中,如果没有特殊说明以及逻辑冲突,不同的实施例之间的术语和/或描述具有一致性、且可以相互引用,不同的实施例中的技术特征根据其内在的逻辑关系可以组合形成新的实施例。
还应理解,在上述一些实施例中,主要以现有的网络架构中的设备为例进行了示例性说明(如OTN设备),应理解,对于设备的具体形式本申请实施例不作限定。例如,在未来可以实现同样功能的设备都适用于本申请实施例。
以上,结合图4至图21以及图25-27详细说明了本申请实施例提供的两种数据帧的结构,以及结合图22和图23说明了本申请实施例提供的传输业务数据的方法。
以下,结合图24详细说明本申请实施例提供的通信的装置。应理解,装置实施例的描述与方法实施例的描述相互对应,因此,未详细描述的内容可以参见上文方法实施例,为了简洁,部分内容不再赘述。
本申请实施例可以根据上述方法示例对发送端设备或者接收端设备进行功能模块的划分,例如,可以对应各个功能划分各个功能模块,也可以将两个或两个以上的功能集成在一个处理模块中。上述集成的模块既可以采用硬件的形式实现,也可以采用软件功能模块的形式实现。需要说明的是,本申请实施例中对模块的划分是示意性的,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式。下面以采用对应各个功能划分各个功能模块为例进行说明。
图24为一种可能的网络设备的结构示意图。如图24所示,网络设备2400包括处理器2401、光收发器2402和存储器2403。其中,存储器1603是可选的。网络设备2400既可以应用于发送侧设备(如,网络设备2400可以是上述的发送端设备),也应用于接收侧设备(如,网络设备2400可以是上述的接收端设备)。
在应用于发送侧设备时,处理器2401和光收发器2402用于实现图22或图23所示中所示的发送端设备所执行的方法。在实现过程中,处理流程的各步骤可以通过处理器2401中的硬件的集成逻辑电路或软件形式的指令完成上述附图的发送设备所执行的方法。光收发器2402用于接收处理发送的OTN帧,以发送给对端设备(亦称为接收端设备)。
在应用于接收侧设备时,处理器2401和光收发器2402用于实现图22或图23所示的接收端设备所执行的方法。在实现过程中,处理流程的各步骤可以通过处理器2401中的硬件的集成逻辑电路或者软件形式的指令完成前述附图中所述的接收侧设备所执行的方法。光收发器2402用于接收对端设备(亦称为发送端设备)发送的OTN帧,以发送给处理器2401使其进行后续的处理。
存储器2403可以用于存储指令,以使得处理2401可以用于执行如上述图中提及的步骤。或者,存储2403也可以用于存储其他指令,以配置处理器2401的参数以实现对应的功能。
需要说明的是,处理器2401和存储器2403在图2所述的网络设备硬件结构图中,可能位于支路板中,也可能位于支路和线路合一的单板中。或者,处理器2401和存储器2403都包括多个,分别位于支路板和线路板,两个板配合完成前述的方法步骤。
需要说明的是,图24所述的装置也可以用于执行前述提及的附图所示的实施例变形所涉及的方法步骤,在此不再赘述。
基于以上实施例,本申请实施例还提供了一种计算机可读存储介质。该存储介质中存储软件程序,该软件程序在被一个或多个处理器读取并执行时可实现上述任意一个或多个实施例提供的方法。所述计算机可读存储介质可以包括:U盘、移动硬盘、只读存储器、随机存取存储器、磁碟或者光盘等各种可以存储程序代码的介质。
基于以上实施例,本申请实施例还提供了一种芯片。该芯片包括处理器,用于实现上述任意一个或多个实施例所涉及的功能,例如获取或处理上述方法中所涉及的OTN帧。可选地,所述芯片还包括存储器,所述存储器,用于处理器所执行必要的程序指令和数据。该芯片,可以由芯片构成,也可以包含芯片和其他分立器件。
显然,本领域的技术人员可以对本申请实施例进行各种改动和变型而不脱离本申请实施例的范围。这样,倘若本申请实施例的这些修改和变型属于本申请权利要求及其等同技术的范围之内,则本申请也意图包含这些改动和变型在内。
应理解,本申请实施例中提及的处理器可以是中央处理单元(central processing unit,CPU),还可以是其他通用处理器、数字信号处理器(digital signal processor,DSP)、专用集成电路(application specific integrated circuit,ASIC)、现成可编程门阵列(field programmable gate array,FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。 通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。
还应理解,本申请实施例中提及的存储器可以是易失性存储器和/或非易失性存储器。其中,非易失性存储器可以是只读存储器(read-only memory,ROM)、可编程只读存储器(programmable ROM,PROM)、可擦除可编程只读存储器(erasable PROM,EPROM)、电可擦除可编程只读存储器(electrically EPROM,EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory,RAM)。例如,RAM可以用作外部高速缓存。作为示例而非限定,RAM可以包括如下多种形式:静态随机存取存储器(static RAM,SRAM)、动态随机存取存储器(dynamic RAM,DRAM)、同步动态随机存取存储器(synchronous DRAM,SDRAM)、双倍数据速率同步动态随机存取存储器(double data rate SDRAM,DDR SDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM,ESDRAM)、同步连接动态随机存取存储器(synchlink DRAM,SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM,DR RAM)。
需要说明的是,当处理器为通用处理器、DSP、ASIC、FPGA或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件时,存储器(存储模块)可以集成在处理器中。
本领域普通技术人员可以意识到,结合本文中所公开的实施例描述的各示例的单元及步骤,能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的保护范围。
在本申请所提供的几个实施例中,应该理解到,所揭露的装置和方法,可以通过其它的方式实现。例如,以上所描述的装置实施例仅是示意性的,例如,所述单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个单元或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。此外,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或单元的间接耦合或通信连接,可以是电性,机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元实现本申请提供的方案。
另外,在本申请各个实施例中的各功能单元可以集成在一个单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。
在上述实施例中,可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时,可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时,全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。例如,所述计算机可以是个人计算机,服务器,或者网络设备等。所述计算机指令可以存储在计算机可读存储介质中,或者从一个计算机可读存储介质向另一个计算机可读存储介质传输,例如,所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质(例如,软盘、硬盘、磁带)、光介质(例如,DVD)、或者半导体介质(例如固态硬盘(solid state disk,SSD)等。 例如,前述的可用介质可以包括但不限于:U盘、移动硬盘、只读存储器(read-only memory,ROM)、随机存取存储器(random access memory,RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以所述权利要求的保护范围为准。

Claims (48)

  1. 一种传输数据的方法,其特征在于,包括:
    将业务数据映射到数据帧中,所述数据帧包括K个时隙块,所述K个时隙块的每一个时隙块包括M个比特和N*X个字节,所述M个比特中的M1个比特用于承载N个第一指示信息,所述N个第一指示信息中的每个第一指示信息用于分别指示N*X个字节的每X字节承载的对象包括业务数据或填充中的至少一个,其中,K为大于或者等于1的整数,N为大于或等于1的整数,X为大于1的整数,M为大于或等于N的整数,M1小于M;
    发送所述数据帧。
  2. 根据权利要求1所述的方法,其特征在于,所述第一指示信息指示X个字节承载的对象还包括第二指示信息,所述第二指示信息位于所述X字节中的一个特定字节,所述第二指示信息用于指示除所述特定字节之外的(X-1)个字节中用于承载所述业务数据的字节数的数量。
  3. 根据权利要求2所述的方法,其特征在于,所述特定字节中除所述第二指示信息所占用的比特之外的比特用于纠正所述第二指示信息的传输错误。
  4. 根据权利要求1至3中任一项所述的方法,其特征在于,所述N*X个字节中的每X个字节为所述数据帧的一个时隙。
  5. 根据权利要求1至3中任一项所述的方法,其特征在于,Y个相邻的所述时隙块中的Y*N*X个字节为所述数据帧的一个时隙,所述Y为大于或等于1的整数。
  6. 根据权利要求1至3中任一项所述的方法,其特征在于,Z个等间隔的所述时隙块中的Z*N*X个字节为所述数据帧的一个时隙,所述Z为大于或等于1的整数。
  7. 根据权利要求1至6中任一项所述的方法,其特征在于,所述M比特中的M2个比特用于检错或纠正所述N个第一指示信息的传输错误,其中,M2小于M。
  8. 根据权利要求1至7中任一项所述的方法,其特征在于,所述数据帧还包括位置指示信息,所述位置指示信息用于指示时隙周期的起始位置。
  9. 根据权利要求8所述的方法,其特征在于,所述位置指示信息的字节数量为1或2。
  10. 根据权利要求1至9中任一项所述的方法,其特征在于,所述X的取值为8、16、24和32中的一个。
  11. 根据权利要求1至10中任一项所述的方法,其特征在于,所述M的取值为8的倍数。
  12. 一种传输数据的方法,其特征在于,包括:
    将业务数据映射到第一数据帧中,所述第一数据帧的净荷区用于承载所述业务数据,所述第一数据帧的净荷区包括至少一个承载单元,所述至少一个承载单元中的每个承载单元与至少一个校验开销对应,所述至少一个校验开销中的每个校验开销用于对对应的承载单元进行比特交错奇偶检验,所述第一数据帧的比特速率小于1.25Gbit/s;
    将所述第一数据帧映射到第二数据帧的一个或多个时隙中;
    发送所述第二数据帧。
  13. 根据权利要求12所述的方法,其特征在于,
    所述至少一个校验开销位于所述第一数据帧的开销区,所述至少一个承载单元用于承载 所述业务数据。
  14. 根据权利要求12所述的方法,其特征在于,所述承载单元包括开销区和净荷区,所述至少一个校验开销位于所述承载单元的开销区。
  15. 根据权利要求14所述的方法,其特征在于,所述承载单元的开销区还包括保护倒换开销或映射开销中的至少一个。
  16. 根据权利要求12至15中任一项所述的方法,其特征在于,所述校验开销为8比特交织奇偶校验BIP-8。
  17. 根据权利要求12至16中任一项所述的方法,其特征在于,所述第一数据帧的开销区包括路径监控(PM)开销、串联连接监控1(TCM1)开销、串联连接监控2(TCM2)开销和时延测量开销。
  18. 根据权利要求12至17中任一项所述的方法,其特征在于,所述第一数据帧的帧结构为4行*3824列字节或者2行*3824列字节。
  19. 一种传输数据的方法,其特征在于,包括:
    接收数据帧,所述数据帧包括K个时隙块,所述K个时隙块的每一个时隙块包括M个比特和N*X个字节,所述M个比特中的M1个比特用于承载N个第一指示信息,所述N个第一指示信息中的每个第一指示信息用于分别指示N*X个字节的每X字节承载的对象包括业务数据或填充中的至少一个,其中,K为大于或者等于1的整数,N为大于或等于1的整数,X为大于1的整数,M为大于或等于N的整数,M1小于M;
    根据所述N个第一指示信息,从所述数据帧解映射出所述业务数据。
  20. 根据权利要求19所述的方法,其特征在于,所述第一指示信息指示X个字节承载的对象还包括第二指示信息,所述第二指示信息位于所述X字节中的一个特定字节,所述第二指示信息用于指示除所述特定字节之外的(X-1)个字节中用于承载所述业务数据的字节数的数量。
  21. 根据权利要求20所述的方法,其特征在于,所述特定字节中除所述第二指示信息所占用的比特之外的比特用于纠正所述第二指示信息的传输错误。
  22. 根据权利要求19至21中任一项所述的方法,其特征在于,所述N*X个字节中的每X个字节为所述数据帧的一个时隙。
  23. 根据权利要求19至21中任一项所述的方法,其特征在于,Y个相邻的所述时隙块中的Y*N*X个字节为所述数据帧的一个时隙,所述Y为大于或等于1的整数。
  24. 根据权利要求19至21中任一项所述的方法,其特征在于,Z个等间隔的所述时隙块中的Z*N*X个字节为所述数据帧的一个时隙,所述Z为大于或等于1的整数。
  25. 根据权利要求19至24中任一项所述的方法,其特征在于,所述M比特中的M2个比特用于检错或纠正所述N个比特的传输错误,其中,M2小于M。
  26. 根据权利要求19至25中任一项所述的方法,其特征在于,所述数据帧还包括位置指示信息,所述位置指示信息用于指示时隙周期的起始位置。
  27. 根据权利要求26所述的方法,其特征在于,所述位置指示信息的字节数量为1或2。
  28. 根据权利要求19至27中任一项所述的方法,其特征在于,所述X的取值为8、16、24、32中的一个。
  29. 根据权利要求19至28中任一项所述的方法,其特征在于,所述M的取值为8的倍数。
  30. 一种传输数据的方法,其特征在于,包括:
    接收第一数据帧,所述第一数据帧包括一个或多个时隙;
    从所述第一数据帧中解映射出第二数据帧,其中,所述第二数据帧的净荷区用于承载业务数据,所述第二数据帧的净荷区包括至少一个承载单元,所述至少一个承载单元中的每个承载单元与至少一个校验开销对应,所述至少一个校验开销中的每个校验开销用于对对应的承载单元进行比特交错奇偶检验,所述第一数据帧的比特速率小于1.25Gbit/s;
    从所述第二数据帧中解映射出所述业务数据。
  31. 根据权利要求30所述的方法,其特征在于,
    所述至少一个校验开销位于所述第一数据帧的开销区,所述至少一个承载单元用于承载所述业务数据。
  32. 根据权利要求30所述的方法,其特征在于,所述承载单元包括开销区和净荷区,所述至少一个校验开销位于所述承载单元的开销区。
  33. 根据权利要求32所述的方法,其特征在于,所述承载单元的开销区还包括保护倒换开销或映射开销中的至少一个。
  34. 根据权利要求30至33中任一项所述的方法,其特征在于,所述校验开销为X比特交织奇偶校验BIP-8。
  35. 根据权利要求30至34中任一项所述的方法,其特征在于,所述第一数据帧的开销区包括路径监控(PM)开销、串联连接监控1(TCM1)开销、串联连接监控2(TCM2)开销和时延测量开销。
  36. 根据权利要求30至35中任一项所述的方法,其特征在于,所述第一数据帧的帧结构为4行*3824列字节或者2行*3824列字节。
  37. 一种传输数据的方法,其特征在于,包括:
    将业务数据映射到数据帧中,所述数据帧包括K个时隙块,所述K个时隙块的每一个时隙块包括M个比特和N*X个字节,所述M个比特用于承载N个第一指示信息,所述N个第一指示信息中的每个第一指示信息用于分别指示N*X个字节的每X字节承载的对象包括业务数据或填充中的至少一个,其中,K为大于或者等于1的整数,N为大于或等于1的整数,X为大于1的整数,M为大于或等于N的整数;
    发送所述数据帧。
  38. 根据权利要求37所述的方法,其特征在于,所述N等于1。
  39. 根据权利要求37或38所述的方法,其特征在于,所述第一指示信息指示X个字节承载的对象还包括第二指示信息,所述第二指示信息位于所述X字节中的一个特定字节,所述第二指示信息用于指示除所述特定字节之外的(X-1)个字节中用于承载所述业务数据的字节数的数量。
  40. 根据权利要求37至39中任一项所述的方法,其特征在于,所述N*X个字节中的每X个字节为所述数据帧的一个时隙。
  41. 根据权利要求37至39中任一项所述的方法,其特征在于,Y个相邻的所述时隙块中的Y*N*X个字节为所述数据帧的一个时隙,所述Y为大于或等于1的整数。
  42. 根据权利要求37至39中任一项所述的方法,其特征在于,Z个等间隔的所述时隙块中的Z*N*X个字节为所述数据帧的一个时隙,所述Z为大于或等于1的整数。
  43. 根据权利要求37至42中任一项所述的方法,其特征在于,所述X的取值为8、16、 24和32中的一个。
  44. 根据权利要求37至43中任一项所述的方法,其特征在于,所述M的取值为2的倍数。
  45. 根据权利要求37至43中任一项所述的方法,其特征在于,所述M个比特分为N组,所述N组中的每一组包括的比特用于承载所述N个第一指示信息中的一个指示信息。
  46. 根据权利要求37至42中任一项所述的方法,其特征在于,M的取值为2,X的取值为16,N的取值为1。
  47. 一种传输数据的装置,其特征在于,包括:用于执行如权利要求1至11中任一项所述方法的模块,或用于执行如权利要求12至18中任一项所述方法的模块,或用于执行如权利要求19至29中任一项所述方法的模块,或用于执行如权利要求30至36中任一项所述方法的模块,或用于执行如权利要求37至46中任一项所述方法的模块。
  48. 一种芯片,其特征在于,所述芯片包括处理器和通信接口,所述通信接口用于接收数据帧并传输至所述处理器或将数据帧发送给包括所述芯片的通信装置之外的其他通信装置,所述处理器用于执行如权利要求1至11中任一项所述的方法,或如权利要求12至18中任一项所述的方法,或如权利要求19至29中任一项所述的方法,或如权利要求30至36中任一项所述的方法,或如权利要求37至46中任一项所述的方法。
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