WO2019213901A1 - 光传送网中低速业务数据的处理方法、装置和系统 - Google Patents

光传送网中低速业务数据的处理方法、装置和系统 Download PDF

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WO2019213901A1
WO2019213901A1 PCT/CN2018/086345 CN2018086345W WO2019213901A1 WO 2019213901 A1 WO2019213901 A1 WO 2019213901A1 CN 2018086345 W CN2018086345 W CN 2018086345W WO 2019213901 A1 WO2019213901 A1 WO 2019213901A1
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frame
data frame
data
low
rate
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PCT/CN2018/086345
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English (en)
French (fr)
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苏伟
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华为技术有限公司
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First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=68466687&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=WO2019213901(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Priority to EP23205061.7A priority Critical patent/EP4336753A2/en
Priority to RU2020140446A priority patent/RU2759514C1/ru
Priority to EP18917665.4A priority patent/EP3783820B1/en
Priority to BR112020022732-3A priority patent/BR112020022732A2/pt
Priority to CN201880092788.XA priority patent/CN112042138B/zh
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN202210055924.6A priority patent/CN114513710A/zh
Priority to PCT/CN2018/086345 priority patent/WO2019213901A1/zh
Priority to ES18917665T priority patent/ES2963355T3/es
Publication of WO2019213901A1 publication Critical patent/WO2019213901A1/zh
Priority to US17/094,259 priority patent/US11233571B2/en
Priority to US17/582,532 priority patent/US11764874B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/27—Arrangements for networking
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0062—Network aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/07—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
    • H04B10/075—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal
    • H04B10/079—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
    • H04B10/0793—Network aspects, e.g. central monitoring of transmission parameters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H04B10/66—Non-coherent receivers, e.g. using direct detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1652—Optical Transport Network [OTN]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/50—Queue scheduling
    • H04L47/62—Queue scheduling characterised by scheduling criteria
    • H04L47/625—Queue scheduling characterised by scheduling criteria for service slots or service orders
    • H04L47/6275—Queue scheduling characterised by scheduling criteria for service slots or service orders based on priority
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/70—Admission control; Resource allocation
    • H04L47/80—Actions related to the user profile or the type of traffic
    • H04L47/805—QOS or priority aware
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/70—Admission control; Resource allocation
    • H04L47/82—Miscellaneous aspects
    • H04L47/829—Topology based
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0075—Arrangements for synchronising receiver with transmitter with photonic or optical means

Definitions

  • the present application relates to the field of optical communication technologies, and in particular, to a processing technology for service data in an optical transport network.
  • optical transport network is the core technology of the backbone bearer network, and includes multiple rate optical bearers for carrying various high-speed service data.
  • optical data unit 0 ODU0
  • Gbps Gigabit per second
  • FIG. 1 is a schematic diagram of a mapping multiplexing path of a low speed service in the prior art. As shown in FIG. 1, it is currently required to form a high rate signal by convergence (ie, multiplexing) of multiple low speed signals.
  • the high-speed signals include the Synchronous Transport Module (STM)-16, STM-64, and STM-256. They can be mapped to the existing OTN containers such as ODU1, ODU2, and ODU3 for transmission.
  • STM Synchronous Transport Module
  • the signal is also referred to as E1.
  • the E1 signal is first mapped to the container 12 (container 12, C12), and then C12 is mapped to the virtual container 12 (virtual container 12, VC12).
  • the VC12 adds overhead, it is encapsulated as a tributary unit 12 (tributary unit 12, TU-12), TU-12 is multiplexed to tributary unit group 2 (TUG-2), and then TUG-2 is multiplexed to VC3.
  • VC3 adds overhead and is encapsulated as management unit 3 (adminstrative unit 3, AU-3), AU-3 is multiplexed to the management unit group (AU group, AUG), and then multiple AUGs combine to form an STM-N interface signal.
  • STM-N can be one of the various high-rate STM signal types mentioned above.
  • the aforementioned STM-N interface signals can be transmitted through existing containers of OTN.
  • the problem with the current processing method is that the low-speed signal needs to be multiplexed multiple times to form a high-rate signal, and then the OTN technology is used for carrying, and the processing process is complicated and the efficiency is low.
  • the signal processing delay is also large.
  • the embodiment of the present invention provides a method and a device for processing service data in an optical transport network, which are used to solve the existing complicated processing process and low efficiency.
  • the embodiment of the present application provides a method for processing service data in an optical transport network, where the method is applied to a sending side, and the method includes:
  • the low-speed service data management and maintenance information the rate of the payload area of the first data frame is not less than the rate of the low-speed service data, and the rate of the low-speed service data is less than 1 Gbps;
  • the rate of the time slot is not greater than 100 Mbps;
  • OTU Optical Transport Unit
  • the overhead area includes a frame header indication, a multiframe indication, and path monitoring information.
  • the payload area includes padding information, where the padding information is used to cancel a difference between a rate of a payload area of the first data frame and a rate of the low speed service data.
  • the size of the first data frame is X*M bytes, where X and M are positive integers, and M is the slot interleaving granularity of the second data frame. Specifically, the size may be 119 bytes, where M is equal to 1; or, the first data frame is X*16 bytes, where M is equal to 16.
  • the number of bytes of the payload area of the first data frame is not more than 1.25 times the number of bytes of the frame structure of the low-speed service data. That is, the rate of the payload area of the first data frame is not more than 1.25 times the rate of the low speed data.
  • the low-speed service data is one or more of E1, E3, E4, virtual container (VC) 12, VC3, VC4, synchronous transmission module (STM)-1, STM-4, and fast Ethernet (FE).
  • the second data frame is ODU0, ODU1, ODU2, ODU3, ODU4, or ODUflex.
  • the mapping the first data frame to one or more time slots of the second data frame comprises: mapping the first data frame into an intermediate frame, where The intermediate frame includes a number of time slots equal to a number of time slots of the second data frame that the first data frame needs to occupy; mapping the intermediate frame to the one or more time slots of the second data frame in.
  • the second data frame is a multi-row and multi-column structure
  • the integer row of the second data frame is used to divide K time slots
  • K is a positive integer
  • a plurality of the Two data frames are used to divide K time slots.
  • the method further comprises: placing mapping information into one or more time slots of the second data frame, wherein the mapping information comprises mapping the first data frame to the The number of m bits and clock information in one or more time slots of the second data frame.
  • the embodiment of the present application provides a method for processing service data in an optical transport network, where the method is applied to a receiving side, and the method includes:
  • the first data frame includes a plurality of time slots, and the rate of the time slots is not greater than 100 Mbps;
  • the second data frame includes an overhead area and a payload area, where the payload area is used to carry low-speed service data, and the overhead area is used for Carrying the management and maintenance information of the low-speed service data, the rate of the payload area of the second data frame is not less than the rate of the low-speed service data, and the rate of the low-speed service data is less than 1 Gbps, the first data One or more time slots of the frame are used to carry the second data frame;
  • the overhead area includes a frame header indication, a multiframe indication, and path monitoring information.
  • the size of the second data frame is X*M bytes, where X and M are positive integers, and M is the slot interleaving granularity of the first data frame.
  • the size of the second data frame may be 119 bytes, where M is equal to 1; or the second data frame may be X*16 bytes, where M is equal to 16.
  • the number of bytes of the payload area of the second data frame is not more than 1.25 times the number of bytes of the frame structure of the low speed service data. That is, the rate of the payload area of the first data frame is not more than 1.25 times the rate of the low speed data.
  • the low-speed service data is E1, E3, E4, virtual container (VC) 12, VC3, VC4, synchronous transmission module (STM)-1, STM-4, and fast Ethernet (FE).
  • VC virtual container
  • STM synchronous transmission module
  • FE fast Ethernet
  • the de-mapping the second data frame from the first data frame comprises: de-mapping from the first data frame to an intermediate frame, wherein the intermediate frame includes The number of time slots is equal to the number of time slots of the first data frame that the second data frame needs to occupy; the intermediate frame is demapped to the second data frame.
  • an embodiment of the present application provides an apparatus, where the processing apparatus includes a processor and a memory, wherein: the memory stores program code, and the processor is configured to read and execute the memory storage. Program code to implement the method of the first aspect or any one of the specific aspects of the first aspect.
  • an embodiment of the present application provides an apparatus, where the processing apparatus includes a processor and a memory, wherein: the memory stores program code, and the processor is configured to read and execute the memory storage. Program code to implement the method of any of the specific aspects of the second aspect or the second aspect.
  • an embodiment of the present application provides a chip, where the chip is connected to a memory, for reading and executing program code stored in the memory, to implement the first aspect, any specific design of the first aspect.
  • the embodiment of the present application provides a system, where the system includes the device according to any one of the third aspect or the third aspect, and any specific design of the fourth aspect or the fourth aspect. The device described.
  • the technology provided by the embodiments of the present application can reduce the processing complexity of low-rate service data faced by the prior art and improve processing efficiency.
  • the data processing technology provided by the embodiment of the present application does not need to perform multi-level mapping, and has the advantages of fast processing rate.
  • FIG. 1 is a schematic diagram of a mapping path of a low-speed service in the prior art
  • FIG. 2 is a schematic diagram of a possible application scenario according to an embodiment of the present application.
  • FIG. 3 is a schematic diagram of a possible hardware structure of a network device
  • 4A is a schematic diagram of a possible low-speed data frame mapping hierarchy
  • 4B is a schematic diagram of a frame structure of a possible low-speed data frame
  • 4C is a schematic diagram of a frame structure of another possible low-speed data frame
  • 4D is a schematic diagram of a frame structure of another possible low-speed data frame
  • FIG. 5 is a schematic diagram of a possible ODU data frame time slot division
  • FIG. 6 is a schematic diagram of another possible ODU data frame time slot division
  • FIG. 7 is a schematic diagram of a possible slot division of a second data frame and a uTSG.K frame structure
  • 8A is an example of a uTSG.K frame structure and a time slot division of a second data frame
  • 8B is another example of a slot division of a uTSG.K frame structure and a second data frame;
  • 8C is still another example of the uTSG.K frame structure and the slot division of the second data frame
  • Figure 9 is a flow chart of a possible low rate service data processing
  • FIG. 10 is a flowchart of a low-rate service data processing according to an embodiment of the present application.
  • FIG. 11 is a schematic diagram of a mapping process of a possible low-rate service
  • Figure 12 is a schematic diagram of a possible intermediate frame structure
  • Figure 13 is a schematic diagram of a possible starting position indicating overhead position
  • FIG. 14 is a schematic diagram of a location of a possible multiplexing structure indicating overhead
  • Figure 15 is a schematic diagram of a possible network device structure.
  • the data is transmitted from the source device A to the destination device B, and passes through the device M.
  • the device M is located between the device A and the device B. Then, the device A is in the upstream direction of the device M, and the device B is in the device M. Downstream direction.
  • the embodiments of the present application are applicable to an optical network, such as an OTN.
  • An OTN is usually connected by multiple devices through optical fibers. It can be composed of different topology types such as line type, ring shape and mesh type according to specific needs.
  • the OTN 200 shown in FIG. 2 is composed of eight OTN devices 201, that is, devices A-H. Wherein, 202 indicates an optical fiber for connecting two devices; and 203 indicates a customer service interface for receiving or transmitting customer service data.
  • An OTN device may have different functions depending on actual needs. In general, OTN devices are classified into optical layer devices, electrical layer devices, and opto-electric hybrid devices.
  • An optical layer device refers to a device capable of processing an optical layer signal, such as an optical amplifier (OA) or an optical add-drop multiplexer (OADM).
  • OA optical amplifier
  • OADM also known as optical line amplifier (OLA)
  • OLA optical line amplifier
  • OADM is used to spatially transform optical signals so that they can be output from different output ports (sometimes referred to as directions).
  • OADM can be divided into fixed OADM (fixed OADM, FOADM), configurable OADM (reconfigurable OADM, ROADM).
  • a electrical layer device refers to a device capable of processing electrical layer signals, such as a device capable of processing an OTN signal.
  • An opto-electric hybrid device refers to a device that has the ability to process optical layer signals and electrical layer signals. It should be noted that an OTN device can aggregate a variety of different functions according to specific integration needs. The technical solution provided by the present application is applicable to OTN devices of different forms and integrations.
  • the data frame structure used by the OTN device in the embodiment of the present application is an OTN frame, which is used to carry various service data and provides rich management and monitoring functions.
  • the OTN frame may be an ODUk, an ODUCn, an ODUflex, or an optical transport unit k (OTUk), an OTUCn, or a flexible OTN (FlexO) frame.
  • OTUk optical transport unit k
  • FlexO flexible OTN
  • an ODU frame refers to any one of ODUk, ODUCn, or ODUflex
  • an OTU frame refers to any one of OTUk, OTUCn, or FlexO.
  • one or several frames may be specified to carry a subsequently defined low-speed data frame. For example, it is stipulated that only ODUflex is used. This application does not limit this.
  • FIG. 3 is a schematic diagram of a possible hardware structure of the device.
  • an OTN device 300 includes a power source 301, a fan 302, an auxiliary board 303, and may further include a tributary board 304, a circuit board 306, a cross board 305, an optical layer processing board (not shown), and System control and communication type board 307.
  • a network device that is a core node may not have a tributary board 304.
  • a network device that is an edge node may have multiple tributary boards 304.
  • the power supply 301 is used to supply power to the OTN device 300, and may include primary and backup power supplies.
  • the fan 302 is used to dissipate heat from the device.
  • the auxiliary board 303 is used to provide an external alarm or an auxiliary function such as an external clock.
  • the tributary board 304, the cross board 305, and the circuit board 306 are primarily electrical layer signals for processing the OTN.
  • the tributary board 304 is used for receiving and transmitting various customer services, such as an SDH service, a packet service, an Ethernet service, and a forward transmission service. Further, the tributary board 304 can be divided into a client side optical module and a signal processor.
  • the client side optical module may be an optical transceiver for receiving and/or transmitting service data.
  • the signal processor is used to implement mapping and demapping processing of service data to data frames.
  • the cross-board 305 is used to implement the exchange of data frames to complete the exchange of one or more types of data frames.
  • the circuit board 306 mainly implements processing of line side data frames. Specifically, the circuit board 306 can be divided into a line side optical module and a signal processor.
  • the line side optical module may be a line side optical transceiver for receiving and/or transmitting data frames.
  • the signal processor is used to implement multiplexing and demultiplexing of data frames on the line side, or mapping and demapping processing.
  • the system control and communication type board 307 is used to implement system control and communication. Specifically, information can be collected from different boards through the backplane, or control commands can be sent to the corresponding boards.
  • a specific component for example, a signal processor
  • the present application is not limited thereto. It should be noted that the embodiment of the present application does not impose any limitation on the type of the board included in the device and the functional design and quantity of the board.
  • ODU LR the frame structure
  • LR is represented as a low rate. It should be noted that this name is only an example, and does not constitute a limitation on the frame structure defined in this application. The following is a brief introduction of the location of the ODU LR in the current OTN frame hierarchy, and then gives specific examples of several ODU LR frame structures.
  • Figure 4A shows an example of an OTN frame mapping hierarchy with an increased ODU LR .
  • data of a low rate service is mapped into the ODU LR .
  • the ODU LR is then placed in turn into the ODU i and OTU m , or in the ODU i , ODU j and OTU m .
  • Business data can also be referred to as business signals, customer data, or customer business data.
  • FIG. 4B-4D show schematic diagrams of frame structures of various types of ODU LRs .
  • the ODU LR frame structure shown in FIG. 4B is for low-rate SDH service signals of VC12, VC3, and VC4;
  • the ODU LR frame structure shown in FIG. 4C is the same as that shown in FIG. 4B, but the client it carries
  • the signals are low-rate Plesiochronous Digital Hierarchy (PDH) service signals such as E1, E3, and E4;
  • Figure 4D shows two general ODU LR frame structures that can be used to carry different types of service signals. . It should be noted that the example shown in FIG. 4B and FIG.
  • the general ODU LR frame structure shown in Figure 4D can be applied to different service types, and the processing is simple. In practical applications, any one or more of the frame structure design methods can be selected in combination with design requirements.
  • an ODU LR frame structure includes an overhead area and a payload area.
  • the payload area is used to carry low-rate service data
  • the overhead area is used to carry overhead information for management and maintenance in the data transmission process.
  • the ODU LR (VC12), ODU LR (VC3), and ODU LR (VC4) frame lengths are 149, 774, and 2358 bytes (byte, hereinafter referred to as B). They are used to carry three kinds of SDH service data such as VC12, VC3 and VC4.
  • the overhead area size of these three frame structure examples is 9B, and the payload area sizes are 140B, 765B, and 2349B, respectively.
  • the byte lengths of VC12, VC3, and VC4 defined in the current SDH standard are the same as the payload areas of their corresponding ODU LR frame structures, namely, 140B, 765B, and 2349B, respectively. That is to say, the payload area of the proprietary ODU LR frame structure is used to carry customer service data, which improves the utilization of the OTN frame structure while maintaining the same error check of the original service in the SDH network. And frequency jitter and drift performance.
  • a VC12 frame can be directly carried by an ODU LR (VC12).
  • the frame periods of ODU LR (VC12), ODU LR (VC3), and ODU LR (VC4) can be specified as 500 microseconds ( ⁇ s), 125 ⁇ s, and 125 ⁇ s.
  • the advantage of this is that the frame period of the ODU LR is the same as the frame period of the VC signal it carries, and the clock characteristics of the service (sometimes called frequency characteristics) can be maintained, thereby avoiding excessive jitter when the receiving device is framing and improving. The accuracy of the framing.
  • the frame period refers to the time when one data frame is transmitted. Table 1 gives some basic parameters of the three ODU LR frame structures shown in Figure 4B.
  • the bit rate of the ODU LR frame can be calculated by the rate of the SDH signal it carries.
  • the rate of the ODU LR is the rate of the SDH signal it carries * (the number of bytes of the ODU LR / the number of bytes of the SDH signal frame).
  • the rates corresponding to VC12, VC3, and VC4 are: 2.24 Mbps, 48.96 Mbps, and 150.336 Mbps, respectively.
  • the ODU LR (E1), ODU LR (E3), and ODU LR (E4) frame structure lengths are the same as the three frame structure examples in FIG. 4B.
  • the difference is that the frame structure in Figure 4C carries the three PDH signals E1, E3 and E4. Their rates are 2.048Mbps, 34.368Mbps and 139.264Mbps, respectively, which is slightly lower than the three SDH signal rates mentioned above. . Therefore, the frame structure defined in Fig. 4B can be reused.
  • rate adaptation is required for mapping.
  • the PDH signal may be encapsulated into corresponding SDH data frames, ie, E1 to VC12, E3 to VC3, E4 to VC4, and then mapped to corresponding ODU LR frames.
  • the PDH signal can be directly mapped into the payload area of the corresponding ODU LR , and the rate difference between the PDH signal and the ODU LR frame carrying the signal can be eliminated by filling in some padding information.
  • the 765B of the payload area can be divided into four 57Bs, three 120Bs, and one 177B as shown in FIG. Among them, four 57Bs are padding bytes for carrying padding information, and other parts are used for carrying E3 signals.
  • FIG. 5 is only an example, and the location of the padding information in the payload area of the ODU LR frame may also be determined by other division methods. For example, divide a 228B into a filled area. This application does not limit the location of the filling information.
  • the padding information occupies the payload area of the ODU LR frame by no more than 20% of the total bytes of the latter. That is, the number of bytes in the payload area of the ODU LR frame is not more than 1.25 times the number of bytes of the client data.
  • the padding information does not carry any actual data or overhead and is only used to match the rate difference between the client signal and the data frame carrying the client signal. Typically, padding bytes are predefined special characters.
  • Figure 4D shows a schematic diagram of two possible normalized ODU LR frame structures, which are 119 and X * 16 bytes in length, where X is a positive integer.
  • the length of the frame structure may be an integer multiple of the slot interleaving granularity of the data frame carrying the frame structure.
  • Inter-slot interleaving granularity refers to the basic length occupied by a time slot when a data frame is used for time slot division. Generally, one time slot needs to occupy a plurality of the aforementioned basic lengths.
  • FIG. 7 and FIGS. 8A-8C can be seen. In Fig.
  • 119 bytes are understood to be 119*1 bytes, wherein the slot interleaving granularity is 1 byte, and X*16 bytes indicates that the slot interleaving granularity is 16 bytes.
  • the slot interleaving granularity may be determined according to specific needs, for example, may be defined as 1 byte, 4 bytes (2 2 bytes), 8 bytes ( 23 bytes), 16 bytes (2) 4 bytes) and 20 bytes, etc. This application does not limit this. It should also be noted that this normalized design can be used to carry a variety of low rate signals, such as low rate private line services now or in the future.
  • the client signal may be mapped into the ODU LR frame by means of synchronous mapping.
  • the overhead area of the ODU LR may include a frame alignment signal (FAS), a multi-frame alignment signal (MFAS), and a path monitoring ( Path monitoring, PM) and automatic protection switching and protection communication channel (APS/PCC) bytes occupy 4, 1, 3 and 1 bytes respectively.
  • the overhead area may also include a reserved field (RES) as shown in FIG. 4D.
  • the ODU LR only includes a small amount of overhead information, which is used to implement end-to-end management and monitoring functions, which improves the service carrying efficiency of frames and reduces processing complexity.
  • the FAS is mandatory information, and is used to implement the framing function of the ODU LR frame.
  • Additional information contained in the overhead area is optional. For example, when the number of bytes required for one information in the overhead area exceeds the number of bytes allocated by the overhead area for the information, it may be necessary to introduce the MFAS. For another example, if a protection switching or path monitoring function needs to be provided, correspondingly, the overhead area needs to include APS/PCC or PM information.
  • the overhead locations of Figures 4B-4D are merely examples.
  • the ODU LR frame can also be designed as an overhead load staggered structure.
  • Figure 6 shows an example.
  • the overhead of a total length of 9 bytes is placed in 9 locations separately, while the load occupies other locations. That is, for the ODU LR (VC12), one overhead byte is inserted for every 15 payload bytes in the first four 15 payload bytes, and an overhead is inserted for every 16 payload bytes in the last five 16 payload bytes. Bytes, a total of 149 bytes.
  • ODU LR (VC3) and ODU LR (VC4) are also overhead and load staggered in ODU LR data frames.
  • ODU LR (VC3) one overhead byte is inserted for every 85 payload bytes, for a total of 774 bytes; in ODU LR (VC4), one overhead byte is inserted for every 261 payload bytes, for a total of 2358 bytes.
  • ODU LR frame structure shown in Figures 4B-4D and Figures 5-6 is a one-row, multi-column structure.
  • the specific presentation structure of the frame may also be a structure of multiple rows and columns, or a structure of multiple rows and columns.
  • the current OTN frame structure only supports 1.25 Gbps slot division, and the slot granularity is too large, which is disadvantageous for the bearer of low-rate service data.
  • This application splits an existing OTN frame into K time slots. Among them, the rate of one time slot is much smaller than the traditional time slot rate.
  • the newly defined time slot in this application is referred to as a minislot.
  • the rate of the minislot can be 2.5 Mbps, or a smaller rate such as 5 Mbps, 20 Mbps, and the like. Maximally, the minislot rate does not exceed 100 Mbps.
  • the ODU LR frame may occupy one or more mini-slots of data frames carrying ODU LR frames.
  • the number of specific occupied slots depends on the ODU LR rate and the rate of one minislot. Specifically, refer to the description of the subsequent embodiments.
  • the slot division for the ODU frame carrying the ODU LR may be performed in units of lines or frames.
  • the so-called behavior basic unit refers to the second data frame of the r line as a whole to perform time slot division; the so-called frame as a basic unit refers to when the s ODU frames are regarded as a whole.
  • Gap division In order to simplify the description, a frame which is divided as a time slot as a whole is referred to as a minislot group (uTSG.K), where K represents the number of microslots that this frame structure can divide. For a uTSG.K, K is a fixed value, for example: 512, 480, etc.
  • the payload area of the ODU frame structure consists of 4*3808 bytes, that is, 4 rows*3808 columns, one row including 3808 bytes and one frame including 15232 bytes. Then, if uTSG.K occupies the r line of an ODU frame, its size is r*3808 bytes; if the uTSG.K frame occupies s ODU frames, its size is s*4*3808 bytes.
  • the size of uTSG.K is usually designed as an integer multiple of the slot interleaving granularity, ie N*M bytes, where M is the slot interleaving granularity of the second data frame ( Subsequently referred to as code blocks), N is a positive integer.
  • FIG. 7 An example of time slot division of an OTN frame is shown in FIG. 7, where the OTN frame of the r line constitutes a uTSG.K.
  • the OTN frame of the r line is divided into N*M code blocks for supporting K minislots.
  • the first to the Kth code blocks ie, the code blocks #1-#K in FIG. 7 belong to the 1-Kth minislot, that is, the first code block used to place the corresponding minislot. .
  • the K+1th to 2Kth code blocks belong to the 1-Kth minislot, that is, the second code block for placing the corresponding minislot. And so on.
  • FIG. 7 shows the relationship between uTSG.K and minislots according to the structure of one row and multiple columns.
  • the minislot occupies the first, the K+1th, the 2K+1th, ..., and the N-K+ of uTSG.k. 1 code block.
  • N/K code blocks There are a total of N/K code blocks per microslot.
  • one microslot includes two parts, one part is in the overhead area (not shown in FIG. 7), and the other part is in the payload area.
  • Each of the mini-slots #1-#K defined in the figure can be used to carry an ODU LR frame.
  • the present application does not limit the OTN frame rate that needs to be divided into mini-slots.
  • the appropriate frame structure in the existing OTN frame structure hierarchy may be selected according to specific needs to perform mini-slot partitioning and ODU LR bearer.
  • r is 16 lines, 256 lines, and 16 lines, respectively.
  • the calculation formula may not be given, and the specific values of the rate, number of slots, slot granularity, and basic unit size of slot division may be directly given.
  • the example given above is a case where there is no padding information at all, providing a higher carrying efficiency. In practical applications, it is also possible to use a method of using a smaller amount of padding information for time slot division. This application does not limit this.
  • the processing method of the low rate service data proposed by the present application is further described below.
  • the OTN device as the transmitting end needs to perform the following steps to complete the bearer of the low-rate service data.
  • S701 Mapping low-speed service data into the first data frame, where the rate of the low-rate service data is less than 1 Gbps;
  • the OTN device maps the received low-speed service data to any one of the ODU LR frames defined above, that is, the first data frame is an ODU LR frame.
  • the first data frame includes an overhead area and a payload area, where the payload area is used to carry the low-speed service data, and the overhead area is used to carry management and maintenance information about the low-speed service data (sometimes Also referred to as running, managing, and maintaining information, the rate of the payload area of the first data frame is not less than the rate of the low speed traffic data.
  • the present application is directed to a service that cannot be directly carried over an OTN container of the prior art due to its small rate.
  • the rate of the first data frame may match the low speed service data.
  • Rate matching means that the rate of the payload area of the first data frame is equal to the rate of the service data, or the rate of the payload area of the first data frame is (the rate of the service data, the service data Within the range of rate * 1.25), or the rate of the first data frame is in the range of (the rate of the traffic data, the rate of the traffic data * 1.25).
  • the OTN device needs to further process the ODU LR frame, that is, map it to a higher rate ODU frame.
  • the ODU LR frame occupies one or more time slots of a higher rate ODU frame.
  • the time slot is the aforementioned minislot.
  • the rate of this time slot is no more than 100 Mbps.
  • the OTN device needs to encapsulate the above-mentioned higher rate ODU data frame into an OTU frame.
  • the ODU data frame is directly encapsulated into an OTU frame without being multiplexed.
  • the ODU2 frame encapsulates the inverted OTU2.
  • the ODU data frame is further multiplexed into a higher rate ODU data frame and then encapsulated into an OTU frame.
  • the ODUflex frame is multiplexed into the ODU3 frame and then encapsulated into the OTU3 frame.
  • S704 Send the OTU frame.
  • the OTN device sends the generated OTU frame to the downstream network device.
  • One embodiment of the present application provides a method, apparatus, and system for low rate data processing.
  • the network device of FIG. 2 is taken as an example, and the device at the transmitting end is A and the device at the receiving end is H.
  • a and H are only examples, and can be replaced with other paths for transmitting low-rate service data.
  • the path may be replaced by device A-device H-device G-device F, where device A is the source device, device F is the destination device, device H and device G-bit intermediate device.
  • FIG. 10 is a schematic flowchart diagram of the embodiment. Each step is described in detail below. In the following steps, steps S801 to S804 are performed by the transmitting device A, and steps S805 to S807 are performed by the receiving device H. It should be noted that, in order to avoid repetition, the OTU frame sent by the receiving device H to the device A is not given in the following steps.
  • S801 Mapping low-speed service data into the first data frame
  • step S701 maps the low rate service data to be transmitted into the previously defined ODU LR frame.
  • the following description is made by taking the low-rate service data as VC3 and the ODU LR as the ODU LR (VC3) as an example.
  • the low rate service may be any existing low rate service, such as the aforementioned SDH signal and PDH signal.
  • STM-1, STM-4, and Fast Ethernet (FE) services is another example.
  • the frame structure of the ODU LR can also be any of the various examples mentioned above.
  • the first data frame may include overhead information as described in FIG. 4B.
  • the FAS may be a fixed pattern, for example: 0xF6F62828; the MFAS may range from 0 to 255, and the number of ODU LR frames is increased according to the number of ODU LR frames.
  • the MFAS in the first frame to the 256th frame is taken. The value is 0-255, and the frame after the 257th frame is cyclically incremented again according to 0-255; the PM field may further include a trail trace identifier (TTI) and an 8-bit interleaved parity (bit-interleaved parity).
  • TTI trail trace identifier
  • 8-interleaved parity 8-bit interleaved parity
  • the APS/PCC provides automatic protection switching and protection communication channel functions for carrying information related to the protection switching protocol.
  • FIG 11 shows a specific example in which the first step gives the mapping of VC12 traffic into ODU LR frames.
  • the VC12 service has a bit rate of 2.24 Mbit/s and a frame size of 140 bytes.
  • the bit synchronization is mapped into the payload area of the ODU LR (VC12) frame.
  • a VC12 frame is placed just in the payload area of an ODU LR (VC12) frame.
  • the ODU LR (VC12) frame size is 149 bytes.
  • the payload area is 140 bytes and the overhead area is 9 bytes.
  • the overhead is then generated and placed into the ODU LR (VC12) overhead area, including FAS, MFAS, PM, and APS/PCC.
  • the bit rate of the ODU LR (VC12) is 2.384 Mbit/s.
  • S802 Mapping the first data frame to one or more time slots of the second data frame, the rate of the time slot is not greater than 100 Mbps;
  • step S702 is similar to step S702 of FIG. 9.
  • the description for step S702 is also applicable to this step, and details are not described herein.
  • Table 3 gives an example of a more accurate microslot rate and a corresponding number of microslots corresponding to the second data frame being an ODUflex frame, the number of microslots being 512 and 480, respectively.
  • the rate of the ODUflex depends on the higher order ODU frame carrying the ODUflex, so the 2-4 columns in Table 3 give the corresponding divided minislots for different frame rates of the ODUflex bearer. Rate and number.
  • the division parameters (including the number of mini-slots and the precise rate) of the mini-slot for one other type of second data frame can be obtained by referring to Table 3, which is not listed here.
  • the third line indicates the specific bit rate corresponding to the ODUflex at a rate of 1.25G;
  • the fourth row and the fifth row respectively give precise rates corresponding to each minislot when an ODUflex frame is divided into 512 minislots and 480 minislots. It should be noted that the mini-slot rate is only the rate occupying the ODUflex payload area.
  • the rate of division into the same fixed number of minislots is different depending on the rate of the second data frame.
  • the bit rate of an ODU frame is equal to the bit rate of a single minislot * the number of minislots * coefficients.
  • the coefficient is equal to the number of bytes of a second data frame / (the number of bytes of a second data frame - the number of reserved bytes).
  • the purpose of introducing the coefficients is to reserve some margin when performing time slot division on the second data frame, and to tolerate a larger frequency offset of the client signal, so that the signal can be mapped even if there is a slight signal rate change. Go to the second data frame. Typically, the number of 0-4 bytes is reserved.
  • the intermediate frame is a subset of uTSG.K, and is composed of n mini-slots of uTSG.K.
  • step S802 further includes the following:
  • uTSSG.n micro tributary slot sub group
  • n is the number of microslots included in the intermediate frame.
  • the value of n may be different.
  • a flexible tributary slot group.n, FTSG. n or called a programmable time slot group (programmable slot group.n, PTSG.n), or a flexible optical data tributary unit.n (ODTUflex.n).
  • FTSG. n FTSG. n
  • programmable time slot group programmable slot group.n, PTSG.n
  • ODTUflex.n flexible optical data tributary unit.n
  • uTSSG.n includes two parts, one is an overhead area, and the other part is a payload area, which is divided into n mini-slots.
  • ODU LR ODU LR
  • each The rate of one minislot can be 2.419673751 Mbps as described in Table 3.
  • the slot division manner of the second data frame is divided in the manner of FIG. 8B. Take the ODU LR (VC12) frame shown in Table 1 as an example, and the rate is 2.384 Mbps.
  • the ODU LR frame requires 1 minislot to be carried. That is to say, uTSSG.n includes 1 minislot, ie uTSSG.1.
  • the ODU LR that has already carried the VC12 is mapped into the uTSSG.1 frame, and the uTSSG.1 frame includes 119*16 bytes, that is, 1904 bytes.
  • BMP bit synchronous mapping procedure
  • mapping ODU LR (VC12) to uTTSG.n and uTTSG.n to uTSG.K in FIG. 12 are shown in one step. In the actual application process, it can be implemented in two steps or in one step.
  • an example of mapping an ODU LR frame under other conditions to a second data frame through uTSSG.n can be obtained by a person skilled in the art without creative work (for example: a second type of different type) Data frames, or different M, or rate of minislots, etc., are not described in this application. It should also be noted that the intermediate frame uTSSG.n is not required. In order to simplify the mapping process or other considerations, the ODULR frame can be directly mapped into the corresponding time slot of the second data frame.
  • PT payload
  • uTSG.K indicates an overhead for indicating the starting position of uTSG.K in the payload area of the second data frame
  • uTSG.K is constructed based on the number of rows of the second data frame, for example, r rows occupying the second data frame ODUflex.
  • the uTSG.K frame may start from any line of the ODUflex payload area, indicating the overhead by defining the uTSG.K start position, indicating that uTSG.k starts from the first line of the ODUflex payload area.
  • the 8 bits of the 16th column of the first row of the ODUflex are used as the uTSG.K indicating the overhead Pointer (as shown in FIG. 13), and the starting positions of the uTSG.k are respectively indicated by the 8-bit patterns 01010101, 10101010, 00110011, and 11001100. Start with line 1, line 2, line 3, or line 4.
  • the uTSG.K frame start position is not in the ODUflex frame payload area, the uTSG.K in the ODUflex indicates that the overhead Pointer is all 0s.
  • uTSG.K is constructed based on the number of frames of the second data frame, for example, the s frame occupying the second data frame ODUflex.
  • the uTSG.K frame may start from any ODUflex frame payload area, and indicates the overhead Pointer by defining uTSG.K, indicating whether uTSG.k is started from the current ODUflex frame payload area, for example, the first line of the ODUflex is 16th.
  • the 8 bits of the column indicate the overhead Pointer as the uTSG.K, indicating that the starting position of uTSG.k is started from the current ODUflex frame payload area by the 8-bit pattern 11111111. If the uTSG.K frame start position is not in the ODUflex frame payload area, the uTSG.K in the ODUflex indicates that the overhead Pointer is all 0s.
  • the advantage of carrying the uTSG.K frame start position by overhead is that the receiving end can accurately determine the starting position of the uTSG.K frame by using this information.
  • This overhead information is not required. If it is not carried in the overhead, it can be configured on the device to achieve.
  • the third type a multiplex structure indicator (MSI), which is used to indicate the micro-slot distribution and occupancy status of the second data frame, and is also a micro-slot distribution and occupancy status indicating uTSG.K.
  • MSI multiplex structure indicator
  • the multiplexing structure indicates that the overhead MSI needs to use 512 14 bits, which can be marked as MSI[0], MSI[1], ..., MSI[511], respectively corresponding to the first Up to the 512th minislot, each minislot corresponds to a 14 bit.
  • the 14 bits include two overhead fields: type and service indication (LCID).
  • the type occupies 4 bits, indicating whether the current minislot is occupied. If it is occupied, it indicates the type of the low rate service to be carried. Table 4 gives an example. It should be noted that, in actual use, the values and corresponding meanings may be different from the design of Table 4. This application does not limit this.
  • the LCID occupies 10 bits, and indicates the number of the low-rate service carried by the current mini-slot. The value ranges from 0 to 1023.
  • the multiplexing structure indicates that the overhead can be placed at the payload structure of the second data frame indicating the overhead location.
  • the overhead can be placed in the 4th, 15th, and 16th columns of the ODUflex frame, and the MSI[0], MSI[1], ..., MSI[511] are indicated by the multiframe indication. Placed at PSI[2], PSI[1],..., PSI[513] respectively.
  • the overhead may also be placed at the overhead location of the minislot, as described in relation to the "fourth overhead".
  • a 2-bit optical multiframe indication may be defined, occupying the lower 2 bits of the 4th row and 16th column of the second data frame.
  • the OMFI and the existing multiframe indication MFAS of the second data frame are used in combination, and 256 second data frames are used as one cycle, and the OMFI is incremented (the value ranges from 0 to 3). 1024 second data frames can be completed as one large multiframe indication, thereby supporting, for example, 512 minislot occupancy indications.
  • other lengths of OMFI may be designed to complete the delivery of corresponding time slot occupation indication information.
  • Each minislot corresponds to one minislot overhead, which is used to indicate the occupation status of the current minislot and the placement mapping information.
  • the mapping information is a mapping overhead generated when the mapping ODU LR signal enters the uTSG.K or the n minislots of the second data frame and uses GMP.
  • the first 16 bytes are used as the minislot overhead (as shown in Figure 11). If the multiplexing structure indicates that the overhead is placed at the minislot overhead position, MSI[0], MSI[1], ..., MSI[511] are placed in the microslots corresponding to the 1st to 512th minislots, respectively.
  • the first 14 bits of overhead ie, the first 6 bytes and the upper 6 bits of the second byte).
  • the mapping overhead includes Cm, CnD, and parity information generated by the GMP mapping.
  • CnD is used to represent the clock information of the ODU LR signal.
  • the mapping overhead occupies 6 bytes. The 6 bytes may be placed at the uTSG.K occupied by the ODU LR or the minislot overhead position corresponding to the first minislot of the n minislots of the second data frame, for example, FIG. The third byte to the eighth byte of the mapped overhead position are shown.
  • the mapping overhead can be placed in the first byte to the sixth byte. It should be noted that, the application does not impose restrictions on the number of bits occupied by the specific Cm, CnD, and CRC, and can be flexibly selected according to the mapping granularity and payload size adopted by the mapping. Similarly, the location of the mapping overhead can also be placed in other overhead locations, which is not limited in this application.
  • mapping overhead information can save overhead, that is, improve overhead utilization.
  • the values of Cn and CnD are described below in conjunction with specific examples.
  • the ODU LR signal occupies m mini-slots of the second data frame
  • the mapping granularity is 1 byte
  • the payload size is m*1904 bytes
  • the maximum values are ODU LR bit rate*(1-100ppm)/((1+20ppm)*m*single minislot bit rate)*m*1904 and ODU LR bit rate*(1+100ppm)/((1 -20 ppm) * m * single minislot bit rate) * m * 1904, CnD values range from 1 to 7 bits.
  • mapping granularity is 16 bytes
  • payload size is m*119 16 bytes
  • Cm minimum and maximum values are ODU LR bit rate*(1-100ppm)/((1+20ppm)*m*, respectively.
  • This Cm range calculation formula applies to different types of ODU LR frames. Specifically, the following table gives examples of Cm and CnD value ranges for some specific types of ODU LR frames.
  • the bit rate is 2.384 Mbit/s.
  • the bit rate of the 1.25G ODUflex is 1.244078309 Gbit/s (obtained based on the high-order ODU1 1.25G time slot, see Table 3), which is divided into 512 micro by uTSG.512.
  • ODULR VC12
  • transmits through the 1.25G ODUflex it only needs to occupy 1 minislot, assuming that the minislot TS#2 is occupied.
  • the second data frame mentioned in this application may be ODUflex of any rate, or ODU0, ODU1, ODU2, ODU3, ODU4, and ODUCn.
  • ODU0 ODU1
  • ODU2, ODU3, ODU4 ODUCn
  • ODU0 ODU0
  • ODU4 ODU0
  • m*1.25 in addition to the OTN frame structure of 4 rows and 3824 columns, a new frame structure definition can be additionally extended, that is, the ODUflex of m*1.25 is regarded as a cascade of m 1.25G ODUflex, by m An instance frame of 1.25G ODUflex.
  • each 1.25G ODUflex is divided into 512 2.5Mbit/s microslots, then the m*1.25 ODUflex is divided into m*512 2.5Mbit/s microslots.
  • the manner of division is also the same as that given above in the present application.
  • step S703 of FIG. 9 This step is similar to step S703 of FIG. 9, and the description for step S703 is also applicable to this step, and details are not described herein.
  • an overhead is required to complete the operation, operation, and management functions of the ODU level.
  • device A transmits an OTU frame to a downstream device, such as device H in this embodiment, through one or more optical fibers. It should be noted that if a service transmission path includes multiple network devices, the downstream device sent by the source device is an intermediate device, not a destination device.
  • S805 Demap the second data frame from the OTU frame; the second data frame includes multiple time slots, and the rate of the time slot is not greater than 100 Mbps;
  • the device H parses the second data frame from the frame.
  • the characteristics of the second data frame are as described in step S802, and details are not described herein again.
  • S806 Demap the first data frame from the second data frame.
  • S807 Demap the low-speed service data from the first data frame.
  • the device H further demaps the first data frame, ie, the ODU LR , from the second data frame.
  • Device H then obtains low rate traffic data from the ODU LR frame.
  • the method provided by the embodiments of the present application can reduce the processing complexity of low-rate service data faced by the prior art and improve processing efficiency.
  • the method provided by the embodiment of the present application does not need to perform multi-level mapping, and has the advantage of fast processing speed.
  • the embodiment of the present application further provides another OTN device structure.
  • a processor 1401 and a memory 1402 may be included in the OTN device 1400.
  • the OTN device can be applied to both the transmitting node and the receiving node.
  • the processor 1401 When applied to a transmitting node, the processor 1401 is configured to implement the method performed by the transmitting node described in FIG. 9 or 10. In the implementation process, each step of the processing flow may complete the method performed by the transmitting node described in FIG. 9 or 10 by the integrated logic circuit of the hardware in the processor 1401 or the instruction in the form of software. When applied to a receiving node, the processor 1401 is configured to implement the method performed by the receiving node described in FIG. In the implementation process, each step of the processing flow may complete the method performed by the receiving node described in FIG. 10 by the integrated logic circuit of the hardware in the processor 1401 or the instruction in the form of software. It should be noted that the processor 1401 and the memory 1402 may be located in the tributary board in the hardware structure diagram of the network device described in FIG.
  • the processor 1401 in the embodiment of the present application may be a general-purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or a transistor logic device, and a discrete hardware component, which may be implemented or executed.
  • a general purpose processor can be a microprocessor or any conventional processor or the like.
  • the steps of the method disclosed in the embodiments of the present application may be directly implemented as a hardware processor, or may be performed by a combination of hardware and software units in the processor.
  • the program code executed by the processor 1401 to implement the above method may be stored in the memory 1402. Memory 1402 is coupled to processor 1401.
  • the coupling in the embodiments of the present application is an indirect coupling or communication connection between devices, units or modules, and may be in an electrical, mechanical or other form for information interaction between devices, units or modules.
  • Processor 1401 may operate in conjunction with memory 1402.
  • the memory 1402 may be a non-volatile memory such as a hard disk drive (HDD) or the like, or may be a volatile memory such as a random-access memory (RAM).
  • Memory 1402 is any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited thereto.
  • the embodiment of the present application further provides a computer storage medium, where the software program stores a software program, and the software program can implement any one or more of the foregoing when being read and executed by one or more processors.
  • the computer storage medium may include various media that can store program codes, such as a USB flash drive, a removable hard disk, a read only memory, a random access memory, a magnetic disk, or an optical disk.
  • the embodiment of the present application further provides a chip, where the chip includes a processor, for implementing functions related to any one or more of the foregoing embodiments, for example, acquiring or processing data frames involved in the foregoing method.
  • the chip further includes a memory for the processor to execute necessary program instructions and data.
  • the chip can be composed of a chip, and can also include a chip and other discrete devices.
  • embodiments of the present application can be provided as a method, system, or computer program product.
  • the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment in combination of software and hardware.
  • the application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) including computer usable program code.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

Abstract

本申请揭示了一种光传送网中低速业务数据的处理方法、装置和系统，用以解决现有低速业务承载方法存在的复杂度高的问题。该方法包括：首先，将低速业务数据映射到一个新定义的低速数据帧中，其中，所述低速数据帧的速率和所述低速业务数据的速率匹配，该数据帧包括开销区和净荷区，所述净荷区用于承载所述低速业务数据，所述低速数据帧的净荷区的速率不小于所述低速业务数据的速率，所述低速业务数据的速率小于1Gbps；然后，将所述低速数据帧映射到另一数据帧的一个或多个时隙中，所述时隙的速率不大于100Mbps；最后将所述另一数据帧映射到光传输单元(OTU)帧并发送所述OTU帧。通过本申请揭示的低速处理方法，可以直接采用新的OTN帧来进行业务承载，发送和处理复杂度降低，处理速度也较快。

Description

光传送网中低速业务数据的处理方法、装置和系统 技术领域
本申请涉及光通信技术领域，尤其涉及光传送网中业务数据的处理技术。
背景技术
光传送网(optical transport network，OTN)作为骨干承载网络的核心技术，包括多种速率的光承载容器，用于承载多种高速率的业务数据。例如，光数据单元0(optical data unit0,ODU0)为当前OTN技术的速率最小的承载容器，其速率约为1.25吉比特每秒(Gigabit per second,Gbps)，用于承载1Gbps的以太网业务数据。
随着同步数字体系(synchronous digita hierachy，SDH)技术逐步退出市场和OTN技术的发展，OTN技术的使用范围从骨干网扩展到城域网络，甚至接入网络中。因此，OTN技术需要面临越来越多的低速业务承载需求。当前低速业务的速率通常在2兆到几百兆比特每秒。当前的处理方法是：通过将低速信号复用为较高速率的信号后，再通过当前已有的光承载容器来承载。图1给出了现有技术中低速业务的映射复用路径示意图。如图1所示，当前需要通过多路的低速信号的汇聚(即复用)，形成高速率的信号。高速率的信号包括同步传输模块(sychronous trasnport module,STM)-16，STM-64以及STM-256等，他们可以分别映射到ODU1，ODU2和ODU3这些现有的OTN容器中再进行传输。
具体地，以2048kbit/s速率为例，该信号也被称为E1。如图1所示，E1信号先映射到容器12(container 12，C12)，之后C12映射到虚拟容器12(virtual container 12，VC12)，VC12添加开销后封装为支路单元12(tributary unit 12，TU-12)，TU-12复用到支路单元组2(tributary unit group 2，TUG-2)，之后TUG-2复用到VC3，VC3添加开销后封装为管理单元3(adminstrative unit 3，AU-3)，AU-3复用到管理单元组(AU group，AUG)，之后多个AUG组合形成STM-N接口信号。其中，STM-N可以是前面提到的多种高速率的STM信号类型之一。前述的STM-N接口信号可以通过OTN现有的容器进行传输。
当前处理方法的问题在于，低速信号需要通过多次的复用后，形成高速率信号，再使用OTN技术进行承载，处理过程复杂，效率低。此外，因为发送设备和接收设备都需要进行多层次的帧处理，信号处理时延也比较大。
发明内容
本申请实施例提供了一种光传送网中业务数据的处理方法及装置，用以解决现有存在的处理过程复杂，效率低的问题。
第一方面，本申请实施例提供了一种光传送网中业务数据的处理方法，该方法应用于发送侧，所述方法包括：
将低速业务数据映射到第一数据帧中，其中，所述第一数据帧包括开销区和净荷区，所述净荷区用于承载所述低速业务数据，所述开销区用于携带对所述低速业务数据的管理和维护信息，所述第一数据帧的净荷区的速率不小于所述低速业务数据的速率，所述低速业务数据的速率小于1Gbps；
将所述第一数据帧映射到第二数据帧的一个或多个时隙中，所述时隙的速率不大于 100Mbps；
将所述第二数据帧映射到光传输单元(OTU)帧中，并发送所述OTU帧。
在一种可能的设计中，所述开销区包括帧头指示、复帧指示和路径监控信息。可选地，所述净荷区包括填充信息，所述填充信息用于消除所述第一数据帧的净荷区的速率和所述低速业务数据的速率的差异。
在一种可能的设计中，所述第一数据帧的大小为X*M字节，其中，X和M为正整数，M为所述第二数据帧的时隙间插粒度。具体地，该大小可以为119字节，其中M等于1；或者，所述第一数据帧为X*16字节，其中M等于16。
在一种可能的设计中，所述第一数据帧的净荷区的字节数量不大于所述低速业务数据的帧结构的字节数量的1.25倍。也就是说，所述第一数据帧的净荷区的速率不大于所述低速数据的速率的1.25倍。
具体地，所述低速业务数据为E1、E3、E4、虚容器(VC)12、VC3、VC4、同步传输模块(STM)-1、STM-4和快速以太网(FE)的一种或者多种。所述第二数据帧为ODU0、ODU1、ODU2、ODU3、ODU4或ODUflex。
在一种可能的设计中，所述将所述第一数据帧映射到第二数据帧的一个或多个时隙中，包括：将所述第一数据帧映射到一个中间帧中，其中，所述中间帧包括的时隙数量等于所述第一数据帧需要占用的第二数据帧的时隙数量；将所述中间帧映射到所述第二数据帧的所述一个或多个时隙中。
在一种可能的设计中，所述第二数据帧为多行多列的结构，所述第二数据帧的整数行用于划分K个时隙，K为正整数；或者多个所述第二数据帧用于划分K个时隙。
在一种可能的设计中，所述方法还包括：将映射信息放置到所述第二数据帧的一个或多个时隙中,其中，所述映射信息包括所述第一数据帧映射到所述第二数据帧的一个或多个时隙中的m比特数量和时钟信息。
第二方面，本申请实施例提供了一种光传送网中业务数据的处理方法，该方法应用于接收侧，所述方法包括：
接收第一数据帧，所述第一数据帧包括多个时隙，所述时隙的速率不大于100Mbps；
从所述第一数据帧中解映射出第二数据帧，其中，所述第二数据帧包括开销区和净荷区，所述净荷区用于承载低速业务数据，所述开销区用于携带对所述低速业务数据的管理和维护信息，所述第二数据帧的净荷区的速率不小于所述低速业务数据的速率，所述低速业务数据的速率小于1Gbps，所述第一数据帧的一个或多个时隙用于承载所述第二数据帧；
从所述第二数据帧中解映射出所述低速业务数据。
在一种可能的设计中，所述开销区包括帧头指示、复帧指示和路径监控信息。
在一种可能的设计中，所述第二数据帧的大小为X*M字节，其中，X和M为正整数，M为所述第一数据帧的时隙间插粒度。具体地，所述第二数据帧的大小可以为119字节，其中M等于1；或者，所述第二数据帧可以为X*16字节，其中M等于16。
在一种可能的设计中，所述第二数据帧的净荷区的字节数量不大于所述低速业务数据的帧结构的字节数量的1.25倍。也就是说，所述第一数据帧的净荷区的速率不大于所述低速数据的速率的1.25倍。
具体地，在实际应用中，所述低速业务数据为E1、E3、E4、虚容器(VC)12、VC3、 VC4、同步传输模块(STM)-1、STM-4和快速以太网(FE)的一个或多个。
在一种可能的设计中，所述从所述第一数据帧中解映射出第二数据帧，包括：从所述第一数据帧解映射到一个中间帧中，其中，所述中间帧包括的时隙数量等于所述第二数据帧需要占用的第一数据帧的时隙数量；从所述中间帧解映射到所述第二数据帧。
第三方面，本申请实施例提供了一种装置，该处理装置包括处理器以及存储器，其中：所述存储器，存储有程序代码；所述处理器，用于读取并执行所述存储器存储的程序代码，以实现第一方面或者第一方面的任一具体设计所述的方法。
第四方面，本申请实施例提供了一种装置，该处理装置包括处理器以及存储器，其中：所述存储器，存储有程序代码；所述处理器，用于读取并执行所述存储器存储的程序代码，以实现第二方面或者第二方面的任一具体设计所述的方法。
第五方面，本申请实施例提供了一种芯片，所述芯片与存储器相连，用于读取并执行所述存储器中存储的程序代码，以实现第一方面、第一方面的任一具体设计、第二方面或者第二方面的任一具体设计所述的方法。
第六方面，本申请实施例提供了一种系统，所述系统包括如第三方面或第三方面的任一具体设计所述的装置和如第四方面或第四方面的任一具体设计所述的装置。
通过定义新的ODU帧结构并定义一套映射流程，本申请实施例提供的技术能够降低现有技术面临的低速率业务数据的处理复杂度高的问题，提高了处理效率。此外，本申请实施例提供的数据处理技术，无须进行多级的映射，也具有处理速率快的优点
附图说明
图1为现有技术中低速业务的映射路径示意图；
图2为本申请实施例的一种可能的应用场景示意图；
图3为一种可能的网络设备硬件结构示意图；
图4A为一种可能的低速数据帧映射层次示意图；
图4B为一种可能的低速数据帧的帧结构示意图；
图4C为另一种可能的低速数据帧的帧结构示意图；
图4D为又一种可能的低速数据帧的帧结构示意图；
图5为一种可能的ODU数据帧时隙划分示意图；
图6为另一种可能的ODU数据帧时隙划分示意图；
图7为一种可能的第二数据帧的时隙划分和uTSG.K帧结构的示意图；
图8A为uTSG.K帧结构和第二数据帧的时隙划分的一个示例；
图8B为uTSG.K帧结构和第二数据帧的时隙划分的另一个示例；
图8C为uTSG.K帧结构和第二数据帧的时隙划分的又一个示例；
图9为一种可能的低速率业务数据处理流程图；
图10为本申请实施例提供的一种低速率业务数据处理的流程图；
图11为一种可能的低速率业务的映射流程的示意图；
图12为一种可能的中间帧结构的示意图；
图13为一种可能的起始位置指示开销位置示意图；
图14为一种可能的复用结构指示开销的位置示意图；
图15为一种可能网络设备结构示意图。
具体实施方式
首先，对本申请中的部分用语进行解释说明，以便于本领域技术人员理解。
1)、多个指两个或两个以上。“和/或”描述关联对象的关联关系，可以存在三种关系。例如，A和/或B可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，在本申请的描述中，“第一”、“第二”等词汇仅用于区分描述的目的，而不能理解为指示或暗示相对重要性，也不能理解为指示或暗示顺序。
2)、上游或下游。从源设备A向目的设备B传输数据，并经过设备M，在数据传输方向上设备M点位于设备A和设备B点之间，则设备A在设备M的上游方向，设备B在设备M的下游方向。
3)、数学符号“*”表示乘号。
本申请实施例适用于光网络，例如：OTN。一个OTN通常由多个设备通过光纤连接而成，可以根据具体需要组成如线型、环形和网状等不同的拓扑类型。如图2所示的OTN200由8个OTN设备201组成，即设备A-H。其中，202指示光纤，用于连接两个设备；203指示客户业务接口，用于接收或发送客户业务数据。根据实际的需要，一个OTN设备可能具备不同的功能。一般地来说，OTN设备分为光层设备、电层设备以及光电混合设备。光层设备指的是能够处理光层信号的设备，例如：光放大器(optical amplifier，OA)、光分插复用器(optical add-drop multiplexer，OADM)。OA也可被称为光线路放大器(optical line amplifier，OLA)，主要用于对光信号进行放大，以支持在保证光信号的特定性能的前提下传输更远的距离。OADM用于对光信号进行空间的变换，从而使其可以从不同的输出端口(有时也称为方向)输出。根据能力不同，OADM可以分为固定的OADM(fixed OADM，FOADM)，可配置的OADM(reconfigurable OADM，ROADM)等。电层设备指的是能够处理电层信号的设备，例如：能够处理OTN信号的设备。光电混合设备指的是具备处理光层信号和电层信号能力的设备。需要说明的是，根据具体的集成需要，一台OTN设备可以集合多种不同的功能。本申请提供的技术方案适用于不同形态和集成度的OTN设备。
需要说明的是，本申请实施例中的OTN设备使用的数据帧结构是OTN帧，用于承载各种业务数据，并提供丰富的管理和监控功能。OTN帧可以是ODUk、ODUCn、ODUflex，或者光通道传输单元k(optical transport unit k，OTUk)，OTUCn，或者灵活OTN(FlexO)帧等。其中，ODU帧和OTU帧区别在于，OTU帧包括ODU帧和OTU开销；k代表了不同的速率等级，例如，k＝1表示2.5Gbps，k＝4表示100Gbps；Cn表示可变速率，具体为100Gbps的正整数倍的速率。除非特殊的说明，ODU帧指的是ODUk、ODUCn或ODUflex的任意一种，OTU帧指的是OTUk、OTUCn或者FlexO的任意一种。还需要指出的是，在具体实现的过程中，为了简化帧设计，可以规定某一种或几种帧用来承载后续定义的低速数据帧。例如，规定只用ODUflex。本申请对此不作任何限定。
图3为一种可能的设备硬件结构示意图。例如，图2中的设备A。具体地，一个OTN设备300包括电源301、风扇302、辅助类单板303，还可能包括支路板304、线路板306、交叉板305、光层处理单板(图中未示出)，以及系统控制和通信类单板307。
需要说明的是，根据具体的需要，每个设备具体包含的单板类型和数量可能不相同。例如：作为核心节点的网络设备可能没有支路板304。作为边缘节点的网络设备可能有多个支路板304。其中，电源301用于为OTN设备300供电，可能包括主用和备用电源。风 扇302用于为设备散热。辅助类单板303用于提供外部告警或接入外部时钟等辅助功能。支路板304、交叉板305和线路板306主要是用于处理OTN的电层信号。其中，支路板304用于实现各种客户业务的接收和发送，例如SDH业务、分组业务、以太网业务和前传业务等。更进一步地，支路板304可以划分为客户侧光模块和信号处理器。其中，客户侧光模块可以为光收发器，用于接收和/或发送业务数据。信号处理器用于实现对业务数据到数据帧的映射和解映射处理。交叉板305用于实现数据帧的交换，完成一种或多种类型的数据帧的交换。线路板306主要实现线路侧数据帧的处理。具体地，线路板306可以划分为线路侧光模块和信号处理器。其中，线路侧光模块可以为线路侧光收发器，用于接收和/或发送数据帧。信号处理器用于实现对线路侧的数据帧的复用和解复用，或者映射和解映射处理。系统控制和通信类单板307用于实现系统控制和通信。具体地，可以通过背板从不同的单板收集信息，或将控制指令发送到对应的单板上去。需要说明的是，除非特殊说明，具体的组件(例如：信号处理器)可以是一个或多个，本申请不做限制。还需要说明的是，本申请实施例不对设备包含的单板类型以及单板的功能设计和数量做任何限制。
为了解决当前低速率业务处理过于复杂的问题，本申请新定义了一种OTN帧结构。为了简化说明，后续称该帧结构为ODU LR，LR表示为低速率。需要说明的是，这个名称仅是一个示例，不对本申请定义的帧结构构成限定。下面首先就ODU LR在当前OTN帧层次中所处的位置做简要介绍，然后给出几种ODU LR帧结构的具体示例。
图4A所示为增加了ODU LR的OTN帧映射层次示例。具体地，在本申请中，低速率业务的数据映射到ODU LR中。然后，ODU LR依次放置到ODU i和OTU m中，或者ODU i、ODU j和OTU m中。其中，i，j和m的取值取决于具体的应用，可选择前述提及的各种OTN帧，本申请不做具体限制。示例性地，可以为ODU LR＝>ODUflex＝>OTU 3的映射路径，或者为ODU LR＝>ODU 2＝>ODU 3＝>OTU 4的映射路径。业务的数据也可以称业务信号、客户数据或客户业务数据。
图4B-4D给出了多种类型的ODU LR的帧结构示意图。其中，图4B给出的ODU LR帧结构针对的是VC12、VC3和VC4这些低速率的SDH业务信号；图4C给出的ODU LR帧结构跟图4B所示的结构相同，但是其承载的客户信号为E1、E3和E4这些低速率的准同步数字体系(Plesiochronous Digital Hierarchy，PDH)业务信号；而图4D给出的是两种通用的ODU LR帧结构，可以用于承载不同类型的业务信号。需要说明的是，图4B和图4C给出的这种示例为不同信号定制对应的帧结构，使得业务数据格式和承载该业务的帧结构匹配程度高，通过较少的填充或者不填充来实现业务数据的承载，提高传输效率的同时还保持了原有业务在SDH网络中相同的误码校验及频率抖动和漂移性能。而图4D给出的通用ODU LR帧结构能够适用于不同的业务类型，处理简单。在实际的应用中，可以结合设计需要，选择任意一种或多种的帧结构设计方式。
下面对图4B-4D的帧结构示例进行进一步说明。需要说明的是，一个ODU LR帧结构包括开销区和净荷区。其中，净荷区用于承载低速率业务数据，开销区用于携带数据传输过程中管理和维护用的开销信息。
如图4B所示，ODU LR(VC12)、ODU LR(VC3)和ODU LR(VC4)帧长度(即帧包含的字节数)分别为149、774和2358字节(byte，后续简称B)，分别用于承载VC12、VC3和VC4这三种SDH业务数据。这三种帧结构示例的开销区大小为9B，净荷区大小分别为140B、765B和2349B。需要说明的是，当前SDH标准中定义的VC12、VC3和VC4 的字节长度跟其对应的ODU LR帧结构的净荷区相同，即分别为140B、765B和2349B。也就是说，这种专有的ODU LR帧结构的净荷区全部用于承载客户业务数据，提高了OTN帧结构的利用率，同时保持了原有业务在SDH网络中相同的误码校验及频率抖动和漂移性能。以VC12为例，一个VC12帧可以直接通过一个ODU LR(VC12)来承载。此外，ODU LR(VC12)、ODU LR(VC3)和ODU LR(VC4)的帧周期可以指定为500微妙(μs)、125μs和125μs。这么做的好处是，ODU LR的帧周期和其承载的VC信号的帧周期相同，可以保持业务的时钟特性(有时也称频率特性)，从而避免接收设备定帧时出现过大的抖动，提升了定帧的准确性。需要说明的是，帧周期指的是发送一个数据帧的时间。表1给出了图4B所示的三种ODU LR帧结构的一些基本参数。需要说明的是，ODU LR帧的比特速率可以通过其承载的SDH信号的速率计算出来。具体地，ODU LR的速率为其承载的SDH信号的速率*(ODU LR的字节数/SDH信号帧的字节数)。VC12、VC3和VC4对应的速率分别为：2.24Mbps、48.96Mbps和150.336Mbps。
表1 图4B和4C所示的三种ODU LR帧结构的一些基本参数
Figure PCTCN2018086345-appb-000001
如图4C所示，ODU LR(E1)、ODU LR(E3)和ODU LR(E4)帧结构长度跟图4B中的三个帧结构示例相同。不同的是，图4C中的帧结构承载的是E1、E3和E4这三个PDH信号，他们的速率分别为2.048Mbps、34.368Mbps和139.264Mbps，稍低于前面提及的三种SDH信号速率。因此，可以重用图4B定义的帧结构。为了消除PDH信号和其对应的ODU LR帧在速率上的差异，映射时需要进行速率适配。在一种可能的方式中，可以将PDH信号封装到对应的SDH数据帧中，即E1到VC12，E3到VC3，E4到VC4中，然后再映射到对应的ODU LR帧中。在另一种可能的方式中，可以将PDH信号直接映射到对应的ODU LR的净荷区中，并通过填充一些填充信息来消除PDH信号和承载该信号的ODU LR帧的速率差别。例如，针对E3业务信号，可以将净荷区的765B分为如图5所示的4个57B，3个120B和1个177B。其中，4个57B为填充字节，用于携带填充信息，其他的部分用于承载E3信号。这种填充方式可以保持数据发送速度相对均匀，降低时延。其他PDH信号也可以采取类似的填充方式。需要说明的是，图5仅为一个示例，还可以通过其他划分方式来决定填充信息在ODU LR帧的净荷区的位置。例如，划分一个228B为填充区域。本申请对于填充信息的位置不做限定。一般地，填充信息占据ODU LR帧的净荷区字节数不大于后者总字节的20％。也就是说，ODU LR帧的净荷区的字节数不大于客户数据字节数的1.25倍。还需要说明的是，填充信息不携带任何实际数据或开销，仅用于匹配客户信号和承载该客户信号的数据帧的速率差异。通常，填充字节为预先定义的特殊字符。
图4D给出了两种可能的归一化的ODU LR帧结构示意图，他们的长度分别为119和X*16字节，其中X为正整数。在设计归一化的ODU LR帧结构时，可以考虑将帧结构的长 度设计为承载该帧结构的数据帧的时隙间插粒度的整数倍。时隙间插粒度指的是一个数据帧进行时隙划分时，一个时隙占用的基本长度。通常地，一个时隙需要占用多个前述的基本长度。具体地，可以看图7和图8A-8C的解释和举例说明。在图4D中，119字节理解为119*1字节，其中时隙间插粒度为1字节，而X*16字节则表示时隙间插粒度为16字节。需要说明的是，时隙间插粒度可以根据具体需要来确定，例如可以定义为1字节、4字节(2 2字节)、8字节(2 3字节)、16字节(2 4字节)和20字节等。本申请对此不做任何限定。还需要说明的是，这种归一化的设计可以用于承载多种低速率信号，例如：现在或未来定义的低速率专线业务。需要说明的是，上述的各种ODU LR举例中，客户信号可以通过同步映射的方式映射到ODU LR帧中。还需要说明的是，上述的ODU LR帧结构举例中，ODU LR的开销区可以包括帧对齐信号(frame alignment signal，FAS)，复帧对齐信号(multi-frame alignment signal，MFAS)，路径监测(path monitoring，PM)和自动保护倒换/保护通信通道(automatic protection switching and protection communication channel，APS/PCC)字节，分别占用4、1、3和1字节。可选地，开销区还可以包括如图4D所示的保留字段(RES)。ODU LR仅包括了少量的开销信息，用于实现端到端的管理和监控功能，有利于提升帧的业务承载效率，降低处理复杂度。需要说明的是，上述的开销中，FAS为必选的信息，用于实现ODU LR帧的定帧功能。开销区包含的其他信息为可选的。例如，当开销区中的一个信息需要的字节数超过了开销区给该信息划分的字节数，可能需要引入MFAS。又如，如果需要提供保护倒换或路径监控功能，对应地，开销区需要包括APS/PCC或PM信息。还需要说明的是，图4B-4D的开销位置仅是示例。在具体的实现过程中，ODU LR帧还可以设计为开销负载错开的结构。图6给出了一个示例。在该示例的ODU LR(VC12)帧中，总长度为9字节的开销分开放置在了9个位置，而负载占据其他的位置。也就是说，针对ODU LR(VC12)，前4个15净荷字节中每15净荷字节插入一个开销字节，后5个16净荷字节中每16净荷字节插入一个开销字节，总共149字节。类似地，ODU LR(VC3)和ODU LR(VC4)也是开销和负载错开分布在ODU LR数据帧中。其中，ODU LR(VC3)中，每85个净荷字节插入1个开销字节，总共774字节；ODU LR(VC4)中，每261个净荷字节插入1个开销字节，总共2358字节。
还需要说明的是，图4B-4D以及图5-6中给出的ODU LR帧结构是一行多列的结构。在实际的使用中,该帧的具体呈现结构也可以是多行多列的结构，或多行一列的结构。
当前的OTN帧结构仅支持1.25Gbps的时隙划分，时隙颗粒度太大，不利于低速率业务数据的承载。为了高效地承载上述定义的ODU LR帧，需要将现有的OTN帧结构进一步的时隙划分。本申请将现有的OTN帧拆分为K个时隙。其中，一个时隙的速率相对传统的时隙速率小很多。为了以示区别，将本申请中新定义的时隙称为微时隙。微时隙的速率可以为2.5Mbps，或5Mbps、20Mbps等较小的速率。最大地，微时隙速率不超过100Mbps。ODU LR帧可以占用承载ODU LR帧的数据帧的一个或多个微时隙。具体占用的时隙个数取决于ODU LR速率和一个微时隙的速率。具体地，参见后续的实施例介绍。
在本申请中，针对承载ODU LR的ODU帧的时隙划分可以是以行或以帧为基本单位来进行。具体地，所谓以行为基本单位指的是将r行的第二数据帧看成一个整体来进行时隙划分；所谓以帧为基本单位指的是将s个ODU帧看成一个整体来进行时隙划分。为了简化说明，后续将作为一个时隙划分整体的帧称为微时隙组(uTSG.K),其中，K表示这个帧结构可以划分的微时隙个数。针对一个uTSG.K，K为一个固定值，例如：512，480等。 具体地，可以结合第二数据帧的帧特性、目标的微时隙的速率以及uTSG.K的大小综合来决定。当前，ODU帧结构的净荷区由4*3808字节构成，即4行*3808列，其中一行包括3808字节，一个帧包括15232字节。那么，如果uTSG.K占用一个ODU帧的r行，则其大小为r*3808字节；如果uTSG.K帧占用s个ODU帧，那么其大小为s*4*3808字节。为了保持和第二数据帧的一致性，通常将uTSG.K的大小设计为时隙间插粒度的整数倍，即N*M字节，其中M为第二数据帧的时隙间插粒度(后续简称为码块)，N为正整数。
下面将以uTSG.K为N*M字节为例进行介绍。当K和M的数值确定后，那么可以根据这两个数值来计算N的数值。如果以第二数据帧的行为基本单位，为了减少或避免引入额外的填充信息，N可以为3808/M和K的最小公倍数，即N＝LCM(3808/M，K)。因为，r*3808＝N*M,所以r＝N*M/3808。类似地，如果用r个第二数据帧来构成uTSG.K，为了减少或避免引入填充信息，N可以为15232/M和K的最小公倍数，即N＝LCM(15232/M，K)。r*4*3808＝r*15232＝N*M，所以r＝N*M/15232。需要说明的是，如果M为2的指数次幂，例如：1,2,4,8,16等，则一个码块放置在一个数据帧的某一行。如果M为其他值，例如M等于10，那么一个码块可能需要跨行放置。本申请对此不做限定。
如图7所示为一个OTN帧的时隙划分举例，其中r行的OTN帧构成一个uTSG.K。如图7的上半部分所示，r行的OTN帧被划分为N*M个码块，用来支持K个微时隙。其中，第1个至第K个码块(即图7中的码块#1-#K)分别属于第1-K个微时隙，即用来放置对应微时隙的第一个码块。第K+1个至第2K个码块分别属于第1-K个微时隙，即用来放置对应微时隙的第二个码块。以此类推。图7下半部分给出了按照一行多列的结构给出了uTSG.K和微时隙的关系。从图中可以看出，以第一个微时隙为例，该微时隙占据uTSG.k的第1个，第K+1个，第2K+1个，…,和第N-K+1个码块。每一个微时隙一共有N/K个码块。需要说明的是，一个微时隙包括两个部分，一部分在开销区(图7未示出)，另外一部分在净荷区。图中定义的微时隙#1-#K的每一个都可以用于承载ODU LR帧。需要说明的是，本申请对需要划分微时隙的OTN帧速率不做限制。在实际的应用中，可以根据具体需要选择现有的OTN帧结构层次中合适的帧结构来进行微时隙划分和ODU LR的承载。
下面结合图8A-8C来给出第二数据帧的时隙划分示例，这些示例均以r行的划分方式进行举例。本领域技术人员可知，s帧的划分方式类似，此处不予赘述。其中，图8A是以K＝512，M＝1为例，根据前面的公式可以算出N＝LCM(3808/1,512)＝60928，即uTSG.K包括60928*1个字节。图8B是以K＝512，M＝16为例，根据前面的公式可以算出N＝LCM(3808/1,512)＝60928，即uTSG.K包括60928*16个字节。图8C是以K＝512，M＝119为例，根据公式可以算出N＝LCM(3808/1,512)＝512，即uTSG.K包括60928*119个字节。在这三个例子中，r分别为16行，256行和16行。需要说明的是，图8A-8C中仅给出了ODU帧净荷区(也称为OPU帧)的时隙划分。在实际应用中，可以不给出计算公式，直接给出微时隙的速率、个数、时隙间插粒度以及进行时隙划分的基本单位大小等的具体数值。以上给出了的示例是完全没有填充信息的情况，提供较高的承载效率。在实际的应用中，也可以采用使用较少数量的填充信息的方法来进行时隙划分。本申请对此不作限定。
结合图9，下面进一步介绍本申请提出的低速率业务数据的处理方法。如图9所示，作为发送端的OTN设备需要执行如下步骤，来完成低速率业务数据的承载。
S701:将低速业务数据映射到第一数据帧中，其中，所述低速率业务数据的速率小于1Gbps；
具体地，OTN设备将接收到的低速业务数据映射到上述定义的任意一种ODU LR帧中，即所述第一数据帧为ODU LR帧。其中，所述第一数据帧包括开销区和净荷区，所述净荷区用于承载所述低速业务数据，所述开销区用于携带对所述低速业务数据的管理和维护信息(有时也称运行、管理和维护信息)，所述第一数据帧的净荷区的速率不小于所述低速业务数据的速率。本申请针对因速率较小而不能直接通过现有技术的OTN容器来进行承载的业务。一般地，该类业务速率小于1Gbps，或者小于500Mbps，甚至更小(例如仅有几兆到几十兆)。为了提高传输效率，所述第一数据帧的速率可以跟所述低速业务数据匹配。速率匹配指的是第一数据帧的净荷区的速率等于所述业务数据的速率，或者所述第一数据帧的净荷区的速率在(所述业务数据的速率，所述业务数据的速率*1.25)范围内,或者所述第一数据帧的速率在(所述业务数据的速率，所述业务数据的速率*1.25)范围内。
S702:将所述第一数据帧映射到第二数据帧的一个或多个时隙中，所述时隙的速率不大于100Mbps；
具体地，OTN设备需要对ODU LR帧进行进一步的处理，即将其映射到更高速率的ODU帧中。ODU LR帧占用更高速率的ODU帧的一个或多个时隙。所述时隙为前面提及的微时隙。该时隙的速率不大于100Mbps。
S703:将所述第二数据帧映射到光传输单元(OTU)帧中；
具体地，OTN设备需要将上述提到更高速率的ODU数据帧封装到OTU帧。在一种方式中，该ODU数据帧无需经过复用，直接封装到OTU帧中。例如，ODU2帧封装倒OTU2。在另外一种实现方式中，该ODU数据帧进一步复用为更高速率的ODU数据帧，再封装到OTU帧中。例如，ODUflex帧复用到ODU3帧后，再封装到OTU3帧中。
S704:发送所述OTU帧。
具体地，OTN设备将生成的OTU帧发送给下游的网络设备。
下面将基于上面描述的本申请的一些共性方面，对本申请实施例进一步详细说明。
本申请的一个实施例提供了一种低速率数据处理的方法、装置和系统。在本实施例中，以图2的网络场景为例，假设本实施例的发送端设备为A，接收端设备为H。需要说明的是，A和H仅是示例，可以替换为其他的传输低速率业务数据的路径。例如，该路径可以替换为设备A-设备H-设备G-设备F，其中，设备A为源设备，设备F为目的设备，设备H和设备G位中间设备。
图10为本实施例提供的流程示意图。下面对每个步骤进行详细的介绍。在如下步骤中，步骤S801至S804是发送端设备A执行的，步骤S805至S807是接收端设备H执行的。需要说明的是，为了避免重复，接收端设备H收到设备A发送的OTU帧没有在如下步骤中给出。
S801:将低速业务数据映射到第一数据帧中；
本步骤跟图9的步骤S701类似，针对步骤S701的说明也适用于本步骤，此处不予赘述。具体地，设备A将待传输的低速率业务数据映射到前面定义的ODU LR帧中。在本实施例中，以低速率业务数据为VC3，ODU LR为ODU LR(VC3)为例来进行后续的说明。本领域技术人员可知，所述低速率业务可以为任意一种现有低速率的业务，例如前面提及的SDH信号和PDH信号。又如，STM-1、STM-4以及快速以太网(FE)业务等。ODU LR的帧结构也可以为前述提到的多种举例中的任意一种。
具体地，第一数据帧可包括如图4B所述的开销信息。其中，FAS可以为固定图案，例如：0xF6F62828；MFAS的取值范围可以为0-255，基于ODU LR帧的数量增加，该字段进行 递增循环，例如：第1帧至第256帧中的MFAS取值为0-255，第257帧以后的帧又重新按照0-255来循环递增；PM字段可以进一步包括路径踪迹标识(trail trace identifier，TTI)、8比特间插奇偶校验(bit-interleaved parity 8，BIP8)、后向缺陷指示(backward defect indication，BDI)、后向错误指示(backward error indication,BEI)和状态(STAT)开销的一个或者多个，用于监控该ODU LR端到端路径。这些可能的开销功能描述见表2。APS/PCC提供自动保护倒换和保护通信通道功能，用于承载保护倒换协议相关的信息。
表2 PM字段包括的开销功能解释
Figure PCTCN2018086345-appb-000002
图11给出了一个具体的示例，其中第一步骤给出了VC12业务映射到ODU LR帧中。VC12业务比特速率为2.24Mbit/s，帧大小为140字节。将其比特同步映射入ODU LR(VC12)帧的净荷区，一个VC12帧正好放置到一个ODU LR(VC12)帧的净荷区，所述ODU LR(VC12)帧大小为149字节，净荷区为140字节，开销区为9字节。之后生成开销并放置到ODU LR(VC12)开销区，包括FAS、MFAS、PM以及APS/PCC。通过149/140*2.24Mbit/s计算可知，该ODU LR(VC12)的比特速率为2.384Mbit/s。
S802:将所述第一数据帧映射到第二数据帧的一个或多个时隙中，所述时隙的速率不大于100Mbps；
本步骤跟图9的步骤S702类似，针对步骤S702的说明也适用于本步骤，此处不予赘述。表3给出了第二数据帧为ODUflex帧时所对应的更精确的微时隙速率和对应的微时隙个数的举例，微时隙的个数分别为512和480。需要说明的是，ODUflex的速率取决于承载ODUflex更高阶的ODU帧，因此表3中的第2-4列给出了针对不同的承载ODUflex的帧速率时，对应的划分的微时隙的速率和个数。还需要说明的是，针对一个其他类型的第二数据帧进行微时隙的划分参数(含微时隙的数量和精准的速率)可以参考表3来获取，此处不再罗列。
表3 第二数据帧为ODUflex的微时隙速率和个数示例
Figure PCTCN2018086345-appb-000003
关于表3的一些说明：
1)第二行表示的是对应的ODUk(k＝1,2,3,4)帧包含的单个1.25G时隙的具体比特速率；
2)第三行表示的是速率为1.25G的ODUflex对应的具体比特速率；
3)第四行和第五行分别给出了为当一个ODUflex帧划分为512微时隙和480个微时隙时，每一个微时隙对应的精准的速率。需要说明的是，该微时隙速率仅是占据ODUflex净荷区的速率。
从上表中可以看出，取决于第二数据帧的速率，划分为相同固定数量的微时隙的速率是不同的。简单来说，一个ODU帧的比特速率等于单个微时隙的比特速率*微时隙的数量*系数。其中，系数等于一个第二数据帧的字节数/(一个第二数据帧的字节数-预留字节数)。引入所述系数的目的是在对第二数据帧进行时隙划分时，保留一些余量，能够容忍客户信号的更大频偏，使得即使有微小的信号速率变化，也能保证该信号可以映射到第二数据帧中。通常地，保留0-4个字节的数量。
如果有多个的ODU LR需要映射到第二数据帧中，那么有如下几种可能的实现方式：第一种：多路第一数据帧ODU LR分别映射到uTSG.K的一个或多个微时隙，之后uTSG.K同步映射到第二数据帧净荷区；第二种：多路第一数据帧ODU LR分别直接映射到第二数据帧净荷区的一个或多个微时隙；第三种：多路第一数据帧ODU LR分别映射到中间帧,然后将多个中间帧复用为uTSG.K,再将uTSG.K同步映射到第二数据帧净荷区。其中，中间帧为uTSG.K的子集，由uTSG.K的n个微时隙组成。
以第三种实现方式为例，针对一个第一数据帧来描述，则步骤S802进一步包括如下：
将所述第一数据帧映射到一个中间帧中，其中，所述中间帧包括的时隙数量等于所述第一数据帧需要占用的第二数据帧的时隙数量；
将所述中间帧映射到所述第二数据帧的所述一个或多个时隙中。
下面结合图12来对中间帧进行进一步描述。为了简化描述，后续称该中间帧为微时隙子组(micro tributary slot sub group,uTSSG.n)。其中，n表示了该中间帧包含的微时隙个数。对于不同类型的第一数据帧，n的数值可能是不同的。需要说明的是，本申请中的命名对中间帧不够成任何限定，具有相同特征的其他名称的中间帧也被本申请覆盖，例如称为灵活时隙组(flexible tributary slot group.n，FTSG.n)，或者称为可编程时隙组(programmable tributary slot group.n，PTSG.n)，或者称为灵活光数据支路单元(flexible optical data tributary unit.n，ODTUflex.n)。如图12所示，uTSSG.n包括两个部分，一部分是开销区，另外一部分是净荷区，划分为n个微时隙。
下面结合图11来具体说明ODU LR帧通过uTSSG.n帧映射到第二数据帧的过程，其中，M的取值为16个字节。以ODU LR为ODU LR(VC12),第二数据帧是ODU1，单个K＝512为例，即第二数据帧划分的微时隙总数为512个，也即uTSG.K为uTSG.512，每一个微时隙的速率可以是如表3所述的2.419673751Mbps。第二数据帧的时隙划分方式按照图8B的方式来划分。以表1所示ODU LR(VC12)帧为例，其速率为2.384Mbps。所以，该ODU LR帧需要1个微时隙来承载。也就是说，uTSSG.n包括1个微时隙，即uTSSG.1。如图11所示，将已经承载了VC12的ODU LR映射到uTSSG.1帧中，uTSSG.1帧包括119*16个字节，也即1904个字节。然后，将uTSSG.1帧复用到uTSG.512，uTSG.512比特同步映射(bit synchronous mapping procedure，BMP)到第二数据帧净荷区的r＝256行，也即可以看作是uTSSG.1映射到第二数据帧的一个微时隙中。具体地，可以采用通用映射规程(generic mapping procedure)来将 ODU LR帧映射到uTSSG.1帧中。需要说明的是，图12将ODU LR(VC12)到uTTSG.n，以及uTTSG.n映射到uTSG.K这两个步骤通过一个步骤来展示。在实际的应用过程中，可以分成两个步骤来实现或者通过一个步骤来实现。
还需要说明的是，根据图11的例子，本领域技术人员不经过创造性劳动即可获得其他条件下的ODU LR帧通过uTSSG.n映射到第二数据帧的例子(例如：不同类型的第二数据帧，或者不同的M，或者微时隙的速率等)，本申请不予赘述。还需要说明的是，uTSSG.n这个中间帧不是必须的。为了简化映射的流程或者其他考虑，可以直接将ODULR帧映射到第二数据帧对应的时隙中去。
为了接收设备可以正确解析出ODU LR帧，第二数据帧中需要新增如下四种开销：
第一种：净荷类型指示开销(payload type,PT)，用于指示当前第二数据帧通过uTSG.k承载了多路低速ODU LR客户信号，例如定义一个新值PT＝0x25。
第二种：uTSG.K指示开销，用于指示uTSG.K在第二数据帧净荷区的起始位置；
如果uTSG.K基于第二数据帧的行数构建，例如占用第二数据帧ODUflex的r行。uTSG.K帧可能从ODUflex净荷区的任意一行起始，通过定义uTSG.K起始位置指示开销，指示uTSG.k是从ODUflex净荷区的第几行开始。例如将ODUflex的第1行第16列的8比特作为该uTSG.K指示开销Pointer(如图13所示)，通过8比特图案01010101，10101010，00110011，11001100分别指示uTSG.k的起始位置是从第1行、第2行、第3行或第4行开始。如果uTSG.K帧起始位置不在本ODUflex帧净荷区，则该ODUflex中的uTSG.K指示开销Pointer为全0。
如果uTSG.K基于第二数据帧的帧数构建，例如占用第二数据帧ODUflex的s帧。uTSG.K帧可能从任意一个ODUflex帧净荷区起始，通过定义uTSG.K指示开销Pointer，指示uTSG.k是否是从当前ODUflex帧净荷区起始，例如将ODUflex的第1行第16列的8比特作为该uTSG.K指示开销Pointer，通过8比特图案11111111指示uTSG.k的起始位置是从当前ODUflex帧净荷区起始。如果uTSG.K帧起始位置不在本ODUflex帧净荷区，则该ODUflex中的uTSG.K指示开销Pointer为全0。
需要说明的是，通过开销携带uTSG.K帧起始位置的好处是接收端可以通过这个信息来准确确定uTSG.K帧的起始位置。这个开销信息不是必须的。如果不在开销中携带，那么可以在设备上进行配置来实现。
第三种：复用结构指示开销(multiplex structure indicator,MSI)，用于指示第二数据帧的微时隙分布和占用状态，同时也即是指示uTSG.K的微时隙分布和占用状态。
具体地，以512个微时隙为例，复用结构指示开销MSI需要使用512个14比特，可以标记为MSI[0]、MSI[1]、……、MSI[511]，分别对应第1到第512个微时隙，每个微时隙对应一个14比特。该14比特包括两个开销字段：类型(type)和业务指示(LCID)。其中，type占用4个比特，表示当前微时隙是否被占用，如果被占用则指示承载的低速率业务的类型，表4给出了一个示例。需要说明的是，在实际使用中，取值和对应的含义可以不同于表4的设计。本申请对此不做限定。LCID占用10个比特，表示当前微时隙承载的低速率业务的编号，取值范围可以是0～1023。
表4 低速业务类型开销示意
Type类型 指示的业务类型
0x0 未占用
0x1 ODU LR(VC12)
0x2 ODU LR(VC3)
0x3 ODU LR(VC4)
0x4 ODU LR(E1)
0x5 ODU LR(E3)
0x6 ODU LR(E4)
0x7 ODU LR(通用)
0x8～0xf 保留
该复用结构指示开销可以放置在第二数据帧的净荷结构指示开销位置。例如，如图14所示，该开销可以放在ODUflex帧的第4行第15列和16列，通过复帧指示的方式将MSI[0]、MSI[1]、……、MSI[511]分别放置在PSI[2],PSI[1],…,PSI[513]位置。或者，该开销也可以放在微时隙的开销位置处，具体参见关于“第四种开销”的相关描述。
需要说明的是，由于时隙数量过多，为了能够通过PSI完全指示微时隙占用情况，需要扩展当前的复帧指示定义。具体地，可以定义2比特的光复帧指示(optical multiframe indication，OMFI)，占用第二数据帧的第4行第16列的低2比特。将OMFI和第二数据帧当前已有的复帧指示MFAS结合使用，以256个第二数据帧作为一个周期，OMFI进行递增(取值范围为0-3)。可以完成1024个第二数据帧作为一个大复帧指示，从而支持例如512个的微时隙占用指示。在实际应用中，结合具体的时隙数量，可以设计其他长度的OMFI以完成对应的时隙占用指示信息的传递。
第四种：微时隙开销(micro tributary slot overhead，uTSOH)
每个微时隙对应一个微时隙开销，用于指示当前微时隙的占用状态以及放置映射信息。其中，映射信息为映射ODU LR信号进入uTSG.K或第二数据帧的n个微时隙时采用GMP时，对应生成的映射开销。
微时隙开销位于每个微时隙净荷区的前几个字节，例如对于时隙间插粒度为M＝16字节的uTSG.k来讲，可以选择每个微时隙净荷区的第一个16字节作为微时隙开销(如图11所示)。若复用结构指示开销放置在微时隙开销位置，则将MSI[0]、MSI[1]、……、MSI[511]分别放置在第1到第512个微时隙对应的微时隙开销的前14比特(也即第1字节和第2字节的高6比特)。
映射开销包含GMP映射生成的Cm，CnD以及校验信息。其中，Cm表示的是ODU LR信号映射到uTSG.K或者第二数据帧的n个微时隙的客户数据数量，单位为m比特。如果m＝8，则表示ODU LR信号映射到uTSG.K或者第二数据帧的n个微时隙的字节数量。如果m＝6，则表示ODU LR信号映射到uTSG.K或者第二数据帧的n个微时隙的双字节数量。本申请对m的取值不做限定。CnD用于表示ODU LR信号的时钟信息，若精度为比特，则取值范围为1到m-1，若精度为字节，则取值范围为1到m/8-1。校验信息则是循环冗余检验(cyclic redundancy check,CRC)，用于检验Cm和CnD信息，保证信息的健壮性。该所述映射开销占用6个字节。该所述6个字节可以放置在所述ODU LR占用的uTSG.K或者所述第二数据帧的n个微时隙的第一个微时隙对应的微时隙开销位置，例如图11所示的映射开销位置的第3字 节到第8字节，如果复用结构指示开销没有放置在微时隙开销，则映射开销则可以放置在第1字节到第6字节。需要说明的是，本申请对具体的Cm、CnD和CRC占用的比特数量不做约束，可以根据映射采用的映射粒度和净荷大小灵活选择。类似地，映射开销的位置也可以放在其他的开销位置，本申请不做限定。
需要说明的是，采用GMP映射方式，当承载的低速率业务速率小于n个微时隙的总速率时，n个微时隙构成的净荷区的第一个码块位置永远作为填充块，不会放置有效数据。因此，利用这个码块来放置映射开销信息可以节约开销，即提升开销利用率。
下面结合具体的例子来说明Cn和CnD的取值。以第二数据帧为ODUflex，其比特速率为ODU0比特速率，K＝512，M＝16字节,N＝60928,r＝256为例。对应地，每个微时隙的净荷区包含N/K＝60928/512＝119个16字节＝1904字节。当ODU LR信号(假设其频偏为正负100ppm)占用第二数据帧的m个微时隙，若映射粒度采用1字节，净荷大小为m*1904字节，对应的Cm最小值和最大值分别是ODU LR比特速率*(1-100ppm)/((1+20ppm)*m*单个微时隙比特速率)*m*1904和ODU LR比特速率*(1+100ppm)/((1-20ppm)*m*单个微时隙比特速率)*m*1904，CnD取值范围为1到7比特。若映射粒度采用16字节，净荷大小为m*119个16字节，对应的Cm最小值和最大值分别是ODU LR比特速率*(1-100ppm)/((1+20ppm)*m*单个微时隙比特速率)*m*119和ODU LR比特速率*(1+100ppm)/((1-20ppm)*m*单个微时隙比特速率)*m*119，CnD取值范围为1～15字节。这个Cm范围的计算公式适用于不同类型的ODU LR帧。具体地，下表给出了一些具体类型的ODU LR帧的Cm及CnD取值范围的示例。
表5 Cm及CnD值示例
Figure PCTCN2018086345-appb-000004
结合图11来描述一下该步骤的一个具体示例。对于承载了VC12业务的ODU LR(VC12)，比特速率为2.384Mbit/s。假设其通过1.25G ODUflex传送，该1.25G ODUflex的比特速率为1.244078309Gbit/s(基于高阶ODU1的1.25G时隙获得，参见表3)，该1.25G ODUflex通过uTSG.512划分为512个微时隙，uTSG.512采用M＝16字节时隙间插粒度，包含N＝60928个16字节码块，占用1.25G ODUflex帧净荷区的256行，每个微时隙包含119个16字节码块，每个微时隙比特速率为2.419673751Mbit/s。ODULR(VC12)通过该1.25G ODUflex传送时，只需要占用1个微时隙，假设占用微时隙TS#2。将ODULR(VC12)映射到该1.25G ODUflex的微时隙TS#2，也即将ODU LR(VC12)通过GMP映射到uTSSG.1(由TS#2组成)，并生成对应的映射开销，包括Cm和CnD值(具体的值，请参见表5)以及校验信息，放置到其占用的第 一个微时隙的微时隙开销位置，之后将uTSSG.1复用到uTSG.512，并比特同步映射uTSG.512到该1.25G ODUflex帧净荷区的256行。同时或者之后，生成需要的开销，包括净荷类型指示开销PT＝0x25，uTSG.K指示开销，复用结构指示开销，并放置到相应的位置。
需要说明的是，本申请中提到的第二数据帧可以是任意速率大小的ODUflex，或ODU0、ODU1、ODU2、ODU3、ODU4和ODUCn等。对于1.25G的ODUflex，可以等价看作是ODU0。对于m*1.25的ODUflex，除了4行3824列的OTN帧结构外，还可以额外扩展一种新的帧结构定义，即将m*1.25的ODUflex看作是m个1.25G ODUflex的级联，由m个1.25G ODUflex的实例帧组成。这样假设每路1.25G ODUflex划分为512个2.5Mbit/s微时隙，那么m*1.25的ODUflex则总共划分为m*512个2.5Mbit/s微时隙。其划分方式同样采用本申请上述给出的方式。
S803:将所述第二数据帧映射到光传输单元(OTU)帧中；
本步骤跟图9的步骤S703类似，针对步骤S703的说明也适用于本步骤，此处不予赘述。以第二数据帧直接映射到OTU帧为例，需要增加开销，以完成ODU层级的操作、运行和管理功能。
S804:发送所述OTU帧；
具体地，设备A通过一根或者多根光纤将OTU帧发送给下游设备，例如本实施例中的设备H。需要说明的是，如果一个业务传送路径包括多个网络设备，那么源设备发送的下游设备是中间设备，而非目的设备。
S805:从所述OTU帧中解映射出所述第二数据帧；所述第二数据帧包括多个时隙，所述时隙的速率不大于100Mbps；
具体地，设备H在接收到了通过光纤传输过来的OTU帧后，从该帧中解析出第二数据帧。该第二数据帧的特性如步骤S802所述，此处不再赘述。
S806:从所述第二数据帧中解映射出所述第一数据帧；
S807:从所述第一数据帧中解映射出所述低速业务数据。
具体地，设备H进一步从第二数据帧中解映射出第一数据帧，即ODU LR。然后，设备H从ODU LR帧中获取低速率业务数据。
通过定义新的ODU帧结构并定义一套映射流程，本申请实施例提供的方法能够降低现有技术面临的低速率业务数据的处理复杂度高的问题，提高了处理效率。此外，本申请实施例提供的方法，无须进行多级的映射，也具有处理速率快的优点。
本申请实施例还提供另外一种OTN设备结构。如图15所示，OTN设备1400中可以包括处理器1401和存储器1402。该OTN设备既可以应用于发送节点，也应用于接收节点。
在应用于发送节点时，处理器1401用于实现图9或10中所述的发送节点所执行的方法。在实现过程中，处理流程的各步骤可以通过处理器1401中的硬件的集成逻辑电路或软件形式的指令完成图9或10中所述的发送节点所执行的方法。在应用于接收节点时，处理器1401用于实现图10中所述的接收节点所执行的方法。在实现过程中，处理流程的各步骤可以通过处理器1401中的硬件的集成逻辑电路或者软件形式的指令完成图10中所述的接收节点所执行的方法。需要说明的是，所述处理器1401和所述存储器1402在图3所述的网络设备硬件结构图中，可能位于支路板中。
本申请实施例中处理器1401可以是通用处理器、数字信号处理器、专用集成电路、现场可编程门阵列或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件， 可以实现或者执行本申请实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者任何常规的处理器等。结合本申请实施例所公开的方法的步骤可以直接体现为硬件处理器执行完成，或者用处理器中的硬件及软件单元组合执行完成。处理器1401用于实现上述方法所执行的程序代码可以存储在存储器1402中。存储器1402和处理器1401耦合。本申请实施例中的耦合是装置、单元或模块之间的间接耦合或通信连接，可以是电性，机械或其它的形式，用于装置、单元或模块之间的信息交互。处理器1401可能和存储器1402协同操作。存储器1402可以是非易失性存储器，比如硬盘(hard disk drive，HDD)等，还可以是易失性存储器(volatile memory)，例如随机存取存储器(random-access memory，RAM)。存储器1402是能够用于携带或存储具有指令或数据结构形式的期望的程序代码并能够由计算机存取的任何其他介质，但不限于此。
基于以上实施例，本申请实施例还提供了一种计算机存储介质，该存储介质中存储软件程序，该软件程序在被一个或多个处理器读取并执行时可实现上述任意一个或多个实施例提供的方法。所述计算机存储介质可以包括：U盘、移动硬盘、只读存储器、随机存取存储器、磁碟或者光盘等各种可以存储程序代码的介质。
基于以上实施例，本申请实施例还提供了一种芯片，该芯片包括处理器，用于实现上述任意一个或多个实施例所涉及的功能，例如获取或处理上述方法中所涉及的数据帧。可选地，所述芯片还包括存储器，所述存储器，用于处理器所执行必要的程序指令和数据。该芯片，可以由芯片构成，也可以包含芯片和其他分立器件。
本领域内的技术人员应明白，本申请的实施例可提供为方法、系统、或计算机程序产品。因此，本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且，本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本申请是参照根据本申请实施例的方法、设备(系统)和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
显然，本领域的技术人员可以对本申请实施例进行各种改动和变型而不脱离本申请实施例的范围。这样，倘若本申请实施例的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则本申请也意图包含这些改动和变型在内。

Claims (21)

  1. 一种光传送网(OTN)中业务数据的处理方法，其特征在于，所述方法包括：
    将低速业务数据映射到第一数据帧中，其中，所述第一数据帧包括开销区和净荷区，所述净荷区用于承载所述低速业务数据，所述开销区用于携带对所述低速业务数据的管理和维护信息，所述第一数据帧的净荷区的速率不小于所述低速业务数据的速率，所述低速业务数据的速率小于1Gbps；
    将所述第一数据帧映射到第二数据帧的一个或多个时隙中，所述时隙的速率不大于100Mbps；
    将所述第二数据帧映射到光传输单元(OTU)帧中；
    发送所述OTU帧。
  2. 如权利要求1所述的方法，所述开销区包括帧头指示、复帧指示和路径监控信息。
  3. 如权利要求1-2任一所述的方法，其特征在于，所述第一数据帧的大小为X*M字节，其中，X和M为正整数，M为所述第二数据帧的时隙间插粒度。
  4. 如权利要求3所述的方法，其特征在于，所述第一数据帧的大小为119字节，其中M等于1；或者，所述第一数据帧为X*16字节，其中M等于16。
  5. 如权利要求1-4任一所述的方法，其特征在于，所述第一数据帧的净荷区的字节数量不大于所述低速业务数据的帧结构的字节数量的1.25倍。
  6. 如权利要求1-5任一所述的方法，其特征在于，所述低速业务数据为如下业务类型的任意一种：E1、E3、E4、虚容器(VC)12、VC3、VC4、同步传输模块(STM)-1、STM-4和快速以太网(FE)。
  7. 如权利要求1-6任一所述的方法，其特征在于，所述将所述第一数据帧映射到第二数据帧的一个或多个时隙中，包括：
    将所述第一数据帧映射到一个中间帧中，其中，所述中间帧包括的时隙数量等于所述第一数据帧需要占用的第二数据帧的时隙数量；
    将所述中间帧映射到所述第二数据帧的所述一个或多个时隙中。
  8. 如权利要求1-7任一所述的方法，其特征在于，所述第二数据帧为多行多列的结构，所述第二数据帧的整数行用于划分K个时隙，K为正整数；或者，多个所述第二数据帧用于划分K个时隙。
  9. 如权利要求1-8任一所述的方法，其特征在于，所述方法还包括：将映射信息放置到所述第二数据帧的一个或多个时隙中,其中，所述映射信息包括所述第一数据帧映射到所述第二数据帧的一个或多个时隙中的m比特数量和时钟信息。
  10. 如权利要求1-9任意一项所述的方法，其特征在于，所述第二数据帧为ODU0、ODU1、ODU2、ODU3、ODU4或ODUflex。
  11. 一种光传送网(OTN)中业务数据的处理方法，其特征在于，所述方法包括：
    接收第一数据帧，所述第一数据帧包括多个时隙，所述时隙的速率不大于100Mbps；
    从所述第一数据帧中解映射出第二数据帧，其中，所述第二数据帧包括开销区和净荷区，所述净荷区用于承载低速业务数据，所述开销区用于携带对所述低速业务数据的管理和维护信息，所述第二数据帧的净荷区的速率不小于所述低速业务数据的速率，所述低速业务数据的速率小于1Gbps，所述第一数据帧的一个或多个时隙用于承载所述第二数据 帧；
    从所述第二数据帧中解映射出所述低速业务数据。
  12. 如权利要求11所述的方法，所述开销区包括帧头指示、复帧指示和路径监控信息。
  13. 如权利要求11-12任一所述的方法，其特征在于，所述第二数据帧的大小为X*M字节，其中，X和M为正整数，M为所述第一数据帧的时隙间插粒度。
  14. 如权利要求13所述的方法，其特征在于，所述第二数据帧的大小为119字节，其中M等于1；或者，所述第二数据帧为X*16字节，其中M等于16。
  15. 如权利要求11-14任一所述的方法，其特征在于，所述第二数据帧的净荷区的字节数量不大于所述低速业务数据的帧结构的字节数量的1.25倍。
  16. 如权利要求11-15任一所述的方法，其特征在于，所述低速业务数据为如下业务类型的任意一种：E1、E3、E4、虚容器(VC)12、VC3、VC4、同步传输模块(STM)-1、STM-4和快速以太网(FE)。
  17. 如权利要求11-16任一所述的方法，其特征在于，所述从所述第一数据帧中解映射出第二数据帧，包括：
    从所述第一数据帧解映射到一个中间帧中，其中，所述中间帧包括的时隙数量等于所述第二数据帧需要占用的第一数据帧的时隙数量；
    从所述中间帧解映射到所述第二数据帧。
  18. 一种光传送网中业务数据的处理装置，其特征在于，包括处理器以及存储器，其中：所述存储器，存储有程序代码；所述处理器，用于读取并执行所述存储器存储的程序代码，以实现如权利要求1～10任一项所述的方法。
  19. 一种光传送网中业务数据的处理装置，其特征在于，包括处理器以及存储器，其中：所述存储器，存储有程序代码；所述处理器，用于读取并执行所述存储器存储的程序代码，以实现如权利要求11～17任一项所述的方法。
  20. 一种芯片，其特征在于，所述芯片与存储器相连，用于读取并执行所述存储器中存储的程序代码，以实现如权利要求1至17任一项所述的方法。
  21. 一种光传送网系统，其特征在于，所述系统包括如权利要求18所述装置和如权利要求19所示的装置。
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111162864A (zh) * 2019-12-26 2020-05-15 上海欣诺通信技术股份有限公司 低速率信号的传输方法、装置、设备及存储介质
CN112788442A (zh) * 2019-11-08 2021-05-11 烽火通信科技股份有限公司 一种低速业务在otn网络中的承载方法及系统
WO2021185196A1 (zh) * 2020-03-17 2021-09-23 华为技术有限公司 一种数据帧的传送方法以及相关设备
WO2023221966A1 (zh) * 2022-05-20 2023-11-23 华为技术有限公司 一种传输数据的方法和装置
EP4040707A4 (en) * 2019-11-28 2024-03-27 Zte Corp DATA TRANSMISSION METHOD AND DEVICE, TERMINAL AND STORAGE MEDIUM
EP4106233A4 (en) * 2020-02-28 2024-03-27 Zte Corp SERVICE PROCESSING METHOD AND APPARATUS IN AN OPTICAL TRANSPORT NETWORK AND ELECTRONIC DEVICE

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2759514C1 (ru) * 2018-05-10 2021-11-15 Хуавей Текнолоджиз Ко., Лтд. Система, устройство и способ обработки данных низкоскоростной услуги в оптической транспортной сети
CN112865911A (zh) * 2021-01-18 2021-05-28 中兴通讯股份有限公司 客户业务承载方法及装置
CN115134036A (zh) * 2021-03-26 2022-09-30 中国移动通信有限公司研究院 业务数据传输方法、装置、相关设备及存储介质
CN113709172B (zh) * 2021-09-02 2023-07-11 北京江南天安科技有限公司 一种sdh超帧结构及其纠错方法
CN116489538A (zh) * 2022-01-14 2023-07-25 华为技术有限公司 业务数据处理的方法和装置
CN116582219A (zh) * 2022-01-30 2023-08-11 华为技术有限公司 一种光传送网中的数据帧的处理方法、装置和系统
CN117201968A (zh) * 2022-05-30 2023-12-08 华为技术有限公司 业务数据处理的方法和装置
CN117221768A (zh) * 2022-06-02 2023-12-12 华为技术有限公司 业务数据处理方法和装置
CN117544274A (zh) * 2022-08-02 2024-02-09 中兴通讯股份有限公司 客户信号的处理方法、装置、电子设备和存储介质
CN117692114A (zh) * 2022-09-02 2024-03-12 华为技术有限公司 一种传输数据的方法和装置
CN117692822A (zh) * 2022-09-05 2024-03-12 华为技术有限公司 一种光传送网中的数据帧的处理方法、装置和系统

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101547057A (zh) * 2008-03-28 2009-09-30 中兴通讯股份有限公司 光传送网中业务处理的方法和装置
CN101695144A (zh) * 2009-10-10 2010-04-14 中兴通讯股份有限公司 一种支持多业务接入和传输的方法及系统
US20160344471A1 (en) * 2015-05-18 2016-11-24 Ciena Corporation Adaptive preconfiguration in optical transport network

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100349390C (zh) * 2004-08-11 2007-11-14 华为技术有限公司 光传送网中传输低速率业务信号的方法及其装置
CN101217334A (zh) * 2004-08-11 2008-07-09 华为技术有限公司 光传送网中传输低速率业务信号的方法及其装置
CN100596043C (zh) * 2004-08-26 2010-03-24 华为技术有限公司 实现低速信号在光传输网络中透明传送的方法和装置
CN100590997C (zh) * 2004-11-02 2010-02-17 华为技术有限公司 一种otn网络中业务复用的开销处理方法
CN100373847C (zh) * 2004-12-14 2008-03-05 华为技术有限公司 在光传送网中传输低速率业务信号的方法
CN1791057B (zh) 2004-12-15 2011-06-15 华为技术有限公司 在光传送网中传输数据业务的方法及其装置
US10128953B2 (en) * 2006-10-13 2018-11-13 Menara Networks, Inc. High-speed pluggable optical transceivers with advanced functionality
US20100142947A1 (en) * 2008-12-08 2010-06-10 Jong-Yoon Shin Apparatus and method for pseudo-inverse multiplexing/de-multiplexing transporting
CN101834688B (zh) 2009-03-09 2011-08-31 华为技术有限公司 光传送网中的映射、解映射方法及装置
JP5461229B2 (ja) * 2010-02-25 2014-04-02 日本電信電話株式会社 クライアント信号収容多重処理装置、クライアント信号クロスコネクト装置、クライアント信号収容多重処理方法
JP5382217B2 (ja) * 2010-06-01 2014-01-08 富士通株式会社 通信システム、フレーム同期検出装置およびフレーム同期検出方法
JP5659910B2 (ja) * 2011-03-29 2015-01-28 富士通株式会社 フレームマッピング装置及びフレームマッピング方法
WO2013185327A1 (zh) 2012-06-14 2013-12-19 华为技术有限公司 传送、接收客户信号的方法和装置
CN105190710B (zh) * 2013-05-06 2018-08-07 锡克拜控股有限公司 用于读取文件并在其上打印标记的装置和方法
CN105308885B (zh) * 2013-06-18 2018-01-23 三菱电机株式会社 光通信用交叉连接装置及其信号处理方法
CN105451102B (zh) 2014-08-22 2019-05-28 华为技术有限公司 一种处理信号的方法、装置及系统
JP2017038305A (ja) * 2015-08-12 2017-02-16 富士通株式会社 伝送装置、伝送システム、及び伝送方法
US10469168B2 (en) * 2017-11-01 2019-11-05 Fujitsu Limited Disaggregated integrated synchronous optical network and optical transport network switching system
RU2759514C1 (ru) * 2018-05-10 2021-11-15 Хуавей Текнолоджиз Ко., Лтд. Система, устройство и способ обработки данных низкоскоростной услуги в оптической транспортной сети

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101547057A (zh) * 2008-03-28 2009-09-30 中兴通讯股份有限公司 光传送网中业务处理的方法和装置
CN101695144A (zh) * 2009-10-10 2010-04-14 中兴通讯股份有限公司 一种支持多业务接入和传输的方法及系统
US20160344471A1 (en) * 2015-05-18 2016-11-24 Ciena Corporation Adaptive preconfiguration in optical transport network

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112788442A (zh) * 2019-11-08 2021-05-11 烽火通信科技股份有限公司 一种低速业务在otn网络中的承载方法及系统
EP4040707A4 (en) * 2019-11-28 2024-03-27 Zte Corp DATA TRANSMISSION METHOD AND DEVICE, TERMINAL AND STORAGE MEDIUM
CN111162864A (zh) * 2019-12-26 2020-05-15 上海欣诺通信技术股份有限公司 低速率信号的传输方法、装置、设备及存储介质
EP4106233A4 (en) * 2020-02-28 2024-03-27 Zte Corp SERVICE PROCESSING METHOD AND APPARATUS IN AN OPTICAL TRANSPORT NETWORK AND ELECTRONIC DEVICE
WO2021185196A1 (zh) * 2020-03-17 2021-09-23 华为技术有限公司 一种数据帧的传送方法以及相关设备
WO2023221966A1 (zh) * 2022-05-20 2023-11-23 华为技术有限公司 一种传输数据的方法和装置

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