WO2023221552A1 - Schottky transistor, diode, and cold source semiconductor structure and preparation method therefor - Google Patents

Abstract

The present application relates to the technical field of semiconductors, and provides a Schottky transistor, a diode, and a cold source semiconductor structure and a preparation method therefor. The cold source semiconductor structure comprises a heavily doped P-type region, a metal region, and a lightly doped N-type region. The metal region is connected between the heavily doped P-type region and the lightly doped N-type region, and the metal region is platinum silicide, and the end of the lightly doped N-type region adjacent to the metal region is doped with sulfide ions. The present application can lower a Schottky barrier in contact with a semiconductor structure, thereby improving an on-state current.

Description

Schottky transistor, diode, cold source semiconductor structure and preparation method thereof

Cross-references to related applications

This application claims priority to Chinese patent application No. 202210547399X titled "Schottky transistor, diode, cold source semiconductor structure and preparation method thereof" submitted on May 18, 2022. The entire contents of the above application are incorporated by reference into this application.

Technical field

The present application relates to the field of semiconductor technology, and in particular to a Schottky transistor, diode, cold source semiconductor structure and preparation method thereof.

Background technique

A huge challenge facing current integrated circuit technology is how to reduce power consumption while reducing size. However, because the power supply voltage required by the circuit cannot be scaled down simultaneously with the reduction in device size, power consumption issues are prominent. This problem exists in both transistors and diodes. In transistors, such as MOSFETs, it is mainly reflected in the sub-threshold swing limit of 60mV/dec; in diodes, such as PN junction diodes, it is mainly reflected in the limit of the ideal factor of 1. , this is due to the limit determined by the physical principles of the semiconductor structure, which results in the existing semiconductor structure having a higher Schottky barrier and a smaller on-state current.

Contents of the invention

This application provides a Schottky transistor, diode, cold source semiconductor structure and a preparation method thereof, which can reduce the Schottky barrier in contact with the semiconductor structure and increase the on-state current.

This application provides a cold source semiconductor structure, including: a heavily doped P-type region, a metal region and a lightly doped N-type region, the metal region is connected between the heavily doped P-type region and the lightly doped N-type region; and the metal region is platinum silicide, and the lightly doped N-type region One end of the region adjacent to the metal region is doped with sulfur ions.

According to a cold source semiconductor structure provided by this application, the doping amount of the sulfide ions is adjustable to adjust the height of the Schottky barrier in contact between the metal region and the lightly doped N-type region, which specifically includes: The greater the doping amount of sulfide ions, the smaller the Schottky barrier height.

According to a cold source semiconductor structure provided by this application, the Schottky barrier height and the doping amount of sulfur ions satisfy a function:

Wherein, H is the Schottky barrier height, the unit is eV; D is the doping amount of the sulfide ions, the unit is 1e13cm ^-2 .

According to a cold source semiconductor structure provided by this application, the height of the Schottky barrier in contact between the heavily doped P-type region and the metal region is 0.1 to 0.2 eV.

According to a cold source semiconductor structure provided by this application, the height of the Schottky barrier in contact between the metal region and the lightly doped N-type region is 0.1 to 0.2 eV.

According to a cold source semiconductor structure provided by this application, the substrate material of the heavily doped P-type region and the lightly doped N-type region is silicon.

This application also provides a method for preparing the above-mentioned cold source semiconductor structure, including:

Form a metallic platinum layer;

Using a silicon substrate to form a heavily doped P-type region and depositing it on one side of the metal platinum layer;

A lightly doped N-type region is formed using a silicon substrate, and sulfur ions are injected into one end of the lightly doped N-type region; one end of the lightly doped N-type region into which sulfur ions are implanted is deposited on the back of the metal platinum layer To one side of the heavily doped P-type region;

Perform thermal annealing.

This application also provides a Schottky transistor, including:

In the above-mentioned cold source semiconductor structure, the lightly doped N-type region is a channel region;

A drain region, the channel region is provided between the metal region and the drain region;

Gate dielectric, disposed on the upper side and/or lower side of the channel region;

A source electrode is provided in the heavily doped P-type region;

A drain electrode is provided in the drain region;

A gate electrode is provided on the gate electrode medium.

According to a Schottky transistor provided by this application, the work function of the metal region is 5.0 eV, the length of the metal region is 10 nm, and the thickness of the metal region is 10 nm;

And/or, the gate dielectric is made of hafnium oxide, and the thickness of the gate dielectric is 1.5 nm.

This application also provides a diode, including the above-mentioned cold source semiconductor structure.

The Schottky transistor, diode, cold source semiconductor structure and preparation method provided by this application are connected between the heavily doped P-type region and the lightly doped N-type region through the metal region to form a semiconductor-metal-semiconductor architecture. It has a cold source structure, and the metal region is platinum silicide. One end of the lightly doped N-type region adjacent to the metal region is doped with sulfur ions, which can reduce the Schottky barrier of the semiconductor structure contact and increase the on-state current.

Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.

Description of the drawings

In order to explain the technical solutions in this application or related technologies more clearly, the drawings needed to be used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings in the following description are some of the drawings in this application. Embodiments, for those of ordinary skill in the art, other drawings can also be obtained based on these drawings without exerting creative efforts.

Figure 1 is a schematic structural diagram of the cold source semiconductor structure provided by this application;

Figure 2 is an energy band structure diagram in the X direction when the three regions of the cold source semiconductor structure provided by this application are not in contact;

Figure 3 is the third cold source semiconductor structure provided by this application without doping sulfur ions. The energy band structure diagram when two regions are in contact;

Figure 4 is an energy band structure diagram in the X direction when three regions of the cold source semiconductor structure are in contact when doped with sulfur ions provided by this application;

Figure 5 is an energy band structure diagram when three regions of the cold source semiconductor structure are in contact when doped with sulfur ions provided by this application;

Figure 6 is a schematic diagram of the functional relationship between the Schottky barrier height and the doping amount of sulfur ions provided by this application;

Figure 7 is a flow chart of the preparation method of the cold source semiconductor structure provided by the present application;

Figure 8 is a schematic structural diagram of the Schottky transistor provided by this application;

Figure 9 is a schematic structural diagram of the diode provided by this application;

Reference signs:

1: Heavily doped P-type region; 2: Metal region; 3: Lightly doped N-type region; 4: Drain region; 5: Gate dielectric; 6: Positive electrode; 7: Negative electrode.

Detailed ways

In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions in this application will be clearly and completely described below in conjunction with the drawings in this application. Obviously, the described embodiments are part of the embodiments of this application. , not all examples. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this application.

In the description of the embodiments of the present application, it should be noted that the orientations or positional relationships indicated by the terms "upper", "lower", "left", "right", etc. are based on the orientations or positional relationships shown in the drawings, and only It is intended to facilitate the description of the embodiments of the present application and simplify the description, but does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the embodiments of the present application.

In the description of the embodiments of the present application, it should be noted that, unless otherwise clearly stated and limited, the terms "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection. The connection can be a detachable connection or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood in specific situations.

In the embodiments of this application, unless otherwise expressly provided and limited, the first feature "on" or "below" the second feature may be that the first and second features are in direct contact, or the first and second features are in intermediate contact. Indirect media contact. Furthermore, the terms "above", "above" and "above" the first feature is above the second feature may mean that the first feature is directly above or diagonally above the second feature, or simply means that the first feature is higher in level than the second feature. "Below", "below" and "beneath" the first feature to the second feature may mean that the first feature is directly below or diagonally below the second feature, or simply means that the first feature has a smaller horizontal height than the second feature.

In the description of this specification, reference to the terms "one embodiment," "some embodiments," "an example," "specific examples," or "some examples" or the like means that specific features are described in connection with the embodiment or example. , structures, materials or features are included in at least one embodiment or example of the embodiments of this application. In this specification, the schematic expressions of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the specific features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, those skilled in the art may combine and combine different embodiments or examples and features of different embodiments or examples described in this specification unless they are inconsistent with each other.

The Schottky transistor, diode, cold source semiconductor structure and preparation method of the present application will be described below with reference to FIGS. 1 to 9 .

According to the embodiment of the first aspect of the present application, as shown in FIG. 1 , the cold source semiconductor structure provided by the present application mainly includes: a heavily doped P-type region 1 , a metal region 2 and a lightly doped N-type region 3 . Among them, the metal region 2 is connected between the heavily doped P-type region 1 and the lightly doped N-type region 3 to form a heat sink structure of a semiconductor-metal-semiconductor architecture, and the metal region 2 is made of platinum silicide (PtSi), which is light. One end of the doped N-type region 3 adjacent to the metal region 2 is doped with sulfur ions.

It should be noted that in this application, the metal region 2 is injected into the PN junction of the heavily doped P-type region 1 and the lightly doped N-type region 3 as a cold source of the entire structure. The effect of the cold source can be achieved, specifically including: using light The band gap of the doped N-type region 3 semiconductor can adjust the electron Boltzmann distribution injected by the external electrode, so that electrons in the high-energy region of the electron Boltzmann distribution are filtered out, achieving a steeper sub-threshold swing. , thereby realizing cold source injection; and as shown in Figure 3 and Figure 5, through the injected metal region 2, the original high PN in the PN structure of the heavily doped P-type region 1 and the lightly doped N-type region 3 can be The junction barrier Φ ₀ (the barrier height is close to the band gap width of Si) is reduced to two relatively small Schottky barrier heights Φ ₁ and Φ ₂ , which can increase the injection current. Among them, Φ ₁ is the Schottky barrier height in contact between the heavily doped P-type region 1 and the metal region (PtSi); Φ ₂ is the Schottky barrier height in the contact between the metal region (PtSi) and the lightly doped N-type region 3 high.

Moreover, this application uses metal silicide such as platinum silicide in the metal region 2, so that both Schottky barrier heights Φ ₁ and Φ ₂ can be modulated and further reduced to 0.1~0.2eV; by lightly doping the N-type region 3 One end adjacent to the metal region 2 is doped with sulfur ions, which can further significantly reduce the Schottky barrier height Φ ₂ , as shown in Figure 5.

Specifically, when the heavily doped P-type region 1 is in contact with the metal region (PtSi), a Schottky barrier height Φ ₁ of 0.1 to 0.2 eV can be naturally formed; and by placing the lightly doped N-type region 3 adjacent to the metal region One end of (PtSi) is doped with sulfur ions, and the sulfur ions will form aggregation at the contact interface between the metal region (PtSi) and the lightly doped N-type region 3, thereby forming an impurity energy level close to the conduction band at the interface, further significantly The Schottky barrier height Φ ₂ is reduced, and the Schottky barrier height Φ ₂ can be adjusted according to the doping amount of sulfur ions, thereby improving the on-state current.

Therefore, the cold source semiconductor structure of the embodiment of the present application is connected between the heavily doped P-type region 1 and the lightly doped N-type region 3 through the metal region 2 to form a cold source structure of a semiconductor-metal-semiconductor architecture, and The metal region 2 is platinum silicide, and one end of the lightly doped N-type region 3 adjacent to the metal region 2 is doped with sulfur ions, which can effectively reduce the Schottky barrier of the semiconductor structure contact and increase the on-state current.

Please continue to refer to Figures 2 and 4. Figure 2 shows the three regions of the cold source semiconductor structure. The energy band structure diagram in the X direction without contact, in which the three regions are the heavily doped P-type region 1, the metal region (PtSi), the lightly doped N-type region 3 (i.e. the intrinsic region), and E _FP is the heavily doped P-type region 1, the metal region (PtSi) The equivalent Fermi level of holes in the doped P-type region 1, W _FP is the work function of the heavily doped P-type region 1, W _Fm is the work function of the metal region 2, and W _Fn is the lightly doped N-type region 3 The work function, E _Fn is the equivalent Fermi level of 3 electrons in the lightly doped N-type region; Figure 4 shows the energy band structure in the X direction when the three regions of the cold source semiconductor structure are in contact with doped sulfur ions. Figure, where E _Fs indicates the position of the surface impurity energy level formed by sulfide ions. It can be seen from the comparison that in this application, by doping sulfur ions in the lightly doped N-type region 3, and using sulfur ions to form aggregation at the interface between the metal region (PtSi) and the lightly doped N-type region 3, it is possible to form an interface close to the conductive The impurity energy level of the band, see E _Fs , thereby reducing the Schottky barrier height of the contact Φ ₂ .

Referring to Figures 3 and 5, Figure 3 shows the energy band structure diagram when three regions of the cold source semiconductor structure are in contact without doping sulfur ions, where Ec is the bottom of the conduction band, Ev is the top of the valence band, When the three regions of the cold source semiconductor structure are in contact, the originally high PN junction barrier Φ ₀ in the PN structure of the heavily doped P-type region 1 and the lightly doped N-type region 3 can be reduced through the metal region (PtSi) are two relatively small Schottky barrier heights Φ ₁ and Φ ₂ ; Figure 5 shows the energy band structure diagram when three regions of the cold source semiconductor structure are in contact when doped with sulfur ions. Through comparison, it can be seen that this The application is to dope the lightly doped N-type region 3 with sulfur ions, and use the sulfur ions to form aggregation at the interface between the metal region (PtSi) and the lightly doped N-type region 3, thereby forming an impurity energy level close to the conduction band at the interface. , the original Schottky barrier Φ ₂ can be further reduced, and the reduction effect is significant.

According to an embodiment of the present application, with reference to Figure 6, by adjusting the doping amount of sulfur ions, the Schottky barrier height Φ ₂ in contact with the metal region 2 and the lightly doped N-type region 3 can be adjusted, specifically including: The greater the doping amount of sulfide ions, the smaller the Schottky barrier height Φ ₂ . Therefore, the embodiments of the present application can further reduce the Schottky barrier height Φ ₂ by increasing the doping amount of sulfide ions, thereby further increasing the on-state current.

According to an embodiment of the present application, as shown in Figure 6, the Schottky barrier height Φ ₂ and the doping amount of sulfur ions satisfy the function:

Among them, H is the Schottky barrier height Φ ₂ in eV; D is the doping amount of sulfur ions in 1e13cm ^-2 (i.e. 1*10 ¹³ cm ^-2 ).

The embodiments of the present application have clarified the adjustment relationship between the Schottky barrier height Φ ₂ and the doping amount of sulfur ions through the above functions. Based on this, corresponding adjustment designs can be made according to different working conditions in practical applications, thereby improving On-state current, and improves operability and application range.

According to an embodiment of the present application, the substrate material of the heavily doped P-type region 1 and the lightly doped N-type region 3 is silicon.

According to the embodiment of the second aspect of the present application, as shown in Figure 7, the present application also provides a method for preparing the cold source semiconductor structure of the above embodiment, including:

S100. Form a metal platinum layer.

S200. Use a silicon substrate to form a heavily doped P-type region 1 and deposit it on one side of the metal platinum layer.

S300. Use a silicon substrate to form a lightly doped N-type region 3, and inject sulfur ions into one end of the lightly doped N-type region 3; deposit one end of the lightly doped N-type region 3 into which sulfur ions are implanted on the back of the metal platinum layer. One side of P-type region 1 is heavily doped.

In a specific example, sulfur ions with a dose of 1e13˜1e14cm ⁻² can be implanted at one end of the lightly doped N-type region 3 at an energy of 5keV.

S400, perform thermal annealing.

In a specific example, rapid thermal annealing (RTA) can be performed in an _N2 atmosphere at a temperature of 450°C for 30 s, so that both sides of the metal platinum (Pt) layer are completely reacted into metal regions (PtSi).

It can be understood that the steps S200 and S300 have no special requirements on the order of deposition, and both sides of the metal platinum (Pt) layer are respectively connected with the heavily doped P-type region 1 and the lightly doped N-type region 3 Part of the silicon (Si) reaction.

It should be noted that at the contact between the heavily doped P-type region 1 and the metal region (PtSi), heavy doping can be achieved through the deposition and thermal annealing reaction between the P-type region Si and the metal platinum (Pt) layer. The contact between the P-type region 1 and the metal region (PtSi) can naturally form a Schottky barrier height Φ ₁ of 0.1 to 0.2 eV without additional interface treatment; while the lightly doped N-type region 3 and the metal region (PtSi) contact, the processing method includes: before forming the metal region (PtSi), first doping the end of the N-type region Si close to the metal region 2 with sulfide ions, and then depositing the metal platinum (Pt) layer and Corresponding thermal annealing forms the metal region (PtSi). In the process of forming the metal region (PtSi), the metal platinum consumes the N-type region Si near one end of it during the reaction, and the remaining part of the N-type region Si is injected into the original N-type region Si. When Si reacts with metal Pt, the sulfide ions will accumulate at the interface between the generated metal region (PtSi) and the remaining N-type region Si, lowering the Schottky barrier Φ ₂ and adjusting the doping of sulfide ions. The amount can adjust the Schottky barrier Φ _2. For details, please refer to the above.

According to the embodiment of the third aspect of the present application, as shown in Figure 8, the present application also provides a Schottky transistor, which mainly includes: a drain region 4, a gate dielectric 5, a source electrode, a drain electrode, a gate electrode, and the above implementation Example of cold source semiconductor structure. Among them, the lightly doped N-type region 3 of the cold source semiconductor structure is the channel region; the channel region is arranged between the metal region 2 and the drain region 4 of the cold source semiconductor structure; the gate dielectric 5 is arranged above the channel region The source electrode is arranged on the heavily doped P-type region 1 of the cold source semiconductor structure; the drain electrode is arranged on the drain region 4; and the gate electrode is arranged on the gate dielectric 5.

The Schottky transistor in the embodiment of the present application can reduce the contact Schottky barrier and increase the on-state current through the cold source semiconductor structure of the above embodiment.

According to an embodiment of the present application, the heavily doped P-type region 1 of the cold source semiconductor structure has a doping concentration of 1e21cm ^-3 , a length of 20nm, and a thickness of 10nm. The specific value can be adjusted according to actual working conditions.

According to an embodiment of the present application, the work function of the metal region 2 of the cold source semiconductor structure is 5.0 eV, the length of the metal region 2 is 10 nm, and the thickness of the metal region 2 is 10 nm. Through this design, this application can reduce the original high PN junction barrier Φ ₀ in the PN structure of the heavily doped P-type region 1 and the lightly doped N-type region 3 to two relatively small Schottky barriers. Heights Φ ₁ and Φ ₂ , thereby being able to increase the injection current.

According to an embodiment of the present application, the lightly doped N-type region 3 (ie, the channel region) of the cold source semiconductor structure has a doping concentration of 1e15cm ^-3 , a length of 20nm, and a thickness of 10nm. The specific value can be adjusted according to actual working conditions.

According to an embodiment of the present application, the drain region 4 is an N-type heavily doped drain region, the material is silicon, the doping concentration is 1e19cm ^-3 , the length is 20nm, and the thickness is 10nm. The specific value can be adjusted according to actual working conditions.

According to an embodiment of the present application, the material of the gate dielectric 5 is hafnium oxide, and the thickness of the gate dielectric 5 is 1.5 nm. Moreover, the Schottky transistor of the present application can include two gates, and the two gates are respectively arranged on the two gate dielectrics 5. In this way, under the action of the double gates, the gate control capability is effectively improved, and the device can perform better. ground on and off.

In this example, the source is set at the left end of the heavily doped P-type region 1, and the drain is set at the right end of the drain region 4; the gate dielectric 5 is set at the upper and lower sides of the channel region, and the work function of the gate is 4.5eV.

According to an embodiment of the present application, the cold source semiconductor structure and the drain region 4 of the above embodiment are disposed on a substrate, and the material of the substrate may be silicon.

According to the embodiment of the fourth aspect of the present application, as shown in Figure 9, the present application also provides a diode, which mainly includes a substrate and the above-mentioned cold source semiconductor structure. The cold source semiconductor structure is disposed on the substrate. The material of the substrate Can be silicon.

The diode in the embodiment of the present application can reduce the Schottky barrier of the contact and increase the on-state current through the cold source semiconductor structure of the above embodiment.

According to an embodiment of the present application, the left end of the heavily doped P-type region 1 of the diode is connected to the anode 6, and the right end of the lightly doped N-type region 3 of the diode is connected to the cathode 7 to facilitate connection with an external circuit.

Therefore, this application uses PtSi as a metal in the cold source structure of the semiconductor-metal-semiconductor architecture, and dopes sulfide ions in the lightly doped N-type region, which can effectively reduce the Schottky barrier of the contact and improve the openness. In addition, the Schottky barrier height characteristics can be adjusted by adjusting the doping amount of sulfide ions, thereby improving the on-state current.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present application, but not to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that it can still be Modifications are made to the technical solutions described in the foregoing embodiments, or equivalent substitutions are made to some of the technical features; however, these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions in the embodiments of the present application.

Claims (10)

1. A cold source semiconductor structure, characterized by comprising: a heavily doped P-type region, a metal region and a lightly doped N-type region, the metal region being connected to the heavily doped P-type region and the lightly doped N-type region between N-type regions; and the metal region is platinum silicide, and one end of the lightly doped N-type region adjacent to the metal region is doped with sulfur ions.
2. The cold source semiconductor structure according to claim 1, wherein the doping amount of the sulfide ions is adjustable to adjust the height of the Schottky barrier in contact between the metal region and the lightly doped N-type region. , specifically including: the greater the doping amount of sulfide ions, the smaller the Schottky barrier height.
3. The cold source semiconductor structure according to claim 2, wherein the Schottky barrier height and the doping amount of sulfur ions satisfy a function:
   

   Wherein, H is the Schottky barrier height, the unit is eV; D is the doping amount of the sulfide ions, the unit is 1e13cm ^-2 .
4. The cold source semiconductor structure according to claim 1, wherein the height of the Schottky barrier in contact between the heavily doped P-type region and the metal region is 0.1 to 0.2 eV.
5. The cold source semiconductor structure according to claim 1, wherein the height of the Schottky barrier in contact between the metal region and the lightly doped N-type region is 0.1 to 0.2 eV.
6. The cold source semiconductor structure according to claim 1, wherein the substrate material of the heavily doped P-type region and the lightly doped N-type region is silicon.
7. A method for preparing a cold source semiconductor structure according to any one of claims 1 to 6, characterized in that it includes:

   Form a metallic platinum layer;

   Using a silicon substrate to form a heavily doped P-type region and depositing it on one side of the metal platinum layer;

   A silicon substrate is used to form a lightly doped N-type region, and sulfur ions are injected into one end of the lightly doped N-type region; one end of the lightly doped N-type region into which sulfur ions are implanted is deposited on the gold The side of the platinum layer facing away from the heavily doped P-type region;

   Perform thermal annealing.
8. A Schottky transistor is characterized by including:

   The cold source semiconductor structure according to any one of claims 1 to 6, wherein the lightly doped N-type region is a channel region;

   A drain region, the channel region is provided between the metal region and the drain region;

   Gate dielectric, disposed on the upper side and/or lower side of the channel region;

   A source electrode is provided in the heavily doped P-type region;

   A drain electrode is provided in the drain region;

   A gate electrode is provided on the gate electrode medium.
9. The Schottky transistor according to claim 8, wherein the work function of the metal region is 5.0 eV, the length of the metal region is 10 nm, and the thickness of the metal region is 10 nm;

   And/or, the gate dielectric is made of hafnium oxide, and the thickness of the gate dielectric is 1.5 nm.
10. A diode, characterized by comprising the heat source semiconductor structure according to any one of claims 1-6.