WO2023181246A1 - Dispositif d'intégration de puce d'élément électroluminescent à semi-conducteur et son procédé de production - Google Patents

Dispositif d'intégration de puce d'élément électroluminescent à semi-conducteur et son procédé de production Download PDF

Info

Publication number
WO2023181246A1
WO2023181246A1 PCT/JP2022/013902 JP2022013902W WO2023181246A1 WO 2023181246 A1 WO2023181246 A1 WO 2023181246A1 JP 2022013902 W JP2022013902 W JP 2022013902W WO 2023181246 A1 WO2023181246 A1 WO 2023181246A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrode
semiconductor light
chip
emitting element
light emitting
Prior art date
Application number
PCT/JP2022/013902
Other languages
English (en)
Japanese (ja)
Inventor
元伸 竹谷
Original Assignee
アルディーテック株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by アルディーテック株式会社 filed Critical アルディーテック株式会社
Priority to JP2024509569A priority Critical patent/JP7465612B2/ja
Priority to PCT/JP2022/013902 priority patent/WO2023181246A1/fr
Publication of WO2023181246A1 publication Critical patent/WO2023181246A1/fr

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor

Definitions

  • the present invention relates to a semiconductor light emitting element chip integration device and a method for manufacturing the same, and is suitable for application to, for example, a micro LED display in which a large number of miniaturized vertical (or vertical) micro light emitting diode (LED) chips are integrated on a substrate. It is something.
  • LCDs liquid crystal displays
  • OLEDs organic EL displays
  • Micro-LED displays are attracting attention as displays with high brightness and high efficiency (low power consumption) that far exceed LCDs and OLEDs.
  • Direct-emission micro LED displays are highly efficient, but in order to realize micro LED displays, it is necessary to arrange tens of millions of micro LED chips with sizes on the order of several micrometers to several tens of micrometers on a mounting board. .
  • Conventional methods for arranging a large number of micro LED chips on a mounting board include a method using a chip sorter, a method using a multi-chip transfer device (see Patent Documents 1 and 2), and a method using chip ejection by laser irradiation and liquid.
  • a method for arranging chips see Patent Document 3
  • a method for arranging elements (chips) using magnetic films see Patent Documents 4 and 5
  • the like have been proposed.
  • Patent Documents 1 to 5 it is difficult to realize a micro LED display at low cost.
  • Patent Documents 6 to 8 for example, ink in which micro LED chips whose p-side electrode is attracted to a magnetic field more strongly than the n-side electrode are dispersed in a liquid is applied to the chip bonding portion on the main surface of the substrate.
  • a micro LED display is manufactured by discharging and applying an external magnetic field from below the substrate to couple the p-side electrode side of the micro LED chip to the chip bonding part.
  • the problem to be solved by this invention is not only to be able to manufacture various semiconductor light emitting element chip integrated devices including micro LED displays at low cost, but also to be able to manufacture semiconductor light emitting element chips such as micro LED chips on a substrate. If a defective semiconductor light emitting element chip is found through inspection after being mounted on a semiconductor light emitting element chip, it can be easily repaired, and the number of wasted semiconductor light emitting element chips can be significantly reduced.
  • An object of the present invention is to provide an element chip integrated device and a method for manufacturing the same.
  • a vertical semiconductor light emitting device chip an upper main line electrode in the upper layer of the semiconductor light emitting element chip; and a plurality of upper branch line electrodes that branch from the upper main line electrode and straddle the chip coupling part so as to intersect with the plurality of lower branch line electrodes; and an upper electrode having
  • the semiconductor light emitting element chip has one of the p-side electrode and the n-side electrode facing the chip-coupling section and coupled to the chip-coupling section, and one of the p-side electrode and the n-side electrode. one of which is electrically connected to the lower branch line electrode, and the other of the p-side electrode and the n-side electrode and the upper branch electrode of the upper electrode are electrically connected to each other.
  • This is a light emitting element chip integrated device.
  • the substrate typically has a plurality of circuit units that can be driven independently of each other, and a lower electrode and an upper electrode are provided for each of the plurality of circuit units.
  • one pixel is typically configured by a region including three or more mutually adjacent circuit units.
  • the area of one pixel is selected as necessary.
  • the area of one pixel is typically selected to be approximately 500 ⁇ m ⁇ 500 ⁇ m, but may be larger or smaller than 500 ⁇ m ⁇ 500 ⁇ m.
  • three or more circuit units can emit light in three colors, red, green, and blue.
  • One of the p-side electrode and n-side electrode of the semiconductor light emitting element chip typically contains a soft magnetic material.
  • a soft magnetic material is a material that has a low coercive force and a high magnetic permeability, and is strongly magnetized under the influence of a magnetic field, but has the property of having no magnetic force in the absence of a magnetic field.
  • Examples of soft magnetic materials include nickel (Ni), iron (Fe), cobalt (Co), permalloy (Fe-78.5Ni alloy), supermalloy (Fe-79Ni-5Mo alloy), but are not limited to these. It is not something that will be done.
  • the semiconductor light emitting element may be a laser diode (LD) (particularly a vertical cavity surface emitting laser (VCSEL)), an organic EL element, or the like.
  • the semiconductor light emitting device may be an AlGaInN semiconductor light emitting device or an AlGaInP semiconductor light emitting device, but is not limited thereto.
  • AlGaInN-based semiconductor light-emitting devices are used to emit light in the blue-violet, blue to green wavelength range (wavelengths of 390 nm to 550 nm), and AlGaInP-based semiconductor light-emitting devices are used to emit light in the red wavelength range (wavelengths of 600 nm to 650 nm). Used when obtaining.
  • an AlGaInN semiconductor light emitting device and a phosphor may be combined.
  • the chip size of the semiconductor light emitting device chip is selected according to need, but is generally selected to be 20 ⁇ m x 20 ⁇ m or less, typically 10 ⁇ m x 10 ⁇ m or less, most typically 5 ⁇ m x 5 ⁇ m or less, and generally is 0.1 ⁇ m (100 nm) ⁇ 0.1 ⁇ m (100 nm) or more, or 0.5 ⁇ m (500 nm) ⁇ 0.5 ⁇ m (500 nm) or more. Further, the thickness of the semiconductor light emitting element chip is also selected as required, but is generally 10 ⁇ m or less, preferably 5 ⁇ m or less.
  • the semiconductor light emitting device chip is preferably obtained by separating the substrate from the semiconductor layer after crystal growth of the semiconductor layer constituting the semiconductor light emitting device on the substrate, and preferably has a thickness of, for example, 10 ⁇ m or less. .
  • the semiconductor light emitting device chip preferably has rotational symmetry about an axis perpendicular to the chip surface, and is, for example, circular, square, regular hexagonal, regular octagonal, etc. In this case, the semiconductor light emitting device chip as a whole has a rotational symmetry with respect to an axis perpendicular to the chip surface. Examples include a cylinder, a regular square prism, a regular hexagonal prism, a regular octagonal prism, etc., but are not limited to these.
  • the semiconductor light emitting element chip when the semiconductor light emitting element chip has a cylindrical shape, the semiconductor light emitting element chip preferably has a diameter of 10 ⁇ m or less and a thickness of 10 ⁇ m or less.
  • the number of p-side electrodes and n-side electrodes of a semiconductor light emitting element chip is typically one each, and the electrode size is equal to or smaller than the chip size, but which one of the p-side electrode and n-side electrode One or both of the electrodes may be formed of a plurality of electrodes having a size smaller than the chip size.
  • the semiconductor light emitting element chip is an AlGaInN-based or AlGaInP-based semiconductor light-emitting element chip
  • the maximum width of the light emitting layer of the semiconductor light-emitting element chip is 5 ⁇ m or less
  • the surroundings of this light-emitting layer are covered with an AlGaInN-based semiconductor layer that has a larger band gap and higher specific resistance than this light-emitting layer. It is covered with an AlGaInP-based semiconductor layer with a large gap and high specific resistance.
  • These semiconductor layers may be p-type, non-doped, or n-type.
  • the light emitting layer may be surrounded by a p-type semiconductor layer, and an n-type semiconductor layer, or an n-type semiconductor layer and a p-type semiconductor layer may be laminated thereon to form a covering layer.
  • the n-type semiconductor layer of the covering layer serves as a current blocking layer and reduces leakage current flowing through the covering layer.
  • it may be doped with a transition metal such as Fe that forms a deep level in the band gap of the semiconductor. Sidewall interfaces created by etching or the like have a high rate of non-radiative recombination.
  • Covering with a semiconductor layer having a large bandgap can be expected to have an effect of confining carriers in the light emitting layer in the horizontal direction. Furthermore, the effect of reducing defects on the sidewalls of the light-emitting layer can be expected due to semiconductor crystal growth at high temperatures during coating. Further, since the light-emitting layer portion is substantially n-type when covered with a p-type semiconductor layer, a depletion layer is formed at the interface of the sidewall and the resistance becomes high, thereby significantly reducing the probability that carriers will move to the sidewall.
  • AlGaInN-based or AlGaInP-based semiconductor light-emitting element chip By configuring the AlGaInN-based or AlGaInP-based semiconductor light-emitting element chip in this manner, high light-emitting efficiency can be obtained even in a fine semiconductor light-emitting element chip whose maximum width of the light-emitting layer is 5 ⁇ m or less.
  • the substrate (or mounting substrate) is not particularly limited, and includes, for example, a Si substrate, a glass substrate, a glass epoxy substrate, a resin film, a printed circuit board, and the like.
  • the substrate may be rigid or flexible, and may be transparent, translucent, or opaque, and may be selected as appropriate.
  • the width of the plurality of lower branch line electrodes constituting the lower electrode, the width of the gap between the lower branch line electrodes, etc. are selected as necessary.
  • the width of each lower branch line electrode is 5 to 100 ⁇ m
  • the width of the gap between the branch electrodes is 1 to 5 ⁇ m.
  • the number of lower branch line electrodes will be described later.
  • these plurality of lower branch electrodes are provided in parallel to each other.
  • the upper surface of each lower branch electrode constitutes a tip coupling section. This chip bonding portion is a region where semiconductor light emitting device chips are bonded.
  • At least one semiconductor light emitting element chip is coupled to the chip coupling part of at least one lower branch line part electrode of the plurality of lower branch line part electrodes, but a chip coupling part to which not a single semiconductor light emitting element chip is coupled. may also be included.
  • the semiconductor light emitting element chip may be bonded to any position in the chip bonding portion, but if the bonding position is desired to be determined in advance, a ferromagnetic region is provided in the area of the chip bonding portion. By doing so, one of the p-side electrode and the n-side electrode of the semiconductor light emitting element chip is attracted toward this ferromagnetic region by magnetic force, and is easily coupled to the ferromagnetic region.
  • ferromagnetic regions are formed at the desired bonding positions. These ferromagnetic regions may be provided between the substrate and the lower branch electrode, or may be provided on the chip coupling portion.
  • the area of the ferromagnetic region is typically selected to be less than or equal to the area of one of the p-side electrode and n-side electrode of the semiconductor light emitting element chip.
  • the shape of the ferromagnetic region is typically selected to be similar to the shape of one of the p-side electrode and n-side electrode of the semiconductor light emitting element chip, but is not limited thereto.
  • the ferromagnetic region typically consists of a soft magnetic material or a hard magnetic material.
  • Hard magnetic materials have a property of having coercive force even when a magnetic field is removed, and are used as permanent magnets. Examples of hard magnetic materials include neodymium iron boron (Nd-Fe-B) magnets, cobalt platinum (Co-Pt) magnets (Co-Pt magnets, Co-Cr-Pt magnets, etc.), and samarium cobalt (Sm-Co). magnets, samarium iron nitrogen (Sm-Fe-N) magnets, ferrite magnets, alnico magnets, etc., but are not limited thereto.
  • the width of the plurality of upper branch line part electrodes constituting the upper layer of the upper layer of the semiconductor light emitting element chip, the width of the gap between the lower branch line part electrodes, etc., are determined as necessary in the same way as the plurality of lower branch line part electrodes constituting the lower electrode.
  • the width of each upper branch line electrode is 5 to 100 ⁇ m, and the width of the gap between the upper branch line electrodes is 1 to 5 ⁇ m.
  • the number of upper branch line electrodes will be described later.
  • these upper branch line electrodes are provided parallel to each other, and these upper branch line part electrodes are provided at right angles to the lower branch line electrodes, but are not limited thereto.
  • the number of the plurality of lower branch line electrodes forming the lower electrode is L (L ⁇ 4) and the number of the plurality of upper branch line electrodes forming the upper electrode is U (U ⁇ 4)
  • L L
  • U U
  • L ⁇ U ⁇ 16 the number of circuit units included in a semiconductor light emitting device chip integrated device
  • the number of chips used in one circuit unit must be It is necessary to create a design in which the number of defective chips is set at around 5 and the circuit unit can be utilized by repair even if the number of defective chips is 3.
  • both the numbers L and U are 3 or less, there is a possibility that all the lower branch line electrodes in one circuit unit include one or more defective semiconductor light emitting element chips. In that case, repair by cutting the lower branch electrode becomes difficult. Therefore, in order to ensure the yield, it is desirable that the number of either the lower branch line electrode or the upper branch line electrode be four or more. Furthermore, it is more likely that good chips can be utilized by cutting the lower branch line electrode and the upper branch line electrode, whichever is larger in number. Therefore, in order to increase the probability of using good chips, it is preferable that the number of both the lower branch line part electrode and the upper branch line part electrode be 4 or more. If the number of chips used in one circuit unit is larger than necessary, the proportion of defective chips will increase.
  • At least a portion of the lower branch electrode and/or at least a portion of the upper branch electrode may be composed of a low melting point metal having a melting point of 350° C. or lower, typically 150° C. or higher; A part can be used as a fuse. That is, when the lower branch line electrode or the upper branch line electrode is energized, the portion made of the low melting point metal is selectively melted due to heat generation, thereby cutting the lower branch line electrode or the upper branch line electrode.
  • Such metals include In, Sn, etc. as single metals, and InSn, InSnAg, AgSn, AgSn, etc. as alloys (eutectic alloys), but are not limited thereto.
  • the entire lower branch line electrode or upper branch line electrode is made of a material with a high melting point, it can be cut by irradiating a portion of the lower branch line electrode or upper branch line electrode made of that material with a laser beam or electron beam. can do.
  • the cut point may be at any position on the lower branch line electrode or the upper branch line electrode, as long as no other problems occur, and any position can serve as a fuse.
  • the semiconductor light emitting element chip integrated device has a p-side electrode and an n-side electrode on the upper and lower sides, and one of the p-side electrode and the n-side electrode is connected to the other.
  • the device further includes a vertical Zener diode that is configured to be more strongly attracted to the magnetic field, and the Zener diode is connected so as to be reverse biased with respect to the semiconductor light emitting element chip. By connecting this Zener diode so that a reverse bias is applied between the lower electrode and the upper electrode, even if a surge voltage etc.
  • Zener diode Since the current can escape through the semiconductor light emitting element chip, electrostatic discharge damage (ESD) of the semiconductor light emitting element chip can be effectively prevented.
  • ESD electrostatic discharge damage
  • the mixing ratio of Zener diodes is one-tenth or less of the semiconductor light emitting element chip.
  • the semiconductor light emitting element chip integrated device may be of any type, and is designed as appropriate depending on the type of semiconductor light emitting element chip.
  • the semiconductor light emitting element chip integrated device may be one in which not only one type of semiconductor light emitting element chips are integrated, but also one in which two or more types of semiconductor light emitting element chips are integrated, or one in which a phosphor is combined.
  • Examples of the semiconductor light emitting element chip integrated device include, but are not limited to, a light emitting diode lighting device, a light emitting diode backlight, a light emitting diode display, and the like.
  • the size, planar shape, etc. of the semiconductor light emitting element chip integrated device are appropriately selected depending on the application of the semiconductor light emitting element chip integrated device, the functions required of the semiconductor light emitting element chip integrated device, and the like.
  • this invention applying a magnetic field to the soft magnetic region of the substrate provided with the soft magnetic region in the chip coupling portion to magnetize the soft magnetic region; After the magnetic field is removed and before the residual magnetic flux of the soft magnetic region disappears, the soft magnetic region has a p-side electrode and an n-side electrode above and below, and one of the p-side electrode and the n-side electrode is compared to the other.
  • a droplet-shaped ink containing a liquid and a plurality of vertical semiconductor light emitting element chips configured to be more strongly attracted by a magnetic field is supplied to the chip coupling portion, and the semiconductor light emitting element chips in the ink are
  • a method for manufacturing a semiconductor light emitting element chip integrated device comprising: coupling one of the p-side electrode and the n-side electrode toward the soft magnetic region and onto the soft magnetic region.
  • the liquid contained in the ink containing the semiconductor light emitting element chip is not particularly limited as long as it can disperse the semiconductor light emitting element chip used, and may be a polar solvent or a nonpolar solvent, and may be used as necessary.
  • the polar solvent may be a polar aprotic solvent or a protic solvent.
  • this liquid may be water or a non-aqueous solvent (including a mixture of two or more solvents excluding water, a mixture of water and two or more solvents excluding water), and a non-aqueous solvent.
  • the solvent may be an inert solvent or an active solvent.
  • the concentration of semiconductor light emitting device chips in the ink is selected as necessary, but typically, semiconductor light emitting device chips are dispersed in the liquid so that 10 to 10,000 semiconductor light emitting device chips exist in a volume of 100 picoliters. .
  • the volume fraction of semiconductor light emitting element chips in the ink is selected as required, but is typically 30% or less.
  • the viscosity of the ink is selected as required, and is, for example, in the range of 0.001 to 100 Pa ⁇ s.
  • the method of supplying ink to the chip bonding portion of the substrate is not particularly limited and may be selected as necessary.
  • the form of the droplet-shaped ink supplied to the chip joint varies depending on the wettability of the ink to the chip joint, and can take various forms, from spherical droplets with a large curvature to flat droplets with a small curvature. .
  • ink is ejected from the tip of the nozzle onto the tip joint.
  • the inkjet printing method is used to eject ink from the tip of the nozzle to the chip joint portion.
  • the amount of ink to be ejected may be an amount that includes a plurality of semiconductor light emitting device chips (for example, 2 to 100, or more in some cases) per one chip joint, and is typically 10 picoliters. These are the above, but they are selected according to need.
  • the liquid component of the ink supplied to the chip bonding portion of the substrate is removed by forced drying by heating or by natural drying.
  • the semiconductor light emitting element chip contained in the supplied ink is brought into contact with the chip bonding portion with one of the p-side electrode and the n-side electrode directed toward the chip bonding portion, by a method described later.
  • a droplet contains multiple semiconductor light emitting device chips, and by making the number flexible, it improves the applicability of inkjet printing methods, etc., and furthermore, the area of the chip bonding part can be reduced to the size of the semiconductor light emitting device chip.
  • the manufacturing process is dramatically simplified by setting the size larger than the area and giving a considerable degree of freedom in the bonding position between multiple semiconductor light emitting device chips and the chip bonding part, eliminating the complexity of controlling the chip bonding position. can be done.
  • the chip bonding area is a limited area that occupies a small proportion of the substrate, the multiple semiconductor light emitting device chips remain within the spread range of the ejected droplets and are not scattered over the entire substrate. , it is possible to efficiently couple with the chip coupling part.
  • This method for manufacturing a semiconductor light emitting element chip integrated device is suitable for application to manufacturing the above-mentioned semiconductor light emitting element chip integrated device.
  • the lower electrode has a lower trunk electrode and a plurality of lower branch electrodes branched from the lower trunk electrode, and the upper electrode branches from the upper trunk electrode and the upper trunk electrode, A semiconductor light-emitting element chip to which any of the upper branch electrodes was connected was defective due to the plurality of upper branch line electrodes spanning the chip coupling part so as to intersect with the plurality of lower branch line electrodes.
  • repair can be carried out by cutting only the upper branch line electrode or the lower branch line electrode where this semiconductor light emitting element chip is connected to the chip coupling part, so the semiconductor light emitting element chip is only wasted. The number of wasted semiconductor light emitting device chips can be significantly reduced.
  • the vertical By supplying a droplet-shaped ink containing a plurality of semiconductor light emitting device chips and a liquid to the chip bonding part, the semiconductor light emitting device chips in the ink are connected to the p-side electrode and the n-side electrode due to the effect of residual magnetic flux. Since one of the electrodes can be reliably coupled to the soft magnetic region, a semiconductor light emitting element chip integrated device can be easily manufactured.
  • FIG. 2 is a plan view showing an example of a vertical micro LED chip used in the micro LED chip integration device according to the first embodiment of the present invention.
  • FIG. 1 is a vertical cross-sectional view showing an example of a vertical micro LED chip used in the micro LED chip integration device according to the first embodiment of the present invention.
  • FIG. 2 is a schematic diagram showing ink used in manufacturing the micro LED chip integrated device according to the first embodiment of the present invention.
  • 1 is a schematic diagram showing an ink ejection device used for manufacturing a micro LED chip integrated device according to a first embodiment of the present invention.
  • FIG. 1 is a plan view showing a mounting board used for manufacturing a micro LED chip integrated device according to a first embodiment of the present invention.
  • FIG. 1 is a cross-sectional view showing a mounting board used for manufacturing a micro LED chip integrated device according to a first embodiment of the present invention.
  • 1 is a plan view for explaining a method of manufacturing a micro LED chip integrated device according to a first embodiment of the present invention
  • FIG. FIG. 1 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a first embodiment of the present invention.
  • 1 is a plan view for explaining a method of manufacturing a micro LED chip integrated device according to a first embodiment of the present invention
  • FIG. FIG. 1 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a first embodiment of the present invention.
  • FIG. 1 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a first embodiment of the present invention.
  • 1 is a plan view for explaining a method of manufacturing a micro LED chip integrated device according to a first embodiment of the present invention;
  • FIG. 1 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a first embodiment of the present invention.
  • FIG. 3 is a plan view for explaining a method for repairing a micro LED chip integrated device manufactured by the method for manufacturing a micro LED chip integrated device according to the first embodiment of the present invention.
  • FIG. 1 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a first embodiment of the present invention.
  • 1 is a plan view for explaining a method of manufacturing a micro LED chip integrated device according to a first embodiment of the present invention.
  • FIG. 1 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according
  • FIG. 3 is a cross-sectional view for explaining a method for repairing a micro LED chip integrated device manufactured by the method for manufacturing a micro LED chip integrated device according to the first embodiment of the present invention.
  • FIG. 3 is a plan view for explaining a method for repairing a micro LED chip integrated device manufactured by the method for manufacturing a micro LED chip integrated device according to the first embodiment of the present invention.
  • FIG. 3 is a cross-sectional view for explaining a method for repairing a micro LED chip integrated device manufactured by the method for manufacturing a micro LED chip integrated device according to the first embodiment of the present invention.
  • FIG. 7 is a plan view for explaining a method of manufacturing a micro LED chip integrated device according to a second embodiment of the present invention.
  • FIG. 7 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a second embodiment of the present invention.
  • FIG. 7 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a second embodiment of the present invention.
  • FIG. 7 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a second embodiment of the present invention.
  • FIG. 7 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a second embodiment of the present invention.
  • FIG. 7 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a second embodiment of the present invention.
  • FIG. 7 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a second embodiment of the present invention.
  • FIG. 7 is a cross-sectional view for explaining a method of manufacturing a micro LED chip integrated device according to a second embodiment of the present invention.
  • FIG. 7 is a plan view for explaining a method of manufacturing a micro LED chip integrated device according to a second embodiment of the present invention.
  • FIG. 7 is a plan view for explaining a method of manufacturing a micro LED chip integrated device according to a second embodiment of the present invention.
  • FIG. 7 is a plan view for explaining a method of manufacturing a micro LED chip integrated device according to a third embodiment of the present invention.
  • FIG. 7 is a plan view for explaining a method of manufacturing a micro LED chip integrated device according to a third embodiment of the present invention.
  • the micro LED chip integrated device is manufactured by mounting a large number of vertical micro LED chips on a mounting board.
  • a vertical micro LED chip configured such that the side electrode is attracted to a magnetic field more strongly than the p-side electrode, an ink containing this vertical micro LED chip, an ink ejection device used for ejecting this ink, and a mounting board explain.
  • FIGS. 1A and 1B An example of this vertical micro LED chip is shown in FIGS. 1A and 1B.
  • FIG. 1A is a plan view
  • FIG. 1B is a longitudinal cross-sectional view.
  • This vertical micro LED chip 40 has a cylindrical shape as a whole.
  • this vertical micro LED chip 40 includes an n-type GaN layer 41, an In x Ga 1-x N layer as a barrier layer, and an In y Ga 1-y N layer as a well layer.
  • a light emitting device having an In x Ga 1-x N/In y Ga 1-y N multiple quantum well (MQW) structure (x ⁇ y, 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1) in which layers are stacked alternately.
  • a layer 42 and a p-type GaN layer 43 are sequentially laminated. These n-type GaN layer 41, light-emitting layer 42, and p-type GaN layer 43 are each circular.
  • the diameter of the upper part of the n-type GaN layer 41 is smaller than the diameter of the lower part.
  • the diameters of the light emitting layer 42 and the p-type GaN layer 43 are the same as the diameter of the upper part of the n-type GaN layer 41.
  • the diameters of the upper part of the n-type GaN layer 41, the light-emitting layer 42, and the p-type GaN layer 43 are 5 ⁇ m or less.
  • a p-type or non-doped GaN layer 44 having a high specific resistance is provided so as to cover the upper part of the n-type GaN layer 41 and the outer periphery of the light-emitting layer 42 and the p-type GaN layer 43.
  • the diameter of the outer peripheral surface of the GaN layer 44 is the same as the diameter of the lower part of the n-type GaN layer 41.
  • a p-side electrode 45 made of ITO is formed on the p-type GaN layer 43, and an n-side electrode 46 is formed on the n-type GaN layer 41.
  • the p-side electrode 45 is circular, and is formed on the entire surface of the p-type GaN layer 43 as an example here.
  • the n-side electrode 46 is provided over the entire surface of the n-type GaN layer 41.
  • the n-side electrode 46 contains Ni as a soft magnetic material, and is made of, for example, a multilayer film such as a Ti/Al/Ti/Ni/Ti/Au film.
  • a Sn film 47 as a low melting point metal is provided on the n-side electrode 46.
  • the thickness of the Sn film 47 is, for example, 0.5 ⁇ m.
  • the total thickness of the n-type GaN layer 41, the light emitting layer 42, and the p-type GaN layer 43 is, for example, 1 to 3 ⁇ m.
  • the In composition ratios x and y of the In x Ga 1-x N/In y Ga 1-y N MQW structure constituting the light emitting layer 42 are selected according to the emission wavelength of the vertical micro
  • This vertical micro LED chip 40 can be easily manufactured by a conventionally known method.
  • ink 200 is prepared by dispersing vertical micro LED chips 40 in liquid 50 in container 100.
  • the ink 200 contains a filler, a surfactant, and the like in addition to the vertical micro LED chip 40 as necessary.
  • the size of the vertical micro LED chip 40 is small as described above, the dispersibility in the ink 200 is sufficiently high, and the ink can be easily ejected from the ejection nozzle of the ink ejection device.
  • FIG. 3 shows an ink discharge device 300.
  • the ink ejection device 300 has an inkjet print head 301.
  • the inkjet print head 301 has an ink chamber 302 inside and an ink supply section 303 at the top.
  • the inside of the inkjet print head 301 further includes a flow path 305 that connects the upper side of the ink chamber 302 and a tube section 303a provided at the bottom of the ink supply section 303, and a flow path connected to the lower side of the ink chamber 302. 306.
  • a control valve 307 is provided in the middle of the pipe section 303a of the ink supply section 303.
  • a discharge nozzle 308 is provided below the ink chamber 302 .
  • the diameter of the discharge nozzle 308 is selected as required, and is, for example, 10 to 50 ⁇ m.
  • a piezo actuator 309 is provided above the ink chamber 302 and has a structure in which a piezoelectric body is sandwiched between a pair of electrodes.
  • the flow path 306 has a function of discharging the ink 200 in the ink chamber 302 to the outside, returning the ink to the ink supply section 303 and circulating it to prevent clogging of the ejection nozzle 308, and having a function of stirring the ink 200. It is for the purpose of
  • ink 200 is supplied to the ink supply section 303 with the control valve 307 open.
  • the ink 200 thus supplied to the ink supply section 303 is supplied to the ink chamber 302 through the pipe section 303a and the flow path 305.
  • Ink 200 is supplied until channel 305, ink chamber 302, and channel 306 are filled, and then control valve 307 is closed.
  • This ink ejection device 300 further includes a magnetic field application device 311 at a position slightly shifted from the ejection nozzle 308 of this ink ejection device 300 in the horizontal direction.
  • a mounting board 400 which will be described later and which discharges ink 200, is configured to move horizontally at a height between an inkjet print head 301 and a magnetic field application device 311.
  • FIGS. 4A and 4B show a mounting board 400 used for manufacturing this micro LED chip integrated device.
  • FIG. 4A is a plan view
  • FIG. 4B is a sectional view crossing the lower branch electrode and the lower trunk electrode in the vicinity thereof.
  • a lower electrode 420 is provided on one main surface of the substrate 410.
  • a region corresponding to one circuit unit that can be electrically controlled on/off is indicated by a chain line.
  • the lower electrode 420 includes a wide lower trunk electrode 4201 extending in one direction, and a lower trunk electrode 4201 branching from the lower trunk electrode 4201 in a direction perpendicular to the lower trunk electrode 4201.
  • the substrate 410 may be rigid or flexible, and may be transparent or opaque, depending on the needs.
  • the substrate 410 may be, for example, a Si substrate, a glass substrate, a glass epoxy substrate, or a resin film.
  • the lower electrode 420 can be formed, for example, by forming a nonmagnetic metal film on the entire surface of the substrate 410 by sputtering or vacuum evaporation, and then patterning this metal film into a predetermined shape by lithography and etching.
  • a nonmagnetic metal for example, a Ti/Al/Ti/Au/Ti laminated film is used, but a Cu (or Cu alloy)/Au/Ti laminated film may also be used.
  • the thicknesses of the films constituting the Ti/Al/Ti/Au/Ti stacked film are, for example, 5 to 10 nm, 300 to 1000 nm, 50 nm, 5 to 100 nm, and 50 nm from the bottom.
  • the upper surface of the lower branch electrode 4203 constitutes a chip coupling portion 421 .
  • the width, spacing, etc. of the lower branch line electrode 4203 are selected as necessary.
  • the mounting board 400 is placed horizontally below the ejection nozzle 308 of the ink ejection device 300.
  • the ink ejection device 300 is fixed, and the mounting board 400 is moved in the direction shown by the arrow in FIG. 3 within a horizontal plane by a transport mechanism (not shown).
  • the piezo actuator 309 By operating the piezo actuator 309, the ink 200 is ejected from the ejection nozzle 308 onto the chip bonding portion 421 of the mounting board 400.
  • One drop of ink 200 ejected in this way covers a region including all the lower branch electrodes 4203 in one circuit unit, and includes a sufficient number of vertical micro LED chips 40.
  • the number of vertical micro LED chips 40 included in one drop of ink 200 can be adjusted by the concentration of vertical micro LED chips 40 in ink 200, the number of times the ink 200 is ejected, and the like.
  • An example of the ink 200 in this state is shown in FIGS. 5A and 5B.
  • FIG. 5A is a plan view
  • FIG. 5B is a sectional view.
  • the volume of one drop of ink 200 is, for example, 1 to 10 picoliters.
  • the volume of the vertical micro LED chip 40 is generally 0.001 to 0.5 picoliters. For example, if the vertical micro LED chip 40 has a circular shape with a diameter of 1 ⁇ m and a thickness of 3 ⁇ m, the volume is approximately 0.0024 picoliters.
  • the mounting board 400 is moved a predetermined distance by a transport mechanism (not shown), and the chip coupling part 421 on which the ink 200 has been ejected is positioned above the magnetic field application device 311.
  • the magnetic field applying device 311 By applying a magnetic field using the magnetic field applying device 311, the Ni film included in the n-side electrode 46 of the plurality of vertical micro LED chips 40 included in the ink 200 is magnetized. Therefore, each vertical micro LED chip 40 is drawn downward in the ink 200 by the magnetic force, and finally each vertical micro LED chip 40 comes into contact with the chip coupling part 421 with the n-side electrode 46 side facing down. do.
  • the magnetic field is preferably applied by the magnetic field applying device 310 before ejecting the ink 200. Alternatively, it is performed at the time of ejection or before the liquid of the ink 200 evaporates from that time.
  • each vertical micro LED chip 40 is kept in contact with the chip coupling part 421 by magnetic force, the solvent of the ink 200 is evaporated by heating with a lamp or the like, and then heating is performed with a lamp, laser, or the like.
  • the Sn film 47 of each vertical micro LED chip 40 is melted. Thereafter, as the molten Sn cools, the n-side electrode 46 of each vertical micro LED chip 40 is electrically and mechanically coupled to the chip coupling portion 421 of the lower branch electrode 4203.
  • FIGS. 6A and 6B An example of this state is shown in FIGS. 6A and 6B.
  • FIG. 6A is a plan view
  • FIG. 6B is a sectional view.
  • the vertical micro LED chips 40 are randomly arranged in the chip coupling part 421.
  • the chip coupling part 421 may include one in which not a single vertical micro LED chip 40 is coupled, and such an example is shown in FIG. 6A.
  • an insulating film 422 is formed on the entire surface of the mounting board 400 on which the vertical micro LED chip 40 is coupled to the chip coupling part 421 so that the surface is almost flat.
  • the p-side electrode 45 (not shown) is exposed by etching using reactive ion etching (RIE) or the like.
  • a layer is placed on the insulating film 422 so as to extend in a direction perpendicular to all the lower branch electrodes 4203 in each circuit unit, and to cover all the lower branch electrodes 4203 in each circuit unit.
  • a plurality of elongated transparent electrodes 435 in the form of strips are formed so as to straddle the area.
  • the gap between these transparent electrodes 435 is made smaller than the diameter of the p-side electrode 45 of the vertical micro LED chip 40. By doing so, the p-side electrode 45 of the vertical micro LED chip 40 coupled to the chip coupling portion 421 can come into contact with any of the transparent electrodes 435.
  • the transparent electrode 435 is made of a transparent electrode material such as ITO.
  • the upper electrode 430 includes a plurality of upper trunk electrodes 431 extending parallel to each other in a direction orthogonal to the lower trunk electrode 4201 and a plurality of upper trunk electrodes 431 extending from each upper trunk electrode 431 to each circuit in a direction orthogonal to the upper trunk electrode 431. It consists of an upper branch electrode 432 extending one per unit. Each upper branch line electrode 432 is branched into a plurality of branches so as to extend in a direction parallel to each upper trunk line electrode 431 and, therefore, in a direction perpendicular to the lower branch line part electrode 4203, and their tips are connected to a transparent electrode 435. ing.
  • the transparent electrode 435 constitutes a part of the upper branch line portion electrode 432.
  • the micro LED chip integrated device manufactured as described above is inspected. Specifically, a current conduction test is performed between the upper electrode 430 and the lower electrode 420. That is, by applying a voltage so that the upper electrode 430 has a higher potential than the lower electrode 420, a current of, for example, about 1 ⁇ A is caused to flow through each vertical micro LED chip 40, and the light emission of each vertical micro LED chip 40 is image-analyzed. Then, the transparent electrode 435 and the upper branch line electrode 432 to which the vertical micro LED chip 40 with a defective light amount due to a leakage defect is connected are identified. In FIG. 9, the upper branch line portion electrodes 432 identified in this manner are indicated by reference numerals 432A and 432B.
  • FIG. 10 shows the state of the upper branch line electrodes 432A and 432B after cutting.
  • all of the vertical micro LED chips 40 connected to the transparent electrodes 435 to which the cut upper branch line electrodes 432A and 432B are connected become unusable, but the other upper branch line electrodes 432 are connected. All vertical micro LED chips 40 connected to transparent electrodes 435 can be used.
  • the upper branch line electrode 432 is cut near the defective chip so as to be close to the upper main line electrode 431.
  • the good chips on the side can be used without being sacrificed.
  • a current of, for example, about 1 ⁇ A is caused to flow between the upper electrode 430 and the lower electrode 420, and the light emission from each vertical micro LED chip 40 is image-analyzed. As a result, if no vertical micro LED chip 40 with a defective light amount is found, the repair ends. In this way, the micro LED chip integrated device can be repaired.
  • this micro LED chip integrated device has lower trunk electrodes 4201 and 4202 on one main surface and a plurality of lower trunk electrodes 4202 branched from the lower trunk electrode 4202. a substrate 410 having a lower electrode 420 having a lower branch line electrode 4203; a chip coupling part 421 configured by the upper surface of the lower branch line part electrode 4203 of the lower electrode 420; A vertical micro LED chip 40 has a side electrode 45 and an n-side electrode 46, and is configured such that the n-side electrode 46 is attracted to a magnetic field more strongly than the p-side electrode 45; An upper main line electrode 431 of the upper layer branches from the upper main line electrode 431 and extends in a direction perpendicular to the plurality of lower branch line electrodes 4203, and a transparent electrode 435 connects to the tip coupling part 421 of the lower branch line electrode 4203.
  • the vertical micro LED chip 40 is coupled to the chip coupling part 421 with the n-side electrode 46 facing the chip coupling part 421, and the n-side electrode 46 and the lower branch electrode 4203 are electrically connected to each other.
  • the p-side electrode 45 and the upper branch electrode 432 of the upper electrode 430 are electrically connected to each other.
  • the n-side electrode 46 of the vertical micro-LED chip 40 is The electrode 46 side is configured to be attracted to the magnetic field more strongly than the p-side electrode 45 side, and ink 200 is ejected to the chip coupling part 421 of the lower branch electrode 4203 in one circuit unit, and the vertical micro LED chip
  • the vertical micro LED chip 40 and the chip coupling part 421 are electrically and mechanically coupled by attracting the n-side electrode 46 side of the chip 40 by magnetic force and bringing it into contact with the chip coupling part 421, and then melting and solidifying the Sn film 47.
  • a micro LED chip integrated device such as a micro LED display, a micro LED backlight, a micro LED lighting device, etc. can be easily realized at low cost, regardless of the degree of integration of the vertical micro LED chips 40.
  • a micro LED chip integrated device such as a micro LED display, a micro LED backlight, a micro LED lighting device, etc.
  • it is sufficient to couple the vertical micro LED chips 40 in a random arrangement on the chip coupling part 421 there is no need for highly accurate position control of the vertical micro LED chips 40, and the manufacturing of the micro LED chip integrated device is simplified. It becomes easier.
  • the vertical micro LED chip 40 to which any of the upper branch line electrodes 432 is connected If there is a defect in the LED, it can be easily repaired by simply cutting the upper branch electrode 432 or by cutting only the lower branch electrode 4203 where the vertical micro LED chip 40 is connected to the chip coupling part 421. can be done. Therefore, the number of wasted vertical micro LED chips 40 due to repair can be kept to a minimum, and the number of wasted vertical micro LED chips 40 can be significantly reduced.
  • this micro LED chip integrated device constitutes an RGB-1 pixel using the three circuit units shown in FIGS.
  • the upper electrode main line portion 431 constitutes column electrode wiring.
  • red and green phosphors are formed above the red and green light emitting regions, respectively.
  • blue, red, and green phosphors are formed above the blue, red, and green light-emitting regions, respectively.
  • a transparent substrate made of a flexible film or the like is provided thereon, and a light-diffusing layer is further placed on top of it. Provide a diffusion sheet.
  • the second embodiment differs from the first embodiment in that the mounting board 400 shown in FIGS. 11A and 11B is used instead of the mounting board 400 shown in FIGS. 4A and 4B. That is, as shown in FIGS. 11A and 11B, in this mounting board 400, a circular soft magnetic material 500 such as Ni is placed on the substrate 410 in a portion below the chip coupling part 421 of the lower branch electrode 4203. A plurality of (four in this case) branch electrodes 4203 are provided in a row at equal intervals along the center line of the branch electrodes 4203, and the lower branch electrodes 4203 are provided so as to cover these soft magnetic bodies 500.
  • a circular soft magnetic material 500 such as Ni is placed on the substrate 410 in a portion below the chip coupling part 421 of the lower branch electrode 4203.
  • a plurality of (four in this case) branch electrodes 4203 are provided in a row at equal intervals along the center line of the branch electrodes 4203, and the lower branch electrodes 4203 are provided so as to cover these soft magnetic bodies 500
  • the diameter of the soft magnetic material 500 is selected to be equal to or smaller than the diameter of the n-side electrode 46 of the vertical micro LED chip 40.
  • a portion of the chip coupling portion 421 of the lower branch electrode 4203 that corresponds to the soft magnetic material 500 is a coupling position of the vertical micro LED chip 40 .
  • a circular Sn film 47 is provided at the chip bonding portion 421 at this bonding position. In this case, it is not necessary to form the Sn film 47 of the vertical micro LED chip 40.
  • the other aspects of this mounting board 400 are the same as those of the first embodiment.
  • FIG. 12 schematically shows a part of the mounting board 400 shown in FIG. 11B.
  • the soft magnetic material 500 is magnetized by applying a magnetic field as indicated by the arrows using a magnetic field application device (not shown). After this, the application of the magnetic field is stopped. In this case, even after the application of the magnetic field is stopped, residual magnetic flux 501 is generated from the soft magnetic body 500 for a while, as shown in FIG. 13.
  • FIG. 14 shows the state immediately after discharge.
  • the ink 200 ejected in this way spreads over the entire chip coupling portion 421, and at the same time, the residual magnetic flux 501 generated from the soft magnetic material 500 causes the ink 200 to be contained therein.
  • the Ni films included in the n-side electrodes 46 of the plurality of vertical micro LED chips 40 are magnetized. Therefore, each vertical micro LED chip 40 is drawn downward by the magnetic force in the ink 200, and finally each vertical micro LED chip 40 is placed so that the n-side electrode 46 side is facing down, and the Sn The membrane 47 is contacted. This state is shown in FIG.
  • each vertical micro LED chip 40 is mechanically and electrically connected with the n-side electrode 46 side down.
  • Reference numeral 48 indicates Sn that has been melted and solidified.
  • the vertical micro LED chip 40 is coupled to the chip coupling portion 421 in each circuit unit.
  • the steps after forming the insulating film 422 are performed to manufacture the intended micro LED chip integrated device as shown in FIG. 18.
  • a soft magnetic material 500 is placed on the substrate 410 in a portion below the chip coupling portion 421 of the lower branch electrode 4203 of the mounting board 400 at the center of the lower branch electrode 4203.
  • a plurality of lower branch electrodes 4203 are provided along the line, and a lower branch electrode 4203 is provided to cover these soft magnetic bodies 500, and a vertical micro LED chip 40 is coupled to the chip coupling portion 421 with the n-side electrode 46 side facing down.
  • the micro LED chip integrated device has the same configuration as the micro LED chip integrated device according to the first embodiment except that the micro LED chip integrated device has the same configuration as the micro LED chip integrated device according to the first embodiment.
  • the lower branch electrode 4203 by providing the soft magnetic material 500 in advance on the substrate 410 below the chip coupling part 201 of the lower branch electrode 4203, the lower branch electrode 4203 can be Since the vertical micro LED chips 40 can be coupled on the chip coupling part 421, the coupling position of each vertical micro LED chip 40 is limited to the intersection of the lower branch line part electrode 4203 and the upper electrode branch part 432. I can do it. Therefore, it is possible to significantly reduce the number of vertical micro LED chips 40 that cause connection failures, and in turn, it is possible to reduce the manufacturing cost of the micro LED chip integrated device. In addition, advantages similar to those of the first embodiment can be obtained.
  • This micro LED chip integrated device also makes it possible to realize a color micro LED display using a passive matrix drive method.
  • ⁇ Third embodiment> a micro LED chip integrated device that can be used as an active matrix drive type color micro LED display will be described.
  • FIG. 19 shows a mounting board 400 before the upper electrode is formed in the third embodiment.
  • a plurality of lower trunk electrodes 4202 are provided on the mounting board 400 in parallel to each other in the row direction.
  • a plurality of lower branch line electrodes 4203 are connected to the lower main line electrode 4202 extending in a direction perpendicular to the lower main line electrode 4202, that is, in the column direction.
  • a soft magnetic material 500 is provided below the lower branch electrode 4203, similar to the second embodiment.
  • the vertical micro LED chip 40 is coupled to the chip coupling portion 421 of the lower branch electrode 4203 above the soft magnetic body 500.
  • the 19 constitute B, R, and G light emitting regions from the left, respectively, and RGB-1 pixel units constituted by these light emitting regions are arranged, and the mounting board 400 as a whole Pixels are arranged in a two-dimensional matrix.
  • On the mounting board 400 in addition to power supply lines 610 and data lines 620 extending in the column direction, scanning lines 630 extending in the row direction are also provided.
  • An active drive circuit is provided between each data line 620 and each light emitting region of each pixel, and the active drive circuit allows each light emitting region of each pixel to be selected.
  • the active drive circuit consists of transistors T1, T2 and capacitor C.
  • the transistors T1 and T2 are generally formed by thin film transistors using semiconductor thin films such as polycrystalline Si thin films, and the capacitor C is formed by laminating a lower electrode, an insulating film, and an upper electrode.
  • the source of transistor T1 is connected to data line 620, the drain is connected to the gate of transistor T2, and the gate is connected to scan line 630.
  • the source of transistor T2 is connected to power supply line 610, and the drain is connected to lower electrode 420.
  • Capacitor C is connected between the drain of transistor T1 and power supply line 610. Each light emitting region of each pixel is selected by selecting the scanning line 630 and the data line 620.
  • a narrow lower main line electrode 4202 is connected to the lower main line electrode 4201 via an active drive circuit, which will be described later, and is provided in parallel to the lower main line electrode 4201.
  • FIG. 20 shows a state in which an upper electrode 430 is formed on the mounting board 400 shown in FIG. 19. Similar to the first embodiment, a plurality of transparent electrodes 435 are provided so as to straddle the chip coupling portions 421 of all the lower branch electrodes 4203 in each circuit unit. Upper branch electrodes 432 of the upper electrode 430 are connected to these transparent electrodes 435, respectively.
  • the vertical micro LED chip 40 emits blue light, and red and green phosphors are formed above the red light emitting region and the green light emitting region, respectively, as in the first embodiment.
  • the third embodiment it is possible to easily and efficiently mount the vertical micro LED chips 40 for each of RGB light emission on the mounting board 400, and to eliminate defective vertical micro LED chips 40. Since the influence of the LED chip 40 can also be easily removed, a high-performance active drive type color micro LED display can be realized at low cost. In addition, advantages similar to those of the second embodiment can also be obtained.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

Un dispositif d'intégration de puce d'élément électroluminescent à semi-conducteur comprend : un substrat de montage 400 doté d'une électrode inférieure 420 qui a une électrode de partie de ligne principale inférieure 4202 sur une surface principale et une pluralité d'électrodes de partie de ligne de ramification inférieure 4202 se ramifiant à partir de l'électrode de partie de ligne principale inférieure 4202 ; une partie de jonction de puce 421 qui est constituée des surfaces supérieures des électrodes de partie de ligne de ramification inférieure ; une puce d'élément électroluminescent à semi-conducteur de type vertical 40 qui est jointe à la partie de jonction de puce, qui a une électrode côté p 45 et une électrode côté n 46 au-dessus et en dessous, et qui est conçue de telle sorte que l'électrode côté n est étirée par un champ magnétique plus fort que l'électrode côté p ; et une électrode supérieure 430 qui est dans une couche au-dessus de la puce d'élément électroluminescent à semi-conducteur et qui a une électrode de partie de ligne principale supérieure 431 et une pluralité d'électrodes de partie de ligne de ramification supérieure 432 qui se ramifient à partir de l'électrode de partie de ligne principale supérieure et qui chevauchent la partie de jonction de puce de façon à croiser la pluralité d'électrodes de partie de ligne de ramification inférieure. La puce d'élément électroluminescent à semi-conducteur est jointe de telle sorte que l'électrode côté n 46 fait face à la partie de jonction de puce. L'électrode côté n et les électrodes de partie de ligne de ramification inférieure sont électriquement connectées les unes aux autres. L'électrode côté p et les électrodes de partie de ligne de ramification supérieure de l'électrode supérieure sont électriquement connectées les unes aux autres.
PCT/JP2022/013902 2022-03-24 2022-03-24 Dispositif d'intégration de puce d'élément électroluminescent à semi-conducteur et son procédé de production WO2023181246A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2024509569A JP7465612B2 (ja) 2022-03-24 2022-03-24 半導体発光素子チップ集積装置およびその製造方法
PCT/JP2022/013902 WO2023181246A1 (fr) 2022-03-24 2022-03-24 Dispositif d'intégration de puce d'élément électroluminescent à semi-conducteur et son procédé de production

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2022/013902 WO2023181246A1 (fr) 2022-03-24 2022-03-24 Dispositif d'intégration de puce d'élément électroluminescent à semi-conducteur et son procédé de production

Publications (1)

Publication Number Publication Date
WO2023181246A1 true WO2023181246A1 (fr) 2023-09-28

Family

ID=88100630

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2022/013902 WO2023181246A1 (fr) 2022-03-24 2022-03-24 Dispositif d'intégration de puce d'élément électroluminescent à semi-conducteur et son procédé de production

Country Status (2)

Country Link
JP (1) JP7465612B2 (fr)
WO (1) WO2023181246A1 (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016512347A (ja) * 2013-03-15 2016-04-25 ルクスビュー テクノロジー コーポレイション 冗長性スキームを備えた発光ダイオードディスプレイ、及び統合欠陥検出検査を備えた発光ダイオードディスプレイを製造する方法
WO2020029657A1 (fr) * 2018-08-10 2020-02-13 林宏诚 Dispositif de diode, panneau d'affichage et dispositif d'affichage souple
US20210033240A1 (en) * 2019-07-31 2021-02-04 Lg Display Co., Ltd. Display apparatus
JP6886213B1 (ja) * 2020-06-20 2021-06-16 アルディーテック株式会社 半導体発光素子チップ集積装置およびその製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE21780070T1 (de) 2020-03-30 2023-05-25 Jade Bird Display (shanghai) Limited Systeme und verfahren für mehrfarbige led mit gestapelten verbindungsstrukturen

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016512347A (ja) * 2013-03-15 2016-04-25 ルクスビュー テクノロジー コーポレイション 冗長性スキームを備えた発光ダイオードディスプレイ、及び統合欠陥検出検査を備えた発光ダイオードディスプレイを製造する方法
WO2020029657A1 (fr) * 2018-08-10 2020-02-13 林宏诚 Dispositif de diode, panneau d'affichage et dispositif d'affichage souple
US20210033240A1 (en) * 2019-07-31 2021-02-04 Lg Display Co., Ltd. Display apparatus
JP6886213B1 (ja) * 2020-06-20 2021-06-16 アルディーテック株式会社 半導体発光素子チップ集積装置およびその製造方法

Also Published As

Publication number Publication date
JP7465612B2 (ja) 2024-04-11
JPWO2023181246A1 (fr) 2023-09-28

Similar Documents

Publication Publication Date Title
JP6694222B1 (ja) 半導体チップ集積装置の製造方法、半導体チップ集積装置、半導体チップインクおよび半導体チップインク吐出装置
US11610939B2 (en) Light emitting diode (LED) stack for a display
US10170664B2 (en) Surface mount emissive elements
WO2021084783A1 (fr) Procédé de fabrication de dispositif intégré de puce semi-conductrice, dispositif intégré de puce semi-conductrice, ensemble dispositif intégré de puce semi-conductrice, encre de puce semi-conductrice et dispositif d'éjection d'encre de puce semi-conductrice
JP6842783B1 (ja) マイクロledディスプレイの製造方法およびマイクロledディスプレイ
WO2021256447A1 (fr) Dispositif d'intégration de puce d'élément électroluminescent à semi-conducteur et son procédé de fabrication
JP6803595B1 (ja) 半導体発光素子チップ集積装置およびその製造方法
US20200411717A1 (en) Micro light-emitting diode displays having color correction films applied thereto
US11824049B2 (en) Display device
JP2021125544A (ja) 半導体チップ集積装置の製造方法、半導体チップ集積装置および半導体チップ集積装置集合体
JP2020025064A (ja) 発光素子集積装置の製造方法および発光素子配列装置
JP2022530370A (ja) 発光ダイオードディスプレイパネル、それを有するディスプレイ装置及びそれを製造する方法
CN114144309B (zh) 喷墨印刷装置、用于使双极元件对准的方法和制造显示装置的方法
WO2023181246A1 (fr) Dispositif d'intégration de puce d'élément électroluminescent à semi-conducteur et son procédé de production
JP2021072290A (ja) マイクロledバックライトおよびその製造方法ならびにマイクロled照明装置およびその製造方法
JP7422449B1 (ja) 発光ダイオードチップ集積装置
JP2022122320A (ja) 半導体発光素子チップ集積装置の製造方法および半導体発光素子チップ集積装置
EP4094946A1 (fr) Dispositif d'impression à jet d'encre, procédé d'impression d'éléments bipolaires et procédé de fabrication d'un dispositif d'affichage
JP2021093430A (ja) 半導体チップ集積装置の製造方法および半導体チップ集積装置
US12009384B2 (en) Light emitting diode (LED) stack for a display
KR20230123028A (ko) 잉크젯 프린팅 장치
Cheung et al. Colour tuneable LEDs and pixelated micro-LED arrays
EP3352210A1 (fr) Diodes électroluminescentes adaptées à l'assemblage fluidique pour les affichages émissifs

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22933387

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2024509569

Country of ref document: JP