WO2023178552A1 - 一种频率发生器 - Google Patents

一种频率发生器 Download PDF

Info

Publication number
WO2023178552A1
WO2023178552A1 PCT/CN2022/082498 CN2022082498W WO2023178552A1 WO 2023178552 A1 WO2023178552 A1 WO 2023178552A1 CN 2022082498 W CN2022082498 W CN 2022082498W WO 2023178552 A1 WO2023178552 A1 WO 2023178552A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
frequency
order
generator
mixing
Prior art date
Application number
PCT/CN2022/082498
Other languages
English (en)
French (fr)
Inventor
郭俊伟
曲峰
李必奇
Original Assignee
京东方科技集团股份有限公司
北京京东方技术开发有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 北京京东方技术开发有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202280000508.4A priority Critical patent/CN117157881A/zh
Priority to PCT/CN2022/082498 priority patent/WO2023178552A1/zh
Publication of WO2023178552A1 publication Critical patent/WO2023178552A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop

Definitions

  • the present disclosure belongs to the field of communication technology, and specifically relates to a frequency generator.
  • frequency generators are used to provide accurate and stable clock signals.
  • a quartz crystal oscillator is usually used.
  • the frequency of the quartz crystal oscillator is not easy to change and cannot be used in multi-channel frequency communication systems.
  • the phase-locked loop (PLL, Phase Lock Loop) Frequency synthesis technologies such as frequency multiplication and frequency division can obtain multi-frequency and highly stable clock signal output.
  • the present disclosure aims to solve at least one of the technical problems existing in the prior art and provide a frequency generator.
  • the present disclosure provides a frequency generator, which includes: an N-order mixing module and an N-order comb spectrum generating module; wherein, N ⁇ 2; one of the comb spectrum generating modules is configured to
  • the first-order mixing module provides a first-order fundamental wave signal group generated based on the second reference signal; and the generated fundamental wave signal groups of different stages are based on different second reference signals;
  • the first-order mixing module is based on The first-order fundamental wave signal group and the first reference signal generate a first-order mixing signal;
  • the first-order fundamental wave signal group includes multiple harmonic signals with the first frequency as the fundamental frequency;
  • the frequency module generates the i-th order mixed signal according to the i-th order fundamental wave signal group and the i-1 order mixing signal;
  • the i-th order fundamental wave signal group includes a plurality of i-th order fundamental wave signals with the i-th frequency as the fundamental wave frequency. Harmonic signal; 2 ⁇ i ⁇ N.
  • At least part of the comb spectrum generating module includes: a step diode; the step diode is configured to generate, according to the second reference signal, the frequency of the second reference signal as a fundamental frequency. harmonic signal.
  • At least part of the comb spectrum generation module further includes: a band-pass filter bank configured to filter the plurality of harmonic signals with the frequency of the second reference signal as the fundamental frequency, and generate the fundamental frequency. Wave signal group.
  • the comb spectrum generation module includes: a first DDS signal generator and a frequency divider group; the first DDS signal generator is configured to generate the signal according to the signal to be output by the frequency generator.
  • the second reference signal; the frequency divider group is configured to generate a plurality of first frequency division signals according to the second reference signal; the first frequency division signal includes the i-th frequency as the fundamental wave multiple harmonics of the frequency signal.
  • the comb spectrum generating module further includes a switching filter group; the switching filter group generates a plurality of first frequency-divided signals and the second reference signal based on the plurality of first frequency division signals and the second reference signal.
  • the i frequency is multiple harmonic signals of the fundamental frequency.
  • the comb spectrum generating module further includes a first mixer; the first mixer is configured to operate according to the third reference signal and the multi-frequency signal with the i-th frequency as the fundamental frequency. harmonic signals to generate the fundamental wave signal group.
  • the frequency divider group includes a first frequency divider, a second frequency divider and a third frequency divider;
  • the first frequency divider signal includes a first sub-frequency divider signal, a second sub-frequency divider signal and a third sub-frequency divider signal.
  • the first frequency divider is configured to generate a first sub-frequency divided signal according to the second reference signal; the frequency of the first sub-frequency divided signal is the second reference signal One-half of the frequency; the second frequency divider is configured to generate a second sub-frequency divided signal according to the second reference signal; the frequency of the second sub-frequency divided signal is the second reference signal One quarter of the signal frequency; the third frequency divider is configured to generate a third sub-frequency divided signal according to the second reference signal; the frequency of the third sub-frequency divided signal is the second frequency divider. One-sixth the frequency of the reference signal.
  • the mixing module includes a double-balanced mixer; one of the double-balanced mixers includes a first signal input terminal, a second signal input terminal and a first signal output terminal; the first signal input terminal is The second signal input terminal is configured to receive the harmonic signal in the fundamental wave signal group; the second signal input terminal is configured to receive the first reference signal or the i-1th order mixing signal; the first signal The output terminal is configured to generate the mixed signal according to the signal received by the first signal input terminal and the signal received by the second signal input terminal.
  • the first frequency is less than or equal to twice the frequency of the first reference signal.
  • the Nth order mixing module includes a fourth frequency divider and a first frequency multiplier; the fourth frequency divider is configured to operate according to the double-balanced mixing in the Nth order mixing module.
  • the mixing signal output by the first signal output terminal of the frequency converter generates a first sub-mixing signal;
  • the first frequency multiplier is configured to generate a first sub-mixing signal according to the The mixing signal output by the first signal output terminal of the double-balanced mixer generates a second sub-mixing signal;
  • the N-th order mixing signal generated by the N-th order mixing module includes the The first sub-mixing signal, the second sub-mixing signal and the mixing signal output from the first signal output end of the double-balanced mixer in the Nth order mixing module.
  • the method further includes: a first signal generating module; the first signal generating module is configured to generate the first reference signal according to the signal to be output by the frequency generator.
  • the first signal generation module includes a phase-locked loop; the phase-locked loop is configured to generate the first reference signal according to the signal to be output by the frequency generator.
  • the first signal generation module includes a second DDS signal generator; the second DDS signal generator is configured to generate the first reference signal according to the signal to be output by the frequency generator.
  • N 2 and the value of i is 2.
  • Figure 1 is a schematic diagram of an exemplary frequency generator
  • Figure 2 is a schematic diagram of a frequency generator according to an embodiment of the present disclosure
  • Figure 3 is a schematic diagram of the output frequency of the comb spectrum generation module according to the embodiment of the present disclosure.
  • Figure 4 is another schematic diagram of a frequency generator according to an embodiment of the present disclosure.
  • Figure 5 is a schematic diagram of a first DDS signal generator and/or a second DDS signal generator according to an embodiment of the present disclosure
  • Figure 6 is a schematic diagram of a comb spectrum generation module according to an embodiment of the present disclosure.
  • Figure 7 is a schematic diagram of another comb spectrum generation module according to an embodiment of the present disclosure.
  • Figure 1 is a schematic diagram of an exemplary frequency generator, which is directly combined with the second signal generation module 15 through a phase locked loop (PPL), so that it can Can be used as a broadband frequency source.
  • the exemplary frequency generator includes: a second signal generation module 15, a third signal generation module 16, a second mixer 17, a third mixer 18, a fourth mixer 19, a bandpass Filter 20, phase detector 21, loop filter module 22 and voltage controlled oscillator 23.
  • the second signal generation module 15 is configured to generate a reference reference signal group, where the reference reference signal group includes a plurality of reference reference signals with different frequencies.
  • the set of reference signals is configured to be transmitted to the second mixer 17 according to the frequency of the first output signal to be output by the exemplary frequency generator.
  • the third signal generator is configured to generate a coarse adjustment signal according to the frequency of the first output signal to be output by the exemplary frequency generator and transmit the coarse adjustment signal to the second mixer 17.
  • the second mixer 17 mixes the reference reference signal and the stored adjustment signal in the reference reference signal group, generates a first signal to be identified, and transmits the first signal to be identified to the bandpass filter 20 . In this way, the signal generated by the second signal generating module 15 is roughly adjusted to reduce the frequency conversion locking time of the frequency generator.
  • the bandpass filter 20 filters the first signal to be authenticated and generates the second signal to be authenticated.
  • the phase detector 21, the loop filter module 22, the voltage controlled oscillator 23, the third mixer 18 and the third signal generation module 16 constitute a phase locked loop PPL.
  • the phase detector 21 is configured to generate a first error signal based on the identification signal and the feedback signal input thereto.
  • the first error signal generated by the phase detector 21 includes a low-frequency signal change component; when there is no phase difference between the identification signal and the feedback signal , the first error signal generated by the phase detector 21 includes high-frequency components and DC signals.
  • the loop filter module 22 is configured to filter the first error signal generated by the phase detector 21 and generate a second error signal.
  • the second error signal generated by the loop filter module 22 includes a low-frequency signal change component, which can control the frequency of the signal output by the voltage-controlled oscillator 23 to change; when the identification signal and the feedback signal When there is no phase difference in the signals, the second error signal generated by the loop filter module 22 is also a DC signal. In this way, high-frequency signals and noise in the error signal are filtered out, and the function and performance of the phase-locked loop PPL are guaranteed.
  • the voltage controlled oscillator 23 is configured to generate a third signal to be authenticated according to the second error signal.
  • the second error signal includes a low-frequency signal change component
  • the frequency of the third signal to be identified changes, and the absolute value of the difference between the frequency of the third signal to be identified and the frequency of the identification signal input to the phase detector 21 changes; when the second error signal is a DC signal, the frequency of the third signal to be identified remains unchanged.
  • the voltage-controlled oscillator 23 By continuously changing the frequency of the third signal to be authenticated output by the voltage-controlled oscillator 23, the voltage-controlled oscillator 23 finally locks the output frequency of the phase-locked loop PPL.
  • the fourth signal generation module 33 is configured to generate a fine adjustment signal according to the frequency of the first output signal to be output by the exemplary frequency generator.
  • the third mixer 18 mixes the fine adjustment signal and the third signal to be authenticated and generates a first feedback signal.
  • the module 33 and the third mixer 18 finely adjust the third to-be-identified signal fed back by the voltage-controlled oscillator 23 to reduce the frequency conversion locking time of the frequency generator.
  • the working process is as follows: the identification signal input to the phase detector 21 is the second signal to be authenticated, and the feedback signal input to the phase detector 21 is the first feedback signal. Signal.
  • the phase detector 21 generates a first error signal according to the phase difference between the second signal to be identified and the first feedback signal, and transmits the first error signal to the loop filter module 22.
  • the first error signal includes low frequency signal change component.
  • the loop filter module 22 filters the received first error signal, filters out high-frequency signals and noise signals in the first error signal, and generates a second error signal.
  • the second error signal output by the loop filter module 22 also includes a low-frequency signal change component.
  • the second error signal is transmitted to the voltage controlled oscillator 23 .
  • the voltage-controlled oscillator 23 receives the second error signal, and since the second error signal includes a low-frequency signal change component, the frequency of the third signal to be identified output by the voltage-controlled oscillator 23 changes.
  • the third signal to be authenticated is transmitted to the third mixer 18, and because the third mixer 18 mixes the finely adjusted signal generated by the fourth signal generation module 33 and the third signal to be authenticated, a mixed signal is generated.
  • the first feedback signal Since the frequency of the third identification signal changes and the first feedback signal is mixed with the fine adjustment signal through the third mixer 18, the frequency of the first feedback signal also changes, and the frequency of the first feedback signal is different from the second frequency. The absolute value of the difference between the frequencies of the signal to be identified becomes smaller.
  • the frequency of the first feedback signal undergoes multiple cycles, its frequency is basically consistent with the frequency of the second signal to be identified.
  • the first error signal output by the phase detector 21 only includes a DC signal and a high-frequency component.
  • the loop filter module 22 filters the first error signal, filters out the high-frequency component and noise signal in the first error signal, and generates second error signal.
  • the second error signal since the second error signal only includes a DC component, the frequency of the third identification signal output by the voltage controlled oscillator 23 does not change.
  • the third signal to be authenticated is transmitted to the third mixer 18, and because the third mixer 18 mixes the finely adjusted signal generated by the fourth signal generation module 33 and the third signal to be authenticated, a mixed signal is generated. the first feedback signal. Since the frequency of the first feedback signal and the third identification signal does not change, the difference between the frequency of the first feedback signal and the frequency of the second signal to be identified does not change.
  • the phase-locked loop PPL completes the locking of the signal frequency. .
  • the frequency generator further includes a fourth mixer 19 .
  • the fourth mixer 19 mixes the third to-be-identified signal output by the phase-locked loop PPL and the finely adjusted signal generated by the fourth signal generation module 33 to generate a first output signal as the output signal of the exemplary frequency generator.
  • a reference reference signal group is generated by the second signal generation module 15.
  • the reference reference signal group includes a plurality of reference reference signals with different frequencies.
  • the reference reference signal passes through the phase-locked loop PPL and the fourth mixer.
  • the process of 19 generates the first output signal as the output signal of the exemplary frequency generator. Since different reference signals can be switched, the output signal of the exemplary frequency generator changes. And in this way, the exemplary frequency generator can serve as a broadband frequency source.
  • the frequency range of the first output signal is limited by the performance of the phase-locked loop PPL itself, and the exemplary frequency generator cannot be used as an ultra-wideband frequency source.
  • embodiments of the present disclosure provide a new type of frequency generator.
  • the present disclosure provides a frequency generator, which includes: an N-order mixing module and an N-order comb spectrum generating module 2; wherein, N ⁇ 2.
  • a comb spectrum generating module 2 is configured to provide the first-order fundamental wave signal group generated based on the second reference signal to the same-order mixing module, and the generated fundamental wave signal groups of different orders are based on different second reference signals.
  • the first-order mixing module 101 generates a first-order mixing signal according to the first-order fundamental wave signal group and the first reference signal.
  • the first-order fundamental wave signal group includes multiple harmonics with the first frequency as the fundamental frequency. Signal.
  • the i-th order mixing module 103 generates the i-th order mixing signal according to the i-th order fundamental wave signal group and the i-1 order mixing signal.
  • the i-th order fundamental wave signal group includes the i-th order fundamental wave signal group with the i-th frequency as the fundamental wave frequency. Multiple harmonic signals; 2 ⁇ i ⁇ N.
  • the combing spectrum generation module is used to provide the mixing signals required by the mixing modules of each stage.
  • the comb spectrum generation module 2 can multiply the input single-frequency signal and generate a set of harmonic signals with the frequency of the input single-frequency signal as the reference frequency.
  • the single-frequency signal input by the comb spectrum generating module 2 is the second reference signal, so it generates a fundamental wave signal group with the frequency of the second reference signal as the reference frequency. Since the embodiment of the present disclosure includes a multi-order mixing module and a multi-order combing spectrum generation module, the fundamental wave signal groups required by different order mixing modules have different frequencies, so the generated fundamental wave signal groups of different orders are based on the second The reference signals are different. In this way, the combing spectrum generating module can provide fundamental wave signal groups with different second reference frequencies as reference frequencies for different order mixing modules.
  • the generated first-order harmonic signal is The frequency range of the first-order mixed signal is expanded.
  • the i-th (2 ⁇ i ⁇ N)-th order mixing module performs the i-th order harmonic signal and the i-1-th order mixing signal in the i-th order fundamental wave signal group generated by the i-th order comb spectrum generation module 103. Mixing, so the frequency range of the generated i-th order mixed signal is expanded.
  • the finally generated Nth order mixing signal is used as an embodiment of the present disclosure.
  • the output signal of the frequency generator by setting up a multi-order mixing module, the fundamental wave signal group generated by the combing spectrum generation module and the mixing signal output by the previous-order mixing module are mixed, and finally the Nth ultra-wideband frequency signal is obtained.
  • first-order mixed signal and use it as the output signal of the frequency generator.
  • the frequency generator can be used as an ultra-wideband frequency source. And because during the frequency conversion process, there is no need to phase-lock through the phase-locked loop PPL, which reduces the frequency modulation agility time of the frequency generator.
  • FIG. 4 is another schematic diagram of a frequency generator according to an embodiment of the present disclosure.
  • the value of N is 2 and the value of i is 2. That is to say, the frequency generator shown in FIG. 4 only includes a two-stage mixing module, and the following embodiments only assume that the value of N is 2 and the value of i is 2.
  • the frequency generator includes a 2nd order mixing module and a 2nd order comb spectrum generation module 2 .
  • the first-order comb spectrum generating module 201 is configured to provide the first-order fundamental wave signal group generated according to the second reference signal 201 to the first-order mixing module 101 .
  • the first-order mixing module 101 generates a first-order mixing signal according to the first-order fundamental wave signal group and the first reference signal.
  • the first-order fundamental wave signal group includes multiple harmonics with the first frequency as the fundamental frequency.
  • the second-order comb spectrum generating module 202 is configured to provide the second-order fundamental wave signal group generated according to the second reference signal 202 to the second-order mixing module 102 .
  • the second-order mixing module 102 generates a second-order mixing signal based on the second-order fundamental wave signal group and the first-order mixing signal.
  • the second-order fundamental wave signal group includes a plurality of signals with the second frequency as the fundamental frequency.
  • the second-order mixing module 102 serves as the output module of the frequency generator. In this way, the circuit structure of the embodiment of the present disclosure is simple and easy to prepare.
  • the mixing module includes a double-balanced mixer; a double-balanced mixer includes a first signal input terminal, a second signal input terminal, and a first signal output terminal.
  • the first signal input terminal is configured to receive harmonic signals within the fundamental wave signal group.
  • the second signal input terminal is configured to receive the first reference signal or the first-order mixing signal.
  • the first signal output terminal is configured to generate a mixed signal based on the signal received by the first signal input terminal and the signal received by the second signal input terminal.
  • the first-order mixing module 101 includes the first double-balanced mixer 9 .
  • the first signal input terminal of the first double-balanced mixer 9 receives the harmonic signal with the first frequency as the fundamental frequency in the first fundamental wave signal group, and the second signal input terminal of the first double-balanced mixer 9 Receive the first reference signal. Since the output of the double-balanced mixer is the sum or difference of the signal frequencies of the two input terminals, the frequency of the first-order mixed signal output by the first signal output terminal of the first double-balanced mixer 9 is equal to the first fundamental wave The sum or difference of the frequencies of the harmonic signals with the first frequency as the fundamental frequency in the signal group and the first reference signal.
  • the order of the harmonic signals in the first fundamental wave signal group is 3, and the frequencies of each order of harmonic signals in the first fundamental wave signal group can be 1.2GHz, 1.8GHz and 2.4GHz respectively; the first reference signal It can be 0.3GHz.
  • the frequency range of the first-order mixed signal output by the first signal output terminal of the first double-balanced mixer 9 can be between 0.9GHz and 2.7GHz.
  • the first frequency is less than or equal to twice the frequency of the first reference signal.
  • the second-order mixing module 102 includes a second double-balanced mixer 10 .
  • the second signal input terminal of the second double-balanced mixer 10 receives the harmonic signal with the second frequency as the fundamental frequency in the second fundamental wave signal group.
  • the second signal input terminal of the second double-balanced mixer 10 Receive the first-order mixed signal. Since the output of the double-balanced mixer is the sum or difference of the signal frequencies of the two input terminals, the frequency of the second-order mixed signal output by the first signal output terminal of the second double-balanced mixer 10 is equal to the second fundamental wave The sum or difference between the frequencies of the harmonic signal with the second frequency as the fundamental frequency and the first-order mixed signal in the signal group.
  • the order of the harmonic signals in the second fundamental wave signal group is 4, and the frequencies of each order of harmonic signals in the second fundamental wave signal group can be 12 GHz, 14 GHz, 16 GHz and 18 GHz respectively.
  • the frequency range of the second-order mixed signal output by the first signal output terminal of the second double-balanced mixer 10 may be between 10 GHz and 20 GHz. In this way, the frequency bandwidth of the frequency generator output is expanded.
  • the second-order mixing module 102 in the frequency generator also includes a fourth frequency divider 11 and a first frequency multiplier 12 .
  • the fourth frequency divider 11 is configured to generate a first sub-mixing signal according to the mixing signal output from the first signal output end of the second double-balanced mixer 10 in the second-order mixing module 102; the first multiple The frequency converter 12 is configured to generate a second sub-mixing signal according to the mixing signal output from the first signal output terminal of the second double-balanced mixer 10 in the second-order mixing module 102 .
  • the second-order mixing signal generated by the second-order mixing module 102 includes a first sub-mixing signal, a second sub-mixing signal, and the first signal output of the double-balanced mixer in the N-th order mixing module. of mixed signals.
  • the frequency range of the second-order mixed signal output by the first signal output terminal of the second double-balanced mixer 10 may be between 10 GHz and 20 GHz. Therefore, the fourth frequency divider 11 divides the frequency of the second-order mixing signal output by the first signal output terminal of the second double-balanced mixer 10, and the frequency range of the generated first sub-mixing signal can be 5GHz-10GHz. between.
  • the first frequency multiplier 12 multiplies the frequency of the second-order mixed frequency signal output from the first signal output terminal of the second double-balanced mixer 10, and the frequency range of the generated second sub-mixed frequency signal may be between 20 GHz and 40 GHz. .
  • the frequency range of the second-order mixed signal output by the first signal output terminal of the second double-balanced mixer 10 may be between 10 GHz and 20 GHz. Therefore, the range of the second-order mixing signal generated by the second-order mixing module 102 at this time may be 5GHz-40GHz. In this way, the frequency bandwidth of the frequency generator is further expanded and covers the commonly used frequency range.
  • the frequency generator may also include a first signal generation module 13 .
  • the first signal generating module 13 is configured to generate a first reference signal according to the mixed signal to be generated. In this embodiment of the present disclosure, in this way, the first signal generating module 13 provides the first reference signal for the frequency generator according to the mixed frequency signal to be output by the frequency generator.
  • the first signal generation module 13 may include a phase locked loop PPL.
  • the phase locked loop PPL is configured to generate a first reference signal according to the mixed frequency signal to be generated.
  • the structure of the phase-locked loop PPL may be the phase-locked loop PPL shown in FIG. 1 , which will not be described again in the embodiment of the present disclosure.
  • the phase-locked loop PPL provides the first reference signal for the frequency generator according to the mixed frequency signal to be output by the frequency generator. For example, when the output frequency of the frequency generator ranges from 10 GHz to 20 GHz, the frequency of the first reference signal output by the phase-locked loop PPL may be 0.3 GHz. In this way, the spurious intensity of the frequency generator is reduced.
  • the first signal generation module 13 may include a second DDS signal generator 14 .
  • the second DDS signal generator 14 is configured to generate the first reference signal according to the signal to be output by the frequency generator.
  • the second DDS signal generator 14 provides the frequency generator with a first reference signal according to the mixed frequency signal to be output by the frequency generator.
  • the frequency of the first reference signal output by the second DDS signal generator 14 may be f 0 .
  • the first-order combing spectrum generating module generates the first fundamental wave signal group based on the second reference signal 201 with frequency f 1 , and the order of the harmonic signals in the first fundamental wave signal group is N 1 ; at this time, the The second-order combing spectrum generating module generates a second fundamental wave signal group based on the second reference signal 202 with a frequency of f 2 .
  • the order of the harmonic signals in the second fundamental wave signal group is N 2 ; f 1 and f 2 can It is an integer multiple of f 0 , and N 1 and N 2 can be integers between 4 and 7.
  • the frequency range output by the first signal output terminal of the second double-balanced mixer 10 is (f 2 -N 1 -f 0 )—(N 2 *f 2 +N 1 *f 1 + f 0 ).
  • the frequency range output by the first signal output terminal of the second double-balanced mixer 10 is [(A 2 -A 1 *N 1 )*f 0 ]—[(A 2 *N 2 +A 1 *N 1 +1)*f 0 ]
  • the frequency output by the first signal output terminal of the second double-balanced mixer 10 can be range to set the frequency value of the first reference signal output by the second DDS signal generator 14.
  • the frequency step value of the frequency generator is the minimum step frequency of the second DDS signal generator 14, the step frequency of the frequency generator of the embodiment of the present disclosure is small,
  • the second DDS signal generator 14 includes a reference clock source module 24, a phase control word generation module 25, a frequency control word generation module 26, a phase accumulator 27, a phase register 28, a phase Modulator 29, sine table lookup module 30, DAC conversion module 31 and low pass filter module 32.
  • the reference clock source module 24 is used to provide a reference clock signal for the second DDS signal generator 14;
  • the phase control word generation module is used to generate the phase control word of the second DDS signal generation module, and the phase control word is used to control the second DDS
  • the frequency control word generation module 26 is used to generate the frequency control word of the second DDS signal generator 14, and the frequency control word is used to control the frequency of the signal generated by the second DDS signal generator 14;
  • the phase accumulator 27 is used to add the frequency control word to the accumulated phase data output by the phase register 28 under the control of the reference clock signal;
  • the phase register 28 is used to add the phase accumulator 27 generated after the previous clock signal is triggered.
  • the accumulated phase data is transmitted to the phase accumulator 27; the phase modulator 29 adds the output of the phase register 28 and the phase control word to obtain the phase-adjusted signal to be queried; the sine table lookup module 30 includes a complete cycle sine wave
  • the digital amplitude information is used to map the input signal to be queried into a sine wave amplitude signal; the DAC conversion module 31 is used to convert the digital form of the sine wave amplitude signal into the required synthetic frequency analog form signal; the low-pass filtering module 32 is used to attenuate and filter out unwanted sampling components in order to output a spectrally pure sine wave signal.
  • the working process is as follows: the phase control word generation module generates the phase control word according to the first reference signal to be output by the second DDS signal generator 14; the frequency control word generation module 26 generates a frequency control word according to the first reference signal to be output by the second DDS signal generator 14; the reference clock source module 24 generates a reference clock signal according to the first reference signal to be output by the second DDS signal generator 14.
  • the phase accumulator 27 adds the frequency control word to the accumulated phase data output by the phase register 28, and then sends the added result to the data input end of the phase register 28.
  • the phase register 28 feeds back the new accumulated phase data generated by the phase accumulator 27 after the previous clock trigger to the input end of the phase accumulator 27, so that the phase accumulator 27 continues to add the frequency control data under the action of the next clock. .
  • the phase accumulator 27 will continuously accumulate linear phases under the action of the reference clock. When the phase accumulator 27 is full, an overflow will occur to complete a periodic action.
  • the overflow frequency of the phase accumulator 27 is the second The frequency of the first reference signal output by the DDS signal generator 14.
  • the phase modulator 29 adds the signal output by the phase register 28 and the phase control word, and the result is used as the address of the sine lookup table in the sine table lookup module 30 .
  • the sine lookup table is composed of ROM.
  • the sine lookup table maps the input address information into a sine wave amplitude signal and outputs it to the input end of the DAC conversion module 31.
  • the DAC conversion module 31 converts the digital waveform amplitude into the required synthetic frequency. Analog form signal.
  • the low-pass filter filters unwanted sample components to output a spectrally pure sine wave signal.
  • the structure of the first DDS signal generator 34 may be the same as the structure of the second DDS signal generator 14. That is to say, the structure of the first DDS signal generator 34 may also be as shown in Figure 5 shown.
  • the combing spectrum generation module may include a step diode 3 .
  • the step diode 3 is configured to generate a plurality of harmonic signals with the frequency of the second reference signal as the fundamental frequency according to the second reference signal. Since step diode 3 has a very special transient response, its fall time is approximately equal to 0, and the current changes rapidly when turned off (the current waveform is steep). Therefore, it has a highly nonlinear reactance element, so it is easy to be used in circuit applications. can produce rich harmonic components. In the embodiment of the present disclosure, multiple harmonic signals with the frequency of the second reference signal as the fundamental frequency can be realized through a relatively simple circuit including the step diode 3 .
  • the comb spectrum generation module 2 further includes: a bandpass filter bank 4 .
  • the bandpass filter group 4 is configured to filter the plurality of harmonic signals with the frequency of the second reference signal as the fundamental frequency to generate the fundamental signal group.
  • the plurality of harmonic signals generated by the step diode 3 and having the frequency of the second reference signal as the fundamental frequency can be filtered by the bandpass filter bank 4 to remove the noise signals therein. , and select the order and frequency range of the harmonic signals in the fundamental wave signal group generated by the comb spectrum generation module 2. In this way, the circuit structure of the comb spectrum generating module 2 is relatively simple and easy to prepare.
  • FIG. 7 is a schematic diagram of another comb spectrum generating module 2 .
  • This kind of comb spectrum generating module 2 includes a first DDS signal generator 34 and a frequency divider group 6 .
  • the first DDS signal generator 34 is configured to generate a second reference signal according to the signal to be output by the frequency generator.
  • the frequency divider group 6 is configured to generate a plurality of first frequency divided signals according to the second reference signal.
  • the first frequency-divided signal includes a plurality of harmonic signals with the first and/or second frequency as the fundamental frequency.
  • the first DDS signal generator 34 may generate a second reference signal with a higher frequency.
  • the frequency range of the second reference signal may be 3GHz-6GHz.
  • the second reference signal is divided by frequency divider group 6 to generate multiple first frequency divided signals. At this time, by properly setting the divider group, the fundamental wave signal group that the comb spectrum generation module 2 needs to output can be realized.
  • the frequency divider group 6 includes a first frequency divider 601, a second frequency divider 602 and a third frequency divider 603.
  • the first frequency divider signal includes a first sub-frequency divider signal, a second sub-frequency divider signal and a third sub-frequency divider signal. Frequency divided signal.
  • the first frequency divider 601 is configured to generate a first sub-frequency divided signal according to the second reference signal; the frequency of the first sub-frequency divided signal is half of the frequency of the second reference signal.
  • the second frequency divider 602 is configured to generate a second sub-frequency divided signal according to the second reference signal; the frequency of the second sub-frequency divided signal is one quarter of the frequency of the second reference signal.
  • the third frequency divider 603 is configured to generate a third sub-frequency divided signal according to the second reference signal; the frequency of the third sub-frequency divided signal is one sixth of the frequency of the second reference signal. Since the frequency of the second reference signal may be 3GHz-6GHz, the frequency range of the first sub-frequency signal may be 1.5GHz-3GHz, the frequency range of the second sub-frequency signal may be 0.75GHz-1.5GHz, and the frequency range of the second sub-frequency signal may be 0.75GHz-1.5GHz. The frequency range of the frequency division signal can be 0.5GHz-1GHz. At this time, by screening the first sub-frequency signal, the second sub-frequency signal and the third sub-frequency signal, multiple harmonic signals with the 1st and/or 2nd frequency as the fundamental frequency can be obtained.
  • the comb spectrum generation module 2 shown in FIG. 7 further includes a switching filter bank 7 .
  • the switching filter bank 7 generates a plurality of harmonic signals with the frequency of the second reference signal as the fundamental frequency according to the plurality of first divided frequency signals and the second reference signal.
  • the frequency range of the second reference signal may be 3GHz-6GHz
  • the frequency range of the first sub-frequency signal may be 1.5GHz-3GHz
  • the frequency range of the second sub-frequency signal may be 0.75GHz -1.5GHz
  • the frequency range of the second sub-frequency signal can be 0.5GHz-1GHz.
  • the comb spectrum generation module can generate a harmonic signal group with a wider frequency range.
  • the comb spectrum generation module 2 shown in Figure 7 also includes a first mixer 8.
  • the first mixer 8 operates according to the third reference signal and the first and/or second Multiple harmonic signals whose frequency is the fundamental frequency generate a fundamental wave signal group.
  • the frequency of the third reference signal may be 6 GHz, so the frequency range of the signal output by the first mixer 8 may be 0.5 GHz-12 GHz. In this way, the frequency range of the harmonic signal group generated by the comb spectrum generating module 2 is further expanded.
  • the comb spectrum generating module 2 in the frequency generator may be partly the comb spectrum generating module 2 shown in Figure 6 and partly the comb spectrum generating module 2 shown in Figure 7 ;
  • the comb spectrum generation modules 2 in the frequency generator can also all be the comb spectrum generation modules 2 shown in Figure 6 ;
  • the comb spectrum generation modules 2 in the frequency generator can also all be the comb spectrum generation modules 2 shown in Figure 7 Spectrum generation module 2.

Landscapes

  • Transmitters (AREA)

Abstract

一种频率发生器，属于通信技术领域。该频率发生器包括：N阶混频模块和N阶梳状谱发生模块；其中，N≥2。一个梳状谱发生模块被配置为向同阶混频模块提供依据第二参考信号生成的一阶基波信号组；且生成的不同阶的基波信号组所依据的第二参考信号不同。第1阶混频模块根据第1阶基波信号组和第一参考信号，生成第1阶混频信号，第1阶基波信号组包括以第1频率为基波频率的多个谐波信号。第i阶混频模块根据第i阶基波信号组和第i-1阶混频信号，生成第i阶混频信号，第i阶基波信号组包括以第i频率为基波频率的多个谐波信号；2≤i≤N。

Description

一种频率发生器 技术领域
本公开属于通信技术领域，具体涉及一种频率发生器。
背景技术
在无线通信系统中，频率发生器用于提供精确且稳定的时钟信号。为了得到高精度的时钟信号，通常采用石英晶体振荡器，但石英晶体振荡器的频率不容易改变，无法应用于多信道频率的通信系统中，而利用锁相环(PLL，Phase Lock Loop)、倍频、分频等频率合成技术，可以获得多频率、高稳定的时钟信号输出。
随着无线通信系统中的射频系统所覆盖的频率范围和带宽的不断扩大，对频率发生器的频率覆盖范围提出了更高的要求。在现有技术中，频率发生器的频率覆盖范围十分有限，常需要多次变频，其频率覆盖范围方可覆盖目标频率，增大了系统的设计成本并降低了系统的可靠性。
发明内容
本公开旨在至少解决现有技术中存在的技术问题之一，提供一种频率发生器。
第一方面，本公开提供一种频率发生器，其包括：N阶混频模块和N阶梳状谱发生模块；其中，N≥2；一个所述梳状谱发生模块，被配置为向同阶所述混频模块提供依据第二参考信号生成的一阶基波信号组；且生成的不同阶的所述基波信号组所依据的第二参考信号不同；第1阶混频模块，根据第1阶基波信号组和第一参考信号，生成第1阶混频信号；所述第1阶基波信号组包括以第1频率为基波频率的多个谐波信号；第i阶混频模块，根据第i阶基波信号组和第i-1阶混频信号，生成第i阶混频信号；所述第i阶基波信号组包括以第i频率为基波频率的多个谐波信号；2≤i≤N。
其中，至少部分所述梳状谱发生模块包括：阶跃二极管；所述阶跃二极管，被配置为根据所述第二参考信号，生成以所述第二参考信号的频率为基 波频率的多个谐波信号。
其中，至少部分所述梳状谱发生模块还包括：带通滤波器组，被配置为对所述以第二参考信号的频率为基波频率的多个谐波信号进行滤波，生成所述基波信号组。
其中，至少部分所述梳状谱发生模块包括：第一DDS信号发生器和分频器组；所述第一DDS信号发生器，被配置为根据所述频率发生器待输出的信号，生成所述第二参考信号；所述分频器组，被配置为根据所述第二参考信号，生成多个第一分频信号；所述第一分频信号包括以所述第i频率为基波频率的多个谐波信号。
其中，至少部分所述梳状谱发生模块还包括开关滤波器组；所述开关滤波器组，根据多个所述第一分频信号和所述第二参考信号，生成多个以所述第i频率为基波频率的多个谐波信号。
其中，至少部分所述梳状谱发生模块还包括第一混频器；所述第一混频器，被配置为根据第三参考信号和所述以所述第i频率为基波频率的多个谐波信号，生成所述基波信号组。
其中，所述分频器组包括第一分频器、第二分频器以及第三分频器；所述第一分频信号包括第一子分频信号、第二子分频信号以及第三子分频信号；所述第一分频器，被配置为根据所述第二参考信号，生成第一子分频信号；所述第一子分频信号的频率为所述第二参考信号频率的二分之一；所述第二分频器，被配置为根据所述第二参考信号，生成第二子分频信号；所述第二子分频信号的频率为所述第二参考信号频率的四分之一；所述第三分频器，被配置为根据所述第二参考信号，生成第三子分频信号；所述第三子分频信号的频率为所述第二参考信号频率的六分之一。
其中，所述混频模块包括双平衡混频器；一个所述双平衡混频器包括第一信号输入端、第二信号输入端以及第一信号输出端；所述第一信号输入端，被配置为接收所述基波信号组内的谐波信号；所述第二信号输入端，被配置 为接收所述第一参考信号或所述第i-1阶混频信号；所述第一信号输出端，被配置为根据所述第一信号输入端接收到的信号和所述第二信号输入端接收到的信号，生成所述混频信号。
其中，所述第1频率小于等于所述第一参考信号的频率的两倍。
其中，所述第N阶混频模块包括第四分频器和第一倍频器；所述第四分频器，被配置为根据所述第N阶混频模块内的所述双平衡混频器的所述第一信号输出端输出的所述混频信号，生成第一子混频信号；所述第一倍频器，被配置为根据所述第N阶混频模块内的所述双平衡混频器的所述第一信号输出端输出的所述混频信号，生成第二子混频信号；所述第N阶混频模块生成的所述第N阶混频信号包括所述第一子混频信号、所述第二子混频信号以及所述第N阶混频模块内的所述双平衡混频器的所述第一信号输出端输出的所述混频信号。
其中，还包括：第一信号发生模块；所述第一信号发生模块，被配置为根据所述频率发生器待输出的信号，生成所述第一参考信号。
其中，所述第一信号发生模块包括锁相环；所述锁相环，被配置为根据所述频率发生器待输出的信号，生成所述第一参考信号。
其中，所述第一信号发生模块包括第二DDS信号发生器；所述第二DDS信号发生器，被配置为根据所述频率发生器待输出的信号，生成所述第一参考信号。
其中，N的值为2，i的值为2。
附图说明
图1为示例性的一种频率发生器的示意图；
图2为本公开实施例的频率发生器的一种示意图；
图3为本公开实施例的梳状谱发生模块的输出频率示意图；
图4为本公开实施例的频率发生器的另一种示意图；
图5为本公开实施例的第一DDS信号发生器和/或第二DDS信号发生器的示意图；
图6为本公开实施例的一种梳状谱发生模块的示意图；
图7为本公开实施例的另一种梳状谱发生模块的示意图。
具体实施方式
为使本领域技术人员更好地理解本公开的技术方案，下面结合附图和具体实施方式对本公开作进一步详细描述。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”、“一”或者“该”等类似词语也不表示数量限制，而是表示存在至少一个。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
第一方面，如图1所示，图1是一种示例性的频率发生器的示意图，通过锁相环(phase locked loop，PPL)与第二信号发生模块15直接结合的方式，以使其可以作为宽频带频率源。具体参照图1，示例性的频率发生器包括：第二信号发生模块15、第三信号发生模块16、第二混频器17、第三混频器18、第四混频器19、带通滤波器20、鉴相器21、环路滤波模块22以及压控振荡器23。其中，第二信号发生模块15被配置为生成参考基准信号组，参考基准信号组包括多个频率不同的参考基准信号。参考基准信号组被配置为根据示例性的频率发生器待输出的第一输出信号的频率，传输至第二混频器17。第三信号发生器被配置为根据示例性的频率发生器待输出的第一输出信 号的频率，生成粗调节信号，并将粗调节信号传输至第二混频器17。第二混频器17将参考基准信号组内的参考基准信号和存调节信号进行混频，生成第一待鉴相信号，并将第一待鉴相信号传输至带通滤波器20。通过该种方式，对第二信号发生模块15生成的信号进行粗调节，以减小频率发生器的变频锁定时间。带通滤波器20对第一待鉴相信号进行滤波，生成第二待鉴相信号。
在示例性的频率发生器中，鉴相器21、环路滤波模块22、压控振荡器23、第三混频器18以及第三信号发生模块16构成锁相环PPL。鉴相器21被配置为根据输入至其中的鉴相信号和反馈信号，生成第一误差信号。在一些示例性的实施例中，当鉴相信号和反馈信号存在相位差时，鉴相器21所生成的第一误差信号包括低频信号变化分量；当鉴相信号和反馈信号不存在相位差时，鉴相器21所生成的第一误差信号包括高频分量和直流信号。环路滤波模块22被配置为对鉴相器21生成的第一误差信号进行滤波，并生成第二误差信号。当鉴相信号和反馈信号存在相位差时，环路滤波模块22生成的第二误差信号包括低频信号变化分量，其可控制压控振荡器23输出的信号频率发生变化；当鉴相信号和反馈信号不存在相位差时，环路滤波模块22生成的第二误差信号也为直流信号。通过该种方式，以滤除误差信号中的高频信号和噪声，并保证锁相环PPL的功能和性能。压控震荡器23被配置为根据第二误差信号，生成第三待鉴相信号。当第二误差信号包括低频信号变化分量时，第三待鉴相信号的频率发生改变，且第三待鉴相信号的频率与鉴相器21被输入的鉴相信号的频率之差的绝对值发生改变；当第二误差信号为直流信号时，第三待鉴相信号的频率不变。通过不断改变压控振荡器23输出的第三待鉴相信号的频率，压控振荡器23最终将锁相环PPL的输出频率锁定。第四信号发生模块33被配置为根据示例性的频率发生器待输出的第一输出信号的频率，生成精调节信号。第三混频器18将精调节信号和第三待鉴相信号混频并生成第一反馈信号，通过该种方式，完成压控振荡器23输出的反馈回路，同时由于设置有第四信号发生模块33和第三混频器18对 压控振荡器23反馈的第三待鉴相信号进行精调节，以减小频率发生器的变频锁定时间。
在示例性的锁相环PPL中，其工作过程如下：鉴相器21被输入至其中的鉴相信号为第二待鉴相信号，鉴相器21被输入至其中的反馈信号为第一反馈信号。鉴相器21根据第二待鉴相信号和第一反馈信号之间的相位差生成第一误差信号，并将第一误差信号传输至环路滤波模块22中，此时第一误差信号包括低频信号变化分量。环路滤波模块22对接收到的第一误差信号进行滤波，过滤掉第一误差信号中的高频信号和噪声信号，生成第二误差信号。此时由于第一误差信号包括低频信号变化分量，因此环路滤波模块22输出的第二误差信号也包括低频信号变化分量。同时，第二误差信号被传输至压控振荡器23。压控振荡器23接收第二误差信号，且由于第二误差信号包括低频信号变化分量，因此压控振荡器23输出的第三待鉴相信号的频率发生改变。第三待鉴相信号被传输至第三混频器18，且由于第三混频器18将第四信号发生模块33生成的精调节信号和第三待鉴相信号混频，生成混频后的第一反馈信号。第一反馈信号由于第三鉴相信号的频率发生改变以及经过第三混频器18与精调节信号混频，因此第一反馈信号的频率也发生改变，且第一反馈信号的频率与第二待鉴相信号的频率之间的差值的绝对值变小。
当第一反馈信号的频率经过多次循环后，其频率和第二待鉴相信号的频率基本一致。此时鉴相器21输出的第一误差信号仅包括直流信号和高频分量，环路滤波模块22对第一误差信号进行滤波，过滤掉第一误差信号中的高频分量和噪声信号，生成第二误差信号。此时由于第二误差信号仅包括直流分量，因此压控振荡器23输出的第三鉴相信号的频率不发生改变。第三待鉴相信号被传输至第三混频器18，且由于第三混频器18将第四信号发生模块33生成的精调节信号和第三待鉴相信号混频，生成混频后的第一反馈信号。第一反馈信号由于第三鉴相信号的频率不变，因此第一反馈信号的频率和第二待鉴相信号的频率之间的差值也不发生变化，锁相环PPL完成信号 频率的锁定。
在示例性的频率发生器中，为进一步的以减小频率发生器的变频锁定时间，频率发生器还包括第四混频器19。第四混频器19将锁相环PPL输出的第三待鉴相信号和第四信号发生模块33生成的精调节信号混频，生成第一输出信号作为示例性的频率发生器的输出信号。
在示例性的频率发生器中，通过第二信号发生模块15生成参考基准信号组，参考基准信号组包括多个频率不同的参考基准信号，参考基准信号通过锁相环PPL和第四混频器19的处理，生成第一输出信号作为示例性的频率发生器的输出信号。由于可以切换不同的参考基准信号，以使得示例性的频率发生器的输出信号发生改变。且通过该种方式，示例性的频率发生器可以作为宽带频率源。
但是在示例性的频率发生器中，第一输出信号的频率范围受限于锁相环PPL自身性能，示例性的频率发生器无法作为超宽带频率源。
针对上述问题，本公开实施例提供了一种新型的频率发生器。
第一方面，如图2所示，本公开提供了一种频率发生器，其包括：N阶混频模块和N阶梳状谱发生模块2；其中，N≥2。一个梳状谱发生模块2被配置为向同阶混频模块提供依据第二参考信号生成的一阶基波信号组，且生成的不同阶的基波信号组所依据的第二参考信号不同。第1阶混频模块101根据第1阶基波信号组和第一参考信号，生成第1阶混频信号，第1阶基波信号组包括以第1频率为基波频率的多个谐波信号。第i阶混频模块103根据第i阶基波信号组和第i-1阶混频信号，生成第i阶混频信号，第i阶基波信号组包括以第i频率为基波频率的多个谐波信号；2≤i≤N。
在本公开实施例中，梳妆谱发生模块用于为各阶混频模块提供其所需要的混频信号。具体的如图3所示，梳状谱发生模块2可以将输入的单频信号倍进，生成一组以输入的单频信号的频率为基准频率的谐波信号。在本公开实施例中，梳状谱发生模块2输入的单频信号为第二参考信号，因此其生成 以第二参考信号的频率为基准频率的基波信号组。由于本公开实施例包括多阶混频模块和多阶梳妆谱发生模块，不同阶混频模块所需要的基波信号组的频率不同，因此生成的不同阶的基波信号组所依据的第二参考信号不同。通过该种方式，梳妆谱发生模块可以为不同阶的混频模块提供以不同的第二基准频率为基准频率的基波信号组。
在本公开实施例中，继续参照图2，由于第1阶混频模块101对第1阶基波信号组内的第1阶谐波信号和第一参考信号进行混频，因此生成的第1阶混频信号的频率范围被扩大。第i(2≤i≤N)阶混频模块对第i阶梳状谱发生模块103生成的第i阶基波信号组内的第i阶谐波信号和第i-1阶混频信号进行混频，因此生成的第i阶混频信号的频率范围被扩大。直至第N阶混频模块对第N阶基波信号组内的第N阶谐波信号和第N-1阶混频信号进行混频，最终生成的第N阶混频信号作为本公开实施例的频率发生器的输出信号。在本公开实施例中，通过设置多阶混频模块，将梳妆谱发生模块生成的基波信号组和上一阶混频模块输出的混频信号进行混频，最终得到超宽频带的第N阶混频信号，并将其作为频率发生器的输出信号。通过该种方式，使得频率发生器可以作为超宽带频率源。且由于在变频过程中，无需通过锁相环PPL进行锁相，降低了频率发生器的调频捷变时间。
在一些实施例中，参照图4，图4是本公开实施例的频率发生器的另一种示意图。图4所示的频率发生器中，N的值为2，i的值为2。也就是说，图4所示的频率发生器仅包括两阶混频模块，同时下述实施例仅以N的值为2，i的值为2进行说明。在本公开实施例中，频率发生器包括2阶混频模块和2阶梳状谱发生模块2。第1阶梳状谱发生模块201被配置为向第1阶混频模块101提供依据第二参考信号201生成的第1阶基波信号组。第1阶混频模块101根据第1阶基波信号组和第一参考信号，生成第1阶混频信号，第1阶基波信号组包括以第1频率为基波频率的多个谐波信号。第2阶梳状谱发生模块202被配置为向第2阶混频模块102提供依据第二参考信号202生成的第2阶基波信号组。第2阶混频模块102根据第2阶基波信号组和第 1阶混频信号，生成第2阶混频信号，第2阶基波信号组包括以第2频率为基波频率的多个谐波信号，第2阶混频模块102作为频率发生器的输出模块。通过该种方式，本公开实施例电路结构简单，易于制备。
在一些实施例中，继续参照图4，混频模块包括双平衡混频器；一个双平衡混频器包括第一信号输入端、第二信号输入端以及第一信号输出端。第一信号输入端被配置为接收基波信号组内的谐波信号。第二信号输入端被配置为接收第一参考信号或第1阶混频信号。第一信号输出端被配置为根据第一信号输入端接收到的信号和第二信号输入端接收到的信号，生成混频信号。
在本公开实施例中，由于频率发生器仅包括两阶混频模块，因此第1阶混频模块101包括第一双平衡混频器9。第一双平衡混频器9的第一信号输入端接受第1基波信号组内的以第1频率为基波频率的谐波信号，第一双平衡混频器9的第二信号输入端接收第一参考信号。由于双平衡混频器的输出为两个输入端的信号频率之和或差，因此第一双平衡混频器9的第一信号输出端输出的第1阶混频信号的频率等于第1基波信号组内的以第1频率为基波频率的谐波信号的与第一参考信号的频率之和或差。例如：第1基波信号组内的谐波信号的阶数为3，第1基波信号组内的各阶谐波信号的频率可以分别是1.2GHz、1.8GHz以及2.4GHz；第一参考信号可以是0.3GHz，此时第一双平衡混频器9的第一信号输出端输出的第1阶混频信号的频率范围可以是0.9GHz-2.7GHz之间。在一些实施例中，为保证第1阶混频信号的频率连续性，第1频率小于等于所述第一参考信号的频率的两倍。
在本公开实施例中，第2阶混频模块102包括第二双平衡混频器10。第二双平衡混频器10的第二信号输入端接收第2基波信号组内的以第2频率为基波频率的谐波信号，第二双平衡混频器10的第二信号输入端接收第1阶混频信号。由于双平衡混频器的输出为两个输入端的信号频率之和或差，因此第二双平衡混频器10的第一信号输出端输出的第2阶混频信号的频率等于第2基波信号组内的以第2频率为基波频率的谐波信号的与第1阶混频 信号的频率之和或差。例如：第2基波信号组内的谐波信号的阶数为4，第2基波信号组内的各阶谐波信号的频率可以分别是12GHz、14GHz、16GHz以及18GHz。此时第二双平衡混频器10的第一信号输出端输出的第2阶混频信号的频率范围可以是10GHz-20GHz之间。通过该种方式，频率发生器输出的频率带宽被扩大。
在一些实施例中，为了进一步扩大频率发生器输出的频带带宽，并使其覆盖常用的频率范围。频率发生器内的第2阶混频模块102还包括第四分频器11和第一倍频器12。第四分频器11被配置为根据第2阶混频模块102内的第二双平衡混频器10的第一信号输出端输出的混频信号，生成第一子混频信号；第一倍频器12被配置为根据第2阶混频模块102内的第二双平衡混频器10的第一信号输出端输出的混频信号，生成第二子混频信号。第2阶混频模块102生成的第2阶混频信号包括第一子混频信号、第二子混频信号以及第N阶混频模块内的双平衡混频器的第一信号输出端输出的混频信号。
具体参照图4，由于本公开实施例中，第二双平衡混频器10的第一信号输出端输出的第2阶混频信号的频率范围可以是10GHz-20GHz之间。因此第四分频器11将第二双平衡混频器10的第一信号输出端输出的第2阶混频信号分分频，生成的第一子混频信号的频率范围可以是5GHz-10GHz之间。第一倍频器12将第二双平衡混频器10的第一信号输出端输出的第2阶混频信号倍频，生成的第二子混频信号的频率范围可以是20GHz-40GHz之间。第二双平衡混频器10的第一信号输出端输出的第2阶混频信号的频率范围可以是10GHz-20GHz之间。因此此时第2阶混频模块102生成的第2阶混频信号的范围可以是5GHz-40GHz。通过该种方式，进一步的扩大了频率发生器的频率带宽，并使其覆盖常用的频率范围。
在一些实施例中，频率发生器还可以包括第一信号发生模块13。第一信号发生模块13被配置为根据待生成的混频信号，生成第一参考信号。在本公开实施例中，通过该种方式，第一信号发生模块13根据频率发生器待输 出的混频信号，为频率发生器提供第一参考信号。
在一些实施例中，第一信号发生模块13可以包括锁相环PPL。锁相环PPL被配置为根据待生成的混频信号，生成第一参考信号。在本公开实施例中，锁相环PPL的结构可以是图1中所示的锁相环PPL，本公开实施例再次不再赘述。锁相环PPL根据频率发生器待输出的混频信号，为频率发生器提供第一参考信号。例如当频率发生器的输出频率的范围为10GHz-20GHz时，锁相环PPL输出的第一参考信号的频率可以是0.3GHz。通过该种方式，频率发生器的杂散强度被降低。
在一些实施例中，所述第一信号发生模块13可以包括第二DDS信号发生器14。第二DDS信号发生器14被配置为根据所述频率发生器待输出的信号，生成所述第一参考信号。在本公开实施例中，第二DDS信号发生器14根据频率发生器待输出的混频信号，为频率发生器提供第一参考信号。例如：第二DDS信号发生器14输出的第一参考信号的频率可以是f 0。此时第1阶梳妆谱发生模块的依据频率为f 1的第二参考信号201生成第1基波信号组，第1基波信号组内的谐波信号的阶数为N 1；此时第2阶梳妆谱发生模块的依据频率为f 2的第二参考信号202生成第2基波信号组，第2基波信号组内的谐波信号的阶数为N 2；f 1、f 2可以是f 0的整数倍，N 1、N 2可以是4-7之间的整数。在该种情况下，第二双平衡混频器10的第一信号输出端输出的频率的范围是(f 2-N 1-f 0)—(N 2*f 2+N 1*f 1+f 0)之间。此时若设f 1＝A 1*f 0，f 2＝A 2*f 0，那么第二双平衡混频器10的第一信号输出端输出的频率的范围是【(A 2-A 1*N 1)*f 0】—【(A 2*N 2+A 1*N 1+1)*f 0】，因此可以根据第二双平衡混频器10的第一信号输出端输出的频率范围，设定第二DDS信号发生器14输出的第一参考信号的频率值。同时由于在本公开实施例中，频率发生器的频率步进值为第二DDS信号发生器14的最小步进频率，因此本公开实施例的频率发生器的步进频率小，
在一些实施例中，如图5所示，第二DDS信号发生器14包括基准时钟源模块24、相位控制字生成模块25、频率控制字生成模块26、相位累加器 27、相位寄存器28、相位调制器29、正弦表查找模块30、DAC转换模块31和低通滤波模块32。其中，基准时钟源模块24用于为第二DDS信号发生器14提供基准时钟信号；相位控制字生成模块用于生成第二DDS信号发生模块的相位控制字，相位控制字用于控制第二DDS信号发生器14生成的信号的相位；频率控制字生成模块26用于生成第二DDS信号发生器14的频率控制字，频率控制字用于控制第二DDS信号发生器14生成的信号的频率；相位累加器27用于在基准时钟信号的控制下，将频率控制字与相位寄存器28输出的累加相位数据相加；相位寄存器28用于将相位累加器27在上一个时钟信号触发后所产生的累加相位数据传输至相位累加器27；相位调制器29将相位寄存器28的输出和相位控制字相加，得到相位调节后的待查询信号；正弦表查找模块30，其包括一个完整周期正玄波的数字幅度信息，用于将输入的待查询信号映射成正弦波幅度信号；DAC转换模块31用于将数字形式的正弦波幅度信号转换成所要求的合成频率模拟量形式信号；低通滤波模块32用于衰减和滤除不需要的取样分量，以便输出频谱纯净的正弦波信号。
在本公开实施例的第二DDS信号发生器14中，其工作过程如下：相位控制字生成模块根据第二DDS信号发生器14待输出的第一参考信号生成相位控制字；频率控制字生成模块26根据第二DDS信号发生器14待输出的第一参考信号生成频率控制字；基准时钟源模块24根据第二DDS信号发生器14待输出的第一参考信号生成基准时钟信号。基准时钟信号中的时钟脉冲每触发一次，相位累加器27便将频率控制字与相位寄存器28输出的累加相位数据相加，然后把相加后的结果送至相位寄存器28的数据输入端。相位寄存器28将相位累加器27在上一个时钟触发后所产生的新累加相位数据反馈到相位累加器27的输入端，以使相位累加器27在下一个时钟的作用下继续与频率控制数据相加。相位累加器27在参考时钟的作用下不断将进行线性相位累加，当相位累加器27累加满时，就会产生一次溢出，以完成一个周期性的动作，相位累加器27的溢出频率就是第二DDS信号发生器14 输出的第一参考信号的频率。相位调制器29将相位寄存器28输出的信号与相位控制字相加，结果作为正弦表查找模块30中的正弦查找表的地址。正弦查找表由ROM构成，正弦查找表把输入地址信息映射成正弦波幅度信号，同时输出到DAC转换模块31的输入端，DAC转换模块31将数字形式的波形幅值转换成所要求的合成频率模拟形式信号。低通滤波器将不需要的取样分量过滤，以便输出频谱纯净的正弦波信号。
需要说明的是，在一些实施例中，第一DDS信号发生器34的结构可以和第二DDS信号发生器14的结构相同，也就是说第一DDS信号发生器34的结构也可以如图5所示。
在一些实施例中，如图6所示，梳妆谱发生模块可以包括阶跃二极管3。阶跃二极管3被配置为根据所述第二参考信号，生成以所述第二参考信号的频率为基波频率的多个谐波信号。由于阶跃二极管3在瞬态响应上非常特殊，其下降时间约等于0，关断时电流的变化很急速(电流波形陡峭)，因此具有高度非线性特性的电抗元件，所以在很容易电路应用中能够产生出丰富的谐波分量。在本公开实施例中，可以通过较为简单的包括阶跃二极管3的电路，即可实现以第二参考信号的频率为基波频率的多个谐波信号。
在一些实施例中，继续参照图6，梳状谱发生模块2还包括：带通滤波器组4。带通滤波器组4被配置为对所述以第二参考信号的频率为基波频率的多个谐波信号进行滤波，生成所述基波信号组。在本公开实施例中，可以通过带通滤波器组4对阶跃二极管3产生的多个以第二参考信号的频率为基波频率的多个谐波信号进行滤波，以去除其中的噪声信号，并选定梳状谱发生模块2生成的基波信号组中的谐波信号的阶数和频率范围。通过该种方式，梳状谱发生模块2的电路结构较为简单，易于制备。
在一些实施例中，如图7所示，图7是另一种梳状谱发生模块2的示意图。该种梳状谱发生模块2包括第一DDS信号发生器34和分频器组6。第一DDS信号发生器34被配置为根据频率发生器待输出的信号，生成第二参考信号。分频器组6被配置为根据第二参考信号，生成多个第一分频信号。 第一分频信号包括以第1和/或2频率为基波频率的多个谐波信号。在本公开实施例中，第一DDS信号发生器34可以生成频率较高的第二参考信号，例如：第二参考信号的频率范围可以是3GHz-6GHz。第二参考信号经由分频器组6分频后生成多个第一分频信号，此时通过合理设置分配器组，即可实现梳状谱发生模块2需要输出的基波信号组。
在一些实施例中，继续参照图7。分频器组6包括第一分频器601、第二分频器602以及第三分频器603，第一分频信号包括第一子分频信号、第二子分频信号以及第三子分频信号。第一分频器601被配置为根据第二参考信号，生成第一子分频信号；第一子分频信号的频率为第二参考信号频率的二分之一。第二分频器602被配置为根据第二参考信号，生成第二子分频信号；第二子分频信号的频率为第二参考信号频率的四分之一。第三分频器603被配置为根据第二参考信号，生成第三子分频信号；第三子分频信号的频率为第二参考信号频率的六分之一。由于第二参考信号的频率可以是3GHz-6GHz，因此第一子分频信号的频率范围可以是1.5GHz-3GHz，第二子分频信号的频率范围可以是0.75GHz-1.5GHz，第二子分频信号的频率范围可以是0.5GHz-1GHz。此时对第一子分频信号、第二字分频信号以及第三子分频信号进行筛选，即可得到以第1和/或2频率为基波频率的多个谐波信号。
在一些实施例中，图7所示的梳状谱发生模块2还包括开关滤波器组7。开关滤波器组7根据多个第一分频信号和第二参考信号，生成多个以所述第二参考信号的频率为基波频率的多个谐波信号。在本公开实施例中，由于第二参考信号的频率范围可以是3GHz-6GHz，第一子分频信号的频率范围可以是1.5GHz-3GHz，第二子分频信号的频率范围可以是0.75GHz-1.5GHz，第二子分频信号的频率范围可以是0.5GHz-1GHz。因此第一分频信号和第二参考信号经由开关滤波器组7选择滤波后，即可得到频率范围为0.5GHz-6GHz的以第1和/或2频率为基波频率的多个谐波信号。通过该种方式，可以使梳妆谱发生模块生成频率范围更大的谐波信号组。
在一些实施例中，继续参照图7，图7所示的梳状谱发生模块2还包括 第一混频器8，第一混频器8根据第三参考信号和以第1和/或2频率为基波频率的多个谐波信号，生成基波信号组。在本公开实施例中，第三参考信号的频率可以是6GHz，因此第一混频器8输出的信号频率的范围可以是0.5GHz-12GHz。通过该种方式，梳状谱发生模块2生成的谐波信号组的频率范围被进一步扩大。
需要说明的是，在一些实施例中，频率发生器中的梳状谱发生模块2可以部分是图6所示的梳状谱发生模块2，部分是图7所示的梳状谱发生模块2；频率发生器中的梳状谱发生模块2也可以全部是图6所述的梳状谱发生模块2；频率发生器中的梳状谱发生模块2也可以全部是图7所示的梳状谱发生模块2。上述三种情况都在本公开实施例的保护范围内。
以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施方式，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明/实用新型的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本公开的保护范围。

Claims (14)

  1. 一种频率发生器，其中，包括：N阶混频模块和N阶梳状谱发生模块；其中，N≥2；
    一个所述梳状谱发生模块，被配置为向同阶所述混频模块提供依据第二参考信号生成的一阶基波信号组；且生成的不同阶的所述基波信号组所依据的第二参考信号不同；
    第1阶混频模块，根据第1阶基波信号组和第一参考信号，生成第1阶混频信号；所述第1阶基波信号组包括以第1频率为基波频率的多个谐波信号；
    第i阶混频模块，根据第i阶基波信号组和第i-1阶混频信号，生成第i阶混频信号；所述第i阶基波信号组包括以第i频率为基波频率的多个谐波信号；2≤i≤N。
  2. 根据权利要求1所述的频率发生器，其中，至少部分所述梳状谱发生模块包括：阶跃二极管；
    所述阶跃二极管，被配置为根据所述第二参考信号，生成以所述第二参考信号的频率为基波频率的多个谐波信号。
  3. 根据权利要求2所述的频率发生器，其中，至少部分所述梳状谱发生模块还包括：
    带通滤波器组，被配置为对所述以第二参考信号的频率为基波频率的多个谐波信号进行滤波，生成所述基波信号组。
  4. 根据权利要求1所述的频率发生器，其中，至少部分所述梳状谱发生模块包括：第一DDS信号发生器和分频器组；所述第一DDS信号发生器，被配置为根据所述频率发生器待输出的信号，生成所述第二参考信号；
    所述分频器组，被配置为根据所述第二参考信号，生成多个第一分频信号；所述第一分频信号包括以所述第i频率为基波频率的多个谐波信号。
  5. 根据权利要求4所述的频率发生器，其中，至少部分所述梳状谱发生模块还包括开关滤波器组；
    所述开关滤波器组，根据多个所述第一分频信号和所述第二参考信号，生成多个以所述第i频率为基波频率的多个谐波信号。
  6. 根据权利要求4所述的频率发生器，其中，至少部分所述梳状谱发生模块还包括第一混频器；所述第一混频器，被配置为根据第三参考信号和所述以所述第i频率为基波频率的多个谐波信号，生成所述基波信号组。
  7. 根据权利要求4所述的频率发生器，其中，所述分频器组包括第一分频器、第二分频器以及第三分频器；所述第一分频信号包括第一子分频信号、第二子分频信号以及第三子分频信号；
    所述第一分频器，被配置为根据所述第二参考信号，生成第一子分频信号；所述第一子分频信号的频率为所述第二参考信号频率的二分之一；
    所述第二分频器，被配置为根据所述第二参考信号，生成第二子分频信号；所述第二子分频信号的频率为所述第二参考信号频率的四分之一；
    所述第三分频器，被配置为根据所述第二参考信号，生成第三子分频信号；所述第三子分频信号的频率为所述第二参考信号频率的六分之一。
  8. 根据权利要求1所述的频率发生器，其中，所述混频模块包括双平衡混频器；一个所述双平衡混频器包括第一信号输入端、第二信号输入端以及第一信号输出端；
    所述第一信号输入端，被配置为接收所述基波信号组内的谐波信号；
    所述第二信号输入端，被配置为接收所述第一参考信号或所述第i-1阶混频信号；
    所述第一信号输出端，被配置为根据所述第一信号输入端接收到的信号和所述第二信号输入端接收到的信号，生成所述混频信号。
  9. 根据权利要求8所述的频率发生器，其中，所述第1频率小于等于所述第一参考信号的频率的两倍。
  10. 根据权利要求8所述的频率发生器，其中，所述第N阶混频模块包括第四分频器和第一倍频器；
    所述第四分频器，被配置为根据所述第N阶混频模块内的所述双平衡混频器的所述第一信号输出端输出的所述混频信号，生成第一子混频信号；
    所述第一倍频器，被配置为根据所述第N阶混频模块内的所述双平衡混频器的所述第一信号输出端输出的所述混频信号，生成第二子混频信号；
    所述第N阶混频模块生成的所述第N阶混频信号包括所述第一子混频信号、所述第二子混频信号以及所述第N阶混频模块内的所述双平衡混频器的所述第一信号输出端输出的所述混频信号。
  11. 根据权利要求1所述的频率发生器，其中，还包括：第一信号发生模块；
    所述第一信号发生模块，被配置为根据所述频率发生器待输出的信号，生成所述第一参考信号。
  12. 根据权利要求11所述的频率发生器，其中，所述第一信号发生模块包括锁相环；所述锁相环，被配置为根据所述频率发生器待输出的信号，生成所述第一参考信号。
  13. 根据权利要求11所述的频率发生器，其中，所述第一信号发生模块包括第二DDS信号发生器；
    所述第二DDS信号发生器，被配置为根据所述频率发生器待输出的信号，生成所述第一参考信号。
  14. 根据权利要求1所述的频率发生器，其中，N的值为2，i的值为2。
PCT/CN2022/082498 2022-03-23 2022-03-23 一种频率发生器 WO2023178552A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN202280000508.4A CN117157881A (zh) 2022-03-23 2022-03-23 一种频率发生器
PCT/CN2022/082498 WO2023178552A1 (zh) 2022-03-23 2022-03-23 一种频率发生器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2022/082498 WO2023178552A1 (zh) 2022-03-23 2022-03-23 一种频率发生器

Publications (1)

Publication Number Publication Date
WO2023178552A1 true WO2023178552A1 (zh) 2023-09-28

Family

ID=88099661

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/082498 WO2023178552A1 (zh) 2022-03-23 2022-03-23 一种频率发生器

Country Status (2)

Country Link
CN (1) CN117157881A (zh)
WO (1) WO2023178552A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117686984A (zh) * 2024-02-01 2024-03-12 西安电子科技大学 基于fpga的大带宽复杂扫频干扰信号生成方法及装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5343168A (en) * 1993-07-09 1994-08-30 Northrop Grumman Corporation Harmonic frequency synthesizer with adjustable frequency offset
CN105141310A (zh) * 2015-09-07 2015-12-09 东南大学 多环宽带低相噪频率合成器
CN205647494U (zh) * 2016-02-03 2016-10-12 昆山九华电子设备厂 一种超宽带低相噪低杂散频率合成器
CN110208747A (zh) * 2019-06-11 2019-09-06 上海航天电子通讯设备研究所 一种X-Ku波段雷达捷变频率源装置
CN110289858A (zh) * 2019-06-27 2019-09-27 四川众为创通科技有限公司 一种宽带细步进捷变频合系统
CN210839562U (zh) * 2019-11-27 2020-06-23 四川九洲电器集团有限责任公司 一种宽带快速跳频频率源

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5343168A (en) * 1993-07-09 1994-08-30 Northrop Grumman Corporation Harmonic frequency synthesizer with adjustable frequency offset
CN105141310A (zh) * 2015-09-07 2015-12-09 东南大学 多环宽带低相噪频率合成器
CN205647494U (zh) * 2016-02-03 2016-10-12 昆山九华电子设备厂 一种超宽带低相噪低杂散频率合成器
CN110208747A (zh) * 2019-06-11 2019-09-06 上海航天电子通讯设备研究所 一种X-Ku波段雷达捷变频率源装置
CN110289858A (zh) * 2019-06-27 2019-09-27 四川众为创通科技有限公司 一种宽带细步进捷变频合系统
CN210839562U (zh) * 2019-11-27 2020-06-23 四川九洲电器集团有限责任公司 一种宽带快速跳频频率源

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117686984A (zh) * 2024-02-01 2024-03-12 西安电子科技大学 基于fpga的大带宽复杂扫频干扰信号生成方法及装置
CN117686984B (zh) * 2024-02-01 2024-05-07 西安电子科技大学 基于fpga的大带宽复杂扫频干扰信号生成方法及装置

Also Published As

Publication number Publication date
CN117157881A (zh) 2023-12-01

Similar Documents

Publication Publication Date Title
US10587276B2 (en) Wide range frequency synthesizer with quadrature generation and spur cancellation
CN104320137B (zh) 一种锁相环频率合成器
US6603362B2 (en) Subsampling digitizer-based frequency synthesizer
CN204131498U (zh) 一种锁相环频率合成器
CN105122650A (zh) 利用可变频率梳线的合成器方法
CN106067815B (zh) 一种基于dds和小数分频锁相环的频率合成器
WO2023178552A1 (zh) 一种频率发生器
CN103975531A (zh) 频率合成装置和方法
WO1998036491A1 (en) Voltage controlled ring oscillator frequency multiplier
CN108055035A (zh) 一种光电振荡器的宽带频率扩展装置
CN211830747U (zh) 一种超低相噪和低杂散步进频率源的链路结构
CN110289858B (zh) 一种宽带细步进捷变频合系统
CA2381094A1 (en) Rational frequency synthesizers
CN113726334B (zh) 一种s波段低相噪低杂散细步进频率源组件及使用方法
US8044725B2 (en) Signal generator with directly-extractable DDS signal source
US7579916B1 (en) Low noise frequency synthesizer
CN106209089A (zh) 一种单环路分频式宽带锁相频率合成器
CN116449912B (zh) 相位可调多通道信号源
CN117081588A (zh) 一种宽带低相噪捷变频率合成器及其信号合成方法
KR100707221B1 (ko) 광대역 주파수 합성기
CN115940938A (zh) 一种低相位噪声快速宽带扫频频率源
CN109698698A (zh) 一种用于分布式干扰的宽带混频合成方法及装置
CN202978896U (zh) 组合宽带快速跳频源
KR0149126B1 (ko) 혼합형 주파수 합성기
CN212850458U (zh) 一种宽带本振电路

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22932619

Country of ref document: EP

Kind code of ref document: A1