WO2023167070A1 - 量子ビット制御回路 - Google Patents

量子ビット制御回路 Download PDF

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Publication number
WO2023167070A1
WO2023167070A1 PCT/JP2023/006454 JP2023006454W WO2023167070A1 WO 2023167070 A1 WO2023167070 A1 WO 2023167070A1 JP 2023006454 W JP2023006454 W JP 2023006454W WO 2023167070 A1 WO2023167070 A1 WO 2023167070A1
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Prior art keywords
pulse train
excitation current
circuit
sfq
frequency
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English (en)
French (fr)
Japanese (ja)
Inventor
尚輝 竹内
信行 吉川
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Yokohama National University NUC
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Yokohama National University NUC
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Priority to JP2024504643A priority Critical patent/JPWO2023167070A1/ja
Priority to US18/842,688 priority patent/US12597932B2/en
Publication of WO2023167070A1 publication Critical patent/WO2023167070A1/ja
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/195—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/92—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of superconductive devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/38—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of superconductive devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/10—Junction-based devices
    • H10N60/12—Josephson-effect devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control

Definitions

  • the present invention relates to qubit control circuits. This application claims priority based on Japanese Patent Application No. 2022-033636 filed in Japan on March 4, 2022, the content of which is incorporated herein.
  • Quantum computers can simulate quantum systems composed of a large number of electrons, so they are expected to be applied to material design and drug discovery. Quantum bits controlled in quantum computers need to be controlled at low temperatures because they are composed of superconducting elements. Therefore, the configuration of a quantum computer includes refrigerators to keep the qubits cold and equipment that operates at room temperature. Devices operating at room temperature output control signals to qubits through cables.
  • a control circuit that operates on the low-temperature side, like a qubit, is required.
  • a quantum computing system is known in which the number of communication lines is smaller than the number of devices to be controlled (Patent Document 1).
  • a superconducting quantum processor having a superconducting digital/analog converter that uses magnetic flux quantum parametrons as shift registers (Patent Document 2).
  • the present invention has been made in view of the above points, and provides a circuit that constitutes a qubit control circuit that can control a large number of qubits with a small number of cables.
  • the present invention has been made to solve the above problems, and one aspect of the present invention includes a first power supply line to which a first excitation current that is a current with a predetermined frequency is input, and a current with a predetermined waveform.
  • a second power supply line to which a second excitation current is input, a first input signal line to which a first input signal indicating a logic state is input, and a first Josephson junction, wherein the first excitation current is A pulse train generated by the first Josephson junction based on the frequency and the waveform of the second excitation current and the logic state indicated by the first input signal, the pulse train having a repetition frequency corresponding to the frequency.
  • a first pulse train generating circuit for outputting one pulse train; and a second Josephson junction, wherein the pulse train is generated by the second Josephson junction based on the frequency of the first excitation current, wherein and a third Josephson junction for outputting an output pulse train in which the waveform of the first pulse train is shaped by the repetition frequency of the second pulse train. and a pulse train generation circuit.
  • a second input signal line to which a second input signal indicating a predetermined logic state is input; a third power supply line to which a current is input, wherein the second pulse train generation circuit detects the second Josephson junction based on the frequency of the first excitation current and the DC waveform of the third excitation current.
  • the generated pulse train is output as the second pulse train.
  • the first excitation current input to the first power supply line includes a plurality of frequencies
  • the first pulse train generation circuit and the first A combination of a 2-pulse train generation circuit and the output pulse train generation circuit, and a resonance circuit are provided for each of the plurality of frequencies, wherein the resonance circuit is one of the plurality of frequencies included in the first excitation current.
  • the resonance frequency is supplied to the first pulse train generation circuit and the second pulse train generation circuit as the frequency of the first excitation current.
  • the number of pulses in the output pulse train output by the output pulse train generation circuit is controlled by the amplitude of the first excitation current.
  • the first pulse train generation circuit and the second pulse train generation circuit have a configuration of a magnetic flux quantum parametron circuit or a configuration of a single magnetic flux quantum circuit. Any one or more is included.
  • FIG. 1 is a diagram showing an example configuration of a quantum bit control circuit according to a first embodiment of the present invention
  • FIG. FIG. 5 is a diagram showing an example of simulation results by the quantum bit control circuit according to the first embodiment of the present invention
  • 1 is a diagram showing an example of a circuit configuration of a QFP/SFQ interface according to a first embodiment of the invention
  • FIG. 1 is a diagram showing an example of a circuit configuration of a QFP/SFQ interface according to a first embodiment of the invention
  • FIG. FIG. 5 is a diagram showing an example of the configuration of a quantum bit control circuit according to a second embodiment of the present invention
  • FIG. FIG. 10 is a diagram showing an example of simulation results by the quantum bit control circuit according to the second embodiment of the present invention
  • FIG. 9 is a diagram showing an example of the relationship between the spectrum of the first excitation current and the number of output pulses according to the second embodiment of the present invention;
  • FIG. 1 is a diagram showing an example of the configuration of a quantum bit control circuit 1 according to this embodiment.
  • a quantum bit control circuit 1 is a pulse generator that generates an SFQ pulse train.
  • a QFP/SFQ interface is used as an example.
  • the qubit control circuit 1 includes a first power line 2, a second power line 3, a third power line 4, a first input signal line 51, a second input signal line 52, a QFP/SFQ interface 61, and , a QFP/SFQ interface 62 , a first output signal line 71 , a second output signal line 72 , and a D flip-flop 8 .
  • the first power line 2 is a power line to which the first excitation current Ilo is input.
  • the first excitation current Ilo is a current containing a predetermined frequency.
  • the frequency of the first excitation current Ilo is, for example, 5 GHz.
  • the first excitation current Ilo is a local oscillator signal provided by a Local Oscillator (not shown).
  • the local oscillator is provided separately from the quantum bit control circuit 1 .
  • the second power line 3 is a power line to which the second excitation current Ibb is input.
  • the second excitation current Ibb is a current with a predetermined waveform.
  • the second excitation current Ibb is a baseband signal supplied as an output signal from a baseband circuit (not shown).
  • the baseband circuit is provided separately from the quantum bit control circuit 1 .
  • a waveform of the second excitation current Ibb is, for example, a triangular wave.
  • the third power line 4 is a power line to which the DC offset current Idc is input.
  • the DC offset current Idc is a direct current with a predetermined magnitude.
  • the DC offset current Idc is supplied from a DC power supply (not shown).
  • the first input signal line 51 is a control line to which the first input current Iin is input.
  • the second input signal line 52 is a control line to which the second input current I1 is input.
  • a first input current Iin is a current that determines the logic state of the QFP/SFQ interface 61 .
  • a second input current I 1 is the current that determines the logic state of the QFP/SFQ interface 62 .
  • the QFP/SFQ interface 61 generates the first SFQ pulse train Vin from the first excitation current Ilo.
  • a first power line 2 , a second power line 3 , a first input signal line 51 , and a first output signal line 71 are connected to the QFP/SFQ interface 61 .
  • the QFP/SFQ interface 61 Based on the first excitation current Ilo and the second excitation current Ibb, the QFP/SFQ interface 61 generates the first SFQ pulse train Vin according to the logic state determined by the first input current Iin.
  • the QFP/SFQ interface 61 outputs the generated first SFQ pulse train Vin to the D flip-flop 8 via the first output signal line 71 .
  • the QFP/SFQ interface 62 generates the second SFQ pulse train Vclk from the second input current I1.
  • a first power line 2 , a third power line 4 , a second input signal line 52 , and a second output signal line 72 are connected to the QFP/SFQ interface 62 .
  • the QFP/SFQ interface 62 generates a second SFQ pulse train Vclk based on the first excitation current Ilo and the DC offset current Idc.
  • the second SFQ pulse train Vclk is a pulse train with a repetition frequency corresponding to the frequency of the first excitation current Ilo.
  • the QFP/SFQ interface 62 outputs the generated second SFQ pulse train Vclk to the D flip-flop 8 via the second output signal line 72 .
  • the QFP/SFQ interface 61 and the QFP/SFQ interface 62 are circuits each including a superconducting element and a configuration of a Quantum Flux Parametron (QFP) circuit. Circuit configurations of the QFP/SFQ interface 61 and the QFP/SFQ interface 62 will be described later.
  • the QFP/SFQ interface 61 is an example of a first pulse train generation circuit.
  • the QFP/SFQ interface 62 is an example of a second pulse train generation circuit. That is, each of the QFP/SFQ interface 61 and the QFP/SFQ interface 62 is a pulse train generation circuit that includes a QFP configuration and converts current input to the QFP into a pulse train.
  • the logic state determined by the second input current I1 is always fixed to "1".
  • a DC offset current Idc is applied to the QFP/SFQ interface 62 while the logic state determined by the second input current I1 is always fixed at "1". Therefore, the QFP/SFQ interface 62 always generates the second SFQ pulse train Vclk.
  • the D flip-flop 8 generates an output pulse train Vout by waveform-shaping the first SFQ pulse train Vin with the repetition frequency of the second SFQ pulse train Vclk.
  • the repetition frequency of the output pulse train Vout is the same as the frequency of the first excitation current Ilo. Since the pulse intervals of the first SFQ pulse train Vin are not always uniform, the quantum bit control circuit 1 uses the D flip-flop 8 to shape the waveform of the first SFQ pulse train Vin.
  • the first SFQ pulse train Vin is generated only during the period when the amplitude of the second excitation current Ibb is greater than the predetermined value.
  • the first SFQ pulse train Vin does not necessarily have uniform pulse intervals, but has a predetermined number of pulses in the pulse train.
  • the second SFQ pulse train Vclk has uniform pulse intervals, but since it is always output, the number of pulses in the pulse train does not reach the predetermined number.
  • the D flip-flop 8 From the first SFQ pulse train Vin and the second SFQ pulse train Vclk, the D flip-flop 8 generates an output pulse train Vout having uniform pulse intervals and a predetermined number of pulses in the pulse train.
  • the D flip-flop 8 is, for example, a Single Flux Quantum (SFQ) circuit.
  • SFQ Single Flux Quantum
  • magnetic flux quanta generated by an input voltage pulse propagate in the superconducting loop via Josephson junctions.
  • a voltage pulse generated across the Josephson junction due to the propagation of magnetic flux quanta is output.
  • the D flip-flop 8 is an example of an output pulse train generation circuit.
  • the SFQ circuit uses superconducting elements, so it is known that there is no DC resistance and low power consumption.
  • power consumption per gate is about 1 ⁇ W.
  • the SFQ circuit is capable of ultra-high-speed operation with a clock frequency of about 100 GHz. Since power consumption and operating frequency depend on circuit parameters, these power consumption values and operating frequency values are merely examples.
  • FIG. 2 is a diagram showing an example of simulation results by the quantum bit control circuit 1 according to this embodiment.
  • the value of each physical quantity is shown for 17 nanoseconds.
  • the frequency of the first excitation current Ilo is 5 GHz as described above.
  • the second excitation current Ibb is a triangular wave as described above.
  • the values of the first excitation current Ilo and the second excitation current Ibb are expressed in arbitrary units.
  • the first input current Iin indicates a logic state of "0, 1" as an example. Depending on the logic state, the first input current Iin changes value from low to high around 8.5 ns. In FIG. 2, the unit of the value of the first input current Iin is 20 ⁇ A/tick.
  • the first SFQ pulse train Vin is generated only during the period when the amplitude of the second excitation current Ibb is greater than the predetermined value.
  • the second SFQ pulse train Vclk is always generated.
  • the output pulse train Vout is generated based on the first SFQ pulse train Vin and the second SFQ pulse train Vclk. As shown in FIG. 2, in the qubit control circuit 1, on and off of the output pulse train Vout is controlled according to the logic state indicated by the first input current Iin.
  • the pulse intervals of the first SFQ pulse train Vin and the pulse intervals of the output pulse train Vout are compared, the pulse intervals of the first SFQ pulse train Vin are not uniform, whereas the pulse intervals of the output pulse train Vout are changed by the D flip-flop 8. converted to uniform pulse intervals.
  • the unit of each value of the first SFQ pulse train Vin, the second SFQ pulse train Vclk, and the output pulse train Vout is 200 ⁇ V/tick.
  • the circuit configuration of the QFP/SFQ interface 61 or the QFP/SFQ interface 62 shown in FIG. 1 is either the circuit configuration of the QFP/SFQ interface shown in FIG. 3 or 4, for example.
  • the circuit configuration of the QFP/SFQ interface shown in FIGS. 3 and 4 is an example, and the circuit configuration of the QFP/SFQ interface 61 or QFP/SFQ interface 62 shown in FIG.
  • a circuit configuration of a QFP/SFQ interface other than the circuit configuration of the /SFQ interface may be used.
  • FIG. 3 is a diagram showing an example of a QFP/SFQ interface 200, which is a circuit configuration of the QFP/SFQ interface 61 or QFP/SFQ interface 62 according to this embodiment.
  • the QFP/SFQ interface 200 is driven and clocked by the interface excitation current Ix.
  • the interface excitation current Ix flows through the power line 203, magnetic fluxes are generated in the inductors Lx1 and Lx2 provided on the power line 203, respectively.
  • the power line 203 corresponds to the first power line 2 in FIG.
  • the interface excitation current Ix corresponds to the first excitation current Ilo in FIG.
  • the quantum bit control circuit 1 (FIG. 1) has two power lines (first power line 2, second power line 3), but the QFP/SFQ interface 200 (FIG. 3) has a simple explanation. It is assumed that one power line (power line 203) is provided to achieve this.
  • the inductor Lx1 and the inductor L1 provided in the circuit element 205 are magnetically coupled by a coupling constant k1.
  • Inductor Lx2 and inductor L2 provided in circuit element 204 are magnetically coupled by coupling constant k2.
  • a Josephson junction J1 is provided in circuit element 205 .
  • a Josephson junction J2 is provided in circuit element 204 .
  • the input signal line 201 corresponds to the first input signal line 51 in FIG.
  • the first input current Iin corresponds to the first input current Iin in FIG.
  • Inductor Lin and inductor Lq provided in circuit element 202 are magnetically coupled by coupling constant kin.
  • a current flows through the circuit element 202 according to the first input current Iin flowing through the input signal line 201 .
  • a pair of Josephson junctions, Josephson junction J1 and Josephson junction J2 determine a logic state in response to a first input current Iin flowing through input signal line 201. At the same time, it converts the first input current Iin into the voltage pulse signal Vout.
  • the Josephson junction J2 switches to generate a voltage pulse, and the output signal line 206 outputs the voltage pulse signal Vout.
  • the first input current Iin is positive (logical state "1")
  • the Josephson junction J1 switches and the voltage pulse signal Vout is not output to the output end of the output signal line 206.
  • FIG. thus, in the QFP/SFQ interface 200, the first input current Iin is converted into the voltage pulse signal Vout.
  • the voltage pulse generated by switching the Josephson junction here is output from the output end of the output signal line 206 via the resistor Rif and the inductor L3 as the voltage pulse signal Vout. Note that the output signal line 206 corresponds to the first output signal line 71 in FIG.
  • FIG. 4 is a diagram showing an example of a QFP/SFQ interface 200A, which is the circuit configuration of the QFP/SFQ interface 61 or QFP/SFQ interface 62 according to this embodiment. Comparing QFP/SFQ interface 200A (FIG. 4) and QFP/SFQ interface 200 (FIG. 3), signal current line 206A, bias current line 207A, circuit element 208A, circuit element 209A, and circuit element 210A are different. Bias current line 207A, circuit element 208A, circuit element 209A, and circuit element 210A amplify the voltage pulse signal at QFP/SFQ interface 200 (FIG. 3).
  • a voltage pulse generated via the Josephson junction J1 and the Josephson junction J2 is converted into a current by a resistor Rif and an inductor L3 provided in the signal current line 206A and output to the circuit element 208A.
  • the circuit element 208A includes an inductor L4, an inductor L5, and an inductor L6.
  • a circuit element 209A provided with a Josephson junction J3 is connected between inductors L4 and L5.
  • a circuit element 210A provided with a Josephson junction J4 is connected between inductors L5 and L6.
  • the Josephson Junction J1 and Josephson junction J2 are arranged to generate a voltage pulse signal Vout.
  • the qubit control circuit 1 may comprise an SFQ circuit instead of the QFP/SFQ interface. In that case, the quantum bit control circuit 1 generates a pulse train using the SFQ circuit.
  • the qubit control circuit 1 connects the superconducting circuit other than the QFP/SFQ interface and the SFQ circuit to the QFP/SFQ interface (QFP/SFQ interface 61, QFP/SFQ interface 62 ) may be provided instead.
  • the QFP/SFQ interface 62 is connected to the first power supply line 2, the third power supply line 4, the second input signal line 52, and the second output signal line 72.
  • An example in which the interface 62 generates the second SFQ pulse train Vclk with a repetition frequency corresponding to the frequency of the first excitation current Ilo based on the first excitation current Ilo and the DC offset current Idc has been described. Not limited.
  • a circuit other than the QFP/SFQ interface 62 may be provided instead of the QFP/SFQ interface 62 as long as the superconducting circuit generates the second SFQ pulse train Vclk with a repetition frequency corresponding to the frequency of the first excitation current Ilo. .
  • the first power supply line 2 through which the first excitation current Ilo flows to the circuit in order to reduce the number of cables.
  • the third power supply line 4 and the second input signal line 52 are not connected, and based on the first excitation current Ilo, the second SFQ pulse train Vclk having a repetition frequency corresponding to the frequency of the first excitation current Ilo is applied to the superconducting circuit. may be provided in place of the QFP/SFQ interface 62.
  • the first power line 2, the third power line 4, and the second input signal line 52 are not connected, and the superconducting circuit generates the second SFQ pulse train Vclk having a repetition frequency corresponding to the frequency of the first excitation current Ilo.
  • a circuit may be provided instead of the QFP/SFQ interface 62 .
  • the qubit control circuit 1 includes the D flip-flop 8 to output the output pulse train Vout in which the waveform of the first SFQ pulse train Vin is shaped by the repetition frequency of the second SFQ pulse train Vclk.
  • the first SFQ pulse train Vin is a superconducting circuit that outputs an output pulse train Vout whose waveform is shaped by the repetition frequency of the second SFQ pulse train Vclk
  • the qubit control circuit 1 changes the superconducting circuit other than the D flip-flop 8 to the D flip-flop 8. may be provided instead of
  • the qubit control circuit 1 includes the first power line 2, the second power line 3, the first input signal line 51, and the first pulse train generation circuit (this embodiment). , includes a QFP/SFQ interface 61), a second pulse train generation circuit (QFP/SFQ interface 62 in this embodiment), and an output pulse train generation circuit (D flip-flop 8 in this embodiment).
  • a first excitation current Ilo which is a current of a predetermined frequency, is input to the first power supply line 2 .
  • a second excitation current Ibb which is a current having a predetermined waveform, is input to the second power supply line 3 .
  • a first input signal (first input current Iin in this embodiment) indicating a logic state is input to the first input signal line 51 .
  • the first pulse train generation circuit (in this embodiment, the QFP/SFQ interface 61) generates a first Josephson junction (in this embodiment, for example, the Josephson junctions J1 and J2 shown in FIG. 3).
  • the first Josephson junction In the present embodiment, for example, the pulse train generated by the Josephson junction J1 and Josephson junction J2 shown in FIG. In an embodiment, the first SFQ pulse train Vin) is output.
  • the second pulse train generation circuit (in this embodiment, the QFP/SFQ interface 62) generates a second Josephson junction (in this embodiment, for example, the Josephson junctions J1 and J2 shown in FIG. 3).
  • a pulse train generated by a second Josephson junction (in this embodiment, for example, Josephson junction J1 and Josephson junction J2 shown in FIG. 3) based on the frequency of the first excitation current Ilo, outputs a second pulse train (second SFQ pulse train Vclk in this embodiment) having a repetition frequency corresponding to the frequency of the first excitation current Ilo.
  • the output pulse train generation circuit (D flip-flop 8 in this embodiment) includes a third Josephson junction (not shown in this embodiment and provided in the SFQ circuit), and the first pulse train ( In this embodiment, the first SFQ pulse train Vin) outputs an output pulse train Vout waveform-shaped by the repetition frequency of the second pulse train (in this embodiment, the second SFQ pulse train Vclk).
  • the logic circuit for outputting the output pulse train Vout having a repetition frequency corresponding to the predetermined frequency of the first excitation current Ilo is configured by a superconducting circuit, so heat generation is suppressed. It can be realized by circuit configuration. Since the quantum bit control circuit 1 according to this embodiment has a circuit configuration that suppresses heat generation, it can be arranged in a refrigerator. That is, according to the qubit control circuit 1 according to the present embodiment, even a circuit that performs a relatively complicated operation can be configured in the refrigerator. can be reduced.
  • the qubit control circuit 1 can be used as a circuit that constitutes a qubit control circuit that can control a large number of qubits with a small number of cables. A specific example of a qubit control circuit capable of controlling a large number of qubits with a small number of cables will be described in the second embodiment.
  • FIG. 5 is a diagram showing an example of the configuration of the quantum bit control circuit 1A according to this embodiment.
  • the qubit control circuit 1A includes a first power supply line 2A, a second power supply line 3A, a resonance circuit 11A (resonance circuit 11A-1, resonance circuit 11A-2, resonance circuit 11A-3), and an SFQ pulse generator 4A ( SFQ pulse generator 4A-1, SFQ pulse generator 4A-2, SFQ pulse generator 4A-3).
  • the first power line 2A is a power line to which the first excitation current Ilo is input.
  • the first excitation current Ilo is a current containing multiple frequencies. In other words, the first excitation current Ilo includes multiple frequencies.
  • the plurality of frequencies included in the first excitation current Ilo are respectively frequencies corresponding to the qubits 12A-1, 12A-2, and 12A-3 to be controlled by the qubit control circuit 1A.
  • the first excitation current Ilo includes, for example, three frequencies: frequency f1, frequency f2, and frequency f3.
  • the first power line 2A includes an inductor L1-1, an inductor L1-2, and an inductor L1-3.
  • the second power line 3A is a power line to which the second excitation current Ibb is input.
  • the second excitation current Ibb is a current with a predetermined waveform.
  • the second excitation current Ibb is a baseband signal supplied as an output signal from the baseband circuit.
  • the waveform of the second excitation current Ibb flowing through the second power supply line 3A is, for example, a triangular wave like the waveform of the second excitation current Ibb flowing through the second power supply line 3 shown in FIG.
  • the second power line 3A includes an inductor L4-1, an inductor L4-2, and an inductor L4-3.
  • the resonant circuit 11A-1, resonant circuit 11A-2, and resonant circuit 11A-3 each extract a specific frequency from multiple frequencies contained in the first excitation current Ilo by resonance.
  • the resonance circuits 11A-1, 11A-2, and 11A-3 have the same function except that they have different resonance frequencies. Therefore, the resonance circuit 11A-1 will be described below, and the description of the resonance circuits 11A-2 and 11A-3 will be omitted.
  • the resonance circuit 11A-1 is a circuit that resonates at a predetermined frequency (resonance frequency).
  • the resonance frequency is equal to one of the frequencies included in the first excitation current Ilo.
  • the resonant circuit 11A-1 is, for example, an LC circuit.
  • the resonance circuit 11A-1 includes an inductor L2-1 and an inductor L3-1.
  • Inductor L2-1 is magnetically coupled with inductor L1-1 provided in first power supply line 2A.
  • Inductor L3-1 is magnetically coupled with inductor L5-1 provided in SFQ pulse generator 4A-1.
  • the resonance circuit 11A-1 When the first excitation current Ilo flows through the first power supply line 2A, the resonance circuit 11A-1 generates a plurality of currents included in the first excitation current Ilo by magnetic coupling between the inductors L2-1 and L1-1. A current of a frequency that resonates itself among the frequencies flows. Therefore, the resonance circuit 11A-1 extracts the same frequency as its own resonance frequency from among a plurality of frequencies contained in the first excitation current Ilo flowing through the first power supply line 2A. In the following description, the current having the resonance frequency flowing through the resonance circuit 11A-1 is referred to as component excitation current Ir1.
  • the SFQ pulse generator 4A (SFQ pulse generator 4A-1, SFQ pulse generator 4A-2, SFQ pulse generator 4A-3) is a pulse generator that generates an SFQ pulse train.
  • the SFQ pulse generator 4A-1, the SFQ pulse generator 4A-2, and the SFQ pulse generator 4A-3 have similar functions except that the resonance frequencies of the resonance circuits to which they are coupled are different. Therefore, the SFQ pulse generator 4A-1 will be described below, and the description of the SFQ pulse generators 4A-2 and 4A-3 will be omitted.
  • the SFQ pulse generator 4A-1 is a pulse generator having the same configuration as the quantum bit control circuit 1 shown in FIG. In FIG. 5, the magnetic coupling between the SFQ pulse generator 4A-1 and other circuit elements is abstracted by an inductor L5-1.
  • the SFQ pulse generator 4A-1 outputs an output pulse train Vout1 based on the first excitation current Ilo, the second excitation current Ibb, and the input current Iin1.
  • the input current Iin1 corresponds to the first input current Iin shown in FIG.
  • the component excitation current Ir1 flows through the resonance circuit 11A-1 and the second excitation current Ibb flows through the second power supply line 3A. Due to the magnetic coupling between L3-1 and the magnetic coupling between inductor L5-1 and inductor L4-1 provided in second power supply line 3A, input current Iin1 input to an input signal line (not shown) An output pulse train Vout1 generated accordingly is output.
  • inductors L3-1 and L5-1 the fact that the resonance circuit 11A-1 and the SFQ pulse generator 4A-1 are magnetically coupled is represented by inductors L3-1 and L5-1, and the SFQ pulse generator 4A- 1 (corresponding to the QFP/SFQ interfaces 61 and 62 shown in FIG. 1) included in a plurality of inductors (inductors L1 and L2 shown in FIG. 3 or 4). It is indicated abstractly by L5-1.
  • the fact that the second power supply line 3A and the SFQ pulse generator 4A-1 are magnetically coupled is represented by an inductor L4-1 and an inductor L5-1, and the SFQ pulse generator 4A- 1 (corresponding to the QFP/SFQ interfaces 61 and 62 shown in FIG. 1) included in a plurality of inductors (inductors L1 and L2 shown in FIG. 3 or 4). It is indicated abstractly by L5-1.
  • the input current Iin1 is supplied from a circuit provided separately from the qubit control circuit 1A.
  • two input signals (the first input current Iin and the second input current I1) are input, whereas the SFQ pulse generator 4A- shown in FIG. 1 shows only one input signal (input current Iin1).
  • Two input signals are input to the SFQ pulse generator 4A-1 shown in FIG. 5 as well as the quantum bit control circuit 1 shown in FIG.
  • the input current Iin1 indicates the one of the two input signals whose logic state is not fixed (that is, the input signal corresponding to the first input current Iin).
  • the other of the two input signals is fixed to logic state "1" like the second input current I1.
  • only one of the two input signals (input current Iin2, input current Iin3, respectively) is shown for each of the SFQ pulse generators 4A-2 and 4A-3.
  • An output pulse train Vout1 having a repetition frequency f1 output by the SFQ pulse generator 4A-1 is applied to the quantum bit 12A-1.
  • the repetition frequency f1 of the output pulse train Vout1 is the same as the frequency f1 extracted by the resonance circuit 11A-1 from the frequency-multiplexed first excitation current Ilo. That is, the SFQ pulse generator 4A-1 outputs, as an output signal, a pulse train having the same repetition frequency f1 as the frequency f1 extracted from the first excitation current Ilo by the resonance circuit 11A-1.
  • the output pulse train Vout2 with repetition frequency f2 output by the SFQ pulse generator 4A-2 is applied to the quantum bit 12A-2.
  • the repetition frequency f2 of the output pulse train Vout2 is the same as the frequency f2 extracted by the resonance circuit 11A-2 from the frequency-multiplexed first excitation current Ilo.
  • an output pulse train Vout3 with repetition frequency f3 output by the SFQ pulse generator 4A-3 is applied to the quantum bit 12A-3.
  • the repetition frequency f3 of the output pulse train Vout3 is the same as the frequency f3 extracted by the resonance circuit 11A-3 from the frequency-multiplexed first excitation current Ilo.
  • the on and off of the output pulse train Vout1, the output pulse train Vout2, and the output pulse train Vout3 are controlled by the logic states indicated by the input currents Iin1, Iin2, and Iin3, respectively.
  • the number of pulses included in the output pulse train Vout1, the output pulse train Vout2, or the output pulse train Vout3 can be controlled by adjusting the amplitude of each frequency component included in the first excitation current Ilo. can. That is, in the qubit control circuit 1A, the number of pulses included in each output pulse train can be controlled by the spectrum of the first excitation current Ilo.
  • FIG. 6 is a diagram showing an example of simulation results by the quantum bit control circuit 1A according to this embodiment.
  • the simulation results shown in FIG. 6 are results for the case where the first excitation current Ilo contains two frequencies.
  • the value of each physical quantity is shown for 65 nanoseconds.
  • the first excitation current Ilo includes two frequencies of 4.5 GHz and 5 GHz.
  • the frequency of the component excitation current Ir1 that flows through resonance in the resonance circuit 11A-1 is 4.5 GHz.
  • the frequency of the component excitation current Ir2 that flows through resonance in the resonance circuit 11A-2 is 5 GHz.
  • the second excitation current Ibb is a triangular wave.
  • the values of the first excitation current Ilo, the component excitation current Ir1, the component excitation current Ir2, and the second excitation current Ibb are expressed in arbitrary units.
  • An input current Iin1 input to the SFQ pulse generator 4A-1 indicates a logic state of "0, 0, 1, 1" as an example.
  • An input current Iin2 inputted to the SFQ pulse generator 4A-2 indicates a logic state of "0, 1, 0, 1" as an example.
  • the unit of each value of the input current Iin1 and the input current Iin2 is 20 ⁇ A/tick.
  • the output pulse train Vout1 is generated based on the 4.5 GHz frequency component included in the first excitation current Ilo, the second excitation current Ibb, and the input current Iin1.
  • the output pulse train Vout1 is generated in a period corresponding to the period in which the logic state indicated by the input current Iin1 is "1".
  • the repetition frequency of the output pulse train Vout1 is 4.5 GHz according to the 4.5 GHz frequency component contained in the first excitation current Ilo.
  • the output pulse train Vout2 is generated based on the 5 GHz frequency component included in the first excitation current Ilo, the second excitation current Ibb, and the input current Iin2.
  • the output pulse train Vout2 is generated in a period corresponding to the period in which the logic state indicated by the input current Iin2 is "1".
  • the repetition frequency of the output pulse train Vout2 is 5 GHz according to the 5 GHz frequency component contained in the first excitation current Ilo.
  • the unit of each value of the output pulse train Vout1 and the output pulse train Vout2 is 200 ⁇ V/tick.
  • the input current Iin1 is the one whose logic value is not fixed among the two input signals input to the SFQ pulse generator 4A-1, and the logic value of the other is fixed.
  • FIG. 6 shows the simulation results when the logic value of the other input signal is "1". Since the logic state of the other input signal is fixed at "1", when the logic value of the input current Iin1 is "1", the output pulse train Vout1 is output and the logic value of the input current Iin1 is "0". , the output pulse train Vout1 is not output. The same applies to the relationship between the input current Iin2 and the output pulse train Vout2.
  • the number of pulses in the output pulse train can be controlled by the spectrum of the first excitation current Ilo.
  • FIG. 7 is a diagram showing an example of the relationship between the spectrum of the first excitation current Ilo and the number of pulses in the output pulse train according to this embodiment.
  • the amplitude of the 5 GHz frequency component is reduced in the first excitation current Ilo shown in FIG. 7 compared to the first excitation current Ilo shown in FIG.
  • the power of the 5 GHz frequency component is -51.4 dBm for the first excitation current Ilo shown in FIG. 6, whereas it is -52.9 dBm for the first excitation current Ilo shown in FIG.
  • the amplitude of the 4.5 GHz frequency component is -51.9 dBm for both the first excitation current Ilo shown in FIG. 6 and the first excitation current Ilo shown in FIG.
  • the number of pulses in the output pulse train Vout2 is reduced in accordance with the reduction in the amplitude of the 5 GHz frequency component included in the first excitation current Ilo.
  • the reason why the number of pulses of the output pulse train Vout2 is reduced here is that the threshold of the second excitation current Ibb for outputting the output pulse train Vout2 is increased. Since the amplitude of the 4.5 GHz frequency component contained in the first excitation current Ilo is not changed, the number of pulses in the output pulse train Vout1 is not changed.
  • the first excitation current Ilo input to the first power supply line 2A has a plurality of frequencies (frequency f1, f2 , the frequency of frequency f3).
  • the qubit control circuit 1A according to this embodiment includes a first pulse train generation circuit (not shown in this embodiment and corresponding to the QFP/SFQ interface 61 in FIG. 1) and a second pulse train generation circuit (in this embodiment , not shown, corresponding to the QFP/SFQ interface 62 in FIG. 1) and an output pulse train generation circuit (not shown in this embodiment, corresponding to the D flip-flop 8 in FIG.
  • an SFQ pulse generator 4A and a resonance circuit 11A are provided for each of a plurality of frequencies (frequency f1, frequency f2, and frequency f3 in this embodiment).
  • the resonant circuit (resonant circuit 11A-1, resonant circuit 11A-2, and resonant circuit 11A-3 in this embodiment) has a plurality of frequencies included in the first excitation current Ilo (in this embodiment, frequency f1, frequency f2 , frequency f3), and the resonance frequency is set as the frequency of the first excitation current Ilo in the first pulse train generation circuit (not shown in this embodiment, QFP in FIG. 1). /SFQ interface 61) and a second pulse train generation circuit (not shown in this embodiment, corresponding to the QFP/SFQ interface 62 in FIG. 1).
  • the number of cables required for controlling the qubits is two, the first power supply line 2A and the second power supply line 3A, regardless of the number of qubits. Because it is a book, a small number of cables can control a large number of qubits. Here, a small number of cables means a small number compared to the number of quantum bits to be controlled.
  • the frequencies included in the first excitation current Ilo may be one, two, four or more depending on the number of qubits to be controlled.
  • the qubit control circuit includes a set of a first pulse train generation circuit, a second pulse train generation circuit, and an output pulse train generation circuit equal to or greater than the number of frequencies included in the first excitation current Ilo, and a set of a resonance circuit (in this embodiment, , SFQ pulse generator 4A and resonant circuit 11A).
  • a set of a first pulse train generation circuit, a second pulse train generation circuit, and an output pulse train generation circuit provided in the qubit control circuit, and a set of a resonance circuit may not be used. Further, for one frequency included in the first excitation current Ilo, a set of the first pulse train generation circuit, the second pulse train generation circuit, and the output pulse train generation circuit, and a set of the resonance circuit (in this embodiment, A plurality of pairs of the SFQ pulse generator 4A and the resonance circuit 11A) may correspond.
  • the resonance circuit and the power supply line (first power supply line) are magnetically coupled
  • the present invention is not limited to this.
  • the resonant circuit and the power line may be coupled by capacitive coupling.
  • the QFP provided in the qubit control circuit in each of the above-described embodiments may be an adiabatic flux quantum parametron (AQFP) or a directly coupled flux quantum parametron (DQFP).
  • AQFP adiabatic flux quantum parametron
  • DQFP directly coupled flux quantum parametron
  • the electromagnetic waves generated by the quantum bit control circuits 1 and 1A and applied to the controlled object (qubit) are microwaves, but the present invention is not limited to this.
  • the frequency of the electromagnetic wave generated by the quantum bit control circuits 1 and 1A and irradiated to the controlled object (qubit) may be other than the microwave frequency.
  • the quantum bit control circuits 1 and 1A may generate electromagnetic waves with frequencies other than microwave frequencies and irradiate the control target with them.
  • the quantum bit control circuit may be provided with an SFQ circuit in each embodiment.
  • Various logics are known for the SFQ circuit, and when the SFQ circuit is provided in the quantum bit control circuit in each embodiment, any logic may be used for the SFQ circuit.
  • SFQ circuit logic includes, for example, Rapid single-flux-quantum (RSFQ), Low-voltage RSFQ (LV-RSFQ), Energy-efficient RSFQ (ERSFQ), Energy-efficient SFQ (eSFQ), Reciprocal quantum logic (RQL ), Flux shuttle, etc.
  • control target of the quantum bit control circuit is a quantum bit
  • the invention is not limited to this.
  • a control object other than the quantum bit may be controlled by a circuit having the same configuration as the quantum bit control circuit according to each of the embodiments described above.
  • Control objects other than quantum bits are, for example, various components that make up a circuit of a quantum computer.

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