WO2023159514A1 - 发光器件和发光装置 - Google Patents

发光器件和发光装置 Download PDF

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Publication number
WO2023159514A1
WO2023159514A1 PCT/CN2022/078077 CN2022078077W WO2023159514A1 WO 2023159514 A1 WO2023159514 A1 WO 2023159514A1 CN 2022078077 W CN2022078077 W CN 2022078077W WO 2023159514 A1 WO2023159514 A1 WO 2023159514A1
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Prior art keywords
light
emitting device
type semiconductor
layer
semiconductor layer
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PCT/CN2022/078077
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English (en)
French (fr)
Inventor
梁轩
王飞
王明星
王灿
董学
齐琪
杨明坤
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京东方科技集团股份有限公司
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Priority to CN202280000310.6A priority Critical patent/CN116964758A/zh
Priority to PCT/CN2022/078077 priority patent/WO2023159514A1/zh
Publication of WO2023159514A1 publication Critical patent/WO2023159514A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/08—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body

Definitions

  • Embodiments of the present disclosure relate to but are not limited to the field of display technology, and in particular, relate to a light emitting device and a light emitting device.
  • a high-voltage light-emitting diode is a current-type light-emitting element, and its driving current is much smaller than that of a conventional light-emitting diode. Therefore, the power consumption of a high-voltage light-emitting diode with the same output power is much smaller than that of a conventional light-emitting diode; in addition, a high-voltage light-emitting diode can Greatly reduce AC/DC conversion efficiency loss.
  • An embodiment of the present disclosure provides a light-emitting device, the light-emitting device includes at least two epitaxial structures arranged in series along a first direction, and two layers of current diffusion layers and a transparent adhesive layer are arranged between two adjacent epitaxial structures , and each of the two adjacent epitaxial structures is provided with a current spreading layer on one side, the transparent adhesive layer is arranged between the two current spreading layers, and in the transparent adhesive layer Metal nanoparticles are provided, wherein each epitaxial structure includes an N-type semiconductor layer, a multi-quantum well layer and a P-type semiconductor layer stacked in sequence along the first direction.
  • the material of the metal nanoparticles may include any one or more of materials such as nickel, silver, and gold.
  • the metal nanoparticles may have a diameter of 5 nm to 100 nm.
  • the metal nanoparticles may be distributed in a single layer of particles in the transparent adhesive layer.
  • the total volume of the metal nanoparticles may account for 10% to 60% of the volume of the transparent adhesive layer.
  • the light-emitting surface of the light-emitting device may have an optical micro-nano structure or the light-emitting surface of the light-emitting device may be provided with an optical micro-nano structure.
  • the optical micro-nano structure may include any one or more of microcones, microspheres, microcolumns and microgratings.
  • the microcones may be distributed in an array.
  • the microspheres may be distributed in an array.
  • the micropillars may be distributed in an array.
  • the micro-grating includes a plurality of protrusions, and the plurality of protrusions may be sequentially arranged along a second direction and extend along a third direction, and the second direction is the same as the third direction. direction cross.
  • the micro-pyramids may include any one or more of triangular micro-pyramids and quadrangular micro-pyramids.
  • the micropillars may include any one or more of micropillars and microsquare pillars.
  • the convex cross-sectional shape of the micro-grating may include any one or more of a triangle and a square.
  • the characteristic size a of the optical micro-nano structure may be 2nm to 800nm, the period P may be 20nm to 1000nm, the duty ratio a/P may be 10% to 80%, and the height H may be 20nm to 400nm.
  • the material of the current spreading layer may be a material that is transparent and conductive and capable of forming an ohmic contact with any one of the P-type semiconductor layers of the epitaxial structure or any one of the N-type semiconductor layers of the epitaxial structure.
  • the current spreading layer may have a thickness of 50nm to 250nm.
  • the thickness of the transparent adhesive layer may be substantially consistent with the diameter of the metal nanoparticles.
  • the transparent adhesive layer may have a thickness of 5 nm to 100 nm. .
  • the material of the transparent adhesive layer may include any one or more of optical adhesives such as transparent optical acrylic adhesive, benzocyclobutene adhesive, and epoxy resin.
  • the number of the epitaxial structures may be 2 to 5.
  • the light emitted by at least two epitaxial structures may be in the same wavelength band, or may be in different wavelength bands.
  • the at least two epitaxial structures include any one or more of an epitaxial structure capable of emitting red light, an epitaxial structure capable of emitting green light, and an epitaxial structure capable of emitting blue light.
  • the material of the N-type semiconductor layer may include any one or more of N-type AlInGaP and GaAs, and the N-type
  • the thickness of the semiconductor layer can be 0.5 ⁇ m to 3 ⁇ m
  • the material of the multiple quantum well layer can include any one or more of indium gallium nitride, gallium nitride and aluminum indium gallium phosphide, and the thickness of the multiple quantum well layer It may be 50nm to 150nm
  • the material of the P-type semiconductor layer may include any one or more of P-type AlInGaP and GaAs, and the thickness of the P-type semiconductor layer may be 100nm to 200nm.
  • the material of the N-type semiconductor layer may include N-type gallium nitride, and the thickness of the N-type semiconductor layer may be 0.5 ⁇ m to 3 ⁇ m;
  • the The material of the multi-quantum well layer may include any one or more of indium gallium nitride and gallium nitride, and the thickness of the multi-quantum well layer may be 50nm to 150nm;
  • the material of the P-type semiconductor layer may include P-type Gallium nitride, the thickness of the P-type semiconductor layer can be 100nm to 200nm; or,
  • the material of the N-type semiconductor layer may include N-type gallium nitride, and the thickness of the N-type semiconductor layer may be 0.5 ⁇ m to 3 ⁇ m;
  • the material of the quantum well layer may include any one or more of indium gallium nitride and gallium nitride, and the thickness of the multiple quantum well layer may be 50nm to 150nm;
  • the material of the P-type semiconductor layer may include P-type nitrogen gallium chloride, the thickness of the P-type semiconductor layer may be 100nm to 200nm.
  • the light emitting device may further include a first electrode and a second electrode; wherein, the first electrode is connected to the outermost P-type semiconductor layers of at least two epitaxial structures, and the second electrode It is connected with the outermost N-type semiconductor layers of at least two epitaxial structures.
  • An embodiment of the present disclosure also provides a light emitting device, the light emitting device includes the above light emitting device.
  • FIG. 1 is a schematic structural view of horizontally connected light-emitting devices
  • Fig. 2 is a top view and a partial front view of a light-emitting device having or being provided with triangular microcones on the light-emitting surface of an exemplary embodiment of the present disclosure
  • Fig. 3 is a top view and a partial front view of a light-emitting device having or being provided with quadrangular micro-cones on the light-emitting surface of an exemplary embodiment of the present disclosure
  • Fig. 4 is a top view and a partial front view of a light-emitting device having or being provided with microspheres on the light-emitting surface of an exemplary embodiment of the present disclosure
  • Fig. 5 is a top view and a partial front view of a light-emitting device having or being provided with micro cylinders on the light-emitting surface of an exemplary embodiment of the present disclosure
  • Fig. 6 is a top view and a partial front view of a light-emitting device having or being provided with micro-square pillars on the light-emitting surface of an exemplary embodiment of the present disclosure
  • Fig. 7 is a top view and a partial front view of a light-emitting device having or being provided with a micro-grating with a triangular convex section on the light-emitting surface of an exemplary embodiment of the present disclosure
  • Fig. 8 is a top view and a partial front view of a light-emitting device having or being provided with a raised micro-grating with a square cross-section on the light-emitting surface of an exemplary embodiment of the present disclosure
  • FIG. 9 is one of the structural schematic diagrams of a light emitting device according to an exemplary embodiment of the present disclosure.
  • Fig. 10 is a second structural schematic diagram of a light emitting device according to an exemplary embodiment of the present disclosure.
  • Fig. 11 is a third structural schematic diagram of a light emitting device according to an exemplary embodiment of the present disclosure.
  • FIG. 12 is a flow chart of a manufacturing process of a light emitting device according to an exemplary embodiment of the present disclosure.
  • Fig. 1 is a schematic structural diagram of horizontally connected light emitting devices.
  • the light-emitting device in horizontal series includes a plurality of sub-light-emitting units 2 (including N-type semiconductor layer 01, multiple quantum well layer 02 and P-type semiconductor layer 03) arranged on a substrate 1 (such as a sapphire substrate).
  • a substrate 1 such as a sapphire substrate.
  • P electrode sheet 3, N electrode sheet 4, etc., a plurality of sub-light emitting units 2 are connected together in horizontal series, so the chip size is often relatively large.
  • An embodiment of the present disclosure provides a light-emitting device, the light-emitting device includes at least two epitaxial structures arranged in series along a first direction, and two layers of current diffusion layers and a transparent adhesive layer are arranged between two adjacent epitaxial structures , and each of the two adjacent epitaxial structures is provided with a current spreading layer on one side, the transparent adhesive layer is arranged between the two current spreading layers, and in the transparent adhesive layer Metal nanoparticles are provided, wherein each epitaxial structure includes an N-type semiconductor layer, a multi-quantum well layer and a P-type semiconductor layer stacked in sequence along the first direction.
  • N-type semiconductor layer can transport electrons, also called electron transport layer
  • MQW multi-quantum well layer
  • P-type semiconductor layer can transport holes, also called hole transport layer
  • the quantum well layer can emit light.
  • At least two epitaxial structures are connected in series along the first direction, so that the driving current can be reduced while achieving the same luminous brightness, and Joule heat can be reduced without increasing the area of the light-emitting device.
  • the driving current can be reduced while achieving the same luminous brightness, and Joule heat can be reduced without increasing the area of the light-emitting device.
  • the light-emitting device of the embodiment of the present disclosure meets the requirements of a high-voltage light-emitting diode chip, and can be used as a high-voltage light-emitting diode chip.
  • the metal nanoparticles in the transparent adhesive layer can realize good electrical connection with two adjacent current diffusion layers, and can improve the light transmittance on the surface of the light-emitting device.
  • the material of the metal nanoparticles may include any one or more of materials such as nickel, silver, and gold.
  • the metal nanoparticles may have a diameter on a sub-wavelength scale. Metal nanoparticles with sub-wavelength scale diameters can improve the light transmittance of the transparent adhesive layer and the light extraction efficiency of the light-emitting device.
  • the metal nanoparticles may have a diameter of 5 nm to 100 nm.
  • the metal nanoparticles may be distributed in a single layer of particles in the transparent adhesive layer.
  • the total volume of the metal nanoparticles may account for 10% to 60% of the volume of the transparent adhesive layer.
  • the light-emitting surface of the light-emitting device may have an optical micro-nano structure or the light-emitting surface of the light-emitting device may be provided with an optical micro-nano structure.
  • the structure is directly arranged on the side of the light-emitting surface, or the medium layer of the optical micro-nano structure can be set on the side of the light-emitting surface first, and then the optical micro-nano structure is set on the side of the medium layer away from the light-emitting surface; the optical micro-nano structure set separately
  • the material may include any one or more of metal, silicon oxide and silicon nitride; the material of the dielectric layer may include any one or more of metal, silicon oxide and silicon nitride.
  • Multiple epitaxial structures connected in series in the first direction have a unified light-emitting surface, and better light-emitting effects can be achieved by setting the light-emitting surface as an optical micro-nano structure or by arranging an optical micro-nano structure on the light-emitting surface.
  • the optical micro-nano structure may include any one or more of microcones, microspheres, microcolumns and microgratings.
  • the microcones may be distributed in an array.
  • the microspheres may be distributed in an array.
  • the micropillars may be distributed in an array.
  • the micro-grating includes a plurality of protrusions, and the plurality of protrusions may be sequentially arranged along a second direction and extend along a third direction, and the second direction is the same as the third direction. direction cross.
  • the micro-pyramids may include any one or more of triangular micro-pyramids and quadrangular micro-pyramids.
  • the micropillars may include any one or more of micropillars and microsquare pillars.
  • the convex cross-sectional shape of the micro-grating may include any one or more of a triangle and a square.
  • Fig. 2 is a top view and a partial front view of a light-emitting device with or provided with a triangular microcone on the light-emitting surface of an exemplary embodiment of the present disclosure
  • Fig. 3 is a light-emitting device with or provided with a quadrangular microcone on the light-emitting surface of an exemplary embodiment of the present disclosure
  • FIG. 4 is a top view and a partial front view of a light-emitting device with or provided with microspheres on the light-emitting surface of an exemplary embodiment of the present disclosure
  • FIG. 4 is a top view and a partial front view of a light-emitting device with or provided with microspheres on the light-emitting surface of an exemplary embodiment of the present disclosure
  • FIG. 5 is a top view and a partial front view of a light-emitting surface of an exemplary embodiment of the present disclosure. Or a top view and a partial front view of a light-emitting device provided with micro-columns;
  • FIG. 6 is a top view and a partial front view of a light-emitting device with or provided with micro-square columns on the light-emitting surface of an exemplary embodiment of the present disclosure;
  • FIG. 7 is an example of the present disclosure The top view and partial front view of the light-emitting device whose light-emitting surface has or is provided with a micro-grating with a raised cross-section of a triangular shape;
  • FIG. 8 is a light-emitting surface of an exemplary embodiment of the present disclosure.
  • the top view and partial front view of the light-emitting device of the micro-grating among them, the left picture is the top view, the right picture is the partial front view, a in the figure represents the characteristic size of the optical micro-nano structure, P represents the period of the optical micro-nano structure, and H represents The height of optical micro-nanostructures.
  • the characteristic size a of the optical micro-nano structure may be 2nm to 800nm, the period P may be 20nm to 1000nm, the duty ratio a/P may be 10% to 80%, and the height H may be 20nm to 400nm.
  • the material of the current spreading layer may be a material that is transparent and conductive and capable of forming an ohmic contact with any one of the P-type semiconductor layer or the N-type semiconductor layer of the epitaxial structure, for example, the material of the current spreading layer It may include any one or more of materials such as indium tin oxide (Indium Tin Oxide, ITO), indium zinc oxide, nickel, and chromium.
  • ITO Indium Tin Oxide
  • the current spreading layer also called the current spreading layer, can increase the uniformity of chip current spreading, and can be used as an ohmic contact layer between the P-type semiconductor layer and the DBR reflective layer.
  • the current spreading layer may have a thickness of 50nm to 250nm.
  • the thickness of the transparent adhesive layer may be substantially consistent with the diameter of the metal nanoparticles.
  • the transparent adhesive layer may have a thickness of 5 nm to 100 nm.
  • the material of the transparent adhesive layer may include any one or more of optical adhesives such as transparent optical acrylic adhesive, benzocyclobutene adhesive, and epoxy resin.
  • the number of the epitaxial structures may be 2 to 5, for example, may be 2, 3, 4 or 5.
  • the epitaxial structure may respectively include an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer sequentially stacked along the first direction.
  • the light emitted by at least two epitaxial structures may be in the same wavelength band, or may be in different wavelength bands.
  • the at least two epitaxial structures include any one or more of an epitaxial structure capable of emitting red light, an epitaxial structure capable of emitting green light, and an epitaxial structure capable of emitting blue light.
  • the material of the N-type semiconductor layer may include any one or more of N-type AlInGaP and GaAs, and the N-type
  • the thickness of the semiconductor layer may be 0.5 ⁇ m to 3 ⁇ m
  • the material of the multi-quantum well layer may include any one or more of indium gallium nitride, gallium nitride and aluminum indium gallium phosphide with different components, and the multi-quantum well layer
  • the thickness of the well layer may be 50nm to 150nm
  • the material of the P-type semiconductor layer may include any one or more of P-type aluminum indium gallium phosphide and gallium arsenide, and the thickness of the P-type semiconductor layer may be 100nm to 200nm.
  • the material of the N-type semiconductor layer may include N-type gallium nitride, and the thickness of the N-type semiconductor layer may be 0.5 ⁇ m to 3 ⁇ m;
  • the The material of the multi-quantum well layer may include any one or more of indium gallium nitride and gallium nitride with different components, and the thickness of the multi-quantum well layer may be 50nm to 150nm;
  • the material of the P-type semiconductor layer may include P-type gallium nitride, and the thickness of the P-type semiconductor layer may be 100nm to 200nm; or,
  • the material of the N-type semiconductor layer may include N-type gallium nitride, and the thickness of the N-type semiconductor layer may be 0.5 ⁇ m to 3 ⁇ m;
  • the material of the quantum well layer may include any one or more of indium gallium nitride and gallium nitride of different components, and the thickness of the multiple quantum well layer may be 50nm to 150nm;
  • the material of the P-type semiconductor layer may be Including P-type gallium nitride, the thickness of the P-type semiconductor layer may be 100nm to 200nm.
  • the light emitting device may further include a first electrode and a second electrode; wherein the first electrode is connected to the outermost P-type semiconductor layers of the at least two epitaxial structures, and the first electrode The second electrode is connected to the outermost N-type semiconductor layer of the at least two epitaxial structures.
  • the light emitting device may have a length of 5 ⁇ m to 500 ⁇ m and a width of 5 ⁇ m to 500 ⁇ m.
  • the light emitting device may have a flip-chip structure.
  • Fig. 9 is one of the structural schematic diagrams of a light emitting device according to an exemplary embodiment of the present disclosure.
  • the light-emitting device includes three epitaxial structures, which are respectively a first epitaxial structure 10, a second epitaxial structure 20, and a third epitaxial structure 30; the first epitaxial structure 10.
  • the second epitaxial structure 20 and the third epitaxial structure 30 are stacked and arranged in series along a first direction (for example, the up-and-down direction shown in FIG.
  • the first epitaxial structure 10 includes a first N type semiconductor layer 11, the first multi-quantum well layer 12 and the first P-type semiconductor layer 13, and the second epitaxial structure 20 includes the second N-type semiconductor layer 21, the second multi-quantum well layer 22 and the second P-type semiconductor layer Layer 23, the third epitaxial structure 30 includes a third N-type semiconductor layer 31, a third multi-quantum well layer 32 and a third P-type semiconductor layer 33; the first epitaxial structure 10 and the second epitaxial structure 20
  • the first current spreading layer 41 , the first transparent adhesive layer 51 and the second current spreading layer 42 are arranged therebetween, and the third current spreading layer is arranged between the second epitaxial structure 20 and the third epitaxial structure 30 43.
  • the second transparent adhesive layer 52 and the fourth current spreading layer 44; both the first transparent adhesive layer 51 and the second transparent adhesive layer 52 are provided with metal nanoparticles 60;
  • the first multi-quantum well layer 12 is arranged on one side of the first N-type semiconductor layer 11, and the first P-type semiconductor layer 13 is arranged on the first multi-quantum well layer 12 away from the first One side of the N-type semiconductor layer 11, the first current spreading layer 41 is arranged on the side of the first P-type semiconductor layer 13 away from the first N-type semiconductor layer 11, and the first transparent adhesive The layer 51 is arranged on the side of the first current spreading layer 41 away from the first N-type semiconductor layer 11, and the second current spreading layer 42 is arranged on the side of the first transparent adhesive layer 51 away from the first N-type semiconductor layer 11.
  • the second N-type semiconductor layer 21 is arranged on the side of the second current diffusion layer 42 away from the first N-type semiconductor layer 11, and the second multi-quantum well layer 22 is arranged on the side of the second N-type semiconductor layer 21 away from the first N-type semiconductor layer 11, and the second P-type semiconductor layer 23 is arranged on the side of the second multi-quantum well layer 22 away from the first N-type semiconductor layer 11.
  • the third current spreading layer 43 is arranged on the side of the second P-type semiconductor layer 23 away from the first N-type semiconductor layer 11, and the second transparent adhesive
  • the layer 52 is arranged on the side of the third current spreading layer 43 away from the first N-type semiconductor layer 11, and the fourth current spreading layer 44 is arranged on the side of the second transparent adhesive layer 52 away from the first N-type semiconductor layer 11.
  • the third N-type semiconductor layer 31 is arranged on the side of the fourth current diffusion layer 44 away from the first N-type semiconductor layer 11, and the third multi-quantum well layer 32 is arranged on the side of the third N-type semiconductor layer 31 away from the first N-type semiconductor layer 11, and the third P-type semiconductor layer 33 is arranged on the side of the third multi-quantum well layer 32 away from the first N-type semiconductor layer 11.
  • the light emitting device may further include a first electrode and a second electrode; wherein the first electrode is connected to the outermost P-type semiconductor layers of the at least two epitaxial structures, and the first electrode The second electrode is connected to the outermost N-type semiconductor layer of the at least two epitaxial structures.
  • the light emitting device may further include a first electrode and a second electrode; wherein, the light emitting device may have a vertical LED chip structure, at this time, the first electrode is a reflective electrode, and the at least two The first epitaxial structure, the second epitaxial structure to the Nth epitaxial structure are arranged vertically on one side of the reflective electrode in the order of the first epitaxial structure, and the N-type semiconductor layer of the first epitaxial structure is arranged on On one side of the reflective electrode, the second electrode is disposed on one side of the P-type semiconductor layer of the Nth epitaxial structure, and the second electrode may have an optical micro-nano structure.
  • Fig. 10 is a second structural schematic diagram of a light emitting device according to an exemplary embodiment of the present disclosure.
  • the first electrode 70 uses a metal with high reflectivity as the reflective electrode
  • the second electrode 80 can use a metal wire grid structure, so that linearly polarized light can be realized.
  • Fig. 11 is a third structural schematic diagram of a light emitting device according to an exemplary embodiment of the present disclosure.
  • the light emitting device may further include a first electrode and a second electrode; and, the first electrode is an N electrode 70, and the second electrode is a P electrode 80,
  • the P electrode 80 is disposed on one side of the at least two epitaxial structures, and the at least two epitaxial structures are sequentially a first epitaxial structure 10 , a second epitaxial structure 20 , and a third epitaxial structure along a direction close to the P electrode.
  • the N-type semiconductor layer 11 is close to the side of the P electrode 80 and extends to the first N-type semiconductor layer 11 of the first epitaxial structure 10 through the conductive layer 90 (for example, may be a metal conductive layer).
  • the electrode 70 is spaced from the side walls of the multiple quantum well layer 12 of the first epitaxial structure 10 and the first P-type semiconductor layer 13, and the first N-type semiconductor layer 11 of the first epitaxial structure 10 is far away from the P electrode
  • One side of 80 may have or be provided with the optical micro-nano structure.
  • the side of the first N-type semiconductor layer 11 of the first epitaxial structure 10 away from the P electrode 80 may be provided with a microcone structure, which may improve the light extraction efficiency of the light emitting device.
  • the microcone structure can be indirectly arranged on the side of the first N-type semiconductor layer 11 away from the P electrode 80 through a dielectric layer 100, that is, the dielectric layer 100 is arranged on the first N-type semiconductor layer 11. type semiconductor layer 11 away from the side of the P-electrode 80 , and the micro-cone structure is disposed on the side of the dielectric layer 100 away from the P-electrode 80 .
  • the dielectric layer 100 may not be provided, and the optical micro-nano structure may be directly provided on the side of the first N-type semiconductor layer 11 away from the P-electrode 80 .
  • the light emitting device further includes a substrate on which at least two epitaxial structures are disposed, and the substrate may be sapphire.
  • the base material of the blue and green light chips is sapphire; in the red light chip, the base material of the base material is GaAs, which is then bonded to the sapphire substrate and the GaAs is peeled off.
  • the substrate may be a patterned sapphire substrate (Patterned Sapphire Substrate, PSS).
  • PSS Plasma-Sed Sapphire Substrate
  • N-type semiconductor material or P-type semiconductor material on the sapphire substrate has a large dislocation density, resulting in low internal quantum efficiency of the light-emitting device.
  • the dislocation density can be reduced. Improve the photon escape probability in the active area.
  • the light-emitting device may further include a buffer layer (Buffer Layer), which may be disposed between the substrate and the epitaxial structure, and GaN or AlN materials may be used, so that it may be an N-type semiconductor material or
  • Buffer Layer buffer layer
  • GaN or AlN materials may be used, so that it may be an N-type semiconductor material or
  • the growth of P-type semiconductor materials provides nucleation centers, which promotes the three-dimensional island growth of N-type semiconductor materials or P-type semiconductor materials into two-dimensional lateral growth, and reduces the dislocation density.
  • the light emitting device may further include a current blocking layer (Current Blocking Layer, CBL).
  • CBL Current Blocking Layer
  • the current blocking layer can prevent current crowding at the P-type electrode, further improving the current spreading performance.
  • the light emitting device may further include a Distributed Bragg Reflector (DBR).
  • DBR Distributed Bragg Reflector
  • the Bragg reflector is a periodic thin film structure composed of two high and low refractive index materials alternately arranged. By adjusting the refractive index and thickness of the material, the position of the energy gap can be changed to adapt to different wavelengths.
  • the Bragg reflector may be arranged on a side of the current diffusion layer farthest from the substrate away from the substrate.
  • Embodiments of the present disclosure also provide a method for manufacturing the above-mentioned light-emitting device.
  • FIG. 12 is a flow chart of a manufacturing process of a light emitting device according to an exemplary embodiment of the present disclosure. As shown in Figure 12, the preparation method comprises:
  • S10 providing an epitaxial wafer, and disposing a current diffusion layer on the P-type semiconductor layer of the epitaxial wafer;
  • step S50 The second epitaxial wafer 20' with the second current spreading layer 42 disposed on one side of the second N-type semiconductor layer 21 and the epitaxial wafer with the first transparent adhesive layer 51 obtained in step S40 are bonded to each other. High pressure bonding and curing;
  • S60 Make the metal nanoparticles 60 contact with the second current diffusion layer 42 to realize electrical connection, and obtain a light emitting device including two epitaxial structures.
  • the preparation method may further include:
  • steps S20 to S60 continue to introduce the third epitaxial wafer 30' to the Nth epitaxial wafer, so as to obtain the light emitting device including N epitaxial structures obtained in step S60.
  • the process conditions of the annealing process may include: the annealing temperature may be 400°C to 1200°C, for example, it may be 400°C, 500°C, 600°C, 700°C, 800°C, 900°C, 1000°C, 1100°C, 1200°C; the annealing time can be 1 min to 5 min, for example, 1 min, 2 min, 3 min, 4 min, 5 min.
  • the pressure required for the bonding may be 0 to 2 MPa, for example, may be 0 MPa, 0.5 MPa, 1 MPa, 1.5 MPa, 2 MPa.
  • the curing temperature may be 150°C to 350°C, for example, 150°C, 200°C, 250°C, 300°C, 350°C; the curing time may be 0 to 1.5 hours, for example, can be 0 hours, 0.5 hours, 0.75 hours, 1 hour, 1.25 hours, 1.5 hours.
  • the metal nanoparticles in the transparent adhesive layer can achieve a good electrical connection with the two adjacent current diffusion layers, and can improve the light transmittance on the surface of the light-emitting device; when the P-type semiconductor layer is thin, it can also The internal quantum efficiency of the light emitting device can be improved.
  • the nano-metal layer may be formed by deposition.
  • the current spreading layer may be formed by deposition.
  • the thickness of the transparent bonding glue coated in step S40 may be greater than the diameter of the metal nanoparticles, but the thickness of the transparent adhesive layer formed after bonding and curing is substantially the same as the diameter of the metal nanoparticles. unanimous.
  • the preparation method may further include: setting the light-emitting surface of the light-emitting device as an optical micro-nano structure or disposing an optical micro-nano structure on the light-emitting surface of the light-emitting device.
  • the epitaxial wafer may be a light emitting diode (Light Emitting Diode, LED) epitaxial wafer.
  • LED Light Emitting Diode
  • An embodiment of the present disclosure also provides a light emitting device, the light emitting device includes the above light emitting device.
  • the light emitting device can be any product or component with a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, a vehicle display, a smart watch, and a smart bracelet.
  • a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, a vehicle display, a smart watch, and a smart bracelet.

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Abstract

一种发光器件和发光装置，所述发光器件包括至少两个沿第一方向设置且串联的外延结构，相邻的两个外延结构之间设置有两层电流扩散层和透明粘胶层，并且相邻的两个外延结构中的每一个外延结构一侧均设置有一层电流扩散层，所述透明粘胶层设置在所述两层电流扩散层之间，所述透明粘胶层中设置有金属纳米颗粒。

Description

发光器件和发光装置 技术领域
本公开实施例涉及但不限于显示技术领域，尤其涉及一种发光器件和发光装置。
背景技术
高压发光二极管，是一种电流型发光元件，其驱动电流远远小于常规发光二极管，因此，同样输出功率的高压发光二极管在工作时的功耗要远小于常规发光二极管；此外，高压发光二极管可以大幅降低AC/DC转换效率损失。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制本申请的保护范围。
本公开实施例提供一种发光器件，所述发光器件包括至少两个沿第一方向设置且串联的外延结构，相邻的两个外延结构之间设置有两层电流扩散层和透明粘胶层，并且相邻的两个外延结构中的每一个外延结构一侧均设置有一层电流扩散层，所述透明粘胶层设置在所述两层电流扩散层之间，所述透明粘胶层中设置有金属纳米颗粒，其中，每个外延结构均包括沿第一方向依次层叠设置的N型半导体层、多量子阱层和P型半导体层。
在示例性实施例中，所述金属纳米颗粒的材料可以包括镍、银、金等材料中的任意一种或多种。
在示例性实施例中，所述金属纳米颗粒的直径可以为5nm至100nm。
在示例性实施例中，所述金属纳米颗粒在所述透明粘胶层中口可以呈单层颗粒分布。
在示例性实施例中，所述金属纳米颗粒的总体积可以占所述透明粘胶层的体积的10％至60％。
在示例性实施例中，所述发光器件的出光面可以具有光学微纳结构或者所述发光器件的出光面上可以设置有光学微纳结构。
在示例性实施例中，所述光学微纳结构可以包括微锥、微球、微柱和微光栅中的任意一种或多种。
在示例性实施例中，所述微锥可以呈阵列分布。
在示例性实施例中，所述微球可以呈阵列分布。
在示例性实施例中，所述微柱可以呈阵列分布。
在示例性实施例中，所述微光栅包括多个凸起，所述多个凸起可以沿着第二方向依次排布并且沿着第三方向延伸，所述第二方向与所述第三方向交叉。
在示例性实施例中，所述微锥可以包括三棱微锥和四棱微锥中的任意一种或多种。
在示例性实施例中，所述微柱可以包括微圆柱和微方柱中的任意一种或多种。
在示例性实施例中，所述微光栅的凸起的截面形状可以包括三角形和方形中的任意一种或多种。
在示例性实施例中，所述光学微纳结构的特征尺寸a可以为2nm至800nm，周期P可以为20nm至1000nm，占空比a/P可以为10％至80％，高度H可以为20nm至400nm。
在示例性实施例中，所述电流扩散层的材料可以为透明导电并且能够与任意一个外延结构的P型半导体层或任意一个外延结构的N型半导体层形成欧姆接触的材料。
在示例性实施例中，所述电流扩散层的厚度可以为50nm至250nm。
在示例性实施例中，所述透明粘胶层的厚度可以与所述金属纳米颗粒的直径基本一致。
在示例性实施例中，所述透明粘胶层的厚度可以为5nm至100nm。。
在示例性实施例中，所述透明粘胶层的材料可以包括透明光学压克力胶、 苯并环丁烯胶材和环氧树脂等光学胶材中的任意一种或多种。
在示例性实施例中，所述外延结构的数量可以为2个至5个。
在示例性实施例中，至少两个外延结构发出的光可以为同一波段，也可以为不同波段。
在示例性实施例中，所述至少两个外延结构包括可以发出红光的外延结构、可以发出绿光的外延结构和可以发出蓝光的外延结构中的任意一种或多种。
在示例性实施例中，在可以发出红光的外延结构中，所述N型半导体层的材料可以包括N型铝铟镓磷和砷化镓中的任意一种或多种，所述N型半导体层的厚度可以为0.5μm至3μm；所述多量子阱层的材料可以包括铟镓氮、氮化镓和铝铟镓磷中的任意一种或多种，所述多量子阱层的厚度可以为50nm至150nm；所述P型半导体层的材料可以包括P型铝铟镓磷和砷化镓中的任意一种或多种，所述P型半导体层的厚度可以为100nm至200nm。
在示例性实施例中，在可以发出绿光的外延结构中，所述N型半导体层的材料可以包括N型氮化镓，所述N型半导体层的厚度可以为0.5μm至3μm；所述多量子阱层的材料可以包括铟镓氮和氮化镓中的任意一种或多种，所述多量子阱层的厚度可以为50nm至150nm；所述P型半导体层的材料可以包括P型氮化镓，所述P型半导体层的厚度可以为100nm至200nm；或者，
在示例性实施例中，在可以发出蓝光的外延结构中，所述N型半导体层的材料可以包括N型氮化镓，所述N型半导体层的厚度可以为0.5μm至3μm；所述多量子阱层的材料可以包括铟镓氮和氮化镓中的任意一种或多种，所述多量子阱层的厚度可以为50nm至150nm；所述P型半导体层的材料可以包括P型氮化镓，所述P型半导体层的厚度可以为100nm至200nm。
在示例性实施例中，所述发光器件还可以包括第一电极和第二电极；其中，所述第一电极与至少两个外延结构的最外侧的P型半导体层连接，所述第二电极与至少两个外延结构的最外侧的N型半导体层连接。
本公开实施例还提供一种发光装置，所述发光装置包括如上所述的发光器件。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图说明
附图用来提供对本公开技术方案的理解，并且构成说明书的一部分，与本公开的实施例一起用于解释本公开的技术方案，并不构成对本公开技术方案的限制。
图1为水平串联的发光器件的结构示意图；
图2为本公开示例性实施例的出光面具有或者设置有三棱微锥的发光器件的俯视图和局部主视图；
图3为本公开示例性实施例的出光面具有或者设置有四棱微锥的发光器件的俯视图和局部主视图；
图4为本公开示例性实施例的出光面具有或者设置有微球的发光器件的俯视图和局部主视图；
图5为本公开示例性实施例的出光面具有或者设置有微圆柱的发光器件的俯视图和局部主视图；
图6为本公开示例性实施例的出光面具有或者设置有微方柱的发光器件的俯视图和局部主视图；
图7为本公开示例性实施例的出光面具有或者设置有凸起截面为三角形的微光栅的发光器件的俯视图和局部主视图；
图8为本公开示例性实施例的出光面具有或者设置有凸起截面为方形的微光栅的发光器件的俯视图和局部主视图；
图9为本公开示例性实施例的发光器件的结构示意图之一；
图10为本公开示例性实施例的发光器件的结构示意图之二；
图11为本公开示例性实施例的发光器件的结构示意图之三；
图12为本公开示例性实施例的发光器件的制备工艺流程图。
附图中的标记符号的含义为：
1-衬底；2-子发光单元；01-N型半导体层；02-多量子阱层；03-P型半导 体层；3-P电极片；4-N电极片；10-第一外延结构；10’-第一外延片；11-第一N型半导体层；12-第一多量子阱层；13-第一P型半导体层；20-第二外延结构；20’-第二外延片；21-第二N型半导体层；22-第二多量子阱层；23-第二P型半导体层；30-第三外延结构；31-第三N型半导体层；32-第三多量子阱层；33-第三P型半导体层；41-第一电流扩散层；42-第二电流扩散层；43-第三电流扩散层；44-第四电流扩散层；51-第一透明粘胶层；52-第二透明粘胶层；60-金属纳米颗粒；60’-纳米金属层；70-N电极；80-P电极；90-导电层；100-介质层。
具体实施方式
本文中的实施方式可以以多个不同形式来实施。所属技术领域的普通技术人员可以很容易地理解一个事实，就是实现方式和内容可以在不脱离本公开的宗旨及其范围的条件下被变换为各种各样的形式。因此，本公开不应该被解释为仅限定在下面的实施方式所记载的内容中。在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互任意组合。
在附图中，有时为了明确起见，可能夸大表示了构成要素的大小、层的厚度或区域。因此，本公开的任意一个实现方式并不一定限定于图中所示尺寸，附图中部件的形状和大小不反映真实比例。此外，附图示意性地示出了理想的例子，本公开的任意一个实现方式不局限于附图所示的形状或数值等。
图1为水平串联的发光器件的结构示意图。如图1所示，水平串联的发光器件包括设置在衬底1(例如蓝宝石衬底)上的多个子发光单元2(包括N型半导体层01、多量子阱层02和P型半导体层03)、P电极片3、N电极片4等，多个子发光单元2以相互水平串联的方式连接在一起，因此其芯片尺寸往往较大。
本公开实施例提供一种发光器件，所述发光器件包括至少两个沿第一方向设置且串联的外延结构，相邻的两个外延结构之间设置有两层电流扩散层和透明粘胶层，并且相邻的两个外延结构中的每一个外延结构一侧均设置有一层电流扩散层，所述透明粘胶层设置在所述两层电流扩散层之间，所述透明粘胶层中设置有金属纳米颗粒，其中，每个外延结构均包括沿第一方向依 次层叠设置的N型半导体层、多量子阱层和P型半导体层。
N型半导体层(可以传输电子，又叫电子传输层)、多量子阱层(MQW)和P型半导体层(可以传输空穴，又叫空穴传输层)可以形成PN结，施加电压后多量子阱层可以发光。
本公开实施例提供的发光器件将至少两个外延结构沿第一方向串联在一起，可以在实现同样发光亮度的情况下降低驱动电流，使焦耳热降低，而且不会增大发光器件的面积，可以兼容高分辨率的显示产品。
因此，本公开实施例的发光器件满足高压发光二极管芯片要求，可以作为高压发光二极管芯片。
透明粘胶层中的金属纳米颗粒可以实现与相邻的两个电流扩散层之间很好的电连接，并且可以提发光器件表面的光透过率。
在示例性实施例中，所述金属纳米颗粒的材料可以包括镍、银、金等材料中的任意一种或多种。
在示例性实施例中，所述金属纳米颗粒的直径可以为亚波长尺度。亚波长尺度直径的金属纳米颗粒可以提高透明粘胶层的光透过率及发光器件的光提取效率。
在示例性实施例中，所述金属纳米颗粒的直径可以为5nm至100nm。
在示例性实施例中，所述金属纳米颗粒在所述透明粘胶层中口可以呈单层颗粒分布。
在示例性实施例中，所述金属纳米颗粒的总体积可以占所述透明粘胶层的体积的10％至60％。
在示例性实施例中，所述发光器件的出光面可以具有光学微纳结构或者所述发光器件的出光面上可以设置有光学微纳结构。
这里，出光面具有光学微纳结构是指将出光面自身设置为光学微纳结构；出光面上设置有光学微纳结构是指在出光面一侧单独设置光学微纳结构，可以将光学微纳结构直接设置在出光面一侧，也可以先在出光面一侧设置光学微纳结构的介质层，然后在介质层远离出光面的一侧设置光学微纳结构；单独设置的光学微纳结构的材料可以包括金属、氧化硅和氮化硅中的任意一种 或多种；介质层的材料可以包括金属、氧化硅和氮化硅中的任意一种或多种。
在第一方向串联的多个外延结构，具有统一的发光面，可以通过将出光面设置成光学微纳结构或者在出光面上设置光学微纳结构，来实现更好的出光效果。
在示例性实施例中，所述光学微纳结构可以包括微锥、微球、微柱和微光栅中的任意一种或多种。
在示例性实施例中，所述微锥可以呈阵列分布。
在示例性实施例中，所述微球可以呈阵列分布。
在示例性实施例中，所述微柱可以呈阵列分布。
在示例性实施例中，所述微光栅包括多个凸起，所述多个凸起可以沿着第二方向依次排布并且沿着第三方向延伸，所述第二方向与所述第三方向交叉。
在示例性实施例中，所述微锥可以包括三棱微锥和四棱微锥中的任意一种或多种。
在示例性实施例中，所述微柱可以包括微圆柱和微方柱中的任意一种或多种。
在示例性实施例中，所述微光栅的凸起的截面形状可以包括三角形和方形中的任意一种或多种。
图2为本公开示例性实施例的出光面具有或者设置有三棱微锥的发光器件的俯视图和局部主视图；图3为本公开示例性实施例的出光面具有或者设置有四棱微锥的发光器件的俯视图和局部主视图；图4为本公开示例性实施例的出光面具有或者设置有微球的发光器件的俯视图和局部主视图；图5为本公开示例性实施例的出光面具有或者设置有微圆柱的发光器件的俯视图和局部主视图；图6为本公开示例性实施例的出光面具有或者设置有微方柱的发光器件的俯视图和局部主视图；图7为本公开示例性实施例的出光面具有或者设置有凸起截面为三角形的微光栅的发光器件的俯视图和局部主视图；图8为本公开示例性实施例的出光面具有或者设置有凸起截面为方形的微光栅的发光器件的俯视图和局部主视图；其中，左图为俯视图，右图为局部主 视图，图中的a表示光学微纳结构的特征尺寸，P表示光学微纳结构的周期，H表示光学微纳结构的高度。
在示例性实施例中，所述光学微纳结构的特征尺寸a可以为2nm至800nm，周期P可以为20nm至1000nm，占空比a/P可以为10％至80％，高度H可以为20nm至400nm。
在示例性实施例中，所述电流扩散层的材料可以为透明导电并且能够与任意一个外延结构的P型半导体层或N型半导体层形成欧姆接触的材料，例如，所述电流扩散层的材料可以包括氧化铟锡(Indium Tin Oxide,ITO)、氧化铟锌、镍、铬等材料中的任意一种或多种。电流扩散层，也叫电流扩展层，可以增加芯片电流扩展的均匀性，且可以作为P型半导体层与DBR反射层之间的欧姆接触层。
在示例性实施例中，所述电流扩散层的厚度可以为50nm至250nm。
在示例性实施例中，所述透明粘胶层的厚度可以与所述金属纳米颗粒的直径基本一致。
在示例性实施例中，所述透明粘胶层的厚度可以为5nm至100nm。
在示例性实施例中，所述透明粘胶层的材料可以包括透明光学压克力胶、苯并环丁烯胶材和环氧树脂等光学胶材中的任意一种或多种。
在示例性实施例中，所述外延结构的数量可以为2个至5个，例如，可以为2个、3个、4个或5个。
在示例性实施例中，所述外延结构可以分别包括沿第一方向依次层叠设置的N型半导体层、多量子阱层和P型半导体层。
在示例性实施例中，至少两个外延结构发出的光可以为同一波段，也可以为不同波段。
在示例性实施例中，所述至少两个外延结构包括可以发出红光的外延结构、可以发出绿光的外延结构和可以发出蓝光的外延结构中的任意一种或多种。
在示例性实施例中，在可以发出红光的外延结构中，所述N型半导体层的材料可以包括N型铝铟镓磷和砷化镓中的任意一种或多种，所述N型半导 体层的厚度可以为0.5μm至3μm；所述多量子阱层的材料可以包括不同组分的铟镓氮、氮化镓和铝铟镓磷中的任意一种或多种，所述多量子阱层的厚度可以为50nm至150nm；所述P型半导体层的材料可以包括P型铝铟镓磷和砷化镓中的任意一种或多种，所述P型半导体层的厚度可以为100nm至200nm。
在示例性实施例中，在可以发出绿光的外延结构中，所述N型半导体层的材料可以包括N型氮化镓，所述N型半导体层的厚度可以为0.5μm至3μm；所述多量子阱层的材料可以包括不同组分的铟镓氮和氮化镓中的任意一种或多种，所述多量子阱层的厚度可以为50nm至150nm；所述P型半导体层的材料可以包括P型氮化镓，所述P型半导体层的厚度可以为100nm至200nm；或者，
在示例性实施例中，在可以发出蓝光的外延结构中，所述N型半导体层的材料可以包括N型氮化镓，所述N型半导体层的厚度可以为0.5μm至3μm；所述多量子阱层的材料可以包括不同组分的铟镓氮和氮化镓中的任意一种或多种，所述多量子阱层的厚度可以为50nm至150nm；所述P型半导体层的材料可以包括P型氮化镓，所述P型半导体层的厚度可以为100nm至200nm。
在示例性实施例中，所述发光器件还可以包括第一电极和第二电极；其中，所述第一电极与所述至少两个外延结构的最外侧的P型半导体层连接，所述第二电极与所述至少两个外延结构的最外侧的N型半导体层连接。
在示例性实施例中，所述发光器件的长度可以在5μm至500μm，宽度可以为5μm至500μm。
在示例性实施例中，所述发光器件可以具有倒装结构。
图9为本公开示例性实施例的发光器件的结构示意图之一。在该示例性实施例中，如图9所示，所述发光器件包括三个外延结构，分别为第一外延结构10、第二外延结构20和第三外延结构30；所述第一外延结构10、所述第二外延结构20和第三外延结构30沿第一方向(例如，可以为图9所示的上下方向)层叠设置且串联在一起，所述第一外延结构10包括第一N型半导体层11、第一多量子阱层12和第一P型半导体层13，所述第二外延结构20包括第二N型半导体层21、第二多量子阱层22和第二P型半导体层23， 所述第三外延结构30包括第三N型半导体层31、第三多量子阱层32和第三P型半导体层33；所述第一外延结构10与所述第二外延结构20之间设置有第一电流扩散层41、第一透明粘胶层51和第二电流扩散层42，所述第二外延结构20与所述第三外延结构30之间设置有第三电流扩散层43、第二透明粘胶层52和第四电流扩散层44；所述第一透明粘胶层51和所述第二透明粘胶层52中均设置有金属纳米颗粒60；
其中，所述第一多量子阱层12设置在所述第一N型半导体层11的一侧，所述第一P型半导体层13设置在所述第一多量子阱层12远离所述第一N型半导体层11的一侧，所述第一电流扩散层41设置在所述第一P型半导体层13远离所述第一N型半导体层11的一侧，所述第一透明粘胶层51设置在所述第一电流扩散层41远离所述第一N型半导体层11的一侧，所述第二电流扩散层42设置在所述第一透明粘胶层51远离所述第一N型半导体层11的一侧，所述第二N型半导体层21设置在所述第二电流扩散层42远离所述第一N型半导体层11的一侧，所述第二多量子阱层22设置在所述第二N型半导体层21远离所述第一N型半导体层11的一侧，所述第二P型半导体层23设置在所述第二多量子阱层22远离所述第一N型半导体层11的一侧，所述第三电流扩散层43设置在所述第二P型半导体层23远离所述第一N型半导体层11的一侧，所述第二透明粘胶层52设置在所述第三电流扩散层43远离所述第一N型半导体层11的一侧，所述第四电流扩散层44设置在所述第二透明粘胶层52远离所述第一N型半导体层11的一侧，所述第三N型半导体层31设置在所述第四电流扩散层44远离所述第一N型半导体层11的一侧，所述第三多量子阱层32设置在所述第三N型半导体层31远离所述第一N型半导体层11的一侧，所述第三P型半导体层33设置在所述第三多量子阱层32远离所述第一N型半导体层11的一侧。
在示例性实施例中，所述发光器件还可以包括第一电极和第二电极；其中，所述第一电极与所述至少两个外延结构的最外侧的P型半导体层连接，所述第二电极与所述至少两个外延结构的最外侧的N型半导体层连接。
在示例性实施例中，所述发光器件还可以包括第一电极和第二电极；其中，所述发光器件可以具有垂直LED芯片结构，此时所述第一电极为反射电 极，所述至少两个外延结构依次按照第一外延结构、第二外延结构至第N外延结构的顺序以垂直堆叠的方式设置在所述反射电极的一侧，并且所述第一外延结构的N型半导体层设置在所述反射电极的一侧，所述第二电极设置在所述第N外延结构的P型半导体层的一侧，所述第二电极可以具有光学微纳结构。
图10为本公开示例性实施例的发光器件的结构示意图之二。如图10所示，第一电极70采用反射率较高的金属作为反射电极，第二电极80可以采用金属线栅结构，从而可以实现线偏振出光。
图11为本公开示例性实施例的发光器件的结构示意图之三。如图11所示，在示例性实施例中，所述发光器件还可以包括第一电极和第二电极；并且，所述第一电极为N电极70，所述第二电极为P电极80，所述P电极80设置在所述至少两个外延结构的一侧，所述至少两个外延结构沿着靠近所述P电极的方向依次为第一外延结构10、第二外延结构20、第三外延结构30至第N外延结构，并且所述P电极80设置在所述第N外延结构的P型半导体层33的一侧，所述N电极70设置在所述第一外延结构10的第一N型半导体层11靠近所述P电极80的一侧并且通过导电层90(例如，可以为金属导电层)延伸到所述第一外延结构10的第一N型半导体层11上，所述N电极70与所述第一外延结构10的多量子阱层12和第一P型半导体层13的侧壁相间隔，所述第一外延结构10的第一N型半导体层11远离所述P电极80的一侧可以具有或者设置有所述光学微纳结构。
在示例性实施例中，所述第一外延结构10的第一N型半导体层11远离所述P电极80的一侧可以设置有微锥结构，可以提高发光器件的出光效率。如图11所示，该微锥结构可以通过介质层100间接设置在所述第一N型半导体层11远离所述P电极80的一侧，即所述介质层100设置在所述第一N型半导体层11远离所述P电极80的一侧，所述微锥结构设置在所述介质层100远离所述P电极80的一侧。在其他实施例中，也可以不设置介质层100，而将光学微纳结构直接设置在所述第一N型半导体层11远离所述P电极80的一侧。
在示例性实施例中，发光器件还包括衬底，至少两个外延结构设置在所 述衬底上，所述衬底可以为蓝宝石(Sapphire)。蓝、绿光芯片的衬底基材为蓝宝石；在红光芯片中，衬底基材为GaAs，之后再键合至蓝宝石衬底并剥离GaAs。
在示例性实施例中，所述衬底可以为图案化的蓝宝石衬底(Patterned Sapphire Substrate,PSS)。在蓝宝石衬底上直接形成N型半导体材料或P型半导体材料存在较大位错密度，导致发光器件的内量子效率较低，通过在蓝宝石衬底表面形成微型周期图案，可以降低位错密度，提高有源区光子逃逸概率。
在示例性实施例中，发光器件还可以包括缓冲层(Buffer Layer)，所述缓冲层可以设置在衬底和外延结构之间，可以采用GaN、AlN材料，从而为可以为N型半导体材料或P型半导体材料生长提供成核中心，促进N型半导体材料或P型半导体材料的三维岛状生长变为二维横向生长，降低位错密度。
在示例性实施例中，发光器件还可以包括电流阻挡层(Current Blocking Layer,CBL)。电流阻挡层可以防止P型电极处发生电流拥挤，进一步提升电流扩展性能。
在示例性实施例中，所述发光器件还可以包括布拉格反射镜(Distributed Bragg Reflector,DBR)。布拉格反射镜是由两种高、低折射率材料交替排列组成的周期性薄膜结构，通过调整材料折射率和厚度可以改变能隙位置，可适应不同波长。所述布拉格反射镜可以设置在距离衬底最远的电流扩散层的远离衬底的一侧。
本公开实施例还提供如上所述的发光器件的制备方法。图12为本公开示例性实施例的发光器件的制备工艺流程图。如图12所示，所述制备方法包括：
S10：提供外延片，在所述外延片的P型半导体层上设置电流扩散层；
S20：取第一P型半导体层13一侧设置有第一电流扩散层41的第一外延片10’，在所述第一电流扩散层41上设置纳米金属层60’；
S30：通过退火工艺，使所述纳米金属层60’的金属自生长形成金属纳米颗粒60；
S40：在所述金属纳米颗粒60表面涂覆透明粘结胶材，使透明粘结胶材 将所述金属纳米颗粒完全包裹住，得到第一透明粘胶层51；
S50：将第二N型半导体层21一侧设置有第二电流扩散层42的已剥离衬底的第二外延片20’与步骤S40得到的带有第一透明粘胶层51的外延片进行高压键合并固化；
S60：使所述金属纳米颗粒60与所述第二电流扩散层42相接触实现电连接，得到包括两个外延结构的发光器件。
在示例性实施例中，所述制备方法还可以包括：
S70：参照步骤S20至S60，继续引入第三外延片30’至第N外延片，以在步骤S60得到的包括N个外延结构的发光器件。
在示例性实施例中，步骤S30中，所述退火工艺的工艺条件可以包括：退火温度可以为400℃至1200℃，例如，可以为400℃、500℃、600℃、700℃、800℃、900℃、1000℃、1100℃、1200℃；退火时间可以为1min至5min，例如，可以为1min、2min、3min、4min、5min。
在示例性实施例中，步骤S30中，所述键合所需的压力可以为0至2MPa，例如，可以为0MPa、0.5MPa、1MPa、1.5MPa、2MPa。
在示例性实施例中，步骤S30中，所述固化的温度可以为150℃至350℃，例如，可以为150℃、200℃、250℃、300℃、350℃；所述固化的时间可以为0至1.5小时，例如，可以为0小时、0.5小时、0.75小时、1小时、1.25小时、1.5小时。
透明粘胶层中的金属纳米颗粒可以实现与相邻的两个电流扩散层之间很好的电连接，并且可以提发光器件表面的光透过率；当P型半导体层较薄时，还可以提高发光器件的内量子效率。在示例性实施例中，所述纳米金属层可以通过沉积方式形成。
在示例性实施例中，所述电流扩散层可以通过沉积方式形成。
在示例性实施例中，步骤S40中涂覆的透明粘结胶材的厚度可以大于所述金属纳米颗粒的直径，但键合固化后形成的透明粘胶层的厚度与金属纳米颗粒的直径基本一致。
在示例性实施例中，所述制备方法还可以包括：将所述发光器件的出光 面设置为光学微纳结构或者在所述发光器件的出光面上设置光学微纳结构。
在示例性实施例中，所述外延片可以为发光二极管(Light Emitting Diode，LED)外延片。
本公开实施例还提供一种发光装置，所述发光装置包括如上所述的发光器件。
所述发光装置可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪、车载显示器、智能手表、智能手环等任何具有显示功能的产品或部件。
虽然本公开所揭露的实施方式如上，但所述的内容仅为便于理解本公开而采用的实施方式，并非用以限定本公开。任何所属领域内的技术人员，在不脱离本公开所揭露的精神和范围的前提下，可以在实施的形式及细节上进行任何的修改与变化，但本申请的专利保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (20)

  1. 一种发光器件，包括至少两个沿第一方向设置且串联的外延结构，相邻的两个外延结构之间设置有两层电流扩散层和透明粘胶层，并且相邻的两个外延结构中的每一个外延结构一侧均设置有一层电流扩散层，所述透明粘胶层设置在所述两层电流扩散层之间，所述透明粘胶层中设置有金属纳米颗粒，其中，每个外延结构均包括沿第一方向依次层叠设置的N型半导体层、多量子阱层和P型半导体层。
  2. 根据权利要求1所述的发光器件，其中，所述金属纳米颗粒的材料包括镍、银和金中的任意一种或多种。
  3. 根据权利要求1所述的发光器件，其中，所述金属纳米颗粒的直径为5nm至100nm。
  4. 根据权利要求1所述的发光器件，其中，所述金属纳米颗粒在所述透明粘胶层中呈单层颗粒分布。
  5. 根据权利要求1所述的发光器件，其中，所述金属纳米颗粒的总体积占所述透明粘胶层的体积的10％至60％。
  6. 根据权利要求1所述的发光器件，其中，所述发光器件的出光面具有光学微纳结构或者所述发光器件的出光面上设置有光学微纳结构。
  7. 根据权利要求6所述的发光器件，其中，所述光学微纳结构包括微锥、微球、微柱和微光栅中的任意一种或多种。
  8. 根据权利要求7所述的发光器件，其中，
    所述微锥呈阵列分布；和/或
    所述微球呈阵列分布；和/或
    所述微柱呈阵列分布；和/或
    所述微光栅包括多个凸起，所述多个凸起第二方向依次排布并且沿着第三方向延伸，所述第二方向与所述第三方向交叉。
  9. 根据权利要求7所述的发光器件，其中，
    所述微锥包括三棱微锥和四棱微锥中的任意一种或多种；和/或
    所述微柱包括微圆柱和微方柱中的任意一种或多种；和/或
    所述微光栅的凸起的截面形状包括三角形和方形中的任意一种或多种。
  10. 根据权利要求6所述的发光器件，其中，所述光学微纳结构的特征尺寸a为2nm至800nm，周期P为20nm至1000nm，占空比a/P为10％至80％，高度H为20nm至400nm。
  11. 根据权利要求1至10中任一项所述的发光器件，其中，所述电流扩散层的材料为透明导电并且能够与任意一个外延结构的P型半导体层或任意一个外延结构的N型半导体层形成欧姆接触的材料。
  12. 根据权利要求1至10中任一项所述的发光器件，其中，所述电流扩散层的厚度为50nm至250nm。
  13. 根据权利要求1至10中任一项所述的发光器件，其中，所述透明粘胶层的厚度与所述金属纳米颗粒的直径基本一致。
  14. 根据权利要求13所述的发光器件，其中，所述透明粘胶层的厚度为5nm至100nm。
  15. 根据权利要求1至10中任一项所述的发光器件，其中，所述透明粘胶层的材料包括透明光学压克力胶、苯并环丁烯胶材和环氧树脂中的任意一种或多种。
  16. 根据权利要求1至10中任一项所述的发光器件，其中，所述外延结构的数量为2个至5个。
  17. 根据权利要求1至10中任一项所述的发光器件，其中，至少两个外延结构发出的光为同一波段或者为不同波段。
  18. 根据权利要求17所述的发光器件，其中，所述至少两个外延结构包括可以发出红光的外延结构、可以发出绿光的外延结构和可以发出蓝光的外延结构中的任意一种或多种；
    在可以发出红光的外延结构中，所述N型半导体层的材料包括N型铝铟镓磷和砷化镓中的任意一种或多种，所述N型半导体层的厚度为0.5μm至3μm；所述多量子阱层的材料包括铟镓氮、氮化镓和铝铟镓磷中的任意一种或多种，所述多量子阱层的厚度为50nm至150nm；所述P型半导体层的材 料包括P型铝铟镓磷和砷化镓中的任意一种或多种，所述P型半导体层的厚度为100nm至200nm；或者，
    在可以发出绿光的外延结构中，所述N型半导体层的材料包括N型氮化镓，所述N型半导体层的厚度为0.5μm至3μm；所述多量子阱层的材料包括铟镓氮和氮化镓中的任意一种或多种，所述多量子阱层的厚度为50nm至150nm；所述P型半导体层的材料包括P型氮化镓，所述P型半导体层的厚度为100nm至200nm；或者，
    在可以发出蓝光的外延结构中，所述N型半导体层的材料包括N型氮化镓，所述N型半导体层的厚度为0.5μm至3μm；所述多量子阱层的材料包括铟镓氮和氮化镓中的任意一种或多种，所述多量子阱层的厚度为50nm至150nm；所述P型半导体层的材料包括P型氮化镓，所述P型半导体层的厚度为100nm至200nm。
  19. 根据权利要求1至10中任一项所述的发光器件，还包括第一电极和第二电极；其中，所述第一电极与至少两个外延结构的最外侧的P型半导体层连接，所述第二电极与至少两个外延结构的最外侧的N型半导体层连接。
  20. 一种发光装置，包括根据权利要求1至19中任一项所述的发光器件。
PCT/CN2022/078077 2022-02-25 2022-02-25 发光器件和发光装置 WO2023159514A1 (zh)

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