WO2023145111A1 - コンデンサ - Google Patents

コンデンサ Download PDF

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Publication number
WO2023145111A1
WO2023145111A1 PCT/JP2022/031061 JP2022031061W WO2023145111A1 WO 2023145111 A1 WO2023145111 A1 WO 2023145111A1 JP 2022031061 W JP2022031061 W JP 2022031061W WO 2023145111 A1 WO2023145111 A1 WO 2023145111A1
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WO
WIPO (PCT)
Prior art keywords
conductor
capacitance forming
forming portion
main surface
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2022/031061
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
玄樹 小林
晃生 増成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2023576604A priority Critical patent/JP7597250B2/ja
Priority to CN202280081952.3A priority patent/CN118382900A/zh
Publication of WO2023145111A1 publication Critical patent/WO2023145111A1/ja
Priority to US18/733,992 priority patent/US12603232B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/33—Thin- or thick-film capacitors (thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02—Mountings
    • H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/012—Form of non-self-supporting electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/224—Housing; Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02—Mountings
    • H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
    • H01G2/065—Mountings specially adapted for mounting on a printed-circuit support for surface mounting, e.g. chip capacitors

Definitions

  • the present invention relates to a capacitor comprising a capacitance forming portion composed of a metal porous body, a dielectric film and a conductive film.
  • a capacitor is formed by a metal porous body, a dielectric film covering the surface of the metal porous body, and a conductive film covering the dielectric film.
  • a capacitor is disclosed comprising a portion.
  • the metal porous body is composed of a sintered body of metal particles, and the dielectric layer and the conductive film are both formed by an atomic layer deposition (ALD) method.
  • ALD atomic layer deposition
  • a capacitor based on the present invention includes an insulating substrate, a capacitance forming portion, a first external connection wiring and a second external connection wiring.
  • the insulating substrate has a first main surface and a second main surface opposite to the first main surface, and the capacitance forming portion is provided to face the first main surface. ing.
  • the first external connection wiring and the second external connection wiring are connected to the capacitance formation section.
  • the capacitance forming section includes a conductive porous metal body connected to the first external connection wiring, a dielectric film covering the surface of the metal porous body, and the second external connection wiring covering the dielectric film. and a conductive film connected to.
  • the first external connection wiring has a first via conductor penetrating the insulating substrate to reach from the first main surface to the second main surface
  • the second external connection wiring has a first via conductor extending from the first main surface to the second main surface.
  • a second via conductor passing through the insulating substrate to reach the second main surface from the first main surface; and an internal conductor covering the conductive film so as to fill a space inside the capacitance forming portion.
  • the conductive film and the second via conductor are connected at least through the internal conductor.
  • the second external connection wiring has a columnar conductor projecting from the first main surface toward the capacitance forming portion and surrounded by the capacitance forming portion. In that case, it is preferable that the internal conductor and the second via conductor are connected through at least the columnar conductor.
  • the columnar conductor may extend along the normal direction of the first main surface.
  • the columnar conductor may be connected to the second via conductor by overlapping at least a part of the columnar conductor with the second via conductor when viewed along the .
  • the capacitance forming portion may include a first capacitance forming portion and a second capacitance forming portion stacked separately from each other in the normal direction of the first main surface.
  • the conductive film of the first capacitance forming portion and the conductive film of the second capacitance forming portion are connected by the internal conductor and the columnar conductor.
  • the thickness of the internal conductor in the portion located between the first capacitance forming portion and the second capacitance forming portion is larger than the thickness of the conductive film.
  • the thickness of the internal conductor in the portion located between the first capacitance forming portion and the second capacitance forming portion is three times or more the thickness of the conductive film. There may be.
  • the capacitance forming portion protrudes from the first main surface toward the capacitance forming portion and is surrounded by the capacitance forming portion so that the capacitance forming portion is joined to the capacitance forming portion.
  • the first external connection wiring may have a supporting conductor that constitutes the supporting portion. preferably connected.
  • the support conductor may extend along the normal direction of the first main surface.
  • the supporting conductor may be connected to the first via conductor by overlapping the supporting conductor at least partially with the first via conductor when viewed along the .
  • the capacitance forming portion protrudes from the first main surface toward the capacitance forming portion and is surrounded by the capacitance forming portion so that the capacitance forming portion is joined to the capacitance forming portion.
  • the first external connection wiring may have a support conductor that constitutes the support portion, in which case the support conductor is preferably connected to the metal porous body.
  • the support conductor may extend along the normal direction of the first main surface, in which case, when viewed along the normal direction of the first main surface, The supporting conductor may be connected to the first via conductor by at least partially overlapping the supporting conductor with the first via conductor.
  • the capacitor is provided on the first main surface, seals the capacitance forming portion, and is located on the opposite side of the insulating substrate when viewed from the capacitance forming portion. It may further comprise a sealing portion defining an outer surface for contacting.
  • the supporting conductor may be exposed on the outer surface by penetrating the capacitance forming portion and the sealing portion, and the columnar conductor may extend through the capacitance forming portion and the sealing portion.
  • the columnar conductor may be exposed on the outer surface by passing through the sealing portion.
  • the support conductor may extend along the normal direction of the first main surface. , the supporting conductor may not overlap the first via conductor.
  • the supporting conductor contains the same material as at least part of the materials contained in the metal porous body.
  • the capacitance forming portion protrudes from the first main surface toward the capacitance forming portion and is surrounded by the capacitance forming portion so that the capacitance forming portion is joined to the capacitance forming portion.
  • the first external connection wiring may have a supporting conductor forming the supporting portion.
  • the support conductor may extend along the normal direction of the first main surface and may be connected to the metal porous body, and further, when viewed along the normal direction of the first main surface, In this case, the supporting conductor may be connected to the first via conductor by at least partially overlapping the supporting conductor with the first via conductor.
  • the capacitance forming portion may include a first capacitance forming portion and a second capacitance forming portion laminated apart from each other in the normal direction of the first main surface.
  • the porous metal body of the first capacitor forming portion and the porous metal body of the second capacitor forming portion may be connected by the supporting conductor, and the first capacitor forming portion may be connected to the porous metal body of the second capacitor forming portion.
  • the conductive film of the second capacitance forming portion may be connected by the internal conductor and the columnar conductor.
  • the outer surface is provided on the first main surface, seals the capacitance forming portion, and is located on the opposite side of the insulating substrate when viewed from the capacitance forming portion. It may further include a sealing portion that defines the .
  • the supporting conductor may be exposed on the outer surface by penetrating the capacitance forming portion and the sealing portion, and the columnar conductor may extend through the capacitance forming portion and the sealing portion. The columnar conductor may be exposed on the outer surface by passing through the sealing portion.
  • the first via conductor and the second via conductor are both provided with the capacitance forming portion. It is preferably provided in the region where the
  • a plurality of the first via conductors may be provided, and a plurality of the second via conductors may be provided.
  • the first via conductors and the second via conductors may be arranged in an array when viewed along the normal direction of the first main surface, In that case, the polarity of one via conductor is preferably different from the polarity of the via conductor adjacent to it at the shortest distance.
  • the internal conductor preferably contains at least one of Ag and a conductive polymer as a main material.
  • the present invention it is possible to reduce the ESR in a capacitor having a capacitance forming portion composed of a metal porous body, a dielectric film and a conductive film.
  • FIG. 1 is a schematic front view of a capacitor according to Embodiment 1;
  • FIG. FIG. 2 is a schematic bottom view of the capacitor shown in FIG. 1;
  • FIG. 2 is a schematic cross-sectional view of the capacitor shown in FIG. 1;
  • 4 is an enlarged schematic cross-sectional view of the vicinity of a second via conductor shown in FIG. 3;
  • FIG. 4 is a schematic cross-sectional view enlarging a part of the internal conductor shown in FIG. 3;
  • FIG. 4 is a schematic cross-sectional view enlarging the vicinity of the first main surface of the insulating substrate shown in FIG. 3;
  • FIG. 4 is a schematic cross-sectional view enlarging a part of the sealing portion shown in FIG. 3;
  • FIG. 2 is a flowchart showing a method of manufacturing a capacitor according to Embodiment 1; 9 is a schematic cross-sectional view showing a state after step S4 of the manufacturing flow shown in FIG. 8 is completed;
  • FIG. 9 is a schematic cross-sectional view for explaining step S5 of the manufacturing flow shown in FIG. 8;
  • FIG. 9 is a schematic cross-sectional view for explaining step S6 of the manufacturing flow shown in FIG. 8;
  • 9 is a schematic cross-sectional view for explaining step S7 of the manufacturing flow shown in FIG. 8.
  • FIG. FIG. 9 is a schematic cross-sectional view for explaining step S8 of the manufacturing flow shown in FIG. 8;
  • FIG. 9 is a schematic cross-sectional view for explaining step S9 of the manufacturing flow shown in FIG. 8;
  • FIG. 9 is a schematic cross-sectional view for explaining step S10 of the manufacturing flow shown in FIG. 8; 9 is a schematic cross-sectional view for explaining step S11 of the manufacturing flow shown in FIG. 8.
  • FIG. 9 is a schematic cross-sectional view for explaining step S12 of the manufacturing flow shown in FIG. 8; 9 is a schematic cross-sectional view for explaining step S13 of the manufacturing flow shown in FIG. 8.
  • FIG. FIG. 9 is a schematic cross-sectional view for explaining step S14 of the manufacturing flow shown in FIG. 8; 9 is a schematic cross-sectional view for explaining step S15 of the manufacturing flow shown in FIG. 8.
  • FIG. FIG. 9 is a schematic cross-sectional view for explaining step S16 of the manufacturing flow shown in FIG.
  • FIG. 8; 9 is a schematic cross-sectional view for explaining step S17 of the manufacturing flow shown in FIG. 8.
  • FIG. FIG. 5 is a schematic cross-sectional view of a capacitor according to a first modified example
  • FIG. 11 is a schematic cross-sectional view of a capacitor according to a second modified example
  • FIG. 11 is a schematic cross-sectional view of a capacitor according to a third modified example
  • FIG. 11 is a schematic cross-sectional view of a capacitor according to a fourth modified example;
  • FIG. 10 is a schematic cross-sectional view of a capacitor according to Embodiment 2;
  • FIG. 10 is a flowchart showing a method of manufacturing a capacitor according to Embodiment 2;
  • 31 is a schematic cross-sectional view for explaining step S7 of the manufacturing flow shown in FIG. 30;
  • FIG. 31 is a schematic cross-sectional view for explaining step S9 of the manufacturing flow shown in FIG. 30;
  • FIG. 31 is a schematic cross-sectional view for explaining step S15B of the manufacturing flow shown in FIG. 30;
  • FIG. 31 is a schematic cross-sectional view for explaining step S16 of the manufacturing flow shown in FIG. 30;
  • FIG. 31 is a schematic cross-sectional view for explaining step S17 of the manufacturing flow shown in FIG. 30;
  • FIG. 10 is a schematic cross-sectional view of a capacitor according to Embodiment 3;
  • FIG. 11 is a flowchart showing a method of manufacturing a capacitor according to Embodiment 3;
  • FIG. 11 is a schematic cross-sectional view of a capacitor according to a fifth modified example;
  • 39 is an enlarged schematic cross-sectional view of the vicinity of the second via conductor shown in FIG. 38;
  • FIG. 11 is a flowchart showing a method of manufacturing a capacitor according to Embodiment 3;
  • FIG. 11 is a schematic cross-sectional view of a capacitor according to a fifth modified example;
  • 39 is an enlarged schematic cross-sectional view of the vicinity of the second via conductor shown in FIG. 38;
  • FIG. 1 is a schematic front view of the capacitor according to Embodiment 1
  • FIG. 2 is a schematic bottom view of the capacitor viewed in the direction of arrow II shown in FIG. 3 is a schematic cross-sectional view of the capacitor taken along line III-III shown in FIG. 2
  • FIG. 4 is a schematic cross-sectional view enlarging the vicinity of the second via conductor shown in FIG. 5 is a schematic cross-sectional view enlarging part of the internal conductor shown in FIG. 3
  • FIG. 6 is a schematic cross-sectional view enlarging the vicinity of the first main surface of the insulating substrate shown in FIG. 7 is a schematic cross-sectional view enlarging a part of the sealing portion shown in FIG. 3.
  • FIG. 1A the configuration of a capacitor 1A according to the present embodiment will be described with reference to FIGS. 1 to 7.
  • the capacitor 1A is a so-called surface-mounted electronic component having a flat, substantially rectangular parallelepiped outer shape and a bottom surface configured as a mounting surface for a wiring board or the like.
  • Capacitor 1A mainly includes insulating substrate 10 , capacitance forming portion 20 , and sealing portion 30 .
  • the capacitance forming portion 20 is provided so as to face the insulating substrate 10 .
  • Capacitance forming portion 20 is located inside capacitor 1A by being sealed by insulating substrate 10 and sealing portion 30 provided on insulating substrate 10 .
  • Insulating substrate 10 is provided with first via conductor 13 and second via conductor 14, support conductor 15, first bump 16 and second bump 17, internal conductor 18, and columnar conductor 19. there is These first via conductors 13, second via conductors 14, support conductors 15, first bumps 16, second bumps 17, internal conductors 18, and columnar conductors 19 serve to externalize capacitance forming portion 20 located inside capacitor 1A.
  • a pair of external connection wirings are formed as lead wirings for electrically connecting to the circuits.
  • the pair of external connection wirings includes a first external connection wiring as an anode and a second external connection wiring as a cathode.
  • the insulating substrate 10 is a plate-like member having a first main surface 10a and a second main surface 10b opposite to the first main surface 10a. consists of As the insulating substrate 10, it is preferable to use a substrate having electrical insulating properties, and preferably a substrate containing an inorganic material as a main component can be used. More specifically, the insulating substrate 10 is, for example, any one of Si, Al2O3 , ZrO2 , BN , Si3N4 , AlN, MgO, Mg2SiO4 , BaTiO3 , SrTiO3 and CaTiO3 . can be used as the main material.
  • the thickness and size of the insulating substrate 10 are not particularly limited. preferably used.
  • the insulating substrate 10 is provided with a plurality of first through holes 11.
  • Each of the plurality of first through holes 11 extends from the first main surface 10a to the second main surface 10b. passes through.
  • Each of the plurality of first through holes 11 is filled with a first via conductor 13 (see FIG. 3).
  • Each of the plurality of first via conductors 13 has a substantially cylindrical shape, for example.
  • a plurality of second through holes 12 are provided in the insulating substrate 10, and each of the plurality of second through holes 12 extends from the first main surface 10a to the second main surface 10b. passes through.
  • Each of the plurality of second through holes 12 is filled with a second via conductor 14 (see FIG. 3).
  • Each of the plurality of second via conductors 14 has a substantially cylindrical shape, for example.
  • Each of the plurality of first via conductors 13 constitutes part of the above-described first external connection wiring.
  • Each of the plurality of second via conductors 14 constitutes part of the above-described second external connection wiring. That is, the plurality of first via conductors 13 and the plurality of second via conductors 14 respectively constitute first external connection wirings and second external connection wirings having different polarities.
  • both first via conductor 13 and second via conductor 14 are capacitance forming portion 20 when viewed along the normal direction of first main surface 10a of insulating substrate 10. is provided in the area (that is, the area indicated by the dashed line in FIG. 2).
  • first via conductors 13 and five second via conductors 14 are provided on insulating substrate 10, so that a total of nine via conductors are provided on insulating substrate 10. passes through.
  • These nine via conductors are arranged in an array with a layout of 3 rows and 3 columns.
  • the polarity of one via conductor and the polarity of the via conductor adjacent to it at the shortest distance are different.
  • the number and arrangement of the first via conductors 13 and the second via conductors 14 are not particularly limited to this.
  • first via conductor 13 and the second via conductor 14 can be a metal material having particularly high electrical conductivity.
  • the material of the first via conductor 13 and the second via conductor 14 can be a metal material mainly composed of Ni, Ag, Cu, Au, Pt, Mo, or W, for example. is preferred.
  • the materials of the first via conductor 13 and the second via conductor 14 can be appropriately changed according to the mounting environment of the capacitor 1A according to the present embodiment.
  • the material of the two via conductors 14 does not necessarily have to be the same.
  • first via conductor 13 and second via conductor 14 are made of Ni.
  • the second via conductors 14 may be formed together with the columnar conductors 19 to be described later by a thick film forming method such as electroplating or screen printing.
  • the material of the second via conductors 14 is the same as the material of the columnar conductors 19 to be described later.
  • first via conductor 13 and the second via conductor 14 are not particularly limited, and are appropriately set according to the thickness and size of the insulating substrate 10 .
  • first via conductor 13 and second via conductor 14 preferably have axial lengths of, for example, 5 ⁇ m or more and 50 ⁇ m or less, and preferably have diameters of, for example, 15 ⁇ m or more and 150 ⁇ m or less.
  • the insulating substrate 10 is provided with a plurality of substantially columnar supporting conductors 15 that protrude from the first main surface 10a toward the capacitance forming portion 20 and are surrounded by the capacitance forming portion 20.
  • the plurality of supporting conductors 15 configured in this way function as supporting portions that support the capacitance forming portion 20 by being joined to the capacitance forming portion 20 respectively. That is, by providing a plurality of supporting conductors 15 as these supporting portions, it is possible to suppress warping of the insulating substrate 10 due to stress generated during the manufacturing process of the capacitor 1A. will be described later.
  • each of the plurality of supporting conductors 15 extends along the normal direction of the first main surface 10a, and overlaps each of the plurality of first via conductors 13 when viewed along the normal direction. are placed. Thereby, the support conductor 15 is connected to the first via conductor 13 .
  • each of the plurality of supporting conductors 15 is preferably arranged so as to be substantially coaxial with each of the plurality of first via conductors 13 . Moreover, it is preferable that each of the plurality of supporting conductors 15 has a cross section perpendicular to the normal direction of the first main surface 10a larger than the cross section of the corresponding first via conductor 13 . Therefore, it is preferable that the diameter of each of the plurality of supporting conductors 15 is, for example, 15 ⁇ m or more and 100 ⁇ m or less.
  • each of the conductors 15 can be arranged to at least partially overlap with each of the plurality of first via conductors 13 when viewed along the normal direction of the first main surface 10a. Therefore, by doing so, each of the plurality of supporting conductors 15 can be reliably connected to each of the plurality of first via conductors 13 .
  • the axial length of the support conductor 15 is not particularly limited, and is appropriately set according to the thickness of the capacitance forming portion 20. However, it should be long enough to pass through the capacitance forming portion 20 in its thickness direction. It is preferable to have As will be described later, in the case where the capacitance forming portion 20 includes a plurality of laminated capacitance forming portions spaced apart from each other in the normal direction of the first main surface 10a, the capacitor forming portion 20 that is the farthest from the first main surface 10a It must have an axial length sufficient to be bonded to at least a portion of the layer located on the bottom (that is, the first capacitance forming portion 20a in FIG. 3).
  • the axial length of the plurality of supporting conductors 15 preferably has a lower limit of, for example, 15 ⁇ m and an upper limit of a length obtained by subtracting 20 ⁇ m from the thickness of the capacitor 1A.
  • the supporting conductor 15 preferably contains the same material as at least a part of the materials contained in the metal porous body 21 to be described later.
  • the material of the support conductor 15 can be a metal material mainly composed of, for example, any one of Ni, Mo, W, Al, Ti, Ta, Nb, Cu, Pt, Au and Ag.
  • the support conductor 15 may be made of an alloy material containing two or more selected from these metal materials as main components.
  • the supporting conductor 15 is made of Ni.
  • the outer shape of the support conductor 15 when viewed from above is not limited to a substantially circular shape, and may be, for example, a substantially elliptical shape. Further, the support conductor 15 may extend in a direction tapered considerably with respect to the normal direction of the first main surface 10a.
  • the internal conductor 18 is formed continuously so as to cover a later-described conductive film 23 that constitutes the capacitance forming portion 20 . More specifically, the internal conductor 18 covers the conductive film 23 that defines the internal space so as to fill the internal space of the capacitance forming portion 20, and the external surface of the capacitance forming portion 20 and the supporting conductor. 15 is covered with a conductive film 23. In addition, the internal conductor 18 covers the conductive film 23 covering the first main surface 10a of the insulating substrate 10 .
  • the internal conductor 18 covers the conductive film 23 covering the surface of the insulating substrate 10 in the portion defining the second through hole 12 provided in the insulating substrate 10 . More specifically, at the boundary between the second via conductor 14 and the base material of the insulating substrate 10, the base material of the insulating substrate 10 is covered with a dielectric film 22, which will be described later. It is covered with a conductive film 23 , and the conductive film 23 is further covered with an internal conductor 18 . Further, the internal conductor 18 is covered with the second via conductor 14 , thereby directly connecting the internal conductor 18 to the second via conductor 14 .
  • the internal conductor 18 also covers the surface of each of a plurality of columnar conductors 19, which will be described later. It is connected to the via conductor 14 .
  • the thickness of the internal conductor 18 is not particularly limited as long as it is thicker than the conductive film 23, but is preferably 30 ⁇ m or more, more preferably 200 ⁇ m or more. 3 to 6 and the like are drawn so as to include portions where the thickness of the internal conductor 18 is extremely different. 2 via conductor 14) is about the same as the thickness of the conductive film 23, but in reality, the thickness of the conductive film 23 and the internal conductor 18 differ considerably as described above. (This also applies to FIGS. 19 to 29, FIGS. 33 to 36, FIGS. 38 and 39, which will be described later).
  • the conductive film 23 and the second via conductor 14 are connected via the internal conductor 18 .
  • the ESR of the capacitor 1A can be reduced, the details of which will be described later.
  • the internal conductor 18 is formed so as to fill the space provided between the layers of the plurality of capacitance forming portions stacked apart from each other in the normal direction of the first main surface 10a.
  • the ESR of 1A will be reduced, and the details will be described later.
  • each layer of the capacitance forming section 20 is held by the internal conductors 18 buried between the layers. Thereby, the mechanical strength of the capacitance forming portion 20 can be improved.
  • At least one of a metal material such as Ag and a conductive polymer can be used as the main material for the internal conductor 18 .
  • the internal conductor 18 may be made of an alloy material containing two or more selected from these metal materials as main components.
  • the internal conductor 18 is made of Ag.
  • the internal conductor 18 is formed by, for example, a chemical vapor deposition (CVD) method, an atomic layer deposition (ALD) method, a pulsed laser deposition (PLD) method, a plating method, a bias sputtering method, a sol-gel method, a highly conductive It can be formed by a method using molecular packing or a method using supercritical fluid.
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • PLD pulsed laser deposition
  • plating method a bias sputtering method
  • sol-gel method a highly conductive It can be formed by a method using molecular packing or a method using supercritical fluid.
  • the thickness of the internal conductor 18 described above is measured, for example, by observing a cross section perpendicular to the extending direction of the first main surface 10a of the insulating substrate 10 using a scanning electron microscope.
  • the longitudinal direction of the capacitor 1A is Lx
  • the lateral direction is Ly
  • the thickness direction of the capacitor 1A (that is, the normal direction of the first main surface 10a) is Lz
  • the capacitor 1A is polished so that the Lx-Lz cross section of the capacitor 1A located in the center in the Ly direction is exposed.
  • the polishing process is performed so that the exposed cross section is positioned within an error range of ⁇ 100 ⁇ m in the Ly direction with respect to the center position.
  • the observation range of the cross section in the Lx direction is a range of ⁇ 50 ⁇ m based on the central position of the cross section in the Lx direction
  • the observation range of the cross section in the Lz direction is a plurality of laminated layers separated from each other in the Lz direction. It is the range between the layer located closest to the first main surface 10a and the layer adjacent thereto in the capacitance forming portion.
  • the elements of the material defining the internal conductor 18 are mapped by energy dispersive X-ray spectroscopy. , which is imaged. Next, the mapping image is binarized. Next, in the binarized image, the thickness of the internal conductor 18 in the Lz direction is measured at 100 points at a pitch of 10 nm in the Lx direction, and the average value is calculated. The average value calculated in this way is the thickness of the internal conductor 18 .
  • FIG. 5 is a schematic diagram enlarging a part of the internal conductor 18 for explaining the measurement of the thickness of the internal conductor 18, and does not illustrate the mapping image or the binarized image described above. .
  • the insulating substrate 10 is further provided with a plurality of substantially cylindrical columnar conductors 19 protruding from the first main surface 10a toward the capacitance forming portion 20 and surrounded by the capacitance forming portion 20 via the internal conductors 18. It is
  • the plurality of columnar conductors 19 are connected to the internal conductor 18 by covering the surface of each of them with the internal conductor 18 as described above.
  • each of the plurality of columnar conductors 19 extends along the normal direction of the first main surface 10a, and when viewed along the normal direction of the first main surface 10a, the plurality of second via conductors 14 are overlapped with each other. Thus, each of the plurality of columnar conductors 19 is connected to the second via conductor 14 at its end on the insulating substrate 10 side.
  • the conductive film 23 and the second via conductor 14 are connected not only through the internal conductor 18 as described above, but also through the columnar conductor 19 together with the internal conductor 18 .
  • the internal conductor 18 and the second via conductor 14 are not only directly connected, but also connected via the columnar conductor 19 .
  • the second external connection wiring as the cathode described above is connected to the capacitance forming portion 20 via the second via conductor 14 , the internal conductor 18 and the columnar conductor 19 .
  • the ESR of the capacitor 1A can be reduced, the details of which will be described later.
  • each of the plurality of columnar conductors 19 is preferably arranged so as to be substantially coaxial with each of the plurality of second via conductors 14 . Moreover, it is preferable that each of the plurality of columnar conductors 19 has a cross section orthogonal to the normal direction of the first main surface 10a larger than the corresponding cross section of the second via conductor 14 . Therefore, it is preferable that the diameter of each of the plurality of columnar conductors 19 is, for example, 15 ⁇ m or more and 150 ⁇ m or less.
  • each of the plurality of columnar conductors 19 can be arranged to overlap each of the plurality of second via conductors 14 at least partially. Therefore, by doing so, each of the plurality of columnar conductors 19 can be reliably connected to each of the plurality of second via conductors 14 .
  • the axial length of the columnar conductor 19 is not particularly limited, and is appropriately set according to the thickness of the capacitance forming portion 20. However, it should be long enough to pass through the capacitance forming portion 20 in its thickness direction. It is preferable to have a As will be described later, in the case where the capacitance forming portion 20 includes a plurality of laminated capacitance forming portions spaced apart from each other in the normal direction of the first main surface 10a, the capacitor forming portion 20 that is the farthest from the first main surface 10a It must have an axial length sufficient to be bonded to at least a portion of the layer located on the bottom (that is, the first capacitance forming portion 20a in FIG. 3).
  • the axial length of the plurality of columnar conductors 19 preferably has a lower limit of, for example, 15 ⁇ m and an upper limit of a length obtained by subtracting 20 ⁇ m from the thickness of the capacitor 1A.
  • the columnar conductor 19 preferably contains the same material as at least a part of the material contained in the metal porous body 21 to be described later.
  • the material of the columnar conductors 19 can be a metal material mainly composed of, for example, any one of Ni, Mo, W, Al, Ti, Ta, Nb, Cu, Pt, Au and Ag.
  • the columnar conductor 19 may be made of an alloy material containing two or more selected from these metal materials as main components.
  • the columnar conductors 19 may be formed together with the second via conductors 14 by, for example, electroplating or a thick film forming method such as screen printing. In that case, the material of the columnar conductors 19 is the same as the material of the second via conductors 14 . In the present embodiment, second via conductors 14 and columnar conductors 19 made of Ni are both formed by electrolytic plating.
  • the outer shape of the columnar conductor 19 when viewed from above is not limited to a substantially circular shape, and may be, for example, a substantially elliptical shape. Also, the columnar conductor 19 may extend in a direction substantially tapered with respect to the normal direction of the first main surface 10a.
  • the support conductor 15 described above constitutes part of the first external connection wiring described above, and the internal conductor 18 and the columnar conductor 19 constitute part of the second external connection wiring described above. That is, the support conductor 15, the internal conductor 18, and the columnar conductor 19 constitute first external connection wiring and second external connection wiring, respectively, which have different polarities.
  • a plurality of first bumps 16 are provided on the second main surface 10 b of the insulating substrate 10 so as to cover the plurality of first via conductors 13 .
  • the plurality of first bumps 16 serve as a bonding material for mounting the capacitor 1A as a surface-mounted electronic component on a wiring board or the like and electrically connecting the capacitance forming portion 20 of the capacitor 1A to an external circuit. and is provided so as to protrude from the second main surface 10 b of the insulating substrate 10 .
  • Each of the plurality of first bumps 16 has a substantially semispherical shape.
  • a plurality of second bumps 17 are provided on the second main surface 10 b of the insulating substrate 10 so as to cover the plurality of second via conductors 14 .
  • the plurality of second bumps 17 serve as bonding materials for mounting the capacitor 1A as a surface-mounted electronic component on a wiring board or the like, and for electrically connecting the capacitance forming portion 20 of the capacitor 1A to an external circuit. and is provided so as to protrude from the second main surface 10 b of the insulating substrate 10 .
  • Each of the plurality of second bumps 17 has a substantially semispherical shape.
  • Each of the plurality of first bumps 16 constitutes part of the above-described first external connection wiring.
  • Each of the plurality of second bumps 17 constitutes part of the above-described second external connection wiring. That is, the plurality of first bumps 16 and the plurality of second bumps 17 constitute first external connection wirings and second external connection wirings having different polarities, respectively.
  • first bump 16 and the second bump 17 can be used for the first bump 16 and the second bump 17, but it is preferable to use a metal material having particularly high electrical conductivity.
  • the material of the first bumps 16 and the material of the second bumps 17 can be metal materials, for example, Ni, Ag, Cu, Au, and Sn as main materials.
  • first bump 16 and second bump 17 are made of Au.
  • the sizes of the first bumps 16 and the second bumps 17 are not particularly limited, and are appropriately set according to the sizes of the first via conductors 13 and the second via conductors 14 .
  • the first external connection wiring serving as the anode of the pair of external connection wirings is composed of the first via conductor 13, the support conductor 15, and the first bump 16.
  • the second external connection wiring as a cathode of is composed of a second via conductor 14 , an internal conductor 18 , a columnar conductor 19 and a second bump 17 .
  • the capacitance forming part 20 is provided to face the insulating substrate 10, and covers the porous metal body 21 having a plurality of fine holes inside and the surface of the porous metal body 21. It includes a dielectric film 22 and a conductive film 23 further covering the surface of the dielectric film 22 .
  • the capacitance forming portion 20 is provided so as to face the insulating substrate 10, it is not substantially directly joined to the insulating substrate 10, or is assumed to be directly joined to the insulating substrate 10. are only slightly joined.
  • the state in which the capacitance forming portion 20 is only slightly bonded to the insulating substrate 10 means a state in which a portion of the capacitance forming portion 20 is bonded to the insulating substrate 10 at a predetermined ratio or less. That is, the state in which the capacitance forming portion 20 is only slightly joined to the insulating substrate 10 means that the insulating substrate 10 is in a cross section orthogonal to the extending direction of the first main surface 10a of the insulating substrate 10, as shown in FIG.
  • the metal porous body 21 is directly with respect to the insulating substrate 10, or via the dielectric film 22 or the conductive film 23
  • the sum of the line segment lengths parallel to the first main surface 10a of the indirectly joined portion is the total line length in the arbitrary region of the first main surface. It means that it is 30% or less of the segment length (that is, the line segment length c in the example shown in FIG. 6).
  • the capacitance forming portion 20 includes a plurality of capacitance forming portions stacked and separated from each other in the normal direction of the first main surface 10a.
  • the number of layers of the laminated capacitance forming portion is not particularly limited, and is appropriately set according to the desired capacitance.
  • Capacitance forming portion 20 in the present embodiment is composed of three layers.
  • first capacitance forming portion 20a and second capacitance forming portion 20b will be referred to as a third capacitance forming portion 20c.
  • At least part of the plurality of fine holes provided inside the metal porous body 21 are not closed by the metal porous body itself, and preferably the plurality of fine holes provided inside the metal porous body 21 are not closed. are not closed by the metal porous body itself.
  • a metal porous body is composed of, for example, a sintered body of metal particles.
  • the metal porous body 21 is positioned so as to surround the support conductor 15 on the portion of the first main surface 10a of the insulating substrate 10 excluding the edge portion.
  • the metal porous body 21 configured in this manner is fired together with the support conductor 15 containing at least part of the same material as the material contained in the metal porous body 21 in the forming process.
  • the metal porous body 21 is joined to the support conductor 15 . That is, in the capacitor 1A according to the present embodiment, the porous metal body 21 of the first capacitance forming portion 20a, the porous metal body 21 of the second capacitance forming portion 20b, and the porous metal body 21 of the third capacitance forming portion 20c are connected by the support conductor 15 . Therefore, the first external connection wiring as the anode described above is connected to the capacitance forming section 20 via the supporting conductor 15 .
  • the metal porous body 21 can be composed of various conductive metal materials, but Ni, Mo, W, Al, Ti, Ta, Nb, Cu, Pt, Au and Ag are mainly used. It is preferable to configure this with a metal material as a material.
  • the metal porous body 21 may be made of an alloy material containing two or more selected from these metal materials as main components. In this embodiment, the metal porous body 21 is made of Ni.
  • the thickness and size of the metal porous body 21 are not particularly limited, and the size in particular is appropriately set according to the size of the insulating substrate 10 .
  • the metal porous body 21 is preferably composed of a sintered body of metal particles.
  • metal particles having various shapes such as spherical, ellipsoidal, flat, plate-like, and needle-like can be used.
  • the particle size of the metal particles is not particularly limited, but the average particle size is preferably 600 nm or less, more preferably 20 nm or more and 500 nm or less.
  • the dielectric film 22 covers the surface of the metal porous body 21 as described above. More specifically, the dielectric film 22 not only covers the surface of the metal porous body 21 in the outermost portion of the capacitance forming portion 20, but also covers the portion of the metal porous body 21 located inside the capacitance forming portion 20. Among the surfaces of the porous body 21, it also covers the surfaces defined by the above-described fine pores that are not closed by the metal porous body itself. The dielectric film 22 also covers the surface of the support conductor 15 .
  • Dielectric film 22 can be composed of various insulating materials, such as AlO x , SiO x , HfO x , TiO x , TaO x , ZrO x , SiAlO x , HfAlO x , ZrAlO x .
  • the dielectric film 22 is any one of AlOx (for example Al2O3 ), SiOx (for example SiO2 ), HfOx , TiOx , SiAlOx, HfAlOx , ZrAlOx , HfSiOx and ZrSiOx . It is preferable to configure In addition, the above chemical formula simply indicates the structure of the material, and does not limit the composition. That is, x, y and z attached to O and N may be arbitrary values greater than 0, and the abundance ratio of each element including metal elements is arbitrary. Alternatively, the dielectric film 22 may be composed of a laminated film composed of a plurality of dielectric layers made of different materials. In this embodiment, the dielectric film 22 is made of AlSiO.
  • the dielectric film 22 can be preferably formed by a vapor phase method such as a vacuum deposition method, a CVD method, a sputtering method, an ALD method, a PLD method, or a method using a supercritical fluid. , formed by the ALD method.
  • a vapor phase method such as a vacuum deposition method, a CVD method, a sputtering method, an ALD method, a PLD method, or a method using a supercritical fluid.
  • the thickness of the dielectric film 22 is not particularly limited, it is preferably 3 nm or more and 100 nm or less, more preferably 5 nm or more and 50 nm or less.
  • the conductive film 23 covers the surface of the dielectric film 22 as described above. More specifically, the conductive film 23 not only covers the surface of the dielectric film 22 in the outermost portion of the capacitance forming portion 20, but also covers the portion of the dielectric film 22 located inside the capacitance forming portion 20. It also covers the surface of membrane 22 . The conductive film 23 also covers the surface of the dielectric film 22 covering the surface of the support conductor 15 .
  • the conductive film 23 can be made of various conductive materials, any one of Ni, Cu, Ru, Al, W, Ti, Ag, Au, Zn, Ta and Nb is used as the main material.
  • metal materials alloy materials containing two or more selected from these metal materials as main components, metal nitrides such as TiN, TiAlN, TiSiN, TaN, NbN, and WN, metal oxynitrides such as TiON and TiAlON, Conductive polymers such as PEDOT (poly(3,4-ethylenedioxythiophene)), polypyrrole and polyanine, and conductive oxide films such as RuO 2 , ZnO, (Zn, Al) O and NiO. be able to. Among them, it is preferable to configure the conductive film 23 with an oxide semiconductor such as TiN, TiON, ZnO, or RuO. In this embodiment, the conductive film 23 is made of TiN.
  • the conductive film 23 can be preferably formed by a CVD method, an ALD method, a PLD method, a plating method, a bias sputtering method, a sol-gel method, a method using conductive polymer filling, or a method using a supercritical fluid. , particularly preferably formed by the ALD method. Also, the conductive film 23 may be configured by a laminated film composed of a plurality of conductive layers made of different materials. In that case, the film can be formed by another method after the film is formed by the ALD method.
  • the thickness of the conductive film 23 is not particularly limited, it is preferably 3 nm or more, more preferably 10 nm or more.
  • the capacitance forming portion 20 includes a plurality of capacitance forming portions stacked apart from each other in the normal direction of the first main surface 10a, and the space provided between these layers is defined as: An internal conductor 18 is formed so as to fill it.
  • the conductive film 23 of the first capacitance forming portion 20a, the conductive film 23 of the second capacitance forming portion 20b, and the conductive film 23 of the third capacitance forming portion 20c are all They will be connected by an inner conductor 18 .
  • the thickness of the internal conductor 18 in the portion located between the first capacitance forming portion 20a and the second capacitance forming portion 20b is preferably configured to be larger than the thickness of the conductive film 23.
  • the thickness of the internal conductor 18 is preferably at least twice the thickness of the conductive film, and more preferably at least three times the thickness.
  • the thickness is 10 times or more, more preferably 100 times or more.
  • the configuration is the same for the thickness of the internal conductor 18 located between the second capacitance forming portion 20b and the third capacitance forming portion 20c.
  • the sealing portion 30 is provided on the first main surface 10a of the insulating substrate 10, seals the capacitance forming portion 20 together with the insulating substrate 10, and seals the capacitance forming portion. It defines an outer surface 30a located on the side opposite to the insulating substrate 10 side when viewed from 20 . More specifically, the sealing portion 30 is positioned to cover the upper, lateral and lower portions of the capacitance forming portion 20 provided to face the first main surface 10a of the insulating substrate 10, and further When the internal conductor 18 is not completely filled in the internal space of the capacitance forming portion 20, the internal conductor 18 is located so as to fill the space that is not filled.
  • the sealing portion 30 can be made of various insulating materials, but is preferably made of an insulating material having excellent weather resistance.
  • the material of the sealing portion 30 can be, for example, a resin material such as polyimide resin, polybenzoxazole resin, polyethylene terephthalate resin, benzocyclobutene resin, or epoxy resin.
  • various additives can be included in the resin material, and for example, SiO 2 filler, Al 2 O 3 filler, etc. may be included in order to adjust the coefficient of thermal expansion.
  • the sealing portion 30 is made of epoxy resin.
  • a moisture-resistant protective film may be formed between the capacitance forming portion 20 and the sealing portion 30 .
  • the moisture-resistant protective film is formed by applying an inorganic insulator made of SiN, SiO 2 , Al 2 O 3 , HfO 2 , ZrO 2 or the like to the capacitance forming portion 20 by CVD, ALD, or the like.
  • a water-repellent organic insulator such as a fluorine-based resin or a silane coupling agent resin may be provided so as to cover the capacitance forming portion 20 .
  • the moisture-resistant protective film does not necessarily have to be formed inside the capacitance forming portion 20, and it is sufficient if it is formed so as to cover only the outer surface.
  • the sealing portion 30 can be formed by various coating methods, for example, a method using a vacuum laminator, a method using an air dispenser, a method using a jet dispenser, a screen printing method, a vacuum printing method, An electrostatic coating method, an inkjet method, a photolithography method, or the like can be used.
  • the thickness and size of the sealing portion 30 are not particularly limited, and the size is appropriately set according to the size of the insulating substrate 10 .
  • the thickness of the sealing portion 30 is preferably 5 ⁇ m or more and 50 ⁇ m or less, for example.
  • the thickness of the sealing portion 30 described above is measured, for example, by observing a cross section orthogonal to the extending direction of the first main surface 10a of the insulating substrate 10 using an optical microscope.
  • the longitudinal direction of the capacitor 1A is Lx
  • the lateral direction is Ly
  • the thickness direction of the capacitor 1A (that is, the normal direction of the first main surface 10a) is Lz
  • the capacitor 1A is polished so that the Lx-Lz cross section of the capacitor 1A located in the center in the Ly direction is exposed.
  • the polishing process is performed so that the exposed cross section is positioned within an error range of ⁇ 100 ⁇ m in the Ly direction with respect to the center position.
  • the observation range of the cross section in the Lx direction is a range of ⁇ 50 ⁇ m with respect to the central position of the cross section in the Lx direction, and is a range in which neither the support conductor 15 nor the columnar conductor 19 is provided.
  • the thickness of the sealing portion 30 in the Lz direction is measured at 10 points at equal intervals in the Lx direction, and the average value of these measurements is calculated.
  • the average value calculated in this manner is the thickness of the sealing portion 30 .
  • three of the thicknesses in the Lz direction of the sealing portion 30 measured at these ten points are illustrated as line segment lengths e1, e2, and e3.
  • the capacitance forming portion 20 composed of the metal porous body 21, the dielectric film 22 and the conductive film 23 is integrated with the insulating substrate 10 and the sealing portion 30. , and electrical extraction of the capacitance forming portion 20 is realized by a pair of external connection wirings.
  • FIG. 8 is a flow diagram showing a method of manufacturing a capacitor according to this embodiment.
  • 9 to 23 are schematic cross-sectional views for explaining each step of the manufacturing flow shown in FIG. 8, respectively.
  • the manufacturing method of the capacitor 1A shown below manufactures an assembly of capacitors that are in the process of being processed by collectively processing up to the middle stage of the manufacturing process, and then separates the assembly by dividing the assembly. 2) is a method of simultaneously mass-producing a plurality of capacitors 1A by further processing the work-in-progress after singulation.
  • a green sheet is produced in step S1. Specifically, Al 2 O 3 powder and glass powder are weighed, and these Al 2 O 3 powder and glass powder are mixed with an organic solvent such as toluene and ethanol, and a binder such as polyvinyl butyral. This mixture is then formed into a sheet, thereby producing a green sheet from which the insulating substrate is made. After the green sheets are produced, they are cut to prepare a plurality of green sheets.
  • an organic solvent such as toluene and ethanol
  • a binder such as polyvinyl butyral
  • step S2 first through holes and second through holes are formed in some of the plurality of green sheets. Specifically, a first through-hole to be filled later by a first via conductor that is a part of the anode is provided at a predetermined position of the green sheet, and a second via conductor that is a part of the cathode is provided at a predetermined position of the green sheet. A second through hole is provided which is to be filled later.
  • the method of forming the first through holes and the second through holes is not particularly limited, but for example, the first through holes and the second through holes are formed by irradiating the green sheet with laser light. can do.
  • the first through-holes and the second through-holes may be formed by processing using a mechanical puncher or sandblasting.
  • step S3 first via conductors are formed in the green sheet in which the first through holes and the second through holes are formed. Specifically, a conductive paste is applied to the green sheet so as to fill the first through holes. At that time, the second through holes should not be filled with the conductive paste.
  • the method of applying the conductive paste is not particularly limited, but for example, a screen printing method can be used.
  • the green sheet is fired in step S4. Specifically, a green sheet having no first through-holes and second through-holes is superimposed on the green sheet to which the conductive paste has been applied in step S3, and the superimposed green sheets are pressure-bonded. be done. Then, the laminate of green sheets after pressure bonding is degreased, and then the laminate of green sheets after degreasing is fired.
  • the first through hole and the second through hole are not provided on the other main surface of the green sheet coated with the conductive paste, which faces the one main surface.
  • Green sheets are laminated.
  • a uniaxial press machine for example, can be used for crimping the green sheets.
  • the firing of the green sheet is performed at a temperature of 700° C. to 1000° C. in an air atmosphere, for example.
  • the insulating substrate is a so-called multiple substrate in which insulating substrates to be finally included in each of a plurality of capacitors are connected in a matrix. Only the substrate 10 will be noted, and the surrounding portion thereof is omitted from the dashed lines.
  • the first through hole and the second through hole are formed in step S2, and then the first via conductor is formed in step S3.
  • the second through hole may be formed after the first via conductor is formed.
  • the case where the green sheet and the conductive paste are fired at the same time is described as an example.
  • a second through hole may be provided.
  • the insulating substrate after baking is provided with first through holes and second through holes by, for example, sandblasting, wet etching, or dry etching, and then a conductive paste is applied to form the first and second through holes. It should be baked.
  • the first via conductor may be formed by sputtering, vapor deposition, plating, or the like.
  • step S5 a conductive paste layer for forming the metal porous body 21 is applied. More specifically, as shown in FIG. 10, a conductive paste layer 21p is applied on the first main surface 10a of the insulating substrate 10 for forming the metal porous body 21, which will be described later.
  • the second through holes 12 provided in the insulating substrate 10 are coated with an epoxy resin or the like (not shown). It is preferable that a closing portion that closes the second through hole 12 is provided. This is to prevent the conductive paste from entering the inside of the second through hole 12 .
  • conductive metal particles 21a and a binder 21b composed of an organic solvent such as terpineol and ethyl cellulose varnish are weighed and mixed, and a conductive paste is produced based on the mixture by using a rolling machine. .
  • the conductive paste thus produced is applied onto the first main surface 10a of the insulating substrate 10 and dried so as to have a rectangular pattern shape as a whole when viewed from above.
  • a conductive paste containing metal particles 21a made of Ni is used.
  • the conductive paste is applied in multiple layers to form a layer having a predetermined thickness on the insulating substrate 10 .
  • Each conductive paste applied on the insulating substrate 10 becomes the metal porous body 21 described above through a firing process described later.
  • the layered conductive paste composed of the metal particles 21a and the binder 21b thus formed is referred to as a conductive paste layer 21p.
  • step S6 a resin paste layer is applied. More specifically, as shown in FIG. 11, on the conductive paste layer 21p formed in a sheet shape on the first main surface 10a of the insulating substrate 10, a resin paste layer 21c is formed as a whole in plan view. It is applied in a rectangular shape and dried.
  • the resin paste layer 21c separates a plurality of conductive paste layers 21p, which will be described later, and will disappear in the firing process, which will be described later.
  • a resin paste layer 21c made of acrylic resin is used.
  • step S7 a conductive paste layer and a resin paste layer are further laminated. More specifically, as shown in FIG. 12, conductive paste layer 21p and resin paste layer 21c are further formed on conductive paste layer 21p and resin paste layer 21c already applied on insulating substrate 10. They are laminated so as to be alternately arranged in the normal direction of the first main surface 10a. As a result, a laminate including a plurality of conductive paste layers 21p and resin paste layers 21c is formed on insulating substrate 10 .
  • the laminate described above is composed of a total of three conductive paste layers 21p and a total of two resin paste layers 21c.
  • the number of paste layers 21c is not particularly limited, and is appropriately set according to the desired capacity.
  • the layer farthest from the first main surface 10a of the insulating substrate 10 is configured to be the conductive paste layer 21p. It may be configured to be a layer in which it lies.
  • supporting conductor holes are formed in step S8. More specifically, as shown in FIG. 13, a portion of the laminate that overlaps with first via conductor 13 when viewed along the normal direction of first main surface 10a is provided with a hole that penetrates the laminate. A plurality of supporting conductor holes 15h are formed. The plurality of supporting conductor holes 15h are to be filled with supporting conductors in the step of forming the supporting conductors, which will be described later. Further, in the present embodiment, the cross section of each of the plurality of supporting conductor holes 15 h is configured to be larger than the cross section of each of the first via conductors 13 .
  • the method for forming the supporting conductor hole 15h is not particularly limited, but for example, the supporting conductor hole 15h can be formed by irradiating the laminate with a laser beam. Alternatively, the supporting conductor holes 15h may be formed by processing using a mechanical puncher or sandblasting.
  • a supporting conductor is formed in step S9. More specifically, as shown in FIG. 14, the supporting conductor holes 15h are filled with the conductive paste so as to fill the supporting conductor holes 15h.
  • the plurality of supporting conductors 15 formed in this manner protrude from the first main surface 10a toward the laminate and are surrounded by the laminate. Further, each of the plurality of supporting conductors 15 thus formed is connected to each of the plurality of first via conductors 13 .
  • Ni paste is used as the conductive paste embedded in the supporting conductor holes 15h.
  • the support conductor 15 containing the same material as the material contained in the metal particles 21a that is, the material contained in the metal porous body 21
  • the supporting conductor 15 and the porous metal body 21 are firmly metal-bonded.
  • the method of applying the conductive paste to be embedded in the supporting conductor holes 15h is not particularly limited, but for example, a screen printing method can be used.
  • step S10 columnar conductor holes are formed in step S10. More specifically, as shown in FIG. 15, a portion of the laminate overlapping with the second through-hole 12 when viewed along the normal direction of the first main surface 10a is provided with a hole that penetrates the laminate. Then, a plurality of columnar conductor holes 19h are formed to reach the second through holes 12. As shown in FIG. The plurality of columnar conductor holes 19h are to be filled with columnar conductors in a columnar conductor forming step to be described later. Further, in the present embodiment, the cross section of each of the plurality of columnar conductor holes 19 h is configured to be larger than the cross section of each of the second through holes 12 .
  • the method of forming the columnar conductor holes 19h is not particularly limited, but for example, the columnar conductor holes 19h can be formed by irradiating the laminate with laser light. Alternatively, the columnar conductor holes 19h may be formed by processing using a mechanical puncher or sandblasting.
  • step S11 the laminate and the supporting conductor are fired. More specifically, as shown in FIG. 16, the laminate and the support conductor 15 are fired, thereby sintering the adjacent metal particles 21a contained in the conductive paste layer 21p to metal-join. At the same time, the metal particles 21a and the supporting conductors 15 adjacent to the metal particles 21a are joined. In addition, the resin paste layer 21c included in the laminate disappears due to the heat during the firing, thereby forming a plurality of metal porous bodies laminated apart from each other in the normal direction of the first main surface 10a. 21 will be formed.
  • the insulating substrate 10 Prior to performing the above-described firing, the insulating substrate 10 is degreased, and then the above-described laminate is obtained at a temperature of 400° C. to 900° C. in a reducing atmosphere of a mixture of nitrogen and hydrogen, for example. and firing of the support conductor 15 is performed.
  • the atmosphere during firing is preferably a reducing atmosphere as described above, but can be set to an atmosphere below the equilibrium oxygen partial pressure of the metal selected as the main component of the metal particles 21a.
  • the support conductor 15 contains Ni, which is the same material as the material contained in the metal particles 21a in the conductive paste layer 21p.
  • the metal particles 21a and the support conductor 15 are sintered by the above-described firing to form a metal joint. The mechanical strength of is improved.
  • the insulating substrate 10 would be unacceptably warped due to the heat load during firing as described above.
  • the support conductor 15 described above is provided in order to suppress the warpage, but this point will be described later.
  • a dielectric film is formed in step S12. More specifically, as shown in FIG. 17, the portion that covers the surfaces of the first main surface 10a, the metal porous body 21, and the support conductor 15 and defines the second through holes 12 provided in the insulating substrate 10 A dielectric film 22 is formed to cover the surface of the insulating substrate 10 of .
  • the method of forming the dielectric film 22 is not particularly limited as described above, but the ALD method is preferably used. If the ALD method is used, the raw material of the dielectric film 22 can be supplied in the form of a gas, so it is possible to select the material and adjust the film thickness at the atomic layer level. Therefore, even if the fine pores provided inside the metal porous body 21 are extremely small, a homogeneous and dense dielectric film 22 can be formed. Further, by using the ALD method, it is possible to easily cover the surface of the insulating substrate 10 at the portion defining the second through hole 12 provided in the insulating substrate 10 with the dielectric film 22 .
  • the dielectric film 22 is formed using this ALD method, a raw material is added to the fine holes provided inside the metal porous body 21 and the insides of the second through holes 12 provided in the insulating substrate 10 .
  • a raw material gas that has high vapor pressure, is easy to gasify, has high thermal stability, and has high reactivity.
  • TMA trimethylaluminum
  • TDMAS trisdimethylaminosilane
  • the dielectric film 22 is formed using the ALD method.
  • the dielectric film 22 is formed under a temperature condition of, for example, 150° C. or more and 400° C. or less, although it differs depending on the film formation method and the film formation material. If all or most of the capacitance forming portion 20 is directly bonded to the insulating substrate 10, unacceptable warping of the insulating substrate 10 due to the heat load during the formation of the dielectric film 22 may occur.
  • the support conductor 15 described above is provided in order to suppress the warpage, but this point will be described later.
  • a conductive film is formed in step S13. More specifically, as shown in FIG. 18, conductive film 23 is formed to cover dielectric film 22 formed in step S12.
  • the method of forming the conductive film 23 is not particularly limited as described above, but the ALD method is preferably used. If the ALD method is used, the raw material of the conductive film 23 can be supplied in the form of a gas, so it is possible to select the material and adjust the film thickness at the atomic layer level. Therefore, even if the fine pores provided inside the metal porous body 21 are extremely small, a homogeneous and dense conductive film 23 can be formed. Further, by using the ALD method, the dielectric film 22 provided inside the second through hole 12 of the insulating substrate 10 can also be easily covered with the conductive film 23 .
  • the formation of the conductive film 23 is performed under temperature conditions of, for example, 200° C. or more and 600° C. or less, although this varies depending on the film formation method and the film formation material. If all or most of the capacitance forming portion 20 were directly bonded to the insulating substrate 10, the insulating substrate 10 would unacceptably warp due to the thermal load during the formation of the conductive film 23. As a result, in the present embodiment, the support conductor 15 described above is provided in order to suppress the warpage, but this point will be described later.
  • the capacitance forming portion 20 is provided to face each other, and further includes a plurality of capacitance forming portions that are laminated while being separated from each other in the normal direction of the first main surface 10a.
  • step S14 internal conductors are formed in step S14. Specifically, as shown in FIG. 19, the internal conductor 18 is formed so as to cover the conductive film 23 covering the outer surface of the capacitance forming portion 20 and the tip portion of the support conductor 15, and the internal conductor 18 is , so as to fill the internal space of the capacitance forming portion 20 and also cover the conductive film 23 that defines the internal space.
  • the internal conductor 18 is formed so as to fill the space inside each of the plurality of capacitor forming portions stacked apart from each other in the normal direction of the first main surface 10a. (that is, the space provided between the first capacitance formation portion 20a and the second capacitance formation portion 20b and the space provided between the second capacitance formation portion 20b and the third capacitance formation portion 20c). space provided between them).
  • the internal conductor 18 is formed so as to cover the surfaces of the plurality of columnar conductor holes 19h provided in the capacitance forming portion 20 .
  • the internal conductor 18 also covers the conductive film 23 covering a predetermined portion of the insulating substrate 10 on the first main surface 10a side, and insulates the portion defining the plurality of second through holes 12 provided in the insulating substrate 10 . It is formed so as to also cover the conductive film 23 covering the surface of the substrate 10 .
  • the internal conductor 18 is formed by, for example, a CVD method, an ALD method, a PLD method, a plating method, a bias sputtering method, a sol-gel method, a method using a conductive polymer filling method, or a method using a supercritical fluid.
  • a CVD method an ALD method, a PLD method, a plating method, a bias sputtering method, a sol-gel method, a method using a conductive polymer filling method, or a method using a supercritical fluid.
  • the internal conductor 18 made of Ag is formed by a dipping method using Ag nanopaste.
  • step S15 second via conductors and columnar conductors are formed. More specifically, as shown in FIG. 20, in step S14, a plurality of second via conductors 14 are formed so as to fill a plurality of second through holes 12 and columnar conductor holes 19h whose surfaces are covered with internal conductors 18. and columnar conductors 19 are formed.
  • the second via conductors 14 and the columnar conductors 19 may be formed by a thick film forming method such as electrolytic plating or screen printing, as described above.
  • second via conductors 14 and columnar conductors 19 made of Ni are both formed by electrolytic plating.
  • the second via conductors 14 formed in this manner are joined to the internal conductors 18 covering the side surfaces thereof.
  • the plurality of columnar conductors 19 formed in this manner protrude from the first main surface 10a toward the capacitance forming portion 20 and are surrounded by the conductive film 23 of the capacitance forming portion 20 via the internal conductors 18. Thus, it is connected to the conductive film 23 .
  • the second via conductor 14 formed as described above is joined to the columnar conductor 19 at the end of the second via conductor 14 on the capacitance forming portion 20 side.
  • the second via conductor 14 is connected not only to the conductive film 23 via the inner conductor 18 covering it, but also to the conductive film 23 via the columnar conductor 19 together with the inner conductor 18 .
  • the columnar conductors 19 are formed together with the second via conductors 14 by electroplating, as shown in FIG. 19a are formed at the same time. Therefore, the columnar conductor 19 and the film-like portion 19a are formed of the same material so as to be integrally continuous.
  • a sealing portion is formed in step S16. More specifically, as shown in FIG. 21, a sealing portion 30 is provided on the first main surface 10a of the insulating substrate 10 on which the capacitance forming portion 20 is provided so as to cover the capacitance forming portion 20. .
  • the sealing portion 30 is formed by so-called compression molding, for example. More specifically, first main surface 10a of insulating substrate 10 is covered with a resin sheet, and in this state, a vacuum laminator is used to evacuate first main surface 10a of insulating substrate 10. A resin sheet is brought into close contact. In this state, the resin sheet is heated to 50° C. to 100° C. to laminate the capacitance forming portion 20 , and then heated to 100° C. to 200° C. to perform main curing. A sealing portion 30 is formed. The method for forming the sealing portion 30 is not limited to the compression molding described above, and may be performed by so-called transfer molding.
  • the capacitance forming portion 20 is sealed by the insulating substrate 10 and the sealing portion 30, preventing moisture from entering the capacitance forming portion 20 from the outside and ensuring moisture resistance. become.
  • the capacitance forming portion 20 is covered with the sealing portion 30, and the capacitance forming portion 20 is physically protected by the sealing portion 30 as well.
  • the curing conditions shown above are merely examples, and can be changed in various ways.
  • step S17 the insulating substrate is ground. More specifically, as shown in FIG. 22, second main surface 10b side of insulating substrate 10 located on the side opposite to the side on which capacitance forming portion 20 is provided is planarized.
  • first via conductor 13 and second via conductor 14 are exposed on the second main surface 10b side.
  • step S18 first bumps and second bumps are formed on the insulating substrate. More specifically, as shown in FIG. 23 , first bumps are formed on second main surface 10 b of insulating substrate 10 so as to cover first via conductors 13 and second via conductors 14 provided on insulating substrate 10 . 16 and a second bump 17 are formed.
  • the first bumps 16 and the second bumps 17 can be formed simultaneously by, for example, electrolytic plating.
  • portions other than the vicinity of the portions where first via conductors 13 and second via conductors 14 are exposed are covered with an ultraviolet curable resin film as a mask (not shown), and electroplating is performed in this state to form the first bumps.
  • 16 and the second bumps 17 can be formed to protrude from the second main surface 10b. After the electroplating is completed, the UV curable resin film as a mask is removed.
  • the method for forming the second via conductor 14, the first bump 16, and the second bump 17 described above is not limited to the method using the electrolytic plating described above, but may also be a screen printing method using a conductive paste. , an inkjet method, a dispenser method, or the like, and a combination of baking can also be used.
  • the conductive paste should contain a metal that can be fired at a low temperature and a sintering aid so that firing can be performed under temperature conditions that do not affect the resin forming the sealing portion 30. is preferred.
  • step S19 the insulating substrate is singulated. More specifically, by dividing the insulating substrate 10, a plurality of capacitors 1A connected to each other are separated into individual pieces.
  • a groove is formed in at least one of the insulating substrate 10 and the sealing portion 30, and a force is applied to the insulating substrate 10 and the sealing portion 30 so as to bend from the groove as a starting point.
  • the insulating substrate 10 and the sealing portion 30 are broken.
  • Diamond scribing, laser scribing, dicing, or the like can be used as a method for forming grooves.
  • individualization may be performed by directly cutting the insulating substrate 10 and the sealing portion 30 by scribing or dicing.
  • the capacitor 1A according to the first embodiment described above is manufactured.
  • the grinding process is performed after the sealing part is formed has been exemplified. It is also possible to form Further, the singulation may be performed immediately after the grinding process is performed, or the grinding process may be performed immediately after the singulation process.
  • the ESR is reduced by having the configuration as described above.
  • a capacitor is provided with a lead wiring in order to electrically connect a capacitance forming portion formed inside the capacitor to a circuit located outside the capacitor. It is important to increase the contact area between the capacitance forming portion and the lead-out wiring, increase the cross-sectional area of the lead-out wiring perpendicular to the direction of current flow, and enhance the continuity thereof.
  • the second external connection wiring as the lead wiring is connected to the second via conductor 14 and the columnar conductor 19 provided on the insulating substrate 10.
  • the insulating substrate 10 and the inner conductor 18 sealed by the sealing portion 30, and the conductive film 23 of the capacitance forming portion 20 is connected to the columnar conductor via the inner conductor 18 or together with the inner conductor 18. 19 to the second via conductor 14 .
  • the internal conductor 18 covers not only the portion of the conductive film 23 that defines the outer surface of the capacitance forming portion 20 but also the portion of the conductive film 23 that is exposed inside the capacitance forming portion 20 . Therefore, the internal conductor 18 is connected to most of the conductive film 23 , thereby increasing the contact area between the conductive film 23 and the internal conductor 18 .
  • the internal conductor 18 also covers each of the plurality of columnar conductors 19 protruding from the first main surface 10 a toward the capacitance forming portion 20 . Therefore, the contact area between the internal conductor 18 and the columnar conductor 19 can also be increased. Therefore, by configuring in this way, the contact area at each interface formed by the conductive film 23, the internal conductor 18 and the columnar conductor 19 can be increased.
  • the thickness of the conductive film 23 is about several hundred nanometers at most, whereas the thickness of the internal conductor 18 is about 100 nm. It is at least twice the thickness of the film 23, and the diameter of each of the plurality of columnar conductors 19 is as small as several tens of micrometers. Therefore, by configuring in this way, the cross-sectional area of the internal conductor 18 and the cross-sectional area of the columnar conductor 19 become larger than the cross-sectional area of the conductive film 23, and their continuity can be ensured.
  • the thickness of the internal conductor 18 formed in the space provided between the layers of the plurality of laminated capacitance forming portions is equal to the thickness of the conductive film.
  • the thickness of the internal conductor 18 is preferably larger than the thickness of the conductive film 23, and more preferably, the thickness of the internal conductor 18 is more than twice the thickness of the conductive film 23. More preferably, the thickness is 3 times or more, more preferably 10 times or more, and even more preferably 100 times or more.
  • the internal conductor 18 in the portion located between the layers covers the surface of the insulating substrate 10 in the portion that defines the second through hole 12 (for example, the internal conductor 18 located in another portion). Since it has a larger cross-sectional area than the portion of the internal conductor 18 covering the conductive film 23, the cross-sectional area of the second external connection wiring can be further increased, thereby further reducing the ESR. It will be planned.
  • the first external connection wiring as the lead wiring includes the first via conductor 13 and the support conductor 15 provided on the insulating substrate 10.
  • the metal porous body 21 of the capacitance forming portion 20 is connected to the first via conductor 13 via the support conductor 15 .
  • the support conductor 15 is provided so as to protrude from the first main surface 10a toward the capacitance forming portion 20, and the contact area at the interface formed by the support conductor 15 and the metal porous body 21 provided in this way is is larger than the contact area at the interface formed by the metal porous body 21 directly connected to the first via conductor 13 . Therefore, by configuring in this way, the contact area at the interface formed by the metal porous body 21 and the support conductor 15 can be increased.
  • the diameter of the support conductor 15 is as small as several tens of ⁇ m. Therefore, since the metal porous body 21 is connected to the first via conductor 13 via the supporting conductor 15 , the first via conductor 13 can be more easily connected than the case where the metal porous body 21 is directly connected to the first via conductor 13 .
  • the cross-sectional area of the external connection wiring can be increased, thereby reducing the ESR.
  • the capacitor 1A it is possible to reduce the ESR in the capacitor including the capacitance forming portion 20 composed of the metal porous body 21, the dielectric film 22, and the conductive film 23. Obviously, by providing the capacitor 1A according to the present embodiment, it is possible to reduce the ESR in the capacitor including the capacitance forming portion 20 composed of the metal porous body 21, the dielectric film 22, and the conductive film 23. Obviously, by providing the capacitor 1A according to the present embodiment, it is possible to reduce the ESR in the capacitor including the capacitance forming portion 20 composed of the metal porous body 21, the dielectric film 22, and the conductive film 23. Become.
  • the capacitance forming portion 20 is joined to each of the plurality of supporting conductors 15, on the other hand, as described above, it is connected to the insulating substrate 10. are substantially not directly bonded, or are only slightly bonded, if at all.
  • the heat of the insulating substrate 10 and the capacitance forming portion 20 is reduced in the manufacturing process involving the heat treatment of the capacitor 1A (that is, the firing process, the process of forming the dielectric film 22, and the process of forming the conductive film 23).
  • the stress generated due to the difference in expansion coefficients can be reduced.
  • warping of the insulating substrate 10 due to the stress can be effectively suppressed, and the dielectric film 22 and the conductive film 23 from above the insulating substrate 10 caused by the warping of the insulating substrate 10 can be prevented. Peeling can also be effectively suppressed.
  • the plurality of supporting conductors 15 protrude from the first main surface 10a toward the capacitance forming portion 20 and are surrounded by the capacitance forming portion 20. there is Thereby, each of the plurality of supporting conductors 15 is joined to the capacitance forming portion 20 .
  • the insulating substrate and the capacitor may be damaged by the influence of heat applied from the outside and heat generated inside after mounting. Stress is generated due to the difference in the coefficient of thermal expansion of the forming portion, and the stress causes the capacitor 1A to warp and possibly damage the joint portion between the insulating substrate and the metal porous body. By using the capacitor 1A, it is possible to effectively suppress the occurrence of such a problem.
  • capacitor 1A when viewed along the normal direction of first main surface 10a of insulating substrate 10, first via conductor 13 and second via All of the conductors 14 are provided within the region where the capacitance forming portion 20 is arranged (that is, the region indicated by the dashed line in FIG. 2).
  • neither the first external connection wiring nor the second external connection wiring is arranged at a position on the side of the capacitance forming section 20 . It is possible to minimize the sealing portion 30 of the portion to be connected. Therefore, not only can the capacitor 1A be made smaller than the conventional one, but the volume occupied by the portion other than the capacitance forming portion 20 in the capacitor 1A is reduced, so that the capacity can be increased.
  • first via conductor 13 and second via conductor 14 are positioned so as to pass through insulating substrate 10 in the thickness direction. They are arranged close to each other with their current paths directed in opposite directions. Therefore, the magnetic fields generated in these via conductors act so as to cancel each other out due to the flow of current, so that the so-called ESL (equivalent series inductance) can be reduced.
  • ESL equivalent series inductance
  • the first via conductors 13 and the second via conductors 14 are arranged in an array, and the polarity of one via conductor and this The polarities of via conductors adjacent to each other at the shortest distance are different from each other. By configuring in this way, the effect of reducing the ESL described above can be maximized.
  • each of the pair of external connection wirings for electrically drawing out capacitance forming portion 20 is configured to include a plurality of via conductors. It is With this configuration, the cross-sectional area of the current path can be increased compared to the case where each of the pair of external connection wirings is composed of a single via conductor, so that the ESR can be reduced. Become.
  • the base material of the insulating substrate 10 is covered by the dielectric film 22 at the boundary between the second via conductor 14 and the base material of the insulating substrate 10.
  • dielectric film 22 is covered with conductive film 23
  • conductive film 23 is further covered with second via conductor 14 .
  • the adhesion between the base material of the insulating substrate 10 and the second via conductors 14 is improved compared to the case where the base material of the insulating substrate 10 and the second via conductors 14 are directly bonded. As a result, it is possible to suppress the intrusion of moisture through this portion. Therefore, the capacitor can have excellent moisture resistance.
  • the metal porous body 21 is composed of a sintered body of metal particles.
  • the metal particles are metal-bonded to each other, thereby improving the mechanical strength of the capacitance forming portion 20 and increasing the bonding area between the metal particles, so that the ESR can be reduced. be able to. Furthermore, it is possible to obtain the effect that a metal porous body having open pores can be formed relatively easily.
  • FIG. 24 is a schematic cross-sectional view showing one form of a columnar conductor related to the capacitor shown in FIG.
  • the columnar conductor 19 is located on the insulating substrate 10 side when viewed from the capacitance forming portion 20 of the pair of ends of the columnar conductor 19, as shown in FIG.
  • the end located on the opposite side is formed in a hollow shape, and the sealing portion 30 may be formed by entering this hollow portion. Even in the capacitor 1A' including the columnar conductors 19 formed in this manner, the effects described above can be obtained.
  • FIG. 25 is a schematic cross-sectional view of a capacitor according to a first modified example.
  • capacitor 1A1 according to the first modification based on the first embodiment described above will be described.
  • the capacitor 1A1 according to the first modification differs from the capacitor 1A according to the first embodiment described above only in the formation position of the supporting conductors 15 .
  • each of the plurality of supporting conductors 15a corresponds to the first via conductor. 13 and second via conductor 14.
  • the supporting conductor formed at a position overlapping neither the first via conductor 13 nor the second via conductor 14 is formed at a position overlapping the first via conductor 13 .
  • the number of supporting conductors 15a is not particularly limited, and is appropriately set according to the size of the insulating substrate 10 or desired capacity.
  • the support conductor 15a is not directly joined to the first via conductor 13. Therefore, the first via conductor 13 is electrically connected to the porous metal body 21 of the third capacitor forming part 20c by joining at least a part of the end face on the side of the capacitor forming part 20 to the porous metal body 21 of the third capacitor forming part 20c. It is In addition, the metal porous bodies 21 of the plurality of laminated capacitor forming portions are connected to each other via the support conductors 15a that are joined to all of them.
  • the second via conductor 14 is connected to the capacitor via the inner conductor 18 or via the columnar conductor 19 together with the inner conductor 18 . Since it is connected to the conductive film 23 of the formation part 20, the cross-sectional area of the current path of the second external connection wiring can be increased. Therefore, an effect similar to that described in the first embodiment can be obtained, and the capacitor including the capacitance forming portion 20 composed of the metal porous body 21, the dielectric film 22, and the conductive film 23 has a low power consumption. ESR conversion will be achieved.
  • the capacitance forming portion 20 is supported by the plurality of supporting conductors 15a, so that the capacitance forming portion 20 is not substantially directly joined to the insulating substrate 10. , or they will be joined only slightly, if at all. As a result, mounting stability and post-mounting reliability are improved in the capacitor including the capacitance forming portion 20 composed of the metal porous body 21, the dielectric film 22, and the conductive film 23.
  • FIG. 26 is a schematic cross-sectional view of a capacitor according to a second modification.
  • a capacitor 1A2 according to a second modification based on the above-described first embodiment will be described below with reference to FIG.
  • the capacitor 1A2 according to the second modified example differs from the capacitor 1A according to the first embodiment described above only in the configuration of the supporting conductors 15. As shown in FIG. 26, the capacitor 1A2 according to the second modified example differs from the capacitor 1A according to the first embodiment described above only in the configuration of the supporting conductors 15. As shown in FIG. 26, the capacitor 1A2 according to the second modified example differs from the capacitor 1A according to the first embodiment described above only in the configuration of the supporting conductors 15. As shown in FIG.
  • the plurality of supporting conductors overlap the first via conductors 13.
  • the support conductor 15 is formed at a position close to the support conductor 15, and the support conductor 15a is formed at a position not overlapping with either the first via conductor 13 or the second via conductor 14.
  • the number of supporting conductors 15a is not particularly limited, and is appropriately set according to the size of the insulating substrate 10 or desired capacity.
  • the capacitance forming portion 20 is supported by the plurality of supporting conductors 15 and 15a, so that the capacitance forming portion 20 is not substantially directly joined to the insulating substrate 10. There is no direct bonding, or there is little, if any, direct bonding. As a result, the mounting stability and post-mounting reliability of the capacitor including the capacitance forming portion 20 composed of the metal porous body 21, the dielectric film 22, and the conductive film 23 are further improved.
  • FIG. 27 is a schematic cross-sectional view of a capacitor according to a third modification.
  • a capacitor 1A3 according to a third modification based on the first embodiment described above will be described below with reference to FIG.
  • a capacitor 1A3 according to the third modification has a capacitance forming portion on the first main surface 10a of the insulating substrate 10, when compared with the capacitor 1A according to the first embodiment described above.
  • the configuration is different only in that a moisture-resistant protective film 40 is further formed in a portion located between 20 and sealing portion 30 .
  • Moisture-resistant protective film 40 may be formed, for example, by forming an inorganic insulator made of SiN, SiO2, Al2O3, HfO2, ZrO2, or the like by CVD, ALD, or the like so as to cover capacitance formation section 20 before forming sealing section 30.
  • it can be formed by providing a water-repellent organic insulator such as a fluororesin or a silane coupling agent resin so as to cover the capacitance forming portion 20 .
  • the moisture-resistant protective film does not necessarily have to be formed inside the capacitance forming portion 20, and it is sufficient if it is formed so as to cover only the outer surface.
  • the moisture-resistant protective film 40 in addition to the sealing portion 30 prevents moisture from entering the capacitance forming portion 20 from the outside. Since intrusion can be prevented, moisture resistance can be further improved.
  • FIG. 28 is a schematic cross-sectional view of a capacitor according to a fourth modification.
  • a capacitor 1A4 according to a fourth modification based on the first embodiment described above will be described.
  • capacitor 1A4 according to the fourth modification is positioned so as to surround insulating substrate 10 and capacitance forming portion 20 laterally when compared with capacitor 1A according to the first embodiment described above.
  • the configuration is different only in that a side sealing portion 50 is additionally formed.
  • the side sealing portion 50 is mainly made of any one of Si, Al 2 O 3 , ZrO 2 , BN, Si 3 N 4 , AlN, MgO, Mg 2 SiO 4 , BaTiO 3 , SrTiO 3 and CaTiO 3 , for example.
  • a sealing member made of an inorganic material such as glass or glass can be formed by providing a sealing member so as to cover the sides of the insulating substrate 10 and the capacitance forming section 20 by an inkjet method or the like.
  • step S4 shown in FIG. S19 that is, singulation
  • step S5 that is, application of a conductive paste layer onto the insulating substrate
  • the side surface is surrounded by the side sealing portion 50, not only the impact resistance is enhanced, but also the resistance to stress generated during processing of the capacitor 1A4 is enhanced. Therefore, in the capacitor 1A4, damage to the dielectric film 22 and the conductive film 23 in the vicinity of the side sealing portion 50 is effectively prevented, thereby suppressing a decrease in the withstand voltage of the capacitor 1A4. .
  • (Embodiment 2) 29 is a schematic cross-sectional view of a capacitor according to Embodiment 2.
  • FIG. Capacitor 1B according to the present embodiment will be described below with reference to FIG.
  • the capacitor 1B according to the present embodiment has both the front surface and the back surface configured as mounting surfaces for a wiring board or the like. Their composition is different.
  • the plurality of supporting conductors 15 forming part of the first external connection wiring and the plurality of supporting conductors 15 forming part of the second external connection wiring , and the columnar conductor 19 are formed so as to penetrate the capacitance forming portion 20 and the sealing portion 30 .
  • the plurality of supporting conductors 15 and the columnar conductors 19 are exposed on the outer surface 30a of the sealing section 30 located on the side opposite to the insulating substrate 10 when viewed from the capacitance forming section 20 .
  • a plurality of first bumps 16 forming part of the first external connection wiring are provided so as to cover end faces of the plurality of supporting conductors 15 exposed on the outer surface 30a.
  • a plurality of second bumps 17 forming part of the second external connection wiring are provided so as to cover end surfaces of the plurality of columnar conductors 19 exposed on the outer surface 30a.
  • FIG. 30 is a flow chart showing the method of manufacturing the capacitor according to the present embodiment
  • FIGS. 31 to 35 are schematic cross-sectional views for explaining each step of the manufacturing flow shown in FIG. Next, an example of a specific manufacturing method for manufacturing capacitor 1B according to the present embodiment described above will be described with reference to FIGS.
  • step S7 the conductive paste layer 21p and the resin paste layer 21c are laminated on the insulating substrate.
  • the part corresponding to the skimmed part of the binder 21b contained in the layer located farthest from the first main surface 10a is intentionally formed to be thick.
  • a supporting conductor is formed in step S9.
  • the support conductor 15 formed here is intentionally formed long in the axial direction by the amount corresponding to the skim portion that was intentionally formed thick in step S7. .
  • step S15B a portion of the film-like portion formed in step S15 and the conductive film covering the tip portion of the support conductor formed in step S13 are removed. More specifically, first, a portion of the film-like portion 19a located on the side opposite to the insulating substrate 10 side when viewed from the capacitance forming portion 20 is selectively removed, and then, as shown in FIG. The conductive film 23 covering the end located on the opposite side of the insulating substrate 10 when viewed from the capacitance forming portion 20, of the pair of ends of each of the supporting conductors 15 is selectively removed.
  • Such removal of the film-like portion 19a is performed, for example, by immersing only the portion of the film-like portion 19a located on the side opposite to the insulating substrate 10 side when viewed from the capacitance forming portion 20 in an etchant.
  • a so-called dip method or the like is used to remove only the portion 19a.
  • the removal of the conductive film 23 is similarly performed by a dipping method or the like.
  • the conductive film 23 is ground together with the tip portion of the supporting conductor 15 to be described later, so that the conductive film 23 is ground. It is possible to effectively prevent a part of the film 23 from being unintentionally joined to the support conductor 15 , thereby causing a short circuit between the support conductor 15 and the conductive film 23 .
  • a sealing portion is formed.
  • the sealing portion 30 formed here is formed so as to cover the distal end portion of the support conductor 15 that was intentionally formed to be long in step S9.
  • step S17 grinding is performed in step S17.
  • the grinding process performed here is performed not only on the insulating substrate 10 but also on the sealing portion, the supporting conductor, and the columnar conductor. More specifically, as shown in FIG. 35, not only the second main surface 10b side of the insulating substrate 10 located opposite to the side on which the capacitance forming portion 20 is provided, but also the outer surface 30a of the sealing portion 30 The side, the end of the support conductor 15 on the side of the outer surface 30a, and the end of the columnar conductor 19 on the side of the outer surface 30a are removed by planar cutting. As a result, the end surfaces of the supporting conductor 15 and the columnar conductor 19 are exposed on the outer surface 30a.
  • step S18 shown in FIG. 30 the first bumps 16 and the second bumps 17 are formed on the outer surface 30a so as to cover the end surfaces of the supporting conductor 15 and the end surfaces of the columnar conductors 19 exposed on the outer surface 30a. .
  • the capacitor 1B according to the second embodiment described above is manufactured by going through all steps S1 to S19 and S15B including each step individually described above.
  • the electrical drawing of the capacitance forming portion 20 is mainly It can be mounted on either the front surface (that is, the outer surface 30a) or the back surface (that is, the second major surface 10b of the insulating substrate 10), thereby enabling mounting on either the front surface or the back surface. It can be a configured capacitor.
  • FIG. 36 is a schematic cross-sectional view of a capacitor according to Embodiment 3
  • FIG. 37 is a flowchart showing a method of manufacturing a capacitor according to this embodiment.
  • Capacitor 1C according to the present embodiment will be described below with reference to FIGS. 36 and 37.
  • FIG. 37 is a schematic cross-sectional view of a capacitor according to Embodiment 3.
  • the capacitor 1C according to the present embodiment differs from the capacitor 1A according to the above-described first embodiment only in that the capacitance forming portion is composed of a single layer.
  • the manufacturing method of the capacitor 1C configured in this way differs from the manufacturing method of the capacitor 1A only in that, as shown in FIG. .
  • the method of manufacturing the capacitor 1C includes steps S7 and S8 shown in FIG. layer and resin paste layer) is not performed, and in step S11C shown in FIG. 37, unlike step S11 shown in FIG. Firing of the conductor is performed.
  • the second via conductor 14 is connected to the capacitor via the inner conductor 18 or via the columnar conductor 19 together with the inner conductor 18 . Since the first via conductor 13 is connected to the conductive film 23 of the forming portion 20 , the cross-sectional area of the current path of the second external connection wiring can be increased, and the first via conductor 13 is connected to the capacitor via the plurality of support conductors 15 . Since it is connected to the metal porous body 21 of the formation part 20, the cross-sectional area of the current path of the first external connection wiring can be increased. Therefore, the same effects as those described in the first embodiment can be obtained, and the capacitor comprising the capacitance forming portion 20 composed of the metal porous body 21, the dielectric film 22, and the conductive film 23 has the following advantages: A low ESR is achieved.
  • the capacitor 1C according to the present embodiment has the characteristic configuration shown in the capacitor 1B according to the second embodiment described above (that is, both the front surface and the back surface are mounting surfaces for a wiring board or the like). ) is applied, in addition to the above-described effects, the electrical extraction of the capacitance forming portion 20 can This can be done on any of the second main surfaces 10b).
  • FIG. 38 is a schematic cross-sectional view of a capacitor according to a fifth modification
  • FIG. 39 is a schematic cross-sectional view enlarging the vicinity of the second via conductor shown in FIG.
  • Capacitor 1C1 according to a fourth modification based on the third embodiment described above will be described below with reference to FIGS. 38 and 39.
  • FIG. 39 is a schematic cross-sectional view enlarging the vicinity of the second via conductor shown in FIG.
  • the capacitor 1C1 according to the fifth modification does not have the supporting conductor 15 and the columnar conductor 19 (see FIG. 36) when compared with the capacitor 1C according to the third embodiment described above. They are different in that respect.
  • the first external connection wiring is composed of the first via conductor 13 and the first bump 16
  • the second external connection wiring is composed of the second via conductor 14, the second bump 17, and the internal It is constructed by a conductor 18 .
  • the first via conductor 13 is joined to the metal porous body 21 of the capacitance forming portion 20 at least partly at the end on the capacitance forming portion 20 side, thereby It is electrically connected to the metal porous body 21 .
  • the side surfaces of the second via conductors 14 are covered with the internal conductors 18 that cover the surface of the insulating substrate 10 at the portions defining the plurality of second through holes 12 provided in the insulating substrate 10.
  • the end portion of the second via conductor 14 on the first main surface 10 a side is covered with an internal conductor 18 that covers the capacitance forming portion 20 .
  • the second via conductor 14 is connected to the internal conductor 18, and the above-described second external connection wiring is connected to the capacitance forming portion 20 via the second via conductor 14 and the internal conductor 18. ing.
  • the thickness of the portion of the internal conductor 18 connected to the second via conductor 14 is about the same as the thickness of the conductive film 23, as described above.
  • the thickness of the internal conductor 18 is considerably thicker than the thickness of the conductive film 23 (for example, three times or more).
  • the second via conductor 14 is connected to the conductive film 23 of the capacitance forming portion 20 through the internal conductor 18, so that the cross-sectional area of the current path of the second external connection wiring is increased. can do. Therefore, an effect similar to the effect described in the above third embodiment is obtained, and in the capacitor including the capacitance forming portion 20 composed of the metal porous body 21, the dielectric film 22 and the conductive film 23, A low ESR is achieved.
  • the manufacturing method of the capacitor 1C1 according to the present modification is different from the manufacturing method of the capacitor 1C in that step S10 (that is, formation of columnar conductor holes) shown in FIG. are not performed, and the formation of the second via conductors in step S15 is performed after step S17 (that is, grinding).
  • step S10 that is, formation of columnar conductor holes
  • step S17 that is, grinding

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US18/733,992 US12603232B2 (en) 2022-01-31 2024-06-05 Capacitor including a capacitance forming part having a metal porous body, a dielectric film, and a conductive film

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WO2021193616A1 (ja) * 2020-03-24 2021-09-30 株式会社村田製作所 コンデンサ

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KR100914890B1 (ko) * 2007-12-17 2009-08-31 삼성전기주식회사 고체 전해 콘덴서 및 그 제조방법
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WO2021193616A1 (ja) * 2020-03-24 2021-09-30 株式会社村田製作所 コンデンサ

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CN118382900A (zh) 2024-07-23

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