WO2023139447A1 - 半導体装置、及び半導体装置の作製方法 - Google Patents

半導体装置、及び半導体装置の作製方法 Download PDF

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Publication number
WO2023139447A1
WO2023139447A1 PCT/IB2023/050232 IB2023050232W WO2023139447A1 WO 2023139447 A1 WO2023139447 A1 WO 2023139447A1 IB 2023050232 W IB2023050232 W IB 2023050232W WO 2023139447 A1 WO2023139447 A1 WO 2023139447A1
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Prior art keywords
layer
insulating layer
insulating
conductive
film
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PCT/IB2023/050232
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English (en)
French (fr)
Japanese (ja)
Inventor
保坂泰靖
島行徳
神長正美
中田昌孝
肥塚純一
岡崎健一
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2023574883A priority Critical patent/JPWO2023139447A1/ja
Priority to US18/728,173 priority patent/US20250113716A1/en
Priority to DE112023000641.5T priority patent/DE112023000641T5/de
Priority to CN202380017236.3A priority patent/CN118556296A/zh
Priority to KR1020247026540A priority patent/KR20240135790A/ko
Publication of WO2023139447A1 publication Critical patent/WO2023139447A1/ja
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6728—Vertical TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs

Definitions

  • One embodiment of the present invention relates to semiconductor devices, display devices, display modules, and electronic devices.
  • One embodiment of the present invention relates to a method for manufacturing a semiconductor device and a method for manufacturing a display device.
  • one aspect of the present invention is not limited to the above technical field.
  • Examples of the technical field of one embodiment of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, storage devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input/output devices (e.g., touch panels), driving methods thereof, and manufacturing methods thereof.
  • Semiconductor devices having transistors are widely applied to display devices and electronic devices, and there is a demand for higher integration and higher speed of semiconductor devices. For example, when a semiconductor device is applied to a high-definition display device, a highly integrated semiconductor device is required. As one of means for increasing the degree of integration of transistors, development of fine-sized transistors is underway.
  • VR virtual reality
  • AR augmented reality
  • SR alternative reality
  • MR mixed reality
  • Display devices for XR are desired to have high definition and high color reproducibility in order to enhance the sense of reality and immersion. Examples of applicable display devices include liquid crystal display devices, organic EL (Electro Luminescence) elements, light emitting devices including light emitting devices such as light emitting diodes (LEDs), and the like.
  • LEDs light emitting diodes
  • Patent Document 1 discloses a display device for VR using an organic EL device (also called an organic EL element).
  • An object of one embodiment of the present invention is to provide a semiconductor device including a fine-sized transistor and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide a semiconductor device including a transistor with high on-state current and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide a semiconductor device with favorable electrical characteristics and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide a method for manufacturing a semiconductor device with high productivity. Another object of one embodiment of the present invention is to provide a novel semiconductor device and a manufacturing method thereof.
  • One embodiment of the present invention is a semiconductor device including a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer.
  • the first insulating layer is provided on the first conductive layer and has a first opening reaching the first conductive layer.
  • a second conductive layer is provided on the first insulating layer and has a second opening in a region overlapping with the first opening.
  • the semiconductor layer is in contact with the top surface of the first conductive layer, the side surfaces of the first insulating layer, and the top and side surfaces of the second conductive layer.
  • a second insulating layer is provided on the semiconductor layer.
  • a third conductive layer is provided on the second insulating layer.
  • the first insulating layer has a laminated structure of a third insulating layer and a fourth insulating layer on the third insulating layer.
  • the fourth insulating layer has a region with a higher film density than the third insulating
  • One embodiment of the present invention is a semiconductor device including a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer.
  • the first insulating layer is provided on the first conductive layer and has a first opening reaching the first conductive layer.
  • a second conductive layer is provided on the first insulating layer and has a second opening in a region overlapping with the first opening.
  • the semiconductor layer is in contact with the top surface of the first conductive layer, the side surfaces of the first insulating layer, and the top and side surfaces of the second conductive layer.
  • a second insulating layer is provided on the semiconductor layer.
  • a third conductive layer is provided on the second insulating layer.
  • the first insulating layer has a laminated structure of a third insulating layer and a fourth insulating layer on the third insulating layer.
  • the fourth insulating layer has a region with a higher nitrogen content than the third insulating
  • the first insulating layer preferably has a fifth insulating layer.
  • the fifth insulating layer is preferably located between the third insulating layer and the first conductive layer.
  • the fifth insulating layer preferably has a region with a higher film density than the third insulating layer.
  • the first insulating layer preferably has a fifth insulating layer.
  • the fifth insulating layer is preferably located between the third insulating layer and the first conductive layer.
  • the fifth insulating layer preferably has a region with a higher nitrogen content than the third insulating layer.
  • the film thickness of the first insulating layer is preferably 0.01 ⁇ m or more and less than 3 ⁇ m.
  • the first conductive layer preferably contains an oxide conductor.
  • the second conductive layer preferably contains an oxide conductor.
  • the end of the second conductive layer on the side of the second opening coincides or substantially coincides with the end of the first insulating layer on the side of the first opening.
  • the end of the second conductive layer on the side of the second opening be located outside the end of the first insulating layer on the side of the first opening.
  • a first conductive film is formed, the first conductive film is processed to form a first conductive layer, a first insulating film is formed over the first conductive layer, a second conductive film is formed over the first insulating film, the second conductive film is processed, a second conductive layer having a first opening in a region overlapping with the first conductive layer is formed, the first insulating film is processed, and a second opening reaching the first conductive layer is formed.
  • the first insulating layer has a laminated structure of a third insulating layer and a fourth insulating layer on the third insulating layer.
  • the fourth insulating layer has a region with a higher film density than the third insulating layer.
  • a first conductive film is formed, the first conductive film is processed to form a first conductive layer, a first insulating film is formed over the first conductive layer, a second conductive film is formed over the first insulating film, the second conductive film is processed, a second conductive layer having a first opening in a region overlapping with the first conductive layer is formed, the first insulating film is processed, and a second opening reaching the first conductive layer is formed.
  • the first insulating layer has a laminated structure of a third insulating layer and a fourth insulating layer on the third insulating layer.
  • the fourth insulating layer has a region with a higher nitrogen content than the third insulating layer.
  • a first conductive film is formed, the first conductive film is processed to form a first conductive layer, a first insulating film is formed over the first conductive layer, a metal oxide layer is formed over the first insulating film, oxygen is supplied to the first insulating film, the metal oxide layer is removed, a second insulating film is formed over the first insulating film, a second conductive film is formed over the second insulating film, and a second conductive film is formed.
  • a second conductive layer having a first opening in a region overlapping with the first conductive layer; processing the first insulating film and the second insulating film; forming a first insulating layer and a second insulating layer having a second opening reaching the first conductive layer;
  • an insulating layer is formed, and a third conductive layer is formed on the third insulating layer.
  • the second insulating layer has a region with a higher film density than the first insulating layer.
  • a first conductive film is formed, the first conductive film is processed to form a first conductive layer, a first insulating film is formed over the first conductive layer, a metal oxide layer is formed over the first insulating film, oxygen is supplied to the first insulating film, the metal oxide layer is removed, a second insulating film is formed over the first insulating film, a second conductive film is formed over the second insulating film, and a second conductive film is formed.
  • a second conductive layer having a first opening in a region overlapping with the first conductive layer; processing the first insulating film and the second insulating film; forming a first insulating layer and a second insulating layer having a second opening reaching the first conductive layer;
  • an insulating layer is formed, and a third conductive layer is formed on the third insulating layer.
  • the second insulating layer has a region with a higher nitrogen content than the first insulating layer.
  • a semiconductor device including a fine-sized transistor and a manufacturing method thereof can be provided.
  • a semiconductor device including a transistor with high on-state current and a manufacturing method thereof can be provided.
  • a semiconductor device with favorable electrical characteristics and a manufacturing method thereof can be provided.
  • a method for manufacturing a semiconductor device with high productivity can be provided.
  • one embodiment of the present invention can provide a novel semiconductor device and a manufacturing method thereof.
  • FIG. 1A is a top view showing an example of a semiconductor device.
  • 1B and 1C are cross-sectional views showing examples of semiconductor devices.
  • FIG. 2 is a perspective view showing an example of a semiconductor device.
  • 3A to 3C are perspective views showing examples of semiconductor devices.
  • FIG. 4A is a top view showing an example of a semiconductor device.
  • FIG. 4B is a cross-sectional view showing an example of a semiconductor device;
  • FIG. 5A is a top view showing an example of a semiconductor device.
  • 7A and 7B are cross-sectional views showing examples of semiconductor devices.
  • FIG. 8A is a top view showing an example of a semiconductor device.
  • 8B and 8C are cross-sectional views showing examples of semiconductor devices.
  • FIG. 9A is a top view showing an example of a semiconductor device.
  • FIG. 9B is a cross-sectional view showing an example of a semiconductor device;
  • FIG. 10 is a cross-sectional view showing an example of a semiconductor device.
  • FIG. 11A is a top view showing an example of a semiconductor device; 11B and 11C are cross-sectional views showing examples of semiconductor devices.
  • 12A1 and 12B1 are perspective views illustrating an example of a method for manufacturing a semiconductor device.
  • 12A2 and 12B2 are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device.
  • 13A1 and 13B1 are perspective views illustrating an example of a method for manufacturing a semiconductor device.
  • 13A2 and 13B2 are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device.
  • 14A1 and 14B1 are perspective views illustrating an example of a method for manufacturing a semiconductor device.
  • 14A2 and 14B2 are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device.
  • 15A1 and 15B1 are perspective views illustrating an example of a method for manufacturing a semiconductor device.
  • 15A2 and 15B2 are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device.
  • 16A1 and 16B1 are perspective views illustrating an example of a method for manufacturing a semiconductor device.
  • 16A2 and 16B2 are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device.
  • 17A1 is a perspective view illustrating an example of a method for manufacturing a semiconductor device;
  • FIG. 17A2 is a cross-sectional view illustrating an example of a method for manufacturing a semiconductor device;
  • FIG. 18 is a top view showing an example of a display device.
  • FIG. 19 is a cross-sectional view showing an example of a display device.
  • FIG. 20 is a cross-sectional view showing an example of a display device.
  • FIG. 21 is a cross-sectional view showing an example of a display device.
  • FIG. 22 is a cross-sectional view showing an example of a display device.
  • FIG. 23 is a cross-sectional view showing an example of a display device.
  • FIG. 24 is a cross-sectional view showing an example of a display device.
  • FIG. 25A is a top view showing an example of a display device.
  • FIG. 25B is a cross-sectional view showing an example of a display device;
  • 26A to 26C are cross-sectional views illustrating an example of a method for manufacturing a display device.
  • 27A and 27B are cross-sectional views illustrating an example of a method for manufacturing a display device.
  • 28A and 28B are cross-sectional views illustrating an example of a method for manufacturing a display device.
  • 29A to 29G are diagrams showing examples of pixels.
  • 30A to 30K are diagrams showing examples of pixels.
  • FIG. 31 is a perspective view showing an example of a display device;
  • FIG. 32 is a cross-sectional view showing an example of a display device.
  • FIG. 33 is a cross-sectional view showing an example of a display device.
  • FIG. 34 is a cross-sectional view showing an example of a display device.
  • FIG. 35 is a cross-sectional view showing an example of a display device.
  • 36A to 36F are diagrams showing configuration examples of light emitting devices.
  • 37A to 37C are diagrams showing configuration examples of light emitting devices.
  • 38A and 38B are diagrams showing configuration examples of light receiving devices.
  • 38C to 38E are diagrams showing configuration examples of display devices.
  • 39A to 39D are diagrams showing examples of electronic devices.
  • 40A to 40F are diagrams showing examples of electronic devices.
  • 41A to 41G are diagrams illustrating examples of electronic devices.
  • 42A and 42B are graphs showing Id-Vg characteristics of transistors.
  • 43A and 43B are cross-sectional STEM images of the transistor.
  • 44A and 44B are cross-sectional STEM images of the transistor.
  • 45A and 45B are cross-sectional STEM images of the transistor.
  • 46A and 46B are cross-sectional STEM images of the transistor.
  • film and “layer” can be interchanged depending on the case or situation.
  • conductive layer can be changed to the term “conductive film.”
  • insulating film can be changed to the term “insulating layer”.
  • a device manufactured using a metal mask or FMM may be referred to as a device with an MM (metal mask) structure.
  • a device manufactured without using a metal mask or FMM may be referred to as a device with an MML (metal maskless) structure.
  • an SBS side-by-side structure
  • the material and configuration can be optimized for each light-emitting device, so the degree of freedom in selecting the material and configuration increases, and it becomes easy to improve luminance and reliability.
  • holes or electrons are sometimes referred to as "carriers".
  • the hole injection layer or electron injection layer may be referred to as a "carrier injection layer”
  • the hole transport layer or electron transport layer may be referred to as a “carrier transport layer”
  • the hole blocking layer or electron blocking layer may be referred to as a "carrier blocking layer”.
  • the carrier injection layer, the carrier transport layer, and the carrier block layer described above may not be clearly distinguished from each other due to their cross-sectional shape, characteristics, or the like.
  • one layer may serve as two or three functions of the carrier injection layer, the carrier transport layer, and the carrier block layer.
  • a light-emitting device (also referred to as a light-emitting element) has an EL layer between a pair of electrodes.
  • the EL layer has at least a light-emitting layer.
  • the layers (also referred to as functional layers) included in the EL layer include a light emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer), and a carrier block layer (hole block layer and electron block layer).
  • a light-receiving device (also referred to as a light-receiving element) has an active layer that functions at least as a photoelectric conversion layer between a pair of electrodes.
  • an island-shaped light-emitting layer means that the light-emitting layer is physically separated from an adjacent light-emitting layer.
  • a tapered shape refers to a shape in which at least a part of the side surface of the structure is inclined with respect to the substrate surface or the formation surface. For example, it is preferable to have a region where the angle between the inclined side surface and the substrate surface or the formation surface (also referred to as a taper angle) is less than 90 degrees.
  • the side surfaces of the structure, the substrate surface, and the formation surface are not necessarily completely flat, and may be substantially planar with a minute curvature or substantially planar with minute unevenness.
  • a mask layer (also referred to as a sacrificial layer) is positioned above at least a light-emitting layer (more specifically, a layer processed into an island shape among the layers constituting the EL layer) and has the function of protecting the light-emitting layer during the manufacturing process.
  • discontinuity refers to a phenomenon in which a layer, film, or electrode is divided due to the shape of the formation surface (for example, steps).
  • the top surface shape roughly matches means that at least a part of the outline overlaps between the laminated layers.
  • the upper layer and the lower layer may be processed with the same mask pattern, or partially with the same mask pattern. Strictly speaking, however, the contours do not overlap, and the upper layer may be located inside the lower layer, or the upper layer may be located outside the lower layer.
  • FIG. 1A A top view (also called a plan view) of transistor 100 is shown in FIG. 1A.
  • FIG. 1B shows a cross-sectional view taken along the dashed line A1-A2 shown in FIG. 1A
  • FIG. 1C shows a cross-sectional view taken along the dashed-dotted line B1-B2.
  • a perspective view of transistor 100 is shown in FIG. Note that some of the components of the transistor 100 (such as a gate insulating layer) are omitted in FIG. 1A.
  • the top view of the transistor some of the constituent elements are omitted in the subsequent drawings, as in FIG. 1A.
  • the insulating layer is transparent and the outline is indicated by a dashed line.
  • the transistor 100 is provided over the substrate 102 .
  • the transistor 100 includes a conductive layer 104 , an insulating layer 106 , a semiconductor layer 108 , a conductive layer 112 a, a conductive layer 112 b, and an insulating layer 110 .
  • the conductive layer 104 functions as a gate electrode.
  • a portion of the insulating layer 106 functions as a gate insulating layer.
  • the conductive layer 112a functions as one of a source electrode and a drain electrode, and the conductive layer 112b functions as the other.
  • the entire region of the semiconductor layer 108 which overlaps with the gate electrode with the gate insulating layer interposed therebetween, functions as a channel formation region between the source electrode and the drain electrode.
  • a region in contact with the source electrode functions as a source region
  • a region in contact with the drain electrode functions as a drain region.
  • a conductive layer 112 a is provided over the substrate 102 , an insulating layer 110 is provided over the conductive layer 112 a, and a conductive layer 112 b is provided over the insulating layer 110 .
  • the insulating layer 110 has a region sandwiched between the conductive layers 112a and 112b.
  • the conductive layer 112a has a region overlapping with the conductive layer 112b with the insulating layer 110 provided therebetween.
  • the insulating layer 110 has an opening 141 in a region overlapping with the conductive layer 112a. In opening 141, conductive layer 112a is exposed.
  • the conductive layer 112b has an opening 143 in a region overlapping with the conductive layer 112a.
  • the opening 143 is provided in a region overlapping with the opening 141 .
  • FIG. 3A is a perspective view showing the conductive layer 112a, the conductive layer 112b, the opening 141 and the opening 143.
  • the opening 141 provided in the insulating layer 110 is indicated by a dashed line.
  • the conductive layer 112b has an opening 143 in a region overlapping with the conductive layer 112a.
  • the conductive layer 112b is preferably not provided inside the opening 141 . In other words, the conductive layer 112b preferably does not have a region in contact with the side surface of the insulating layer 110 on the opening 141 side.
  • the top surface shape of the opening 141 and the opening 143 can be circular or elliptical, for example.
  • the upper surface shapes of the openings 141 and 143 may be triangles, quadrangles (including rectangles, rhombuses, and squares), polygons such as pentagons, or these polygons with rounded corners. As shown in FIG. 1A and the like, it is preferable that the upper surface shape of each of the openings 141 and 143 is circular.
  • the processing accuracy when forming the openings 141 and 143 can be improved, and the openings 141 and 143 can be formed in fine sizes.
  • the circle is not limited to a perfect circle.
  • the end of the conductive layer 112b on the side of the opening 143 preferably coincides or approximately coincides with the end of the insulating layer 110 on the side of the opening 141. It can be said that the top surface shape of the opening 143 matches or substantially matches the top surface shape of the opening 141 .
  • the end portion of the conductive layer 112b on the opening 143 side refers to the bottom end portion of the conductive layer 112b on the opening 143 side.
  • the lower surface of the conductive layer 112b refers to the surface on the insulating layer 110 side.
  • the end of the insulating layer 110 on the side of the opening 141 refers to the end of the upper surface of the insulating layer 110 on the side of the opening 141 .
  • the upper surface of the insulating layer 110 refers to the surface on the conductive layer 112b side.
  • the upper surface shape of the opening 143 refers to the shape of the lower surface end portion of the conductive layer 112b on the opening 143 side.
  • the shape of the upper surface of the opening 141 refers to the shape of the edge of the upper surface of the insulating layer 110 on the side of the opening 141 .
  • the ends are aligned or approximately aligned to match or substantially match the ends.
  • the ends are aligned or substantially aligned, and when the top surface shapes are matched or substantially matched, it can be said that at least part of the outline overlaps between the laminated layers when viewed from the top (also referred to as a plan view).
  • the upper layer and the lower layer may be processed with the same mask pattern, or partially with the same mask pattern. Strictly speaking, however, the outlines do not overlap, and the upper layer may be located inside the lower layer, or the upper layer may be located outside the lower layer.
  • the opening 141 can be formed using the resist mask used for forming the opening 143, for example. Specifically, an insulating film to be the insulating layer 110, a conductive film to be the conductive layer 112b over the insulating film, and a resist mask over the conductive film are formed. Then, after the opening 143 is formed in the conductive film using the resist mask, the opening 141 is formed in the insulating film using the resist mask, so that the end portions of the opening 141 and the opening 143 can be aligned or substantially aligned. With such a configuration, the process can be simplified.
  • the opening 141 may be formed in a process different from that of the opening 143.
  • the formation order of the openings 141 and 143 is not particularly limited.
  • a conductive film to be the conductive layer 112b may be formed and the opening 143 may be formed in the conductive film.
  • the end of the conductive layer 112b on the opening 143 side does not have to be aligned with the end of the insulating layer 110 on the opening 141 side.
  • the semiconductor layer 108 is provided so as to cover the openings 141 and 143 .
  • the semiconductor layer 108 has regions in contact with the top and side surfaces of the conductive layer 112b, the side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.
  • the semiconductor layer 108 is electrically connected to the conductive layer 112 a through the openings 141 and 143 .
  • the semiconductor layer 108 has a shape that conforms to the top and side surfaces of the conductive layer 112b, the side surface of the insulating layer 110, and the top surface of the conductive layer 112a.
  • the semiconductor layer 108 preferably covers the end of the conductive layer 112b on the opening 143 side.
  • FIG. 1B and the like show a structure in which the end portion of the semiconductor layer 108 is located on the conductive layer 112b. It can be said that the end portion of the semiconductor layer 108 is in contact with the top surface of the conductive layer 112b. Note that the semiconductor layer 108 may extend and cover the end of the conductive layer 112 b on the side not facing the opening 143 . An edge of the semiconductor layer 108 may contact the top surface of the insulating layer 110 .
  • FIG. 3B is a perspective view showing an extract of the conductive layer 112a and the semiconductor layer 108.
  • the semiconductor layer 108 is provided to cover the openings 141 and 143 .
  • the semiconductor layer 108 has a region in contact with the upper surface of the conductive layer 112a.
  • the semiconductor layer 108 has a single-layer structure in FIG. 1B and the like, one embodiment of the present invention is not limited to this.
  • the semiconductor layer 108 may have a laminated structure of two or more layers.
  • An insulating layer 106 functioning as a gate insulating layer is provided to cover the openings 141 and 143 .
  • the insulating layer 106 is provided over the semiconductor layer 108 , the conductive layer 112 b , and the insulating layer 110 .
  • the insulating layer 106 has regions in contact with the top surface and side surfaces of the semiconductor layer 108 , the top surface and side surfaces of the conductive layer 112 b , and the top surface of the insulating layer 110 .
  • the insulating layer 106 has a shape that conforms to the top surface of the insulating layer 110, the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the semiconductor layer 108, and the top surface of the conductive layer 112a.
  • the conductive layer 104 functioning as a gate electrode is provided over the insulating layer 106 and has a region in contact with the top surface of the insulating layer 106 .
  • the conductive layer 104 has a region overlapping with the semiconductor layer 108 with the insulating layer 106 interposed therebetween.
  • the conductive layer 104 has a shape that follows the top surface of the insulating layer 106 .
  • FIG. 3C is a perspective view selectively showing the conductive layer 112a and the conductive layer 104.
  • the conductive layer 104 is provided to cover the openings 141 and 143 .
  • the conductive layer 104 has regions overlapping the semiconductor layer 108 with the insulating layer 106 interposed therebetween.
  • the conductive layer 104 has a region overlapping with the conductive layer 112a and a region overlapping with the conductive layer 112b with the insulating layer 106 and the semiconductor layer 108 provided therebetween.
  • the conductive layer 104 preferably covers the end of the conductive layer 112b on the opening 143 side.
  • the transistor 100 is a so-called top-gate transistor that has a gate electrode above the semiconductor layer 108 . Furthermore, since the lower surface of the semiconductor layer 108 is in contact with the source electrode and the drain electrode, it can be called a TGBC (Top Gate Bottom Contact) transistor.
  • TGBC Top Gate Bottom Contact
  • the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 can each function as wiring. Further, the transistor 100 can be provided in a region where these wirings overlap. That is, in a circuit including the transistor 100 and the wiring, the area occupied by the transistor 100 and the wiring can be reduced. Furthermore, it is possible to reduce the area occupied by the circuit. Therefore, the semiconductor device can be small. For example, when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and the display device can have high definition. Further, when applied to a driver circuit (for example, a gate line driver circuit and a source line driver circuit) of a display device, the area occupied by the driver circuit can be reduced, and a display device with a narrow frame can be obtained.
  • a driver circuit for example, a gate line driver circuit and a source line driver circuit
  • FIGS. 4A and 4B are described with reference to FIGS. 4A and 4B.
  • 4A is a top view of transistor 100.
  • FIG. FIG. 4B is an enlarged view of FIG. 1B.
  • the region in contact with the conductive layer 112a functions as one of the source region and the drain region
  • the region in contact with the conductive layer 112b functions as the other of the source region and the drain region
  • the region between the source region and the drain region functions as the channel formation region.
  • the channel length of the transistor 100 is the distance between the source region and the drain region.
  • FIG. 4B shows the channel length L100 of the transistor 100 with a dashed double-headed arrow.
  • the channel length L100 is the distance between the end of the region where the semiconductor layer 108 and the conductive layer 112a are in contact and the end of the region where the semiconductor layer 108 and the conductive layer 112b are in contact in a cross-sectional view.
  • the channel length L100 of the transistor 100 corresponds to the length of the side surface of the insulating layer 110 on the opening 141 side in a cross-sectional view.
  • the channel length L100 is determined by the film thickness T110 of the insulating layer 110 and the angle ⁇ 110 between the side surface of the insulating layer 110 on the opening 141 side and the formation surface of the insulating layer 110 (here, the upper surface of the conductive layer 112a), and is not affected by the performance of the exposure apparatus used for manufacturing the transistor. Therefore, the channel length L100 can be set to a value smaller than the limit resolution of the exposure apparatus, and a fine-sized transistor can be realized.
  • the channel length L100 is preferably 0.01 ⁇ m or more and less than 3 ⁇ m, more preferably 0.05 ⁇ m or more and less than 3 ⁇ m, further preferably 0.1 ⁇ m or more and less than 3 ⁇ m, further preferably 0.15 ⁇ m or more and less than 3 ⁇ m, further preferably 0.2 ⁇ m or more and less than 3 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2.5 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2 ⁇ m.
  • the film thickness T110 of the insulating layer 110 is indicated by a dashed-dotted double-headed arrow.
  • the ON current of the transistor 100 can be increased by reducing the channel length L100.
  • a circuit that can operate at high speed can be manufactured.
  • the semiconductor device of one embodiment of the present invention is applied to a large display device or a high-definition display device, signal delay in each wiring can be reduced and display unevenness can be suppressed even when the number of wirings is increased.
  • the area occupied by the circuit can be reduced, the frame of the display device can be narrowed.
  • the channel length L100 can be controlled.
  • the film thickness T110 of the insulating layer 110 is preferably 0.01 ⁇ m or more and less than 3 ⁇ m, more preferably 0.05 ⁇ m or more and less than 3 ⁇ m, further preferably 0.1 ⁇ m or more and less than 3 ⁇ m, further preferably 0.15 ⁇ m or more and less than 3 ⁇ m, further preferably 0.2 ⁇ m or more and less than 3 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2.5 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2 ⁇ m.
  • 0.2 ⁇ m or more and less than 1.5 ⁇ m more preferably 0.3 ⁇ m or more and 1.5 ⁇ m or less, further preferably 0.3 ⁇ m or more and 1.2 ⁇ m or less, further preferably 0.4 ⁇ m or more and 1.2 ⁇ m or less, further preferably 0.4 ⁇ m or more and 1 ⁇ m or less, further preferably 0.5 ⁇ m or more and 1 ⁇ m or less.
  • the side surface of the insulating layer 110 on the side of the opening 141 is preferably tapered.
  • An angle ⁇ 110 between the side surface of the insulating layer 110 on the side of the opening 141 and the formation surface of the insulating layer 110 is preferably less than 90 degrees.
  • the coverage of a layer for example, the semiconductor layer 108 provided on the insulating layer 110 can be improved.
  • the angle ⁇ 110 is made smaller, the contact area between the semiconductor layer 108 and the conductive layer 112a becomes smaller, which may increase the contact resistance between the semiconductor layer 108 and the conductive layer 112a.
  • the angle ⁇ 110 is preferably 45 degrees or more and less than 90 degrees, more preferably 50 degrees or more and less than 90 degrees, further preferably 55 degrees or more and less than 90 degrees, further preferably 60 degrees or more and less than 90 degrees, further preferably 60 degrees or more and 85 degrees or less, further preferably 65 degrees or more and 85 degrees or less, further preferably 65 degrees or more and 80 degrees or less, further preferably 70 degrees or more and 80 degrees or less.
  • a layer for example, the semiconductor layer 108 formed on the conductive layer 112a and the insulating layer 110, thereby suppressing the occurrence of defects such as disconnection or voids in the layer.
  • contact resistance between the semiconductor layer 108 and the conductive layer 112a can be reduced.
  • FIG. 4B and the like show a structure in which the side surface of the insulating layer 110 on the opening 141 side has a linear shape in a cross-sectional view; however, one embodiment of the present invention is not limited thereto.
  • the side surface of the insulating layer 110 on the opening 141 side may be curved, or the side surface may have both a linear region and a curved region.
  • the channel width of the transistor 100 is the width of the source region or the width of the drain region in the direction orthogonal to the channel length direction. That is, the channel width is the width of the region where the semiconductor layer 108 and the conductive layer 112a are in contact or the width of the region where the semiconductor layer 108 and the conductive layer 112b are in contact in the direction orthogonal to the channel length direction.
  • the channel width of the transistor 100 is described as the width of a region where the semiconductor layer 108 and the conductive layer 112b are in contact with each other in a direction orthogonal to the channel length direction.
  • 4A and 4B show the channel width W100 of the transistor 100 with a solid double-headed arrow.
  • the channel width W100 is the length of the lower surface end portion of the conductive layer 112b on the opening 143 side in top view (also referred to as plan view).
  • the channel width W100 is determined by the top surface shape of the opening 143.
  • 4A and 4B show the width D143 of the opening 143 with a two-dot chain double-headed arrow.
  • the width D143 indicates the shortest rectangular short side that circumscribes the opening 143 when viewed from above.
  • the width D143 of the opening 143 is equal to or greater than the resolution limit of the exposure apparatus.
  • the width D143 is, for example, preferably 0.2 ⁇ m or more and less than 5 ⁇ m, more preferably 0.2 ⁇ m or more and less than 4.5 ⁇ m, further preferably 0.2 ⁇ m or more and less than 4 ⁇ m, further preferably 0.2 ⁇ m or more and less than 3.5 ⁇ m, further preferably 0.2 ⁇ m or more and less than 3 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2.5 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2 ⁇ m, further preferably 0.
  • the width D143 corresponds to the diameter of the opening 143, and the channel width W100 can be calculated as "D143 ⁇ ".
  • a semiconductor material that can be used for the semiconductor layer 108 is not particularly limited.
  • a single semiconductor or a compound semiconductor can be used.
  • Silicon or germanium for example, can be used as a single semiconductor.
  • compound semiconductors include gallium arsenide and silicon germanium.
  • an organic substance having semiconductor characteristics or a metal oxide having semiconductor characteristics also referred to as an oxide semiconductor
  • These semiconductor materials may contain impurities as dopants.
  • the crystallinity of the semiconductor material used for the semiconductor layer 108 is not particularly limited, and either an amorphous semiconductor or a semiconductor having crystallinity (a monocrystalline semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or a semiconductor partially having a crystal region) may be used. It is preferable to use a crystalline semiconductor because deterioration of transistor characteristics can be suppressed.
  • Silicon can be used for the semiconductor layer 108 .
  • Examples of silicon include monocrystalline silicon, polycrystalline silicon, microcrystalline silicon, amorphous silicon, and the like.
  • Examples of polycrystalline silicon include low temperature poly silicon (LTPS).
  • a transistor using amorphous silicon for the semiconductor layer 108 can be formed on a large glass substrate and manufactured at low cost.
  • a transistor using polycrystalline silicon for the semiconductor layer 108 has high field-effect mobility and can operate at high speed.
  • a transistor using microcrystalline silicon for the semiconductor layer 108 has higher field-effect mobility than a transistor using amorphous silicon and can operate at high speed.
  • the semiconductor layer 108 preferably has a metal oxide (oxide semiconductor) having semiconductor properties.
  • Metal oxides that can be used for the semiconductor layer 108 include, for example, indium oxide, gallium oxide, and zinc oxide.
  • the metal oxide preferably contains at least indium (In) or zinc (Zn).
  • the metal oxide preferably contains two or three elements selected from indium, the element M, and zinc.
  • Element M is one or more selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, cobalt, and magnesium.
  • the element M is preferably one or more selected from aluminum, gallium, yttrium, and tin.
  • the semiconductor layer 108 is made of, for example, indium oxide, indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as IAZO), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also referred to as IGAZO or IAGZO), or the like can be used.
  • indium tin oxide containing silicon, or the like can be used.
  • the element M is preferably one or more selected from gallium, aluminum, yttrium, and tin.
  • the element M is preferably gallium.
  • composition of the metal oxide included in the semiconductor layer 108 greatly affects the electrical characteristics and reliability of the transistor 100 .
  • an In-Zn oxide is used for the semiconductor layer 108
  • an In—Sn oxide is used for the semiconductor layer 108, it is preferable to use a metal oxide in which the atomic ratio of indium is equal to or higher than the atomic ratio of tin.
  • a metal oxide in which the atomic ratio of indium is higher than that of tin can be applied. Furthermore, it is preferable to use a metal oxide in which the atomic ratio of zinc is higher than that of tin.
  • a metal oxide in which the atomic ratio of indium is higher than that of aluminum can be applied. Furthermore, it is preferable to use a metal oxide in which the atomic ratio of zinc is higher than that of aluminum.
  • a metal oxide in which the atomic ratio of indium to the atomic number of metal elements is higher than that of gallium can be applied. Furthermore, it is more preferable to use a metal oxide in which the atomic ratio of zinc is higher than that of gallium.
  • a metal oxide in which the atomic ratio of indium to the atomic number of the metal element is higher than that of the element M can be applied. Furthermore, it is more preferable to use a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of the element M.
  • the sum of the atomic ratios of the metal elements can be used as the atomic ratio of the element M.
  • the atomic ratio of the element M can be the sum of the atomic ratio of gallium and the atomic ratio of aluminum.
  • the atomic ratio of indium, the element M, and zinc is preferably within the above range.
  • the ratio of the number of indium atoms to the number of metal element atoms contained in the metal oxide is 30 atomic % or more and 100 atomic % or less, preferably 30 atomic % or more and 95 atomic % or less, more preferably 35 atomic % or more and 95 atomic % or less, more preferably 35 atomic % or more and 90 atomic % or less, more preferably 40 atomic % or more and 90 atomic % or less, more preferably 45 atomic % or more and 90 atomic % or less, more preferably 50 atomic % or more and 80 atomic % or less, more preferably 60 atoms.
  • the ratio of the number of indium atoms to the total number of atoms of indium, the element M, and zinc is preferably within the above range.
  • the ratio of the number of indium atoms to the number of atoms of the contained metal element is sometimes referred to as the indium content.
  • a transistor with a large on-current By increasing the indium content of the metal oxide, a transistor with a large on-current can be obtained. By applying the transistor to a transistor that requires a large on-state current, a semiconductor device with excellent electrical characteristics can be obtained.
  • EDX Energy Dispersive X-ray spectroscopy
  • XPS X-ray Photoelectron Spectroscopy
  • ICP-MS Inductively Coupled Plasma Ma-Mass Spectrometry
  • ICP-AES Inductively Coupled Plasma-Atomic Emission Spectrometry
  • the composition in the vicinity includes the range of ⁇ 30% of the desired atomic number ratio.
  • the atomic ratio of indium is 4
  • the atomic ratio of M is 1 or more and 3 or less
  • the atomic ratio of zinc is 2 or more and 4 or less.
  • the atomic ratio of indium is 5
  • the atomic ratio of M is greater than 0.1 and 2 or less
  • the atomic ratio of zinc is 5 or more and 7 or less.
  • the atomic ratio of indium is 1, the atomic ratio of M is greater than 0.1 and 2 or less, and the atomic ratio of zinc is greater than 0.1 and 2 or less.
  • a sputtering method or an atomic layer deposition (ALD) method can be preferably used to form the metal oxide.
  • the atomic ratio of the target may differ from the atomic ratio of the metal oxide.
  • zinc may have a lower atomic ratio in the metal oxide than in the target.
  • the atomic ratio of zinc contained in the target may be about 40% or more and 90% or less.
  • GBT Gate Bias Temperature
  • PBTS POSITIVE BIAS TEMPERATURE STRESS
  • NBTS NGATIVE BIAS TEMPERATURE STRESS
  • the PBTS test and the NBTS test which are performed under light irradiation, are called PBTIS (Positive Bias Temperature Illumination Stress) test and NBTIS (Negative Bias Temperature Illumination Stress) test, respectively.
  • n-type transistor In an n-type transistor, a positive potential is applied to the gate when the transistor is turned on (a state in which current flows), so the amount of change in the threshold voltage in the PBTS test is an important item to focus on as an index of transistor reliability.
  • the transistor can be highly reliable with respect to the application of a positive bias. In other words, the transistor can have a small amount of change in threshold voltage in the PBTS test. Further, when a metal oxide containing gallium is used, the content of gallium is preferably lower than the content of indium. Accordingly, a highly reliable transistor can be realized.
  • One of the causes of threshold voltage fluctuation in PBTS tests is the defect level at or near the interface between the semiconductor layer and the gate insulating layer.
  • the semiconductor layer 108 when an In--Ga--Zn oxide is used for the semiconductor layer 108, a metal oxide in which the atomic ratio of indium is higher than that of gallium can be applied to the semiconductor layer 108. Moreover, it is more preferable to use a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of gallium. In other words, it is preferable that the semiconductor layer 108 be made of a metal oxide that satisfies the atomic ratios of In>Ga and Zn>Ga.
  • the ratio of the number of gallium atoms to the number of contained metal element atoms is higher than 0 atomic % and 50 atomic % or less, preferably 0.1 atomic % or more and 40 atomic % or less, more preferably 0.1 atomic % or more and 35 atomic % or less, more preferably 0.1 atomic % or more and 30 atomic % or less, more preferably 0.1 atomic % or more and 25 atomic % or less, more preferably 0.1 atomic % or more and 20 atomic % or less, more preferably 0.1 atomic % or more and 15 atomic % or less.
  • the transistor can be highly resistant to the PBTS test.
  • gallium in the metal oxide there is an effect that oxygen vacancy (V 0 ) is less likely to occur in the metal oxide.
  • a metal oxide that does not contain gallium may be applied to the semiconductor layer 108 .
  • In—Zn oxide can be applied to the semiconductor layer 108 .
  • the field-effect mobility of the transistor can be increased by increasing the atomic ratio of indium to the atomic number of the metal element contained in the metal oxide.
  • the metal oxide has high crystallinity, so that fluctuations in electrical characteristics of the transistor can be suppressed and reliability can be improved.
  • a metal oxide that does not contain gallium and zinc, such as indium oxide may be used for the semiconductor layer 108 . By using gallium-free metal oxides, in particular, threshold voltage variations in PBTS tests can be minimized.
  • an oxide containing indium and zinc can be used for the semiconductor layer 108 .
  • Gallium has been described as a representative example, but it can also be applied to the case where the element M is used instead of gallium.
  • a metal oxide in which the atomic ratio of indium is higher than the atomic ratio of the element M is preferably used for the semiconductor layer 108 .
  • the transistor can be highly reliable with respect to positive bias application.
  • the semiconductor device can have high reliability.
  • the electrical characteristics of the transistor may change.
  • a transistor applied to a region where light can enter have small variation in electrical characteristics under light irradiation and have high reliability against light. Reliability against light can be evaluated, for example, by the amount of change in threshold voltage in an NBTIS test.
  • the transistor By increasing the content of the element M in the metal oxide, a transistor with high reliability against light can be obtained. That is, the transistor can have a small amount of change in threshold voltage in the NBTIS test. Specifically, a metal oxide in which the atomic ratio of the element M is equal to or higher than the atomic ratio of indium has a larger bandgap, and the amount of variation in the threshold voltage of the transistor in the NBTIS test can be reduced.
  • the bandgap of the metal oxide of the semiconductor layer 108 is preferably 2.0 eV or higher, more preferably 2.5 eV or higher, further preferably 3.0 eV or higher, further preferably 3.2 eV or higher, further preferably 3.3 eV or higher, further preferably 3.4 eV or higher, further preferably 3.5 eV or higher.
  • a metal oxide in which the ratio of the number of atoms of the element M to the number of atoms of the contained metal element is 20 atomic % to 70 atomic %, preferably 30 atomic % to 70 atomic %, more preferably 30 atomic % to 60 atomic %, more preferably 40 atomic % to 60 atomic %, more preferably 50 atomic % to 60 atomic %.
  • a metal oxide in which the atomic ratio of indium to the atomic number of metal elements is equal to or lower than that of gallium can be applied.
  • a metal oxide in which the ratio of the number of gallium atoms to the number of contained metal element atoms is 20 atomic % or more and 60 atomic % or less, preferably 20 atomic % or more and 50 atomic % or less, more preferably 30 atomic % or more and 50 atomic % or less, more preferably 40 atomic % or more and 60 atomic % or less, and more preferably 50 atomic % or more and 60 atomic % or less can be suitably used.
  • the semiconductor device By using a metal oxide with a high content of the element M for the semiconductor layer 108, a transistor with high reliability against light can be obtained. By applying the transistor to a transistor that requires high reliability against light, the semiconductor device can have high reliability.
  • the electrical characteristics and reliability of the transistor differ depending on the composition of the metal oxide applied to the semiconductor layer 108. Therefore, by changing the composition of the metal oxide according to the electrical characteristics and reliability required for the transistor, a semiconductor device having both excellent electrical characteristics and high reliability can be obtained.
  • the semiconductor layer 108 may have a laminated structure having two or more metal oxide layers. Two or more metal oxide layers included in the semiconductor layer 108 may have the same or substantially the same composition. By using a stacked structure of metal oxide layers having the same composition, for example, the same sputtering target can be used for formation, so that the manufacturing cost can be reduced.
  • the two or more metal oxide layers included in the semiconductor layer 108 may have different compositions.
  • the element M it is particularly preferable to use gallium or aluminum.
  • a stacked structure of one selected from indium oxide, indium gallium oxide, and IGZO and one selected from IAZO, IAGZO, and ITZO (registered trademark) may be used.
  • a crystalline metal oxide layer is preferably used for the semiconductor layer 108 .
  • a metal oxide layer having a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, a nano-crystal (nc) structure, or the like can be used.
  • CAAC c-axis aligned crystal
  • nc nano-crystal
  • the higher the substrate temperature during formation the higher the crystallinity of the metal oxide layer.
  • the substrate temperature during formation can be adjusted, for example, by the temperature of the stage on which the substrate is placed.
  • a metal oxide layer with higher crystallinity can be formed as the flow rate of oxygen gas to the total deposition gas used at the time of formation (hereinafter also referred to as the oxygen flow rate) or the oxygen partial pressure in the treatment chamber of the deposition apparatus is higher.
  • the semiconductor layer 108 may have a laminated structure of two or more metal oxide layers with different crystallinities.
  • a layered structure of a first metal oxide layer and a second metal oxide layer provided over the first metal oxide layer may be used, and the second metal oxide layer may have a region with higher crystallinity than the first metal oxide layer.
  • the second metal oxide layer can have a region with lower crystallinity than the first metal oxide layer.
  • Two or more metal oxide layers included in the semiconductor layer 108 may have the same or substantially the same composition. By using a stacked structure of metal oxide layers having the same composition, for example, the same sputtering target can be used for formation, so that the manufacturing cost can be reduced.
  • a laminated structure of two or more metal oxide layers with different crystallinities can be formed.
  • two or more metal oxide layers included in the semiconductor layer 108 may have different compositions.
  • the thickness of the semiconductor layer 108 is preferably 3 nm or more and 100 nm or less, more preferably 5 nm or more and 100 nm or less, further preferably 10 nm or more and 100 nm or less, further preferably 10 nm or more and 70 nm or less, further preferably 15 nm or more and 70 nm or less, further preferably 15 nm or more and 50 nm or less, further preferably 20 nm or more and 50 nm or less, further preferably 20 nm or more and 40 nm or less, furthermore preferably 25 nm or more. 0 nm or less is preferable.
  • the substrate temperature during the formation of the semiconductor layer 108 is preferably room temperature (25° C.) or higher and 200° C. or lower, more preferably room temperature or higher and 130° C. or lower. By setting the substrate temperature within the above range, bending or distortion of the substrate can be suppressed when a large glass substrate is used.
  • V 2 O oxygen vacancies
  • a defect in which hydrogen is added to an oxygen vacancy (hereinafter referred to as V OH ) functions as a donor, and an electron, which is a carrier, may be generated.
  • part of hydrogen may bond with oxygen that bonds with a metal atom to generate an electron that is a carrier. Therefore, a transistor including an oxide semiconductor containing a large amount of hydrogen is likely to have normally-on characteristics.
  • hydrogen in an oxide semiconductor easily moves due to stress such as heat and an electric field; therefore, when a large amount of hydrogen is contained in the oxide semiconductor, the reliability of the transistor might be deteriorated.
  • VOH can function as a donor of an oxide semiconductor.
  • the oxide semiconductor is evaluated based on the carrier concentration instead of the donor concentration. Therefore, in this specification and the like, instead of the donor concentration, the carrier concentration assuming a state in which no electric field is applied is used as a parameter of the oxide semiconductor in some cases.
  • the “carrier concentration” described in this specification and the like may be rephrased as “donor concentration”.
  • V OH in the semiconductor layer 108 is preferably reduced as much as possible to make the semiconductor layer 108 highly pure intrinsic or substantially highly pure intrinsic.
  • it is important to remove impurities such as water and hydrogen in the oxide semiconductor (sometimes referred to as dehydration and dehydrogenation treatment) and to supply oxygen to the oxide semiconductor to repair oxygen vacancies (V O ).
  • impurities such as water and hydrogen in the oxide semiconductor
  • V O oxygen vacancies
  • the carrier concentration of the oxide semiconductor in the region functioning as a channel formation region is preferably 1 ⁇ 10 18 cm ⁇ 3 or less, more preferably less than 1 ⁇ 10 17 cm ⁇ 3 , still more preferably less than 1 ⁇ 10 16 cm ⁇ 3 , still more preferably less than 1 ⁇ 10 13 cm ⁇ 3 , further preferably less than 1 ⁇ 10 12 cm ⁇ 3 .
  • the carrier concentration of the oxide semiconductor in the region that functions as a channel formation region there is no particular limitation on the lower limit of the carrier concentration of the oxide semiconductor in the region that functions as a channel formation region;
  • a transistor using an oxide semiconductor (hereinafter referred to as an OS transistor) has extremely high field-effect mobility compared to a transistor using amorphous silicon.
  • an OS transistor has extremely low source-drain leakage current (hereinafter also referred to as an off-state current) in an off state, and can hold charge accumulated in a capacitor connected in series with the transistor for a long time. Further, by using the OS transistor, power consumption of the semiconductor device can be reduced.
  • a semiconductor device which is one embodiment of the present invention can be applied to a display device, for example.
  • a display device for example.
  • the OS transistor has a higher breakdown voltage between the source and the drain than a transistor using silicon (hereinafter referred to as a Si transistor)
  • a high voltage can be applied between the source and the drain of the OS transistor. Therefore, by using an OS transistor as the drive transistor included in the pixel circuit, the amount of current flowing through the light emitting device can be increased, and the light emission luminance of the light emitting device can be increased.
  • the OS transistor When the transistor operates in the saturation region, the OS transistor can reduce the change in the source-drain current with respect to the change in the gate-source voltage compared to the Si transistor. Therefore, by applying an OS transistor as a drive transistor included in a pixel circuit, the current flowing between the source and the drain can be finely determined according to the change in the voltage between the gate and the source, so that the amount of current flowing in the light emitting device can be controlled. Therefore, it is possible to increase the gradation in the pixel circuit.
  • the OS transistor In the saturation characteristics of the current that flows when the transistor operates in the saturation region, the OS transistor can flow a more stable current (saturation current) than the Si transistor even when the source-drain voltage gradually increases. Therefore, by using the OS transistor as the driving transistor, stable current can be supplied to the light-emitting device even when the current-voltage characteristics of the light-emitting device vary. That is, when the OS transistor operates in the saturation region, even if the source-drain voltage is increased, the source-drain current hardly changes, so that the light emission luminance of the light-emitting device can be stabilized.
  • the OS transistor has little change in electrical characteristics due to radiation exposure, that is, it is highly resistant to radiation, so it can be suitably used in an environment where radiation may be incident. It can be said that the OS transistor has high reliability against radiation.
  • an OS transistor can be preferably used in a pixel circuit of an X-ray flat panel detector.
  • the OS transistor can be suitably used for a semiconductor device used in outer space. Radiation includes electromagnetic radiation (eg, X-rays and gamma rays) and particle radiation (eg, alpha rays, beta rays, proton rays, and neutron rays).
  • the insulating layer 110 An inorganic insulating material or an organic insulating material can be used for the insulating layer 110 .
  • the insulating layer 110 may have a laminated structure of an inorganic insulating material and an organic insulating material.
  • An inorganic insulating material can be suitably used for the insulating layer 110 .
  • an inorganic insulating material one or more of oxides, oxynitrides, nitride oxides, and nitrides can be used.
  • the insulating layer 110 for example, one or more of silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, yttrium oxide, zirconium oxide, gallium oxide, tantalum oxide, magnesium oxide, lanthanum oxide, cerium oxide, neodymium oxide, silicon nitride, silicon nitride oxide, and aluminum nitride can be used.
  • oxynitride refers to a material that contains more oxygen than nitrogen in its composition.
  • Nitrided oxide refers to a material whose composition contains more nitrogen than oxygen.
  • silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen
  • silicon oxynitride refers to a material whose composition contains more nitrogen than oxygen.
  • SIMS secondary ion mass spectrometry
  • XPS X-ray photoelectron spectroscopy
  • SIMS is suitable when the content of the target element is high (for example, 0.5 atomic % or more, or 1 atomic % or more).
  • SIMS is suitable when the target element content is low (for example, less than 0.5 atomic % or less than 1 atomic %).
  • the insulating layer 110 may have a laminated structure of two or more layers.
  • FIG. 1B and the like show a configuration in which the insulating layer 110 has a laminated structure of an insulating layer 110a and an insulating layer 110b on the insulating layer 110a.
  • the insulating layer 110a and the insulating layer 110b can each use the material that can be used for the insulating layer 110 described above. Note that the same material or different materials may be used for the insulating layers 110a and 110b.
  • the insulating layer 110a may have a laminated structure of two or more layers.
  • the insulating layer 110b may have a laminated structure of two or more layers.
  • the film thickness of the insulating layer 110a can be made thicker than the film thickness of the insulating layer 110b. It is preferable that the film formation rate of the insulating layer 110a is high. In particular, when the insulating layer 110a is thick, it is preferable that the insulating layer 110a is formed at a high deposition rate. Productivity can be improved by increasing the deposition rate of the insulating layer 110a. For example, the deposition rate can be increased by increasing the power for forming the insulating layer 110a.
  • the insulating layer 110a has a small stress.
  • the stress of the insulating layer 110a increases, which may cause warping of the substrate.
  • By reducing the stress of the insulating layer 110a it is possible to suppress the occurrence of problems during the process due to the stress such as warpage of the substrate.
  • the insulating layer 110b functions as a blocking film that suppresses desorption of gas from the insulating layer 110a.
  • the insulating layer 110b it is preferable to use a material that makes it difficult for gas to diffuse.
  • the insulating layer 110b preferably has a region with a higher film density than the insulating layer 110a.
  • the blocking property can be improved by increasing the film density of the insulating layer 110b.
  • a material containing more nitrogen than the insulating layer 110a can be used. By increasing the nitrogen content of the insulating layer 110b, the blocking property can be improved.
  • the insulating layer 110b may have a thickness that functions as a blocking film that suppresses desorption of gas from the insulating layer 110a, and may be thinner than the insulating layer 110a.
  • the deposition rate of the insulating layer 110b is preferably slower than the deposition rate of the insulating layer 110a. By slowing down the deposition rate of the insulating layer 110b, the film density of the insulating layer 110b can be increased, and the blocking property can be improved. Similarly, by increasing the substrate temperature during the deposition of the insulating layer 110b, the film density of the insulating layer 110b is increased and the blocking property can be improved.
  • the difference in film density may be evaluated by a transmission electron microscope (TEM) image of a cross section.
  • TEM transmission electron microscope
  • the insulating layer 110b may have a region where the hydrogen concentration in the film is lower than that of the insulating layer 110a.
  • the difference in hydrogen concentration between the insulating layers 110a and 110b can be evaluated by secondary ion mass spectrometry (SIMS), for example.
  • SIMS secondary ion mass spectrometry
  • the insulating layer 110 will be specifically described by taking a configuration using a metal oxide for the semiconductor layer 108 as an example.
  • an inorganic insulating material can be preferably used for each of the insulating layers 110a and 110b.
  • An oxide or an oxynitride is preferably used for the insulating layer 110a.
  • a film that releases oxygen by heating is preferably used for the insulating layer 110a.
  • Silicon oxide or silicon oxynitride, for example, can be suitably used for the insulating layer 110a.
  • Oxygen can be supplied from the insulating layer 110a to the semiconductor layer 108 by releasing oxygen from the insulating layer 110a.
  • oxygen vacancies V.sub.O
  • V.sub.OH oxygen vacancies
  • the insulating layer 110a preferably has a high oxygen diffusion coefficient. By increasing the diffusion coefficient of oxygen in the insulating layer 110a, oxygen can easily diffuse in the insulating layer 110a, and oxygen can be efficiently supplied from the insulating layer 110a to the semiconductor layer .
  • the treatment for supplying oxygen to the semiconductor layer 108 also includes heat treatment in an atmosphere containing oxygen, plasma treatment in an atmosphere containing oxygen, or the like.
  • the insulating layer 110a release less impurities (for example, water and hydrogen) from itself. By reducing the release of impurities from the insulating layer 110a, the diffusion of impurities into the semiconductor layer 108 is suppressed, and the transistor can have favorable electrical characteristics and high reliability.
  • impurities for example, water and hydrogen
  • the insulating layer 110a for example, silicon oxide or silicon oxynitride using the PECVD method can be preferably used.
  • a mixed gas of a gas containing silicon and a gas containing oxygen is preferably used as the raw material gas.
  • the gas containing silicon for example, one or more of silane, disilane, trisilane, and fluorinated silane can be used.
  • the oxygen-containing gas for example, one or more of oxygen (O 2 ), ozone (O 3 ), dinitrogen monoxide (N 2 O), nitrogen monoxide (NO), or nitrogen dioxide (NO 2 ) can be used.
  • the amount of impurities (eg, water and hydrogen) released from the insulating layer 110a can be reduced by increasing the power for forming the insulating layer 110a.
  • the insulating layer 110b is preferably impermeable to oxygen.
  • the insulating layer 110b functions as a blocking film that suppresses desorption of oxygen from the insulating layer 110a. Furthermore, it is preferable that the insulating layer 110b is difficult to permeate hydrogen.
  • the insulating layer 110b functions as a blocking film that prevents hydrogen from diffusing from outside the transistor through the insulating layer 110 to the semiconductor layer . It is preferable that the film density of the insulating layer 110b is high. By increasing the film density of the insulating layer 110b, the property of blocking oxygen and hydrogen can be improved.
  • the film density of the insulating layer 110b is preferably higher than the film density of the insulating layer 110a.
  • silicon oxide or silicon oxynitride is used for the insulating layer 110a
  • silicon nitride, silicon nitride oxide, or aluminum oxide can be preferably used for the insulating layer 110b, for example.
  • the insulating layer 110b preferably has, for example, a region containing more nitrogen than the insulating layer 110a.
  • a material containing more nitrogen than the insulating layer 110a can be used.
  • the insulating layer 110b is preferably made of nitride or oxynitride.
  • silicon nitride or silicon oxynitride can be preferably used for the insulating layer 110b.
  • the amount of oxygen supplied from the insulating layer 110a to the semiconductor layer 108 may decrease.
  • the insulating layer 110b over the insulating layer 110a, diffusion of oxygen contained in the insulating layer 110a from a region of the insulating layer 110a that is not in contact with the semiconductor layer 108 can be suppressed. Therefore, the amount of oxygen supplied from the insulating layer 110a to the semiconductor layer 108 increases, and oxygen vacancies (V 0 ) and V OH in the semiconductor layer 108 can be reduced. Therefore, the transistor can have favorable electrical characteristics and high reliability.
  • Oxygen contained in the insulating layer 110a might oxidize the conductive layer 112b and increase the resistance thereof. Further, the conductive layer 112b is oxidized by oxygen contained in the insulating layer 110a, so that the amount of oxygen supplied from the insulating layer 110a to the semiconductor layer 108 may decrease. By providing the insulating layer 110b over the insulating layer 110a, oxidation of the conductive layer 112b and an increase in resistance can be suppressed. At the same time, the amount of oxygen supplied from the insulating layer 110a to the semiconductor layer 108 is increased, oxygen vacancies (V O ) and V OH in the semiconductor layer 108 can be reduced, and the transistor can exhibit favorable electrical characteristics and high reliability.
  • the insulating layer 110b preferably has a thickness that functions as a blocking film for oxygen and hydrogen. If the film thickness of the insulating layer 110b is thin, the function as a blocking film may deteriorate. On the other hand, when the thickness of the insulating layer 110b is large, the region of the semiconductor layer 108 in contact with the insulating layer 110a is narrowed, and the amount of oxygen supplied from the insulating layer 110a to the semiconductor layer 108 may be reduced. The film thickness of the insulating layer 110b may be thinner than the film thickness of the insulating layer 110a.
  • the thickness of the insulating layer 110b is preferably 5 nm to 100 nm, more preferably 5 nm to 70 nm, further preferably 10 nm to 70 nm, further preferably 10 nm to 50 nm, further preferably 20 nm to 50 nm, further preferably 20 nm to 40 nm.
  • oxygen vacancies (VO) and VOH in the semiconductor layer 108, particularly in the channel formation region can be reduced, and the transistor can exhibit favorable electrical characteristics and high reliability.
  • the insulating layer 110b release less impurities (for example, water and hydrogen) from itself. By reducing the release of impurities from the insulating layer 110b, diffusion of impurities into the semiconductor layer 108 is suppressed, and the transistor can have favorable electrical characteristics and high reliability.
  • impurities for example, water and hydrogen
  • a region of the semiconductor layer 108 in contact with the insulating layer 110 can function as a channel formation region. That is, oxygen is selectively supplied to the channel formation region, and oxygen vacancies (V 0 ) and V OH can be reduced. Therefore, the transistor can have favorable electrical characteristics and high reliability.
  • the conductive layers 112a and 112b functioning as source and drain electrodes and the conductive layer 104 functioning as a gate electrode can each be formed using one or more of chromium, copper, aluminum, gold, silver, zinc, molybdenum, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, and niobium, or an alloy containing one or more of the above metals.
  • the conductive layer 104, the conductive layer 112a, and the conductive layer 112b can preferably be formed using a low-resistance conductive material containing one or more of copper, silver, gold, and aluminum. In particular, copper or aluminum is preferable because of its excellent mass productivity.
  • a conductive metal oxide (also referred to as an oxide conductor) can be used for the conductive layer 104, the conductive layer 112a, and the conductive layer 112b.
  • oxide conductors include In--Sn oxide (ITO), In--W oxide, In--W--Zn oxide, In--Ti oxide, In--Ti--Sn oxide, In--Zn oxide, In--Sn--Si oxide (ITSO), and In--Ga--Zn oxide.
  • oxide conductor (OC)
  • OC oxide conductor
  • oxygen vacancies are formed in a metal oxide having semiconductor properties and hydrogen is added to the oxygen vacancies, a donor level is formed near the conduction band.
  • the metal oxide becomes highly conductive and becomes a conductor.
  • a metal oxide that is made a conductor can be referred to as an oxide conductor.
  • the conductive layer 104, the conductive layer 112a, and the conductive layer 112b may have a laminated structure of a conductive film containing the aforementioned oxide conductor (metal oxide) and a conductive film containing a metal or alloy. Wiring resistance can be reduced by using a conductive film containing a metal or an alloy.
  • a Cu—X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied to the conductive layer 104, the conductive layer 112a, and the conductive layer 112b.
  • X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti
  • processing can be performed by a wet etching method, so that manufacturing costs can be suppressed.
  • the conductive layer 104, the conductive layer 112a, and the conductive layer 112b may be made of the same material or may be made of different materials.
  • the conductive layer 112a and the conductive layer 112b are specifically described using a structure in which a metal oxide is used for the semiconductor layer 108 as an example.
  • the conductive layers 112a and 112b may be oxidized by oxygen contained in the semiconductor layer 108, resulting in increased resistance.
  • Oxygen contained in the insulating layer 110a might oxidize the conductive layers 112a and 112b, resulting in increased resistance.
  • the conductive layers 112a and 112b are oxidized by oxygen contained in the semiconductor layer 108, so that oxygen vacancies ( V.sub.2O.sub.2 ) in the semiconductor layer 108 may increase.
  • Oxygen contained in the insulating layer 110a oxidizes the conductive layers 112a and 112b, so that the amount of oxygen supplied from the insulating layer 110a to the semiconductor layer 108 is reduced in some cases.
  • the conductive layers 112a and 112b are preferably made of materials that are difficult to oxidize.
  • An oxide conductor is preferably used for each of the conductive layers 112a and 112b.
  • ITO In--Sn oxide
  • ITSO In--Sn--Si oxide
  • a nitride conductor may be used for each of the conductive layers 112a and 112b.
  • Nitride conductors include tantalum nitride and titanium nitride.
  • the conductive layer 112a and the conductive layer 112b may have a layered structure of the materials described above.
  • the insulating layer 106 functioning as a gate insulating layer preferably has a low defect density. Since the insulating layer 106 has a low defect density, the transistor can have favorable electrical characteristics. Furthermore, the insulating layer 106 preferably has a high withstand voltage. Since the insulating layer 106 has high withstand voltage, the transistor can have high reliability.
  • insulating oxides for the insulating layer 106, one or more of insulating oxides, oxynitrides, nitride oxides, and nitrides can be used, for example.
  • insulating layer 106 one or more of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, and Ga—Zn oxide can be used.
  • the insulating layer 106 may be a single layer or a laminate.
  • the insulating layer 106 may have, for example, a layered structure of oxide and nitride.
  • High-k materials include gallium oxide, hafnium oxide, zirconium oxide, oxides with aluminum and hafnium, oxynitrides with aluminum and hafnium, oxides with silicon and hafnium, oxynitrides with silicon and hafnium, or nitrides with silicon and hafnium.
  • the insulating layer 106 preferably releases less impurities (eg, water and hydrogen) from itself. Since the amount of impurities released from the insulating layer 106 is small, the diffusion of impurities into the semiconductor layer 108 is suppressed, and the transistor can have favorable electrical characteristics and high reliability.
  • impurities eg, water and hydrogen
  • the insulating layer 106 is formed on the semiconductor layer 108 , it is preferably a film formed under conditions that cause little damage to the semiconductor layer 108 .
  • it can be formed under conditions where the film formation speed (also referred to as film formation rate) is sufficiently slow.
  • the film formation speed also referred to as film formation rate
  • damage to the semiconductor layer 108 can be reduced by forming the insulating layer 106 under low power conditions.
  • the insulating layer 106 will be specifically described by taking a configuration in which a metal oxide is used for the semiconductor layer 108 as an example.
  • oxide or oxynitride at least on the side of the insulating layer 106 that is in contact with the semiconductor layer 108.
  • oxide or oxynitride can be preferably used for the insulating layer 106, for example.
  • a film that releases oxygen by heating is more preferably used for the insulating layer 106 .
  • the insulating layer 106 may have a laminated structure.
  • the insulating layer 106 can use oxide or oxynitride on the side in contact with the semiconductor layer 108 and can use nitride or oxynitride on the side in contact with the conductive layer 104 .
  • oxide or oxynitride one or more of silicon oxide and silicon oxynitride can be preferably used, for example.
  • Silicon nitride for example, can be preferably used as the nitride or oxynitride.
  • Substrate 102 There are no particular restrictions on the material of the substrate 102, but it must have at least heat resistance to withstand subsequent heat treatment.
  • a single crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate may be used as the substrate 102.
  • a substrate having a semiconductor element provided thereon may be used as the substrate 102 .
  • the shape of the semiconductor substrate and the insulating substrate may be circular or rectangular.
  • a flexible substrate may be used as the substrate 102, and the transistor 100 and the like may be formed directly over the flexible substrate.
  • a separation layer may be provided between the substrate 102 and the transistor 100 or the like.
  • the release layer can be used to separate from the substrate 102 and transfer to another substrate after a semiconductor device is partially or wholly completed thereon. At that time, the transistor 100 and the like can be transferred to a substrate having poor heat resistance or a flexible substrate.
  • the region of the semiconductor layer 108 in contact with the insulating layer 110b functions as the other of the source region and the drain region
  • the region in contact with the insulating layer 110a functions as a channel formation region. That is, in the semiconductor layer 108, the region in contact with the conductive layer 112b and the region in contact with the insulating layer 110b function as the other of the source region and the drain region in some cases.
  • FIGS. 5A and 5B The channel length and channel width when the region of the semiconductor layer 108 in contact with the insulating layer 110b functions as the other of the source region and the drain region will be described with reference to FIGS. 5A and 5B.
  • 5A is a top view of transistor 100.
  • FIG. FIG. 5B is an enlarged view of FIG. 1B.
  • the channel length L100 of the transistor 100 corresponds to the length of the side surface of the insulating layer 110a on the opening 141 side in a cross-sectional view. That is, the channel length L100 is determined by the film thickness T110a of the insulating layer 110a and the angle ⁇ 110a formed between the side surface of the insulating layer 110a on the opening 141 side and the formation surface of the insulating layer 110a (here, the upper surface of the conductive layer 112a), and is not affected by the performance of the exposure apparatus used to manufacture the transistor. Therefore, the channel length L100 can be set to a value smaller than the limit resolution of the exposure apparatus, and a fine-sized transistor can be realized. For example, the channel length L100 can be in the ranges described above. In FIG. 5B, the film thickness T110a of the insulating layer 110a is indicated by a dashed-dotted double-headed arrow.
  • the channel length L100 can be controlled by adjusting the film thickness T110a and the angle ⁇ 110a of the insulating layer 110a.
  • the film thickness T110a of the insulating layer 110a is preferably 0.01 ⁇ m or more and less than 3 ⁇ m, more preferably 0.05 ⁇ m or more and less than 3 ⁇ m, further preferably 0.1 ⁇ m or more and less than 3 ⁇ m, further preferably 0.15 ⁇ m or more and less than 3 ⁇ m, further preferably 0.2 ⁇ m or more and less than 3 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2.5 ⁇ m, furthermore preferably 0.2 ⁇ m or more and less than 2 ⁇ m.
  • ⁇ m or more and less than 1.5 ⁇ m is preferably 0.2 ⁇ m or more and less than 1.5 ⁇ m, further preferably 0.3 ⁇ m or more and 1.5 ⁇ m or less, further preferably 0.3 ⁇ m or more and 1.2 ⁇ m or less, further preferably 0.4 ⁇ m or more and 1.2 ⁇ m or less, further preferably 0.4 ⁇ m or more and 1 ⁇ m or less, further preferably 0.5 ⁇ m or more and 1 ⁇ m or less.
  • the angle ⁇ 110a between the side surface of the insulating layer 110a on the side of the opening 141 and the formation surface of the insulating layer 110a is preferably 45 degrees or more and less than 90 degrees, more preferably 50 degrees or more and less than 90 degrees, further preferably 55 degrees or more and less than 90 degrees, further preferably 60 degrees or more and less than 90 degrees, further preferably 60 degrees or more and 85 degrees or less, further preferably 65 degrees or more and 8 degrees. It is preferably 5 degrees or less, more preferably 65 degrees or more and 80 degrees or less, further preferably 70 degrees or more and 80 degrees or less.
  • the channel width W100 is the length of the lower surface end portion of the insulating layer 110b on the opening 141 side when viewed from above.
  • 5A and 5B show the channel width W100 of the transistor 100 with a solid double-headed arrow.
  • the channel width W100 is determined by the shape of the bottom end of the insulating layer 110b.
  • the width D141a between the ends of the lower surfaces of the insulating layers 110b facing each other in the opening 141 is indicated by a two-dot chain double-headed arrow.
  • the width D141a refers to the shortest rectangular short side that circumscribes the contour of the bottom surface edge of the insulating layer 110b when viewed from above.
  • the width D141a is, for example, preferably 0.2 ⁇ m or more and less than 5 ⁇ m, more preferably 0.2 ⁇ m or more and less than 4.5 ⁇ m, further preferably 0.2 ⁇ m or more and less than 4 ⁇ m, further preferably 0.2 ⁇ m or more and less than 3.5 ⁇ m, further preferably 0.2 ⁇ m or more and less than 3 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2.5 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2 ⁇ m.
  • hydrogen may diffuse from the insulating layer 110b into a region of the semiconductor layer 108 which is in contact with the insulating layer 110a.
  • the supply of oxygen from the insulating layer 110a to the semiconductor layer 108 suppresses an increase in oxygen vacancies (V 0 ) and V OH in a region of the semiconductor layer 108 in contact with the insulating layer 110a. Therefore, at least a region of the semiconductor layer 108 in contact with the insulating layer 110a can function as a channel formation region, and the transistor can exhibit favorable electrical characteristics and high reliability.
  • FIG. 1A can be referred to for a top view of a transistor 100A that can be applied to a semiconductor device that is one embodiment of the present invention.
  • FIG. 6A shows a cross-sectional view taken along the dashed line A1-A2 shown in FIG. 1A
  • FIG. 6B shows a cross-sectional view taken along the dashed-dotted line B1-B2. See FIG. 2 for a perspective view of the transistor 100A.
  • the transistor 100A mainly differs from the transistor 100 described above in that the insulating layer 110 has an insulating layer 110c.
  • the insulating layer 110 has a laminated structure of an insulating layer 110c, an insulating layer 110a on the insulating layer 110c, and an insulating layer 110b on the insulating layer 110a.
  • the insulating layer 110c has regions in contact with the top surface of the substrate 102 and the top surface and side surfaces of the conductive layer 112a.
  • the insulating layer 110c functions as a blocking film that suppresses desorption of gas from the insulating layer 110a.
  • the insulating layer 110c is preferably made of a material that makes it difficult for gas to diffuse.
  • the insulating layer 110c preferably has a region with a higher film density than the insulating layer 110a.
  • the blocking property can be improved by increasing the film density of the insulating layer 110c.
  • the insulating layer 110c preferably has, for example, a region containing more nitrogen than the insulating layer 110a.
  • a material containing more nitrogen than the insulating layer 110a can be used. By increasing the nitrogen content of the insulating layer 110c, the blocking property can be improved.
  • the insulating layer 110c may have a thickness that functions as a blocking film that suppresses desorption of gas from the insulating layer 110a, and may be thinner than the insulating layer 110a.
  • the deposition rate of the insulating layer 110c is preferably slower than the deposition rate of the insulating layer 110a. By slowing down the deposition rate of the insulating layer 110c, the film density of the insulating layer 110c can be increased and the blocking property can be improved. Similarly, by increasing the substrate temperature during the deposition of the insulating layer 110c, the film density of the insulating layer 110c can be increased and the blocking property can be improved.
  • the film densities are different, so in a cross-sectional transmission electron microscope (TEM) image, etc., the boundary between these layers may be observed as a difference in contrast.
  • TEM transmission electron microscope
  • TE transmission electron
  • the insulating layer 110a may have a region with a higher hydrogen concentration than the insulating layer 110c.
  • a difference in hydrogen concentration between the insulating layer 110a and the insulating layer 110c can be evaluated by secondary ion mass spectrometry (SIMS), for example.
  • SIMS secondary ion mass spectrometry
  • a material that can be used for the insulating layer 110b can be used for the insulating layer 110c.
  • the insulating layer 110c may use the same material as the insulating layer 110b, or may use a different material.
  • a case where an oxide semiconductor is used for the semiconductor layer 108 will be taken as an example to specifically describe the insulating layer 110c.
  • the insulating layer 110c is preferably impermeable to oxygen.
  • the insulating layer 110c functions as a blocking film that suppresses desorption of oxygen from the insulating layer 110a.
  • Oxygen contained in the insulating layer 110a might oxidize the conductive layer 112a and increase the resistance thereof. Further, the conductive layer 112a is oxidized by oxygen contained in the insulating layer 110a, so that the amount of oxygen supplied from the insulating layer 110a to the semiconductor layer 108 is reduced in some cases.
  • the insulating layer 110c between the insulating layer 110a and the conductive layer 112a By providing the insulating layer 110c between the insulating layer 110a and the conductive layer 112a, oxidation of the conductive layer 112a and an increase in resistance can be suppressed.
  • the amount of oxygen supplied from the insulating layer 110a to the semiconductor layer 108 is increased, oxygen vacancies (V O ) and V OH in the semiconductor layer 108 can be reduced, and the transistor can exhibit favorable electrical characteristics and high reliability.
  • the insulating layer 110c is preferably impermeable to impurities.
  • the insulating layer 110 c functions as a blocking film that suppresses diffusion of impurities from the substrate 102 side to the semiconductor layer 108 through the insulating layer 110 .
  • impurities include water, hydrogen, and sodium.
  • the insulating layer 110c preferably has a thickness that functions as a blocking film for oxygen and hydrogen. If the film thickness of the insulating layer 110c is thin, the function as a blocking film may deteriorate. On the other hand, if the thickness of the insulating layer 110c is large, the region of the semiconductor layer 108 in contact with the insulating layer 110a becomes narrow, and the amount of oxygen supplied from the insulating layer 110a to the semiconductor layer 108 may decrease. The film thickness of the insulating layer 110c may be thinner than the film thickness of the insulating layer 110a.
  • the thickness of the insulating layer 110c is preferably 5 nm to 100 nm, more preferably 5 nm to 70 nm, further preferably 10 nm to 70 nm, further preferably 10 nm to 50 nm, further preferably 20 nm to 50 nm, further preferably 20 nm to 40 nm.
  • the insulating layer 110c preferably releases less impurities (eg, water and hydrogen) from itself. By reducing the release of impurities from the insulating layer 110c, the diffusion of impurities into the semiconductor layer 108 is suppressed, and the transistor can have favorable electrical characteristics and high reliability.
  • impurities eg, water and hydrogen
  • a region of the semiconductor layer 108 in contact with the insulating layer 110c may function as one of a source region and a drain region.
  • the region of the semiconductor layer 108 in contact with the insulating layer 110b may function as the other of the source region and the drain region.
  • a region in contact with the insulating layer 110a may function as a channel formation region.
  • the channel length L100 of the transistor 100A corresponds to the length of the side surface of the insulating layer 110a on the opening 141 side in a cross-sectional view (see FIG. 5B).
  • hydrogen may diffuse from the insulating layer 110c into a region of the semiconductor layer 108 which is in contact with the insulating layer 110a.
  • hydrogen may diffuse from the insulating layer 110b into a region of the semiconductor layer 108 which is in contact with the insulating layer 110a.
  • the supply of oxygen from the insulating layer 110a to the semiconductor layer 108 suppresses an increase in oxygen vacancies (V 0 ) and V OH in a region of the semiconductor layer 108 in contact with the insulating layer 110a. Therefore, at least a region of the semiconductor layer 108 in contact with the insulating layer 110a can function as a channel formation region, and the transistor can exhibit favorable electrical characteristics and high reliability.
  • FIG. 1A can be referred to for a top view of a transistor 100B that can be applied to a semiconductor device that is one embodiment of the present invention.
  • FIG. 7A shows a cross-sectional view taken along the dashed line A1-A2 in FIG. 1A
  • FIG. 7B shows a cross-sectional view taken along the dashed-dotted line B1-B2. See FIG. 2 for a perspective view of the transistor 100B.
  • the transistor 100B is mainly different from the transistor 100 described above in that the insulating layer 110a has a laminated structure.
  • the insulating layer 110a has a laminated structure of an insulating layer 110a_1 and an insulating layer 110a_2 on the insulating layer 110a_1. Materials that can be used for the insulating layer 110a can be used for each of the insulating layers 110a_1 and 110a_2. The same material or different materials may be used for the insulating layers 110a_1 and 110a_2. Further, the insulating layer 110a_1 and the insulating layer 110a_2 may have different thicknesses.
  • the stress of the insulating layer 110a increases, which may cause warping of the substrate.
  • the insulating layer 110a in multiple steps, it may be possible to suppress the occurrence of problems during the process due to stress.
  • FIGS. 7A and 7B show a structure in which the insulating layer 110a has a two-layer structure, one embodiment of the present invention is not limited to this.
  • the insulating layer 110a may have a laminated structure of three or more layers.
  • TEM transmission electron microscope
  • FIG. 8A A top view of a transistor 100C that can be applied to a semiconductor device that is one embodiment of the present invention is shown in FIG. 8A.
  • FIG. 8B shows a cross-sectional view taken along the dashed-dotted line A1-A2 shown in FIG. 8A
  • FIG. 8C shows a cross-sectional view taken along the dashed-dotted line B1-B2. See FIG. 2 for a perspective view of the transistor 100C.
  • the transistor 100C is mainly different from the transistor 100 described above in that the end of the conductive layer 112b on the opening 143 side is located outside the end of the insulating layer 110 on the opening 141 side.
  • the end of the conductive layer 112 b on the side of the opening 143 is located on the insulating layer 110 . It can also be said that the opening 143 includes the opening 141 when viewed from above.
  • the semiconductor layer 108 has regions in contact with the top and side surfaces of the conductive layer 112b, the top and side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.
  • the semiconductor layer 108 has a shape that conforms to the top and side surfaces of the conductive layer 112b, the top and side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.
  • the steps of the layers formed on the conductive layers 112a, 112b, and the insulating layer 110 are reduced. Therefore, coverage of the layers formed over the conductive layers 112a, 112b, and the insulating layer 110 can be improved, and defects such as disconnection or voids in the layers can be suppressed.
  • FIG. 9A is a top view of transistor 100C.
  • 9B and 10 are enlarged views of FIG. 8B.
  • the channel length L100 of the transistor 100C is indicated by a dashed double-headed arrow.
  • the width D141 of the opening 141 is indicated by a dotted double-headed arrow
  • the width D143 of the opening 143 is indicated by a two-dot chain double-headed arrow.
  • the width D141 indicates the shortest short side of the rectangle that circumscribes the opening 141 when viewed from above.
  • the channel length L100 of the transistor 100C corresponds to the sum of the distance between the end of the conductive layer 112b on the opening 143 side and the end of the insulating layer 110 on the opening 141 side, and the length of the side surface of the insulating layer 110 on the opening 141 side. That is, the channel length L100 can be adjusted by the width D141 of the opening 141, the width D143 of the opening 143, the thickness T110 of the insulating layer 110, and the angle ⁇ 110.
  • the channel length L100 is preferably within the range described above.
  • the width D143 is preferably within the range described above.
  • Width D141 is preferably smaller than width D143.
  • the width D141 is, for example, preferably 0.2 ⁇ m or more and less than 5 ⁇ m, more preferably 0.2 ⁇ m or more and less than 4.5 ⁇ m, further preferably 0.2 ⁇ m or more and less than 4 ⁇ m, further preferably 0.2 ⁇ m or more and less than 3.5 ⁇ m, further preferably 0.2 ⁇ m or more and less than 3 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2.5 ⁇ m, further preferably 0.2 ⁇ m or more and less than 2 ⁇ m, furthermore It is preferably 0.2 ⁇ m or more and less than 1.5 ⁇ m, more preferably 0.3 ⁇ m or more and 1.5 ⁇ m or less, further preferably 0.3 ⁇ m or more and 1.2 ⁇ m or less, further preferably 0.4 ⁇ m or more and 1.2
  • the channel width W100 is the length of the end of the conductive layer 112b on the opening 143 side in top view.
  • the width D143 corresponds to the diameter of the opening 143, and the channel width W100 can be calculated as "D143 ⁇ ".
  • a region of the semiconductor layer 108 in contact with the insulating layer 110b may function as the other of a source region and a drain region, and a region in contact with the insulating layer 110a may function as a channel formation region. That is, in the semiconductor layer 108, the region in contact with the conductive layer 112b and the region in contact with the insulating layer 110b function as the other of the source region and the drain region in some cases.
  • FIG. 11A A top view of a transistor 100D that can be applied to a semiconductor device that is one embodiment of the present invention is shown in FIG. 11A.
  • FIG. 11B shows a cross-sectional view taken along the dashed line A1-A2 shown in FIG. 11A
  • FIG. 11C shows a cross-sectional view taken along the dashed-dotted line B1-B2. See FIG. 2 for a perspective view of the transistor 100D.
  • the transistor 100D is mainly different from the transistor 100 described above in that the semiconductor layer 108 has a region in contact with the side surface of the conductive layer 112b that does not face the opening 143.
  • a part of the end of the semiconductor layer 108 is located on the insulating layer 110 . It can be said that part of the end of the semiconductor layer 108 is in contact with the upper surface of the insulating layer 110 .
  • ⁇ Production method example 1> A method for manufacturing a semiconductor device of one embodiment of the present invention is described below with reference to drawings. Here, a structure in which an oxide semiconductor is used for the semiconductor layer 108 of the transistor 100A illustrated in FIG. 6A and the like will be described as an example.
  • the thin films (insulating films, semiconductor films, conductive films, etc.) that make up the semiconductor device can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum deposition method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like.
  • the CVD method includes a plasma enhanced CVD (PECVD) method, a thermal CVD method, and the like.
  • one of the thermal CVD methods is the metal organic CVD (MOCVD) method.
  • Thin films (insulating films, semiconductor films, conductive films, etc.) that make up semiconductor devices can be formed by methods such as spin coating, dipping, spray coating, inkjet, dispensing, screen printing, offset printing, doctor knife, slit coating, roll coating, curtain coating, and knife coating.
  • the thin film that constitutes the semiconductor device When processing the thin film that constitutes the semiconductor device, it can be processed using the photolithography method or the like.
  • the thin film may be processed by a nanoimprint method, a sandblast method, a lift-off method, or the like.
  • an island-shaped thin film may be directly formed by a film formation method using a shielding mask such as a metal mask.
  • the photolithography method typically includes the following two methods. One is a method of forming a resist mask on a thin film to be processed, processing the thin film by etching or the like, and removing the resist mask. The other is a method of forming a photosensitive thin film, then performing exposure and development to process the thin film into a desired shape.
  • the light used for exposure can be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these.
  • ultraviolet rays, KrF laser light, ArF laser light, or the like can also be used.
  • extreme ultraviolet (EUV: Extreme Ultra-violet) light or X-rays may be used.
  • An electron beam can also be used instead of the light used for exposure. The use of extreme ultraviolet light, X-rays, or electron beams is preferable because extremely fine processing is possible.
  • a photomask is not necessary when exposure is performed by scanning a beam such as an electron beam.
  • a dry etching method, a wet etching method, a sandblasting method, or the like can be used to etch the thin film.
  • A1 and B1 show perspective views
  • A2 and B2 show cross-sectional views taken along the dashed-dotted line A1-A2 and the dashed-dotted line B1-B2.
  • the substrate 102, the insulating layer 110, and the insulating layer 106 are omitted in A1 and B1 of each figure.
  • a conductive film to be the conductive layer 112 a is formed over the substrate 102 .
  • a sputtering method for example, can be suitably used to form the conductive film.
  • the conductive film is processed to form an island-shaped conductive layer 112a functioning as one of a source electrode and a drain electrode (FIGS. 12A1 and 12A2).
  • a wet etching method and a dry etching method may be used for processing the conductive film.
  • the island shape indicates a state in which two or more layers using the same material formed in the same process are physically separated.
  • an island-shaped conductive layer means that the conductive layer is physically separated from an adjacent conductive layer.
  • insulating film 110cf and insulating film 110af are formed over the substrate 102 and the conductive layer 112a (FIGS. 12B1 and 12B2).
  • the PECVD method can be preferably used for the formation of the insulating film 110cf and the insulating film 110af.
  • the PECVD method can be preferably used.
  • impurities include, for example, water and organic matter.
  • the substrate temperature during the formation of the insulating film 110cf and the insulating film 110af is preferably 180° C. or higher and 450° C. or lower, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 400° C. or lower, further preferably 350° C. or higher and 400° C. or lower.
  • the transistor can have favorable electrical characteristics and high reliability.
  • the insulating film 110cf and the insulating film 110af are formed before the semiconductor layer 108, so there is no need to worry about desorption of oxygen from the semiconductor layer 108 due to heat applied during formation of the insulating film 110cf and the insulating film 110af.
  • Heat treatment may be performed after the insulating film 110cf and the insulating film 110af are formed. By the heat treatment, water and hydrogen can be released from the surfaces and inside of the insulating films 110cf and 110af.
  • the temperature of the heat treatment is preferably 150° C. or more and less than the strain point of the substrate, more preferably 200° C. or more and 450° C. or less, further preferably 250° C. or more and 450° C. or less, further preferably 300° C. or more and 450° C. or less, further preferably 300° C. or more and 400° C. or less, further preferably 350° C. or more and 400° C. or less.
  • Heat treatment can be performed in an atmosphere containing one or more of noble gas, nitrogen, and oxygen. Dry air (CDA: Clean Dry Air) may be used as the atmosphere containing nitrogen or the atmosphere containing oxygen. Note that it is preferable that the content of hydrogen, water, or the like in the atmosphere is as small as possible.
  • CDA Clean Dry Air
  • a high-purity gas with a dew point of ⁇ 60° C. or lower, preferably ⁇ 100° C. or lower.
  • a dew point of ⁇ 60° C. or lower, preferably ⁇ 100° C. or lower.
  • an atmosphere containing as little hydrogen, water, or the like as possible entry of hydrogen, water, or the like into the insulating film 110cf and the insulating film 110af can be prevented as much as possible.
  • an oven, a rapid thermal annealing (RTA) device, or the like can be used for the heat treatment. The heat treatment time can be shortened by using the RTA apparatus.
  • a metal oxide layer 149 is formed on the insulating film 110af (FIGS. 13A1 and 13A2).
  • the metal oxide layer 149 may be an insulating layer or a conductive layer.
  • Metal oxide layer 149 can also be, for example, aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), or silicon-containing indium tin oxide (ITSO).
  • an oxide material containing one or more of the same elements is preferably used as the semiconductor layer 108 as the metal oxide layer 149 .
  • an oxide semiconductor material applicable to the semiconductor layer 108 is preferably used.
  • a metal oxide film formed using a sputtering target having the same composition as the semiconductor layer 108 can be used as the metal oxide layer 149 .
  • the use of sputtering targets with the same composition is preferable because the manufacturing apparatus and sputtering targets can be used in common.
  • a material with a higher gallium composition (content ratio) than the semiconductor layer 108 can be used for the metal oxide layer 149. It is preferable to use a material with a high gallium composition (content rate) for the metal oxide layer 149 because the blocking property against oxygen can be further improved. At this time, by using a material with a higher indium composition than the metal oxide layer 149 for the semiconductor layer 108, the field-effect mobility of the transistor can be increased.
  • the metal oxide layer 149 is preferably formed, for example, in an atmosphere containing oxygen. In particular, it is preferably formed by a sputtering method in an atmosphere containing oxygen. Oxygen can thus be suitably supplied to the insulating film 110af when the metal oxide layer 149 is formed.
  • the metal oxide layer 149 may be formed by a reactive sputtering method using oxygen as a deposition gas and a metal target.
  • a reactive sputtering method using oxygen as a deposition gas and a metal target.
  • an aluminum oxide film can be formed.
  • the oxygen supplied to the insulating film 110af can be increased as the ratio of the flow rate of the oxygen gas to the total flow rate of the film-forming gas introduced into the processing chamber of the film-forming apparatus (oxygen flow rate ratio) or as the oxygen partial pressure in the processing chamber increases.
  • the oxygen flow ratio or oxygen partial pressure is, for example, 50% to 100%, preferably 65% to 100%, more preferably 80% to 100%, and even more preferably 90% to 100%. In particular, it is preferable to set the oxygen flow ratio to 100% and bring the oxygen partial pressure as close to 100% as possible.
  • the metal oxide layer 149 By forming the metal oxide layer 149 by a sputtering method in an atmosphere containing oxygen in this manner, oxygen can be supplied to the insulating film 110af and oxygen can be prevented from being desorbed from the insulating film 110af when the metal oxide layer 149 is formed. As a result, a large amount of oxygen can be confined in the insulating film 110af. Then, a large amount of oxygen can be supplied to the semiconductor layer 108 by heat treatment performed later. As a result, oxygen vacancies (V 0 ) and V OH in the semiconductor layer 108 can be reduced, and the transistor can have favorable electrical characteristics and high reliability.
  • heat treatment may be performed. Since the above description can be referred to for the heat treatment, detailed description thereof is omitted.
  • oxygen can be effectively supplied from the metal oxide layer 149 to the insulating film 110af.
  • oxygen may be supplied to the insulating film 110af through the metal oxide layer 149.
  • a method for supplying oxygen for example, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or plasma treatment can be used.
  • the plasma treatment an apparatus that transforms oxygen gas into plasma with high-frequency power can be preferably used.
  • a plasma etching apparatus and a plasma ashing apparatus, for example, are exemplified as apparatuses that turn gas into plasma with high-frequency power.
  • the method for removing the metal oxide layer 149 is not particularly limited, a wet etching method can be preferably used.
  • etching of the insulating film 110af can be suppressed when the metal oxide layer 149 is removed. Accordingly, it is possible to prevent the thickness of the insulating film 110af from being thinned, and to make the thickness of the insulating layer 110a uniform.
  • a process of supplying oxygen to the insulating film 110af may be performed.
  • the process of supplying oxygen is not limited to the above method.
  • oxygen radicals, oxygen atoms, oxygen atomic ions, oxygen molecular ions, and the like are supplied to the insulating film 110af by an ion doping method, an ion implantation method, a plasma treatment, or the like.
  • oxygen may be supplied to the insulating film 110af through the film. The film is preferably removed after supplying oxygen.
  • a conductive film or a semiconductor film containing at least one of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, or tungsten can be used as the film that suppresses desorption of oxygen.
  • insulating film 110bf formation of conductive film 112f
  • an insulating film 110bf to be the insulating layer 110b is formed on the insulating film 110af.
  • the description regarding the formation of the insulating film 110af and the insulating film 110cf can be referred to, so detailed description thereof is omitted.
  • a conductive film 112f to be the conductive layer 112b is formed on the insulating film 110bf (FIGS. 14A1 and 14A2).
  • a sputtering method for example, can be preferably used to form the conductive film 112f.
  • opening 141 formation of opening 143
  • a region of the conductive film 112f overlapping with the conductive layer 112a is removed to form the conductive layer 112B having the opening 143.
  • a wet etching method and a dry etching method can be used to form the opening 143 .
  • a wet etching method for example, can be preferably used to form the opening 143 .
  • the insulating film 110f (insulating film 110af, insulating film 110bf, and insulating film 110cf) in a region overlapping with the conductive layer 112a is removed to form the insulating layer 110 having the opening 141 (FIGS. 14B1 and 14B2).
  • a wet etching method and a dry etching method can be used to form the opening 141 .
  • a dry etching method for example, can be preferably used to form the opening 141 .
  • the opening 141 can be formed using the resist mask used for forming the opening 143, for example. Specifically, a resist mask can be formed over the conductive film 112f, the conductive film 112f can be removed using the resist mask to form the opening 143, and the insulating film 110f can be removed using the resist mask to form the opening 141. Note that by processing the width D143 of the opening 143 to be larger than the width of the resist mask, the transistor 100C illustrated in FIG. 8A and the like can be manufactured.
  • the opening 143 may be formed using a resist mask different from the resist mask used for forming the opening 141 .
  • the conductive layer 112B is processed into a desired shape to form the conductive layer 112b (FIGS. 15A1 and 15A2).
  • Either or both of a wet etching method and a dry etching method can be used to form the conductive layer 112b.
  • a wet etching method for example, can be preferably used to form the conductive layer 112b.
  • a metal oxide film 108f to be the semiconductor layer 108 is formed so as to cover the openings 141 and 143 (FIGS. 15B1 and 15B2).
  • the metal oxide film 108f is provided in contact with the top and side surfaces of the conductive layer 112b, the top and side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.
  • the metal oxide film 108f is preferably formed by a sputtering method using a metal oxide target.
  • the metal oxide film 108f is preferably a dense film with as few defects as possible. Further, the metal oxide film 108f is preferably a high-purity film in which impurities including hydrogen elements are reduced as much as possible. In particular, it is preferable to use a crystalline metal oxide film as the metal oxide film 108f.
  • oxygen gas when forming the metal oxide film 108f.
  • oxygen gas when forming the metal oxide film 108f, oxygen can be suitably supplied into the insulating layer 110.
  • FIG. For example, when oxide or oxynitride is used for the insulating layer 110a, oxygen can be preferably supplied to the insulating layer 110a.
  • oxygen vacancies (V 0 ) and V OH in the semiconductor layer 108 can be reduced.
  • oxygen gas may be mixed with an inert gas (eg, helium gas, argon gas, xenon gas, etc.).
  • an inert gas eg, helium gas, argon gas, xenon gas, etc.
  • the crystallinity of the metal oxide film 108f can be improved and a highly reliable transistor can be realized as the flow rate of the oxygen gas to the total deposition gas (oxygen flow rate ratio) when the metal oxide film 108f is formed or as the partial pressure of oxygen in the treatment chamber of the deposition apparatus increases.
  • oxygen flow ratio or the oxygen partial pressure the lower the crystallinity of the metal oxide film 108f, so that the transistor can have a large on-state current.
  • the substrate temperature during formation of the metal oxide film 108f should be room temperature or higher and 250°C or lower, preferably room temperature or higher and 200°C or lower, and more preferably room temperature or higher and 140°C or lower. For example, if the substrate temperature is room temperature or higher and lower than 140° C., the productivity is increased, which is preferable. Crystallinity can be lowered by forming the metal oxide film 108f with the substrate temperature set to room temperature or without heating the substrate.
  • a treatment for desorbing water, hydrogen, organic substances, and the like adsorbed on the surface of the insulating layer 110 and a treatment for supplying oxygen into the insulating layer 110.
  • heat treatment can be performed at a temperature of 70° C. to 200° C. in a reduced pressure atmosphere.
  • plasma treatment may be performed in an atmosphere containing oxygen.
  • oxygen may be supplied to the insulating layer 110 by plasma treatment in an atmosphere containing an oxidizing gas such as dinitrogen monoxide (N 2 O).
  • N 2 O dinitrogen monoxide
  • oxygen can be supplied while organic substances on the surface of the insulating layer 110 are preferably removed. After such treatment, it is preferable to continuously form a metal oxide film 108f without exposing the surface of the insulating layer 110 to the atmosphere.
  • the semiconductor layer 108 has a laminated structure, it is preferable that after forming the first metal oxide film, the next metal oxide film be formed continuously without exposing the surface thereof to the atmosphere.
  • the metal oxide film 108f is processed into an island shape to form the semiconductor layer 108 (FIGS. 16A1 and 16A2).
  • Either or both of a wet etching method and a dry etching method can be used to form the semiconductor layer 108 .
  • a wet etching method for example, can be preferably used to form the semiconductor layer 108 .
  • part of the conductive layer 112b in a region that does not overlap with the semiconductor layer 108 is etched and thinned in some cases.
  • part of the insulating layer 110 in a region that overlaps neither the semiconductor layer 108 nor the conductive layer 112b is etched to reduce the film thickness in some cases.
  • the insulating layer 110b of the insulating layer 110 may disappear by etching, and the surface of the insulating layer 110a may be exposed.
  • the etching of the metal oxide film 108f by using a material with a high selection ratio for the insulating layer 110b, it is possible to suppress the thickness of the insulating layer 110b from being thinned.
  • Heat treatment is preferably performed after the metal oxide film 108f is formed or after the metal oxide film 108f is processed into the semiconductor layer 108. Hydrogen or water contained in the metal oxide film 108f or the semiconductor layer 108 or adsorbed to the surface can be removed by the heat treatment. Further, the heat treatment may improve the film quality of the metal oxide film 108f or the semiconductor layer 108 (eg, reduce defects, improve crystallinity, and the like).
  • Oxygen can also be supplied from the insulating layer 110a to the metal oxide film 108f or the semiconductor layer 108 by heat treatment. At this time, heat treatment is preferably performed before the semiconductor layer 108 is processed. Since the above description can be referred to for the heat treatment, detailed description thereof is omitted.
  • the heat treatment does not have to be performed if unnecessary. Further, the heat treatment may not be performed here, and may be combined with the heat treatment performed in a later step. Further, in some cases, the heat treatment can also be performed in a high-temperature treatment in a later process (for example, a film formation process).
  • the insulating layer 106 is formed to cover the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110.
  • FIG. The PECVD method can be suitably used for forming the insulating layer 106 .
  • the insulating layer 106 When an oxide semiconductor is used for the semiconductor layer 108, the insulating layer 106 preferably functions as a barrier film that suppresses diffusion of oxygen. Since the insulating layer 106 has a function of suppressing diffusion of oxygen, diffusion of oxygen from the insulating layer 106 to the conductive layer 104 can be suppressed, and oxidation of the conductive layer 104 can be suppressed. As a result, the transistor can have favorable electrical characteristics and high reliability.
  • the insulating layer 106 By increasing the temperature at which the insulating layer 106 functioning as a gate insulating layer is formed, the insulating layer can have few defects. However, if the insulating layer 106 is formed at a high temperature, oxygen is released from the semiconductor layer 108, and oxygen vacancies (V 0 ) and V OH in the semiconductor layer 108 may increase.
  • the substrate temperature during formation of the insulating layer 106 is preferably 180° C. or higher and 450° C. or lower, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 400° C. or lower.
  • the transistor can have favorable electrical characteristics and high reliability.
  • Plasma treatment may be performed on the surface of the semiconductor layer 108 before forming the insulating layer 106 . Impurities such as water adsorbed to the surface of the semiconductor layer 108 can be reduced by the plasma treatment. Therefore, impurities at the interface between the semiconductor layer 108 and the insulating layer 106 can be reduced, and a highly reliable transistor can be realized. In particular, it is suitable when the surface of the semiconductor layer 108 is exposed to the atmosphere between the formation of the semiconductor layer 108 and the formation of the insulating layer 106 . Plasma treatment can be performed, for example, in an atmosphere of oxygen, ozone, nitrogen, dinitrogen monoxide, argon, or the like. Further, plasma treatment and deposition of the insulating layer 106 are preferably performed successively without exposure to the air.
  • a conductive film to be the conductive layer 104 is formed over the insulating layer 106 .
  • a sputtering method for example, can be suitably used to form the conductive film.
  • the conductive film is processed to form an island-shaped conductive layer 104 functioning as a gate electrode (FIGS. 16B1 and 16B2).
  • the transistor 100A can be manufactured.
  • ⁇ Production method example 2> A manufacturing method that is different from the manufacturing method of the transistor 100A described in ⁇ Manufacturing Method Example 1> is described. The description of the parts that overlap with those described above will be omitted, and the different parts will be described.
  • steps up to formation of the conductive film 112f are performed in the same manner as in ⁇ Manufacturing Method Example 1>. Since the description of FIGS. 12A1 to 14A2 can be referred to up to the formation of the conductive film 112f, detailed description thereof is omitted.
  • opening 141 formation of opening 143
  • the conductive film 112f is processed to form the conductive layer 112B (FIGS. 17A1 and 17A2).
  • the opening 143 may not be formed in the conductive layer 112B.
  • Either or both of a wet etching method and a dry etching method can be used to form the conductive layer 112B.
  • a wet etching method for example, can be preferably used to form the conductive layer 112B.
  • the insulating film 110f (insulating film 110af, insulating film 110bf, and insulating film 110cf) in a region overlapping with the conductive layer 112a is removed to form the insulating layer 110 having the opening 141 (FIGS. 15A1 and 15A2).
  • a metal oxide film 108f that will become the semiconductor layer 108 is formed so as to cover the openings 141 and 143 (FIGS. 15B1 and 15B2). Since the description of ⁇ Manufacturing Method Example 1> can be referred to after the formation of the metal oxide film 108f, detailed description thereof is omitted.
  • the transistor 100A can be manufactured.
  • FIG. 18 shows two rows and two columns of pixels 210 . Also, sub-pixels for 2 rows and 6 columns are shown as a configuration in which each pixel 210 has three sub-pixels (sub-pixel 11R, sub-pixel 11G, and sub-pixel 11B).
  • the connection portion 140 can also be called a cathode contact portion.
  • Each sub-pixel has a display device (also called a display element).
  • display devices include liquid crystal devices (also referred to as liquid crystal elements) and light-emitting devices.
  • the light emitting device for example, an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode) is preferably used.
  • OLED Organic Light Emitting Diode
  • QLED Quadantum-dot Light Emitting Diode
  • light-emitting substances included in light-emitting devices include substances that emit fluorescence (fluorescent materials), substances that emit phosphorescence (phosphorescent materials), substances that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence (TADF) materials), and inorganic compounds (quantum dot materials, etc.).
  • LEDs such as micro LED (Light Emitting Diode), can also be used as a light emitting device.
  • the emission color of the light emitting device can be infrared, red, green, blue, cyan, magenta, yellow, white, or the like.
  • color purity can be enhanced by providing a light-emitting device with a microcavity structure.
  • a display device of one embodiment of the present invention includes a light-emitting device manufactured for each emission color, and is capable of full-color display.
  • the top surface shape of the sub-pixel shown in FIG. 18 corresponds to the top surface shape of the light emitting region of the light emitting device.
  • the top surface shape of a sub-pixel can be, for example, a triangle, a quadrangle (including a rectangle and a square), a polygon such as a pentagon, a shape with rounded corners of these polygons, an ellipse, or a circle.
  • Each sub-pixel has a pixel circuit that controls a light-emitting device.
  • the pixel circuit is not limited to the range of the sub-pixels shown in FIG. 18, and may be arranged outside thereof.
  • the transistors included in the pixel circuit of the sub-pixel 11R may be located within the range of the sub-pixel 11G shown in FIG. 18, or part or all of them may be located outside the range of the sub-pixel 11R.
  • FIG. 18 shows that the aperture ratios of the sub-pixels 11R, 11G, and 11B are equal or substantially equal (it can be said that the sizes of the light-emitting regions are equal or substantially equal), one embodiment of the present invention is not limited thereto.
  • the aperture ratios of the sub-pixel 11R, the sub-pixel 11G, and the sub-pixel 11B can be determined appropriately.
  • the sub-pixel 11R, the sub-pixel 11G, and the sub-pixel 11B may have different aperture ratios, or two or more of them may be equal or approximately equal.
  • a stripe arrangement is applied to the pixels 210 shown in FIG.
  • a pixel 210 shown in FIG. 18 is composed of three sub-pixels, a sub-pixel 11R, a sub-pixel 11G, and a sub-pixel 11B.
  • the sub-pixel 11R, sub-pixel 11G, and sub-pixel 11B exhibit different colors of light.
  • Examples of the sub-pixel 11R, sub-pixel 11G, and sub-pixel 11B include three-color sub-pixels of red (R), green (G), and blue (B), and three-color sub-pixels of yellow (Y), cyan (C), and magenta (M).
  • the number of sub-pixel color types is not limited to three, and may be four or more.
  • the four-color sub-pixels include four-color sub-pixels of R, G, B, and white (W), four-color sub-pixels of R, G, B, and Y, and four-color sub-pixels of R, G, B, and infrared light (IR).
  • W white
  • IR infrared light
  • the row direction is sometimes called the X direction
  • the column direction is sometimes called the Y direction.
  • the X and Y directions intersect, for example perpendicularly intersect (see FIG. 18).
  • FIG. 18 shows an example in which sub-pixels of different colors are arranged side by side in the X direction and sub-pixels of the same color are arranged side by side in the Y direction.
  • FIG. 18 shows an example in which the connecting portion 140 is positioned on one side of the display portion when viewed from above
  • the connecting portion 140 may be provided at least one of the upper side, the right side, the left side, and the lower side of the display portion when viewed from above, and may be provided so as to surround the four sides of the display portion.
  • the shape of the upper surface of the connecting portion 140 is not particularly limited, and may be strip-shaped, L-shaped, U-shaped, frame-shaped, or the like.
  • the number of connection parts 140 may be singular or plural.
  • FIG. 19 shows a cross-sectional view between the dashed line X1-X2 and the dashed line Y1-Y2 in FIG.
  • the display device 200 includes a light-emitting device 130R, a light-emitting device 130G, and a light-emitting device 130B provided on a layer 101, and a protective layer 131 is provided to cover these light-emitting devices.
  • a substrate 120 is bonded onto the protective layer 131 with a resin layer 122 .
  • Layer 101 preferably includes pixel circuits that function to control light emitting device 130R, light emitting device 130G, and light emitting device 130B.
  • a pixel circuit can have a structure including a transistor, a capacitor, and a wiring, for example.
  • the layer 101 may have one or both of a gate line driver circuit (gate driver) and a source line driver circuit (source driver) in addition to the pixel circuit.
  • Layer 101 may further include one or both of arithmetic circuitry and memory circuitry.
  • the layer 101 can have a structure in which a pixel circuit is provided on a semiconductor substrate or an insulating substrate.
  • a stacked structure in which a plurality of transistors are provided over the substrate 151 and an insulating layer is provided to cover the transistors can be applied.
  • the transistor included in the layer 101 the transistor described in Embodiment 1 can be preferably used.
  • the transistor described in Embodiment 1 for a pixel circuit a high-definition display device with a high aperture ratio can be obtained.
  • the transistor described in Embodiment 1 for one or both of the gate line driver circuit (gate driver) and the source line driver circuit (source driver) the frame can be narrowed and the display device can be small.
  • FIG. 19 shows a transistor 205R, a transistor 205G, and a transistor 205B as transistors included in the layer 101.
  • An insulating layer 218 and an insulating layer 235 over the insulating layer 218 are provided to cover the transistors 205R, 205G, and 205B.
  • the insulating layer 106, the insulating layer 218, and the insulating layer 235 have openings.
  • Light emitting device 130R is electrically connected to transistor 205R through the opening.
  • Light emitting device 130G is electrically connected to transistor 205G through the opening.
  • Light emitting device 130B is electrically connected to transistor 205B through the opening.
  • the light-emitting device 130 When describing items common to the light-emitting device 130R, the light-emitting device 130G, and the light-emitting device 130B, they may be referred to as the light-emitting device 130, omitting the letters that distinguish them. Similarly, for constituent elements that are distinguished by letters, such as the transistor 205R, the transistor 205G, and the transistor 205B, there are cases where the letters are omitted when describing common items.
  • Each of the light emitting device 130R, the light emitting device 130G, and the light emitting device 130B has a pair of electrodes and a layer sandwiched between the pair of electrodes.
  • the layer has at least a light-emitting layer.
  • one electrode functions as an anode and the other electrode functions as a cathode.
  • the case where the pixel electrode functions as an anode and the common electrode functions as a cathode may be taken as an example.
  • the light-emitting device 130R has a pixel electrode 111R on the insulating layer 235, an island-shaped layer 113R on the pixel electrode 111R, a common layer 114 on the island-shaped layer 113R, and a common electrode 115 on the common layer 114.
  • layer 113R and common layer 114 can be collectively referred to as EL layers.
  • the light-emitting device 130G has a pixel electrode 111G on the insulating layer 235, an island-shaped layer 113G on the pixel electrode 111G, a common layer 114 on the island-shaped layer 113G, and a common electrode 115 on the common layer 114.
  • layer 113G and common layer 114 can be collectively referred to as EL layers.
  • the light-emitting device 130B has a pixel electrode 111B on the insulating layer 235, an island-shaped layer 113B on the pixel electrode 111B, a common layer 114 on the island-shaped layer 113B, and a common electrode 115 on the common layer 114.
  • layer 113B and common layer 114 can be collectively referred to as EL layers.
  • the layer provided in island shape for each light emitting device is indicated as layer 113R, layer 113G, or layer 113B
  • the layer shared by a plurality of light emitting devices is indicated as common layer 114.
  • the layers 113R, 113G, and 113B, excluding the common layer 114 may be referred to as an island-shaped EL layer, an island-shaped EL layer, or the like.
  • the present invention is not limited to this.
  • Layers 113R, 113G, and 113B may have different thicknesses.
  • the display device of one embodiment of the present invention may be any of a top emission type (top emission type) in which light is emitted in a direction opposite to the substrate over which the light emitting device is formed, a bottom emission type (bottom emission type) in which light is emitted to the side of the substrate over which the light emitting device is formed, and a double emission type (dual emission type) in which light is emitted to both sides.
  • top emission type top emission type
  • bottom emission type bottom emission type
  • double emission type dual emission type
  • An insulating layer 218 provided over the transistors 205R, 205G, and 205B functions as a protective layer for the transistors 205R, 205G, and 205B.
  • the insulating layer 218 is preferably made of a material into which impurities are difficult to diffuse.
  • the insulating layer 218 functions as a blocking film that suppresses diffusion of impurities from the outside into the transistor. Impurities include, for example, water and hydrogen.
  • the insulating layer 218 can be an insulating layer having an inorganic material or an insulating layer having an organic material.
  • inorganic materials such as oxides, oxynitrides, nitrides, or oxynitrides can be preferably used, for example. More specifically, one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate can be used.
  • silicon nitride oxide releases less impurities (eg, water and hydrogen) from itself and can function as a blocking film that suppresses the diffusion of impurities from above the transistor to the transistor. Therefore, it can be suitably used as the insulating layer 218.
  • the organic material for example, one or more of acrylic resin and polyimide resin can be used.
  • a photosensitive material may be used as the organic material.
  • two or more of the insulating films described above may be laminated and used.
  • the insulating layer 218 may have a stacked-layer structure of an insulating layer containing an inorganic material and an insulating layer containing an organic material.
  • the insulating layer 235 has a function of reducing unevenness caused by the transistors 205R, 205G, and 205B and making the top surface of the layer 101 flatter. Note that the insulating layer 235 is sometimes referred to as a planarization layer in this specification and the like.
  • An insulating layer containing an organic material can be suitably used for the insulating layer 235 .
  • the organic material it is preferable to use a photosensitive organic resin, for example, it is preferable to use a photosensitive resin composition containing an acrylic resin.
  • acrylic resin does not only refer to polymethacrylate esters or methacrylic resins, but may refer to all acrylic polymers in a broad sense.
  • the insulating layer 235 may be made of acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimideamide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenol resin, precursors of these resins, or the like. Also, the insulating layer 235 may be made of an organic material such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin. A photoresist may also be used as the photosensitive resin. As the photosensitive organic resin, either a positive material or a negative material may be used.
  • the insulating layer 235 may have a laminated structure of an organic insulating layer and an inorganic insulating layer.
  • the insulating layer 235 can have a stacked structure of an organic insulating layer and an inorganic insulating layer over the organic insulating layer.
  • an inorganic insulating layer on the outermost surface of the insulating layer 235, it can function as an etching protective layer. As a result, it is possible to prevent the insulating layer 235 from being partially etched when forming the pixel electrode 111 and lowering the flatness of the insulating layer 235 .
  • connection failure due to a disconnection of the common electrode 115, or local thinning of the common electrode 115 may increase the electrical resistance.
  • planarity of the top surface of the insulating layer 235 is low, the processing accuracy of layers formed over the insulating layer 235 may be low.
  • the processing accuracy of the light-emitting device 130 and the like provided over the insulating layer 235 is increased, so that a display device with high definition can be obtained.
  • a part of the insulating layer 235 may be removed when forming the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B.
  • the insulating layer 235 may have recesses in regions that do not overlap with any of the pixel electrodes 111R, 111G, and 111B.
  • the insulating layer 106, the insulating layer 218, and the insulating layer 235 have openings in regions overlapping with the conductive layer 112b of the transistor 205R.
  • the conductive layer 112b is exposed through the opening.
  • a pixel electrode 111R is provided to cover the opening.
  • the pixel electrode 111R has regions in contact with the top and side surfaces of the insulating layer 235, the side surfaces of the insulating layer 218, the side surface of the insulating layer 106, and the top surface of the conductive layer 112b. That is, the light emitting device 130R is electrically connected to the transistor 205R through the opening.
  • the insulating layer 106, the insulating layer 218, and the insulating layer 235 have openings in regions overlapping with the conductive layer 112b included in the transistor 205G.
  • the conductive layer 112b is exposed through the opening.
  • a pixel electrode 111G is provided to cover the opening.
  • the pixel electrode 111G has regions in contact with the top and side surfaces of the insulating layer 235, the side surfaces of the insulating layer 218, the side surfaces of the insulating layer 106, and the top surface of the conductive layer 112b. That is, the light emitting device 130G is electrically connected to the transistor 205G through the opening.
  • the insulating layer 106, the insulating layer 218, and the insulating layer 235 have openings in regions overlapping with the conductive layer 112b included in the transistor 205B.
  • the conductive layer 112b is exposed through the opening.
  • a pixel electrode 111B is provided to cover the opening.
  • the pixel electrode 111B has regions in contact with the top and side surfaces of the insulating layer 235, the side surfaces of the insulating layer 218, the side surfaces of the insulating layer 106, and the top surface of the conductive layer 112b. That is, the light emitting device 130B is electrically connected to the transistor 205B through the opening.
  • FIGS. 19A and 19B show an example in which the positions of the ends of the insulating layers 106, 218, and 235 on the opening side are aligned or substantially aligned, one embodiment of the present invention is not limited thereto. The positions of the ends of the layers on the opening side do not have to match.
  • FIG. 19 illustrates a structure in which the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B are each electrically connected to the conductive layer 112b
  • the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B may each be electrically connected to the conductive layer 112a.
  • the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B can be electrically connected to the conductive layer 112a through openings provided in the insulating layers 110, 106, 218, and 235.
  • the structure of the pixel electrode 111 that can be applied to the display device that is one embodiment of the present invention is not limited to the structure of the pixel electrode 111 illustrated in FIG.
  • the insulating layer 237 covers the upper surface end portions of the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B.
  • the insulating layer 237 functions as a partition wall (also called bank, bank, or spacer).
  • the insulating layer 237 can be an insulating layer with an inorganic material or an insulating layer with an organic material.
  • a material that can be used for the insulating layer 218 and a material that can be used for the insulating layer 235 can be used for the insulating layer 237 .
  • the insulating layer 237 may have a stacked-layer structure of an insulating layer containing an inorganic material and an insulating layer containing an organic material.
  • the insulating layer 237 By providing the insulating layer 237, the pixel electrode 111, the common layer 114 and the common electrode 115 are in contact with each other, and short-circuiting of the light emitting device 130 can be suppressed.
  • a concave portion is formed in the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B so as to cover the openings of the insulating layer 106, the insulating layer 218, and the insulating layer 235.
  • An insulating layer 237 is embedded in the recess.
  • the layers 113R, 113G, and 113B can be formed using a fine metal mask (FMM) after forming the insulating layer 237 that covers the top edge of the pixel electrode 111 and the opening.
  • FMM fine metal mask
  • a layer 113R, a layer 113G, and a layer 113B may be provided on the insulating layer 237.
  • FIG. 19 illustrates a structure in which adjacent layers 113 are not in contact with each other; however, one embodiment of the present invention is not limited to this.
  • Adjacent layers 113 may be in contact on the insulating layer 237 .
  • adjacent layers 113 may overlap on the insulating layer 237 .
  • the layers 113R and 113G may be in contact with each other, or the layers 113R and 113G may overlap each other.
  • insulating layer 237 can also be applied to other configuration examples.
  • a single structure (a structure having only one light emitting unit) or a tandem structure (a structure having a plurality of light emitting units) may be applied to the light emitting device of this embodiment.
  • the light-emitting unit has at least one light-emitting layer.
  • the light emitting device 130R emits red (R) light
  • the light emitting device 130G emits green (G) light
  • the light emitting device 130B emits blue (B) light.
  • Layer 113R, layer 113G, and layer 113B have at least a light-emitting layer.
  • Layer 113R has a light-emitting layer that emits red light
  • layer 113G has a light-emitting layer that emits green light
  • layer 113B has a light-emitting layer that emits blue light.
  • layer 113R has a luminescent material that emits red light
  • layer 113G has a luminescent material that emits green light
  • layer 113B has a luminescent material that emits blue light.
  • the layer 113R has a structure having a plurality of light-emitting units that emit red light
  • the layer 113G has a structure that has a plurality of light-emitting units that emit green light
  • the layer 113B has a structure that has a plurality of light-emitting units that emit blue light.
  • a charge generating layer is preferably provided between each light emitting unit.
  • the layers 113R, 113G, and 113B may each have one or more of a hole injection layer, a hole transport layer, a hole blocking layer, a charge generation layer, an electron blocking layer, an electron transport layer, and an electron injection layer.
  • the layers 113R, 113G, and 113B may each have a hole injection layer, a hole transport layer, a light emitting layer, and an electron transport layer in this order. Moreover, you may have an electron block layer between a hole transport layer and a light emitting layer. Moreover, you may have a hole blocking layer between an electron carrying layer and a light emitting layer. Moreover, you may have an electron injection layer on an electron carrying layer.
  • the layers 113R, 113G, and 113B may each have an electron injection layer, an electron transport layer, a light emitting layer, and a hole transport layer in this order. Moreover, you may have a hole blocking layer between an electron carrying layer and a light emitting layer. Moreover, you may have an electron block layer between a hole transport layer and a light emitting layer. Also, a hole injection layer may be provided on the hole transport layer.
  • each of the layers 113R, 113G, and 113B preferably has a light-emitting layer and a carrier-transporting layer (electron-transporting layer or hole-transporting layer) on the light-emitting layer.
  • the layers 113R, 113G, and 113B each preferably have a light emitting layer and a carrier blocking layer (hole blocking layer or electron blocking layer) over the light emitting layer.
  • the layers 113R, 113G, and 113B each preferably have a light emitting layer, a carrier blocking layer over the light emitting layer, and a carrier transport layer over the carrier blocking layer.
  • Layers 113R, 113G, and 113B may have, for example, a first light-emitting unit, a charge generation layer on the first light-emitting unit, and a second light-emitting unit on the charge generation layer.
  • the second light-emitting unit preferably has a light-emitting layer and a carrier-transporting layer (electron-transporting layer or hole-transporting layer) on the light-emitting layer.
  • the second light emitting unit preferably has a light emitting layer and a carrier blocking layer (hole blocking layer or electron blocking layer) on the light emitting layer.
  • the second light-emitting unit preferably has a light-emitting layer, a carrier-blocking layer on the light-emitting layer, and a carrier-transporting layer on the carrier-blocking layer.
  • the light-emitting unit provided in the uppermost layer preferably has a light-emitting layer and one or both of a carrier transport layer and a carrier block layer over the light-emitting layer.
  • the common layer 114 has, for example, an electron injection layer or a hole injection layer.
  • the common layer 114 may have a laminate of an electron transport layer and an electron injection layer, or may have a laminate of a hole transport layer and a hole injection layer.
  • Common layer 114 is shared by light emitting device 130R, light emitting device 130G, and light emitting device 130B. Note that, as shown in FIG. 20, a configuration without the common layer 114 may be employed.
  • Layer 113R, layer 113G, and layer 113B can each be configured to have an electron-injection layer or a hole-injection layer.
  • the common electrode 115 is shared by the light emitting device 130R, the light emitting device 130G, and the light emitting device 130B.
  • the common electrode 115 is electrically connected to the conductive layer 123 provided in the connecting portion 140 .
  • the conductive layer 123 is preferably formed using the same material and in the same process as the pixel electrodes 111R, 111G, and 111B.
  • the common layer 114 may not be provided in the connecting portion 140 .
  • 19 shows a structure in which the common electrode 115 is provided over the conductive layer 123.
  • the common layer 114 may be provided over the conductive layer 123 and the conductive layer 123 and the common electrode 115 may be electrically connected to each other through the common layer 114 .
  • a mask also referred to as an area mask or a rough metal mask to distinguish from a fine metal mask
  • the common layer 114 and the common electrode 115 can be formed into different regions.
  • a protective layer 131 is preferably provided on the light emitting device 130R, the light emitting device 130G, and the light emitting device 130B. By providing the protective layer 131, the reliability of the light emitting device 130 can be improved.
  • the protective layer 131 may have a single layer structure or a laminated structure of two or more layers.
  • the conductivity of the protective layer 131 does not matter. At least one of an insulating film, a semiconductor film, and a conductive film can be used for the protective layer 131 .
  • the protective layer 131 By including an inorganic film in the protective layer 131, it is possible to suppress oxidation of the common electrode 115 and entry of impurities (moisture, oxygen, etc.) into the light emitting device. Therefore, deterioration of the light emitting device is suppressed, and the reliability of the display device can be improved.
  • the protective layer 131 for example, an inorganic insulating film containing one or more of oxides, nitrides, oxynitrides, and oxynitrides can be used. Specific examples of materials that can be used for these inorganic insulating films are as described above.
  • the protective layer 131 preferably comprises a nitride or nitrided oxide, more preferably a nitride.
  • an inorganic film containing In-Sn oxide also referred to as ITO
  • In-Zn oxide also referred to as ITO
  • In-Zn oxide Ga-Zn oxide
  • Al-Zn oxide aluminum-Zn oxide
  • indium gallium zinc oxide In-Ga-Zn oxide, also referred to as IGZO
  • the inorganic film preferably has a high resistance, and specifically, preferably has a higher resistance than the common electrode 115 .
  • the inorganic film may further contain nitrogen.
  • the protective layer 131 When the light emitted from the light-emitting device is taken out through the protective layer 131, the protective layer 131 preferably has high transparency to visible light.
  • the protective layer 131 preferably has high transparency to visible light.
  • ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials with high transparency to visible light.
  • the protective layer 131 for example, a laminated structure of an aluminum oxide film and a silicon nitride film over the aluminum oxide film, or a laminated structure of an aluminum oxide film and an IGZO film over the aluminum oxide film, or the like can be used.
  • impurities such as water and oxygen
  • the protective layer 131 may have an organic film.
  • protective layer 131 may have both an organic film and an inorganic film.
  • organic materials that can be used for the protective layer 131 include organic insulating materials that can be used for the insulating layer 127 .
  • the protective layer 131 may have a two-layer structure formed using different film formation methods. Specifically, the first layer of the protective layer 131 may be formed using the ALD method, and the second layer of the protective layer 131 may be formed using the sputtering method.
  • a light shielding layer 117 may be provided on the surface of the substrate 120 on the resin layer 122 side.
  • the light shielding layer 117 can be provided between the adjacent light emitting devices 130 and at the connecting portion 140 .
  • light shielding layer 117 By providing the light shielding layer 117, light emitted from adjacent sub-pixels is blocked and color mixture can be prevented.
  • external light can be suppressed from reaching the transistor 205, and deterioration of the transistor 205 can be suppressed. Note that a structure in which the light shielding layer 117 is not provided may be employed.
  • optical members can be arranged outside the substrate 120 .
  • optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an antireflection layer, and a light collecting film.
  • a surface protective layer such as an antistatic film that suppresses adhesion of dust, a water-repellent film that suppresses adhesion of dirt, a hard coat film that suppresses the occurrence of scratches due to use, and an impact absorption layer may be arranged.
  • a glass layer or a silica layer (SiO 2 x layer) as the surface protective layer, because surface contamination and scratching can be suppressed.
  • DLC diamond-like carbon
  • AlO x aluminum oxide
  • polyester-based material polycarbonate-based material, or the like
  • a material having a high visible light transmittance is preferably used for the surface protective layer.
  • Glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, etc. can be used for the substrate 120 .
  • a material that transmits the light is used for the substrate on the side from which the light from the light-emitting device is extracted.
  • Using a flexible material for the substrate 120 can increase the flexibility of the display device.
  • a polarizing plate may be used as the substrate 120 .
  • polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resins, acrylic resins, polyimide resins, polymethylmethacrylate resins, polycarbonate (PC) resins, polyethersulfone (PES) resins, polyamide resins (nylon, aramid, etc.), polysiloxane resins, cycloolefin resins, polystyrene resins, polyamideimide resins, polyurethane resins, polyvinyl chloride resins, polyvinylidene chloride resins, polypropylene resins, polytetrafluoroethylene (PTFE). Resin, ABS resin, cellulose nanofiber, etc. can be used.
  • glass having a thickness that is flexible may be used for the substrate 120.
  • a substrate having high optical isotropy has small birefringence (it can be said that the amount of birefringence is small).
  • the absolute value of the retardation (retardation) value of the substrate with high optical isotropy is preferably 30 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less.
  • Films with high optical isotropy include triacetylcellulose (TAC, also called cellulose triacetate) films, cycloolefin polymer (COP) films, cycloolefin copolymer (COC) films, and acrylic films.
  • TAC triacetylcellulose
  • COP cycloolefin polymer
  • COC cycloolefin copolymer
  • a film having a low water absorption rate as the substrate.
  • various curable adhesives such as photocurable adhesives such as ultraviolet curable adhesives, reaction curable adhesives, thermosetting adhesives, and anaerobic adhesives can be used.
  • These adhesives include epoxy resins, acrylic resins, silicone resins, phenol resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, EVA (ethylene vinyl acetate) resins, and the like.
  • a material with low moisture permeability such as epoxy resin is preferable.
  • a two-liquid mixed type resin may be used.
  • an adhesive sheet or the like may be used.
  • FIG. 21 is a cross-sectional view between the dashed-dotted lines X1-X2 and the dashed-dotted lines Y1-Y2 in FIG.
  • the display device shown in FIG. 21 differs from the display device shown in FIG. 19 mainly in that the configurations of the light emitting device 130R, the light emitting device 130G, and the light emitting device 130B are different.
  • the light emitting device 130R has a layer 113W instead of the layer 113R.
  • Light emitting device 130G has layer 113W instead of layer 113G.
  • Light emitting device 130B has layer 113W instead of layer 113B.
  • Layer 113W may be configured to emit white light, for example.
  • FIG. 22 shows a configuration in which layer 113W is commonly provided for light emitting device 130R, light emitting device 130G, and light emitting device 130B.
  • An optical adjustment layer (not shown) may be provided between the pixel electrode 111 and the layer 113 .
  • a conductive layer having transparency to visible light can be used as the optical adjustment layer.
  • the film thickness of the optical adjustment layer may be different between the light emitting device 130R, the light emitting device 130G, and the light emitting device 130B. By adjusting the film thickness of the optical adjustment layer to the optimum optical path length, it is possible to obtain light with a desired wavelength intensified from the light emitting device 130 even when the layer 113W that emits white light is used.
  • a colored layer 132R transmitting red light, a colored layer 132G transmitting green light, and a colored layer 132B transmitting blue light may be provided on the surface of the substrate 120 on the resin layer 122 side.
  • the colored layer 132R is provided in a region overlapping with the light emitting device 130R.
  • the colored layer 132G is provided in a region overlapping with the light emitting device 130G.
  • the colored layer 132B is provided in a region overlapping with the light emitting device 130B.
  • the colored layer 132R can shield light of unnecessary wavelengths emitted from the red light emitting device 130R. With such a configuration, the color purity of light emitted from each light emitting device can be enhanced.
  • a combination of the light-emitting device 130G and the colored layer 132G and a combination of the light-emitting device 130B and the colored layer 132B have similar effects.
  • the colored layer 132R, the colored layer 132G, and the colored layer 132B can also be applied to other configuration examples.
  • FIG. 23 is a cross-sectional view between the dashed-dotted line X1-X2 and the dashed-dotted line Y1-Y2 in FIG.
  • the display device shown in FIG. 23 is mainly different from the display device shown in FIG. 19 in that the configurations of the pixel electrode 111R, the pixel electrode 111G, the pixel electrode 111B, and the conductive layer 123 are different, and the layer 128 is included.
  • the pixel electrode 111R of the light emitting device 130R has a laminated structure of a conductive layer 124R, a conductive layer 126R on the conductive layer 124R, and a conductive layer 129R on the conductive layer 126R.
  • the conductive layer 124R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layers 106, 218, and 235.
  • the end of the conductive layer 124R is positioned outside the end of the conductive layer 126R.
  • the end of the conductive layer 126R is located inside the end of the conductive layer 129R.
  • the end of the conductive layer 124R is located inside the end of the conductive layer 129R. That is, the end of the conductive layer 126R is located on the conductive layer 124R. Also, the end of the conductive layer 129R is located on the conductive layer 124R.
  • the top and side surfaces of the conductive layer 126R are covered with a conductive layer 129R.
  • the conductive layer 124R is not particularly limited in its transparency and reflectivity to visible light.
  • a conductive layer that transmits visible light or a conductive layer that reflects visible light can be used as the conductive layer 124R.
  • an oxide conductive layer can be used as the conductive layer that transmits visible light.
  • an In--Si--Sn oxide also referred to as ITSO
  • ITSO In--Si--Sn oxide
  • the conductive layer that reflects visible light for example, a metal such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, silver, tin, zinc, platinum, gold, molybdenum, tantalum, or tungsten, or an alloy containing this as a main component (for example, an alloy of silver, palladium, and copper (APC: Ag-Pd-Cu)) can be used.
  • the conductive layer 124R may have a layered structure of a conductive layer that transmits visible light and a reflective conductive layer over the conductive layer.
  • the conductive layer 124R it is preferable to use a material with high adhesion to the formation surface of the conductive layer 124R (here, the insulating layer 235). Thereby, film peeling of the conductive layer 124R can be suppressed.
  • a conductive layer reflective to visible light can be used for the conductive layer 126R.
  • the conductive layer 126R may have a layered structure of a conductive layer that transmits visible light and a reflective conductive layer over the conductive layer.
  • a material that can be applied to the conductive layer 124R can be applied to the conductive layer 126R.
  • a laminated structure of In--Si--Sn oxide (ITSO) and a silver-palladium-copper alloy (APC) over the In--Si--Sn oxide (ITSO) can be preferably used as the conductive layer 126R.
  • a material that can be applied to the conductive layer 124R can be applied to the conductive layer 129R.
  • a conductive layer that is transparent to visible light can be used.
  • In--Si--Sn oxide (ITSO) can be used as the conductive layer 129R.
  • the conductive layer 126R When a material that is easily oxidized is used for the conductive layer 126R, it is possible to suppress oxidation of the conductive layer 126R by applying a material that is difficult to be oxidized for the conductive layer 129R and covering the conductive layer 126R with the conductive layer 129R. In addition, it is possible to suppress deposition of metal components contained in the conductive layer 126R. For example, when a material containing silver is used for the conductive layer 126R, an In--Si--Sn oxide (ITSO) can be preferably used for the conductive layer 129R. Thereby, it is possible to suppress the oxidation of the conductive layer 126R and suppress the deposition of silver.
  • ITSO In--Si--Sn oxide
  • the conductive layers 124G, 126G, and 129G in the light-emitting device 130G, and the conductive layers 124B, 126B, and 129B in the light-emitting device 130B are the same as the conductive layers 124R, 126R, and 129R in the light-emitting device 130R, so detailed descriptions are omitted.
  • the conductive layer 123 can have, for example, a laminated structure of a conductive layer 124p, a conductive layer 126p on the conductive layer 124p, and a conductive layer 129p on the conductive layer 126p.
  • the conductive layer 124p can be formed in the same step as the conductive layers 124R, 124G, and 124B.
  • the conductive layer 126p can be formed in the same step as the conductive layers 126R, 126G, and 126B.
  • the conductive layer 129p can be formed in the same step as the conductive layers 129R, 129G, and 129B.
  • FIG. 23 shows a configuration in which the thickness of the conductive layer 129p is different from the thicknesses of the conductive layers 129R, 129G, and 129B.
  • the thickness of the conductive layer 129p, the conductive layer 129R, the conductive layer 129G, and the conductive layer 129B may be varied according to the resistivity of the materials used.
  • the conductive layers 129p may be formed in steps different from those of the conductive layers 129R, 129G, and 129B.
  • part of the step of forming the conductive layer 129p and the step of forming the conductive layer 129R, the conductive layer 129G, and the conductive layer 129B may be shared.
  • the pixel electrode 111R, the pixel electrode 111G, the pixel electrode 111B, and the conductive layer 123 shown in FIG. 23 can also be applied to other configuration examples.
  • recesses are formed so as to cover the openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.
  • a layer 128 is embedded in the recess.
  • the layer 128 has a function of planarizing recesses of the conductive layers 124R, 124G, and 124B.
  • a conductive layer 126R, a conductive layer 126G, and a conductive layer 126B electrically connected to the conductive layer 124R, the conductive layer 124G, and the conductive layer 124B are provided over the conductive layer 124R, the conductive layer 124G, the conductive layer 124B, and the layer 128. Therefore, regions of the conductive layers 124R, 124G, and 124B, which overlap with the recessed portions, also function as light-emitting regions, so that the aperture ratio of the pixel can be increased.
  • the layer 128 may be an insulating layer or a conductive layer.
  • Various inorganic insulating materials, organic insulating materials, and conductive materials can be used as appropriate for layer 128 .
  • layer 128 is preferably formed using an insulating material, and particularly preferably formed using an organic insulating material.
  • an organic insulating material that can be used for the insulating layer 127 can be applied.
  • the layer 128 when the layer 128 is a conductive layer, the layer 128 can function as part of the pixel electrode.
  • FIG. 24 is a cross-sectional view between the dashed-dotted lines X1-X2 and the dashed-dotted lines Y1-Y2 in FIG.
  • the display device shown in FIG. 24 is mainly different from the display device shown in FIG. 23 in that it does not have the insulating layer 237, the layer 113 covers the top and side surfaces of the pixel electrode 111, and it has the insulating layers 125 and 127.
  • FIG. 24 shows an example in which the edge of the layer 113R is located outside the edge of the pixel electrode 111R.
  • the layer 113R is formed to cover the edge of the pixel electrode 111R.
  • the entire upper surface of the pixel electrode can be used as a light emitting region, and the aperture ratio can be increased compared to a configuration in which the end of the island-shaped EL layer is located inside the end of the pixel electrode.
  • the pixel electrode 111R and the layer 113R are described here as an example, the same applies to the pixel electrode 111G and the layer 113G and the pixel electrode 111B and the layer 113B.
  • no insulating layer is provided between the pixel electrode 111R and the layer 113R.
  • no insulating layer is provided between the pixel electrode 111G and the layer 113G to cover the edge of the upper surface of the pixel electrode 111G. Therefore, the interval between adjacent light emitting devices can be reduced. Therefore, a high-definition or high-resolution display device can be obtained. Moreover, a mask for forming the insulating layer is not required, and the manufacturing cost of the display device can be reduced.
  • the EL layer can be formed using, for example, photolithography. Specifically, after forming a pixel electrode for each sub-pixel, a film serving as a light-emitting layer is formed over a plurality of pixel electrodes. After that, the film is processed using a photolithographic method to form one island-shaped light-emitting layer for one pixel electrode. Thereby, the light-emitting layer is divided for each sub-pixel, and an island-shaped light-emitting layer can be formed for each sub-pixel. By using a photolithography method, a fine-sized EL layer can be formed. By providing an island-shaped EL layer for each light-emitting device, leakage current between adjacent light-emitting devices can be suppressed. Thereby, crosstalk due to unintended light emission can be prevented, and a display device with extremely high contrast can be realized. In particular, a display device with high current efficiency at low luminance can be realized.
  • the heat resistance temperature of the compounds contained in the layers 113R, 113G, and 113B is preferably 100°C or higher and 180°C or lower, more preferably 120°C or higher and 180°C or lower, and more preferably 140°C or higher and 180°C or lower.
  • the glass transition point (Tg) of these compounds is preferably 100° C. or higher and 180° C. or lower, more preferably 120° C. or higher and 180° C. or lower, and more preferably 140° C. or higher and 180° C. or lower.
  • FIG. 24 shows a plurality of cross sections of the insulating layer 125 and the insulating layer 127, when the display device 200 is viewed from above, the insulating layer 125 and the insulating layer 127 are each connected to one.
  • the display device 200 can be configured to have one insulating layer 125 and one insulating layer 127, for example.
  • the display device 200 may have a plurality of insulating layers 125 separated from each other, and may have a plurality of insulating layers 127 separated from each other.
  • the insulating layer 125 is preferably in contact with the side surfaces of the layers 113R, 113G, and 113B. With the structure in which the insulating layer 125 is in contact with the layers 113R, 113G, and 113B, peeling of the layers 113R, 113G, and 113B can be prevented. Adhesion between the insulating layer and the layer 113B, the layer 113G, or the layer 113R has the effect of fixing or adhering the adjacent layer 113B or the like by the insulating layer. This can improve the reliability of the light emitting device. Moreover, the production yield of the light-emitting device can be increased.
  • the insulating layer 125 can have an inorganic insulating film.
  • oxide, nitride, oxynitride, and nitride oxide can be used for the insulating layer 125, for example.
  • the insulating layer 125 may have a single-layer structure or a laminated structure.
  • Oxides include silicon oxide, aluminum oxide, magnesium oxide, indium gallium zinc oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide.
  • Nitrides include silicon nitride and aluminum nitride.
  • Oxynitrides include silicon oxynitride and aluminum oxynitride.
  • Nitride oxides include silicon oxynitride and aluminum oxynitride.
  • aluminum oxide is preferable because it has a high etching selectivity with respect to the EL layer and has a function of protecting the EL layer
  • the insulating layer 125 preferably functions as a barrier insulating layer against at least one of water and oxygen. Further, the insulating layer 125 preferably has a function of suppressing diffusion of at least one of water and oxygen. Further, the insulating layer 125 preferably has a function of capturing or fixing at least one of water and oxygen (also referred to as gettering).
  • a barrier insulating layer refers to an insulating layer having a barrier property.
  • the term "barrier property" refers to a function of suppressing diffusion of a corresponding substance (also referred to as low permeability).
  • the insulating layer 125 has a function as a barrier insulating layer or a gettering function, so that it is possible to suppress the intrusion of impurities (typically, at least one of water and oxygen) that can diffuse into each light-emitting device from the outside. With such a structure, a highly reliable light-emitting device and a highly reliable display device can be provided.
  • impurities typically, at least one of water and oxygen
  • the insulating layer 127 is provided on the insulating layer 125 so as to fill the recesses formed in the insulating layer 125 .
  • the insulating layer 127 can overlap with part of the top surface and side surfaces of the layers 113R, 113G, and 113B with the insulating layer 125 interposed therebetween.
  • the insulating layer 127 preferably covers at least part of the side surface of the insulating layer 125 .
  • the space between adjacent island-shaped layers can be filled, so that unevenness of a surface on which a layer (for example, a carrier-injection layer, a common electrode, and the like) provided over the island-shaped layers can be reduced and the coverage of the layers can be improved.
  • the top surface of the insulating layer 127 preferably has a highly flat shape, but may have a convex portion, a convex curved surface, a concave curved surface, or a concave portion.
  • An insulating layer containing an organic material can be suitably used as the insulating layer 127 .
  • the organic material it is preferable to use a photosensitive organic resin, for example, it is preferable to use a photosensitive resin composition containing an acrylic resin.
  • acrylic resin does not only refer to polymethacrylate esters or methacrylic resins, but may refer to all acrylic polymers in a broad sense.
  • the mask layers 118R and 119R are located on the layer 113R of the light emitting device 130R, the mask layers 118G and 119G are located on the layer 113G of the light emitting device 130G, and the mask layers 118B and 119B are located on the layer 113B of the light emitting device 130B.
  • Mask layers 118 and 119 are provided to surround the light emitting region. In other words, the mask layer has openings in portions overlapping the light emitting regions.
  • the mask layer 118R and the mask layer 119R are part of the remaining mask layer provided on the layer 113R when forming the layer 113R.
  • the mask layers 118G and 119G are part of the mask layers that were provided when the layer 113G was formed, and the mask layers 118B and 119B are part of the mask layers that were provided when the layer 113B was formed.
  • part of the mask layer used to protect the EL layer may remain during manufacturing.
  • the common layer 114 and the common electrode 115 are provided on the layers 113R, 113G, 113B, the mask layers 118, 119, the insulating layers 125 and 127.
  • the insulating layer 125 and the insulating layer 127 there is a step due to a region where the pixel electrode and the island-shaped EL layer are provided and a region where the pixel electrode and the island-shaped EL layer are not provided (region between the light emitting devices). Since the display device of one embodiment of the present invention includes the insulating layer 125 and the insulating layer 127 , the step can be reduced, and coverage with the common layer 114 and the common electrode 115 can be improved. Therefore, it is possible to suppress poor connection due to disconnection. In addition, it is possible to prevent the film thickness of the common electrode 115 from locally thinning due to the steps, and the increase in electrical resistance.
  • FIG. 25A A top view of the display device 200 different from that of FIG. 18 is shown in FIG. 25A.
  • a pixel 210 shown in FIG. 25A is composed of four types of sub-pixels: a sub-pixel 11R, a sub-pixel 11G, a sub-pixel 11B, and a sub-pixel 11S.
  • the sub-pixel 11R, the sub-pixel 11G, the sub-pixel 11B, and the sub-pixel 11S can be configured to have light-emitting devices with different emission colors.
  • the sub-pixel 11R, the sub-pixel 11G, the sub-pixel 11B, and the sub-pixel 11S include sub-pixels of four colors of R, G, B, and W, sub-pixels of four colors of R, G, B, and Y, and four sub-pixels of R, G, B, and IR.
  • a display device of one embodiment of the present invention may include a light-receiving device in a pixel.
  • three may be configured with light-emitting devices and the remaining one may be configured with a light-receiving device.
  • a pn-type or pin-type photodiode can be used as the light receiving device.
  • a light-receiving device functions as a photoelectric conversion device (also referred to as a photoelectric conversion element) that detects light incident on the light-receiving device and generates an electric charge. The amount of charge generated from the light receiving device is determined based on the amount of light incident on the light receiving device.
  • the light receiving device can detect one or both of visible light and infrared light.
  • visible light for example, one or more of colors such as blue, purple, violet, green, yellow-green, yellow, orange, and red can be detected.
  • infrared light it is possible to detect an object even in a dark place, which is preferable.
  • organic photodiode having a layer containing an organic compound as the light receiving device.
  • Organic photodiodes can be easily made thinner, lighter, and larger, and have a high degree of freedom in shape and design, so that they can be applied to various display devices.
  • an organic EL device is used as the light emitting device and an organic photodiode is used as the light receiving device.
  • An organic EL device and an organic photodiode can be formed on the same substrate. Therefore, an organic photodiode can be incorporated in a display device using an organic EL device.
  • a manufacturing method similar to that for the light-emitting device can also be applied to the light-receiving device.
  • the island-shaped active layer (also referred to as a photoelectric conversion layer) of the light-receiving device is not formed using a fine metal mask, but is formed by processing after forming a film that will be the active layer over the entire surface. Therefore, the island-shaped active layer can be formed with a uniform thickness. Further, by providing the mask layer over the active layer, the damage to the active layer during the manufacturing process of the display device can be reduced, and the reliability of the light-receiving device can be improved.
  • FIG. 25B A cross-sectional view between dashed line X3-X4 in FIG. 25A is shown in FIG. 25B. Note that FIG. 24 can be referred to for the cross-sectional views between the dashed-dotted lines X1-X2 and the dashed-dotted lines Y1-Y2 in FIG. 25A.
  • the display device 200 is provided with a light emitting device 130R and a light receiving device 150 on the layer 101, and a protective layer 131 is provided to cover these light emitting devices.
  • a substrate 120 is bonded onto the protective layer 131 with a resin layer 122 .
  • An insulating layer 125 and an insulating layer 127 on the insulating layer 125 are provided in a region between the adjacent light emitting device and light receiving device.
  • FIG. 25B shows an example in which the light emitting device 130R emits light to the substrate 120 side and the light receiving device 150 receives light from the substrate 120 side (see light Lem and light Lin).
  • the configuration of the light emitting device 130R is as described above.
  • the light receiving device 150 has a pixel electrode 111S on the insulating layer 235, a layer 113S on the pixel electrode 111S, a common layer 114 on the layer 113S, and a common electrode 115 on the common layer 114.
  • Layer 113S includes at least the active layer.
  • the layer 113S includes at least an active layer and preferably has a plurality of functional layers.
  • functional layers include carrier transport layers (hole transport layer and electron transport layer) and carrier block layers (hole block layer and electron block layer).
  • the layer 113S is a layer provided in the light receiving device 150 and not provided in the light emitting device.
  • the functional layers other than the active layer included in the layer 113S may have the same material as the functional layers other than the light-emitting layers included in the layers 113B to 113R.
  • the common layer 114 is a sequence of layers shared by the light-emitting and light-receiving devices.
  • a layer shared by the light-receiving device and the light-emitting device may have different functions in the light-emitting device and in the light-receiving device. Components are sometimes referred to herein based on their function in the light emitting device.
  • a hole-injecting layer functions as a hole-injecting layer in light-emitting devices and as a hole-transporting layer in light-receiving devices.
  • an electron-injecting layer functions as an electron-injecting layer in light-emitting devices and as an electron-transporting layer in light-receiving devices.
  • a layer shared by the light-receiving device and the light-emitting device may have the same function in the light-emitting device as in the light-receiving device.
  • a hole-transporting layer functions as a hole-transporting layer in both a light-emitting device and a light-receiving device
  • an electron-transporting layer functions as an electron-transporting layer in both a light-emitting device and a light-receiving device.
  • mask layers 118R and 119R are mask layers between the layer 113R and the insulating layer 125 , and between the layer 113S and the insulating layer 125 are mask layers 118S and 119S.
  • the mask layer 118R and the mask layer 119R are part of the remaining mask layer provided on the layer 113R when the layer 113R is processed.
  • the mask layer 118S and the mask layer 119S are part of the remaining mask layer provided in contact with the upper surface of the layer 113S when processing the layer 113S, which is the layer containing the active layer.
  • Mask layer 118B and mask layer 118S may have the same material or may have different materials.
  • Mask layer 119B and mask layer 119S may have the same material or may have different materials.
  • the light receiving device 150 is electrically connected to the conductive layer 112b of the transistor 205S.
  • the transistor 205S can be formed in the same process as the transistors 205R, 205G, and 205B.
  • Each of the insulating layer 235, the insulating layer 218, and the insulating layer 106 has an opening in a region overlapping with the conductive layer 112b included in the transistor 205S.
  • a pixel electrode 111S included in the light receiving device 150 is provided so as to cover the opening.
  • a conductive layer 112b included in the transistor 205S is electrically connected to the pixel electrode 111S through the opening.
  • the pixel electrode 111S can be formed in the same process as the pixel electrodes 111R, 111G, and 111B.
  • FIG. 25A shows an example in which the aperture ratio (also referred to as the size, the size of the light-emitting region or the light-receiving region) of the sub-pixel 11S is larger than that of the sub-pixel 11R, the sub-pixel 11G, and the sub-pixel 11B, but one embodiment of the present invention is not limited thereto.
  • the aperture ratios of the sub-pixel 11R, sub-pixel 11G, sub-pixel 11B, and sub-pixel 11S can be determined as appropriate.
  • the sub-pixel 11R, the sub-pixel 11G, the sub-pixel 11B, and the sub-pixel 11S may have different aperture ratios, and two or more may have the same or substantially the same aperture ratio.
  • the sub-pixel 11S may have a higher aperture ratio than at least one of the sub-pixels 11R, 11G, and 11B.
  • the wide light receiving area of the sub-pixel 11S may make it easier to detect the object.
  • the aperture ratio of the sub-pixel 11S may be higher than that of the other sub-pixels depending on the definition of the display device, the circuit configuration of the sub-pixels, and the like.
  • the sub-pixel 11S may have a lower aperture ratio than at least one of the sub-pixels 11R, 11G, and 11B. If the light-receiving area of the sub-pixel 11S is narrow, the imaging range is narrowed, and blurring of the imaging result can be suppressed and the resolution can be improved. Therefore, high-definition or high-resolution imaging can be performed, which is preferable.
  • the sub-pixel 11S can have a detection wavelength, definition, and aperture ratio that match the application.
  • Example of manufacturing method of display device An example of a method for manufacturing a display device of one embodiment of the present invention will be described with reference to FIGS. Regarding the material and forming method of each element, the description of the same parts as those described above may be omitted. Further, the details of the configuration of the light-emitting device will be described in Embodiment Mode 5.
  • the description related to the semiconductor device described above can be referred to, so detailed description will be omitted.
  • a vacuum process such as a vapor deposition method and a solution process such as a spin coating method or an inkjet method can be used to fabricate a light-emitting device.
  • vapor deposition methods include physical vapor deposition (PVD) such as sputtering, ion plating, ion beam vapor deposition, molecular beam vapor deposition, and vacuum vapor deposition, and chemical vapor deposition (CVD).
  • the functional layers included in the EL layer, vapor deposition (vacuum vapor deposition, etc.), coating (dip coating, die coating, bar coating, spin coating, spray coating, etc.), printing (inkjet, screen (stencil printing), offset (lithographic printing), flexo (letterpress printing), gravure, or microcontact. method, etc.).
  • 26A to 28B show side by side a cross-sectional view taken along the dashed-dotted line X1-X2 shown in FIG. 19 and a cross-sectional view taken along the dashed-dotted line Y1-Y2.
  • the transistor 205R, the transistor 205G, and the transistor 205B are manufactured over the substrate 151.
  • the description in Embodiment 1 can be referred to; therefore, detailed description is omitted.
  • an insulating film 218f to be the insulating layer 218 is formed to cover the transistors 205R, 205G, and 205B (FIG. 26A).
  • the substrate temperature during the formation of the insulating film 218f is preferably 180° C. or higher and 450° C. or lower, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 400° C.
  • the transistor can have favorable electrical characteristics and high reliability.
  • Heat treatment may be performed after the insulating film 218f is formed.
  • water and hydrogen can be released from the surface and inside of the insulating film 218f. Since the above description can be referred to for the heat treatment, detailed description thereof is omitted.
  • the heat treatment does not have to be performed if unnecessary. Further, the heat treatment may not be performed here, and may be combined with the heat treatment performed in a later step. Further, when there is a high-temperature treatment in a later process (for example, a film formation process), the heat treatment may be combined with the heat treatment.
  • an opening 191 is formed (FIG. 26B).
  • the opening 191 is provided in a region overlapping with the conductive layer 112b of the transistor 205R, a region overlapping with the conductive layer 112b of the transistor 205G, and a region overlapping with the conductive layer 112b of the transistor 205B.
  • conductive layer 112b is exposed.
  • an insulating layer 235 having openings 193 is formed on the insulating layer 218 (FIG. 26C).
  • the opening 193 is provided in a region overlapping with the conductive layer 112b of the transistor 205R, a region overlapping with the conductive layer 112b of the transistor 205G, and a region overlapping with the conductive layer 112b of the transistor 205B.
  • the insulating layer 235 can be formed by applying a composition containing the organic material by spin coating, and then selectively exposing and developing.
  • a photosensitive organic material a positive photosensitive resin may be used, or a negative photosensitive resin may be used.
  • Light used for exposure preferably includes i-line. Also, the light used for exposure may include at least one of g-line and h-line. The width of the opening can be controlled by adjusting the exposure amount.
  • a sputtering method, an evaporation method, a droplet discharge method (inkjet method), screen printing, or offset printing may be used.
  • the organic material can be cured by heat treatment.
  • the heat treatment temperature is preferably lower than the heat resistance temperature of the organic material.
  • the temperature of the heat treatment is preferably 150° C. or higher and 350° C. or lower, more preferably 180° C. or higher and 300° C. or lower, further preferably 200° C. or higher and 270° C. or lower, further preferably 200° C. or higher and 250° C. or lower, further preferably 220° C. or higher and 250° C. or lower.
  • the heat treatment can be performed in an atmosphere containing noble gas or nitrogen. Alternatively, it may be heated in a dry air atmosphere. Note that it is preferable that the atmosphere of the heat treatment does not contain hydrogen, water, or the like as much as possible.
  • An electric furnace, an RTA apparatus, or the like can be used for the heat treatment.
  • a conductive film to be the pixel electrode 111R, the pixel electrode 111G, the pixel electrode 111B, and the conductive layer 123 is formed, and the conductive film is processed to form the pixel electrode 111R, the pixel electrode 111G, the pixel electrode 111B, and the conductive layer 123 (FIG. 27A).
  • One or both of a wet etching method and a dry etching method may be used for processing the conductive film.
  • an insulating layer 237 is formed to cover the pixel electrode 111R, the pixel electrode 111G, the pixel electrode 111B, and the ends of the conductive layer 123 (FIG. 27B).
  • An organic insulating film or an inorganic insulating film can be used for the insulating layer 237 .
  • the ends of the insulating layer 237 are preferably tapered. By tapering the end portion of the insulating layer 237, coverage with a film to be formed later can be improved.
  • it is preferable to use a photosensitive material for the organic insulating film because the shape of the end portion can be easily controlled by changing the exposure and development conditions.
  • an inorganic insulating film may be used as the insulating layer 237 .
  • the display device 200 can be a high-definition display device.
  • the insulating layer 237 can be formed by applying a composition containing the organic material by spin coating and then selectively exposing and developing the composition.
  • a photosensitive organic material a positive photosensitive resin may be used, or a negative photosensitive resin may be used.
  • Light used for exposure preferably includes i-line. Also, the light used for exposure may include at least one of g-line and h-line. The width of the opening can be controlled by adjusting the exposure amount.
  • a sputtering method, an evaporation method, a droplet discharge method (inkjet method), screen printing, or offset printing may be used.
  • a layer 113R is formed on the pixel electrode 111R.
  • a layer 113G is formed on the pixel electrode 111G.
  • a layer 113B is formed on the pixel electrode 111B (FIG. 28A).
  • Each of the layers 113R, 113G, and 113B is preferably formed by vacuum deposition using a fine metal mask. In a vacuum deposition method using a fine metal mask, deposition is often performed over a wider area than the openings of the fine metal mask. Layers 113R, 113G, and 113B can be formed in a range wider than the opening of the fine metal mask. Also, the end portions of the layers 113R, 113G, and 113B are tapered.
  • Layers 113 R, 113 G, and 113 B may also be formed over the insulating layer 237 .
  • a sputtering method using a fine metal mask or an inkjet method may be used to form the layers 113R, 113G, and 113B. It is preferable not to form the layers 113R, 113G, and 113B over the conductive layer 123 .
  • the order in which the layers 113R, 113G, and 113B are formed is not particularly limited. 28A and the like show an example in which the layers 113R, 113G, and 113B are separated from each other, that is, the adjacent layers 113 are separated without being in contact with each other; however, one embodiment of the present invention is not limited thereto. Adjacent layers 113 may abut. For example, over the insulating layer 237, the layer 113R may have a region overlapping with the layer 113G, the layer 113G may have a region overlapping with the layer 113B, and the layer 113R may have a region overlapping with the layer 113B.
  • a common layer 114, a common electrode 115 and a protective layer 131 are formed on the insulating layer 237, layers 113R, 113G and 113B (FIG. 28B).
  • the common layer 114 can be formed by a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, a coating method, or the like.
  • a sputtering method or a vacuum deposition method can be used to form the common electrode 115 .
  • a film formed by an evaporation method and a film formed by a sputtering method may be stacked.
  • a common electrode 115 is also formed on the conductive layer 123 . By using the area mask, the area where the common layer 114 is formed can be made different from the area where the common electrode 115 is formed.
  • Examples of film forming methods for the protective layer 131 include a vacuum deposition method, a sputtering method, a CVD method, an ALD method, and the like.
  • a substrate 120 is prepared, and a light shielding layer 117 is formed on the substrate 120 .
  • the display device can be manufactured by bonding the substrate 120 and the light shielding layer 117 to the protective layer 131 using the resin layer 122 (FIG. 19).
  • the top surface shape of the sub-pixel shown in the drawings in this embodiment corresponds to the top surface shape of the light emitting region (or light receiving region).
  • top surface shapes of sub-pixels include triangles, quadrilaterals (including rectangles and squares), polygons such as pentagons, polygons with rounded corners, ellipses, and circles.
  • the circuit layout that configures the sub-pixels is not limited to the range of the sub-pixels shown in the drawing, and may be arranged outside the sub-pixels.
  • a pixel 210 shown in FIG. 29A is composed of three types of sub-pixels: sub-pixel 11a, sub-pixel 11b, and sub-pixel 11c.
  • a pixel 210 shown in FIG. 29B has a sub-pixel 11a having a substantially trapezoidal top surface shape with rounded corners, a sub-pixel 11b having a substantially triangular top surface shape with rounded corners, and a sub-pixel 11c having a substantially square or substantially hexagonal top surface shape with rounded corners. Also, the sub-pixel 11a has a larger light emitting area than the sub-pixel 11b. Thus, the shape and size of each sub-pixel can be determined independently. For example, sub-pixels with more reliable light emitting devices can be smaller in size.
  • FIG. 29C shows an example in which pixels 210a having sub-pixels 11a and 11b and pixels 210b having sub-pixels 11b and 11c are alternately arranged.
  • a delta arrangement is applied to the pixels 210a and 210b shown in FIGS. 29D to 29F.
  • the pixel 210a has two sub-pixels (sub-pixel 11a and sub-pixel 11b) in the upper row (first row) and one sub-pixel (sub-pixel 11c) in the lower row (second row).
  • the pixel 210b has one sub-pixel (sub-pixel 11c) in the upper row (first row) and two sub-pixels (sub-pixel 11a and sub-pixel 11b) in the lower row (second row).
  • FIG. 29D is an example in which each sub-pixel has a substantially rectangular top surface shape with rounded corners
  • FIG. 29E is an example in which each sub-pixel has a circular top surface shape
  • FIG. 29F is an example in which each sub-pixel has a substantially hexagonal top surface shape with rounded corners.
  • each sub-pixel is arranged inside a hexagonal region arranged closely.
  • Each sub-pixel is arranged so as to be surrounded by six sub-pixels when focusing on one sub-pixel.
  • sub-pixels that emit light of the same color are provided so as not to be adjacent to each other.
  • the sub-pixels are provided such that three sub-pixels 11b and three sub-pixels 11c are alternately arranged so as to surround the sub-pixel 11a.
  • FIG. 29G is an example in which sub-pixels of each color are arranged in a zigzag pattern. Specifically, when viewed from above, the positions of the upper sides of two sub-pixels (for example, sub-pixel 11a and sub-pixel 11b, or sub-pixel 11b and sub-pixel 11c) aligned in the row direction are shifted.
  • the sub-pixel 11a is preferably the sub-pixel R that emits red light
  • the sub-pixel 11b is the sub-pixel G that emits green light
  • the sub-pixel 11c is preferably the sub-pixel B that emits blue light.
  • the configuration of the sub-pixels is not limited to this, and the colors exhibited by the sub-pixels and the order in which the sub-pixels are arranged can be determined as appropriate.
  • the sub-pixel 11b may be a sub-pixel R that emits red light
  • the sub-pixel 11a may be a sub-pixel G that emits green light.
  • the top surface shape of the sub-pixel may be a polygonal shape with rounded corners, an elliptical shape, a circular shape, or the like.
  • a technique for correcting the mask pattern in advance so that the design pattern and the transfer pattern match may be used.
  • OPC Optical Proximity Correction
  • a pattern for correction is added to a corner portion of a figure on a mask pattern.
  • a pixel can have four types of sub-pixels.
  • a stripe arrangement is applied to the pixels 210 shown in FIGS. 30A to 30C.
  • FIG. 30A is an example in which each sub-pixel has a rectangular top surface shape
  • FIG. 30B is an example in which each sub-pixel has a top surface shape connecting two semicircles and a rectangle
  • FIG. 30C is an example in which each sub-pixel has an elliptical top surface shape.
  • a matrix arrangement is applied to the pixels 210 shown in FIGS. 30D to 30F.
  • FIG. 30D is an example in which each sub-pixel has a square top surface shape
  • FIG. 30E is an example in which each sub-pixel has a substantially square top surface shape with rounded corners
  • FIG. 30F is an example in which each sub-pixel has a circular top surface shape.
  • FIGS. 30G and 30H show an example in which one pixel 210 is composed of 2 rows and 3 columns.
  • a pixel 210 shown in FIG. 30G has three sub-pixels (sub-pixel 11a, sub-pixel 11b, and sub-pixel 11c) in the upper row (first row) and one sub-pixel (sub-pixel 11d) in the lower row (second row).
  • the pixel 210 has sub-pixels 11a in the left column (first column), sub-pixels 11b in the center column (second column), sub-pixels 11c in the right column (third column), and sub-pixels 11d over the three columns.
  • a pixel 210 shown in FIG. 30H has three sub-pixels (sub-pixel 11a, sub-pixel 11b, and sub-pixel 11c) in the upper row (first row) and three sub-pixels 11d in the lower row (second row).
  • pixel 210 has sub-pixels 11a and 11d in the left column (first column), sub-pixels 11b and 11d in the center column (second column), and sub-pixels 11c and 11d in the right column (third column).
  • FIG. 30H by aligning the arrangement of the sub-pixels in the upper row and the lower row, it is possible to efficiently remove dust that may be generated in the manufacturing process. Therefore, a display device with high display quality can be provided.
  • FIG. 30I shows an example in which one pixel 210 is composed of 3 rows and 2 columns.
  • a pixel 210 shown in FIG. 30I has sub-pixels 11a in the upper row (first row), sub-pixels 11b in the middle row (second row), sub-pixels 11c in the first and second rows, and one sub-pixel (sub-pixel 11d) in the lower row (third row).
  • the pixel 210 has the sub-pixels 11a and 11b in the left column (first column), the sub-pixel 11c in the right column (second column), and the sub-pixel 11d over the two columns.
  • a pixel 210 shown in FIGS. 30A to 30I is composed of four sub-pixels: sub-pixel 11a, sub-pixel 11b, sub-pixel 11c, and sub-pixel 11d.
  • the sub-pixel 11a, the sub-pixel 11b, the sub-pixel 11c, and the sub-pixel 11d can be configured to have light-emitting devices with different emission colors.
  • Examples of the sub-pixel 11a, sub-pixel 11b, sub-pixel 11c, and sub-pixel 11d include sub-pixels of four colors of R, G, B, and white (W), sub-pixels of four colors of R, G, B, and Y, sub-pixels of R, G, B, and infrared light (IR).
  • the sub-pixel 11a is the sub-pixel R that emits red light
  • the sub-pixel 11b is the sub-pixel G that emits green light
  • the sub-pixel 11c is the sub-pixel B that emits blue light
  • the sub-pixel 11d is preferably the sub-pixel W that emits white light, the sub-pixel Y that emits yellow light, or the sub-pixel IR that emits near-infrared light.
  • the pixel 210 shown in FIGS. 30G and 30H has a stripe arrangement of R, G, and B, so that the display quality can be improved.
  • the layout of R, G, and B is a so-called S-stripe arrangement, so the display quality can be improved.
  • the pixel 210 may have sub-pixels with light-receiving devices.
  • any one of the sub-pixels 11a to 11d may be a sub-pixel having a light receiving device.
  • each pixel 210 shown in FIGS. 30A to 30I for example, it is preferable that the sub-pixel 11a is the sub-pixel R that emits red light, the sub-pixel 11b is the sub-pixel G that emits green light, the sub-pixel 11c is the sub-pixel B that emits blue light, and the sub-pixel 11d is the sub-pixel S having a light receiving device.
  • the pixel 210 shown in FIGS. 30G and 30H has a stripe arrangement of R, G, and B, so that the display quality can be improved.
  • the layout of R, G, and B is a so-called S-stripe arrangement, so the display quality can be improved.
  • the wavelength of light detected by the sub-pixel S having a light receiving device is not particularly limited.
  • the sub-pixel S can be configured to detect one or both of visible light and infrared light.
  • the pixel can be configured to have five types of sub-pixels.
  • FIG. 30J shows an example in which one pixel 210 is composed of 2 rows and 3 columns.
  • a pixel 210 shown in FIG. 30J has three sub-pixels (sub-pixel 11a, sub-pixel 11b, and sub-pixel 11c) in the upper row (first row) and two sub-pixels (sub-pixel 11d and sub-pixel 11e) in the lower row (second row).
  • the pixel 210 has sub-pixels 11a and 11d in the left column (first column), sub-pixels 11b in the center column (second column), sub-pixels 11c in the right column (third column), and sub-pixels 11e in the second to third columns.
  • FIG. 30K shows an example in which one pixel 210 is composed of 3 rows and 2 columns.
  • a pixel 210 shown in FIG. 30K has a sub-pixel 11a in the upper row (first row), a sub-pixel 11b in the middle row (second row), sub-pixels 11c from the first row to the second row, and two sub-pixels (sub-pixel 11d and sub-pixel 11e) in the lower row (third row).
  • the pixel 210 has sub-pixels 11a, 11b, and 11d in the left column (first column), and sub-pixels 11c and 11e in the right column (second column).
  • each pixel 210 shown in FIGS. 30J and 30K for example, it is preferable that the sub-pixel 11a is the sub-pixel R that emits red light, the sub-pixel 11b is the sub-pixel G that emits green light, and the sub-pixel 11c is the sub-pixel B that emits blue light.
  • the pixel 210 shown in FIG. 30J has a stripe arrangement of R, G, and B, so that the display quality can be improved.
  • the layout of R, G, and B is a so-called S-stripe arrangement, so the display quality can be improved.
  • each pixel 210 shown in FIGS. 30J and 30K it is preferable to apply a sub-pixel S having a light receiving device to at least one of the sub-pixels 11d and 11e.
  • the structures of the light receiving devices may be different from each other.
  • at least a part of the wavelength regions of the light to be detected may be different.
  • one of the sub-pixel 11d and the sub-pixel 11e may have a light receiving device that mainly detects visible light, and the other may have a light receiving device that mainly detects infrared light.
  • one of the sub-pixels 11d and 11e is preferably a sub-pixel S having a light-receiving device, and the other is preferably a sub-pixel having a light-emitting device that can be used as a light source.
  • one of the sub-pixels 11d and 11e is a sub-pixel IR that emits infrared light
  • the other is a sub-pixel S that has a light receiving device that detects infrared light.
  • the sub-pixel S can detect reflected infrared light emitted by the sub-pixel IR using the sub-pixel IR as a light source.
  • various layouts can be applied to pixels each including subpixels each including a light-emitting device. Further, a structure in which a pixel includes both a light-emitting device and a light-receiving device can be applied to the display device of one embodiment of the present invention. Also in this case, various layouts can be applied.
  • the display device of this embodiment can be a high-definition display device. Therefore, the display device of the present embodiment can be used, for example, in the display units of wristwatch-type and bracelet-type information terminals (wearable devices), VR devices such as head-mounted displays (HMD), and wearable devices that can be worn on the head, such as glasses-type AR devices.
  • wearable devices such as wristwatch-type and bracelet-type information terminals (wearable devices), VR devices such as head-mounted displays (HMD), and wearable devices that can be worn on the head, such as glasses-type AR devices.
  • VR devices such as head-mounted displays (HMD)
  • wearable devices that can be worn on the head, such as glasses-type AR devices.
  • the display device of this embodiment can be a high-resolution display device or a large-sized display device. Therefore, the display device of the present embodiment can be used, for example, in electronic devices having a relatively large screen, such as television devices, desktop or notebook personal computers, monitors for computers, digital signage, and large game machines such as pachinko machines, as well as the display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound reproduction devices.
  • electronic devices having a relatively large screen such as television devices, desktop or notebook personal computers, monitors for computers, digital signage, and large game machines such as pachinko machines, as well as the display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound reproduction devices.
  • FIG. 31 shows a perspective view of the display device 200A
  • FIG. 32 shows a cross-sectional view of the display device 200A.
  • the display device 200A has a configuration in which a substrate 152 and a substrate 151 are bonded together.
  • the substrate 152 is indicated by dashed lines.
  • the display device 200A has a display section 162, a connection section 140, a circuit 164, wiring 165, and the like.
  • FIG. 31 shows an example in which an IC 173 and an FPC 172 are mounted on the display device 200A. Therefore, the configuration shown in FIG. 31 can also be said to be a display module including the display device 200A, an IC (integrated circuit), and an FPC.
  • connection part 140 is provided outside the display part 162 .
  • the connection portion 140 can be provided along one side or a plurality of sides of the display portion 162 .
  • the number of connection parts 140 may be singular or plural.
  • FIG. 31 shows an example in which connection portions 140 are provided so as to surround the four sides of the display portion.
  • the connection part 140 the common electrode of the light emitting device and the conductive layer are electrically connected, and a potential can be supplied to the common electrode.
  • a scanning line driving circuit can be used.
  • the wiring 165 has a function of supplying signals and power to the display section 162 and the circuit 164 .
  • the signal and power are input to the wiring 165 from the outside through the FPC 172 or input to the wiring 165 from the IC 173 .
  • FIG. 31 shows an example in which an IC 173 is provided on a substrate 151 by a COG (Chip On Glass) method, a COF (Chip on Film) method, or the like.
  • a COG Chip On Glass
  • COF Chip on Film
  • the IC 173 for example, an IC having a scanning line driver circuit or a signal line driver circuit can be applied.
  • the display device 200A and the display module may be configured without an IC.
  • the IC may be mounted on the FPC by the COF method or the like.
  • FIG. 32 shows an example of a cross section of the display device 200A when part of the area including the FPC 172, part of the circuit 164, part of the display part 162, part of the connection part 140, and part of the area including the end are cut.
  • a display device 200A shown in FIG. 32 has a transistor 201, a transistor 205, a light emitting device 130R, a light emitting device 130G, a light emitting device 130B, and the like between a substrate 151 and a substrate 152.
  • a protective layer 131 is provided on the light emitting device 130R, the light emitting device 130G, and the light emitting device 130B.
  • the protective layer 131 and the substrate 152 are adhered via the adhesive layer 142 .
  • a light shielding layer 117 is provided on the substrate 152 .
  • a solid sealing structure, a hollow sealing structure, or the like can be applied to sealing the light-emitting device.
  • the space between substrates 152 and 151 is filled with an adhesive layer 142 to apply a solid sealing structure.
  • the space may be filled with an inert gas (such as nitrogen or argon) to apply a hollow sealing structure.
  • the adhesive layer 142 may be provided so as not to overlap the light emitting device.
  • the space may be filled with a resin different from the adhesive layer 142 provided in a frame shape.
  • the protective layer 131 is provided at least on the display section 162 and is preferably provided so as to cover the entire display section 162 .
  • the protective layer 131 is preferably provided so as to cover not only the display portion 162 but also the connection portion 140 and the circuit 164 . Moreover, it is preferable that the protective layer 131 is provided up to the end portion of the display device 200A.
  • a connecting portion 204 is provided in a region of the substrate 151 where the substrate 152 does not overlap.
  • the wiring 165 is electrically connected to the FPC 172 via the conductive layer 166 and the connecting layer 242 .
  • the conductive layer 166 can be formed in the same process as the pixel electrodes 111R, 111G, and 111B.
  • the conductive layer 166 is exposed on the upper surface of the connecting portion 204 . Thereby, the connecting portion 204 and the FPC 172 can be electrically connected via the connecting layer 242 .
  • the connecting portion 204 has a portion where the protective layer 131 is not provided in order to electrically connect the FPC 172 and the conductive layer 166 .
  • the conductive layer 166 can be exposed by removing a region of the protective layer 131 overlapping the conductive layer 166 using a mask.
  • a laminated structure of at least one organic layer and a conductive layer may be provided on the conductive layer 166, and the protective layer 131 may be provided on the laminated structure. Then, a laser or a sharp edged tool (for example, a needle or a cutter) is used for the laminated structure to form a separation starting point (a portion that triggers separation), and the laminated structure and the protective layer 131 thereover may be selectively removed to expose the conductive layer 166.
  • the protective layer 131 can be selectively removed by pressing an adhesive roller against the substrate 151 and relatively moving the roller while rotating. Alternatively, an adhesive tape may be attached to the substrate 151 and removed.
  • the adhesion between the organic layer and the conductive layer or the adhesion between the organic layers is low, separation occurs at the interface between the organic layer and the conductive layer or within the organic layer. Accordingly, a region of the protective layer 131 overlapping with the conductive layer 166 can be selectively removed. Note that when an organic layer or the like remains over the conductive layer 166, it can be removed with an organic solvent or the like.
  • the organic layer for example, at least one organic layer (a layer that functions as a light-emitting layer, a carrier block layer, a carrier transport layer, or a carrier injection layer) used for any one of the layers 113B, 113G, and 113R can be used.
  • the organic layer may be formed when any one of the layers 113B, 113G, and 113R is formed, or may be provided separately.
  • the conductive layer can be formed using the same process and the same material as the common electrode 115 .
  • an ITO film is preferably formed as the common electrode 115 and the conductive layer. Note that in the case where the common electrode 115 has a stacked-layer structure, at least one of the layers forming the common electrode 115 is provided as a conductive layer.
  • the upper surface of the conductive layer 166 may be covered with a mask so that the protective layer 131 is not formed on the conductive layer 166 .
  • a mask for example, a metal mask (area metal mask) may be used, or an adhesive or adsorptive tape or film may be used.
  • a region in which the protective layer 131 is not provided in the connecting portion 204 can be formed, and the conductive layer 166 and the FPC 172 can be electrically connected via the connecting layer 242 in this region.
  • a conductive layer 123 is provided on the insulating layer 235 in the connecting portion 140 . The ends of the conductive layer 123 are covered with an insulating layer 237 .
  • a common electrode 115 is provided over the conductive layer 123 . Note that the common layer 114 may be provided over the conductive layer 123 . In this case, conductive layer 123 is electrically connected to common electrode 115 through common layer 114 . Note that, as shown in FIG. 33, a configuration without the common layer 114 may be employed.
  • the display device 200A is of the top emission type. Light emitted by the light emitting device is emitted to the substrate 152 side. A material having high visible light transmittance is preferably used for the substrate 152 .
  • the pixel electrode contains a material that reflects visible light, and the counter electrode (common electrode 115) contains a material that transmits visible light.
  • Both the transistor 201 and the transistor 205 are formed over the substrate 151 . These transistors can be made with the same material and the same process.
  • the transistor described in Embodiment 1 can be preferably used as the transistor 201 and the transistor 205 .
  • the transistor included in the circuit 164 and the transistor included in the display portion 162 may have the same structure or different structures.
  • the plurality of transistors included in the circuit 164 may all have the same structure, or may have two or more types.
  • the structures of the plurality of transistors included in the display portion 162 may all be the same, or may be of two or more types.
  • All of the transistors of the display section 162 may be OS transistors, all of the transistors of the display section 162 may be Si transistors, and some of the transistors of the display section 162 may be OS transistors and the rest may be Si transistors.
  • LTPS transistors and OS transistors in the display portion 162
  • a display device with low power consumption and high driving capability can be realized.
  • a structure in which an LTPS transistor and an OS transistor are combined is sometimes called an LTPO.
  • an OS transistor as a transistor or the like that functions as a switch for controlling conduction/non-conduction between wirings, and use an LTPS transistor as a transistor or the like that controls current.
  • one of the transistors included in the display portion 162 functions as a transistor for controlling the current flowing through the light emitting device and can also be called a driving transistor.
  • One of the source and drain of the driving transistor is electrically connected to the pixel electrode of the light emitting device.
  • An LTPS transistor is preferably used as the driving transistor. This makes it possible to increase the current flowing through the light emitting device in the pixel circuit.
  • the other transistor included in the display unit 162 functions as a switch for controlling selection and non-selection of pixels, and can also be called a selection transistor.
  • the gate of the selection transistor is electrically connected to the gate line, and one of the source and the drain is electrically connected to the source line (signal line).
  • An OS transistor is preferably used as the selection transistor.
  • a light shielding layer 117 is preferably provided on the surface of the substrate 152 on the substrate 151 side.
  • the light shielding layer 117 can be provided between adjacent light emitting devices, the connection portion 140, the circuit 164, and the like. Also, various optical members can be arranged outside the substrate 152 .
  • a material that can be used for the substrate 120 can be applied to each of the substrates 151 and 152 .
  • a material that can be used for the resin layer 122 can be applied to the adhesive layer 142 .
  • connection layer 242 an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like can be used.
  • ACF anisotropic conductive film
  • ACP anisotropic conductive paste
  • Display device 200B A display device 200B shown in FIG. 34 is mainly different from the display device 200A in that it is a bottom emission type display device.
  • the light emitted by the light emitting device is emitted to the substrate 151 side.
  • a material having high visible light transmittance is preferably used for the substrate 151 .
  • the material used for the substrate 152 may or may not be translucent.
  • a light shielding layer 117 is preferably formed between the substrate 151 and the transistor 201 and between the substrate 151 and the transistor 205 .
  • 34 shows an example in which the light-blocking layer 117 is provided over the substrate 151, the insulating layer 153 is provided over the light-blocking layer 117, and the transistors 201 and 205 are provided over the insulating layer 153.
  • FIG. 34 shows an example in which the light-blocking layer 117 is provided over the substrate 151, the insulating layer 153 is provided over the light-blocking layer 117, and the transistors 201 and 205 are provided over the insulating layer 153.
  • the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B each use a material with high transparency to visible light.
  • a material that reflects visible light is preferably used for the common electrode 115 .
  • a configuration without the common layer 114 may be used.
  • Display device 200C A display device 200C shown in FIG. 35 is mainly different from the display device 200A in that a light receiving device 150 is provided.
  • the light receiving device 150 has a pixel electrode 111 S, a layer 113 S, a common layer 114 and a common electrode 115 .
  • Layer 113S has at least an active layer.
  • the pixel electrode 111S can be formed in the same process as the pixel electrodes 111R, 111G, and 111B.
  • the pixel electrode 111S is electrically connected to the conductive layer 112b included in the transistor 205S.
  • An insulating layer 237 covers the edge of the upper surface of the pixel electrode 111S.
  • a layer 113S is provided on the pixel electrode 111S.
  • Layer 113 S may be provided over insulating layer 237 .
  • a common layer 114 is provided over the layer 113 S and the insulating layer 237 , and a common electrode 115 is provided over the common layer 114 .
  • the common layer 114 is a continuous film that is commonly provided for the light receiving device and the light emitting device.
  • a configuration without the common layer 114 may be used.
  • the display device 200C can apply, for example, the pixel layouts shown in FIGS. 30A to 30K.
  • Embodiments 2 and 6 can be referred to.
  • the light-emitting device has an EL layer 763 between a pair of electrodes (lower electrode 761 and upper electrode 762).
  • EL layer 763 can be composed of multiple layers, such as layer 780 , light-emitting layer 771 , and layer 790 .
  • the light-emitting layer 771 has at least a light-emitting substance (also referred to as a light-emitting material).
  • the layer 780 has one or more of a layer containing a highly hole-injecting substance (hole-injecting layer), a layer containing a highly hole-transporting substance (hole-transporting layer), and a layer containing a highly electron-blocking substance (electron-blocking layer).
  • layer 790 includes one or more of a layer containing a substance with high electron-injection properties (electron-injection layer), a layer containing a substance with high electron-transport properties (electron-transporting layer), and a layer containing a substance with high hole-blocking properties (hole-blocking layer).
  • layers 780 and 790 are reversed to each other.
  • a structure having a layer 780, a light-emitting layer 771, and a layer 790 provided between a pair of electrodes can function as a single light-emitting unit, and the structure of FIG. 36A is referred to herein as a single structure.
  • FIG. 36B is a modification of the EL layer 763 included in the light emitting device shown in FIG. 36A.
  • the light-emitting device shown in FIG. 36B has a layer 781 on the bottom electrode 761, a layer 782 on the layer 781, a light-emitting layer 771 on the layer 782, a layer 791 on the light-emitting layer 771, a layer 792 on the layer 791, and a top electrode 762 on the layer 792.
  • the layer 781 can be a hole injection layer
  • the layer 782 can be a hole transport layer
  • the layer 791 can be an electron transport layer
  • the layer 792 can be an electron injection layer
  • the layer 781 can be an electron injection layer
  • the layer 782 can be an electron transport layer
  • the layer 791 can be a hole transport layer
  • the layer 792 can be a hole injection layer.
  • FIGS. 36C and 36D a configuration in which a plurality of light-emitting layers (light-emitting layers 771, 772, and 773) are provided between layers 780 and 790 is also a variation of the single structure.
  • FIGS. 36C and 36D show an example having three light-emitting layers, the number of light-emitting layers in a single-structure light-emitting device may be two or four or more.
  • a single structure light emitting device may also have a buffer layer between the two light emitting layers.
  • the buffer layer for example, a carrier transport layer (a hole transport layer and an electron transport layer) can be used.
  • tandem structure a structure in which a plurality of light-emitting units (light-emitting units 763a and 763b) are connected in series via a charge generation layer 785 (also referred to as an intermediate layer) is herein referred to as a tandem structure.
  • the tandem structure may also be called a stack structure.
  • FIGS. 36D and 36F are examples in which the display device has a layer 764 that overlaps the light emitting device.
  • Figure 36D is an example of layer 764 overlapping the light emitting device shown in Figure 36C
  • Figure 36F is an example of layer 764 overlapping the light emitting device shown in Figure 36E.
  • a conductive film that transmits visible light is used for the upper electrode 762 in order to extract light to the upper electrode 762 side.
  • One or both of a color conversion layer and a color filter (colored layer) can be used for the layer 764 .
  • the light-emitting layers 771, 772, and 773 may be made of light-emitting substances emitting light of the same color, or even the same light-emitting substance.
  • a light-emitting substance that emits blue light may be used for the light-emitting layers 771 , 772 , and 773 .
  • sub-pixels that emit blue light blue light emitted by the light-emitting device can be extracted.
  • a color conversion layer as layer 764 shown in FIG. it is preferable to use both a color conversion layer and a colored layer as the layer 764 .
  • Some of the light emitted by the light emitting device may pass through without being converted by the color conversion layer.
  • the colored layer absorbs light of colors other than the desired color, and the color purity of the light exhibited by the sub-pixels can be increased.
  • a single-structure light-emitting device preferably has a light-emitting layer containing a light-emitting substance that emits blue light and a light-emitting layer containing a light-emitting substance that emits visible light with a longer wavelength than blue.
  • a color filter may be provided as the layer 764 shown in FIG. 36D.
  • a desired color of light can be obtained by passing the white light through the color filter.
  • a light-emitting device with a single structure has three light-emitting layers
  • the stacking order of the light-emitting layers can be R, G, B from the anode side, or R, B, G, etc. from the anode side.
  • a buffer layer may be provided between R and G or B.
  • a light-emitting device with a single structure has two light-emitting layers
  • B blue
  • Y yellow
  • This structure is sometimes called a BY single structure.
  • a light-emitting device that emits white light preferably contains two or more types of light-emitting substances.
  • two kinds of light-emitting substances may be selected so that their respective emission colors are in a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer have a complementary color relationship, it is possible to obtain a light-emitting device that emits white light as a whole.
  • a light-emitting device that emits white light can be obtained by mixing the light emitted from each light-emitting layer.
  • the layer 780 and the layer 790 may each independently have a laminated structure consisting of two or more layers.
  • the light emitting layer 771 and the light emitting layer 772 may be made of a light emitting material that emits light of the same color, or even the same light emitting material.
  • a light-emitting substance that emits blue light may be used for each of the light-emitting layers 771 and 772 .
  • blue light emitted by the light-emitting device can be extracted.
  • by providing a color conversion layer as layer 764 shown in FIG. it is preferable to use both a color conversion layer and a colored layer for the layer 764 .
  • a light-emitting device having the configuration shown in FIG. 36E or FIG. 36F is used for a sub-pixel that emits light of each color
  • different light-emitting substances may be used depending on the sub-pixel.
  • a light-emitting substance that emits red light may be used for each of the light-emitting layers 771 and 772 .
  • a light-emitting substance that emits green light may be used for each of the light-emitting layers 771 and 772 .
  • a light-emitting substance that emits blue light may be used for each of the light-emitting layers 771 and 772 . It can be said that the display device having such a configuration employs a tandem structure light emitting device and has an SBS structure. Therefore, it is possible to have both the merit of the tandem structure and the merit of the SBS structure. As a result, a highly reliable light-emitting device capable of emitting light with high brightness can be realized.
  • light-emitting substances with different emission colors may be used for the light-emitting layers 771 and 772 .
  • the emission color of the light-emitting layer 771 and the emission color of the light-emitting layer 772 are complementary colors, white light emission is obtained.
  • a color filter may be provided as layer 764 shown in FIG. 36F. A desired color of light can be obtained by passing the white light through the color filter.
  • FIGS. 36E and 36F show an example in which the light-emitting unit 763a has one light-emitting layer 771 and the light-emitting unit 763b has one light-emitting layer 772, but the present invention is not limited to this.
  • Each of the light-emitting unit 763a and the light-emitting unit 763b may have two or more light-emitting layers.
  • FIGS. 36E and 36F exemplify a light-emitting device having two light-emitting units
  • a light emitting device may have three or more light emitting units.
  • a structure having two light-emitting units may be called a two-stage tandem structure, and a structure having three light-emitting units may be called a three-stage tandem structure.
  • light-emitting unit 763a has layers 780a, 771 and 790a
  • light-emitting unit 763b has layers 780b, 772 and 790b.
  • layers 780a and 780b each have one or more of a hole injection layer, a hole transport layer, and an electron blocking layer.
  • layers 790a and 790b each include one or more of an electron injection layer, an electron transport layer, and a hole blocking layer. If the bottom electrode 761 is the cathode and the top electrode 762 is the anode, then layers 780a and 790a would have the opposite arrangement, and layers 780b and 790b would also have the opposite arrangement.
  • layer 780a may have a hole-injection layer, a hole-transport layer over the hole-injection layer, and an electron-blocking layer over the hole-transport layer.
  • Layer 790a also has an electron-transporting layer and may also have a hole-blocking layer between the light-emitting layer 771 and the electron-transporting layer.
  • Layer 780b also has a hole transport layer and may also have an electron blocking layer on the hole transport layer.
  • Layer 790b also has an electron-transporting layer, an electron-injecting layer on the electron-transporting layer, and may also have a hole-blocking layer between the light-emitting layer 772 and the electron-transporting layer.
  • layer 780a may have an electron injection layer, an electron transport layer over the electron injection layer, and a hole blocking layer over the electron transport layer.
  • Layer 790a also has a hole-transporting layer and may also have an electron-blocking layer between the light-emitting layer 771 and the hole-transporting layer.
  • Layer 780b also has an electron-transporting layer and may also have a hole-blocking layer on the electron-transporting layer.
  • Layer 790b also has a hole-transporting layer, a hole-injecting layer on the hole-transporting layer, and may also have an electron-blocking layer between the light-emitting layer 772 and the hole-transporting layer.
  • two light-emitting units are stacked with the charge generation layer 785 interposed therebetween.
  • Charge generation layer 785 has at least a charge generation region.
  • the charge-generating layer 785 has a function of injecting electrons into one of the two light-emitting units and holes into the other when a voltage is applied between the pair of electrodes.
  • An example of a tandem-structured light-emitting device includes the configurations shown in FIGS. 37A to 37C.
  • FIG. 37A shows a configuration having three light emitting units.
  • a plurality of light-emitting units (light-emitting unit 763a, light-emitting unit 763b, and light-emitting unit 763c) are connected in series via charge generation layers 785, respectively.
  • Light-emitting unit 763a includes layers 780a, 771, and 790a
  • light-emitting unit 763b includes layers 780b, 772, and 790b
  • light-emitting unit 763c includes layers 780c, 773, and 790c. Note that a structure applicable to the layers 780a and 780b can be used for the layer 780c, and a structure applicable to the layers 790a and 790b can be used for the layer 790c.
  • light-emitting layers 771, 772, and 773 preferably have light-emitting substances that emit light of the same color.
  • the light-emitting layers 771, 772, and 773 each include a red (R) light-emitting substance (a so-called R ⁇ R ⁇ R three-stage tandem structure)
  • the light-emitting layers 771, 772, and 773 each include a green (G) light-emitting substance (a so-called G ⁇ G ⁇ G three-stage tandem structure)
  • the light-emitting layers 771, 772, and 773 each include a blue ( B) a structure having a light-emitting substance (a so-called three-stage tandem structure of B ⁇ B ⁇ B) can be employed.
  • a ⁇ b means that a light-emitting unit having a light-emitting substance that emits light a is provided with a light-emitting unit having a light-emitting substance that emits light b through a charge generation layer, and a and b represent colors.
  • light-emitting substances with different emission colors may be used for part or all of the light-emitting layers 771, 772, and 773.
  • Combinations of the emission colors of the light-emitting layer 771, the light-emitting layer 772, and the light-emitting layer 773 include, for example, two of which are blue (B) and the remaining one is yellow (Y), and one of which is red (R), the other one is green (G), and the remaining one is blue (B).
  • the luminescent substances that emit light of the same color are not limited to the above configurations.
  • a tandem light-emitting device in which light-emitting units having a plurality of light-emitting layers are stacked may be used.
  • FIG. 37B shows a configuration in which two light-emitting units (light-emitting unit 763 a and light-emitting unit 763 b ) are connected in series via a charge generation layer 785 .
  • the light-emitting unit 763a includes a layer 780a, a light-emitting layer 771a, a light-emitting layer 771b, a light-emitting layer 771c, and a layer 790a
  • the light-emitting unit 763b includes a layer 780b, a light-emitting layer 772a, a light-emitting layer 772b, a light-emitting layer 772c, and a layer 790b.
  • the luminescent material can be selected so that the light emitted from the light-emitting layer 771a, the light-emitting layer 771b, and the light-emitting layer 771c are mixed so that the light-emitting unit 763a emits white light (W).
  • light-emitting substances can be selected so that the light emitted from each layer is mixed so that the light-emitting unit 763b emits white light (W). That is, the configuration shown in FIG. 37B is a two-stage tandem structure of W ⁇ W.
  • stacking order of the light-emitting substances there is no particular limitation on the stacking order of the light-emitting substances. A practitioner can appropriately select the optimum stacking order. Although not shown, a three-stage tandem structure of W ⁇ W ⁇ W or a tandem structure of four or more stages may be employed.
  • a two-stage tandem structure of B ⁇ Y or Y ⁇ B having a light-emitting unit that emits yellow (Y) light and a light-emitting unit that emits blue (B) light; ) light-emitting unit and blue (B) light-emitting unit in this order, B ⁇ YG ⁇ B three-step tandem structure including in this order a light-emitting unit that emits blue (B) light, a yellow-green (YG) light-emitting unit, and a blue (B) light-emitting unit, a blue (B) light-emitting light-emitting unit, and a green (G) light-emitting unit.
  • a ⁇ b means that one light-emitting unit includes a light-emitting substance that emits light a and a light-emitting substance that emits light b.
  • a light-emitting unit having one light-emitting layer and a light-emitting unit having multiple light-emitting layers may be combined.
  • a plurality of light-emitting units (light-emitting unit 763a, light-emitting unit 763b, and light-emitting unit 763c) are connected in series via charge generation layers 785, respectively.
  • the light-emitting unit 763a includes layers 780a, 771, and 790a;
  • the light-emitting unit 763b includes layers 780b, 772a, 772b, 772c, and 790b;
  • the light-emitting unit 763c includes layers 780c, 773, and 790c.
  • a three-stage tandem structure of B ⁇ R, G, YG ⁇ B can be applied, in which the light emitting unit 763a is a light emitting unit that emits blue (B) light, the light emitting unit 763b is a light emitting unit that emits red (R), green (G), and yellowish green (YG) light, and the light emitting unit 763c is a light emitting unit that emits blue (B) light.
  • the light emitting unit 763a is a light emitting unit that emits blue (B) light
  • the light emitting unit 763b is a light emitting unit that emits red (R), green (G), and yellowish green (YG) light
  • the light emitting unit 763c is a light emitting unit that emits blue (B) light.
  • the order of the number of stacked layers and colors of the light-emitting units includes, from the anode side, a two-level structure of B and Y, a two-level structure of B and the light-emitting unit X, a three-level structure of B, Y, and B, and a three-level structure of B, X, and B.
  • a three-layer structure or the like can be employed.
  • another layer may be provided between the two light-emitting layers.
  • a conductive film that transmits visible light is used for the electrode on the light extraction side of the lower electrode 761 and the upper electrode 762 .
  • a conductive film that reflects visible light is preferably used for the electrode on the side from which light is not extracted.
  • the display device has a light emitting device that emits infrared light, it is preferable to use a conductive film that transmits visible light and infrared light for the electrode on the side from which light is extracted, and use a conductive film that reflects visible light and infrared light for the electrode on the side that does not extract light.
  • a conductive film that transmits visible light may also be used for the electrode on the side that does not take out light.
  • the electrode is preferably placed between the reflective layer and the EL layer 763 . That is, the light emitted from the EL layer 763 may be reflected by the reflective layer and extracted from the display device.
  • Metals, alloys, electrically conductive compounds, mixtures thereof, and the like can be appropriately used as materials for forming the pair of electrodes of the light-emitting device.
  • Specific examples of such materials include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, and alloys containing appropriate combinations thereof.
  • Examples of the material include indium tin oxide (also referred to as In—Sn oxide, ITO), In—Si—Sn oxide (also referred to as ITSO), indium zinc oxide (In—Zn oxide), In—W—Zn oxide, and the like.
  • Examples of such materials include alloys containing aluminum (aluminum alloys) such as alloys of aluminum, nickel, and lanthanum (Al-Ni-La), alloys of silver and magnesium, and alloys containing silver such as alloys of silver, palladium and copper (APC).
  • elements belonging to Group 1 or Group 2 of the periodic table of elements not exemplified above e.g., lithium, cesium, calcium, strontium
  • europium e.g., europium
  • rare earth metals e.g., ytterbium
  • alloys containing these in appropriate combinations, graphene, and the like e.g., graphene, graphene, and the like.
  • a micro optical resonator (microcavity) structure is preferably applied to the light emitting device. Therefore, one of the pair of electrodes included in the light-emitting device is preferably an electrode (semi-transmissive/semi-reflective electrode) that is transparent and reflective to visible light, and the other is an electrode (reflective electrode) that is reflective to visible light. Since the light-emitting device has a microcavity structure, the light emitted from the light-emitting layer can be resonated between both electrodes, and the light emitted from the light-emitting device can be enhanced.
  • the light transmittance of the transparent electrode is set to 40% or more.
  • an electrode having a transmittance of 40% or more for visible light (light having a wavelength of 400 nm or more and less than 750 nm) as the transparent electrode of the light emitting device.
  • the visible light reflectance of the semi-transmissive/semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less.
  • the visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less.
  • the resistivity of these electrodes is preferably 1 ⁇ 10 ⁇ 2 ⁇ cm or less.
  • a light-emitting device has at least a light-emitting layer.
  • the light-emitting device may further have a layer containing a highly hole-injecting substance, a highly hole-transporting substance, a hole-blocking material, a highly electron-transporting substance, an electron-blocking material, a highly electron-injecting substance, or a bipolar substance (a substance with high electron-transporting and hole-transporting properties) as a layer other than the light-emitting layer.
  • the light-emitting device may have one or more layers selected from a hole-injection layer, a hole-transport layer, a hole-blocking layer, a charge-generating layer, an electron-blocking layer, an electron-transporting layer, and an electron-injecting layer, in addition to the light-emitting layer.
  • Both low-molecular-weight compounds and high-molecular-weight compounds can be used in the light-emitting device, and inorganic compounds may be included.
  • Each of the layers constituting the light-emitting device can be formed by a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, a coating method, or the like.
  • the luminescent layer has one or more luminescent substances.
  • a substance that emits light such as blue, purple, blue-violet, green, yellow-green, yellow, orange, or red is used as appropriate.
  • a substance that emits near-infrared light can be used as the light-emitting substance.
  • Examples of light-emitting substances include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.
  • fluorescent materials include pyrene derivatives, anthracene derivatives, triphenylene derivatives, fluorene derivatives, carbazole derivatives, dibenzothiophene derivatives, dibenzofuran derivatives, dibenzoquinoxaline derivatives, quinoxaline derivatives, pyridine derivatives, pyrimidine derivatives, phenanthrene derivatives, and naphthalene derivatives.
  • Examples of phosphorescent materials include organometallic complexes (particularly iridium complexes) having a 4H-triazole skeleton, 1H-triazole skeleton, imidazole skeleton, pyrimidine skeleton, pyrazine skeleton, or pyridine skeleton, organometallic complexes (particularly iridium complexes) having a phenylpyridine derivative having an electron-withdrawing group as a ligand, platinum complexes, and rare earth metal complexes.
  • organometallic complexes particularly iridium complexes having a 4H-triazole skeleton, 1H-triazole skeleton, imidazole skeleton, pyrimidine skeleton, pyrazine skeleton, or pyridine skeleton
  • organometallic complexes (particularly iridium complexes) having a phenylpyridine derivative having an electron-withdrawing group as a ligand platinum complexe
  • the light-emitting layer may contain one or more organic compounds (host material, assist material, etc.) in addition to the light-emitting substance (guest material).
  • One or both of a highly hole-transporting substance (hole-transporting material) and a highly electron-transporting substance (electron-transporting material) can be used as the one or more organic compounds.
  • a highly hole-transporting substance hole-transporting material
  • a highly electron-transporting substance electron-transporting material
  • the electron-transporting material a substance having a high electron-transporting property that can be used for the electron-transporting layer, which will be described later, can be used.
  • Bipolar materials or TADF materials may also be used as one or more organic compounds.
  • the light-emitting layer preferably includes, for example, a phosphorescent material and a combination of a hole-transporting material and an electron-transporting material that easily form an exciplex.
  • ExTET Exciplex-Triplet Energy Transfer
  • a combination that forms an exciplex that emits light that overlaps with the wavelength of the absorption band on the lowest energy side of the light-emitting substance energy transfer becomes smooth and light emission can be efficiently obtained. With this configuration, high efficiency, low-voltage driving, and long life of the light-emitting device can be realized at the same time.
  • the hole-injecting layer is a layer that injects holes from the anode to the hole-transporting layer, and contains a substance with high hole-injecting properties.
  • Substances with high hole-injection properties include aromatic amine compounds and composite materials containing a hole-transporting material and an acceptor material (electron-accepting material).
  • the hole-transporting material a substance having a high hole-transporting property that can be used for the hole-transporting layer, which will be described later, can be used.
  • oxides of metals belonging to groups 4 to 8 in the periodic table can be used.
  • Specific examples include molybdenum oxide, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, tungsten oxide, manganese oxide, and rhenium oxide.
  • molybdenum oxide is particularly preferred because it is stable even in the atmosphere, has low hygroscopicity, and is easy to handle.
  • An organic acceptor material containing fluorine can also be used.
  • Organic acceptor materials such as quinodimethane derivatives, chloranil derivatives, and hexaazatriphenylene derivatives can also be used.
  • a material containing a hole-transporting material and a metal oxide (typically molybdenum oxide) belonging to Groups 4 to 8 in the above-described periodic table may be used.
  • the hole-transporting layer is a layer that transports holes injected from the anode to the light-emitting layer by means of the hole-injecting layer.
  • a hole-transporting layer is a layer containing a hole-transporting material.
  • the hole-transporting material is preferably a substance having a hole mobility of 1 ⁇ 10 ⁇ 6 cm 2 /Vs or more. Note that substances other than these can be used as long as they have a higher hole-transport property than electron-transport property.
  • the hole-transporting material is preferably a substance having a high hole-transporting property such as a ⁇ -electron-rich heteroaromatic compound (e.g., carbazole derivative, thiophene derivative, furan derivative, etc.), aromatic amine (compound having an aromatic amine skeleton), or the like.
  • a ⁇ -electron-rich heteroaromatic compound e.g., carbazole derivative, thiophene derivative, furan derivative, etc.
  • aromatic amine compound having an aromatic amine skeleton
  • the electron blocking layer is provided in contact with the light emitting layer.
  • the electron blocking layer is a layer containing a material capable of transporting holes and blocking electrons.
  • a material having an electron blocking property can be used among the above hole-transporting materials.
  • the electron blocking layer has hole transport properties, it can also be called a hole transport layer. Moreover, the layer which has electron blocking property can also be called an electron blocking layer among hole transport layers.
  • the electron-transporting layer is a layer that transports electrons injected from the cathode to the light-emitting layer by the electron-injecting layer.
  • the electron-transporting layer is a layer containing an electron-transporting material.
  • the electron-transporting material is preferably a substance having an electron mobility of 1 ⁇ 10 ⁇ 6 cm 2 /Vs or more. Note that substances other than these substances can be used as long as they have a higher electron-transport property than hole-transport property.
  • Electron-transporting materials include metal complexes having a quinoline skeleton, metal complexes having a benzoquinoline skeleton, metal complexes having an oxazole skeleton, metal complexes having a thiazole skeleton, oxadiazole derivatives, triazole derivatives, imidazole derivatives, oxazole derivatives, thiazole derivatives, phenanthroline derivatives, quinoline derivatives having a quinoline ligand, benzoquinoline derivatives, quinoxaline derivatives, dibenzoquinoxaline derivatives, pyridine derivatives, bipyridine derivatives, and pyrimidines.
  • a substance having a high electron-transport property such as a derivative or a ⁇ -electron-deficient heteroaromatic compound including a nitrogen-containing heteroaromatic compound can be used.
  • the hole blocking layer is provided in contact with the light emitting layer.
  • the hole-blocking layer is a layer containing a material that has electron-transport properties and can block holes. Among the above electron-transporting materials, materials having hole-blocking properties can be used for the hole-blocking layer.
  • the hole-blocking layer can also be called an electron-transporting layer because it has electron-transporting properties. Moreover, among the electron transport layers, a layer having hole blocking properties can also be referred to as a hole blocking layer.
  • the electron injection layer is a layer that injects electrons from the cathode to the electron transport layer, and is a layer that contains a substance with high electron injection properties.
  • Alkali metals, alkaline earth metals, or compounds thereof can be used as the substance with a high electron-injecting property.
  • a composite material containing an electron-transporting material and a donor material (electron-donating material) can also be used as the substance with high electron-injecting properties.
  • the lowest unoccupied molecular orbital (LUMO) level of a substance with high electron injection properties has a small difference (specifically, 0.5 eV or less) from the value of the work function of the material used for the cathode.
  • the electron injection layer may have a laminated structure of two or more layers.
  • the laminated structure include a structure in which lithium fluoride is used for the first layer and ytterbium is provided for the second layer.
  • the electron injection layer may have an electron-transporting material.
  • a compound having a lone pair of electrons and an electron-deficient heteroaromatic ring can be used as the electron-transporting material.
  • a compound having at least one of a pyridine ring, diazine ring (pyrimidine ring, pyrazine ring, pyridazine ring), and triazine ring can be used.
  • the LUMO level of the organic compound having a lone pair of electrons is preferably -3.6 eV or more and -2.3 eV or less.
  • CV cyclic voltammetry
  • photoelectron spectroscopy optical absorption spectroscopy
  • inverse photoelectron spectroscopy etc. can be used to estimate the highest occupied molecular orbital (HOMO) level and LUMO level of an organic compound.
  • BPhen 4,7-diphenyl-1,10-phenanthroline
  • NBPhen 2,9-di(naphthalen-2-yl)-4,7-diphenyl-1,10-phenanthroline
  • HATNA diquinoxalino[2,3-a:2',3'-c]phenazine
  • TmPPPyTz 2,4,6-tris[3'-(pyridine -3-yl)biphenyl-3-yl]-1,3,5-triazine
  • TmPPPyTz 2,4,6-tris[3'-(pyridine -3-yl)biphenyl-3-yl]-1,3,5-triazine
  • TmPPPyTz 2,4,6-tris[3'-(pyridine -3-yl)biphenyl-3-yl]-1,3,5-triazine
  • TmPPPyTz 2,4,6-tris[3'-(pyridine -3-yl)bi
  • the charge generation layer has at least a charge generation region as described above.
  • the charge generation region preferably contains an acceptor material, for example, preferably contains a hole transport material and an acceptor material applicable to the hole injection layer described above.
  • the charge generation layer preferably has a layer containing a substance with high electron injection properties. This layer can also be called an electron injection buffer layer.
  • the electron injection buffer layer is preferably provided between the charge generation region and the electron transport layer. Since the injection barrier between the charge generation region and the electron transport layer can be relaxed by providing the electron injection buffer layer, electrons generated in the charge generation region can be easily injected into the electron transport layer.
  • the electron injection buffer layer preferably contains an alkali metal or an alkaline earth metal, and can be configured to contain, for example, an alkali metal compound or an alkaline earth metal compound.
  • the electron injection buffer layer preferably contains an inorganic compound containing an alkali metal and oxygen, or an inorganic compound containing an alkaline earth metal and oxygen, and more preferably contains an inorganic compound containing lithium and oxygen (such as lithium oxide ( Li O)).
  • the above materials applicable to the electron injection layer can be preferably used.
  • the charge generation layer preferably has a layer containing a substance with high electron transport properties. Such layers may also be referred to as electron relay layers.
  • the electron relay layer is preferably provided between the charge generation region and the electron injection buffer layer. If the charge generation layer does not have an electron injection buffer layer, the electron relay layer is preferably provided between the charge generation region and the electron transport layer.
  • the electron relay layer has a function of smoothly transferring electrons by preventing interaction between the charge generation region and the electron injection buffer layer (or electron transport layer).
  • a phthalocyanine-based material such as copper (II) phthalocyanine (abbreviation: CuPc), or a metal complex having a metal-oxygen bond and an aromatic ligand.
  • charge generation region the electron injection buffer layer, and the electron relay layer described above may not be clearly distinguishable depending on their cross-sectional shape or characteristics.
  • the charge generation layer may have a donor material instead of the acceptor material.
  • the charge-generating layer may have a layer containing an electron-transporting material and a donor material, which are applicable to the electron-injecting layer described above.
  • the light receiving device has a layer 765 between a pair of electrodes (lower electrode 761 and upper electrode 762).
  • Layer 765 has at least one active layer and may have other layers.
  • FIG. 38B is a modification of the layer 765 included in the light receiving device shown in FIG. 38A. Specifically, the light receiving device shown in FIG. 38B has a layer 766 over the bottom electrode 761 , an active layer 767 over the layer 766 , a layer 768 over the active layer 767 and a top electrode 762 over the layer 768 .
  • the active layer 767 functions as a photoelectric conversion layer.
  • the layer 766 has one or both of a hole transport layer and an electron blocking layer.
  • Layer 768 also includes one or both of an electron-transporting layer and a hole-blocking layer.
  • Both low-molecular-weight compounds and high-molecular-weight compounds can be used in the light-receiving device, and inorganic compounds may be included.
  • the layers constituting the light-receiving device can be formed by methods such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, and a coating method.
  • the active layer of the light receiving device contains a semiconductor.
  • the semiconductor include inorganic semiconductors such as silicon and organic semiconductors including organic compounds.
  • an organic semiconductor is used as the semiconductor included in the active layer.
  • the light-emitting layer and the active layer can be formed by the same method (for example, a vacuum deposition method), and a manufacturing apparatus can be shared, which is preferable.
  • Electron-accepting organic semiconductor materials such as fullerenes (eg, C 60 , C 70 , etc.) and fullerene derivatives are examples of the n-type semiconductor material of the active layer.
  • fullerene derivatives include [6,6]-Phenyl- C71 -butyric acid methyl ester (abbreviation: PC70BM), [6,6]-Phenyl- C61 -butyric acid methyl ester (abbreviation: PC60BM), 1′,1′′,4′,4′′-Tetrahyd ro-di[1,4]methanonaphthaleno[1,2:2′,3′,56,60:2′′,3′′][5,6]fullerene-C 60 (abbreviation: ICBA) and the like.
  • PC70BM [6,6]-Phenyl- C71 -butyric acid methyl ester
  • PC60BM [6,6]-Phenyl- C61 -butyric
  • n-type semiconductor materials include perylenetetracarboxylic acid derivatives such as N,N'-dimethyl-3,4,9,10-perylenetetracarboxylic diimide (abbreviation: Me-PTCDI), and 2,2'-(5,5'-(thieno[3,2-b]thiophene-2,5-diyl)bis(thiophene-5,2-diyl))bis(methane-1-yl-1-ylidene)dimalononitrile (abbreviation: FT2TDMN).
  • Me-PTCDI N,N'-dimethyl-3,4,9,10-perylenetetracarboxylic diimide
  • FT2TDMN 2,2'-(5,5'-(thieno[3,2-b]thiophene-2,5-diyl)bis(thiophene-5,2-diyl)bis(methane-1-yl-1-ylidene)dimalonon
  • Materials for n-type semiconductors include metal complexes having a quinoline skeleton, metal complexes having a benzoquinoline skeleton, metal complexes having an oxazole skeleton, metal complexes having a thiazole skeleton, oxadiazole derivatives, triazole derivatives, imidazole derivatives, oxazole derivatives, thiazole derivatives, phenanthroline derivatives, quinoline derivatives, benzoquinoline derivatives, quinoxaline derivatives, dibenzoquinoxaline derivatives, pyridine derivatives, bipyridine derivatives, pyrimidine derivatives, naphthalene derivatives, Examples include anthracene derivatives, coumarin derivatives, rhodamine derivatives, triazine derivatives, and quinone derivatives.
  • CuPc copper (II) phthalocyanine (CuPc), tetraphenyldibenzoperiflanthene (DBP), zinc phthalocyanine (ZnPc), tin phthalocyanine (SnPc), quinacridone , and electron-donating organic semiconductor materials such as rubrene.
  • DBP tetraphenyldibenzoperiflanthene
  • ZnPc zinc phthalocyanine
  • SnPc tin phthalocyanine
  • quinacridone quinacridone
  • electron-donating organic semiconductor materials such as rubrene.
  • Examples of p-type semiconductor materials include carbazole derivatives, thiophene derivatives, furan derivatives, and compounds having an aromatic amine skeleton. Furthermore, as p-type semiconductor materials, naphthalene derivatives, anthracene derivatives, pyrene derivatives, triphenylene derivatives, fluorene derivatives, pyrrole derivatives, benzofuran derivatives, benzothiophene derivatives, indole derivatives, dibenzofuran derivatives, dibenzothiophene derivatives, indolocarbazole derivatives, porphyrin derivatives, phthalocyanine derivatives, naphthalocyanine derivatives, quinacridone derivatives, rubrene derivatives, tetracene derivatives, polyphenylenevinylene derivatives, polyparaphenylene derivatives, polyfluorene derivatives, polyvinylcarbazole derivatives, polythiophene derivatives, and the like.
  • the HOMO level of the electron-donating organic semiconductor material is preferably shallower (higher) than the HOMO level of the electron-accepting organic semiconductor material.
  • the LUMO level of the electron-donating organic semiconductor material is preferably shallower (higher) than the LUMO level of the electron-accepting organic semiconductor material.
  • a spherical fullerene as the electron-accepting organic semiconductor material, and use an organic semiconductor material with a shape close to a plane as the electron-donating organic semiconductor material. Molecules with similar shapes tend to gather together, and when molecules of the same type aggregate, the energy levels of the molecular orbitals are close to each other, so the carrier transportability can be enhanced.
  • the active layer is preferably formed by co-depositing an n-type semiconductor and a p-type semiconductor.
  • the active layer may be formed by laminating an n-type semiconductor and a p-type semiconductor.
  • Three or more materials may be used for the active layer.
  • a third material may be used in addition to the n-type semiconductor material and the p-type semiconductor material.
  • the third material may be a low-molecular compound or a high-molecular compound.
  • the light-receiving device may further have a layer containing a highly hole-transporting substance, a highly electron-transporting substance, or a bipolar substance (a substance with high electron-transporting and hole-transporting properties) as a layer other than the active layer.
  • the layer is not limited to the above, and may further include a layer containing a highly hole-injecting substance, a hole-blocking material, a highly electron-injecting substance, an electron-blocking material, or the like.
  • materials that can be used in the above-described light-emitting device can be used.
  • polymer compounds such as poly(3,4-ethylenedioxythiophene)/polystyrene sulfonic acid (abbreviation: PEDOT/PSS), and inorganic compounds such as molybdenum oxide and copper iodide (CuI) can be used.
  • Inorganic compounds such as zinc oxide (ZnO) and organic compounds such as polyethyleneimine ethoxylate (PEIE) can be used as the electron-transporting material or the hole-blocking material.
  • the light receiving device may have, for example, a mixed film of PEIE and ZnO.
  • Display device having photodetection function In the display device of one embodiment of the present invention, light-emitting devices are arranged in matrix in the display portion, and an image can be displayed on the display portion. Further, light receiving devices are arranged in a matrix in the display section, and the display section has one or both of an imaging function and a sensing function in addition to an image display function.
  • the display part can be used for an image sensor or a touch sensor. That is, by detecting light on the display portion, an image can be captured, or proximity or contact of an object (a finger, hand, pen, or the like) can be detected.
  • the display device of one embodiment of the present invention can use a light-emitting device as a light source of a sensor.
  • the light-receiving device can detect the reflected light (or scattered light). Therefore, imaging or touch detection is possible even in a dark place.
  • a display device of one embodiment of the present invention includes a light-emitting device and a light-receiving device in a pixel.
  • a display device of one embodiment of the present invention uses an organic EL device as a light-emitting device and an organic photodiode as a light-receiving device.
  • An organic EL device and an organic photodiode can be formed on the same substrate. Therefore, an organic photodiode can be incorporated in a display device using an organic EL device.
  • a display device having a light-emitting device and a light-receiving device in a pixel, since the pixel has a light-receiving function, it is possible to detect contact or proximity of an object while displaying an image. For example, not only can an image be displayed by all the sub-pixels of the display device, but also some sub-pixels can emit light as a light source and the remaining sub-pixels can be used to display an image.
  • the display device can capture an image using the light receiving device.
  • the display device of this embodiment can be used as a scanner.
  • an image sensor can be used to capture images for personal authentication using fingerprints, palm prints, irises, pulse shapes (including vein shapes and artery shapes), or faces.
  • an image sensor can be used to capture an image around the eye, the surface of the eye, or the inside of the eye (such as the fundus) of the user of the wearable device. Therefore, the wearable device can have a function of detecting any one or more selected from the user's blink, black eye movement, and eyelid movement.
  • the light-receiving device can be used as a touch sensor (also called a direct touch sensor) or a near-touch sensor (also called a hover sensor, hover touch sensor, non-contact sensor, or touchless sensor).
  • a touch sensor also called a direct touch sensor
  • a near-touch sensor also called a hover sensor, hover touch sensor, non-contact sensor, or touchless sensor.
  • the touch sensor or near-touch sensor can detect the proximity or contact of an object (finger, hand, pen, etc.).
  • a touch sensor can detect an object by bringing the display device into direct contact with the object.
  • the near-touch sensor can detect the object even if the object does not touch the display device.
  • the display device can detect the object when the distance between the display device and the object is 0.1 mm or more and 300 mm or less, preferably 3 mm or more and 50 mm or less.
  • the display device can be operated without direct contact with the object, in other words, the display device can be operated without contact.
  • the risk of staining or scratching the display device can be reduced, or the display device can be operated without the object directly touching the stain (for example, dust or virus) attached to the display device.
  • a display device of one embodiment of the present invention can have a variable refresh rate.
  • the power consumption can be reduced by adjusting the refresh rate (for example, in the range of 1 Hz to 240 Hz) according to the content displayed on the display device.
  • the drive frequency of the touch sensor or the near-touch sensor may be changed according to the refresh rate. For example, when the refresh rate of the display device is 120 Hz, the driving frequency of the touch sensor or the near-touch sensor can be higher than 120 Hz (typically 240 Hz). With this structure, low power consumption can be achieved and the response speed of the touch sensor or the near touch sensor can be increased.
  • a display device 200 shown in FIGS. 38C to 38E has a layer 353 having a light receiving device, a functional layer 355, and a layer 357 having a light emitting device between a substrate 351 and a substrate 359.
  • FIG. 38C to 38E has a layer 353 having a light receiving device, a functional layer 355, and a layer 357 having a light emitting device between a substrate 351 and a substrate 359.
  • the functional layer 355 has a circuit for driving the light receiving device and a circuit for driving the light emitting device.
  • One or more of switches, transistors, capacitors, resistors, wirings, terminals, and the like can be provided in the functional layer 355 . Note that in the case of driving the light-emitting device and the light-receiving device by a passive matrix method, a structure in which the switch and the transistor are not provided may be employed.
  • the finger 352 touching the display device 200 reflects the light emitted by the light-emitting device in the layer 357 having the light-emitting device, and the light-receiving device in the layer 353 having the light-receiving device detects the reflected light. Thereby, it is possible to detect that the finger 352 touches the display device 200 .
  • FIGS. 38D and 38E it may have a function of detecting or imaging an object that is close to (not in contact with) the display device.
  • FIG. 38D shows an example of detecting a human finger
  • FIG. 38E shows an example of detecting information (number of blinks, eye movement, eyelid movement, etc.) around, on the surface of, or inside the human eye.
  • An electronic device of this embodiment includes the display device of one embodiment of the present invention in a display portion.
  • the display device of one embodiment of the present invention can easily have high definition and high resolution. Therefore, it can be used for display portions of various electronic devices.
  • Examples of electronic devices include, for example, television devices, desktop or notebook personal computers, monitors for computers, digital signage, electronic devices with relatively large screens such as large game machines such as pachinko machines, digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, sound reproduction devices, and the like.
  • large game machines such as pachinko machines, digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, sound reproduction devices, and the like.
  • the display device of one embodiment of the present invention can have high definition, it can be suitably used for an electronic device having a relatively small display portion.
  • electronic devices include wristwatch-type and bracelet-type information terminals (wearable devices), devices for VR such as head-mounted displays, devices for glasses-type AR, and devices for MR.
  • the display device of one embodiment of the present invention preferably has extremely high resolutions such as HD (1280 ⁇ 720 pixels), FHD (1920 ⁇ 1080 pixels), WQHD (2560 ⁇ 1440 pixels), WQXGA (2560 ⁇ 1600 pixels), 4K (3840 ⁇ 2160 pixels), and 8K (7680 ⁇ 4320 pixels). In particular, it is preferable to set the resolution to 4K, 8K, or higher.
  • the pixel density (definition) of the display device of one embodiment of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, more preferably 1000 ppi or more, more preferably 2000 ppi or more, more preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 7000 ppi or more.
  • the display device can support various screen ratios such as 1:1 (square), 4:3, 16:9, 16:10.
  • the electronic device of the present embodiment may have a sensor (including a function of detecting, detecting, or measuring force, displacement, position, speed, acceleration, angular velocity, number of revolutions, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, smell, or infrared rays).
  • a sensor including a function of detecting, detecting, or measuring force, displacement, position, speed, acceleration, angular velocity, number of revolutions, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, smell, or infrared rays).
  • the electronic device of this embodiment can have various functions. For example, it can have a function of displaying various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a calendar, a function of displaying the date or time, a function of executing various software (programs), a wireless communication function, a function of reading programs or data recorded on a recording medium, and the like.
  • FIGS. 39A to 39D An example of a wearable device that can be worn on the head will be described with reference to FIGS. 39A to 39D.
  • These wearable devices have at least one of a function of displaying AR content, a function of displaying VR content, a function of displaying SR content, and a function of displaying MR content.
  • the electronic device has a function of displaying at least one content such as AR, VR, SR, and MR, it is possible to enhance the immersive feeling of the user.
  • the electronic device 700A shown in FIG. 39A and the electronic device 700B shown in FIG. 39B each include a pair of display panels 751, a pair of housings 721, a communication section (not shown), a pair of mounting sections 723, a control section (not shown), an imaging section (not shown), a pair of optical members 753, a frame 757, and a pair of nose pads 758.
  • the display device of one embodiment of the present invention can be applied to the display panel 751 . Therefore, the electronic device can display images with extremely high definition.
  • the electronic device 700A and the electronic device 700B can each project an image displayed on the display panel 751 onto the display area 756 of the optical member 753. Since the optical member 753 has translucency, the user can see the image displayed in the display area superimposed on the transmitted image visually recognized through the optical member 753 . Therefore, the electronic device 700A and the electronic device 700B are electronic devices capable of AR display.
  • the electronic device 700A and the electronic device 700B may be provided with a camera capable of capturing an image in front as an imaging unit. Further, the electronic devices 700A and 700B each include an acceleration sensor such as a gyro sensor, thereby detecting the orientation of the user's head and displaying an image corresponding to the orientation in the display area 756.
  • an acceleration sensor such as a gyro sensor
  • the communication unit has a wireless communication device, and can supply video signals, etc. by the wireless communication device.
  • a connector to which a cable to which a video signal and a power supply potential are supplied may be provided.
  • a battery is provided in the electronic device 700A and the electronic device 700B, and can be charged wirelessly and/or wiredly.
  • the housing 721 may be provided with a touch sensor module.
  • the touch sensor module has a function of detecting that the outer surface of the housing 721 is touched.
  • the touch sensor module can detect a user's tap operation or slide operation and execute various processes. For example, it is possible to perform processing such as pausing or resuming a moving image by a tap operation, and fast-forward or fast-reverse processing can be performed by a slide operation. Further, by providing a touch sensor module for each of the two housings 721, the range of operations can be expanded.
  • Various touch sensors can be applied to the touch sensor module.
  • various methods such as a capacitance method, a resistive film method, an infrared method, an electromagnetic induction method, a surface acoustic wave method, and an optical method can be adopted.
  • a photoelectric conversion device (also referred to as a photoelectric conversion element) can be used as the light receiving device.
  • a photoelectric conversion device also referred to as a photoelectric conversion element
  • One or both of an inorganic semiconductor and an organic semiconductor can be used for the active layer of the photoelectric conversion device.
  • the electronic device 800A shown in FIG. 39C and the electronic device 800B shown in FIG. 39D each include a pair of display units 820, a housing 821, a communication unit 822, a pair of mounting units 823, a control unit 824, a pair of imaging units 825, and a pair of lenses 832.
  • the display device of one embodiment of the present invention can be applied to the display portion 820 . Therefore, the electronic device can display images with extremely high definition. This allows the user to feel a high sense of immersion.
  • the display unit 820 is provided inside the housing 821 at a position where it can be viewed through the lens 832 . By displaying different images on the pair of display portions 820, three-dimensional display using parallax can be performed.
  • Each of the electronic device 800A and the electronic device 800B can be said to be an electronic device for VR.
  • a user wearing electronic device 800 ⁇ /b>A or electronic device 800 ⁇ /b>B can view an image displayed on display unit 820 through lens 832 .
  • the electronic device 800A and the electronic device 800B each have a mechanism that can adjust the left and right positions of the lens 832 and the display unit 820 so that they are optimally positioned according to the position of the user's eyes.
  • the wearing section 823 allows the user to wear the electronic device 800A or the electronic device 800B on the head.
  • the shape is illustrated as a temple of eyeglasses (also referred to as a temple), but the shape is not limited to this.
  • the mounting portion 823 may be worn by the user, and may be, for example, a helmet-type or band-type shape.
  • the imaging unit 825 has a function of acquiring external information. Data acquired by the imaging unit 825 can be output to the display unit 820 . An image sensor can be used for the imaging unit 825 . Also, a plurality of cameras may be provided so as to be able to deal with a plurality of angles of view such as telephoto and wide angle.
  • a distance measuring sensor capable of measuring the distance of an object
  • the imaging unit 825 is one aspect of the detection unit.
  • the detection unit for example, an image sensor or a distance image sensor such as a lidar (LIDAR: Light Detection and Ranging) can be used.
  • LIDAR Light Detection and Ranging
  • the electronic device 800A may have a vibration mechanism that functions as bone conduction earphones.
  • a vibration mechanism that functions as bone conduction earphones.
  • one or more of the display portion 820, the housing 821, and the mounting portion 823 can be provided with the vibration mechanism.
  • the user can enjoy video and audio simply by wearing the electronic device 800A without the need for separate audio equipment such as headphones, earphones, or speakers.
  • the electronic device 800A and the electronic device 800B may each have an input terminal.
  • the input terminal can be connected to a cable that supplies a video signal from a video output device or the like and power or the like for charging a battery provided in the electronic device.
  • the electronic device of one embodiment of the present invention may have a function of wirelessly communicating with the earphone 750.
  • Earphone 750 has a communication unit (not shown) and has a wireless communication function.
  • the earphone 750 can receive information (eg, audio data) from the electronic device by wireless communication function.
  • information eg, audio data
  • electronic device 700A shown in FIG. 39A has a function of transmitting information to earphone 750 by a wireless communication function.
  • electronic device 800A shown in FIG. 39C has a function of transmitting information to earphone 750 by a wireless communication function.
  • the electronic device may have an earphone part.
  • Electronic device 700B shown in FIG. 39B has earphone section 727 .
  • the earphone section 727 and the control section can be configured to be wired to each other.
  • a part of the wiring connecting the earphone section 727 and the control section may be arranged inside the housing 721 or the mounting section 723 .
  • the electronic device 800B shown in FIG. 39D has an earphone section 827.
  • the earphone unit 827 and the control unit 824 can be configured to be wired to each other.
  • a part of the wiring connecting the earphone section 827 and the control section 824 may be arranged inside the housing 821 or the mounting section 823 .
  • the earphone section 827 and the mounting section 823 may have magnets. Accordingly, the earphone section 827 can be fixed to the mounting section 823 by magnetic force, which is preferable because it facilitates storage.
  • the electronic device may have an audio output terminal to which earphones or headphones can be connected. Also, the electronic device may have one or both of an audio input terminal and an audio input mechanism.
  • a voice input mechanism for example, a sound collecting device such as a microphone can be used. By providing the electronic device with a voice input mechanism, the electronic device may function as a so-called headset.
  • the electronic device of one embodiment of the present invention is suitable for both glasses type (electronic device 700A, electronic device 700B, etc.) and goggle type (electronic device 800A, electronic device 800B, etc.).
  • An electronic device of one embodiment of the present invention can transmit information to earphones by wire or wirelessly.
  • An electronic device 6500 shown in FIG. 40A is a mobile information terminal that can be used as a smartphone.
  • the electronic device 6500 has a housing 6501, a display unit 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, a light source 6508, and the like.
  • a display portion 6502 has a touch panel function.
  • the display device of one embodiment of the present invention can be applied to the display portion 6502 .
  • FIG. 40B is a schematic cross-sectional view including the end of the housing 6501 on the microphone 6506 side.
  • a transparent protective member 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, an optical member 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, and the like are arranged in a space surrounded by the housing 6501 and the protective member 6510.
  • a display panel 6511, an optical member 6512, and a touch sensor panel 6513 are fixed to the protective member 6510 with an adhesive layer (not shown).
  • a portion of the display panel 6511 is folded back in a region outside the display portion 6502, and the FPC 6515 is connected to the folded portion.
  • An IC6516 is mounted on the FPC6515.
  • the FPC 6515 is connected to terminals provided on the printed circuit board 6517 .
  • the flexible display of one embodiment of the present invention can be applied to the display panel 6511 . Therefore, an extremely lightweight electronic device can be realized. In addition, since the display panel 6511 is extremely thin, the thickness of the electronic device can be reduced and the large-capacity battery 6518 can be mounted. In addition, by folding back part of the display panel 6511 and arranging a connection portion with the FPC 6515 on the back side of the pixel portion, an electronic device with a narrow frame can be realized.
  • a television set 7100 has a display portion 7000 incorporated in a housing 7101 .
  • a configuration in which a housing 7101 is supported by a stand 7103 is shown.
  • the display device of one embodiment of the present invention can be applied to the display portion 7000 .
  • the operation of the television device 7100 shown in FIG. 40C can be performed using operation switches provided in the housing 7101 and a separate remote controller 7111 .
  • the display portion 7000 may be provided with a touch sensor, and the television device 7100 may be operated by touching the display portion 7000 with a finger or the like.
  • the remote controller 7111 may have a display unit that displays information output from the remote controller 7111 .
  • a channel and a volume can be operated with operation keys or a touch panel provided in the remote controller 7111 , and an image displayed on the display portion 7000 can be operated.
  • the television device 7100 is configured to include a receiver, a modem, and the like.
  • the receiver can receive general television broadcasts. Also, by connecting to a wired or wireless communication network via a modem, one-way (from the sender to the receiver) or two-way (between the sender and the receiver, or between the receivers, etc.) information communication can be performed.
  • FIG. 40D shows an example of a notebook personal computer.
  • a notebook personal computer 7200 has a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and the like.
  • the display portion 7000 is incorporated in the housing 7211 .
  • the display device of one embodiment of the present invention can be applied to the display portion 7000 .
  • FIGS. 40E and 40F An example of digital signage is shown in FIGS. 40E and 40F.
  • a digital signage 7300 shown in FIG. 40E includes a housing 7301, a display unit 7000, speakers 7303, and the like. Furthermore, it can have an LED lamp, an operation key (including a power switch or an operation switch), connection terminals, various sensors, a microphone, and the like.
  • FIG. 40F is a digital signage 7400 attached to a cylindrical post 7401.
  • a digital signage 7400 has a display section 7000 provided along the curved surface of a pillar 7401 .
  • the display device of one embodiment of the present invention can be applied to the display portion 7000 in FIGS. 40E and 40F.
  • the wider the display unit 7000 the more information can be provided at once.
  • the wider the display unit 7000 the more conspicuous it is, and the more effective the advertisement can be, for example.
  • a touch panel By applying a touch panel to the display unit 7000, not only can images or moving images be displayed on the display unit 7000, but also the user can intuitively operate the display unit 7000, which is preferable. Further, when used for providing information such as route information or traffic information, usability can be enhanced by intuitive operation.
  • the digital signage 7300 or digital signage 7400 is preferably capable of cooperating with an information terminal 7311 or information terminal 7411 such as a smartphone possessed by the user through wireless communication.
  • advertisement information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411 .
  • display on the display portion 7000 can be switched.
  • the digital signage 7300 or 7400 can execute a game using the screen of the information terminal 7311 or 7411 as an operating means (controller). This allows an unspecified number of users to simultaneously participate in and enjoy the game.
  • the electronic device shown in FIGS. 41A to 41G includes a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including power switches or operation switches), connection terminals 9006, sensors 9007 (force, displacement, position, speed, acceleration, angular velocity, number of revolutions, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, etc.). or includes the ability to detect, detect, or measure infrared rays), a microphone 9008, and the like.
  • the electronic devices shown in FIGS. 41A to 41G have various functions. For example, it can have a function of displaying various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a function of displaying a calendar, date or time, a function of controlling processing by various software (programs), a wireless communication function, a function of reading and processing programs or data recorded on a recording medium, and the like.
  • the functions of the electronic device are not limited to these, and can have various functions.
  • the electronic device may have a plurality of display units.
  • the electronic device may be provided with a camera or the like, and may have a function of capturing a still image or moving image and storing it in a recording medium (external or built into the camera), a function of displaying the captured image on a display unit, and the like.
  • FIGS. 41A to 41G Details of the electronic devices shown in FIGS. 41A to 41G will be described below.
  • FIG. 41A is a perspective view showing a mobile information terminal 9101.
  • the mobile information terminal 9101 can be used as a smart phone, for example.
  • the portable information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, and the like.
  • the mobile information terminal 9101 can display text and image information on its multiple surfaces.
  • FIG. 41A shows an example in which three icons 9050 are displayed.
  • Information 9051 indicated by a dashed rectangle can also be displayed on another surface of the display portion 9001 . Examples of the information 9051 include notification of incoming e-mail, SNS, phone call, title of e-mail or SNS, sender name, date and time, remaining battery power, radio wave intensity, and the like.
  • an icon 9050 or the like may be displayed at the position where the information 9051 is displayed.
  • FIG. 41B is a perspective view showing a mobile information terminal 9102.
  • the portable information terminal 9102 has a function of displaying information on three or more sides of the display portion 9001 .
  • information 9052, information 9053, and information 9054 are displayed on different surfaces.
  • the user can confirm the information 9053 displayed at a position where the mobile information terminal 9102 can be viewed from above the mobile information terminal 9102 while the mobile information terminal 9102 is stored in the chest pocket of the clothes.
  • the user can check the display without taking out the portable information terminal 9102 from the pocket, and can determine, for example, whether to receive a call.
  • FIG. 41C is a perspective view showing the tablet terminal 9103.
  • the tablet terminal 9103 can execute various applications such as mobile phone, e-mail, reading and creating text, playing music, Internet communication, and computer games.
  • a tablet terminal 9103 has a display portion 9001, a camera 9002, a microphone 9008, and a speaker 9003 on the front of a housing 9000, operation keys 9005 as operation buttons on the left side of the housing 9000, and connection terminals 9006 on the bottom.
  • FIG. 41D is a perspective view showing a wristwatch-type mobile information terminal 9200.
  • the mobile information terminal 9200 can be used as a smart watch (registered trademark), for example.
  • the display portion 9001 has a curved display surface, and display can be performed along the curved display surface.
  • the mobile information terminal 9200 can also make hands-free calls by mutual communication with a headset capable of wireless communication, for example.
  • the portable information terminal 9200 can transmit data to and from another information terminal through the connection terminal 9006, and can be charged. Note that the charging operation may be performed by wireless power supply.
  • FIGS. 41E and 41G are perspective views showing a foldable personal digital assistant 9201.
  • FIG. 41E is a state in which the portable information terminal 9201 is unfolded
  • FIG. 41G is a state in which it is folded
  • FIG. 41F is a perspective view in the middle of changing from one of FIGS. 41E and 41G to the other.
  • the portable information terminal 9201 has excellent portability in the folded state, and has excellent display visibility due to a seamless wide display area in the unfolded state.
  • a display portion 9001 included in the portable information terminal 9201 is supported by three housings 9000 connected by hinges 9055 .
  • the display portion 9001 can be bent with a curvature radius of 0.1 mm or more and 150 mm or less.
  • Example 2 In this example, Sample A and Sample B, which are transistors of one embodiment of the present invention, were manufactured.
  • the description of the transistor 100A illustrated in FIGS. 6A and 6B can be referred to.
  • the description of the method for manufacturing the transistor 100A described in ⁇ Manufacturing Method Example 2> in Embodiment 1 can be referred to.
  • an In--Sn--Si oxide (ITSO) film having a thickness of about 100 nm was formed on the substrate 102 by a sputtering method and processed to obtain the conductive layer 112a.
  • a glass substrate was used as the substrate 102 .
  • a silicon nitride film having a thickness of about 30 nm was formed as the insulating film 110cf, and a silicon oxynitride film was formed as the insulating film 110af.
  • the film thickness of the insulating film 110af was varied between the samples.
  • the film thickness of the insulating film 110af of the sample A is approximately 1000 nm, and the film thickness of the insulating film 110af of the sample B is approximately 500 nm.
  • a metal oxide layer having a thickness of about 20 nm was formed as the metal oxide layer 149 on the insulating film 110af.
  • the metal oxide layer 149 was removed.
  • a wet etching method was used to remove the metal oxide layer 149 .
  • a silicon nitride film with a thickness of about 30 nm was formed as the insulating film 110bf on the insulating film 110af.
  • an In-Sn-Si oxide (ITSO) film with a thickness of about 100 nm was formed as the conductive film 112f on the insulating film 110bf by a sputtering method.
  • the conductive film 112f was processed to obtain the conductive layer 112B.
  • the conductive layer 112B in the region overlapping with the conductive layer 112a was removed to form the conductive layer 112b having the opening 143, and the insulating film 110af, the insulating film 110bf, and the insulating film 110cf in the region overlapping with the conductive layer 112a were removed to form the insulating layer 110 having the opening 141.
  • a wet etching method was used to remove the conductive film 112f.
  • a dry etching method is used to remove the insulating film 110af, the insulating film 110bf, and the insulating film 110cf.
  • the upper surface shape of the openings 141 and 143 is circular.
  • a metal oxide film having a thickness of about 20 nm was formed as the metal oxide film 108f so as to cover the openings 141 and 143.
  • the semiconductor layer 108 was obtained by processing the metal oxide film 108f.
  • a silicon oxynitride film having a thickness of about 100 nm was formed by plasma CVD.
  • a titanium film with a film thickness of about 50 nm, an aluminum film with a film thickness of about 200 nm, and a titanium film with a film thickness of about 50 nm were each formed by a sputtering method. After that, each conductive film was processed to obtain a conductive layer 104 .
  • a silicon oxynitride film with a thickness of about 300 nm was formed by plasma CVD as a protective layer for the transistor.
  • sample A and sample B were obtained.
  • the voltage applied to the gate electrode (hereinafter also referred to as gate voltage (Vg)) was applied from -10V to +10V in increments of 0.25V.
  • the voltage applied to the source electrode (hereinafter also referred to as source voltage (Vs)) was set to 0 V (comm), and the voltage applied to the drain electrode (hereinafter also referred to as drain voltage (Vd)) was set to 0.1 V and 5.1 V.
  • a transistor with a width D141a of 2.0 ⁇ m (channel width of 6.3 ⁇ m) in the opening 141 was measured.
  • the film thickness T110a of the insulating layer 110a is about 1000 nm
  • the film thickness T110a of the insulating layer 110a is about 500 nm.
  • the number of measurements was 10 for each sample.
  • the Id-Vg characteristics of sample A are shown in FIG. 42A, and the Id-Vg characteristics of sample B are shown in FIG. 42B.
  • the horizontal axis indicates the gate potential (Vg)
  • the left vertical axis indicates the drain current (Id)
  • the right vertical axis indicates the field effect mobility ( ⁇ FE) at a drain voltage (Vd) of 5.1 V.
  • the Id-Vg characteristic results of 10 transistors are respectively superimposed.
  • FIGS. 43A to 44B STEM images of the cross section of Sample A are shown in FIGS. 43A to 44B.
  • FIG. 43A is a transmitted electron (TE) image at a magnification of 30,000.
  • FIG. 43B is a TE image at 50,000 ⁇ magnification.
  • FIG. 44A is a Z-contrast (ZC) image at 30,000 ⁇ magnification of the same location as FIG. 43A. In the Z-contrast image, substances with higher atomic numbers are observed brighter.
  • FIG. 44B is a ZC image at 50,000 ⁇ magnification of the same location as FIG. 43B.
  • FIGS. 45A to 46B STEM images of the cross section of Sample B are shown in FIGS. 45A to 46B.
  • FIG. 45A is a TE image at 30,000 ⁇ magnification.
  • FIG. 45B is a TE image at 50,000 ⁇ magnification.
  • FIG. 46A is a ZC image at 30,000 ⁇ magnification of the same location as FIG. 45A.
  • FIG. 46B is a ZC image at 50,000 ⁇ magnification of the same location as FIG. 45B.
  • sample A As shown in FIGS. 43A to 46B, it was confirmed that both sample A and sample B had good shapes.
  • Sample A the length of the side surface of the insulating layer 110a on the opening 141 side, which corresponds to the channel length L100 of the transistor, was 1.1 ⁇ m.
  • sample B the length of the side surface of the insulating layer 110a on the opening 141 side corresponding to the channel length L100 of the transistor was 0.52 ⁇ m.

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  • Thin Film Transistor (AREA)
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CN202380017236.3A CN118556296A (zh) 2022-01-21 2023-01-11 半导体装置及半导体装置的制造方法
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