WO2023115404A1

WO2023115404A1 - Display panel

Info

Publication number: WO2023115404A1
Application number: PCT/CN2021/140579
Authority: WO
Inventors: 罗传宝
Original assignee: 深圳市华星光电半导体显示技术有限公司
Priority date: 2021-12-20
Filing date: 2021-12-22
Publication date: 2023-06-29
Also published as: CN114284300A

Abstract

A display panel, comprising a first thin film transistor (100) and a second thin film transistor (200). The first thin film transistor (100) comprises a first source (110), a first drain (120), a first active layer (131), and a first gate (140). The second thin film transistor (200) comprises a second source (210), a second drain (220), a second active layer (230), and a second gate (240). The first drain (120) of the first thin film transistor (100) is electrically connected to the second gate (240) of the second thin film transistor (200). The electron mobility of the first active layer (131) of the first thin film transistor (100) is greater than or equal to the electron mobility of the second active layer (230) of the second thin film transistor (200). The threshold voltage offset of the second active layer (230) of the second thin film transistor (200) is less than or equal to the threshold voltage offset of the first active layer (131) of the first thin film transistor (100).

Description

display panel

technical field

The invention relates to the field of display technology, in particular to a display panel with double thin-film transistors that can be applied to large-size display devices.

Background technique

Low-temperature polycrystalline silicon (LTPS) thin film transistors are widely used in display panels of small-sized display devices such as smartphones and tablet computers due to their high electron mobility and short response time driving characteristics. However, because the leakage current of the low temperature polysilicon thin film transistor is large, in order to avoid image delay in the display panel and affect the switching of the display screen, it is set to a high refresh rate, resulting in the charging time of the low temperature polysilicon thin film transistor shorter.

In addition, using such as indium gallium zinc oxide (indium gallium Zinc oxide, IGZO) and other metal oxide thin film transistors have low leakage current and high stability, so they can be used to reduce the refresh rate of the display panel. However, the electron mobility of the InGaZnO thin film transistor is lower than that of the low temperature polysilicon thin film transistor, so the InGaZnO thin film transistor requires a higher driving voltage.

In order to make full use of the high electron mobility of the low temperature polysilicon thin film transistor and the low leakage current characteristics of the indium gallium zinc oxide thin film transistor, the prior art has designed a combination of the low temperature polysilicon thin film transistor and the indium Gallium zinc oxide thin film transistor display panels, that is, low-temperature polysilicon oxide (low-temperature polycrystalline oxide, LTPO) display panel.

technical problem

The low-temperature polysilicon thin film transistor needs a certain proportion of hydrogen (H) atoms to passivate the dangling bonds of the P-type silicon (P-Si) semiconductor and the interface with the N-type silicon (N-Si) semiconductor, so as to reduce the P type silicon semiconductor and the defects of the interface with the n-type silicon semiconductor. For the indium gallium zinc oxide thin film transistor, a high proportion of hydrogen atoms will destroy the balance of the oxygen (O) atom vacancies and the chemical bonds between metal atoms and oxygen atoms (Metal-O) in the indium gallium zinc oxide, Furthermore, the threshold voltage offset (Vth) of the InGaZnO thin film transistor is negatively shifted. Therefore, the low-temperature polysilicon thin film transistor and the InGaZnO thin film transistor have low compatibility with each other and are difficult to manufacture.

The manufacturing process of the low temperature polysilicon oxide display panel is complicated, and the manufacturing process of the low temperature polysilicon thin film transistor must be carried out separately from the manufacturing process of the indium gallium zinc oxide thin film transistor. Although the existing technology can be debugged through the process process, so that the low-temperature polysilicon thin film transistor and the indium gallium zinc oxide thin film transistor can be smoothly combined, but the low-temperature polysilicon thin film transistor is in the process of large-scale display devices. The crystal uniformity of the low temperature polysilicon thin film transistor is poor, which will affect the electron mobility and threshold voltage shift of the low temperature polysilicon thin film transistor. Moreover, due to the compatibility between the low temperature polysilicon thin film transistor and the indium gallium zinc oxide thin film transistor, it is difficult to apply the low temperature polysilicon oxide display panel to the large-size display device. Therefore, the current low-temperature polysilicon oxide display panel can only be applied to small-sized display devices such as smart watches and smart bracelets.

Since the low-temperature polysilicon oxide display panel in the prior art has technical problems that cannot be applied to the large-size display device, a display panel that can be applied to a large-size display device and has double thin-film transistors is needed to solve the above-mentioned problem. technical problems.

technical solution

The invention provides a display panel which can be applied to a large-size display device and has double thin film transistors. The display panel includes a first thin film transistor and a second thin film transistor. The first thin film transistor includes a first source, a first drain, a first active layer, and a first gate. The second thin film transistor includes a second source, a second drain, a second active layer, and a second gate. The first drain of the first TFT is electrically connected to the second gate of the second TFT. The electron mobility of the first active layer of the first thin film transistor is greater than or equal to the electron mobility of the second active layer of the second thin film transistor. The threshold voltage shift of the second active layer of the second thin film transistor is less than or equal to the threshold voltage shift of the first active layer of the first thin film transistor.

In this embodiment, the electron mobility of the first active layer of the first thin film transistor is more than 1.5 times the electron mobility of the second active layer of the second thin film transistor.

In this embodiment, the electron mobility of the first active layer of the first thin film transistor is greater than or equal to 20 cm2/(volt·sec).

In this embodiment, the threshold voltage shift of the second active layer of the second thin film transistor is less than or equal to 1 volt.

In this embodiment, the material of the first active layer of the first thin film transistor includes indium oxide, gallium oxide, zinc oxide, tin oxide, and combinations thereof.

In this embodiment, the material of the second active layer of the second thin film transistor includes a metal oxide doped with a rare earth metal element or a fluorine compound.

In another embodiment, the first thin film transistor further includes a third active layer. The third active layer is stacked with the first active layer. The non-channel regions at both ends of the third active layer are electrically connected to the non-channel regions at both ends of the first active layer.

In this embodiment, the average electron mobility of the first active layer and the third active layer of the first thin film transistor is greater than or equal to that of the second active layer of the second thin film transistor The electron mobility of .

In this embodiment, the average electron mobility of the first active layer and the third active layer of the first thin film transistor is equal to that of the second active layer of the second thin film transistor. More than 1.5 times the electron mobility mentioned above.

In this embodiment, the average electron mobility of the first active layer and the third active layer of the first thin film transistor is greater than or equal to 20 cm2/(V·sec).

In this embodiment, the material of the first active layer of the first thin film transistor is the same as that of the second active layer of the second thin film transistor.

In this embodiment, the first active layer of the first thin film transistor and the second active layer of the second thin film transistor are formed through the same manufacturing process.

In this embodiment, the material of the third active layer of the first thin film transistor includes indium oxide, gallium oxide, zinc oxide, tin oxide, and combinations thereof.

In this embodiment, in the first thin film transistor, the material of the first active layer is different from the material of the third active layer.

In another embodiment, the display panel further includes data lines, scan lines, and light emitting units. The data line is electrically connected to the first source of the first TFT. The scan line is electrically connected to the first gate of the first thin film transistor. The light emitting unit includes a first electrode and a second electrode opposite to the first electrode. The first electrode is electrically connected to the second source of the second TFT.

In this embodiment, the display panel further includes capacitors. The capacitor includes a first plate and a second plate opposite the first plate. The first plate is electrically connected to the first drain of the first TFT and the second gate of the second TFT. The second plate is electrically connected to the second source of the second TFT and the light emitting unit.

In another embodiment, the display panel further includes a light shielding layer. The light shielding layer is disposed under the second thin film transistor.

Beneficial effect

A display panel applicable to a large-size display device provided by the present invention includes a first thin film transistor and a second thin film transistor. The first thin film transistor includes the first source, the first drain, the first active layer, and the first gate. The second thin film transistor includes the second source, the second drain, the second active layer, and the second gate. The first drain of the first TFT is electrically connected to the second gate of the second TFT. The electron mobility of the first active layer of the first thin film transistor is greater than or equal to the electron mobility of the second active layer of the second thin film transistor. The threshold voltage shift of the second active layer of the second thin film transistor is less than or equal to the threshold voltage shift of the first active layer of the first thin film transistor. Furthermore, the first thin film transistor further includes a third active layer. The third active layer is stacked with the first active layer, so that the average electron mobility of the first active layer and the third active layer of the first thin film transistor is greater than or equal to the electron mobility of the second active layer of the second thin film transistor. Through the structural design of the dual thin film transistors on the display surface and the structural design of the dual active layers of the first thin film transistor, the present invention can use the first thin film transistor as a switching thin film transistor with a short response time, And the second thin film transistor is used as a highly stable driving transistor. Moreover, the first thin film transistor with dual active layers can improve the manufacturing yield, thereby solving the problem that the low-temperature polysilicon oxide display panel in the prior art cannot be applied to a large-size display device.

Description of drawings

FIG. 1 is a circuit structure diagram of a display panel of the present invention.

FIG. 2 is a schematic structural diagram of the first embodiment of the display panel of the present invention.

FIG. 3 is a schematic structural diagram of the second embodiment of the display panel of the present invention.

Embodiments of the present invention

In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments of the present invention will be exemplified below in detail with accompanying drawings.

Please refer to FIG. 1 , which is a circuit structure diagram of the display panel of the present invention. The display panel of the present invention includes a first thin film transistor 100 and a second thin film transistor 200 . The first TFT 100 includes a first source 110 , a first drain 120 , a first active layer (not shown), and a first gate 140 . The second TFT 200 includes a second source 210 , a second drain 220 , a second active layer (not shown), and a second gate 240 .

As shown in FIG. 1 , the display panel further includes a data line D, a scan line S, and a light emitting unit 300 . The data line D is electrically connected to the first source 110 of the first TFT 100 . The scan line S is electrically connected to the first gate 140 of the first TFT 100 . The first thin film transistor 100 is used to receive the display signal transmitted by the data line D and the scan line S of the display panel. By controlling the input voltage of the first gate 140, the first thin film transistor 100 can control the on-off of the current at both ends of the first source 110 and the first drain 120 .

In addition, as shown in FIG. 1 , the display panel further includes a common anode Vdd and a common cathode Vss. The common anode Vdd is electrically connected to the second drain 220 of the second TFT 200 . The first drain 120 of the first TFT 100 is electrically connected to the second gate 240 of the second TFT 200 . Both ends of the light emitting unit 300 are electrically connected to the second source 210 of the second thin film transistor 200 and the common cathode Vss. The second thin film transistor 200 is used to receive the switching signal of the first drain 120 of the first thin film transistor 100, and by controlling the input voltage of the second gate 240, the second thin film transistor 200 is The on-off of the current at both ends of the second source 210 and the second drain 220 can be controlled. When the current of the common anode Vdd is input to the light emitting unit 300 through the second thin film transistor 200, the light emitting unit 300 can emit light, so that the display panel can display images.

It can be seen that, among the first thin film transistor 100 and the second thin film transistor 200, the first thin film transistor 100 is used as a switch thin film transistor for turning on or off the second thin film transistor, and the The second thin film transistor 200 is used as a driving thin film transistor for driving the light emitting unit 300 .

In one embodiment, as shown in FIG. 1 , the display panel further includes a capacitor 400 . The capacitor 400 includes a first plate 410 and a second plate 420 opposite to the first plate 410 . The first plate 410 is electrically connected to the first drain 120 of the first TFT 100 and the second gate 240 of the second TFT 200 . The second plate 420 is electrically connected to the second source 210 of the second TFT 200 and the light emitting unit 300 . The capacitor is used to store the switch signal input by the first thin film transistor 100 and convert the switch signal into a current signal required by the light emitting unit 300 to display different gray scale values.

In actual implementation, the light emitting unit 300 includes an organic light emitting diode (organic light-emitting diode, OLED), mini-light-emitting diode (mini-light-emitting diode, mini-LED), micro-light-emitting diode (micro-light-emitting diode, micro-LED), or electroluminescent quantum dots (electroluminescent quantum dots, ELQDs), etc.

first embodiment

Please refer to FIG. 2 , which is a schematic structural diagram of the first embodiment of the display panel of the present invention.

In this embodiment, the display panel includes a lower substrate 510 and an upper substrate 520 to protect all components in the display panel. The lower substrate 510 and the upper substrate 520 include but are not limited to glass substrates or A polyimide substrate, etc., which can be a rigid substrate or a flexible substrate.

The display panel in this embodiment includes the first thin film transistor 100 and the second thin film transistor 200 . The first thin film transistor 100 includes the first active layer 131, the first gate insulating layer 150, and the first gate 140 stacked in sequence, and also includes an active layer electrically connected to the first active layer. The first source electrode 110 and the first drain electrode 120 at both ends of the source layer 131 . The second thin film transistor 200 includes the second active layer 230, the second gate insulating layer 250, and the second gate 240 stacked in sequence, and also includes a The second source 210 and the second drain 220 at two ends of the source layer 230 .

In this embodiment, the first thin film transistor 100 and the second thin film transistor 200 include top gate thin film transistors. With the progress of the manufacturing process, the top gate thin film transistor can reduce the manufacturing process of the display panel, thereby reducing the manufacturing cost of the display panel.

The display panel in this embodiment further includes the light emitting unit 300 . In this embodiment, the light emitting unit 300 is an organic light emitting diode as an example. The light emitting unit 300 includes a first electrode 310 , a second electrode 320 opposite to the first electrode 310 , and a light emitting layer 330 . The first electrode 310 is electrically connected to the second source 210 of the second TFT 200 . When the second thin film transistor 200 controls the conduction of current to the light emitting unit 300 , the current flows between the first electrode 310 serving as an anode and the second electrode 320 serving as a cathode. Under the action of the current, the electrons and holes in the light emitting unit 300 will combine in the light emitting layer 330 to excite light, so as to realize the image display of the display panel.

In this embodiment, the first thin film transistor 100 is used as the switching thin film transistor with a short response time, and the second thin film transistor 200 is used as the driving transistor with high stability. Therefore, the first active layer 131 of the first thin film transistor 100 is made of a material with high electron mobility, and the material of the second active layer 230 of the second thin film transistor 200 is made of a material with low leakage current. Material. In other words, the electron mobility of the first active layer 131 of the first thin film transistor 100 in this embodiment is greater than or equal to the electron mobility of the second active layer 230 of the second thin film transistor 200 rate, and the threshold voltage shift of the second active layer 230 of the second thin film transistor 200 is less than or equal to the threshold voltage shift of the first active layer 131 of the first thin film transistor 100 .

In this embodiment, the material of the first active layer 131 of the first thin film transistor 100 includes but not limited to indium oxide, gallium oxide, zinc oxide, tin oxide, and combinations thereof. Preferably, the material of the first active layer 131 can be indium gallium tin oxide (indium gallium zinc oxide, IGZO), indium gallium zinc tin oxide (indium gallium zinc tin oxide, IGZTO), or indium zinc tin oxide (indium zinc tin oxide, IZTO) and other materials with high electron mobility. According to the inventor's experiments, the electron mobility of the first active layer 131 of the first thin film transistor 100 is at least greater than or equal to 20 cm2/(volt·s). In this embodiment, the electron mobility of the first active layer 131 of the first thin film transistor 100 can reach the electron mobility of the second active layer 230 of the second thin film transistor 200 1.5 times the mobility or even higher.

When the electron mobility is higher, the response time of the first thin film transistor 100 is shorter, so that the first thin film transistor 100 as the switching thin film transistor has an excellent technical advantage.

In this embodiment, the material of the second active layer 230 of the second thin film transistor 200 includes but not limited to metal oxide doped with rare earth metal elements or fluorine compounds. Preferably, the material of the second active layer 230 can be a metal oxide doped with lanthanide elements such as praseodymium (Pr), cerium (Ce), or lanthanum (La), or it can be a metal oxide doped with fluorine The material with low leakage current such as nitrogen trifluoride (NF3), carbon tetrafluoride (CF4), or metal oxide of sulfur hexafluoride (SF6), and the metal oxide can be Metal oxides with low indium content. According to the inventor's experiments, the threshold voltage shift of the second active layer 230 of the second thin film transistor 200 is less than or equal to 1 volt. When the threshold voltage shift is smaller, the stability of the second thin film transistor 200 is higher, so that the second thin film transistor 200 as the driving thin film transistor has an excellent technical advantage.

Moreover, in this embodiment, in order to further increase the stability of the second thin film transistor 200 , the display panel further includes a light shielding layer 600 . Since the material properties of the second active layer 230 are easily affected by the light, the light-shielding layer 600 is provided under the second thin film transistor 200 in this embodiment to shield the second film from being irradiated. light from the second active layer 230 of the transistor 200 and maintain the high stability that the second thin film transistor 200 should have. At the same time, the light-shielding layer 600 can also be used as a wiring for the second source 210 of the second thin film transistor 200 , so that the structure of the display panel is simplified.

second embodiment

Please refer to FIG. 3 , which is a schematic structural diagram of a second embodiment of the display panel of the present invention.

In this embodiment, the main structures in the display panel, such as the lower substrate 510, the upper substrate 520, the first source 110 and the first drain of the first thin film transistor 100 120. The material properties, relative positions, and connection relationships of the second source 210 and the second drain 220 of the second thin film transistor 200, the light shielding layer 600, and the light emitting unit 300 are all same. In addition, preferably, the first thin film transistor 100 and the second thin film transistor 200 are also the top gate type thin film transistors to reduce the manufacturing process of the display panel, thereby reducing the manufacturing cost of the display panel.

However, the difference between this embodiment and the first embodiment is that the first thin film transistor 100 further includes a third active layer. The third active layer is stacked with the first active layer 131 and disposed on the first active layer 131 . The non-channel regions 132 a and 132 b at both ends of the third active layer are electrically connected to the non-channel regions 131 a and 131 b at both ends of the first active layer 131 . In this embodiment, the non-channel region 132a of the third active layer and the non-channel region 131a of the first active layer 131 are conductorized, and all the non-channel regions of the third active layer The non-channel region 132b and the non-channel region 131b of the first active layer 131 are conductive. Therefore, in the first thin film transistor 100, the first source electrode 110 is passed through the non-channel region 132a of the conductorized third active layer and all parts of the first active layer 131 The non-channel region 131a is electrically connected to the third active layer and the first active layer 131 at the same time, and the first drain 120 is passed through the conductorized third active layer. The non-channel region 132b and the non-channel region 131b of the first active layer 131 are electrically connected to the third active layer and the first active layer 131 at the same time.

Like the first embodiment of the present invention, this embodiment uses the first thin film transistor 100 as the switching thin film transistor with a short response time, and uses the second thin film transistor 200 as the driving device with high stability. transistor. Therefore, the third active layer of the first thin film transistor 100 is made of a material with high electron mobility, and the material of the second active layer 230 of the second thin film transistor 200 is made of a material with low leakage current. . In other words, the average electron mobility of the first active layer 131 and the third active layer of the first thin film transistor 100 in this embodiment is greater than or equal to that of the second thin film transistor 200 The electron mobility of the second active layer 230, and the threshold voltage shift of the second active layer 230 of the second thin film transistor 200 is less than or equal to that of the first thin film transistor 100 The average threshold voltage shift of the first active layer 131 and the third active layer.

In this embodiment, in order to further improve the average electron mobility of the first active layer 131 and the third active layer of the first thin film transistor 100, the first thin film transistor 100 The materials of the three active layers include, but are not limited to, indium oxide, gallium oxide, zinc oxide, tin oxide, and combinations thereof. Preferably, the material of the first active layer 131 and the material of the third active layer may be the indium gallium zinc oxide and the indium tin oxide respectively, or may be respectively The InGaZnO and InGaSnO are materials with high electron mobility. According to the inventor’s experiments, the average electron mobility of the first active layer 131 and the third active layer of the first thin film transistor 100 is at least greater than or equal to 20 cm2/(volt·sec) , and even can be further two to three times higher than the electron mobility of the first active layer 131 of the first thin film transistor 100 of the first embodiment. When the electron mobility is higher, the response time of the first thin film transistor 100 is shorter, so that the first thin film transistor 100 as the switching thin film transistor has an excellent technical advantage.

It should be noted that, in the first thin film transistor 100 , the material of the first active layer 131 described in the above embodiment is different from the material of the third active layer. However, different meanings and different material compositions referred to in this embodiment, the base material of the first active layer 131 and the base material of the third active layer can be the same, and the two can be mixed with different proportions of metal elements The material of the first active layer 131 and the material of the third active layer are different.

In this embodiment, in order to simplify the manufacturing process of the display panel, the material of the first active layer 131 of the first thin film transistor 100 can be configured to be the same as that of the second thin film transistor 200 The material of the active layer 230 is the same. Therefore, the first active layer 131 of the first thin film transistor 100 can be formed simultaneously with the second active layer 230 of the second thin film transistor 200 in the same process, thereby simplifying the display panel. manufacturing process and improve production efficiency.

In this embodiment, since the material and characteristics of the second active layer 230 of the second thin film transistor 200 are the same as those described in the first embodiment, the details are not repeated here.

A display panel that can be applied to a large-size display device provided by the present invention includes a first thin film transistor 100 and a second thin film transistor 200 . The first TFT 100 includes the first source 110 , the first drain 120 , the first active layer 131 , and the first gate 140 . The second TFT 200 includes the second source 210 , the second drain 220 , the second active layer 230 , and the second gate 240 . The first drain 120 of the first TFT 100 is electrically connected to the second gate 240 of the second TFT 200 . The electron mobility of the first active layer 131 of the first thin film transistor 100 is greater than or equal to the electron mobility of the second active layer 230 of the second thin film transistor 200 . The threshold voltage shift of the second active layer 230 of the second thin film transistor 200 is less than or equal to the threshold voltage shift of the first active layer 131 of the first thin film transistor 100 quantity. Furthermore, the first thin film transistor 100 further includes a third active layer. The third active layer is stacked with the first active layer 131, so that the average electron density of the first active layer 131 and the third active layer of the first thin film transistor 100 The mobility is greater than or equal to the electron mobility of the second active layer 230 of the second thin film transistor 200 . Through the structural design of the dual thin film transistors on the display surface and the structural design of the dual active layers of the first thin film transistor 100, the present invention enables the use of the first thin film transistor 100 as the short response time switch thin film transistor, and use the second thin film transistor 200 as the driving transistor with high stability. Moreover, the first thin film transistor 100 with dual active layers can improve the manufacturing yield, thereby solving the problem that the low-temperature polysilicon oxide display panel in the prior art cannot be applied to large-scale display devices.

The above are only preferred embodiments of the present invention. It should be pointed out that for those skilled in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications should also be regarded as protection of the present invention. scope.

Claims

A display panel, comprising:

The first thin film transistor includes a first source, a first drain, a first active layer, and a first gate; and

The second thin film transistor includes a second source, a second drain, a second active layer, and a second gate;

Wherein, the first drain of the first thin film transistor is electrically connected to the second gate of the second thin film transistor, and the electron mobility of the first active layer of the first thin film transistor is Greater than or equal to the electron mobility of the second active layer of the second thin film transistor, the threshold voltage shift of the second active layer of the second thin film transistor is less than or equal to the first thin film transistor Threshold voltage offset of the first active layer of a transistor.
The display panel according to claim 1, wherein the electron mobility of the first active layer of the first thin film transistor is the electron mobility of the second active layer of the second thin film transistor More than 1.5 times the rate.
The display panel according to claim 1, wherein the electron mobility of the first active layer of the first thin film transistor is greater than or equal to 20 cm2/(volt·sec).
The display panel according to claim 1, wherein the threshold voltage shift of the second active layer of the second thin film transistor is less than or equal to 1 volt.
The display panel according to claim 1, wherein the material of the first active layer of the first thin film transistor comprises indium oxide, gallium oxide, zinc oxide, tin oxide, and combinations thereof.
The display panel as claimed in claim 1, wherein the material of the second active layer of the second thin film transistor comprises a metal oxide doped with a rare earth metal element or a fluorine compound.
The display panel according to claim 1, further comprising:

a data line electrically connected to the first source of the first thin film transistor;

a scan line electrically connected to the first gate of the first thin film transistor; and

The light emitting unit includes a first electrode and a second electrode opposite to the first electrode, the first electrode is electrically connected to the second source of the second thin film transistor.
The display panel according to claim 7, further comprising:

capacitor, including a first plate and a second plate opposite to the first plate, the first plate is electrically connected to the first drain of the first thin film transistor and the first drain of the second thin film transistor Two gates, the second plate is electrically connected to the second source of the second thin film transistor and the light emitting unit.
The display panel according to claim 1, further comprising:

The light shielding layer is arranged under the second thin film transistor.
The display panel according to claim 1, wherein the first thin film transistor further comprises a third active layer, the third active layer is stacked with the first active layer, and the third active layer The non-channel regions at both ends of the layer are respectively electrically connected to the non-channel regions at both ends of the first active layer.
The display panel according to claim 10, wherein the average electron mobility of the first active layer and the third active layer of the first thin film transistor is greater than or equal to that of the second thin film transistor. The electron mobility of the second active layer.
The display panel according to claim 11, wherein the average electron mobility of the first active layer and the third active layer of the first thin film transistor is the same as that of the first active layer of the second thin film transistor. The electron mobility of the second active layer is more than 1.5 times.
The display panel according to claim 11, wherein the average electron mobility of the first active layer and the third active layer of the first thin film transistor is greater than or equal to 20 cm2/(V ∙ seconds).
The display panel according to claim 10, wherein the material of the first active layer of the first thin film transistor is the same as that of the second active layer of the second thin film transistor.
The display panel according to claim 10, wherein the first active layer of the first thin film transistor and the second active layer of the second thin film transistor are formed through the same process.
The display panel of claim 10, wherein the material of the third active layer of the first thin film transistor comprises indium oxide, gallium oxide, zinc oxide, tin oxide, and combinations thereof.
The display panel of claim 16, wherein, in the first thin film transistor, the material of the first active layer is different from the material of the third active layer.
The display panel of claim 10, further comprising:

a data line electrically connected to the first source of the first thin film transistor;

a scan line electrically connected to the first gate of the first thin film transistor; and

The light emitting unit includes a first electrode and a second electrode opposite to the first electrode, the first electrode is electrically connected to the second source of the second thin film transistor.
The display panel of claim 18, further comprising:

capacitor, including a first plate and a second plate opposite to the first plate, the first plate is electrically connected to the first drain of the first thin film transistor and the first drain of the second thin film transistor Two gates, the second plate is electrically connected to the second source of the second thin film transistor and the light emitting unit.
The display panel of claim 10, further comprising:

The light shielding layer is arranged under the second thin film transistor.