CN114284300A - Display panel - Google Patents
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- CN114284300A CN114284300A CN202111566801.0A CN202111566801A CN114284300A CN 114284300 A CN114284300 A CN 114284300A CN 202111566801 A CN202111566801 A CN 202111566801A CN 114284300 A CN114284300 A CN 114284300A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
Abstract
A display panel includes a first thin film transistor and a second thin film transistor. The first thin film transistor includes a first source electrode, a first drain electrode, a first active layer, and a first gate electrode. The second thin film transistor includes a second source electrode, a second drain electrode, a second active layer, and a second gate electrode. The first drain of the first thin film transistor is electrically connected to the second gate of the second thin film transistor. An electron mobility of the first active layer of the first thin film transistor is greater than or equal to an electron mobility of the second active layer of the second thin film transistor. A threshold voltage offset amount of the second active layer of the second thin film transistor is less than or equal to a threshold voltage offset amount of the first active layer of the first thin film transistor.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel having a dual thin film transistor, which can be applied to a large-sized display device.
Background
Low-temperature polysilicon (LTPS) thin film transistors are widely used in display panels of small-sized display devices such as smart phones and tablet computers because of their high electron mobility and short response time driving characteristics. However, since the leakage current of the ltps tft is large, the charging time of the ltps tft is short because the high refresh rate is set to avoid the display panel from being affected by the image delay to switch the display screen.
In addition, a thin film transistor using a metal oxide such as Indium Gallium Zinc Oxide (IGZO) has a small leakage current and a high stability, and thus can be used to reduce the display panel refresh rate. However, the electron mobility of the indium gallium zinc oxide thin film transistor is low relative to the electron mobility of the low temperature polysilicon thin film transistor, and thus the indium gallium zinc oxide thin film transistor requires a high driving voltage.
In order to fully utilize the characteristics of the low temperature polysilicon thin film transistor, such as high electron mobility and low leakage current, the prior art designs a display panel combining the low temperature polysilicon thin film transistor and the indium gallium zinc oxide thin film transistor, i.e., a low-temperature polysilicon oxide (LTPO) display panel.
The low temperature polysilicon thin film transistor requires a certain proportion of hydrogen (H) atoms to passivate P-type silicon (P-Si) semiconductors and dangling bonds of interfaces thereof with N-type silicon (N-Si) semiconductors to reduce defects of the P-type silicon semiconductors and the interfaces thereof with the N-type silicon semiconductors. For the InGaZnO thin film transistor, a high proportion of hydrogen atoms can destroy the balance of oxygen (O) atom vacancies and Metal-to-oxygen (Metal-O) bonds in the InGaZnO thin film transistor, thereby causing the threshold voltage offset (V) of the InGaZnO thin film transistorth) And (4) negative drift. Therefore, the low-temperature polycrystalline silicon thin film transistor and the indium gallium zinc oxide thin film transistor are low in compatibility and high in manufacturing difficulty.
The manufacturing process of the low-temperature polycrystalline silicon oxide display panel is complex, and the manufacturing process of the low-temperature polycrystalline silicon thin film transistor and the manufacturing process of the indium gallium zinc oxide thin film transistor are required to be carried out respectively. Although the prior art can successfully combine the low temperature polysilicon thin film transistor and the indium gallium zinc oxide thin film transistor through process debugging, the low temperature polysilicon thin film transistor has poor crystallization uniformity in the process of a large-size display device, which will affect the electron mobility and the threshold voltage offset of the low temperature polysilicon thin film transistor. Also, the low temperature poly-silicon oxide display panel is difficult to be applied to the large-sized display device for compatibility of the low temperature poly-silicon thin film transistor and the indium gallium zinc oxide thin film transistor with each other. Therefore, the current low temperature poly-silicon oxide display panel can only be applied to small-sized display devices such as smart watches and smart bracelets.
Since the related art low temperature poly-silicon oxide display panel has technical problems that it cannot be applied to the large-sized display device, a display panel having a dual thin film transistor that can be applied to the large-sized display device is required to solve the technical problems.
Disclosure of Invention
The present invention provides a display panel which can be applied to a large-sized display device and has a dual thin film transistor. The display panel includes a first thin film transistor and a second thin film transistor. The first thin film transistor includes a first source electrode, a first drain electrode, a first active layer, and a first gate electrode. The second thin film transistor includes a second source electrode, a second drain electrode, a second active layer, and a second gate electrode. The first drain of the first thin film transistor is electrically connected to the second gate of the second thin film transistor. An electron mobility of the first active layer of the first thin film transistor is greater than or equal to an electron mobility of the second active layer of the second thin film transistor. A threshold voltage offset amount of the second active layer of the second thin film transistor is less than or equal to a threshold voltage offset amount of the first active layer of the first thin film transistor.
In one embodiment, the display panel further includes data lines, scan lines, and light emitting units. The data line is electrically connected to the first source electrode of the first thin film transistor. The scan line is electrically connected to the first gate of the first thin film transistor. The light emitting unit includes a first electrode and a second electrode opposite to the first electrode. The first electrode is electrically connected with the second source electrode of the second thin film transistor.
In one embodiment, the electron mobility of the first active layer of the first thin film transistor is greater than or equal to 20 square centimeters/(volt-seconds).
In one embodiment, the threshold voltage offset of the second active layer of the second thin film transistor is less than or equal to 1 volt.
In one embodiment, the material of the first active layer of the first thin film transistor includes indium oxide, gallium oxide, zinc oxide, tin oxide, and a combination thereof.
In one embodiment, the material of the second active layer of the second thin film transistor includes a metal oxide doped with a rare earth metal element or a fluorine-based compound.
In one embodiment, the first thin film transistor further includes a third active layer. The third active layer is disposed with the first active layer stack. The non-channel regions at the two ends of the third active layer are respectively and electrically connected with the non-channel regions at the two ends of the first active layer. An average electron mobility of the first active layer and the third active layer of the first thin film transistor is greater than or equal to the electron mobility of the second active layer of the second thin film transistor.
In one embodiment, the average electron mobility of the first active layer and the third active layer of the first thin film transistor is greater than or equal to 20 square centimeters/(volt-seconds).
In one embodiment, the material of the first active layer of the first thin film transistor is the same as the material of the second active layer of the second thin film transistor.
In one embodiment, the material of the third active layer of the first thin film transistor includes indium oxide, gallium oxide, zinc oxide, tin oxide, and a combination thereof. In the first thin film transistor, a material of the first active layer is different from the material of the third active layer.
The display panel applicable to a large-size display device provided by the invention comprises a first thin film transistor and a second thin film transistor. The first thin film transistor includes the first source electrode, the first drain electrode, the first active layer, and the first gate electrode. The second thin film transistor includes the second source electrode, the second drain electrode, the second active layer, and the second gate electrode. The first drain of the first thin film transistor is electrically connected to the second gate of the second thin film transistor. The electron mobility of the first active layer of the first thin film transistor is greater than or equal to the electron mobility of the second active layer of the second thin film transistor. The threshold voltage offset amount of the second active layer of the second thin film transistor is less than or equal to the threshold voltage offset amount of the first active layer of the first thin film transistor. Further, the first thin film transistor further includes a third active layer. The third active layer is disposed with the first active layer stack layer such that the average electron mobility of the first active layer of the first thin film transistor and the third active layer is greater than or equal to the electron mobility of the second active layer of the second thin film transistor. Through the structural design of the double thin film transistor of the display surface and the structural design of the double active layers of the first thin film transistor, the first thin film transistor can be used as a switching thin film transistor with short response time, and the second thin film transistor can be used as a driving transistor with high stability. In addition, the first thin film transistor with double active layers can improve the manufacturing yield, and further solve the problem that the low-temperature polycrystalline silicon oxide display panel in the prior art cannot be applied to a large-size display device.
Drawings
Fig. 1 is a circuit structure diagram of a display panel according to the present invention.
Fig. 2 is a schematic structural diagram of the display panel according to the first embodiment of the invention.
Fig. 3 is a schematic structural diagram of a display panel according to a second embodiment of the invention.
Detailed Description
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Fig. 1 is a circuit structure diagram of a display panel according to the present invention. The display panel of the present invention includes a first thin film transistor 100 and a second thin film transistor 200. The first thin film transistor 100 includes a first source electrode 110, a first drain electrode 120, a first active layer (not shown), and a first gate electrode 140. The second thin film transistor 200 includes a second source electrode 210, a second drain electrode 220, a second active layer (not shown), and a second gate electrode 240.
As shown in fig. 1, the display panel further includes data lines D, scan lines S, and a light emitting unit 300. The data line D is electrically connected to the first source 110 of the first thin film transistor 100. The scan line S is electrically connected to the first gate 140 of the first thin film transistor 100. The first thin film transistor 100 is configured to receive a display signal transmitted by the data line D and the scan line S of the display panel, and by controlling the input voltage of the first gate 140, the first thin film transistor 100 can control the on/off of the current at the two ends of the first source 110 and the first drain 120.
In addition, as shown in FIG. 1, the display panel further includes a common anode VddAnd a common cathode Vss. The common anode VddElectrically connected to the second drain electrode 220 of the second thin film transistor 200. The first drain 120 of the first thin film transistor 100 is electrically connected to the second gate 240 of the second thin film transistor 200. Two ends of the light emitting unit 300 are electrically connected to the second source 210 of the second thin film transistor 200 and the common cathode Vss. The second thin film transistor 200 is configured to receive a switching signal of the first drain 120 of the first thin film transistor 100, and by controlling an input voltage of the second gate 240, the second thin film transistor 200 can control on/off of a current at two ends of the second source 210 and the second drain 220. When the common anode V isddIs inputted to the light emitting unit through the second thin film transistor 200300. the light emitting unit 300 can emit light, so that the display panel can display images.
It can be seen that, among the first thin film transistor 100 and the second thin film transistor 200, the first thin film transistor 100 is used as a switching thin film transistor for turning on or off the second thin film transistor, and the second thin film transistor 200 is used as a driving thin film transistor for driving the light emitting unit 300.
In one embodiment, as shown in fig. 1, the display panel further includes a capacitor 400. The capacitor 400 includes a first plate 410 and a second plate 420 opposite the first plate 410. The first plate 410 is electrically connected to the first drain 120 of the first thin film transistor 100 and the second gate 240 of the second thin film transistor 200. The second plate 420 is electrically connected to the second source 210 of the second thin film transistor 200 and the light emitting unit 300. The capacitor stores a switching signal inputted from the first thin film transistor 100, and converts the switching signal into a current signal required by the light emitting unit 300 to emit light, thereby displaying different gray scale values.
In practical implementations, the light emitting unit 300 includes an organic light-emitting diode (OLED), a mini-LED (mini-LED), a micro-LED (micro-LED), or an electroluminescent quantum dot (ELQDs).
First embodiment
Fig. 2 is a schematic structural diagram of the display panel according to the first embodiment of the present invention.
In this embodiment, the display panel includes a lower substrate 510 and an upper substrate 520 for protecting all components in the display panel, and the lower substrate 510 and the upper substrate 520 include but are not limited to a glass substrate or a polyimide substrate, which may be a rigid substrate or a flexible substrate.
The display panel of this embodiment includes the first thin film transistor 100 and the second thin film transistor 200. The first thin film transistor 100 includes the first active layer 131, a first gate insulating layer 150, and the first gate electrode 140, which are sequentially stacked, and further includes the first source electrode 110 and the first drain electrode 120 electrically connected to both ends of the first active layer 131. The second thin film transistor 200 includes the second active layer 230, a second gate insulating layer 250, and the second gate electrode 240 stacked in sequence, and further includes the second source electrode 210 and the second drain electrode 220 electrically connected to both ends of the second active layer 230.
In this embodiment, the first thin film transistor 100 and the second thin film transistor 200 include top-gate thin film transistors. With the progress of the manufacturing process, the top gate thin film transistor can reduce the manufacturing processes of the display panel, thereby reducing the manufacturing cost of the display panel.
The display panel of the present embodiment further includes the light emitting unit 300. In the embodiment, the light emitting unit 300 is exemplified as an organic light emitting diode, and the light emitting unit 300 includes a first electrode 310, a second electrode 320 opposite to the first electrode 310, and a light emitting layer 330. The first electrode 310 is electrically connected to the second source 210 of the second thin film transistor 200. When the second thin film transistor 200 controls current to be conducted to the light emitting unit 300, the current flows between the first electrode 310 as an anode and the second electrode 320 as a cathode. Under the action of the current, the electrons and holes in the light emitting unit 300 combine in the light emitting layer 330 and excite light, thereby achieving image display of the display panel.
In the present embodiment, the first thin film transistor 100 is used as the switching thin film transistor of short response time, and the second thin film transistor 200 is used as the driving transistor of high stability. Therefore, the first active layer 131 of the first thin film transistor 100 is selected to be a material with high electron mobility, and the second active layer 230 of the second thin film transistor 200 is selected to be a material with low leakage current. In other words, the electron mobility of the first active layer 131 of the first thin film transistor 100 of the present embodiment is greater than or equal to the electron mobility of the second active layer 230 of the second thin film transistor 200, and the threshold voltage offset amount of the second active layer 230 of the second thin film transistor 200 is less than or equal to the threshold voltage offset amount of the first active layer 131 of the first thin film transistor 100.
In the present embodiment, the material of the first active layer 131 of the first thin film transistor 100 includes, but is not limited to, indium oxide, gallium oxide, zinc oxide, tin oxide, and a combination thereof. Preferably, the material of the first active layer 131 may be indium gallium tin oxide (IGZO), Indium Gallium Zinc Tin Oxide (IGZTO), or Indium Zinc Tin Oxide (IZTO) or the like having high electron mobility. Through the experiments of the inventors, the electron mobility of the first active layer 131 of the first thin film transistor 100 is at least greater than or equal to 20 square centimeters/(volt-seconds). In the present embodiment, the electron mobility of the first active layer 131 of the first thin film transistor 100 may reach 1.5 times or more the electron mobility of the second active layer 230 of the second thin film transistor 200.
The response time of the first thin film transistor 100 is shorter as the electron mobility is larger, so that the first thin film transistor 100 as the switching thin film transistor has excellent technical advantages.
In the present embodiment, the material of the second active layer 230 of the second thin film transistor 200 includes, but is not limited to, a metal oxide doped with a rare earth metal element or a fluorine-based compound. Preferably, the material of the second active layer 230 may be a metal oxide doped with lanthanide such as praseodymium (Pr), cerium (Ce), or lanthanum (La), or may be a fluorine-doped compound such as nitrogen trifluoride (NF)3) Carbon tetrafluoride (CF)4) Or sulfur hexafluoride (SF)6) The metal oxide of (2) or the like has a low leakage current, and the metal oxide may be a metal oxide having a low indium content. Through the experiments of the inventors, the threshold voltage offset of the second active layer 230 of the second thin film transistor 200 is less than or equal to 1 volt. When the threshold voltage offset is smaller, the stability of the second thin film transistor 200 is higher, so that the second thin film transistor 200 as the driving thin film transistor has excellent technical advantages.
In addition, in order to further increase the stability of the second thin film transistor 200, the display panel further includes a light-shielding layer 600. Since the material characteristics of the second active layer 230 are easily affected by the light, the light-shielding layer 600 is disposed under the second thin film transistor 200 in this embodiment to shield the light that may irradiate the second active layer 230 of the second thin film transistor 200 and maintain the high stability of the second thin film transistor 200. Meanwhile, the light-shielding layer 600 can also be used as a trace of the second source 210 of the second thin film transistor 200, so that the structure of the display panel is simplified.
Second embodiment
Fig. 3 is a schematic structural diagram of the display panel according to the second embodiment of the invention.
In this embodiment, the main structures of the display panel, such as the material properties, relative positions, and connection relationships of the lower substrate 510, the upper substrate 520, the first source 110 and the first drain 120 of the first thin film transistor 100, the second source 210 and the second drain 220 of the second thin film transistor 200, the light-shielding layer 600, and the light-emitting unit 300, are the same. In addition, it is preferable that the first thin film transistor 100 and the second thin film transistor 200 are also the top gate thin film transistor to reduce the number of manufacturing processes of the display panel and to reduce the manufacturing cost of the display panel.
However, the present embodiment is different from the first embodiment in that the first thin film transistor 100 further includes a third active layer. The third active layer is stacked on the first active layer 131 and disposed on the first active layer 131. The non-channel regions 132a and 132b at two ends of the third active layer are electrically connected to the non-channel regions 131a and 131b at two ends of the first active layer 131, respectively. The present embodiment conducts the non-channel region 132a of the third active layer and the non-channel region 131a of the first active layer 131, and conducts the non-channel region 132b of the third active layer and the non-channel region 131b of the first active layer 131. Accordingly, in the first thin film transistor 100, the first source electrode 110 is electrically connected to the third active layer and the first active layer 131 through the non-channel region 132a of the third active layer and the non-channel region 131a of the first active layer 131, which are electrically conducted, and the first drain electrode 120 is electrically connected to the third active layer and the first active layer 131 through the non-channel region 132b of the third active layer and the non-channel region 131b of the first active layer 131, which are electrically conducted.
As in the first embodiment of the present invention, the present embodiment uses the first thin film transistor 100 as the switching thin film transistor of short response time, and uses the second thin film transistor 200 as the driving transistor of high stability. Therefore, the third active layer of the first thin film transistor 100 is selected to have a high electron mobility, and the second active layer 230 of the second thin film transistor 200 is selected to have a low leakage current. In other words, the average electron mobility of the first active layer 131 and the third active layer of the first thin film transistor 100 of the present embodiment is greater than or equal to the electron mobility of the second active layer 230 of the second thin film transistor 200, and the threshold voltage offset amount of the second active layer 230 of the second thin film transistor 200 is less than or equal to the average threshold voltage offset amount of the first active layer 131 and the third active layer of the first thin film transistor 100.
In order to further improve the average electron mobility of the first active layer 131 and the third active layer of the first thin film transistor 100, the material of the third active layer of the first thin film transistor 100 includes, but is not limited to, indium oxide, gallium oxide, zinc oxide, tin oxide, and combinations thereof. Preferably, the material of the first active layer 131 and the material of the third active layer may be the indium gallium zinc oxide and the indium tin oxide, respectively, or the material of the indium gallium zinc oxide and the material of the indium gallium tin oxide, respectively, both having high electron mobility. Through the experiments of the inventors, the average electron mobility of the first active layer 131 and the third active layer of the first thin film transistor 100 is at least greater than or equal to 20 square centimeters/(volt-seconds), even two to three times higher than the electron mobility of the first active layer 131 of the first thin film transistor 100 of the first embodiment. The response time of the first thin film transistor 100 is shorter as the electron mobility is larger, so that the first thin film transistor 100 as the switching thin film transistor has excellent technical advantages.
Note that, in the first thin film transistor 100, the material of the first active layer 131 is different from the material of the third active layer in the above embodiment. However, what is called different in the present embodiment means different material compositions, and the base material of the first active layer 131 and the base material of the third active layer may be the same, and they may form different materials of the first active layer 131 and the third active layer by doping different proportions of metal elements.
In this embodiment, for simplification of the manufacturing process of the display panel, the material of the first active layer 131 of the first thin film transistor 100 may be configured to be the same as the material of the second active layer 230 of the second thin film transistor 200. Therefore, the first active layer 131 of the first thin film transistor 100 can be formed simultaneously with the second active layer 230 of the second thin film transistor 200 in the same process, thereby simplifying the manufacturing process of the display panel and improving the production efficiency.
In this embodiment, since the material and the characteristics of the second active layer 230 of the second thin film transistor 200 are the same as those described in the first embodiment, the description thereof is omitted.
The display panel applicable to a large-sized display device includes a first thin film transistor 100 and a second thin film transistor 200. The first thin film transistor 100 includes the first source electrode 110, the first drain electrode 120, the first active layer 131, and the first gate electrode 140. The second thin film transistor 200 includes the second source electrode 210, the second drain electrode 220, the second active layer 230, and the second gate electrode 240. The first drain 120 of the first thin film transistor 100 is electrically connected to the second gate 240 of the second thin film transistor 200. The electron mobility of the first active layer 131 of the first thin film transistor 100 is greater than or equal to the electron mobility of the second active layer 230 of the second thin film transistor 200. The threshold voltage shift amount of the second active layer 230 of the second thin film transistor 200 is less than or equal to the threshold voltage shift amount of the first active layer 131 of the first thin film transistor 100. Further, the first thin film transistor 100 further includes a third active layer. The third active layer is stacked on the first active layer 131 such that the average electron mobility of the first active layer 131 and the third active layer of the first thin film transistor 100 is greater than or equal to the electron mobility of the second active layer 230 of the second thin film transistor 200. By the structural design of the dual thin film transistor of the display surface and the structural design of the dual active layer of the first thin film transistor 100, the present invention can use the first thin film transistor 100 as the switching thin film transistor with short response time and the second thin film transistor 200 as the driving transistor with high stability. Moreover, the first thin film transistor 100 with dual active layers can improve the manufacturing yield, thereby solving the problem that the low temperature poly-silicon oxide display panel in the prior art cannot be applied to a large-sized display device.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that those skilled in the art can make various improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be construed as the protection scope of the present invention.
Claims (10)
1. A display panel, comprising:
a first thin film transistor including a first source electrode, a first drain electrode, a first active layer, and a first gate electrode; and
a second thin film transistor including a second source electrode, a second drain electrode, a second active layer, and a second gate electrode;
the first drain electrode of the first thin film transistor is electrically connected to the second gate electrode of the second thin film transistor, the electron mobility of the first active layer of the first thin film transistor is greater than or equal to the electron mobility of the second active layer of the second thin film transistor, and the threshold voltage offset of the second active layer of the second thin film transistor is less than or equal to the threshold voltage offset of the first active layer of the first thin film transistor.
2. The display panel of claim 1, further comprising:
the data line is electrically connected with the first source electrode of the first thin film transistor;
the scanning line is electrically connected with the first grid electrode of the first thin film transistor; and
and the light-emitting unit comprises a first electrode and a second electrode opposite to the first electrode, and the first electrode is electrically connected with the second source electrode of the second thin film transistor.
3. The display panel according to claim 1, wherein the electron mobility of the first active layer of the first thin film transistor is greater than or equal to 20 square centimeters/(volt-seconds).
4. The display panel of claim 1, wherein the threshold voltage offset of the second active layer of the second thin film transistor is less than or equal to 1 volt.
5. The display panel of claim 1, wherein a material of the first active layer of the first thin film transistor comprises indium oxide, gallium oxide, zinc oxide, tin oxide, and a combination thereof.
6. The display panel according to claim 1, wherein a material of the second active layer of the second thin film transistor includes a metal oxide doped with a rare earth metal element or a fluorine-based compound.
7. The display panel according to claim 1, wherein the first thin film transistor further comprises a third active layer disposed on the first active layer stack, and non-channel regions at both ends of the third active layer are electrically connected to the non-channel regions at both ends of the first active layer, respectively; and
an average electron mobility of the first active layer and the third active layer of the first thin film transistor is greater than or equal to the electron mobility of the second active layer of the second thin film transistor.
8. The display panel according to claim 7, wherein the average electron mobility of the first active layer and the third active layer of the first thin film transistor is greater than or equal to 20 square centimeters/(volt-seconds).
9. The display panel according to claim 7, wherein a material of the first active layer of the first thin film transistor is the same as a material of the second active layer of the second thin film transistor.
10. The display panel according to claim 7, wherein a material of the third active layer of the first thin film transistor includes indium oxide, gallium oxide, zinc oxide, tin oxide, and a combination thereof; and
in the first thin film transistor, a material of the first active layer is different from the material of the third active layer.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111566801.0A CN114284300A (en) | 2021-12-20 | 2021-12-20 | Display panel |
| PCT/CN2021/140579 WO2023115404A1 (en) | 2021-12-20 | 2021-12-22 | Display panel |
| JP2021577831A JP2024508055A (en) | 2021-12-20 | 2021-12-22 | display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111566801.0A CN114284300A (en) | 2021-12-20 | 2021-12-20 | Display panel |
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| CN114284300A true CN114284300A (en) | 2022-04-05 |
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| CN202111566801.0A Pending CN114284300A (en) | 2021-12-20 | 2021-12-20 | Display panel |
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| WO (1) | WO2023115404A1 (en) |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR101073542B1 (en) * | 2009-09-03 | 2011-10-17 | 삼성모바일디스플레이주식회사 | Organic light emitting diode display and method for manufacturing the same |
| US9818765B2 (en) * | 2013-08-26 | 2017-11-14 | Apple Inc. | Displays with silicon and semiconducting oxide thin-film transistors |
| KR102207916B1 (en) * | 2013-10-17 | 2021-01-27 | 삼성디스플레이 주식회사 | Thin film transistor array substrate, organic light-emitting display apparatus and manufacturing of the thin film transistor array substrate |
| CN108231795B (en) * | 2018-01-02 | 2020-06-30 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method, display panel and display device |
| CN111244124B (en) * | 2018-11-12 | 2021-09-03 | 惠科股份有限公司 | Display panel and display device |
| KR20200079894A (en) * | 2018-12-26 | 2020-07-06 | 엘지디스플레이 주식회사 | Display apparatus comprising different types of thin film transistors and mehthod for manufacturing the same |
| CN110752219B (en) * | 2019-10-29 | 2022-07-26 | 昆山国显光电有限公司 | Thin film transistor and display panel |
| JP2021108366A (en) * | 2019-12-27 | 2021-07-29 | Ｔｉａｎｍａ Ｊａｐａｎ株式会社 | Thin film device |
| CN111384070B (en) * | 2020-03-25 | 2023-05-19 | 京东方科技集团股份有限公司 | Pixel structure, array substrate, display device and manufacturing method |
| CN113471250A (en) * | 2020-03-31 | 2021-10-01 | 华为技术有限公司 | Organic light-emitting display panel and display device |
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- 2021-12-20 CN CN202111566801.0A patent/CN114284300A/en active Pending
- 2021-12-22 WO PCT/CN2021/140579 patent/WO2023115404A1/en active Application Filing
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