WO2023108551A1 - 微型发光器件 - Google Patents

微型发光器件 Download PDF

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Publication number
WO2023108551A1
WO2023108551A1 PCT/CN2021/138847 CN2021138847W WO2023108551A1 WO 2023108551 A1 WO2023108551 A1 WO 2023108551A1 CN 2021138847 W CN2021138847 W CN 2021138847W WO 2023108551 A1 WO2023108551 A1 WO 2023108551A1
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WO
WIPO (PCT)
Prior art keywords
electrode
top surface
semiconductor layer
layer
emitting device
Prior art date
Application number
PCT/CN2021/138847
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English (en)
French (fr)
Inventor
樊勇
Original Assignee
厦门市芯颖显示科技有限公司
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Priority to PCT/CN2021/138847 priority Critical patent/WO2023108551A1/zh
Publication of WO2023108551A1 publication Critical patent/WO2023108551A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape

Definitions

  • the present application relates to the field of display technology, in particular to a micro light emitting device.
  • Micro-LED Microlight-emitting diode, micron light-emitting diode
  • Micro-LED Microlight-emitting diode, micron light-emitting diode
  • Early LED Light-emitting diode, light-emitting Diode
  • RGB red, green and blue
  • micro LED micro LED
  • micro LED further reduces the chip size to less than 50 ⁇ m.
  • a certain safety distance needs to be maintained between the positive and negative electrodes of the Micro-LED chip.
  • the negative electrode is co-located on the top side, making further chip size reduction difficult.
  • the embodiment of the present application provides a micro light emitting device, which can further reduce the size while maintaining a safe distance.
  • an embodiment of the present application provides a micro light-emitting device, including: a light-emitting functional layer, including a first semiconductor layer, an active layer, the second semiconductor layer and an insulating protection layer, the first semiconductor layer, the active layer and the second semiconductor layer are stacked in sequence, and the insulating layer covers the first semiconductor layer, the active layer along the direction extending from the second semiconductor layer to the first semiconductor layer and the second semiconductor layer, and form the top surface of the insulating protective layer and the side surface connected to the top surface; the first electrode penetrates the insulating protective layer and electrically connects the first semiconductor layer; the second An electrode penetrates the insulating protection layer and is electrically connected to the second semiconductor layer; wherein, at least one of the first electrode and the second electrode is disposed on the side surface.
  • a light-emitting functional layer including a first semiconductor layer, an active layer, the second semiconductor layer and an insulating protection layer, the first semiconductor layer, the active layer and the second semiconductor layer are stacked in sequence, and the insulating layer
  • one of the first electrode and the second electrode is arranged on the side surface, and the other of the first electrode and the second electrode is arranged on the top surface .
  • the top surface includes a first top surface, the first top surface is located on a side of the second semiconductor layer away from the active layer, and the first top surface is provided with a first opening, the first electrode is disposed on the side surface, and the second electrode is disposed on the first top surface and is electrically connected to the second semiconductor layer through the first opening.
  • the side surface includes a first side surface
  • the top surface further includes a second top surface
  • the second top surface is located on a side of the first semiconductor layer adjacent to the active layer.
  • the second top surface is provided with a second opening
  • the first electrode is provided on the first side surface and is electrically connected to the first semiconductor layer through the second opening.
  • the side includes a first side, the first side is provided with a third opening, the first electrode is provided on the first side and is electrically connected through the third opening the first semiconductor layer.
  • the top surface includes a second top surface, the second top surface is located on a side of the first semiconductor layer adjacent to the active layer, and the second top surface is provided with A second opening, the first electrode is disposed on the second top surface and is electrically connected to the first semiconductor layer through the second opening, and the second electrode is disposed on the side surface.
  • the side surface includes a second side surface
  • the top surface includes a first top surface
  • the first top surface is located on a side of the second semiconductor layer away from the active layer
  • a first opening is disposed on the first top surface
  • the second electrode is located on the second side surface and is electrically connected to the second semiconductor layer through the first opening.
  • the side includes a second side, and a fourth opening is provided on the second side, and the second electrode is located on the second side and is electrically connected through the fourth opening. the second semiconductor layer.
  • the side surface includes a third side surface and a fourth side surface, and the first electrode and the second electrode are respectively located on the third side surface and the fourth side surface.
  • the third side and the fourth side are opposite to each other.
  • the top surface includes a first top surface and a second top surface, the first top surface is located on a side of the second semiconductor away from the active layer, and the second The top surface is located on the side of the first semiconductor adjacent to the active layer, the first top surface is provided with a first opening, the second top surface is provided with a second opening, and the first electrode passes through The second opening is electrically connected to the first semiconductor layer, and the second electrode is electrically connected to the second semiconductor layer through the first opening.
  • a fifth opening is provided on the third side
  • a sixth opening is provided on the fourth side
  • the first electrode is electrically connected to the first electrode through the fifth opening.
  • a semiconductor layer, the second electrode is electrically connected to the second semiconductor layer through the sixth opening.
  • the micro light emitting device further includes a first solder metal layer and a second solder metal layer, the first solder metal layer covers the On one side, the second welding metal layer covers the second electrode on a side away from the insulating protection layer.
  • At least one of the first electrode and the second electrode of the micro light-emitting device is set to the side, so that the positions of the two are staggered, which can reduce the number of electrodes on the top surface.
  • the occupied area is conducive to reducing the size of the micro light-emitting device under the condition that a certain safety distance needs to be kept.
  • FIG. 1 is a schematic structural diagram of a micro light emitting device provided in the second embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of another micro light emitting device provided in the second embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a micro light emitting device provided in the third embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of another micro light emitting device provided in the third embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a micro light emitting device provided in the fourth embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of another micro light emitting device provided in the fourth embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a micro light emitting device provided in the fifth embodiment of the present application.
  • Fig. 8 is a schematic top view of a micro light emitting device provided by an embodiment of the present application.
  • Fig. 9 is a schematic top view of a micro light emitting device provided by another embodiment of the present application.
  • Fig. 10 is a schematic top view of a micro light emitting device provided by another embodiment of the present application.
  • 10 light emitting functional layer
  • 11 first semiconductor layer
  • 12 active layer
  • 13 second semiconductor layer
  • 14 insulating protection layer
  • 141 top surface
  • 1411 first top surface
  • 1412 second top surface
  • 1421 first side
  • 1422 second side
  • 1423 third side
  • 1424 fourth side
  • 151 first opening
  • 152 second opening
  • 153 third opening
  • 154 first Four openings
  • 155 fifth opening
  • 156 sixth opening
  • 20 first electrode
  • 30 second electrode
  • 40 buffer layer
  • 51 first welding metal layer
  • 52 second welding metal layer
  • 60 Ohmic contact material.
  • the first embodiment of the present application provides a micro light emitting device 100 , including a light emitting functional layer 10 , a first electrode 20 and a second electrode 30 .
  • the luminescent functional layer 10 includes a first semiconductor layer 11, an active layer 12, a second semiconductor layer 13 and an insulating protective layer 14, wherein the first semiconductor layer 11, the active layer 12 and the second semiconductor layer 13 are stacked in sequence, and the insulating protection layer 14 covers the first semiconductor layer 11, the active layer 12 and the second semiconductor layer 13 along the direction extending from the second semiconductor layer 13 to the first semiconductor layer 11, and forms the top of the insulating protection layer 14.
  • a surface 141 and a side surface 142 connected to the top surface 141 .
  • the first electrode 20 penetrates the insulating protection layer 14 and is electrically connected to the first semiconductor layer 11
  • the second electrode 30 penetrates the insulating protection layer 14 and is electrically connected to the second semiconductor layer 13 .
  • at least one of the first electrode 20 and the second electrode 30 is arranged on the side 142, for example, the first electrode 20 is arranged on the side 142, and the second electrode 30 is arranged on the top surface 141; or the second electrode 30 is arranged on On the side surface 142 , the first electrode 20 is disposed on the top surface 141 , or both the first electrode 20 and the second electrode 30 are disposed on the side surface 142 .
  • placing the first electrode 20 or the second electrode 30 on the side can reduce the area occupied by the electrode on the top surface 141.
  • the micro light emitting device 100 is, for example, a Micro-LED chip, wherein the first semiconductor layer 11 is, for example, an n-type semiconductor layer, the first electrode 20 is the N electrode (negative electrode) of the micro light emitting device 100, and the active layer 12 is, for example, Multi-layer quantum well layer (MQW), the second semiconductor layer 13 is, for example, a p-type semiconductor layer, and the second electrode 30 is the P electrode (positive electrode) of the micro light emitting device 100 .
  • the first semiconductor layer 11 is, for example, an n-type semiconductor layer
  • the first electrode 20 is the N electrode (negative electrode) of the micro light emitting device 100
  • the active layer 12 is, for example, Multi-layer quantum well layer (MQW)
  • the second semiconductor layer 13 is, for example, a p-type semiconductor layer
  • the second electrode 30 is the P electrode (positive electrode) of the micro light emitting device 100 .
  • the first semiconductor layer 11 may be an n-type gallium nitride (n-GaN) layer
  • the second semiconductor layer 13 may be a p-type gallium nitride layer (p-GaN ).
  • the active layer 12 and the second semiconductor layer 13 are stacked on the first semiconductor layer 11, but for example do not completely cover the first semiconductor layer 11, for example referring to the orientation shown in FIG. 1, the active layer 12 and the second semiconductor layer 13 For example, only the left part of the first semiconductor layer 11 is covered. Or refer to FIG. 8 to FIG.
  • FIG. 10 are schematic top view structural diagrams of micro light emitting devices 100 provided in some embodiments of the present application, wherein, for example, the structure shown in FIG. 8, the active layer 12 and the second semiconductor layer 13 cover the first semiconductor layer
  • the lower left part of 11 exposes the right and upper part of the first semiconductor layer 11; for example, in the structure shown in Figure 9, the active layer 12 and the second semiconductor layer 13 cover the lower part of the first semiconductor layer 11, exposing the first The upper part of the semiconductor layer 11; or the structure shown in Figure 10, the active layer 12 and the second semiconductor layer 13 cover the left middle part of the first semiconductor layer 11, exposing the right side, the upper side and the upper side of the first semiconductor layer 11. lower part.
  • the first electrode 20 and the second electrode 30 can be, for example, metal materials such as Au (gold), Pt (platinum), Ni (nickel), and the insulating protective layer 14 is, for example, a silicon oxide material.
  • the insulating protective layer 14 connects the first electrode 20 and the The second electrode 30 is insulated from the inner layer structure, and the insulating protection layer 14 has, for example, openings corresponding to the first semiconductor layer 11 and the second semiconductor layer 13 respectively, so that the first electrode 20 and the second electrode 30 can respectively penetrate through the insulating protection layer 14 To electrically connect the first semiconductor layer 11 and the second semiconductor layer 13 .
  • the micro light emitting device 100 further includes, for example, a buffer layer 40 disposed on the side of the first semiconductor layer 11 away from the active layer 12, and the buffer layer 40 may be a semiconductor material during the epitaxial growth process of the micro light emitting device 100. The production provides the core.
  • an ohmic contact material 60 is provided on the second semiconductor layer 13, the insulating protective layer 14 covers the ohmic contact material 60, and the second electrode 30 is electrically connected to the second semiconductor 13, for example, through the ohmic contact material 60, for example, referring to FIG. 1
  • An ITO (Indium Tin Oxide) layer is further provided on the side of the second semiconductor 13 away from the active layer 13 as the ohmic contact material 60 so that the second electrode 30 and the second semiconductor layer 13 form an ohmic contact connection.
  • the positive electrode (P electrode) and the negative electrode (N electrode) are often set on the same side of the chip (same as the top surface), and the two electrodes occupy a certain area respectively. In the case of a safe distance, the size of the Micro-LED chip is difficult to further reduce. In this embodiment, the arrangement positions of the first electrode 20 and the second electrode 30 are staggered, which is beneficial to reducing the size of the micro light emitting device 100 .
  • the second embodiment of the present application provides another micro light emitting device 100.
  • the first electrode 20 is arranged on the side 142, and the second electrode 30 is arranged on the top. Face 141.
  • the top surface 141 includes a first top surface 1411, the first top surface 1411 is located on the side of the second semiconductor layer 13 away from the active layer 12, the first top surface 1411 is provided with a first opening 151 , the first electrode 20 is disposed on the side surface 142 , and the second electrode 30 is disposed on the first top surface 1411 and is electrically connected to the second semiconductor layer 13 through the first opening 151 .
  • the side surface 142 includes a first side surface 1421 on which the first electrode 20 is disposed.
  • the top surface 141 further includes a second top surface 1412, the second top surface 1412 is located on the side of the first semiconductor layer 11 adjacent to the active layer 12, and the second top surface 1412 is provided with a second opening 152 .
  • the first electrode 20 is disposed on the first side 1421 and electrically connected to the first semiconductor layer 11 through the second opening 152 .
  • the second top surface 1412 is located at the upper left of the first semiconductor layer 11 .
  • a third opening 153 is disposed on the first side 1421 , and the first electrode 20 is disposed on the first side 1421 and electrically connected to the first semiconductor 11 through the third opening 153 .
  • the first electrode 20 when the first electrode 20 is arranged on the first side surface 1421 as shown in FIG. 2 , it can also extend to the second top surface 1412 , which is beneficial to expand the area of the first electrode 20 and form a good conduction effect.
  • the first electrode 20 can also be completely disposed on the first side surface 1421 without extending to the second top surface 1412 , which is not limited in this embodiment.
  • This embodiment does not limit the specific position of the side 142 where the first electrode 20 is located, that is, the first side 1421.
  • the light emitting device 100 has four sides 142 as shown in FIG. 8 , the first side 1421 can be any one of the four sides 142 .
  • the second top surface 1421 is located on the first top surface 1411
  • the first electrode 20 can be located on the first side 1421 and extend to the second top surface 1412, or the first side 1421 is the lower side 142 , the first electrode 20 may be located at the lower right corner in FIG. 8 , or extend to the second top surface 1421 .
  • the micro light emitting device 100 provided in this embodiment further includes, for example, a buffer layer 40 disposed on the side of the first semiconductor layer 11 away from the active layer 12 .
  • the buffer layer 40 can provide a core for the production of semiconductor materials during the epitaxial growth process of the micro light emitting device 100 .
  • an ohmic contact material 60 is provided on the second semiconductor layer 13, the insulating protective layer 14 covers the ohmic contact material 60, and the second electrode 30 is electrically connected to the second semiconductor 13, for example, through the ohmic contact material 60, for example, referring to FIG. 1
  • an ITO (indium tin oxide) layer is provided as an ohmic contact material 60 on the side of the second semiconductor 13 away from the active layer 13 to form an ohmic contact connection between the second electrode 30 and the second semiconductor layer 13 .
  • the first electrode 20 is arranged on the side surface 142, the area originally required to be occupied on the top surface 141 is shared by the side surface 142, thus reducing the area occupied by the first electrode 20 on the top surface 141, compared to As far as the positive and negative electrodes of a traditional flip chip are located on the same top surface, the distance between the first electrode 20 and the second electrode 30 in this embodiment is relatively extended, so that a certain safety distance between the two can be ensured. The size of the micro light emitting device 100 is further reduced.
  • the third embodiment of the present application provides another micro light emitting device 100, this embodiment is based on the micro light emitting device 100 provided in the first embodiment of the present application, the first electrode 20 is arranged on the top surface 141, and the second electrode 30 is arranged on the side surface 142 on.
  • side 142 includes second side 1422 .
  • the top surface 141 includes a second top surface 1412.
  • the second top surface 1412 is located on the side of the first semiconductor layer 11 adjacent to the active layer 12.
  • a second opening 152 is provided on the second top surface 1412
  • the first electrode 20 is provided on the second top surface 1412 and is electrically connected to the first semiconductor layer 11 through the second opening 152
  • the second electrode 30 is disposed on the second side 1422 .
  • the top surface 141 includes a first top surface 1411 located on a side of the second semiconductor layer 13 away from the active layer 12 . As shown in FIG. 3 , a first opening 151 is disposed on the first top surface 1411 , and the second electrode 30 is located on the second side surface 1422 and is electrically connected to the second semiconductor layer 13 through the first opening 151 .
  • the second side 1422 is provided with a fourth opening 154
  • the second electrode 30 is provided on the second side 1422 and is electrically connected to the second semiconductor layer through the fourth opening 154 13.
  • the second electrode 30 shown in FIG. 4 can also extend to the first top surface 1411, which is beneficial to expand the area of the second electrode 30 and form a good conduction effect.
  • the second electrode 30 can also be completely disposed on the second side surface 1422 without extending to the first top surface 1411 , which is not limited in this embodiment.
  • This embodiment does not limit the specific position of the side 142 where the second electrode 30 is located, that is, the second side 1422.
  • the device 100 has four side surfaces 142 up, down, left, and right as shown in FIG. The lower side 142.
  • the micro light emitting device 100 provided in this embodiment further includes, for example, a buffer layer 40 disposed on the side of the first semiconductor layer 11 away from the active layer 12.
  • the buffer layer 40 During the epitaxial growth of the micro light emitting device 100, a core may be provided for the production of semiconductor material.
  • an ohmic contact material 60 is provided on the second semiconductor layer 13, the insulating protection layer 14 covers the ohmic contact material 60, and the second electrode 30 is electrically connected to the second semiconductor 13, for example, through the ohmic contact material 60, for example, referring to FIG. 3
  • An ITO (Indium Tin Oxide) layer is further provided on the side of the second semiconductor 13 away from the active layer 13 as the ohmic contact material 60 so that the second electrode 30 and the second semiconductor layer 13 form an ohmic contact connection.
  • the second electrode 30 is arranged on the side surface 142, the area originally required to be occupied on the top surface 141 is shared by the side surface 142, thus reducing the area occupied by the second electrode 30 on the top surface 141.
  • the distance between the first electrode 20 and the second electrode 30 is relatively extended, so that the miniature light-emitting device can be further reduced while ensuring a certain safe distance between the two. 100 in size.
  • the fourth embodiment of the present application provides another micro light emitting device 100, this embodiment is based on the micro light emitting device 100 provided in the first embodiment of the present application, wherein the side 142 includes a third side 1423 and a fourth side 1424, the first electrode 20 is located on the third side 1423 , and the second electrode 30 is located on the fourth side 1424 .
  • the third side 1423 and the fourth side 1424 may be adjacent or non-adjacent, for example, preferably the third side 1423 and the fourth side 1424 are disposed opposite to each other.
  • FIG. 10 is a schematic top view of a micro light emitting device 100 in an embodiment of the present application, and the third side 1423 and the fourth side 1424 are adjacently arranged. For example, as shown in FIG.
  • the third side 1423 and the fourth side 1424 are oppositely arranged.
  • the third side 1423 and the fourth side 1424 are preferably the pair with the farthest distance among the sets of opposite sides.
  • the top surface 141 includes a first top surface 1411 and a second top surface 1412, and the first top surface 1411 is located on the side of the second semiconductor layer 13 away from the active layer 12 , the second top surface 1412 is located on the side of the first semiconductor 11 adjacent to the active layer 12, the first top surface 1411 is provided with the first opening 151, the second top surface 1412 is provided with the second opening 152, the first electrode 20
  • the second electrode 30 is disposed on the fourth side 1424 and electrically connected to the second semiconductor 13 through the first opening 151 .
  • the second electrode 30 is disposed on the fourth side 1424 and electrically connected to the second semiconductor layer 13 through the sixth opening 156 .
  • the first electrode 20 can also extend to the second top surface 1412 , for example, and the second electrode 30 can also extend to the first top surface 1411 , which is not limited in this embodiment.
  • the micro light-emitting device 100 provided in this embodiment further includes, for example, a buffer layer 40 disposed on the side of the first semiconductor layer 11 away from the active layer 12.
  • the buffer layer 40 During the epitaxial growth of the micro light emitting device 100, a core may be provided for the production of semiconductor material.
  • an ohmic contact material 60 is provided on the second semiconductor layer 13, the insulating protective layer 14 covers the ohmic contact material 60, and the second electrode 30 is electrically connected to the second semiconductor 13, for example, through the ohmic contact material 60, for example, referring to FIG. 5
  • An ITO (Indium Tin Oxide) layer is further provided on the side of the second semiconductor 13 away from the active layer 13 as the ohmic contact material 60 so that the second electrode 30 and the second semiconductor layer 13 form an ohmic contact connection.
  • the first electrode 20 and the second electrode 30 are both arranged on the side surface 142, the area originally required to be occupied on the top surface 141 is shared by the side surface 142.
  • the distance between the first electrode 20 and the second electrode 30 is relatively extended, so that the size of the micro light emitting device 100 can be further reduced while ensuring a certain safe distance between them.
  • the first electrode 20 and the second electrode 30 are both located on the side, the occupied area of the top surface is reduced, which is beneficial for the micro light-emitting device 10 to emit light along the normal direction of the top surface 141 (that is, the vertical direction in FIGS. 1 to 7 ). , can emit light upward or downward, and can achieve better light transmission effect.
  • the fifth embodiment of the present application provides another micro light emitting device 100.
  • the micro light emitting device 100 provided in this embodiment can be based on any one of the first embodiment, the second embodiment, the third embodiment and the fourth embodiment of the present application.
  • the micro light-emitting device 100 provided in this embodiment further includes a first solder metal layer 51 and a second solder metal layer 52. As shown in FIG.
  • the second solder metal layer 52 covers the side of the second electrode 30 away from the insulating layer 14 .
  • first electrode 20 and the second electrode 30 are, for example, high-melting-point metals whose melting point is higher than 500°C, such as Au, etc.
  • first welding metal layer 51 and the second welding metal layer 52 are, for example, low-melting metals whose melting point is lower than 330°C. Melting point metals, such as Sn (tin), etc.
  • the micro light emitting device 100 provided by this embodiment further includes, for example, a buffer layer disposed on the side of the first semiconductor layer 11 away from the active layer 12 40.
  • the buffer layer 40 can provide a core for the production of semiconductor materials during the epitaxial growth process of the micro light emitting device 100.
  • an ohmic contact material 60 is provided on the second semiconductor layer 13, the insulating protection layer 14 covers the ohmic contact material 60, and the second electrode 30 is electrically connected to the second semiconductor 13, for example, through the ohmic contact material 60, for example, referring to FIG. 7
  • An ITO (Indium Tin Oxide) layer is further provided on the side of the second semiconductor 13 away from the active layer 13 as the ohmic contact material 60 so that the second electrode 30 and the second semiconductor layer 13 form an ohmic contact connection.

Abstract

本申请实施例公开的一种微型发光器件，包括：发光功能层，包括第一半导体层、有源层、第二半导体层和绝缘保护层，所述第一半导体层、所述有源层和所述第二半导体层依次堆叠，所述绝缘层沿从所述第二半导体层向所述第一半导体层延伸的方向覆盖所述第一半导体层、所述有源层和所述第二半导体层，并形成所述绝缘保护层的顶面和与所述顶面相连的侧面；第一电极，贯穿所述绝缘保护层并电连接所述第一半导体层；第二电极，贯穿所述绝缘保护层并电连接所述第二半导体层；其中，所述第一电极和所述第二电极中的至少一者设置在所述侧面。本申请公开的微型发光器件能够在保持安全距离的情况下进一步的缩小尺寸。

Description

微型发光器件 技术领域
本申请涉及显示技术领域，尤其涉及一种微型发光器件。
背景技术
Micro-LED(Microlight-emitting diode,微米发光二极管)芯片具有尺寸小、集成度高和自发光等特点，被认为是最有前途的下一代新型显示技术，早期的LED(Light-emitting diode，发光二极管)显示屏像素采用红绿蓝(RGB)三基色的LED结合而成，由于封装体尺寸较大，使得像素间距达到20mm(pixel pitch 20mm,P20)左右。随着芯片尺寸缩小和封装水平提高，微米LED(micro LED)则进一步把芯片尺寸缩减至50μm以下，然而Micro-LED芯片的正负电极之间需要保持一定的安全距离，普通的倒装结构正负电极同位于顶面一侧，使得进一步缩小芯片的尺寸变得困难。
因此，亟需提供一种新的微型发光器件，以在保持安全距离的情况下进一步的缩小尺寸。
发明内容
因此，为克服现有技术中的至少部分缺陷，本申请实施例提供了一种微型发光器件，能够在保持安全距离的情况下进一步的缩小尺寸。
具体地，一方面，本申请一个实施例提供一种微型发光器件，包括：发光功能层，包括第一半导体层、有源层、所述第二半导体层和绝缘保护层，所述第一半导体层、所述有源层和第二半导体层依次堆叠，所述绝缘层沿从所述第二半导体层向所述第一半导体层延伸的方向覆盖所述第一半导体层、所述有源层和所述第二半导体层，并形成所述绝缘保护层的顶面和与所述顶面相连的侧面；第一电极，贯穿所述绝缘保护层并电连接所述第一半导体层；第二电极，贯穿所述绝缘保护层并电连接所述第二半导体层；其中，所述第一电极和所述第二电极中的至少一者设置在所述侧面。
在本申请的一个实施例中，所述第一电极和所述第二电极之一设置在所述侧面上，所述第一电极和所述第二电极之另一设置在所述顶面上。
在本申请的一个实施例中，所述顶面包括第一顶面，所述第一顶面位于所述第二半导体层远离所述有源层的一侧，所述第一顶面设置有第一开口，所述第一电极设置在所述侧面上，所述第二电极设置在所述第一顶面上且通过所述第一开口电连接所述第二半导体层。
在本申请的一个实施例中，所述侧面包括第一侧面，所述顶面还包括第二顶面，所述第二顶面位于所述第一半导体层邻近所述有源层的一侧，所述第二顶面设置有第二开口，所述第一电极设置在所述第一侧面上且通过所述第二开口电连接所述第一半导体层。
在本申请的一个实施例中，所述侧面包括第一侧面，所述第一侧面设置有第三开口，所述 第一电极设置在所述第一侧面上且通过所述第三开口电连接所述第一半导体层。
在本申请的一个实施例中，所述顶面包括第二顶面，所述第二顶面位于所述第一半导体层邻近所述有源层的一侧，所述第二顶面设置有第二开口，所述第一电极设置在所述第二顶面上且通过所述第二开口电连接所述第一半导体层，所述第二电极设置在所述侧面上。
在本申请的一个实施例中，所述侧面包括第二侧面，所述顶面包括第一顶面，所述第一顶面位于所述第二半导体层远离所述有源层的一侧，所述第一顶面上设置有第一开口，所述第二电极位于所述第二侧面上且通过所述第一开口电连接所述第二半导体层。
在本申请的一个实施例中，所述侧面包括第二侧面，所述第二侧面上设置有第四开口，所述第二电极位于所述第二侧面上且通过所述第四开口电连接所述第二半导体层。
在本申请的一个实施例中，所述侧面包括第三侧面和第四侧面，所述第一电极和所述第二电极分别位于所述第三侧面和所述第四侧面上。
在本申请的一个实施例中，所述第三侧面和所述第四侧面相对设置。
在本申请的一个实施例中，所述顶面包括第一顶面和第二顶面，所述第一顶面位于所述第二半导体远离所述有源层的一侧，所述第二顶面位于所述第一半导体邻近所述有源层的一侧，所述第一顶面上设置有第一开口，所述第二顶面上设置有第二开口，所述第一电极通过所述第二开口电连接所述第一半导体层，所述第二电极通过所述第一开口电连接所述第二半导体层。
在本申请的一个实施例中，所述第三侧面上设置有第五开口，所述第四侧面上设置有第六开口，所述第一电极通过所述第五开口电连接所述第一半导体层，所述第二电极通过所述第六开口电连接所述第二半导体层。
在本申请的一个实施例中，所述微型发光器件还包括第一焊接金属层和第二焊接金属层，所述第一焊接金属层覆盖在所述第一电极上远离所述绝缘保护层的一侧，所述第二焊接金属层覆盖在所述第二电极上远离所述绝缘保护层的一侧。
由上可知，本申请上述实施例可以达成以下一个或多个有益效果：将微型发光器件的第一电极和第二电极中至少一个设置到侧面，使得二者位置相错开，可以减少在顶面占用的面积，在需要保持一定的安全距离的情况下，有利于缩小微型发光器件的尺寸。
通过以下参考附图的详细说明，本申请的其它方面和特征变得明显。但是应当知道，该附图仅仅为解释的目的设计，而不是作为本申请的范围的限定。还应当知道，除非另外指出，不必要依比例绘制附图，它们仅仅力图概念地说明此处描述的结构和流程。
附图说明
下面将结合附图，对本申请的具体实施方式进行详细的说明。
图1为本申请第二实施例提供的一种微型发光器件的结构示意图。
图2为本申请第二实施例提供的另一种微型发光器件的结构示意图。
图3为本申请第三实施例提供的一种微型发光器件的结构示意图。
图4为本申请第三实施例提供的另一种微型发光器件的结构示意图。
图5为本申请第四实施例提供的一种微型发光器件的结构示意图。
图6为本申请第四实施例提供的另一种微型发光器件的结构示意图。
图7为本申请第五实施例提供的一种微型发光器件的结构示意图。
图8为本申请一个实施例提供的一种微型发光器件的俯视示意图。
图9为本申请另一个实施例提供的一种微型发光器件的俯视示意图。
图10为本申请另一个实施例提供的一种微型发光器件的俯视示意图。
【附图标记说明】
10：发光功能层；11：第一半导体层；12：有源层；13：第二半导体层；14：绝缘保护层；141：顶面；1411：第一顶面；1412：第二顶面；142：侧面；1421：第一侧面；1422：第二侧面；1423：第三侧面；1424：第四侧面；151：第一开口；152：第二开口；153：第三开口；154：第四开口；155：第五开口；156：第六开口；20：第一电极；30：第二电极；40：缓冲层；51：第一焊接金属层；52：第二焊接金属层；60：欧姆接触材料。
具体实施方式
为使本申请的上述目的、特征和优点能够更加明显易懂，下面结合附图对本申请的具体实施方式做详细的说明。
为了使本领域普通技术人员更好地理解本申请的技术方案，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分的实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都应当属于本申请保护的范围。
需要说明的是，本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应当理解这样使用的术语在适当情况下可以互换，以便这里描述的本申请实施例能够以除了在这里图示或描述的那些以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其他步骤或单元。
还需要说明的是，本申请中多个实施例的划分仅是为了描述的方便，不应构成特别的限定，各种实施例中的特征在不矛盾的情况下可以相结合，相互引用。
【第一实施例】
本申请第一实施例提供一种微型发光器件100，包括发光功能层10、第一电极20和第二电 极30。参照图1～图7，发光功能层10包括第一半导体层11、有源层12、第二半导体层13和绝缘保护层14，其中第一半导体层11、有源层12和第二半导体层13依次堆叠，绝缘保护层14沿从第二半导体层13向第一半导体层11延伸的方向覆盖第一半导体层11、有源层12和第二半导体层13，并形成绝缘保护层14的顶面141和与顶面141相连的侧面142。第一电极20贯穿绝缘保护层14并电连接第一半导体层11，第二电极30贯穿绝缘保护层14并电连接第二半导体层13。其中第一电极20和第二电极30中的至少一者设置在侧面142上，例如第一电极20设置在侧面142上，第二电极30设置在顶面141上；或者第二电极30设置在侧面142上，第一电极20设置在顶面141上，再或者第一电极20和第二电极30都设置在侧面142上。如此，一方面，将第一电极20或者第二电极30设置在侧面可减少电极在顶面141占用的面积，在保证第一电极20和第二电极30之间一定的安全距离的前提下，还能进一步缩小微型发光器件100的尺寸。
其中，微型发光器件100例如为Micro-LED芯片，其中第一半导体层11例如为n型半导体层，第一电极20即为微型发光器件100的N电极(负电极)，有源层12例如为多层量子阱层(MQW)，第二半导体层13例如为p型半导体层，第二电极30即为微型发光器件100的P电极(正电极)。微型发光器件100例如为蓝色Micro-LED时，第一半导体层11可以是n型氮化镓(n-GaN)层，第二半导体层13例如可以是p型氮化镓层(p-GaN)。有源层12和第二半导体层13堆叠在第一半导体层11上，但例如并不完全覆盖第一半导体层11，例如参照图1所示的方位，有源层12和第二半导体层13例如只覆盖第一半导体层11的左边部分。或者参照图8～图10，为本申请一些实施例提供的微型发光器件100的俯视结构示意图，其中，例如图8所示的结构，有源层12和第二半导体层13覆盖第一半导体层11的左下部分，暴露出第一半导体层11的右边和上边部分；例如图9所示的结构，有源层12和第二半导体层13覆盖第一半导体层11的下边部分，暴露出第一半导体层11的上边部分；再或者如图10所示的结构，有源层12和第二半导体层13覆盖第一半导体层11的左边中间部分，暴露出第一半导体层11的右边、上边和下边部分。当然，以上只是本实施例的部分举例说明，且本实施例并不限制微型发光器件100的俯视形状为如图8～10所示的四边形，还可以是其他形状。第一电极20和第二电极30例如可以是Au(金)、Pt(铂)、Ni(镍)等金属材料，绝缘保护层14例如为氧化硅材料，绝缘保护层14将第一电极20和第二电极30与内层结构绝缘，绝缘保护层14例如具有分别与第一半导体层11和第二半导体层13对应的开口，使得第一电极20和第二电极30可以分别贯穿绝缘保护层14以电连接第一半导体层11和第二半导体层13。在一些实施例中，微型发光器件100例如还包括设置在第一半导体层11远离有源层12的一侧的缓冲层40，缓冲层40在微型发光器件100的外延生长过程中可以为半导体材料的生产提供核心。在一些实施例中，第二半导体层13上设置欧姆接触材料60，绝缘保护层14覆盖欧姆接触材料60，第二电极30例如通过 欧姆接触材料60与第二半导体13电连接，例如参照图1，在第二半导体13远离有源层13的一侧还设置有ITO(氧化铟锡)层作为欧姆接触材料60以使第二电极30和第二半导体层13形成欧姆接触连接。
现有倒装Micro-LED的结构中正电极(P电极)和负电极(N电极)往往设置在芯片的同一侧(同位于顶面)，而两个电极分别占据一定的面积，在需要保持一定的安全距离的情况下，Micro-LED芯片的尺寸难以进一步缩小。本实施例通过将第一电极20和第二电极30设置位置错开，有利于缩小微型发光器件100的尺寸。
【第二实施例】
本申请第二实施例提供另一种微型发光器件100，本实施例中基于本申请第一实施例提供的微型发光器件100，第一电极20设置在侧面142上，第二电极30设置在顶面141。
具体地，在一个实施例中，顶面141包括第一顶面1411，第一顶面1411位于第二半导体层13远离有源层12的一侧，第一顶面1411设置有第一开口151，第一电极20设置在侧面142上，第二电极30设置在第一顶面1411上且通过第一开口151电连接第二半导体层13。侧面142包括第一侧面1421，第一电极20设置在第一侧面1421上。
更具体地，在一个实施例中，参照图1，顶面141还包括第二顶面1412，第二顶面1412位于第一半导体层11邻近有源层12的一侧，且第二顶面1412上设置有第二开口152。第一电极20设置在第一侧面1421上且通过第二开口152电连接第一半导体层11。本实施例中例如图1中所示的方位，第二顶面1412位于第一半导体层11的左上方。
或者，在另一个具体实施例中，参照图2，第一侧面1421上设置有第三开口153，第一电极20设置在第一侧面1421上且通过第三开口153电连接第一半导体11。需要注意的是，如图2所示的第一电极20设置在第一侧面1421时，还可延伸至第二顶面1412，有利于扩大第一电极20的面积，形成良好的导通效果。当然，第一电极20也可以完全设置在第一侧面1421而不延伸至第二顶面1412，本实施例并不限制。
本实施例中并不限定第一电极20所在的侧面142即第一侧面1421的具体位置，例如参照图8，其为本申请一个实施例中提供的微型发光器件100的俯视结构示意图，例如微型发光器件100具有如图8所示的上下左右四个侧面142，第一侧面1421可以是该四个侧面142中的任意一个，如图8示出了第二顶面1421位于第一顶面1411右边和上边的结构，则第一侧面1421例如为右边和上边的侧面142时，第一电极20可以位于第一侧面1421并延伸至第二顶面1412上，或者第一侧面1421为下边的侧面142时，第一电极20例如可以位于图8中的右下角位置，也可以延伸至第二顶面1421。
当然与第一实施例相似的，如图1和图2所示，本实施例提供的微型发光器件100例如还包括设置在第一半导体层11远离有源层12的一侧的缓冲层40，缓冲层40在微型发光器件100 的外延生长过程中可以为半导体材料的生产提供核心。在一些实施例中，第二半导体层13上设置欧姆接触材料60，绝缘保护层14覆盖欧姆接触材料60，第二电极30例如通过欧姆接触材料60与第二半导体13电连接，例如参照图1和图2，在第二半导体13远离有源层13的一侧还设置有ITO(氧化铟锡)层作为欧姆接触材料60以使第二电极30和第二半导体层13形成欧姆接触连接。
在本实施例中，由于第一电极20被设置在侧面142上，原来需要在顶面141上占用的面积被侧面142分担，如此减少了第一电极20在顶部141上的占用面积，相对于传统倒装芯片正负电极同位于顶面而言，本实施例中第一电极20和第二电极30之间的距离相对被拉远，如此可在保证二者之间一定安全距离的情况下进一步缩小微型发光器件100的尺寸。
【第三实施例】
本申请第三实施例提供另一种微型发光器件100，本实施例基于本申请第一实施例提供的微型发光器件100，第一电极20设置在顶面141上，第二电极30设置在侧面142上。
具体地，在一个实施例中，侧面142包括第二侧面1422。顶面141包括第二顶面1412，第二顶面1412位于第一半导体层11邻近有源层12的一侧，本实施例中例如图3中所示的方位，第二顶面1412位于第一半导体层11的左上方，第二顶面1412上设置有第二开口152，第一电极20设置在第二顶面1412上且通过第二开口152电连接第一半导体层11，第二电极30设置在第二侧面1422上。
更具体地，在一个实施例中，顶面141包括第一顶面1411，位于第二半导体层13远离有源层12的一侧。如图3所示，第一顶面1411上设置有第一开口151，第二电极30位于第二侧面1422上且通过第一开口151电连接第二半导体层13。
或者，在另一个实施例中，如图4所示，第二侧面1422上设置有第四开口154，第二电极30设置在第二侧面1422上且通过第四开口154电连接第二半导体层13。需要注意的是，如图4所示的第二电极30设置在第二侧面1422时，还可延伸至第一顶面1411，有利于扩大第二电极30的面积，形成良好的导通效果。当然，第二电极30也可以完全设置在第二侧面1422而不延伸至第一顶面1411，本实施例并不限制。
本实施例并不限定第二电极30所在的侧面142即第二侧面1422的具体位置，例如参照图9，其为本申请一个实施例中提供的微型发光器件100的俯视结构示意图，例如微型发光器件100具有如图9所示的上下左右四个侧面142，第二顶面1412例如位于第一顶面1411的上侧，则第二侧面1422可以是如图9中所示的左边、右边和下边的侧面142。
当然与第一实施例相似的，如图3所示，本实施例提供的微型发光器件100例如还包括设置在第一半导体层11远离有源层12的一侧的缓冲层40，缓冲层40在微型发光器件100的外延生长过程中可以为半导体材料的生产提供核心。在一些实施例中，第二半导体层13上设置欧 姆接触材料60，绝缘保护层14覆盖欧姆接触材料60，第二电极30例如通过欧姆接触材料60与第二半导体13电连接，例如参照图3，在第二半导体13远离有源层13的一侧还设置有ITO(氧化铟锡)层作为欧姆接触材料60以使第二电极30和第二半导体层13形成欧姆接触连接。
在本实施例中，由于第二电极30被设置在侧面142上，原来需要在顶面141上占用的面积被侧面142分担，如此减少了第二电极30在顶部141的占用面积，相对于传统倒装芯片正负电极同位于顶面而言，第一电极20和第二电极30之间的距离相对被拉远，如此可在保证二者之间一定安全距离的情况下进一步缩小微型发光器件100的尺寸。
【第四实施例】
本申请的第四实施例提供另一种微型发光器件100，本实施例基于本申请第一实施例提供的微型发光器件100，其中侧面142包括第三侧面1423和第四侧面1424，第一电极20位于第三侧面1423上，第二电极30位于第四侧面1424上。其中第三侧面1423和第四侧面1424例如可以相邻或者不相邻，优选的第三侧面1423和第四侧面1424相对设置。例如图10中所示为本申请一个实施例中微型发光器件100的俯视结构示意图，第三侧面1423和第四侧面1424相邻设置。例如图5和图6中所示第三侧面1423和第四侧面1424相对设置。例如多个侧面142中有几组相对设置的侧面，则第三侧面1423和第四侧面1424优选为该几组相对设置的侧面中距离最远的一对。
具体地，在一个实施例中，如图5所示，顶面141包括第一顶面1411和第二顶面1412，第一顶面1411位于第二半导体层13远离有源层12的一侧，第二顶面1412位于第一半导体11邻近有源层12的一侧，第一顶面1411上设置有第一开口151，第二顶面1412上设置有第二开口152，第一电极20设置在第三侧面1423上且通过第二开口152电连接第一半导体11，第二电极30设置在第四侧面1424上且通过第一开口151电连接第二半导体13。
或者，在另一个实施例中，如图6所示，第三侧面1423上设置有第五开口155，第四侧面1424上设置有第六开口156，第一电极20设置在第三侧面1423上且通过第五开口155电连接第一半导体层11，第二电极30设置在第四侧面1424上且通过第六开口156电连接第二半导体层13。其中第一电极20例如还可延伸至第二顶面1412，第二电极30例如还可延伸至第一顶面1411上，本实施例并不限制。
当然与第一实施例相似的，如图5所示，本实施例提供的微型发光器件100例如还包括设置在第一半导体层11远离有源层12的一侧的缓冲层40，缓冲层40在微型发光器件100的外延生长过程中可以为半导体材料的生产提供核心。在一些实施例中，第二半导体层13上设置欧姆接触材料60，绝缘保护层14覆盖欧姆接触材料60，第二电极30例如通过欧姆接触材料60与第二半导体13电连接，例如参照图5，在第二半导体13远离有源层13的一侧还设置有ITO(氧化铟锡)层作为欧姆接触材料60以使第二电极30和第二半导体层13形成欧姆接触连接。
本实施例中，由于第一电极20和第二电极30均被设置在侧面142上，原来需要在顶面141上占用的面积被侧面142分担，相对于传统倒装芯片正负电极同位于顶面而言，第一电极20和第二电极30之间的距离相对被拉远，如此可在保证二者之间一定安全距离的情况下进一步缩小微型发光器件100的尺寸。且由于第一电极20和第二电极30均位于侧面，减少了顶面的占用面积，有利于微型发光器件10沿顶面141的法向方向出光(即图1～图7的竖直方向)，可以向上或者向下发光，能实现更好的透光效果。
【第五实施例】
本申请第五实施例提供另一种微型发光器件100，本实施例提供的微型发光器件100可基于本申请第一实施例、第二实施例、第三实施例和第四实施例中任意一实施例提供的微型发光器件100。本实施例提供的微型发光器件100还包括第一焊接金属层51和第二焊接金属层52，如图7所示，第一焊接金属层51覆盖在第一电极20上远离绝缘层14的一侧，第二焊接金属层52覆盖在第二电极30上远离绝缘层14的一侧。其中第一电极20和第二电极30例如为材料熔点高于500℃的高熔点金属，例如Au等，第一焊接金属层51和第二焊接金属层52例如为材料熔点低于330℃的低熔点金属，例如Sn(锡)等。通过对第一焊接金属层51和第二焊接金属层52进行加热熔化可以使本实施例提供的微型发光器件100与键合电极之间快速焊接。
当然与第一实施例至第四实施例相似的，如图7所示，本实施例提供的微型发光器件100例如还包括设置在第一半导体层11远离有源层12的一侧的缓冲层40，缓冲层40在微型发光器件100的外延生长过程中可以为半导体材料的生产提供核心。在一些实施例中，第二半导体层13上设置欧姆接触材料60，绝缘保护层14覆盖欧姆接触材料60，第二电极30例如通过欧姆接触材料60与第二半导体13电连接，例如参照图7，在第二半导体13远离有源层13的一侧还设置有ITO(氧化铟锡)层作为欧姆接触材料60以使第二电极30和第二半导体层13形成欧姆接触连接。
以上所述，仅是本申请的较佳实施例而已，并非对本申请作任何形式上的限制，虽然本申请已以较佳实施例揭露如上，然而并非用以限定本申请，任何熟悉本专业的技术人员，在不脱离本申请技术方案范围内，当可利用上述揭示的技术内容作出些许更动或修饰为等同变化的等效实施例，但凡是未脱离本申请技术方案内容，依据本申请的技术实质对以上实施例所作的任何简单修改、等同变化与修饰，均仍属于本申请技术方案的范围内。

Claims (13)

  1. 一种微型发光器件，包括：
    发光功能层，包括第一半导体层、有源层、第二半导体层和绝缘保护层，所述第一半导体层、所述有源层和所述第二半导体层依次堆叠，所述绝缘层沿从所述第二半导体层向所述第一半导体层延伸的方向覆盖所述第一半导体层、所述有源层和所述第二半导体层，并形成所述绝缘保护层的顶面和与所述顶面相连的侧面；
    第一电极，贯穿所述绝缘保护层并电连接所述第一半导体层；
    第二电极，贯穿所述绝缘保护层并电连接所述第二半导体层；
    其中，所述第一电极和所述第二电极中的至少一者设置在所述侧面。
  2. 如权利要求1所述的微型发光器件，其中，所述第一电极和所述第二电极之一设置在所述侧面上，所述第一电极和所述第二电极之另一设置在所述顶面上。
  3. 如权利要求2所述的微型发光器件，其中，所述顶面包括第一顶面，所述第一顶面位于所述第二半导体层远离所述有源层的一侧，所述第一顶面设置有第一开口，所述第一电极设置在所述侧面上，所述第二电极设置在所述第一顶面上且通过所述第一开口电连接所述第二半导体层。
  4. 如权利要求3所述的微型发光器件，其中，所述侧面包括第一侧面，所述顶面还包括第二顶面，所述第二顶面位于所述第一半导体层邻近所述有源层的一侧，所述第二顶面设置有第二开口，所述第一电极设置在所述第一侧面上且通过所述第二开口电连接所述第一半导体层。
  5. 如权利要求3所述的微型发光器件，其中，所述侧面包括第一侧面，所述第一侧面设置有第三开口，所述第一电极设置在所述第一侧面上且通过所述第三开口电连接所述第一半导体层。
  6. 如权利要求2所述的微型发光器件，其中，所述顶面包括第二顶面，所述第二顶面位于所述第一半导体层邻近所述有源层的一侧，所述第二顶面设置有第二开口，所述第一电极设置在所述第二顶面上且通过所述第二开口电连接所述第一半导体层，所述第二电极设置在所述侧面上。
  7. 如权利要求6所述的微型发光器件，其中，所述侧面包括第二侧面，所述顶面包括第一顶面，所述第一顶面位于所述第二半导体层远离所述有源层的一侧，所述第一顶面上设置有第一开口，所述第二电极位于所述第二侧面上且通过所述第一开口电连接所述第二半导体层。
  8. 如权利要求6所述的微型发光器件，其中，所述侧面包括第二侧面，所述第二侧面上设置有第四开口，所述第二电极位于所述第二侧面上且通过所述第四开口电 连接所述第二半导体层。
  9. 如权利要求1所述的微型发光器件，其中，所述侧面包括第三侧面和第四侧面，所述第一电极和所述第二电极分别位于所述第三侧面和所述第四侧面上。
  10. 如权利要求9所述的微型发光器件，其中，所述第三侧面和所述第四侧面相对设置。
  11. 如权利要求9所述的微型发光器件，其中，所述顶面包括第一顶面和第二顶面，所述第一顶面位于所述第二半导体远离所述有源层的一侧，所述第二顶面位于所述第一半导体邻近所述有源层的一侧，所述第一顶面上设置有第一开口，所述第二顶面上设置有第二开口，所述第一电极通过所述第二开口电连接所述第一半导体层，所述第二电极通过所述第一开口电连接所述第二半导体层。
  12. 如权利要求9所述的微型发光器件，其中，所述第三侧面上设置有第五开口，所述第四侧面上设置有第六开口，所述第一电极通过所述第五开口电连接所述第一半导体层，所述第二电极通过所述第六开口电连接所述第二半导体层。
  13. 如权利要求1-12所述的微型发光器件，还包括：第一焊接金属层和第二焊接金属层，所述第一焊接金属层覆盖在所述第一电极上远离所述绝缘保护层的一侧，所述第二焊接金属层覆盖在所述第二电极上远离所述绝缘保护层的一侧。
PCT/CN2021/138847 2021-12-16 2021-12-16 微型发光器件 WO2023108551A1 (zh)

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CN108288664A (zh) * 2017-01-10 2018-07-17 英属开曼群岛商錼创科技股份有限公司 微型发光二极管晶片
CN112289901A (zh) * 2020-10-28 2021-01-29 錼创显示科技股份有限公司 微型发光元件及微型发光元件显示装置
CN112447785A (zh) * 2020-11-23 2021-03-05 厦门天马微电子有限公司 一种发光二极管显示面板及其制备方法、显示装置
CN113328021A (zh) * 2021-05-10 2021-08-31 厦门三安光电有限公司 微发光二极管、微发光元件及显示器

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Publication number Priority date Publication date Assignee Title
CN108288664A (zh) * 2017-01-10 2018-07-17 英属开曼群岛商錼创科技股份有限公司 微型发光二极管晶片
CN112289901A (zh) * 2020-10-28 2021-01-29 錼创显示科技股份有限公司 微型发光元件及微型发光元件显示装置
CN112447785A (zh) * 2020-11-23 2021-03-05 厦门天马微电子有限公司 一种发光二极管显示面板及其制备方法、显示装置
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