WO2023098199A1 - High-power-density auxiliary power supply based on self-excited buck converter - Google Patents

High-power-density auxiliary power supply based on self-excited buck converter Download PDF

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WO2023098199A1
WO2023098199A1 PCT/CN2022/117122 CN2022117122W WO2023098199A1 WO 2023098199 A1 WO2023098199 A1 WO 2023098199A1 CN 2022117122 W CN2022117122 W CN 2022117122W WO 2023098199 A1 WO2023098199 A1 WO 2023098199A1
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circuit
capacitor
voltage
resistor
pmos transistor
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PCT/CN2022/117122
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French (fr)
Chinese (zh)
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钱钦松
董天昊
谷诚
郑德军
孙伟锋
时龙兴
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东南大学
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/36Means for starting or stopping converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/44Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the invention relates to a self-excited DC-DC step-down converter auxiliary power supply with high power density, which is applicable to the application occasions of high voltage input and low voltage output.
  • self-excited converters have the advantages of simple circuit structure, high efficiency, and low cost compared with linear voltage regulators and other-excited converters.
  • Chinese patent ZL99108088.2 discloses a self-excited DC-DC converter in the form of a bipolar transistor, as shown in FIG. 1 .
  • Including the step-down converter circuit composed of PNP transistor Q1, inductor L1, diode D1 and capacitor C2 Vo is the DC output voltage
  • Vi is the DC input voltage
  • the negative terminal of Vi is directly connected to the negative terminal of Vo
  • R7 is the output load
  • the capacitor C2 is connected in parallel across the load R7.
  • the coupled inductor L2 is connected to the emitter and the base of the transistor Q1 through the capacitor C1 and the resistor R3 respectively, and is connected to the emitter and the collector of the transistor Q2.
  • the base of the transistor Q1 is connected to the negative terminals of the DC input and the DC output through the resistor R4.
  • the transistor Q2 is connected to the emitter of the transistor Q1 and the collector of the transistor Q3 through the resistors R1 and R2 respectively.
  • the resistor R5 and the resistor R6 are connected in parallel to both ends of the load R7 through a series branch, and the connection point between R5 and R6 is connected to the base of the transistor Q3.
  • the emitter of the transistor Q3 is connected to the negative terminals of the DC input and the DC output.
  • the working principle of the bipolar transistor self-excited DC-DC converter is as follows: when the input voltage is powered on, Q1 is saturated and turned on, diode D1 and transistor Q2 are cut off, and Q1, L1, C2, R7, R5, R6 form loop, so that the inductor L1 and the capacitor C2 are charged.
  • the current through L1 gradually increases, and the output voltage increases at the same time, and the emitter-collector voltage of transistor Q1 increases accordingly, so that the operating point of transistor Q1 gradually exits the saturation region, and the voltage at both ends of L1 decreases.
  • the voltage across the coupling inductor L2 also decreases accordingly, which increases the shunt flow of the base current of the transistor Q1, causing the base current and collector current of Q1 to decrease rapidly. This phenomenon will make the emitter-collector of Q1
  • the electrode voltage increases further, whereby the circuit enters a deep positive feedback state. The result of this state is that the collector current through the transistor Q1 decreases rapidly.
  • the diode D1 conducts to freewheel the L1, and then Q1 is cut off.
  • L1, C2, R7, R5, R6, and D1 form a loop and enter the state of energy release.
  • the diode D1 After the discharge of the inductor L1 is completed, the diode D1 is cut off, and the Q1 is saturated and turned on again, and enters the next self-excited cycle. After several working cycles, the output voltage Vo reaches the set voltage value, and the voltage feedback circuits R5, R6, Q3, R1, R2 start to work. When the output voltage value is higher than the set voltage value, the transistor Q3 enters the conduction state, causing Q2 to conduct and shunt a part of the base current of Q1, so that the transistor Q1 is turned off in advance, so that the conduction time of Q1 is reduced and the off time is reduced.
  • the transistor Q3 When the output voltage value is lower than the set voltage value, the transistor Q3 is in the cut-off state, and the transistor Q2 is also cut off, and the turn-on time and turn-off time of Q1 return to the original state, thereby realizing the state of regulated output.
  • the circuit has disadvantages: firstly, the circuit must participate in the self-excitation work through the coupled inductor L2. Due to the complicated production of the coupled inductor, it is not conducive to the miniaturization of electronic products and is prone to electromagnetic interference and additional parasitic effects. High power density. In addition, this product uses a bipolar transistor as a switch tube, which is not conducive to the integration and simplification of the circuit, and due to the working characteristics of the bipolar transistor, it is easy to be limited in the condition of high frequency and high voltage.
  • the purpose of the present invention is to provide a self-excited buck converter auxiliary power supply with high power density.
  • the invention solves the problems of not high enough power density, not wide enough voltage input, not high enough working frequency and complex circuit structure in the existing self-excited step-down converter.
  • a high power density self-excited step-down converter auxiliary power supply of the present invention includes: a step-down main circuit, a reset drive circuit, a current limiting protection circuit, and a voltage stabilizing circuit; wherein, the input end of the step-down main circuit Connect to the current limiting protection circuit, the output terminal of the step-down main circuit is connected to the voltage stabilizing circuit, the output terminal of the voltage stabilizing circuit is connected to the load, the input terminal of the current limiting protection circuit is connected to the input voltage; one terminal of the reset driving circuit is connected to the current limiting protection circuit circuit, and the other end is connected to the output voltage.
  • the step-down main loop includes an eighth capacitor, a ninth capacitor, a sixth diode, a second inductor, and a fifth PMOS transistor; wherein, the step-down main loop is connected to the current-limiting protection circuit through the source of the fifth PMOS transistor, and the step-down The drain of the voltage main circuit is connected to the eighth capacitor and the sixth diode, and connected to the positive terminal of the output voltage through the second inductor.
  • the reset drive circuit includes an eleventh capacitor, a thirteenth capacitor, a tenth resistor, an eleventh resistor, an eighth NMOS transistor, a fifth diode, a seventh diode, and a control signal interface; the reset drive circuit Connect to the sixth PMOS transistor through the fifth diode, and connect to the positive output voltage terminal through the thirteenth capacitor; the gate of the eighth NMOS transistor is connected to the control terminal through the eleventh capacitor, and the drain of the eighth NMOS transistor is connected to the first The thirteenth capacitor, the tenth resistor, and the source are grounded.
  • the current limiting protection circuit includes a ninth resistor, a twelfth resistor, an eighth resistor and a sixth PMOS transistor; the gate of the sixth PMOS transistor is connected to the eighth resistor and the drain of the seventh NMOS transistor, and the drain of the sixth PMOS transistor The pole is connected to the gate of the fifth PMOS transistor, the source of the sixth PMOS transistor is connected to the twelfth resistor, the other end of the twelfth resistor is connected to the drain of the fifth PMOS transistor in the step-down main circuit, and the other end of the eighth resistor
  • the current sampling resistor is connected to the twelfth resistor.
  • the voltage stabilizing circuit includes a seventh capacitor, a seventh PMOS transistor and a voltage stabilizing diode; the voltage stabilizing circuit is connected to the current limiting protection circuit through the drain of the seventh NMOS transistor, the gate of the seventh NMOS transistor is connected to the positive voltage output terminal, and the seventh NMOS transistor is connected to the positive voltage output terminal.
  • the source of the NMOS transistor is connected to the seventh capacitor and the Zener diode.
  • the sixth capacitor is used as an input filter capacitor and connected in parallel to the positive terminal and the negative terminal of the input voltage.
  • the present invention has the feature of accepting a wide range of inputs.
  • the reset driving circuit of the present invention has a control signal interface of the main control chip.
  • the control signal can determine the upper limit of the operating frequency of the buck converter while controlling the start of the main circuit of the buck converter.
  • the step-down converter in the present invention can work at a relatively high operating frequency, has the characteristics of low ripple and low noise, and generates relatively low electromagnetic interference.
  • the main power tube and each control tube of the present invention are all metal-oxide-semiconductor field-effect transistors, which are easy to integrate.
  • the present invention realizes the functions of overvoltage protection, overcurrent protection and adaptive soft start.
  • Fig. 1 is a circuit diagram of an existing self-excited step-down converter
  • Fig. 2 is a circuit diagram of the present invention
  • Fig. 3 is the working waveform diagram of the present invention working under a certain load
  • Fig. 4 is a working waveform diagram of the present invention working under different load modes
  • step-down main circuit 1 reset driving circuit 2, current limiting protection circuit 3, voltage stabilizing circuit 4; input voltage V in2 , output voltage V out , eighth capacitor C8, ninth capacitor C9, sixth diode Tube D6, second inductor L2, fifth PMOS tube Q5, eleventh capacitor C11, thirteenth capacitor C13, tenth resistor R10, eleventh resistor R1, eighth NMOS tube Q8, fifth diode D5, The seventh diode D7, the control signal interface Control; the ninth resistor R9, the twelfth resistor R12, the eighth resistor R8, the sixth PMOS transistor Q6; the seventh capacitor C7, the seventh PMOS transistor Q7, the Zener diode D8, The sixth capacitor C6.
  • the present invention is a self-excited step-down converter.
  • the circuit structure of the present invention includes: a step-down main circuit 1, a reset drive circuit 2, a current limiting protection circuit 3, and a voltage stabilizing circuit 4;
  • the output terminal of the voltage stabilizing circuit 4 is connected to the voltage stabilizing circuit 4, the output terminal of the voltage stabilizing circuit 4 is the output voltage V out connected to the load Load, the input terminal of the current limiting protection circuit 3 is connected to the input voltage V in2 ;
  • one terminal of the reset driving circuit 2 is connected to the current limiting protection circuit 3.
  • the other terminal is connected to the output voltage V out .
  • the step-down main loop includes an eighth capacitor C8, a ninth capacitor C9, a sixth diode D6, a second inductor L2, and a fifth PMOS transistor Q5.
  • the reset driving circuit includes an eleventh capacitor C11, a thirteenth capacitor C13, a tenth resistor R10, an eleventh resistor R11, an eighth NMOS transistor Q8, a fifth diode D5, a seventh diode D7 and a control signal interface.
  • the current limiting protection circuit includes a ninth resistor R9, a twelfth resistor R12, an eighth resistor R8 and a sixth PMOS transistor Q6.
  • the voltage stabilizing circuit includes a seventh capacitor C7, a seventh PMOS transistor Q7 and an eighth voltage stabilizing diode D8.
  • the sixth capacitor C6 is used as an input filter capacitor and connected in parallel to the positive terminal of the input voltage and the negative terminal of the input voltage.
  • the input voltage V in2 is the output voltage of the power supply circuit.
  • the main power fifth PMOS transistor Q5, the second inductor L2 and the sixth diode D6 constitute the main circuit of the step-down converter.
  • a current sampling twelfth resistor R12 and a fifth diode D5 are connected in series before the main circuit of the step-down converter, and the anode of the fifth diode D5 is connected to the positive terminal of the input voltage.
  • the gate of the eighth NMOS transistor Q8 is connected to the eleventh capacitor C11 and the eleventh resistor R11, the source is grounded, and the drain is connected to the thirteenth capacitor C13 and the tenth resistor R10.
  • the other end of the eleventh capacitor C11 is connected to the main control chip signal to control the conduction state of the eighth NMOS transistor Q8, and the other end of the eleventh resistor R11 is grounded to form a filter circuit with the eleventh capacitor C11.
  • the tenth resistor R10 and the fifth diode D5 are connected in series to the drain of the sixth PMOS transistor Q6 in the current limiting and control circuit, and the other end of the thirteenth capacitor C13 is connected to the positive end of the output voltage.
  • the circuit is used to periodically pull down and turn on the fifth main power PMOS transistor Q5 in the main circuit of the step-down converter.
  • the gate of the sixth PMOS transistor Q6 is connected to the drain of the eighth resistor R8 and the drain of the seventh PMOS transistor Q7 in the voltage stabilizing circuit, and the drain is connected to the cathode of the fifth diode D5, and the drain of the eighth resistor R8 The other end is connected with the twelfth current sampling resistor R12.
  • the circuit is used to pull up the main power fifth PMOS transistor Q5 to end the current working cycle when the voltage stabilization control and the current limiting control are triggered.
  • the gate of the seventh PMOS transistor Q7 is connected to the positive terminal of the output voltage, and the source is connected to the voltage stabilizing transistor, that is, the cathode of the eighth diode D8.
  • This circuit is used to control the stability of the output voltage.
  • the switching tubes and control tubes used in the present invention are all metal oxide semiconductor field effect transistors, which are easy to integrate and have good application value in reducing the volume of the power supply and increasing the power density.
  • the gate and source voltages of the fifth main power PMOS transistor Q5 are close to the input voltage, and the gate-source voltage of the fifth PMOS transistor Q5 does not reach the threshold voltage, thus the circuit Job not turned on.
  • the main control chip gives a turn-on signal to reset and start the gate of the eighth PMOS transistor Q8, and the eighth PMOS transistor Q8 is turned on and pulls down the gate voltage of the fifth PMOS transistor Q5.
  • the gate-source voltage of the fifth main power PMOS transistor Q5 reaches the threshold voltage and is turned on, and the current of the second inductor L2 rises.
  • the twelfth resistor R12 in the current limiting and control circuit samples the current of the second inductor L2, if the current output exceeds the set value, the divided voltage of the twelfth resistor R12 will exceed the current limiting control sixth PMOS transistor Q6 At time t1 in the figure, the sixth PMOS transistor Q6 will be turned on to pull up the gate voltage of the fifth PMOS transistor Q5 of the main power transistor to turn it off, close the working cycle and wait for the main control chip to give the next turn-on signal to enter the next duty cycle. Therefore, the purpose of reducing the turn-on time of the fifth PMOS transistor Q5 of the main power transistor and increasing the turn-off time can be achieved by detecting the current passing through the second inductor L2.
  • the ninth capacitor C9 will gain or lose a certain amount of charge, so that the output voltage will have a certain change. If in a certain cycle, when the reference voltage value of the voltage stabilizing diode D8 increases to exceed the sum of the threshold voltage of the seventh PMOS transistor Q7 of the voltage stabilizing control, the voltage stabilizing regulation is turned on, and the seventh PMOS transistor Q7 of the voltage stabilizing control is turned on, Make the gate-source voltage of the sixth PMOS transistor Q6 reach the threshold voltage and be turned on, so as to turn off the main power transistor and the fifth PMOS transistor Q5 to turn off the current working cycle. At this time, wait for the main control chip to give the next turn-on signal to enter the next working cycle.
  • the purpose of reducing the turn-on time of the fifth PMOS transistor Q5 of the main power transistor and increasing the turn-off time can be achieved by detecting the output voltage value.
  • the seventh PMOS transistor Q7 is turned off so that the sixth PMOS transistor Q6 is turned off, and the turn-on time and turn-off time of the fifth PMOS transistor Q5 of the main power transistor return to normal, which is determined by This achieves the purpose of stabilizing the voltage.

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  • Physics & Mathematics (AREA)
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  • Dc-Dc Converters (AREA)

Abstract

Disclosed in the present invention is a high-power-density auxiliary power supply circuit of a self-excited buck converter. The auxiliary power supply comprises a buck main loop (1), a reset drive circuit (2), a current limiting protection circuit (3), and a voltage stabilizing circuit (4), wherein an input end of the buck main loop (1) is connected to the current limiting protection circuit (3); an output end of the buck main loop (1) is connected to the voltage stabilizing circuit (4); an output end of the voltage stabilizing circuit (4), i.e., an output voltage (Vout), is connected to a load (Load); an input end of the current limiting protection circuit (3) is connected to an input voltage (Vin2); one end of the reset drive circuit (2) is connected to the current limiting protection circuit (3), and the other end is connected to the output voltage (Vout). The present invention solves the problems that an existing self-excited buck converter is low in power density, not wide enough in received input voltage, not high enough in working frequency, high in output ripple, and high in noise, and meanwhile, also achieves the functions of overvoltage protection, overcurrent protection, and adaptive soft start.

Description

基于自激式降压变换器的高功率密度辅助电源High Power Density Auxiliary Power Supply Based on Self-excited Buck Converter 技术领域technical field
本发明涉及一种高功率密度的自激式直流-直流降压变换器辅助电源,可适用于高电压输入低电压输出的应用场合。The invention relates to a self-excited DC-DC step-down converter auxiliary power supply with high power density, which is applicable to the application occasions of high voltage input and low voltage output.
背景技术Background technique
在一些小功率电源应用场合,自激式变换器相比于线性稳压器和他激式变换器相比,具有电路结构简单,高效率,低成本等优点。In some low-power power supply applications, self-excited converters have the advantages of simple circuit structure, high efficiency, and low cost compared with linear voltage regulators and other-excited converters.
传统的自激式降压变换器的主开关管以及各个控制管通常采用双极型晶体管实现。中国专利ZL99108088.2公开了一种双极性晶体管形自激式直流-直流变换器如图1所示。包括由PNP晶体管Q1,电感L1,二极管D1和电容C2构成的降压变换器电路,Vo是直流输出电压,Vi是直流输入电压,Vi的负端与Vo的负端直接相连,R7是输出负载,电容C2并联在负载R7两端。耦合电感L2分别通过电容C1和电阻R3与晶体管Q1的发射极和基极相连接,与晶体管Q2的发射极和集电极相连接。晶体管Q1的基极通过电阻R4连接至直流输入与直流输出的负端。晶体管Q2分别通过电阻R1和电阻R2与晶体管Q1的发射极和晶体管Q3的集电极连接。电阻R5和电阻R6通过串联支路并联于负载R7两端,R5、R6之间的连接点与晶体管Q3的基极相连。晶体管Q3的发射极连接于直流输入与直流输出的负端。该双极性晶体管形自激式直流-直流变换器工作原理如下:输入电压上电,此时Q1饱和导通,二极管D1、晶体管Q2均截止,Q1、L1、C2、R7、R5、R6形成回路,使电感L1和电容C2处于充能状态。在充能过程中,通过L1的电流逐渐增加,输出电压同时增加,相应地晶体管Q1的发射极-集电极电压随之增加,使得晶体管Q1的工作点逐渐退出饱和区,L1两端的电压下降,通过耦合电感L2两端的电压也随之减小,加大了对晶体管Q1基极电流的分流量,造成Q1的基极电流和集电极电流迅速减小,此现象会使Q1的发射极-集电极电压进一步增长,由此该回路进入了一种深度的正反馈状态。该状态导致的结果是通过晶体管Q1的集电极电流迅速减小,当该电流小于电感L1的电流时,二极管D1导通为L1续流,随后Q1截止。此时,L1、C2、R7、R5、R6、D1形成回路,进入释能状态。待电感L1放电结束,二极管D1截止,Q1重新饱和导通,进入下一自激周期。若干工作周期后,输出电压Vo达到设定电压值,电压反馈电路R5、R6、Q3、R1、R2开始工作。当输出电压值高于设定电压值时,晶体管Q3进入导 通状态,导致Q2导通并分流一部分Q1的基极电流,使得晶体管Q1提前关断,从而使Q1导通时间下降、关断时间上升;当输出电压值低于设定电压值时,晶体管Q3处于截止状态,则晶体管Q2也截止,Q1的导通时间和关断时间恢复原状,由此实现稳压输出的状态。该电路存在不足之处:首先该电路必须通过耦合电感L2参与自激工作,由于耦合电感的制作复杂,不利于电子产品制作的小型化并且容易产生电磁干扰以及额外的寄生效应,同时不能实现较高的功率密度。此外,该产品使用双极性晶体管作为开关管,不利于电路的集成和精简化,并且由于双极性晶体管的工作特点,在高频高压的条件下工作容易受到限制。The main switching tube and each control tube of a traditional self-excited buck converter are usually implemented with bipolar transistors. Chinese patent ZL99108088.2 discloses a self-excited DC-DC converter in the form of a bipolar transistor, as shown in FIG. 1 . Including the step-down converter circuit composed of PNP transistor Q1, inductor L1, diode D1 and capacitor C2, Vo is the DC output voltage, Vi is the DC input voltage, the negative terminal of Vi is directly connected to the negative terminal of Vo, and R7 is the output load , the capacitor C2 is connected in parallel across the load R7. The coupled inductor L2 is connected to the emitter and the base of the transistor Q1 through the capacitor C1 and the resistor R3 respectively, and is connected to the emitter and the collector of the transistor Q2. The base of the transistor Q1 is connected to the negative terminals of the DC input and the DC output through the resistor R4. The transistor Q2 is connected to the emitter of the transistor Q1 and the collector of the transistor Q3 through the resistors R1 and R2 respectively. The resistor R5 and the resistor R6 are connected in parallel to both ends of the load R7 through a series branch, and the connection point between R5 and R6 is connected to the base of the transistor Q3. The emitter of the transistor Q3 is connected to the negative terminals of the DC input and the DC output. The working principle of the bipolar transistor self-excited DC-DC converter is as follows: when the input voltage is powered on, Q1 is saturated and turned on, diode D1 and transistor Q2 are cut off, and Q1, L1, C2, R7, R5, R6 form loop, so that the inductor L1 and the capacitor C2 are charged. During the charging process, the current through L1 gradually increases, and the output voltage increases at the same time, and the emitter-collector voltage of transistor Q1 increases accordingly, so that the operating point of transistor Q1 gradually exits the saturation region, and the voltage at both ends of L1 decreases. The voltage across the coupling inductor L2 also decreases accordingly, which increases the shunt flow of the base current of the transistor Q1, causing the base current and collector current of Q1 to decrease rapidly. This phenomenon will make the emitter-collector of Q1 The electrode voltage increases further, whereby the circuit enters a deep positive feedback state. The result of this state is that the collector current through the transistor Q1 decreases rapidly. When the current is smaller than the current of the inductor L1, the diode D1 conducts to freewheel the L1, and then Q1 is cut off. At this time, L1, C2, R7, R5, R6, and D1 form a loop and enter the state of energy release. After the discharge of the inductor L1 is completed, the diode D1 is cut off, and the Q1 is saturated and turned on again, and enters the next self-excited cycle. After several working cycles, the output voltage Vo reaches the set voltage value, and the voltage feedback circuits R5, R6, Q3, R1, R2 start to work. When the output voltage value is higher than the set voltage value, the transistor Q3 enters the conduction state, causing Q2 to conduct and shunt a part of the base current of Q1, so that the transistor Q1 is turned off in advance, so that the conduction time of Q1 is reduced and the off time is reduced. When the output voltage value is lower than the set voltage value, the transistor Q3 is in the cut-off state, and the transistor Q2 is also cut off, and the turn-on time and turn-off time of Q1 return to the original state, thereby realizing the state of regulated output. The circuit has disadvantages: firstly, the circuit must participate in the self-excitation work through the coupled inductor L2. Due to the complicated production of the coupled inductor, it is not conducive to the miniaturization of electronic products and is prone to electromagnetic interference and additional parasitic effects. High power density. In addition, this product uses a bipolar transistor as a switch tube, which is not conducive to the integration and simplification of the circuit, and due to the working characteristics of the bipolar transistor, it is easy to be limited in the condition of high frequency and high voltage.
发明内容Contents of the invention
技术问题:本发明的目的是提供一种高功率密度的自激式降压变换器辅助电源。采用本发明解决了现有自激式降压变换器中功率密度不够高、电压输入不够宽泛、工作频率不够高、电路结构复杂的问题。Technical problem: The purpose of the present invention is to provide a self-excited buck converter auxiliary power supply with high power density. The invention solves the problems of not high enough power density, not wide enough voltage input, not high enough working frequency and complex circuit structure in the existing self-excited step-down converter.
技术方案:本发明的一种高功率密度的自激式降压变换器辅助电源包括:降压主回路、复位驱动电路、限流保护电路、稳压电路;其中,降压主回路的输入端接限流保护电路,降压主回路的输出端接稳压电路,稳压电路的输出端即输出电压接负载,限流保护电路的输入端接输入电压;复位驱动电路的一端接限流保护电路,另一端接输出电压。Technical solution: A high power density self-excited step-down converter auxiliary power supply of the present invention includes: a step-down main circuit, a reset drive circuit, a current limiting protection circuit, and a voltage stabilizing circuit; wherein, the input end of the step-down main circuit Connect to the current limiting protection circuit, the output terminal of the step-down main circuit is connected to the voltage stabilizing circuit, the output terminal of the voltage stabilizing circuit is connected to the load, the input terminal of the current limiting protection circuit is connected to the input voltage; one terminal of the reset driving circuit is connected to the current limiting protection circuit circuit, and the other end is connected to the output voltage.
其中,in,
所述降压主回路包括第八电容、第九电容,第六二极管,第二电感,第五PMOS管;其中,降压主回路通过第五PMOS管源极连接限流保护电路,降压主回路的漏极接第八电容、第六二极管,通过第二电感连接于输出电压正端。The step-down main loop includes an eighth capacitor, a ninth capacitor, a sixth diode, a second inductor, and a fifth PMOS transistor; wherein, the step-down main loop is connected to the current-limiting protection circuit through the source of the fifth PMOS transistor, and the step-down The drain of the voltage main circuit is connected to the eighth capacitor and the sixth diode, and connected to the positive terminal of the output voltage through the second inductor.
所述复位驱动电路包括第十一电容、第十三电容,第十电阻、第十一电阻,第八NMOS管,第五二极管、第七二极管以及一个控制信号接口;复位驱动电路通过第五二极管连接于第六PMOS管,通过第十三电容连接于输出电压正端;第八NMOS管的栅极通过第十一电容接控制端,第八NMOS管的漏极连接第十三电容、第十电阻,源极接地。The reset drive circuit includes an eleventh capacitor, a thirteenth capacitor, a tenth resistor, an eleventh resistor, an eighth NMOS transistor, a fifth diode, a seventh diode, and a control signal interface; the reset drive circuit Connect to the sixth PMOS transistor through the fifth diode, and connect to the positive output voltage terminal through the thirteenth capacitor; the gate of the eighth NMOS transistor is connected to the control terminal through the eleventh capacitor, and the drain of the eighth NMOS transistor is connected to the first The thirteenth capacitor, the tenth resistor, and the source are grounded.
所述限流保护电路包括第九电阻、第十二电阻、第八电阻以及第六PMOS管;第六PMOS管的栅极接第八电阻和第七NMOS管漏极,第六PMOS管的漏极接第五PMOS管的栅极,第六PMOS管的源极接第十二电阻,第十二电阻的另一端连接于降压主回路第五PMOS管的漏极,第八电阻的另一端接电流采样电阻即第十二电阻。The current limiting protection circuit includes a ninth resistor, a twelfth resistor, an eighth resistor and a sixth PMOS transistor; the gate of the sixth PMOS transistor is connected to the eighth resistor and the drain of the seventh NMOS transistor, and the drain of the sixth PMOS transistor The pole is connected to the gate of the fifth PMOS transistor, the source of the sixth PMOS transistor is connected to the twelfth resistor, the other end of the twelfth resistor is connected to the drain of the fifth PMOS transistor in the step-down main circuit, and the other end of the eighth resistor The current sampling resistor is connected to the twelfth resistor.
所述稳压电路包括第七电容、第七PMOS管和稳压二极管;稳压电路通过第七NMOS管漏极连接于限流保护电路,第七NMOS管栅极连接电压输出正端,第七NMOS管源极连接第七电容、稳压二极管。The voltage stabilizing circuit includes a seventh capacitor, a seventh PMOS transistor and a voltage stabilizing diode; the voltage stabilizing circuit is connected to the current limiting protection circuit through the drain of the seventh NMOS transistor, the gate of the seventh NMOS transistor is connected to the positive voltage output terminal, and the seventh NMOS transistor is connected to the positive voltage output terminal. The source of the NMOS transistor is connected to the seventh capacitor and the Zener diode.
所述第六电容作为输入滤波电容并联于输入电压正端和负端。The sixth capacitor is used as an input filter capacitor and connected in parallel to the positive terminal and the negative terminal of the input voltage.
有益效果:本发明与现有技术相比有益效果主要表现在:Beneficial effect: compared with the prior art, the beneficial effect of the present invention is mainly manifested in:
(1)本发明具有可接受宽范围输入的特点。(1) The present invention has the feature of accepting a wide range of inputs.
(2)本发明的复位驱动电路中具有一个主控芯片的控制信号接口。该控制信号在控制降压变换器主电路的开启的同时,可以决定降压变换器的工作频率上限。同时本发明中的降压变换器可以工作在较高的工作频率上,具有低纹波、低噪声的特性,并且产生的电磁干扰较低。(2) The reset driving circuit of the present invention has a control signal interface of the main control chip. The control signal can determine the upper limit of the operating frequency of the buck converter while controlling the start of the main circuit of the buck converter. At the same time, the step-down converter in the present invention can work at a relatively high operating frequency, has the characteristics of low ripple and low noise, and generates relatively low electromagnetic interference.
(3)本发明的主功率管以及各个控制管全为金属氧化物半导体场效应晶体管,易于集成。并且无需采用耦合电感参与电路的自激工作,可以较好地简化电路的复杂程度,实现较高的功率密度。非常适合应用于小功率开关电源中的辅助电源电路等应用场景。(3) The main power tube and each control tube of the present invention are all metal-oxide-semiconductor field-effect transistors, which are easy to integrate. In addition, there is no need to use coupled inductors to participate in the self-excited work of the circuit, which can better simplify the complexity of the circuit and achieve higher power density. It is very suitable for application scenarios such as auxiliary power supply circuits in low-power switching power supplies.
(4)本发明实现了过压保护和过流保护以及自适应软启动的功能。(4) The present invention realizes the functions of overvoltage protection, overcurrent protection and adaptive soft start.
附图说明Description of drawings
图1是现有的自激式降压变换器电路图;Fig. 1 is a circuit diagram of an existing self-excited step-down converter;
图2为本发明电路图;Fig. 2 is a circuit diagram of the present invention;
图3为本发明工作在某负载下的工作波形图;Fig. 3 is the working waveform diagram of the present invention working under a certain load;
图4为本发明工作在不同负载模式下的工作波形图;Fig. 4 is a working waveform diagram of the present invention working under different load modes;
图中有:降压主回路1、复位驱动电路2、限流保护电路3、稳压电路4;输入电压V in2、输出电压V out、第八电容C8、第九电容C9,第六二极管D6,第二电感L2,第五PMOS管Q5、第十一电容C11、第十三电容C13,第十电阻R10、第十一电阻R1,第八NMOS管Q8,第五二极管D5、第七二极管D7、控制信号接口Control;第九电阻R9、第十二电阻R12、第八电阻R8、第六PMOS管Q6;第七电容C7、第七PMOS管Q7、稳压二极管D8、第六电容C6。 In the figure, there are: step-down main circuit 1, reset driving circuit 2, current limiting protection circuit 3, voltage stabilizing circuit 4; input voltage V in2 , output voltage V out , eighth capacitor C8, ninth capacitor C9, sixth diode Tube D6, second inductor L2, fifth PMOS tube Q5, eleventh capacitor C11, thirteenth capacitor C13, tenth resistor R10, eleventh resistor R1, eighth NMOS tube Q8, fifth diode D5, The seventh diode D7, the control signal interface Control; the ninth resistor R9, the twelfth resistor R12, the eighth resistor R8, the sixth PMOS transistor Q6; the seventh capacitor C7, the seventh PMOS transistor Q7, the Zener diode D8, The sixth capacitor C6.
具体实施方式Detailed ways
下面结合附图对本发明具体实施方式作进一步介绍。The specific embodiments of the present invention will be further introduced below in conjunction with the accompanying drawings.
如图2所示,本发明为一种自激式降压变换器。本发明电路结构包括:降压主回路1、复位驱动电路2、限流保护电路3、稳压电路4;其中,降压主回路1的输入端接限流保护电路3,降压主回路1的输出端接稳压电路4,稳压电路4 的输出端即输出电压V out接负载Load,限流保护电路3的输入端接输入电压V in2;复位驱动电路2的一端接限流保护电路3,另一端接输出电压V out。降压主回路包括第八电容C8、第九电容C9,第六二极管D6,第二电感L2,第五PMOS管Q5。复位驱动电路包括第十一电容C11、第十三电容C13,第十电阻R10、第十一电阻R11,第八NMOS管Q8,第五二极管D5、第七二极管D7以及一个控制信号接口。限流保护电路包括第九电阻R9、第十二电阻R12、第八电阻R8以及第六PMOS管Q6。稳压电路包括第七电容C7、第七PMOS管Q7和稳压第八二极管D8。第六电容C6作为输入滤波电容并联于输入电压正端和输入电压负端。 As shown in Figure 2, the present invention is a self-excited step-down converter. The circuit structure of the present invention includes: a step-down main circuit 1, a reset drive circuit 2, a current limiting protection circuit 3, and a voltage stabilizing circuit 4; The output terminal of the voltage stabilizing circuit 4 is connected to the voltage stabilizing circuit 4, the output terminal of the voltage stabilizing circuit 4 is the output voltage V out connected to the load Load, the input terminal of the current limiting protection circuit 3 is connected to the input voltage V in2 ; one terminal of the reset driving circuit 2 is connected to the current limiting protection circuit 3. The other terminal is connected to the output voltage V out . The step-down main loop includes an eighth capacitor C8, a ninth capacitor C9, a sixth diode D6, a second inductor L2, and a fifth PMOS transistor Q5. The reset driving circuit includes an eleventh capacitor C11, a thirteenth capacitor C13, a tenth resistor R10, an eleventh resistor R11, an eighth NMOS transistor Q8, a fifth diode D5, a seventh diode D7 and a control signal interface. The current limiting protection circuit includes a ninth resistor R9, a twelfth resistor R12, an eighth resistor R8 and a sixth PMOS transistor Q6. The voltage stabilizing circuit includes a seventh capacitor C7, a seventh PMOS transistor Q7 and an eighth voltage stabilizing diode D8. The sixth capacitor C6 is used as an input filter capacitor and connected in parallel to the positive terminal of the input voltage and the negative terminal of the input voltage.
在本发明电路图中,输入电压V in2是供给电源电路工作的电路输出电压。主功率第五PMOS管Q5、第二电感L2和第六二极管D6构成降压变换器主电路。降压变换器主电路前串接电流采样第十二电阻R12和第五二极管D5,第五二极管D5的阳极与输入电压正端相连。 In the circuit diagram of the present invention, the input voltage V in2 is the output voltage of the power supply circuit. The main power fifth PMOS transistor Q5, the second inductor L2 and the sixth diode D6 constitute the main circuit of the step-down converter. A current sampling twelfth resistor R12 and a fifth diode D5 are connected in series before the main circuit of the step-down converter, and the anode of the fifth diode D5 is connected to the positive terminal of the input voltage.
复位驱动电路中,第八NMOS管Q8栅极接第十一电容C11和第十一电阻R11,源极接地,漏极接第十三电容C13和第十电阻R10。第十一电容C11的另一端接主控芯片信号以对第八NMOS管Q8的导通状态进行控制,第十一电阻R11的另一端接地,与第十一电容C11构成一滤波电路。第十电阻R10和第五二极管D5串接于限流与控制电路中第六PMOS管Q6的漏极,第十三电容C13的另一端接输出电压正端。该电路用于将降压变换器主电路中的主功率第五PMOS管Q5周期性拉低开启。In the reset drive circuit, the gate of the eighth NMOS transistor Q8 is connected to the eleventh capacitor C11 and the eleventh resistor R11, the source is grounded, and the drain is connected to the thirteenth capacitor C13 and the tenth resistor R10. The other end of the eleventh capacitor C11 is connected to the main control chip signal to control the conduction state of the eighth NMOS transistor Q8, and the other end of the eleventh resistor R11 is grounded to form a filter circuit with the eleventh capacitor C11. The tenth resistor R10 and the fifth diode D5 are connected in series to the drain of the sixth PMOS transistor Q6 in the current limiting and control circuit, and the other end of the thirteenth capacitor C13 is connected to the positive end of the output voltage. The circuit is used to periodically pull down and turn on the fifth main power PMOS transistor Q5 in the main circuit of the step-down converter.
限流与控制电路中,第六PMOS管Q6栅极接第八电阻R8和稳压电路中第七PMOS管Q7的漏极,漏极接第五二极管D5的阴极,第八电阻R8的另一端接电流采样第十二电阻R12。该电路用于在稳压控制与限流控制被触发时拉高主功率第五PMOS管Q5以结束当前工作周期。In the current limiting and control circuit, the gate of the sixth PMOS transistor Q6 is connected to the drain of the eighth resistor R8 and the drain of the seventh PMOS transistor Q7 in the voltage stabilizing circuit, and the drain is connected to the cathode of the fifth diode D5, and the drain of the eighth resistor R8 The other end is connected with the twelfth current sampling resistor R12. The circuit is used to pull up the main power fifth PMOS transistor Q5 to end the current working cycle when the voltage stabilization control and the current limiting control are triggered.
稳压电路中,第七PMOS管Q7的栅极接输出电压正端,源极接稳压管即第八二极管D8的阴极。该电路用于进行对输出电压的稳定进行控制。In the voltage stabilizing circuit, the gate of the seventh PMOS transistor Q7 is connected to the positive terminal of the output voltage, and the source is connected to the voltage stabilizing transistor, that is, the cathode of the eighth diode D8. This circuit is used to control the stability of the output voltage.
本发明中采用的开关管以及控制管全为金属氧化物半导体场效应晶体管,易于集成在减小电源体积,增加功率密度上有较好的应用价值。The switching tubes and control tubes used in the present invention are all metal oxide semiconductor field effect transistors, which are easy to integrate and have good application value in reducing the volume of the power supply and increasing the power density.
下面结合图3说明该发明电路的工作原理:Below in conjunction with Fig. 3 illustrate the operating principle of this inventive circuit:
在图3所示的工作波形图中,t0时刻,主功率第五PMOS管Q5的栅极和源极电压接近输入电压,第五PMOS管Q5的栅极-源极电压未达到阈值电压从而电路未开启工作。此时主控芯片给予开启信号至复位启动第八PMOS管Q8栅极,第 八PMOS管Q8被打开并将第五PMOS管Q5的栅极电压拉低。此时主功率第五PMOS管Q5的栅极-源极电压达到阈值电压并被开启,第二电感L2的电流上升。In the working waveform diagram shown in Figure 3, at time t0, the gate and source voltages of the fifth main power PMOS transistor Q5 are close to the input voltage, and the gate-source voltage of the fifth PMOS transistor Q5 does not reach the threshold voltage, thus the circuit Job not turned on. At this time, the main control chip gives a turn-on signal to reset and start the gate of the eighth PMOS transistor Q8, and the eighth PMOS transistor Q8 is turned on and pulls down the gate voltage of the fifth PMOS transistor Q5. At this time, the gate-source voltage of the fifth main power PMOS transistor Q5 reaches the threshold voltage and is turned on, and the current of the second inductor L2 rises.
限流与控制电路中的第十二电阻R12采样第二电感L2的电流,如果该电流输出超过了设定值,则会使第十二电阻R12的分压超过限流控制第六PMOS管Q6的阈值电压,如图中t1时刻,第六PMOS管Q6会被开启以拉高主功率管第五PMOS管Q5的栅极电压使其关闭,关闭该工作周期并等待主控芯片给予下一个开启信号以进入下一工作周期。由此,可以通过检测通过第二电感L2的电流而达到使主功率管第五PMOS管Q5开启时间下降,关断时间上升的目的。The twelfth resistor R12 in the current limiting and control circuit samples the current of the second inductor L2, if the current output exceeds the set value, the divided voltage of the twelfth resistor R12 will exceed the current limiting control sixth PMOS transistor Q6 At time t1 in the figure, the sixth PMOS transistor Q6 will be turned on to pull up the gate voltage of the fifth PMOS transistor Q5 of the main power transistor to turn it off, close the working cycle and wait for the main control chip to give the next turn-on signal to enter the next duty cycle. Therefore, the purpose of reducing the turn-on time of the fifth PMOS transistor Q5 of the main power transistor and increasing the turn-off time can be achieved by detecting the current passing through the second inductor L2.
在每一个工作周期中,第九电容C9都会获得或失去一定的电荷量,从而使输出电压有一定的改变。若在某一周期中,增加至超过稳压二极管D8的参考电压值与稳压控制第七PMOS管Q7的阈值电压之和时,开启稳压调节,稳压控制第七PMOS管Q7被开启,使第六PMOS管Q6的栅极-源极电压达到阈值电压并被开启,从而关闭主功率管第五PMOS管Q5关闭当前工作周期。此时等待主控芯片给予下一个开启信号以进入下一工作周期。由此,可以通过检测输出电压值达到使主功率管第五PMOS管Q5开启时间下降,关断时间上升的目的。当输出电压重新回退到设定值以下时,第七PMOS管Q7关断使得第六PMOS管Q6关断,主功率管第五PMOS管Q5的导通时间和关断时间又恢复正常,由此达到了稳定电压的目的。In each working cycle, the ninth capacitor C9 will gain or lose a certain amount of charge, so that the output voltage will have a certain change. If in a certain cycle, when the reference voltage value of the voltage stabilizing diode D8 increases to exceed the sum of the threshold voltage of the seventh PMOS transistor Q7 of the voltage stabilizing control, the voltage stabilizing regulation is turned on, and the seventh PMOS transistor Q7 of the voltage stabilizing control is turned on, Make the gate-source voltage of the sixth PMOS transistor Q6 reach the threshold voltage and be turned on, so as to turn off the main power transistor and the fifth PMOS transistor Q5 to turn off the current working cycle. At this time, wait for the main control chip to give the next turn-on signal to enter the next working cycle. Therefore, the purpose of reducing the turn-on time of the fifth PMOS transistor Q5 of the main power transistor and increasing the turn-off time can be achieved by detecting the output voltage value. When the output voltage falls back below the set value again, the seventh PMOS transistor Q7 is turned off so that the sixth PMOS transistor Q6 is turned off, and the turn-on time and turn-off time of the fifth PMOS transistor Q5 of the main power transistor return to normal, which is determined by This achieves the purpose of stabilizing the voltage.
如图4所示,当本发明工作在轻载模式下时,将会自动在较低的工作频率上工作,从而进入DCM模式。在该模式下,通过第二电感L2的电流在主功率管关断时将会下降至0,由此可以达到减小开关损耗的目的。当本发明工作在重载模式下时,将会自动在较高的工作频率上工作,从而进入CCM模式,由此可以有效地减小输出纹波。As shown in Fig. 4, when the present invention works in the light load mode, it will automatically work at a lower operating frequency, thereby entering the DCM mode. In this mode, the current passing through the second inductor L2 will drop to 0 when the main power transistor is turned off, thereby reducing the switching loss. When the present invention works in the heavy load mode, it will automatically work at a higher operating frequency, thereby entering the CCM mode, thereby effectively reducing the output ripple.
本发明未公开技术属于本领域技术人员公知常识。The undisclosed technologies of the present invention belong to the common knowledge of those skilled in the art.

Claims (6)

  1. 一种高功率密度的自激式降压变换器辅助电源,其特征在于,该辅助电源包括:降压主回路(1)、复位驱动电路(2)、限流保护电路(3)、稳压电路(4);其中,降压主回路(1)的输入端接限流保护电路(3),降压主回路(1)的输出端接稳压电路(4),稳压电路(4)的输出端即输出电压(V out)接负载(Load),限流保护电路(3)的输入端接输入电压(V in2);复位驱动电路(2)的一端接限流保护电路(3),另一端接输出电压(V out)。 A self-excited step-down converter auxiliary power supply with high power density, characterized in that the auxiliary power supply includes: a step-down main circuit (1), a reset drive circuit (2), a current limiting protection circuit (3), a voltage stabilizing Circuit (4); wherein, the input terminal of the step-down main circuit (1) is connected to the current limiting protection circuit (3), the output terminal of the step-down main circuit (1) is connected to the voltage stabilizing circuit (4), and the voltage stabilizing circuit (4) The output terminal of the output voltage (V out ) is connected to the load (Load), the input terminal of the current limiting protection circuit (3) is connected to the input voltage (V in2 ); one terminal of the reset driving circuit (2) is connected to the current limiting protection circuit (3) , and the other end is connected to the output voltage (V out ).
  2. 根据权利要求1所述的高功率密度的自激式降压变换器辅助电源,其特征在于,所述降压主回路(1)包括第八电容(C8)、第九电容(C9),第六二极管(D6),第二电感(L2),第五PMOS管(Q5);其中,降压主回路(1)通过第五PMOS管(Q5)源极连接限流保护电路(3),降压主回路(1)的漏极接第八电容(C8)、第六二极管(D6),通过第二电感(L2)连接于输出电压(V out)正端。 The self-excited step-down converter auxiliary power supply with high power density according to claim 1, characterized in that, the step-down main circuit (1) includes an eighth capacitor (C8), a ninth capacitor (C9), and a ninth capacitor (C9). Six diodes (D6), a second inductor (L2), and a fifth PMOS transistor (Q5); wherein, the step-down main circuit (1) is connected to the current limiting protection circuit (3) through the source of the fifth PMOS transistor (Q5) , the drain of the step-down main circuit (1) is connected to the eighth capacitor (C8), the sixth diode (D6), and connected to the positive terminal of the output voltage (V out ) through the second inductor (L2).
  3. 根据权利要求1所述的高功率密度的自激式降压变换器辅助电源,其特征在于,所述复位驱动电路(2)包括第十一电容(C11)、第十三电容(C13),第十电阻(R10)、第十一电阻(R11),第八NMOS管(Q8),第五二极管(D5)、第七二极管(D7)以及一个控制信号接口(Control);复位驱动电路(2)通过第五二极管(D5)连接于第六PMOS管(Q6),通过第十三电容(C13)连接于输出电压(V out)正端;第八NMOS管(Q8)的栅极通过第十一电容(C11)接控制端(Control),第八NMOS管(Q8)的漏极连接第十三电容(C13)、第十电阻(R10),源极接地。 The self-excited step-down converter auxiliary power supply with high power density according to claim 1, characterized in that, the reset driving circuit (2) comprises an eleventh capacitor (C11), a thirteenth capacitor (C13), The tenth resistor (R10), the eleventh resistor (R11), the eighth NMOS tube (Q8), the fifth diode (D5), the seventh diode (D7) and a control signal interface (Control); reset The driving circuit (2) is connected to the sixth PMOS transistor (Q6) through the fifth diode (D5), and connected to the positive terminal of the output voltage (V out ) through the thirteenth capacitor (C13); the eighth NMOS transistor (Q8) The gate of the NMOS tube is connected to the control terminal (Control) through the eleventh capacitor (C11), the drain of the eighth NMOS transistor (Q8) is connected to the thirteenth capacitor (C13), the tenth resistor (R10), and the source is grounded.
  4. 根据权利要求1所述的高功率密度的自激式降压变换器辅助电源,其特征在于,所述限流保护电路(3)包括第九电阻(R9)、第十二电阻(R12)、第八电阻(R8)以及第六PMOS管(Q6);第六PMOS管(Q6)的栅极接第八电阻(R8)和第七NMOS管(Q7)漏极,第六PMOS管(Q6)的漏极接第五PMOS管(Q5)的栅极,第六PMOS管(Q6)的源极接第十二电阻(R12),第十二电阻(R12)的另一端连接于降压主回路(1)第五PMOS管(Q5)的漏极,第八电阻(R8)的另一端接电流采样电阻即第十二电阻(R12)。The self-excited step-down converter auxiliary power supply with high power density according to claim 1, characterized in that, the current limiting protection circuit (3) includes a ninth resistor (R9), a twelfth resistor (R12), The eighth resistor (R8) and the sixth PMOS transistor (Q6); the gate of the sixth PMOS transistor (Q6) is connected to the eighth resistor (R8) and the drain of the seventh NMOS transistor (Q7), and the sixth PMOS transistor (Q6) The drain of the transistor is connected to the gate of the fifth PMOS transistor (Q5), the source of the sixth PMOS transistor (Q6) is connected to the twelfth resistor (R12), and the other end of the twelfth resistor (R12) is connected to the step-down main circuit (1) The drain of the fifth PMOS transistor (Q5), the other end of the eighth resistor (R8) is connected to the current sampling resistor, that is, the twelfth resistor (R12).
  5. 根据权利要求1所述的高功率密度的自激式降压变换器辅助电源,其特征在于,所述稳压电路(4)包括第七电容(C7)、第七PMOS管(Q7)和稳压二极管(D8);稳压电路(4)通过第七NMOS管(Q7)漏极连接于限流保护电路(3), 第七NMOS管(Q7)栅极连接电压输出(V out)正端,第七NMOS管(Q7)源极连接第七电容(C7)、稳压二极管(D8)。 The self-excited step-down converter auxiliary power supply with high power density according to claim 1, characterized in that, the voltage stabilizing circuit (4) includes a seventh capacitor (C7), a seventh PMOS transistor (Q7) and a stabilizing Diode (D8); the voltage regulator circuit (4) is connected to the current limiting protection circuit (3) through the drain of the seventh NMOS transistor (Q7), and the gate of the seventh NMOS transistor (Q7) is connected to the positive terminal of the voltage output (V out ) , the source of the seventh NMOS transistor (Q7) is connected to the seventh capacitor (C7) and the Zener diode (D8).
  6. 根据权利要求1所述的高功率密度的自激式降压变换器辅助电源,其特征在于,所述第六电容(C6)作为输入滤波电容并联于输入电压(V in2)正端和负端。 The high power density self-excited step-down converter auxiliary power supply according to claim 1, characterized in that the sixth capacitor (C6) is used as an input filter capacitor and connected in parallel to the positive terminal and negative terminal of the input voltage (V in2 ) .
PCT/CN2022/117122 2021-11-30 2022-09-05 High-power-density auxiliary power supply based on self-excited buck converter WO2023098199A1 (en)

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