WO2018157458A1

WO2018157458A1 - Voltage absorption circuit

Info

Publication number: WO2018157458A1
Application number: PCT/CN2017/081009
Authority: WO
Inventors: 李文东
Original assignee: 深圳市华星光电技术有限公司
Priority date: 2017-02-28
Filing date: 2017-04-19
Publication date: 2018-09-07
Also published as: CN106602537A; CN106602537B; KR20190128655A; KR102328416B1

Abstract

A voltage absorption circuit, comprising an input circuit (110), an absorption circuit (120), and a control circuit (130). The absorption circuit (120) comprises a resonance circuit (121) and a rectification circuit (122), the resonance circuit (121) and the rectification circuit (122) being connected in parallel; the input end of the input circuit (110) is configured to receive an input voltage; the output end of the input circuit (110) is connected with the input end of the resonance circuit (121), the input end of the rectification circuit (122) and the control end of the control circuit (130); the input circuit (110) is configured to provide the input voltage for the voltage absorption circuit; the resonance circuit (121) is configured to absorb a peak voltage which is generated by the rectification circuit (122) when the control circuit (130) is switched from an off state to an on state; and the resonance circuit (121) is configured to also absorb an peak voltage which is generated when the control circuit (130) is switched from the on state to the off state. By using the voltage absorption circuit, the peak voltages can be absorbed in a lossless manner, and energy conversion efficiency can be improved.

Description

Voltage absorbing circuit

The present application claims priority to the filing date of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the present disclosure.

Technical field

The present invention relates to the field of circuits, and in particular to a voltage absorbing circuit.

Background technique

In a TV power backlight driving circuit or a flyback circuit, when a circuit is controlled by a metal oxide semiconductor (MOS) transistor, when the MOS is turned off, due to the influence of parasitic capacitance in the circuit, The turn-off spike voltage is generated in the rectifier diode, so the spike voltage needs to be absorbed.

At present, the capacitor and the resistor are connected in parallel in the rectifier diode, but the capacitor absorbs the parasitic energy and reduces the parasitic energy, which reduces the power conversion efficiency and is not conducive to improving the electromagnetic compatibility (EMI). .

Summary of the invention

Embodiments of the present invention provide a voltage absorbing circuit, in order to achieve energy conversion without lossless absorption of peak voltage.

A first aspect of an embodiment of the present invention provides a voltage absorbing circuit including an input circuit, an absorbing circuit, and a control circuit, the absorbing circuit including a resonant circuit and a rectifying circuit, and the resonant circuit is connected in parallel with the rectifying circuit connection;

An input end of the input circuit is configured to receive an input voltage, and an output end of the input circuit is simultaneously connected to an input end of the resonant circuit, an input end of the rectifier circuit, and a control end of the control circuit, An input circuit for providing an input voltage to the voltage absorbing circuit;

The ground of the control circuit is grounded, and the control circuit is used to cut off by the control circuit Controlling the rectifier circuit to be turned on, so that an output current of the input circuit is supplied to an output end of the voltage absorbing circuit through the rectifier circuit, and when the control circuit is turned on, the rectifier circuit is controlled to be turned off. So that an output current of the input circuit flows into the control circuit;

An output end of the resonant circuit is connected to an output end of the rectifying circuit as a voltage output end of the voltage absorbing circuit, and the resonant circuit is configured to absorb the rectifying circuit, and the control circuit is turned from off to on. The peak voltage generated at the time, and the resonant circuit is used to absorb the spike voltage generated when the control circuit is turned from on to off.

The resonant circuit includes a first capacitor, a second capacitor, a third capacitor and an inductor, a first end of the first capacitor is connected to an output end of the input circuit, and a second end of the first capacitor is a first end of the inductor is connected, as an output end of the resonant circuit, a first end of the second capacitor is connected to an output end of the input circuit, and a second end of the inductor, the second a second end of the capacitor is connected to the output end of the resonant circuit, a first end of the third capacitor is connected to a second end of the second capacitor, and a second end of the third capacitor is grounded, the first The capacitor and the inductor form a first resonant tank, and the second capacitor and the inductor form a second resonant tank.

The resonant circuit further includes a first diode, a second diode, and a third diode, wherein a positive pole of the first diode is coupled to a first end of the first capacitor, a cathode of a diode is coupled to a first end of the second capacitor and a cathode of the second diode, and a cathode of the second diode is coupled to a second end of the inductor, the A positive pole of the third diode is coupled to a second end of the first capacitor, and a negative pole of the third diode is coupled to a second end of the second capacitor.

Wherein the rectifier circuit comprises a fourth diode and a fifth diode, a positive pole of the fourth diode is connected to a first end of the first capacitor, and a cathode of the fourth diode is a second end of the second capacitor is connected, a positive pole of the fifth diode is connected to a first end of the first capacitor, a negative pole of the fifth diode and a second end of the second capacitor End connection.

The control circuit includes a controller and a first MOS transistor, and a control end of the controller is connected to a gate of the first MOS transistor, and a current detecting end of the controller and the first MOS transistor The source is connected, the ground of the controller is grounded, and the drain of the first MOS transistor is connected to the output of the input circuit.

The absorbing circuit further includes a second MOS transistor and a light emitting diode, wherein an output end of the absorbing circuit is connected to a positive electrode of the light emitting diode, and a negative electrode of the light emitting diode is connected to the second MOS transistor a drain, a gate of the second MOS transistor is connected to a PWM control terminal of the controller, and a source of the second MOS transistor is grounded.

The control circuit includes a pulse width modulation PWM chip and a third MOS transistor, a PWM control end of the PWM chip is connected to a gate of the third MOS transistor, and a drain of the third MOS transistor is The output of the input circuit is connected, and the source of the third MOS transistor is grounded.

Wherein the absorption circuit further includes a transformer, a first input end of the transformer is connected to an output end of the input circuit, and a second input end of the transformer is connected to a drain of the third MOS tube, a third input end of the transformer is connected to a power supply end of the PWM chip, a fourth input end of the transformer is grounded, a first output end of the transformer is connected to an input end of the resonant circuit, and a second of the transformer The output is grounded.

The voltage absorbing circuit further includes a feedback circuit, and an output end of the feedback circuit is connected to a PWM control end of the PWM chip, and a ground end of the feedback circuit is grounded.

The feedback circuit includes a photocoupler, a first resistor and a second resistor, a first end of the first resistor is connected to an output end of the voltage absorbing circuit, and a second end of the first resistor is a first end of the second resistor and a first pin of the optocoupler are connected, a second pin of the second resistor is grounded, and a third pin of the optocoupler is connected to a fixed voltage. The fourth pin of the optocoupler is an output end of the feedback circuit, and is connected to a PWM control end of the PWM chip.

Embodiments of the present invention have the following beneficial effects: the control circuit controls the voltage absorbing circuit by using the on and off operating states, and when the control circuit changes from off to on, the rectification circuit generates due to the existence of parasitic capacitance. The peak voltage can be non-destructively absorbed by the resonant circuit and the peak voltage can be generated by the presence of parasitic capacitance in the control circuit when the control circuit is switched from on to off. The peak voltage can also be absorbed by the resonant circuit. Improve energy conversion efficiency and improve EMI.

DRAWINGS

1 is a schematic structural diagram of a first embodiment of a voltage absorbing circuit according to an embodiment of the present invention;

2 is a schematic structural diagram of a second embodiment of a voltage absorbing circuit according to an embodiment of the present invention;

3 is a schematic structural diagram of a third embodiment of a voltage absorbing circuit according to an embodiment of the present invention;

FIG. 4 is a schematic structural diagram of a fourth embodiment of a voltage absorbing circuit according to an embodiment of the present invention.

detailed description

Embodiments of the present invention provide a voltage absorbing circuit in order to non-destructively absorb peak voltage, improve energy utilization, and improve EMI.

The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is an embodiment of the invention, but not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of the present invention.

The terms "first", "second" and "third" and the like in the specification and claims of the present invention and the above drawings are used to distinguish different objects, and are not intended to describe a specific order. Moreover, the term "comprise" and any variants thereof are intended to cover a non-exclusive inclusion. For example, a process, method, system, product, or device that comprises a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units not listed, or alternatively Other steps or units inherent to these processes, methods, products or equipment.

Referring first to FIG. 1, FIG. 1 is a schematic structural diagram of a first embodiment of a voltage absorbing circuit according to an embodiment of the present invention. As shown in FIG. 1 , the voltage absorbing circuit provided by the first embodiment of the present invention includes:

The input circuit 110, the absorption circuit 120, and the control circuit 130, the absorption circuit 120 includes a resonance circuit 121 and a rectifier circuit 122, and the resonance circuit 121 is connected in parallel with the rectifier circuit 122.

The input end of the input circuit 110 is configured to receive an input voltage, and an output end of the input circuit 110 is simultaneously connected to an input end of the resonant circuit 121, an input end of the rectifying circuit 122, and the control circuit 130. The control terminals are connected, and the input circuit 110 is configured to provide an input voltage to the voltage absorbing circuit.

The grounding end of the control circuit 130 is grounded, and the control circuit 130 is configured to control the rectifier circuit 122 to be turned on when the control circuit 130 is turned off, so that the output current of the input circuit 110 passes the rectification The circuit 122 is provided to the output of the voltage absorbing circuit, when the control circuit 130 is turned on, the rectifier circuit 122 is controlled to be turned off, so that the current of the input circuit 110 flows into the control circuit 130;

An output end of the resonant circuit 121 is connected to an output end of the rectifier circuit 122 as the a voltage output terminal of the voltage absorbing circuit, wherein the resonant circuit 121 is configured to absorb a peak voltage generated by the rectifier circuit 122 when the control circuit 130 is turned from off to on, and the resonant circuit 121 is configured to absorb the voltage The control circuit 130 is turned from a turn-on to a spike voltage generated when turned off.

Optionally, in an embodiment of the invention, the voltage output terminal Vout of the voltage absorbing circuit is used for outputting voltage for use by an external circuit, for example, when Vout is connected to the light emitting diode, for supplying an operating voltage to the light emitting diode.

In an embodiment of the invention, the voltage sink circuit begins to operate when the input circuit 110 provides an input current. The control circuit 130 controls whether the voltage absorbing circuit outputs a voltage Vout for use by an external circuit by a different state of being turned on and off. When the control circuit 130 is turned from off to on, the output circuit of the input circuit 110 is injected into the control circuit 130. At this time, the rectifier circuit 122 is turned off, and the parasitic capacitance is generated in the rectifier circuit 122 due to a sudden change in the operating state of the rectifier circuit 122. The peak voltage is generated at both ends of the rectifier circuit 122. Due to the presence of the resonant circuit 121, the peak voltage can be non-destructively absorbed by the resonant circuit 121 in a resonant manner, and output to an external circuit for use in the process to improve energy conversion efficiency. The damage of the rectifying circuit 122 by the spike voltage is also prevented.

When the control circuit 130 is turned from on to off, since the control circuit 130 suddenly changes from the on state to the off state, parasitic capacitance occurs in the control circuit 130, causing a spike voltage to be generated at the control terminal of the control circuit 130. The current generated by the voltage is output to Vout through the resonance circuit 121, so that the energy of the parasitic capacitance can be output to the external circuit in a resonant manner, improving energy conversion efficiency and improving EMI.

Optionally, in an embodiment of the present invention, referring to FIG. 2, FIG. 2 is a schematic structural diagram of a second embodiment of a voltage absorbing circuit according to an embodiment of the present invention. As shown in FIG. 2 , the resonant circuit 121 includes a first capacitor 1211 , a second capacitor 1212 , a third capacitor 1213 , and a first inductor 1214 . The first end of the first capacitor 1211 is connected to the output end of the input circuit 110 . The second end of the first capacitor 1211 is connected to the first end of the inductor 1213 as an output end of the resonant circuit 121, and the first end of the second capacitor 1212 and the output of the input circuit 110 The first end of the third capacitor 1213 is connected to the second end of the second capacitor 1212, and the second end of the third capacitor 1213 is grounded. The second end of the second capacitor 1212 serves as an output of the resonant circuit 121.

Specifically, in the embodiment of the present invention, after the circuit is turned on, when the control circuit 130 is turned from off to When turned on, the output circuit of the input circuit 110 is injected into the control circuit 130. At this time, the rectifier circuit 122 is turned off. Since the operating state of the rectifier circuit 122 suddenly changes, parasitic capacitance is generated in the rectifier circuit 122, resulting in both ends of the rectifier circuit 122. Generating a spike voltage, and then the current generated by the spike voltage can form a series resonant tank through the second capacitor 1212, the first inductor 1214, and the first capacitor 1211, the series resonant tank will non-destructively absorb the spike voltage in a resonant manner, and The output is used in an external circuit to improve the energy conversion efficiency and also prevent the spike voltage from damaging the rectifier circuit 122.

When the control circuit 130 is turned from on to off, since the control circuit 130 suddenly changes from the on state to the off state, parasitic capacitance occurs in the control circuit 130, causing a spike voltage to be generated at the control terminal of the control circuit 130. The current generated by the voltage forms a resonant tank output to Vout through the first capacitor 1211, the first inductor 1214, and the second capacitor 1212, so that the energy of the parasitic capacitor can be supplied to the external circuit in a resonant manner, thereby improving energy conversion efficiency.

It can be seen that, in the technical solution provided by the embodiment of the present invention, when the input terminal of the input circuit 110 inputs a voltage, the voltage absorbing circuit is turned on at this time, the absorbing circuit 120 and the control circuit 130 operate, and the control circuit 130 utilizes conduction and The off-state operating state controls the voltage absorbing circuit, and when the control circuit 130 changes from off to on, the rectifying circuit 122 generates a spike voltage due to the presence of parasitic capacitance, and the peak voltage can be non-destructively absorbed by the resonant circuit 121. When the control circuit 130 is turned from the on state to the off state, the peak voltage is generated in the control circuit 130 due to the existence of the parasitic capacitance, and the peak voltage can be absorbed by the resonance circuit 121 to improve the energy conversion efficiency.

Optionally, in some possible implementation manners of the present invention, the voltage absorbing circuit is applicable to a power supply backlight circuit. Specifically, referring to FIG. 3, FIG. 3 is a voltage absorbing circuit according to an embodiment of the present invention. A schematic structural view of the third embodiment. In the resonant circuit 121, the first capacitor is C1, the second capacitor is C2, the third capacitor is C3, and the first inductor is L1.

Optionally, in some embodiments of the present invention, the resonant circuit 121 further includes a first diode D1, a second diode D2, and a third diode D3, the first diode D1 a positive electrode is connected to the first end of the first capacitor C1, and a cathode of the first diode D2 is connected to a first end of the second capacitor C2 and an anode of the second diode D2. a cathode of the second diode D2 is connected to a second end of the first inductor L1, and a cathode of the third diode D3 is connected to a second end of the first capacitor C1, the third pole The cathode of the tube D3 is connected to the second end of the second capacitor C2.

Optionally, in some embodiments of the present invention, the rectifier circuit 122 includes a fourth diode D4 and a fifth diode D5, and the anode of the fourth diode D4 and the first capacitor C1 The first end of the fourth diode D4 is connected to the second end of the second capacitor C2, the anode of the fifth diode D5 and the first end of the first capacitor C1 Connected, the cathode of the fifth diode D5 is connected to the second end of the second capacitor C2.

Optionally, in some embodiments of the present invention, the control circuit 130 includes a controller and a first MOS transistor Q1, and a control end of the controller is connected to a gate G of the first MOS transistor Q1. The current detecting end of the controller is connected to the source S of the first MOS transistor Q1, the ground of the controller is grounded, the drain D of the first MOS transistor Q1 and the output end of the input circuit 110 connection.

Optionally, in some embodiments of the present invention, the voltage absorbing circuit further includes a second MOS transistor Q2 and a light emitting diode D6, and an output end of the absorbing circuit 120 is connected to a positive electrode of the light emitting diode D6, and the light emitting diode D6 The negative electrode is connected to the drain D of the second MOS transistor Q2, the gate G of the second MOS transistor Q2 is connected to the PWM control terminal of the controller, and the source S of the second MOS transistor Q2 is grounded.

In the embodiment of the present invention, the sixth diode D6 is connected to the output terminal Vout of the voltage absorbing circuit, and the sixth diode is a light emitting diode, thereby providing backlight for the power source.

Optionally, in some embodiments of the present invention, the input circuit 110 includes a third capacitor C3, a fourth capacitor C4, and a second inductor L2. The third capacitor C3 is connected in parallel with the fourth capacitor C4, wherein the parallel connection is performed. The latter common terminal is grounded, the other common terminal is connected to the first end of the second inductor L2, the first end of the second inductor L2 is also connected to the input terminal Vin of the input circuit 110, and the second end of the second inductor L2 is used as an input. The output of circuit 110.

Optionally, in some embodiments of the present invention, the absorbing circuit 120 further includes a fifth capacitor C5, one end of the fifth capacitor C5 is connected to the second end of the second capacitor C2, and the other end of the fifth capacitor C5 is Ground.

Optionally, in some embodiments of the present invention, the control circuit 130 further includes a first resistor R1, one end of the first resistor R1 is connected to the S pole of the first MOS transistor Q1, and the other end of the first resistor R1 is Ground.

Optionally, in some embodiments of the present invention, the voltage absorbing circuit further includes a second resistor R2, One end of the second resistor R2 is connected to the S pole of the second MOS transistor Q2, and the other end of the second resistor R2 is grounded.

Optionally, the first inductor L1 can be set between 2 micro-Heng-3 micro-henry, and the first inductor L1 can be made by routing a spiral on the printed circuit board, thereby saving cost.

It can be seen that in the embodiment of the invention, when a 24 volt operating voltage is input at the input Vin of the input circuit 110, the circuit begins to operate. When the PWM signal outputted by the first PWM control terminal of the controller is high, the first MOS transistor Q1 is turned on, and the current output from the output circuit 110 charges the first MOS transistor Q1, and the fourth diode D4 and the fifth two The pole tube D5 is cut off. Since the current in the fourth diode D4 and the fifth diode D5 suddenly changes from the forward direction to the inversion when the first MOS transistor Q1 suddenly goes from the off state to the on state, the fourth diode D4 and the fifth The forward charge in the diode D5 is not discharged, that is, parasitic capacitance appears in the fourth diode D4 and the fifth diode D5, thereby being in the fourth diode D4 and the fifth diode D5. An inverted peak voltage is generated on both sides, and when the peak voltage is too high, the fourth diode D4 and the fifth diode D5 may be damaged. Due to the existence of the absorbing circuit 120 in the embodiment of the present invention, since the positive voltage of the fourth diode D4 and the fifth diode D5 is higher than the negative voltage, the second capacitor C2 and the second diode D2 are caused. The series circuit resonant circuit of the first inductor L1 and the first capacitor C1 causes the charge energy of the fourth diode D4 and the fifth diode D5 to be fed back to the input or output in a resonant manner, thereby improving energy utilization. Improve backlight conversion efficiency and improve EMI.

When the PWM signal outputted by the first PWM control terminal of the controller is low, the first MOS transistor Q1 is turned off, and the current output by the input circuit 110 is supplied to the sixth diode via the fourth diode D4 and the fifth diode D5. D6 is powered. At this time, since the first MOS transistor Q1 suddenly changes from the on state to the off state, the charge in the first MOS transistor Q1 is not discharged, thereby generating parasitic capacitance in the first MOS transistor Q1, resulting in the first MOS transistor Q1. The D terminal generates a spike voltage. The peak voltage generates a current from the first diode D1, the second diode D2, the first inductor L1, the third diode D3, and the fifth capacitor C5, and the first inductor L1 and the fifth capacitor C5 form a resonance. The loop causes the charge energy stored in the first MOS transistor Q1 to be fed back to the input or output in a resonant manner, thereby improving energy utilization and improving backlight conversion efficiency.

Optionally, in some possible implementation manners of the present invention, the voltage absorbing circuit is further applicable to a voltage conversion circuit. Specifically, referring to FIG. 4, FIG. 4 is an embodiment of the present invention. A schematic structural view of a fourth embodiment of the pressure absorbing circuit. In the resonant circuit 121, the first capacitor is C1, the second capacitor is C2, the third capacitor is C3, and the first inductor is L1.

Optionally, in some embodiments of the present invention, the control circuit 130 includes a pulse width modulation PWM chip and a third MOS transistor Q3, and the PWM control end of the PWM chip is connected to the gate of the third MOS transistor. The drain of the third MOS transistor is connected to the output terminal of the input circuit 110, and the source of the third MOS transistor is grounded.

Optionally, in some embodiments of the present invention, the absorbing circuit 120 further includes a transformer, the first input end 1 of the transformer and the input circuit, based on the absorbing circuit 120 provided by the second embodiment of the present invention. An output terminal of the transformer is connected, a second input terminal 2 of the transformer is connected to a drain of the third MOS transistor Q3, and a third input terminal 3 of the transformer is connected to a power supply terminal VCC of the PWM chip, The fourth input 4 of the transformer is grounded, the first output 5 of the transformer is connected to the input of the resonant circuit 121, and the second output 6 of the transformer is grounded.

The absorbing circuit 120 further includes a sixth capacitor C6 on the basis of the absorbing circuit 120 provided in the second embodiment of the present invention. One end of the sixth capacitor C6 is connected to one end of the fifth capacitor C5, and the other end of the sixth capacitor C6 is grounded. The sixth capacitor C6 is used to filter the circuit.

Optionally, in some embodiments of the present invention, the voltage absorbing circuit further includes a feedback circuit 140, and an output end of the feedback circuit 140 is connected to a feedback pin FB of the PWM chip, and the feedback circuit 140 Ground the ground.

Optionally, in some embodiments of the present invention, the feedback circuit 140 includes a photocoupler U1, a first resistor R1, and a second resistor R2, and the first end of the first resistor R1 and the voltage absorbing circuit The second end of the first resistor R1 is connected to the first end of the second resistor R2 and the first pin 1 of the optocoupler U1, and the second resistor R2 is connected The second pin 2 of the optical coupler is connected to a fixed voltage, and the fourth pin 4 of the optical coupler is connected to the PWM control end of the PWM chip.

In the embodiment of the present invention, the output voltage of the output voltage Vout is monitored by the optical coupler U1. When the value of Vout is too large, the fourth pin of the photocoupler outputs a feedback signal to the PWM chip for controlling the PWM. The duty ratio of the PWM signal outputted by the PWM control terminal of the chip becomes smaller. Conversely, when the photocoupler detects that the value of Vout is too small, the fourth pin of the optical coupler outputs a feedback signal to the PWM chip for control. The duty ratio of the PWM signal outputted by the control terminal of the PWM chip becomes large, The PWM signal controls Vout by controlling the turn-on and turn-off of Q3, so that the feedback circuit 140 can implement feedback control of the output voltage Vout.

Optionally, in some embodiments of the present invention, the feedback circuit 140 further includes a third resistor R3, a resistor fourth R4, a fifth resistor R5, a seventh capacitor C7, and a seventh diode D7, wherein the seventh The cathode of the diode D7 is connected to the second end of the resistor R2 and the first end of the seventh capacitor C7, the anode of the seventh diode D7 is grounded, and the control terminal of the seventh diode D7 is connected to the first of the fifth resistor R5. The second end of the fifth resistor R5 is grounded, the other end of the seventh capacitor C7 is connected to one end of the fourth resistor R4, the other end of the fourth resistor R4 is connected to the first end of the fifth resistor R5, and the third resistor R3 At one end, the other end of the third resistor R3 is connected to the output voltage.

Optionally, in some embodiments of the present invention, the input circuit 110 further includes an eighth capacitor C8 and a ninth capacitor C9, a fifth resistor R5, and a sixth diode D6, wherein one end of the eighth capacitor C8 is The other end of the eighth capacitor C8 is grounded, the other end of the fifth resistor R5 and the ninth capacitor C9 are connected to the input end of the input circuit 110, and the other end is connected to the negative pole of the sixth diode D6. The anode of the six diode D6 is connected to the D pole of the third MOS transistor Q3. The filtering of the input circuit 110 is achieved by the above circuit.

Optionally, in some embodiments of the present invention, the control circuit 130 further includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and an eighth diode D8, wherein the sixth resistor R6 is connected to the Between the G pole of the three MOS transistor Q3 and the PWM control terminal of the PWM chip, the eighth resistor R8 is connected between the S pole of the third MOS transistor Q3 and the ground, and the first end of the eighth resistor R8 is connected to the power supply end of the PWM chip. The other end of the eighth resistor R8 is connected to the negative pole of the eighth diode D8, and the anode of the eighth diode D8 is connected to the third pin of the transformer.

In the embodiment of the present invention, the first inductor L1 can be made by using the leakage inductance of the transformer secondary, thereby reducing the cost.

It can be seen that in the embodiment of the present invention, when the operating voltage is input to the input terminal Vin of the input circuit 110, the circuit starts to operate. When the PWM signal outputted by the PWM control terminal of the PWM chip is high, the third MOS transistor Q3 is turned on, and the current output from the sixth diode D6 of the output circuit 110 charges the third MOS transistor Q3, so that the second of the transformer The input terminal 2 has no input signal, the first output terminal 5 of the transformer does not output a voltage, and the fourth diode D4 and the fifth diode D5 are turned off. Since the first MOS transistor Q1 suddenly goes from the off state to the on state, the fourth diode D4 and the fifth diode D5 are inside The current suddenly changes from the forward direction to the reverse phase, so that the forward charges in the fourth diode D4 and the fifth diode D5 are not discharged, that is, in the fourth diode D4 and the fifth diode D5. A parasitic capacitance occurs to generate an inverted peak voltage on both sides of the fourth diode D4 and the fifth diode D5. When the peak voltage is too high, the fourth diode D4 and the fifth diode D5 may be caused. damage. Due to the existence of the absorbing circuit 120 in the embodiment of the present invention, since the positive voltage of the fourth diode D4 and the fifth diode D5 is higher than the negative voltage, the second capacitor C2 and the second diode D2 are caused. The series circuit resonant circuit of the first inductor L1 and the first capacitor C1 causes the charge energy of the fourth diode D4 and the fifth diode D5 to be fed back to the input or output in a resonant manner, thereby improving energy utilization. Improve backlight conversion efficiency and improve EMI.

When the PWM signal outputted by the first PWM control terminal of the controller is low, the third MOS transistor Q3 is turned off, and since the input voltage Vin of the input circuit 110 is connected to the first input terminal 1 of the transformer, the sixth diode of the input circuit 110 The anode of the tube is connected to the second input 2 of the transformer to generate a voltage at the first output 5 of the transformer such that the current output from the first output 5 of the transformer is via the fourth diode D4 and the fifth diode The tube D5 supplies power to the sixth diode D6. At this time, since the third MOS transistor Q3 suddenly changes from the on state to the off state, the charge in the third MOS transistor Q3 is not discharged, thereby generating parasitic capacitance in the third MOS transistor Q3, resulting in the first MOS transistor Q3. The D terminal generates a spike voltage. The peak voltage generates a current from the first diode D1, the second diode D2, the first inductor L1, the third diode D3, and the fifth capacitor C5 via the transformer, and the first inductor L1 and the fifth capacitor C5 The resonant circuit is formed such that the charge energy stored in the third MOS transistor Q3 is fed back to the input or output in a resonant manner, thereby improving energy utilization and improving backlight conversion efficiency.

One of ordinary skill in the art can understand that all or part of the process of implementing the foregoing embodiments can be completed by a computer program to instruct related hardware, and the program can be stored in a computer readable storage medium. When executed, the flow of an embodiment of the methods as described above may be included. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

The above disclosure is only a preferred embodiment of the present invention, and of course, the scope of the present invention is not limited thereto, and those skilled in the art can understand all or part of the process of implementing the above embodiments, and according to the present invention. The equivalent changes required are still within the scope of the invention.

Claims

A voltage absorbing circuit, wherein the voltage absorbing circuit comprises an input circuit, an absorbing circuit and a control circuit, the absorbing circuit comprising a resonant circuit and a rectifying circuit, the resonant circuit being connected in parallel with the rectifying circuit;

An input end of the input circuit is configured to receive an input voltage, and an output end of the input circuit is simultaneously connected to an input end of the resonant circuit, an input end of the rectifier circuit, and a control end of the control circuit, An input circuit for providing an input voltage to the voltage absorbing circuit;

a grounding end of the control circuit is grounded, the control circuit is configured to control the rectifying circuit to be turned on when the control circuit is turned off, so that an output current of the input circuit is provided to the An output end of the voltage absorbing circuit controls the rectifier circuit to be turned off when the control circuit is turned on, so that an output current of the input circuit flows into the control circuit;

An output end of the resonant circuit is connected to an output end of the rectifying circuit as a voltage output end of the voltage absorbing circuit, and the resonant circuit is configured to absorb the rectifying circuit, and the control circuit is turned from off to on. The peak voltage generated at the time, and the resonant circuit is used to absorb the spike voltage generated when the control circuit is turned from on to off.
The voltage absorbing circuit according to claim 1, wherein said resonant circuit comprises a first capacitor, a second capacitor, a third capacitor and an inductor, and a first end of said first capacitor is connected to an output of said input circuit a second end of the first capacitor is coupled to the first end of the inductor, as an output of the resonant circuit, a first end of the second capacitor and an output of the input circuit, and the The second end of the third capacitor is connected, the first end of the third capacitor is connected to the second end of the second capacitor, the second end of the third capacitor is grounded, and the second end of the second capacitor is The output of the resonant circuit.
The voltage absorbing circuit according to claim 2, wherein said resonant circuit further comprises a first diode, a second diode, and a third diode, said anode of said first diode and said first a first terminal of the capacitor is connected, a cathode of the first diode is connected to a first end of the second capacitor and a cathode of the second diode, and a cathode of the second diode is The second end of the inductor is connected, the anode of the third diode is connected to the second end of the first capacitor, and the cathode of the third diode is connected to the second end of the second capacitor.
The voltage sink circuit of claim 3, wherein said rectifier circuit comprises a fourth diode and a fifth diode, said anode of said fourth diode being coupled to said first end of said first capacitor , a cathode of the fourth diode is connected to a second end of the second capacitor, a cathode of the fifth diode is connected to a first end of the first capacitor, and a fifth diode is A negative electrode is coupled to the second end of the second capacitor.
The voltage absorbing circuit according to claim 4, wherein said control circuit comprises a controller and a first MOS transistor, and a control terminal of said controller is connected to a gate of said first MOS transistor, said controller The current detecting end is connected to the source of the first MOS transistor, the ground end of the controller is grounded, and the drain of the first MOS transistor is connected to the output end of the input circuit.
The voltage absorbing circuit according to claim 5, wherein the voltage absorbing circuit further comprises a second MOS transistor and a light emitting diode, an output end of the absorbing circuit is connected to a positive electrode of the light emitting diode, and a negative electrode of the light emitting diode is connected to the a drain of the second MOS transistor, a gate of the second MOS transistor is connected to a PWM control terminal of the controller, and a source of the second MOS transistor is grounded.
The voltage absorbing circuit according to claim 4, wherein said control circuit comprises a pulse width modulation PWM chip and a third MOS transistor, wherein a PWM control terminal of said PWM chip is connected to a gate of said third MOS transistor, The drain of the third MOS transistor is connected to the output terminal of the input circuit, and the source of the third MOS transistor is grounded.
A voltage absorbing circuit according to claim 7, wherein said absorbing circuit further comprises a transformer, a first input of said transformer being coupled to an output of said input circuit, said second input of said transformer being said a drain of the third MOS transistor is connected, a third input end of the transformer is connected to a power supply end of the PWM chip, a fourth input end of the transformer is grounded, a first output end of the transformer is connected to the resonant circuit The input is connected, and the second output of the transformer is grounded.
The voltage sink circuit according to claim 8, wherein said voltage sink circuit further comprises a feedback circuit, an output of said feedback circuit being coupled to a PWM control terminal of said PWM chip, and a ground terminal of said feedback circuit being grounded.
The voltage absorbing circuit according to claim 9, wherein said feedback circuit comprises a photocoupler, a first resistor, and a second resistor, said first end of said first resistor being connected to an output of said voltage absorbing circuit, a second end of the first resistor is coupled to a first end of the second resistor and a first pin of the optocoupler, and a second pin of the second resistor is grounded, the optocoupler The third pin is connected to a fixed voltage, and the fourth pin of the optical coupler is an output end of the feedback circuit, and is connected to the PWM control end of the PWM chip.