WO2023070498A1 - 纹路识别模组及显示装置 - Google Patents

纹路识别模组及显示装置 Download PDF

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Publication number
WO2023070498A1
WO2023070498A1 PCT/CN2021/127297 CN2021127297W WO2023070498A1 WO 2023070498 A1 WO2023070498 A1 WO 2023070498A1 CN 2021127297 W CN2021127297 W CN 2021127297W WO 2023070498 A1 WO2023070498 A1 WO 2023070498A1
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Prior art keywords
layer
base substrate
recognition module
orthographic projection
substrate
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PCT/CN2021/127297
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English (en)
French (fr)
Inventor
海晓泉
董学
袁广才
陈小川
王迎姿
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京东方科技集团股份有限公司
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Priority to CN202180003181.1A priority Critical patent/CN116391211A/zh
Priority to PCT/CN2021/127297 priority patent/WO2023070498A1/zh
Publication of WO2023070498A1 publication Critical patent/WO2023070498A1/zh

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  • the present disclosure relates to the field of display technology, in particular to a texture recognition module and a display device.
  • biometric technology has been more and more widely used.
  • fingerprint recognition technology has been widely used in mobile terminals and smart homes. Provide security protection for user information.
  • Optical fingerprint recognition is one of the means to realize fingerprint recognition.
  • the principle of optical fingerprint recognition is as follows: When the finger is placed on the display product, the emitted light of the light source contained in the display product shines on the valley and ridge of the finger, and is reflected by the valley and ridge of the finger before entering the display product contained on the photosensitive device. Since the light intensity reflected by the positions of valleys and ridges is different, the photosensitive device generates different electrical signals according to the above-mentioned difference in reflected light intensity to realize fingerprint recognition.
  • the pattern recognition module and the display device provided by the embodiment of the present disclosure, the specific scheme is as follows:
  • an embodiment of the present disclosure provides a texture recognition module, including:
  • a texture recognition substrate includes a base substrate, and a plurality of photosensitive devices arranged in an array on one side of the base substrate;
  • a light-constraining layer which is arranged in direct contact with one side of the texture identification substrate having the plurality of photosensitive devices, the light-constraining layer includes at least one diaphragm layer, and is located on the diaphragm layer away from the texture recognition substrate A microlens layer on one side; wherein, the diaphragm layer has light-transmitting holes arranged in an array, and the orthographic projection of the light-transmitting holes on the base substrate is located at the position of the photosensitive device on the base substrate In the orthographic projection on the above; the microlens layer includes a plurality of microlenses arranged at intervals, and the orthographic projection of the microlens on the base substrate covers and is larger than the light transmission hole on the base substrate orthographic projection of .
  • the light-constraining layer includes at least two layers of the diaphragm layer, and the light-transmitting holes in each diaphragm layer are one by one Corresponding and at least partially coincident orthographic projections on said substrate substrate.
  • the diaphragm layer in the direction away from the texture recognition substrate, includes a first diaphragm layer, a second diaphragm layer arranged in sequence layer and the third aperture layer;
  • the first diaphragm layer includes first light transmission holes arranged in an array
  • the second diaphragm layer includes second light transmission holes arranged in an array
  • the third diaphragm layer includes third light holes arranged in an array. light hole
  • the orthographic projection of the second light transmission hole on the base substrate covers and is greater than the orthographic projection of the first light transmission hole on the base substrate, and the second light transmission hole is on the substrate
  • the orthographic projection on the base substrate is located within the orthographic projection of the third light transmission hole on the base substrate.
  • the orthographic projection of the center of the first light transmission hole on the base substrate corresponds to the center of the second light transmission hole having a first distance between orthographic projections on the substrate substrate;
  • a ratio of the first distance, the second distance to the aperture of the first light transmission hole is greater than or equal to 0 and less than or equal to 20%.
  • the aperture D2 of the second light transmission hole satisfies the following relational expression:
  • D 2 k*D 1 , D 2 ⁇ D 3 ;
  • D 1 is the diameter of the first light transmission hole
  • D 3 is the diameter of the third light transmission hole
  • the microlenses are provided in one-to-one correspondence with the light transmission holes, and the microlenses include a convex surface and a plane, wherein the convex surface is located at The plane is away from the side of the light transmission hole.
  • the light-constraining layer further includes supporting layers arranged alternately with the aperture layer;
  • the aperture D1 of the first light-transmitting hole satisfies the following relational expression:
  • D is the aperture of the microlens
  • h s is the height of the microlens
  • n is the refractive index of the microlens
  • nx is the refractive index of the support layer
  • ⁇ is the light receiving angle.
  • the support layer includes a first support layer, a second support layer and a third support layer; wherein,
  • the first support layer is located between the first aperture layer and the second aperture layer
  • the second support layer is located between the second aperture layer and the third aperture layer
  • the third supporting layer is located on a side of the third diaphragm layer away from the second diaphragm layer.
  • the light-constraining layer further includes a green resin layer, and the green resin layer is located between the first aperture layer and the first support. between layers.
  • the green resin layer fills the first light transmission hole, and the second supporting layer fills the second light transmission hole, so The third support layer fills the third light transmission hole.
  • the aperture D3 of the third light transmission hole satisfies the following relationship:
  • H is the distance between the surface of the microlens layer facing the texture recognition substrate side and the surface of the first diaphragm layer away from the texture recognition substrate side
  • H3 is the third support layer thickness
  • H ⁇ [D 2 /(4h s )]*[n x /(n-1)] ⁇ - ⁇ (3n-2)*n x *h s /[2(n 2 -n)] ⁇ ;
  • H H 1 +H 2 +H 3 +H 4 +2h
  • H1 is the thickness of the first supporting layer
  • H2 is the thickness of the second supporting layer
  • H4 is the thickness of the green resin layer
  • h is the thickness of the second diaphragm layer
  • the thickness H1 of the first support layer satisfies the following relationship:
  • H 1 D 2 *(HH 3 )/D 3 -H 4 .
  • the material of the support layer includes transparent resin and/or green resin.
  • the material of the first diaphragm layer includes metal, and the materials of the second diaphragm layer and the third diaphragm layer are both Includes black resin.
  • the distance between adjacent microlenses is greater than 0 ⁇ m and less than or equal to 2 ⁇ m.
  • the shape of the orthographic projection of the microlens on the base substrate is a rounded square, a circle, a right square or a hexagon.
  • the texture recognition substrate further includes a plurality of pixel driving circuits, and the layer where the plurality of pixel driving circuits are located is located where the plurality of photosensitive devices are located. Between the layer and the base substrate, the pixel driving circuit is electrically connected to the photosensitive device in a one-to-one correspondence.
  • each of the photosensitive devices includes at least one sub-photosensitive device, and the sub-photosensitive device includes a stacked first electrode, a photoelectric conversion layer and second electrode;
  • each of the first electrodes is electrically connected to the corresponding pixel driving circuit
  • each of the second electrodes is set independently of each other
  • each of the photoelectric conversion layers set independently of each other.
  • the texture recognition substrate further includes a plurality of connection electrodes, and the connection electrodes are arranged on the same layer as the first electrode;
  • Each of the first electrodes of the same photosensitive device is electrically connected to the corresponding pixel driving circuit through the connection electrode.
  • each of the photosensitive devices includes four sub-photosensitive devices, and in the same photosensitive device, the four sub-photosensitive devices Arranged in two rows and two columns.
  • the plurality of connection electrodes include a plurality of first connection electrodes, and the four first electrodes in one photosensitive device pass through the same One of the first connection electrodes is electrically connected to the corresponding pixel circuit, and the orthographic projection of the first connection electrode on the base substrate is electrically connected to the four first electrodes on the base substrate.
  • the orthographic projections on are overlapping each other.
  • the plurality of connection electrodes further include a plurality of second connection electrodes, and each of the second connection electrodes is connected to one of the photosensitive devices.
  • the adjacent two first electrodes are electrically connected, and the orthographic projection of the second connection electrode on the base substrate is the same as the two adjacent first electrodes electrically connected on the base substrate. The orthographic projections of both overlap each other.
  • one of the photoelectric conversion layers corresponds to at least one of the microlenses.
  • the photoelectric conversion layer corresponds to the microlens one by one, and the orthographic projection of the photoelectric conversion layer on the substrate is located at corresponding to the orthographic projection of the microlens on the base substrate.
  • the microlenses are arranged in a one-to-one correspondence with the light transmission holes;
  • the orthographic projection of the light transmission hole on the base substrate is located in the central area corresponding to the orthographic projection of the photoelectric conversion layer on the base substrate, and the center of the photoelectric conversion layer is on the base substrate
  • the orthographic projection on is roughly coincident with the orthographic projection of the center of the light transmission hole on the base substrate.
  • the pattern recognition substrate further includes a planar layer, an insulating layer and a transparent bias layer, wherein the planar layer, the insulating layer and The transparent bias layer is sequentially located on the side of the layer where the multiple photosensitive devices are located away from the base substrate;
  • the planar layer includes a plurality of first via holes, the first via holes are arranged in one-to-one correspondence with the second electrodes, and the orthographic projection of the first via holes on the base substrate is located at a location corresponding to the first via holes.
  • the insulating layer includes a plurality of second via holes, and the second via holes communicate with the first via holes one by one, and the second via holes
  • the orthographic projection on the base substrate is located within the orthographic projection on the base substrate corresponding to the first via hole;
  • the second electrode is electrically connected to the transparent bias layer through the first via hole and the second via hole communicated with each other.
  • the orthographic projection of the first via hole on the photoelectric conversion layer, and the projection of the second via hole on the photoelectric conversion layer are located in the central area of the photoelectric conversion layer;
  • the orthographic projection of the center of the first via hole on the photoelectric conversion layer and the orthographic projection of the center of the second via hole on the photoelectric conversion layer are substantially coincident with the center of the photoelectric conversion layer.
  • the texture recognition substrate includes a texture recognition area, and a noise reduction area located on at least one side of the texture recognition area;
  • the plurality of photosensitive devices, the light transmission hole, the first via hole and the second via hole are located in the texture identification area, and the plurality of microlenses are located in the texture identification area and the noise reduction area. district;
  • the texture recognition substrate also includes a capacitor located in the noise reduction area, and the capacitor includes a first electrode plate and a second electrode plate facing each other; wherein, the first electrode plate is on the same layer as the first electrode , the same material, the second electrode plate and the second electrode have the same layer and the same material;
  • the planar layer further includes a third via hole located in the noise reduction area, and the orthographic projection of the third via hole on the base substrate is located at the orthogonal projection of the first electrode plate on the base substrate.
  • the third via hole is filled with the insulating layer, so that the first electrode plate and the second electrode plate are insulated from each other; the area of a third via hole is the same as that of a photosensitive device The sum of the areas of the first via holes in the region is substantially the same.
  • the pattern recognition substrate further includes a barrier layer and an electromagnetic shielding layer, wherein the barrier layer is located between the transparent bias layer and the Between the light confinement layers, the electromagnetic shielding layer is located between the blocking layer and the light confinement layer.
  • the pixel driving circuit in the above texture recognition module includes: a reset transistor, an amplifying transistor and a read transistor, wherein the reset transistor, the amplifying transistor and the At least one of the read transistors is a double gate transistor.
  • the pixel driving circuit further includes a noise reduction transistor, and the noise reduction transistor is a single-gate transistor or a double-gate transistor.
  • an embodiment of the present disclosure provides a display device, including: a display module, a fingerprint recognition module, and an adhesive layer; wherein, the fingerprint recognition module is the above-mentioned fingerprint recognition module provided by the embodiment of the present disclosure , the fingerprint identification module is located on the opposite side of the display module display side; the adhesive layer is located between the display module and the fingerprint identification module, and the adhesive layer is on the display module The orthographic projection on the group is located in the bezel area of the display module.
  • FIG. 1 is a schematic structural diagram of a texture recognition module provided by an embodiment of the present disclosure
  • Fig. 2 is another schematic structural diagram of the pattern recognition module provided by the embodiment of the present disclosure.
  • Fig. 3 is another schematic structural diagram of the pattern recognition module provided by the embodiment of the present disclosure.
  • Fig. 4 is another schematic structural diagram of the texture recognition module provided by the embodiment of the present disclosure.
  • Fig. 5 is a sectional view along line I-II in Fig. 1, Fig. 2 Fig. 3 or Fig. 4;
  • FIG. 6 is a schematic diagram of a matching of a light confinement layer and a photosensitive device provided by an embodiment of the present disclosure
  • Fig. 7 is another schematic diagram of matching between the light confinement layer and the photosensitive device provided by the embodiment of the present disclosure.
  • FIG. 8 is another schematic diagram of matching between the light confinement layer and the photosensitive device provided by the embodiment of the present disclosure.
  • FIG. 9 is another schematic diagram of matching between a light confinement layer and a photosensitive device provided by an embodiment of the present disclosure.
  • Fig. 10 is a sectional view along line III-IV in Fig. 6, Fig. 7, Fig. 8 or Fig. 9;
  • Fig. 11 is the light receiving angle curve of the texture recognition module provided by the embodiment of the present disclosure and the light receiving angle curve of the texture recognition module in the related art;
  • Fig. 12 is a design layout of an area where a photosensitive device is located in the pattern recognition area in the pattern recognition module provided by an embodiment of the present disclosure
  • Fig. 13 is a schematic structural diagram of the layer where the first electrode is located in Fig. 12;
  • Fig. 14 is a schematic structural diagram of the photoelectric conversion layer and the layer where the second electrode is located in Fig. 12;
  • FIG. 15 is a schematic structural view of the first flat layer and the first insulating layer in FIG. 12;
  • Fig. 16 is a schematic structural diagram of a transparent bias layer or an electromagnetic shielding layer in Fig. 12;
  • FIG. 17 is a schematic structural diagram of the area where a capacitor is located in the noise reduction area in the pattern recognition module provided by an embodiment of the present disclosure
  • Fig. 18 is a sectional view along the line V-VI in Fig. 17;
  • FIG. 19 is a schematic structural diagram of the gate metal layer in FIG. 12;
  • FIG. 20 is a schematic structural diagram of the active layer in FIG. 12;
  • FIG. 21 is a schematic structural diagram of a gate insulating layer and an interlayer dielectric layer in FIG. 12;
  • FIG. 22 is a schematic structural diagram of a source-drain metal layer in FIG. 12;
  • FIG. 23 is a schematic structural diagram of a second planar layer and a second insulating layer in FIG. 12;
  • FIG. 24 is another schematic structural diagram of a gate metal layer provided by an embodiment of the present disclosure.
  • FIG. 25 is a schematic structural diagram of a pixel driving circuit included in FIG. 12;
  • Fig. 26 is a comparison diagram of the signal-to-noise ratio of the amplification transistor provided by the embodiment of the present disclosure under single gate and double gate;
  • FIG. 27 is a schematic structural diagram of another pixel driving circuit provided by an embodiment of the present disclosure.
  • FIG. 28 is a design layout of the pixel driving circuit shown in FIG. 27;
  • FIG. 29 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure.
  • the collimating structure including collimating film and microlens
  • the three pain points of the bonding solution that is, the alignment structure is directly bonded to the surface of the texture recognition substrate: large-angle crosstalk, film twill/moiré, and poor reliability (NG), so that in the process of optical fingerprint recognition Improve the accuracy of the identified fingerprint information.
  • an embodiment of the present disclosure provides a pattern recognition module for recognizing patterns such as fingerprints and palm prints.
  • the present disclosure takes fingerprint recognition as an example for illustration.
  • the texture recognition module provided by the embodiment of the present disclosure includes:
  • a texture recognition substrate 100 includes a substrate substrate 101, and a plurality of photosensitive devices 102 arranged in an array on one side of the substrate substrate 101; optionally, the substrate substrate 101 can be a flexible substrate substrate, such as Polyimide (PI) substrate; Alternatively, the substrate substrate 101 can also be a rigid substrate substrate, such as a glass (Glass) substrate;
  • PI Polyimide
  • the substrate substrate 101 can also be a rigid substrate substrate, such as a glass (Glass) substrate;
  • the light-constraining layer 200 is set in direct contact with one side of the texture identification substrate 100 having a plurality of photosensitive devices 102.
  • the light-constraining layer 200 includes at least one diaphragm layer 201 (for example, includes a first diaphragm layer 211, a second diaphragm layer 211 and the third aperture layer 213), and the microlens layer (including microlens 202) located on the side of the aperture layer 201 away from the texture recognition substrate 100; wherein, the aperture layer 201 can be made of black matrix (BM) material, molybdenum oxide , aluminum oxide or chrome metal and other light-absorbing or low-reflectivity materials, the diaphragm layer 201 has light-transmitting holes arranged in an array (for example, including a first light-transmitting hole a, a second light-transmitting hole b and a third light-transmitting hole Hole c), the orthographic projection of the light-transmitting hole on the base substrate 101 is located in the ortho
  • the pattern recognition module provided by the embodiment of the present disclosure, by directly integrating the light confinement layer 200 on the surface of the pattern recognition substrate 100 , there is no need to change the relevant manufacturing process of the pattern recognition substrate 100 , which facilitates mass production. Moreover, since the light-constraining layer 200 is in direct contact with the side of the texture recognition substrate 100 with multiple photosensitive devices 102, instead of being attached to the surface of the texture recognition substrate 100, it can effectively improve the alignment structure solution in the related art. Large-angle crosstalk, film twill/moiré, poor reliability, etc., so that the accuracy of the identified fingerprint information can be improved during the optical fingerprint identification process.
  • One-to-one correspondence and the orthographic projections on the base substrate 100 are at least partially overlapped, so that the collimating effect on the light can be achieved through the mutual cooperation of the diaphragm layers 201 .
  • the second aperture layer 212 includes the third aperture layer 213; wherein, the first aperture layer 211 includes the first light transmission holes a arranged in an array, and the second aperture layer 212 includes the second apertures a arranged in an array.
  • the light transmission hole b, the third aperture layer 213 includes the third light transmission hole c arranged in an array; the orthographic projection of the second light transmission hole b on the substrate 101 covers and is larger than the first light transmission hole a on the substrate The orthographic projection on the substrate 101 , and the orthographic projection of the second light transmission hole b on the base substrate 101 is located within the orthographic projection of the third light transmission hole c on the base substrate 101 .
  • the texture recognition module provided by the embodiments of the present disclosure, as shown in FIG. 6 to FIG.
  • There is a second distance between the orthographic projection of the center O1 on the base substrate 101 and the orthographic projection of the center O3 corresponding to the third light transmission hole c on the base substrate 101 that is, O1 and O3 are shown in FIG.
  • the center O 1 of the first light transmission hole a, the center O 2 of the second light transmission hole b, and the center O 3 of the third light transmission hole c are located on the same straight line, and the collimation effect is the best. good.
  • the collimation effect is the best. good.
  • there may be a slight deviation in the center of the three within the above-mentioned deviation range of 0-20%, the overlapping first light-transmitting hole a and the second light-transmitting hole a
  • the hole b and the third light-transmitting hole c can still have an excellent collimation effect.
  • the abscissa represents the light-receiving angle of the light-constraining layer 200
  • the ordinate represents the transmittance (T) of the light-transmitting holes contained in the light-constraining layer 200.
  • the curve in this coordinate system is called the light-receiving angle curve.
  • the full width at half maximum (FWHM) of the receiving angle curve is a core index to characterize the light confinement layer 200 .
  • the FWHM is required to be within 7°
  • the area surrounded by the light-receiving angle curve and the abscissa is the fingerprint signal volume received by the photosensitive device 102.
  • the central transmittance (equivalent to the peak value of the light collection angle curve) of the light transmission hole the better.
  • the aperture D2 of the second light transmission hole b satisfies the following relational expression:
  • D 1 is the diameter of the first light transmission hole a
  • D 3 is the diameter of the third light transmission hole c.
  • the third light-transmitting hole c can pass through all the light in the range of L 1 -L 2
  • the second light-transmitting hole b and the first light-transmitting hole a respectively have one light that can just pass through L 1 -L 2 Aperture for all light rays in range.
  • the third light transmission hole c can pass through L All the light in the range of 1 ⁇ L 2 is sequentially irradiated onto the photosensitive device 102 through the second light-transmitting hole b and the first light-transmitting hole a, thereby maximizing the central transmittance of the light-transmitting hole, thereby improving the photosensitive device
  • the received fingerprint semaphore at 102 enhances the accuracy of fingerprint identification.
  • the walls of the light-transmitting holes are perpendicular to the base substrate 101 , and in this case, the aperture uniformity of the light-transmitting holes is relatively good.
  • the hole wall of the light-transmitting hole may not be perpendicular to the base substrate 101, but forms a certain slope relative to the base substrate 101 (as shown in FIG. 10 ).
  • the wall of the light-transmitting hole The aperture gradually increases in the direction Y away from the base substrate 101 , and the aperture of the light-transmitting hole in the present disclosure may refer to the maximum value of the aperture.
  • the microlens 202 includes a convex surface S 1 and a plane S 2 , wherein the convex surface S 1 is located on the side of the plane S 2 away from the light-transmitting hole, so that the microlens 202 can Effectively converge the reflected light of the fingerprint to the position corresponding to the light transmission hole.
  • the light hole c passes through all the light in the range of L 1 ⁇ L 2 and irradiates the photosensitive device 102 through the second light hole b and the first light hole a in sequence, and the aperture D 1 of the first light hole a can satisfy the following relationship Mode:
  • D is the aperture of the microlens 202
  • h s is the height of the microlens 202
  • n is the refractive index of the microlens 202
  • nx is the refractive index of the support layer 203
  • ⁇ is the light receiving angle.
  • the supporting layer 203 may include a first supporting layer 231, a second supporting layer 232, and a third supporting layer 233; wherein , the first support layer 231 is located between the first aperture layer 211 and the second aperture layer 212, the second support layer 232 is located between the second aperture layer 212 and the third aperture layer 213, and the third support layer 233 Located on the side of the third aperture layer 213 away from the second aperture layer 212 .
  • the first support layer 231 fills the first light transmission hole a
  • the second support layer 232 fills the second light transmission hole b
  • the third support layer 233 fills the third light transmission hole c.
  • the above-mentioned texture recognition module provided by the embodiments of the present disclosure, as shown in FIG. between the first supporting layers 231 . Since light above 600nm in ambient light can pass through the finger and irradiate onto the light confinement layer 200 , and then be received by the photosensitive device 102 to interfere with the fingerprint recognition effect.
  • the green resin layer 204 can intercept light above 600nm, so the green resin layer 204 is disposed between the first aperture layer 211 and the first support layer 231, which can effectively avoid the interference of ambient light and improve the fingerprint identification effect.
  • the green resin layer 204 is arranged between the first aperture layer 211 and the first support layer 231, which is beneficial to maintain the alternate arrangement of the first support layer 231, the second aperture layer 212, and the second support layer 232 in the related art. , process stability of the third diaphragm layer 213, the third supporting layer 233 and the microlens layer.
  • the material of the support layer 203 may include transparent resin ( OC) and/or green resin (G-Resin). It is easy to understand that, when at least one of the first support layer 231, the second support layer 232 and the third support layer 233 is made of green resin, the filtering of ambient light above 600nm can be achieved.
  • the green resin layer 204 may not be provided, and at this time the first support layer 231 fills the first light transmission hole a, of course, the green resin layer 204 may also be provided to further intercept ambient light above 600 nm.
  • the first supporting layer 231 , the second supporting layer 232 and the third supporting layer 233 are all made of transparent resin, in order to effectively filter out ambient light above 600 nm, a green resin layer 204 needs to be provided.
  • the aperture D3 of the third light-transmitting hole c satisfies the following relationship:
  • H is the distance between the surface of the microlens layer facing the texture recognition substrate 100 and the surface of the first diaphragm layer 211 away from the texture recognition substrate 100
  • H3 is the thickness of the third support layer 233 .
  • the aperture D3 of the third light transmission hole c satisfies the above-mentioned relational expression (4), it can be separated from the surface of the microlens layer (including the microlens 202 ) facing the texture recognition substrate 100 to the first diaphragm layer 211.
  • the distance H between the surfaces on one side of the texture identification substrate 100, the aperture D of the microlens 202, and the thickness H1 of the third support layer 233 set the aperture D3 of the third light-transmitting hole c, so that the fingerprints collected by the microlens 202
  • the reflected light can almost all converge to the position of the third light-transmitting hole c, and then irradiate onto the photosensitive device 102 through the third light-transmitting hole c, the second light-transmitting hole b and the first light-transmitting hole a, thereby increasing the
  • the central transmittance is improved, the amount of fingerprint signals received by the photosensitive device 102 is increased, and the fingerprint recognition accuracy is improved.
  • the thickness of the second diaphragm layer 212 is approximately the same as the thickness of the third diaphragm layer 213, that is, the difference between the thicknesses of the two may be zero. , can also be within the error range caused by measurement, manufacturing process and equipment, for example, the difference between the thicknesses of the two is less than 0.2 ⁇ m;
  • the distance H between the surfaces of the diaphragm layer 211 away from the texture recognition substrate 100 satisfies the following relationship:
  • H ⁇ [D 2 /(4h s )]*[n x /(n-1)] ⁇ - ⁇ (3n-2)*n x *h s /[2(n 2 -n)] ⁇ (5 );
  • H 1 is the thickness of the first support layer 231
  • H 2 is the thickness of the second support layer 232
  • H 4 is the thickness of the green resin layer 204
  • h is the thickness of the second aperture layer 212 and the third aperture layer 213 thickness.
  • the distance between the surface of the microlens layer (including the microlens 202 ) facing the texture recognition substrate 100 and the surface of the first diaphragm layer 211 away from the texture recognition substrate 100 can be set according to the above relationship (5).
  • the thickness H 3 , the thickness h of the second diaphragm layer 212 , and the thickness h of the third diaphragm layer 213 are used to enhance the central transmittance and prevent crosstalk.
  • the thickness H1 of the first supporting layer 231 satisfies the following relationship:
  • H 1 D 2 *(HH 3 )/D 3 -H 4 (7).
  • the light receiving angle ⁇ can be kept small, so as to improve the accuracy of fingerprint recognition.
  • the value ranges of the above-mentioned parameters can be respectively: 1.4 ⁇ n x ⁇ 1.7, 1.5 ⁇ n ⁇ 2.0, 1° ⁇ 10°, 2 ⁇ m ⁇ D ⁇ 50 ⁇ m, 1 ⁇ m ⁇ D 1 ⁇ 10 ⁇ m, 1 ⁇ m ⁇ D 2 ⁇ 40 ⁇ m, 2 ⁇ m ⁇ D 3 ⁇ 50 ⁇ m, 1 ⁇ m ⁇ hs ⁇ 20 ⁇ m , 1 ⁇ m ⁇ H 1 ⁇ 20 ⁇ m, 1 ⁇ m ⁇ H 2 ⁇ 20 ⁇ m, 1 ⁇ m ⁇ H 3 ⁇ 20 ⁇ m, 0.5 ⁇ m ⁇ H 4 ⁇ 3 ⁇ m, 0.5 ⁇ m ⁇ h ⁇ 1.5 ⁇ m, 4.5 ⁇ m ⁇ H ⁇ 100 ⁇ m.
  • microlenses 202 there is a constant interval (lens space) between adjacent microlenses 202, for example, the distance between adjacent microlenses 202 is greater than 0 ⁇ m and less than or equal to 2 ⁇ m,
  • the size (Pitch) of the photosensitive device 102 in the texture recognition substrate 100 with small resolution is larger, and the microlens matched with the photosensitive device 102
  • the size of the lens 202 is relatively large; the size of the photosensitive device 102 in the texture recognition substrate 100 with high resolution is relatively small, and the size of the microlens 202 matching the photosensitive device 102 is correspondingly small.
  • the microlens 202 of larger size can converge more fingerprint reflected light onto the matching photosensitive device 102 , thus resulting in the pattern recognition of the photosensitive device in the substrate 100 with high resolution.
  • the amount of fingerprint signals received by 102 is smaller than the amount of fingerprint signals received by the photosensitive device 102 in the texture recognition substrate 100 with a small resolution.
  • the central transmittance of the light transmission hole in the texture recognition substrate 100 with high resolution will be smaller than the central transmittance of the transmission hole in the texture recognition substrate 100 with small resolution.
  • the right-angled square or rounded square microlenses 202 can be selected to increase the central transmittance.
  • hexagonal or circular microlenses 202 can be selected, and the central transmittance is almost unchanged at this time; Square or rounded square microlenses 202 to further increase the central transmittance.
  • shape of the orthographic projection of the microlens 202 on the base substrate 101 can also be flexibly set according to actual needs, which is not specifically limited here.
  • a microlens 202 can be combined with a group of overlapping light transmission holes (for example, the first light transmission hole a, the second light transmission hole b, and the third light transmission hole that are overlapped by the front projection) c)
  • a group of light transmission holes that are set correspondingly are circular holes, as shown in Figure 6;
  • the orthographic projection shape of microlens 202 is In the case of a square with rounded corners, a square with right angles, and a hexagon, the corresponding set of light transmission holes can be square holes with rounded corners (as shown in Figure 7), square with right angles (as shown in Figure 8),
  • the hexagons (as shown in FIG. 9 ) may also be circular holes as shown in FIG. 6 , which are not specifically limited here.
  • Fig. 11 shows the light-receiving angle curve M when the above parameters are adopted and the microlens 202 is a rounded square, and the light-receiving angle curve M of the multiplexed texture recognition substrate 100 as the diaphragm layer 201 in the related art M'. It can be seen from FIG. 11 that when the same FWHM is 7°, the central transmittance of the present disclosure is 42%, and the central transmittance of the related art is 30%. Therefore, compared with the related art, the central transmittance of the present disclosure is Increased by 12%, which is beneficial to improve the accuracy of fingerprint recognition.
  • the pixel driving circuit 103 is electrically connected to the photosensitive device 102 in one-to-one correspondence, so as to realize independent driving of the photosensitive device 102 by the pixel driving circuit 103.
  • the pixel driving circuit 102 can be in a passive (PPS) mode or an active (APS) mode.
  • the APS mode is a pixel design scheme to improve image quality and reduce noise interference.
  • the pixel driving circuit 102 in the APS mode amplifies the electrical signal provided by the photosensitive device 104 that is easily affected by noise, so as to minimize the interference with external chips.
  • IC Amplifier-related external read noise sources, and less affected by impedance, can be fabricated in large areas.
  • the photosensitive device S includes a first electrode 121 , a photoelectric conversion layer 122 and a second electrode 123 which are stacked.
  • each first electrode 121 is electrically connected to a corresponding pixel driving circuit 103
  • each second electrode 123 is arranged independently of each other
  • each photoelectric conversion layer 122 is arranged independently of each other.
  • each first electrode 121 of the same photosensitive device 102 is electrically connected to the corresponding pixel driving circuit 103 through the connection electrode 121 ′.
  • each photosensitive device 102 may include four sub-photosensitive devices S, in the same photosensitive In the device 102, four sub-photosensitive devices S are arranged in two rows and two columns.
  • the four first electrodes 121 in the device 102 can be electrically connected to the corresponding pixel drive circuit 103 through the same first connection electrode 1211 ′, and the orthographic projection of the first connection electrode 1211 ′ on the base substrate 101 is connected to the four electrically connected electrodes 1211 ′.
  • the orthographic projections of the first electrodes 121 on the substrate 101 overlap each other, which means that the first connecting electrode 1211 ′ is located in the central area of the photosensitive device 102 .
  • Two connecting electrodes 1212' are electrically connected to two adjacent first electrodes 121 in one photosensitive device 102, and the orthographic projection of the second connecting electrode 1212' on the base substrate 101 is electrically connected to two adjacent first electrodes 121
  • the orthographic projections on the base substrate 101 overlap with each other, which means that the second connection electrode 1212 ′ extends from the gap between two adjacent first electrodes 121 to the edge area with the first electrode 121 .
  • the second connection electrode 1212' can reduce the overall resistance value of the first electrode 121 in the same photosensitive device 102.
  • the first connecting electrode 1211' is located in the central area of the photosensitive device 102, so it is convenient to connect the pixel driving circuit 103 and the photosensitive device 103 through the first connecting electrode 1211'.
  • the second connecting electrode 1212' can also be used to connect the pixel driving circuit 103 and the photosensitive device 103, which is not specifically limited here.
  • the orthographic projection on 101 is located in the orthographic projection of the corresponding microlens 202 on the base substrate 101, so that all the reflected light of the fingerprint collected by the microlens 202 is absorbed by the corresponding photoelectric conversion layer 122, thereby increasing the signal amount and increasing SNR.
  • one photoelectric conversion layer 122 may also be provided corresponding to at least two microlenses 202 , which is not specifically limited here.
  • the orthographic projections of the light hole b and the third light transmission hole c) on the base substrate 101 are located in the central area of the orthographic projection of the corresponding photoelectric conversion layer 122 on the base substrate 101 (that is, the area near the center O of the photoelectric conversion layer 122 ), and the orthographic projection of the center O of the photoelectric conversion layer 122 on the base substrate 101 and the center of the light transmission hole (for example, including the center O 1 of the first light transmission hole a and the second light transmission hole a that are overlapped by the orthographic projection Orthographic projections of the center O 2 of b and the center O 3 of the third light transmission hole c) on the base substrate 101 are approximately coincident.
  • the "approximate coincidence” may coincide exactly, and there may also be some deviations (for example, a deviation of ⁇ 0.6 ⁇ m ), therefore, the relationship of "substantially coincident" between related features falls within the scope of protection of the present disclosure as long as the error tolerance is met.
  • the photoelectric conversion layer 122 provided in the embodiments of the present disclosure may include a P-type semiconductor layer, an I-type semiconductor layer (also referred to as an intrinsic semiconductor layer) and an N-type semiconductor layer that are stacked. And a patterning process can be used to form the photoelectric conversion layer 122 and the second electrode 123.
  • a patterning process can be used to form the photoelectric conversion layer 122 and the second electrode 123.
  • An orthographic projection of the conversion layer 122 on the base substrate 101 As shown in FIG. An orthographic projection of the conversion layer 122 on the base substrate 101 .
  • the distance between the boundary of the orthographic projection of the second electrode 123 on the base substrate 101 and the boundary of the orthographic projection of the photoelectric conversion layer 122 on the base substrate 101 may be 0.5 ⁇ m ⁇ 2 ⁇ m.
  • the texture recognition module provided by the embodiments of the present disclosure, as shown in FIG. 5, FIG. 12, FIG. 14 to FIG. An insulating layer 105 and a transparent bias layer 106, wherein the first flat layer 104, the first insulating layer 105 and the transparent bias layer 106 are sequentially located on the side of the layer where the multiple photosensitive devices 102 are located away from the base substrate 101;
  • the second electrode 123 is loaded with a bias voltage
  • the first flat layer 104 may include a plurality of first via holes d, the first via holes d are provided in one-to-one correspondence with the second electrodes 123, and the first via holes d are on the base substrate 101
  • the orthographic projection of is located within the orthographic projection of the corresponding second electrode 123 on the base substrate 101;
  • the first insulating layer 105 includes a plurality of second via holes e, and the second via holes e communicate with the first via holes d one by one, The orthographic projection of the second via hole e on the base
  • the transparent bias layer 106 has a pattern in the center and four corners of the pixel area where each photosensitive device 102 is located, and is hollowed out at the four sides between the four corners, so as to minimize the The coupling capacitance formed between the transparent bias layer 106 and the lower signal line reduces mutual interference between the two.
  • the orthographic projection of the first via hole d on the photoelectric conversion layer 122 and the second via hole e are all located in the central area of the photoelectric conversion layer 122; the orthographic projection of the center O 4 of the first via hole d on the photoelectric conversion layer 122 and the center O 5 of the second via hole e are in the photoelectric conversion layer 122.
  • the orthographic projections on the conversion layer 122 are roughly coincident with the center O of the photoelectric conversion layer 122 , that is, they may coincide exactly, or they may be within an allowable error range.
  • the texture recognition substrate 100 includes a texture recognition area AA, and The noise reduction area BB on at least one side of the texture recognition area AA; a plurality of photosensitive devices 102, light transmission holes (including the first light transmission hole a, the second light transmission hole b and the third light transmission hole c), the first via hole d and the second via hole e are located in the texture identification area AA, and a plurality of microlenses 202 are located in the texture identification area AA and the noise reduction area BB;
  • the first electrode plate 171 and the second electrode plate 172 wherein, the first electrode plate 171 is the same layer and the same material as the first electrode 121, and the second electrode plate 172 is the same layer and the same material as the second electrode 123; the first flat
  • the layer 104 also includes a third via hole d'
  • the sum of the areas of the via holes d (such as the four first via holes d shown in FIG. 15 ) is approximately the same, so that the capacitance value of each photosensitive device 102 in the texture recognition area AA is the same as that of each photosensitive device 102 in the noise reduction area BB.
  • the capacitance values of the areas where the capacitors 107 are located are the same, so that the capacitors 107 can be used to reduce noise on the photosensitive device 102 and improve the accuracy of fingerprint identification.
  • each aperture layer 201, each support layer 203, microlens 202, and green resin layer 204 are also fabricated in the noise reduction area AA in this disclosure, but each aperture Layer 201 is not perforated, as shown in FIG. 18 .
  • the pixel driving circuit 103 may include: a reset transistor T 1 , an amplifying transistor T 2 and a read transistor T 3 , wherein at least one of the reset transistor T 1 , the amplifying transistor T 2 and the read transistor T 3 is a double-gate transistor to reduce noise.
  • Figure 26 shows that on the basis that both the reset transistor T1 and the read transistor T3 adopt double gates, the amplifying transistor T2 adopts a single gate (broken line marked by a dot in the figure) or a double gate (marked by a square in the figure) respectively.
  • SNR signal-to-noise ratio
  • the gate of the reset transistor T1 is electrically connected to the first signal line VRST, and the first pole of the reset transistor T1 is connected through the fourth via hole provided g (through the second flat layer 111) and the fifth via hole j (through the second insulating layer 112) are electrically connected to the first electrode 121, and through the sixth via i (through the interlayer dielectric layer 110) and the amplifier transistor
  • the gate of T2 is electrically connected, the second pole of the reset transistor T1 is electrically connected to the power line VDD; the first pole of the amplifying transistor T2 is electrically connected to the second pole of the read transistor T3 , and the second pole of the amplifying transistor T2
  • the two poles are electrically connected to the power line VDD; the gate of the reading transistor T3 is electrically connected to the second signal line VGH/VGL, and the first pole of the reading transistor T3 is electrically connected to the third signal line VRED;
  • the storage capacitor C is
  • the photosensitive devices 102 are arranged in parallel; the active layer of each transistor is electrically connected to the first electrode and the second electrode through the corresponding seventh via hole k (through the gate insulating layer 109 and the interlayer dielectric layer 110 ).
  • the first pole of the amplifying transistor T2 and the second pole of the reading transistor T3 can be made of conductorized active layer materials.
  • each of the aforementioned transistors may be a top-gate transistor or a bottom-gate transistor, which is not limited herein.
  • each transistor is a low-temperature polysilicon transistor, so as to obtain higher carrier mobility, which is beneficial to realize high frame rate imaging in glass-based optical detection.
  • each transistor may also be an amorphous silicon transistor, an oxide transistor, a field effect transistor, or the like.
  • the first pole and the second pole of each transistor are the drain and the source respectively, and their functions can be interchanged according to different transistor types and input signals, and no specific distinction is made here. Generally, when the transistor is a P-type transistor, the first pole is the source, and the second pole is the drain; when the transistor is an N-type transistor, the first pole is the drain, and the second pole is the source.
  • the reset transistor T1 in FIG. 25 controls the gate potential reset of the amplifying transistor T2 , the amplifying transistor T2 amplifies the current signal output by the photosensitive device 102, and the reading transistor T3 provides the amplified current signal to the first Three signal lines VRED.
  • the power line VDD is connected to a DC potential of about +5V
  • the bias voltage V bias provided by the transparent bias layer 106 is connected to a DC potential of about 0V, so that the photosensitive device 102 is in a reverse bias state.
  • the reset transistor T1 is turned on under the control of the square wave signal provided by the first signal line VRST, so that the gate potential of the amplifying transistor T2 is reset to the power supply line VDD Provided with a fixed potential signal, the amplifying transistor T2 works in a saturated state; then, the photosensitive device 102 enters the exposure stage, and the photosensitive device 102 is reverse-biased to generate a photocurrent signal; finally, the read transistor T3 is connected to the second signal line VGH/VGL Open under the control of the provided square wave signal, the external reading chip (ROIC) reads the gate potential variation of the amplifying transistor T2 through the third signal line VRED (equivalent to the channel between the amplifying transistor T2 and the reading transistor T3 ). current signal).
  • ROIC external reading chip
  • FIG. 5 only schematically shows that the slopes of the first via hole d and the second via hole e are in the shape of broken lines.
  • the slopes of the first via hole d and the second via hole e can be smooth.
  • the shape of the arc is not specifically limited here.
  • the pixel driving circuit 103 shown in FIG. 25 has a simple structure and a high fill factor. However, since there is no storage node in the pixel driving circuit 103 shown in FIG. 25 , true correlated double sampling cannot be realized. Specifically, generally, the pixel driving circuit 103 shown in FIG. 25 adopts pseudo-correlated double sampling to eliminate fixed-pattern noise, but cannot eliminate time-related noise (kT/C). Compared with the pixel driving circuit 103 shown in FIG. 25, the pixel driving circuit 103 shown in FIG. 27 and FIG. 28 adds a noise reduction transistor T4 and a charge storage node—the floating diffusion point FD, which is shown by the dotted line.
  • Capacitor C' wherein the gate of the noise reduction transistor T4 is electrically connected to the third signal line G, the first pole is electrically connected to the gate of the second transistor T2 , and the second pole is electrically connected to the first electrode 121 of the photosensitive device 102 connect. Therefore, the pixel driving circuit 103 shown in FIG. 27 and FIG. 28 can realize real correlated double sampling, eliminate FPN noise in the pixel, and the noise level is low.
  • second planarization layer 111 As shown in FIG. 5 and FIG. layer 110 , second planarization layer 111 , second insulating layer 112 , protective layer 113 , barrier layer 114 and electromagnetic shielding layer 115 .
  • a gate driver chip (Gate IC) 116 and a source driver chip (Source IC) 117 As shown in Figures 1 and 2, a gate driver chip (Gate IC) 116 and a source driver chip (Source IC) 117, etc.
  • the pole driver chip 116 is electrically connected to the first signal line VRST and the second signal line VGH/VGL, and the source driver chip 117 is electrically connected to the third signal line RED, the power line VDD, and the fourth signal line G.
  • a gate drive circuit (GOA) 118 may be provided on the side of the noise reduction area BB away from the texture recognition area AA, and the gate drive circuit 118 is used as the first signal
  • the line VRST and the second signal line VGH/VGL provide driving signals, so that the gate driver chip 116 does not need to be bonded, and the technical effect of narrow borders can be achieved.
  • the other essential components of the texture recognition module should be understood by those of ordinary skill in the art, and will not be repeated here, nor should they be used as limitations on the present disclosure.
  • an embodiment of the present disclosure provides a display device, as shown in FIG. 29 , including: a fingerprint recognition module 01, a display module 02, and an adhesive layer 03; wherein, the fingerprint recognition module 01 is the The above-mentioned fingerprint identification module 01 provided in the embodiment, the fingerprint identification module 01 is located on the opposite side of the display side of the display module 02; the adhesive layer 03 is located between the display module 02 and the fingerprint identification module 01, and the adhesive layer 03 is on the The orthographic projection on the display module 02 is located in the frame area of the display module 02, so that the space surrounded by the fingerprint recognition module 01, the display module 02 and the adhesive layer 03 forms an air gap, which is beneficial to maintain the reflected light of the fingers. The direction of propagation of the light path remains unchanged.
  • the light confinement layer 200 can filter out the small-angle light rays reflected by the finger and make them reach the photoelectric conversion layer 122 of the photosensitive device 102 below. superior.
  • the photoelectric conversion layer 122 can detect the intensity of the light. Since the energy of the light diffusely reflected downward by the valley and the ridge is different, the light intensity detected by the photosensitive device 102 array is different, thereby obtaining fingerprint image information.
  • the above-mentioned display devices provided by the embodiments of the present disclosure may be: mobile phones, tablet computers, televisions, monitors, notebook computers, digital photo frames, navigators, smart watches, fitness wristbands, personal digital assistants, etc A product or part showing a function.
  • the display device includes but not limited to: a radio frequency unit, a network module, an audio output & input unit, a sensor, a display unit, a user input unit, an interface unit, a memory, a processor, and a power supply.
  • a radio frequency unit a radio frequency unit
  • a network module includes but not limited to: a radio frequency unit, a network module, an audio output & input unit, a sensor, a display unit, a user input unit, an interface unit, a memory, a processor, and a power supply.
  • the above-mentioned structure does not constitute a limitation on the above-mentioned display device provided by the embodiment of the present disclosure.

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Abstract

本公开提供的纹路识别模组及显示装置，包括纹路识别基板，纹路识别基板包括衬底基板，以及位于衬底基板一侧的阵列排布的多个光敏器件；光线约束层，与纹路识别基板具有多个光敏器件的一侧直接接触设置，光线约束层包括至少一层光阑层、以及位于光阑层远离纹路识别基板一侧的微透镜层；其中，光阑层具有呈阵列排布的透光孔，透光孔在衬底基板上的正投影位于光敏器件在衬底基板上的正投影内；微透镜层包括隔开设置的多个微透镜，微透镜在衬底基板上的正投影覆盖且大于透光孔在衬底基板上的正投影。

Description

纹路识别模组及显示装置 技术领域
本公开涉及显示技术领域，尤其涉及一种纹路识别模组及显示装置。
背景技术
随着信息行业的高速发展，生物识别技术受到了越来越广泛的应用，特别地，由于不同用户的指纹不同，便于进行用户身份确认，因此，指纹识别技术已经广泛应用在移动终端、智能家居等多个领域，为用户信息提供安全保障。
光学式指纹识别是实现指纹识别的手段之一。光学式指纹识别的原理如下：当手指置于显示产品上方时，显示产品所含光源的发射光线照射到手指的谷和脊的位置，并经手指的谷和脊的反射后再入射到显示产品所含光敏器件上。由于谷和脊的位置反射的光强不同，光敏器件根据上述反射光强的差异生成不同电信号，实现指纹识别。
发明内容
本公开实施例提供的纹路识别模组及显示装置，具体方案如下：
一方面，本公开实施例提供了一种纹路识别模组，包括：
纹路识别基板，所述纹路识别基板包括衬底基板，以及位于所述衬底基板一侧的阵列排布的多个光敏器件；
光线约束层，与所述纹路识别基板具有所述多个光敏器件的一侧直接接触设置，所述光线约束层包括至少一层光阑层、以及位于所述光阑层远离所述纹路识别基板一侧的微透镜层；其中，所述光阑层具有呈阵列排布的透光孔，所述透光孔在所述衬底基板上的正投影位于所述光敏器件在所述衬底基板上的正投影内；所述微透镜层包括隔开设置的多个微透镜，所述微透镜在所述衬底基板上的正投影覆盖且大于所述透光孔在所述衬底基板上的正投影。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述光线约束层包括至少两层所述光阑层，各所述光阑层中的所述透光孔一一对应且在所述衬底基板上的正投影至少部分重合。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，在远离所述纹路识别基板的方向上，所述光阑层包括依次设置的第一光阑层、第二光阑层和第三光阑层；其中，
所述第一光阑层包括阵列排布的第一透光孔，所述第二光阑层包括阵列排布的第二透光孔，所述第三光阑层包括阵列排布的第三透光孔；
所述第二透光孔在所述衬底基板上的正投影覆盖且大于所述第一透光孔在所述衬底基板上的正投影，且所述第二透光孔在所述衬底基板上的正投影位于所述第三透光孔在所述衬底基板上的正投影内。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述第一透光孔的中心在所述衬底基板上的正投影与对应所述第二透光孔的中心在所述衬底基板上的正投影之间具有第一距离；
所述第一透光孔的中心在所述衬底基板上的正投影与对应所述第三透光孔的中心在所述衬底基板上的正投影之间具有第二距离；
所述第一距离、所述第二距离与所述第一透光孔的孔径之比均大于或等于0且小于或等于20％。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述第二透光孔的孔径D 2满足以下关系式：
D 2＝k*D 1，D 2＜D 3；
其中，1＜k＜2，D 1为所述第一透光孔的孔径，D 3为所述第三透光孔的孔径。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述微透镜与所述透光孔一一对应设置，所述微透镜包括凸面和平面，其中，所述凸面位于所述平面远离所述透光孔的一侧。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述光线约束层还包括与所述光阑层交替设置的支撑层；
所述第一透光孔的孔径D 1满足以下关系式：
D 1＝[D 2/(2h s)+h s]*[n x/(n-1)]*tan θ；
其中，D为所述微透镜的口径，h s为所述微透镜的高度，n为所述微透镜的折射率，n x为所述支撑层的折射率，θ为收光角。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述支撑层包括第一支撑层、第二支撑层和第三支撑层；其中，
所述第一支撑层位于所述第一光阑层与所述第二光阑层之间，所述第二支撑层位于所述第二光阑层与所述第三光阑层之间，所述第三支撑层位于所述第三光阑层远离所述第二光阑层的一侧。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述光线约束层还包括绿色树脂层，所述绿色树脂层位于所述第一光阑层与所述第一支撑层之间。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述绿色树脂层填充所述第一透光孔，所述第二支撑层填充所述第二透光孔，所述第三支撑层填充所述第三透光孔。在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述第三透光孔的孔径D 3满足以下关系式：
D 3＝D*(H-H 3)/H；
其中，H为所述微透镜层面向所述纹路识别基板一侧的表面到所述第一光阑层远离所述纹路识别基板一侧的表面之间的距离，H 3为所述第三支撑层的厚度。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述第二光阑层的厚度与所述第三光阑层的厚度大致相同；
所述微透镜层面向所述纹路识别基板一侧的表面到所述第一光阑层远离所述纹路识别基板一侧的表面之间的距离H满足以下关系式：
H＝{[D 2/(4h s)]*[n x/(n-1)]}-{(3n-2)*n x*h s/[2(n 2-n)]}；
H＝H 1+H 2+H 3+H 4+2h；
其中，H 1为所述第一支撑层的厚度，H 2为所述第二支撑层的厚度，H 4为所述绿色树脂层的厚度，h为所述第二光阑层的厚度和所述第三光阑层的厚度。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述第一支撑层的厚度H 1满足以下关系式：
H 1＝D 2*(H-H 3)/D 3-H 4。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，1.4≤n x≤1.7，1.5≤n≤2.0，1°≤θ≤10°，2μm≤D≤50μm，1μm≤D 1≤10μm，1μm＜D 2＜40μm，2μm≤D 3≤50μm，1μm≤hs≤20μm，1μm≤H 1≤20μm，1μm≤H 2≤20μm，1μm≤H 3≤20μm，0.5μm≤H 4≤3μm，0.5μm≤h≤1.5μm，4.5μm≤H≤100μm。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述支撑层的材料包括透明树脂和/或绿色树脂。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述第一光阑层的材料包括金属，所述第二光阑层和所述第三光阑层的材料均包括黑色树脂。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，相邻所述微透镜之间的距离大于0μm且小于或等于2μm。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述微透镜在所述衬底基板上的正投影形状为圆角方形、圆形、直角方形或六边形。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述纹路识别基板还包括多个像素驱动电路，所述多个像素驱动电路所在层位于所述多个光敏器件所在层与所述衬底基板之间，所述像素驱动电路与所述光敏器件一一对应电连接。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，每个所述光敏器件包括至少一个子光敏器件，所述子光敏器件包括层叠设置的第一电极、光电转换层和第二电极；
在包括多个所述子光敏器件的同一所述光敏器件中，各所述第一电极均与对应所述像素驱动电路电连接，各所述第二电极相互独立设置，各所述光电转换层相互独立设置。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述纹路识别基板还包括多个连接电极，所述连接电极与所述第一电极同层设置；
同一所述光敏器件的各所述第一电极通过所述连接电极与对应所述像素驱动电路电连接。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，每个所述光敏器件包括四个所述子光敏器件，在同一所述光敏器件中，四个所述子光敏器件呈两行两列排布。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述多个连接电极包括多个第一连接电极，一个所述光敏器件中的四个所述第一电极通过同一个所述第一连接电极与对应所述像素电路电连接，且所述第一连接电极在所述衬底基板上的正投影与电连接的四个所述第一电极在所述衬底基板上的正投影均相互交叠。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述多个连接电极还包括多个第二连接电极，每个所述第二连接电极与一个所述光敏器件中的相邻两个所述第一电极电连接，且所述第二连接电极在所述衬底基板上的正投影与电连接的相邻两个所述第一电极在所述衬底基板上的正投影均相互交叠。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，一个所述光电转换层与至少一个所述微透镜对应。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述光电转换层与所述微透镜一一对应，所述光电转换层在所述衬底基板上的正投影位于对应所述微透镜在所述衬底基板上的正投影内。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述微透镜与所述透光孔一一对应设置；
所述透光孔在所述衬底基板上的正投影位于对应所述光电转换层在所述衬底基板上的正投影的中央区域，且所述光电转换层的中心在所述衬底基板上的正投影与所述透光孔的中心在所述衬底基板上的正投影大致重合。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述纹路识别基板还包括平坦层、绝缘层和透明偏压层，其中，所述平坦层、所述绝缘层和所述透明偏压层依次位于所述多个光敏器件所在层远离所述衬底基板的一侧；
所述平坦层包括多个第一过孔，所述第一过孔与所述第二电极一一对应设置，所述第一过孔在所述衬底基板上的正投影位于对应所述第二电极在所述衬底基板上的正投影内；所述绝缘层包括多个第二过孔，所述第二过孔与所述第一过孔一一连通设置，所述第二过孔在所述衬底基板上的正投影位于对应所述第一过孔在所述衬底基板上的正投影内；
所述第二电极通过连通设置的所述第一过孔及所述第二过孔与所述透明偏压层电连接。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述第一过孔在所述光电转换层上的正投影、以及所述第二过孔在所述光电转换层上的正投影均位于所述光电转换层的中央区域；
所述第一过孔的中心在所述光电转换层上的正投影、以及所述第二过孔的中心在所述光电转换层上的正投影均与所述光电转换层的中心大致重合。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述纹路识别基板包括纹路识别区，以及位于所述纹路识别区至少一侧的降噪区；
所述多个光敏器件、所述透光孔、所述第一过孔和所述第二过孔位于所述纹路识别区，所述多个微透镜位于所述纹路识别区和所述降噪区；
所述纹路识别基板还包括位于所述降噪区的电容，所述电容包括相对而置的第一电极板和第二电极板；其中，所述第一电极板与所述第一电极同层、同材料，所述第二电极板与所述第二电极同层、同材料；
所述平坦层还包括位于所述降噪区的第三过孔，所述第三过孔在所述衬 底基板上的正投影位于所述第一电极板在所述衬底基板上的正投影内；所述第三过孔内填充有所述绝缘层，使得所述第一电极板与所述第二电极板相互绝缘；一个所述第三过孔的面积与一个所述光敏器件所在区域内的所述第一过孔的面积之和大致相同。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述纹路识别基板还包括阻挡层和电磁屏蔽层，其中，所述阻挡层位于所述透明偏压层与所述光线约束层之间，所述电磁屏蔽层位于所述阻挡层与所述光线约束层之间。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中所述像素驱动电路包括：复位晶体管、放大晶体管和读取晶体管，其中，所述复位晶体管、所述放大晶体管和所述读取晶体管中的至少之一为双栅晶体管。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，所述像素驱动电路还包括降噪晶体管，所述降噪晶体管为单栅晶体管或双栅晶体管。
另一方面，本公开实施例提供了一种显示装置，包括：显示模组、指纹识别模组和胶粘层；其中，所述指纹识别模组为本公开实施例提供的上述指纹识别模组，所述指纹识别模组位于所述显示模组显示侧的相对侧；所述胶粘层位于所述显示模组与所述指纹识别模组之间，所述胶粘层在所述显示模组上的正投影位于所述显示模组的边框区。
附图说明
图1为本公开实施例提供的纹路识别模组的一种结构示意图；
图2为本公开实施例提供的纹路识别模组的又一种结构示意图；
图3为本公开实施例提供的纹路识别模组的又一种结构示意图；
图4为本公开实施例提供的纹路识别模组的又一种结构示意图；
图5为沿图1、图2图3或图4中I-II线的剖面图；
图6为本公开实施例提供的光线约束层与光敏器件的一种匹配示意图；
图7为本公开实施例提供的光线约束层与光敏器件的又一种匹配示意图；
图8为本公开实施例提供的光线约束层与光敏器件的又一种匹配示意图；
图9为本公开实施例提供的光线约束层与光敏器件的又一种匹配示意图；
图10为沿图6、图7、图8或图9中III-IV线的剖面图；
图11为本公开实施例提供的纹路识别模组的收光角曲线与相关技术中的纹路识别模组的收光角曲线；
图12为本公开实施例提供的纹路识别模组中纹路识别区内一个光敏器件所在区域的设计版图；
图13为图12中第一电极所在层的结构示意图；
图14为图12中光电转换层及第二电极所在层的结构示意图；
图15为图12中第一平坦层及第一绝缘层的结构示意图；
图16为图12中透明偏压层或电磁屏蔽层的结构示意图；
图17为本公开实施例提供的纹路识别模组中降噪区内一个电容所在区域的结构示意图；
图18为沿图17中V-VI线的剖面图；
图19为图12中栅金属层的结构示意图；
图20为图12中有源层的结构示意图；
图21为图12中栅绝缘层和层间介电层的结构示意图；
图22为图12中源漏金属层的结构示意图；
图23为图12中第二平坦层和第二绝缘层的结构示意图；
图24为本公开实施例提供的栅金属层的又一种结构示意图；
图25为图12所含像素驱动电路的结构示意图；
图26为本公开实施例提供的放大晶体管在单栅和双栅下的信噪比对比图；
图27为本公开实施例提供的又一种像素驱动电路的结构示意图；
图28为图27所示像素驱动电路的设计版图；
图29为本公开实施例提供的显示装置的结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。需要注意的是，附图中各图形的尺寸和形状不反映真实比例，目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
除非另作定义，此处使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开说明书以及权利要求书中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“内”、“外”、“上”、“下”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
相关技术中通过将纹路识别基板中的部分膜层复用为准直膜的光阑层，并在准直膜上构图形成微透镜，可有效降低准直结构(包括准直膜和微透镜)贴合方案(即准直结构直接贴合在纹路识别基板的表面上)的三个痛点：大角度串扰、膜材斜纹/摩尔纹、信赖性不佳(NG)，从而在光学指纹识别过程中提高识别出的指纹信息的准确性。但是，由于需要将纹路识别基板中的部分膜层与光阑层复用，因此需要变动相关技术中纹路识别基板内复用为光阑层的膜层制作工艺，由此增大了制作难度，不利于量产。
为了至少解决相关技术中存在的上述技术问题，本公开实施例提供了一种纹路识别模组，用于识别指纹、掌纹等纹路，本公开均以识别指纹为例进行说明。具体地，如图1至图5所示，本公开实施例提供的纹路识别模组包括：
纹路识别基板100，纹路识别基板100包括衬底基板101，以及位于衬底基板101一侧的阵列排布的多个光敏器件102；可选地，衬底基板101可以为柔性衬底基板，例如聚酰亚胺(PI)基板；或者，衬底基板101还可以为刚性 衬底基板，例如玻璃(Glass)基板；
光线约束层200，与纹路识别基板100具有多个光敏器件102的一侧直接接触设置，光线约束层200包括至少一层光阑层201(例如包括第一光阑层211、第二光阑层211和第三光阑层213)、以及位于光阑层201远离纹路识别基板100一侧的微透镜层(包括微透镜202)；其中，光阑层201可由黑矩阵(BM)材料、氧化钼、氧化铝或铬金属等吸光或低反射率的材料制作，光阑层201具有呈阵列排布的透光孔(例如包括第一透光孔a、第二透光孔b和第三透光孔c)，透光孔在衬底基板101上的正投影位于光敏器件102在衬底基板101上的正投影内；微透镜层包括隔开设置的多个微透镜202，微透镜202在衬底基板101上的正投影覆盖且大于透光孔在衬底基板101上的正投影。
在本公开实施例提供的上述纹路识别模组中，通过在纹路识别基板100表面直接集成光线约束层200，从而无需改变纹路识别基板100的相关制作工艺，利于量产。并且，由于光线约束层200与纹路识别基板100具有多个光敏器件102的一侧直接接触，而不是贴合在纹路识别基板100表面上，因此，可以有效改善相关技术中贴合准直结构方案的大角度串扰、膜材斜纹/摩尔纹、信赖性不佳等不良，从而在光学指纹识别过程中可以提高识别出的指纹信息的准确性。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图5所示，光线约束层200可以包括至少两层光阑层201，各光阑层201中的透光孔一一对应且在衬底基板100上的正投影至少部分重合，以通过各光阑层201的相互配合实现对光线的准直效果。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图5所示，在远离纹路识别基板100的方向Y上，光阑层201可以包括依次设置的第一光阑层211、第二光阑层212和第三光阑层213；其中，第一光阑层211包括阵列排布的第一透光孔a，第二光阑层212包括阵列排布的第二透光孔b，第三光阑层213包括阵列排布的第三透光孔c；第二透光孔b在衬底基板101上的正投影覆盖且大于第一透光孔a在衬底基板101上的正投影，且第二透 光孔b在衬底基板101上的正投影位于第三透光孔c在衬底基板101上的正投影内。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图6至图10所示，第一透光孔a的中心O 1在衬底基板101上的正投影与对应第二透光孔b的中心O 2在衬底基板上的正投影之间具有第一距离(即O 1与O 2在图10中沿X方向错开的距离)；第一透光孔a的中心O 1在衬底基板101上的正投影与对应第三透光孔c的中心O 3在衬底基板101上的正投影之间具有第二距离(即O 1与O 3在图10中沿X方向错开的距离)；第一距离、第二距离与第一透光孔a的孔径D 1之比均大于或等于0且小于或等于20％。具体地，图6至图10中示出了第一透光孔a的中心O 1、第二透光孔b的中心O 2、以及第三透光孔c的中心O 3位于同一直线(参见图10所示虚线)上，相当于上述第一距离和第二距离均为0。
应当理解的是，理想状态下，第一透光孔a的中心O 1、第二透光孔b的中心O 2、以及第三透光孔c的中心O 3位于同一直线，准直效果最好。但在实际制作过程中受对位等因素的影响，可能造成三者的中心出现些许偏离，在上述0～20％的偏离范围内，相互交叠的第一透光孔a、第二透光孔b和第三透光孔c仍可以具有优良的准直效果。
横坐标表示光线约束层200的收光角，纵坐标表示光线约束层200所含透光孔的透过率(T)，在该坐标系下的曲线则称为收光角曲线。其中，收光角曲线的半峰全宽(full width at half maxima，FWHM)是表征光线约束层200的核心指标。通常为满足指纹识别要求，FWHM要求在7°以内，而收光角曲线与横坐标围起来的面积是光敏器件102接收到的指纹信号量，指纹信号量越高识别精度越大，因此通常要求在FWHM固定的情况下，透光孔的中心透过率(相当于收光角曲线的峰值)越高越好。
基于此，在本公开实施例提供的上述纹路识别模组中，如图6至图10所示，第二透光孔b的孔径D 2满足以下关系式：
D 2＝k*D 1      (1)；
D 2＜D 3    (2)；
其中，1＜k＜2，D 1为第一透光孔a的孔径，D 3为第三透光孔c的孔径。
由图10可见，第三透光孔c可以透过L 1～L 2范围内的全部光线，并且第二透光孔b和第一透光孔a分别存在一个可恰好透过L 1～L 2范围内全部光线的孔径。在第一透光孔a、第二透光孔b和第三透光孔c的孔径满足上述关系式(1)和(2)的条件下，即可以使得第三透光孔c透过L 1～L 2范围内全部光线依次经第二透光孔b和第一透光孔a照射至光敏器件102上，由此最大化提高了透光孔的中心透过率，进而提高了光敏器件102接收的指纹信号量，增强了指纹识别的准确性。另外，如图10所示，在第一透光孔a、第二透光孔b和第三透光孔c的孔径满足上述关系式(1)和(2)的条件下，还可以有效防止杂散光L 3和L 4造成的串扰。
需要说明的是，理论上透光孔的孔壁与衬底基板101垂直，此时，透光孔的孔径均一性较好。但由于制造工艺的影响，透光孔的孔壁可能不是垂直于衬底基板101的，而是相对于衬底基板101形成一定的斜坡(如图10所示)，此时，透光孔的孔径在远离衬底基板101的方向Y上逐渐增大，在本公开中透光孔的孔径可以指孔径的最大值。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图10所示，微透镜202与透光孔(包括交叠设置的第一透光孔a、第二透光孔b和第三透光孔c)一一对应设置，微透镜202包括凸面S 1和平面S 2，其中，凸面S 1位于平面S 2远离透光孔的一侧，以使得微透镜202可将指纹的反射光线有效汇聚至对应透光孔的位置。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图10所示，光线约束层200还可以包括与光阑层201交替设置的支撑层203；为了使得第三透光孔c透过L 1～L 2范围内全部光线依次经第二透光孔b和第一透光孔a照射至光敏器件102上，第一透光孔a的孔径D 1可以满足以下关系式：
D 1＝[D 2/(2h s)+h s]*[n x/(n-1)]*tan θ      (3)；
其中，D为微透镜202的口径，h s为微透镜202的高度，n为微透镜202 的折射率，n x为支撑层203的折射率，θ为收光角。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图10所示，支撑层203可以包括第一支撑层231、第二支撑层232和第三支撑层233；其中，第一支撑层231位于第一光阑层211与第二光阑层212之间，第二支撑层232位于第二光阑层212与第三光阑层213之间，第三支撑层233位于第三光阑层213远离第二光阑层212的一侧。可选地，第一支撑层231填充第一透光孔a，第二支撑层232填充第二透光孔b，第三支撑层233填充第三透光孔c。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图10所示，光线约束层200还可以包括绿色树脂层204，绿色树脂层204位于第一光阑层211与第一支撑层231之间。由于环境光中600nm以上的光线可透过手指照射至光线约束层200上，进而被光敏器件102接收而干扰指纹识别效果。而绿色树脂层204可拦截600nm以上的光线，因此在第一光阑层211与第一支撑层231之间设置绿色树脂层204，可以有效避免环境光的干扰，提高指纹识别效果。并且，在第一光阑层211与第一支撑层231之间设置绿色树脂层204，利于维持相关技术中制作交替设置的第一支撑层231、第二光阑层212、第二支撑层232、第三光阑层213、第三支撑层233和微透镜层的工艺稳定性。
在一些实施例中，在本公开实施例提供的上述纹路识别基板100中，支撑层203(包括第一支撑层231、第二支撑层232和第三支撑层233)的材料可以包括透明树脂(OC)和/或绿色树脂(G-Resin)。易于理解的是，在第一支撑层231、第二支撑层232和第三支撑层233中的至少一层采用绿色树脂制作的情况下，则可实现对600nm以上环境光的滤除，此时既可以不设置绿色树脂层204，此时第一支撑层231填充第一透光孔a，当然也可以设置绿色树脂层204进一步拦截600nm以上环境光。而在第一支撑层231、第二支撑层232和第三支撑层233全部采用透明树脂制作的情况下，为了有效滤除600nm以上环境光，则需要设置绿色树脂层204。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图10所示，第三透光孔c的孔径D 3满足以下关系式：
D 3＝D*(H-H 3)/H     (4)；
其中，H为微透镜层面向纹路识别基板100一侧的表面到第一光阑层211远离纹路识别基板100一侧的表面之间的距离，H 3为第三支撑层233的厚度。
在第三透光孔c的孔径D 3满足上述关系式(4)的情况下，可根据微透镜层(包括微透镜202)面向纹路识别基板100一侧的表面到第一光阑层211远离纹路识别基板100一侧的表面之间的距离H、微透镜202的口径D、以及第三支撑层233的厚度H 1设置第三透光孔c的孔径D 3，使得微透镜202汇聚的指纹反射光线几乎可全部汇聚至第三透光孔c的位置，进而依次经第三透光孔c、第二透光孔b和第一透光孔a照射至光敏器件102上，由此增大了中心透过率，提高了光敏器件102所接收指纹信号量，提升了指纹识别精度。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，第二光阑层212的厚度与第三光阑层213的厚度大致相同，即二者的厚度之差可以为零，也可以在因测量、制作工艺和设备等造成的误差范围内，例如二者的厚度之差小于0.2μm；微透镜层(包括微透镜202)面向纹路识别基板100一侧的表面到第一光阑层211远离纹路识别基板100一侧的表面之间的距离H满足以下关系式：
H＝{[D 2/(4h s)]*[n x/(n-1)]}-{(3n-2)*n x*h s/[2(n 2-n)]}    (5)；
H＝H 1+H 2+H 3+H 4+2h    (6)；
其中，H 1为第一支撑层231的厚度，H 2为第二支撑层232的厚度，H 4为绿色树脂层204的厚度，h为第二光阑层212的厚度和第三光阑层213的厚度。
在具体实施时，可根据上述关系式(5)设置微透镜层(包括微透镜202)面向纹路识别基板100一侧的表面到第一光阑层211远离纹路识别基板100一侧的表面之间的距离H的数值，然后基于关系式(6)合理设置绿色树脂层204的厚度H 4、第一支撑层231的厚度H 1、第二支撑层232的厚度H 2、第三 支撑层233的厚度H 3、第二光阑层212的厚度h、以及第三光阑层213的厚度h，以兼顾提高中心透过率及防串扰的效果。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图10所示，第一支撑层231的厚度H 1满足以下关系式：
H 1＝D 2*(H-H 3)/D 3-H 4     (7)。
在第一支撑层231的厚度H 1满足关系式(7)的条件下，可以保证收光角θ较小，以利于提高指纹识别的准确度。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，为使得中心透过率较高，且还能达到目标FWHM，上述各参数的取值范围可以分别为：1.4≤n x≤1.7，1.5≤n≤2.0，1°≤θ≤10°，2μm≤D≤50μm，1μm≤D 1≤10μm，1μm＜D 2＜40μm，2μm≤D 3≤50μm，1μm≤hs≤20μm，1μm≤H 1≤20μm，1μm≤H 2≤20μm，1μm≤H 3≤20μm，0.5μm≤H 4≤3μm，0.5μm≤h≤1.5μm，4.5μm≤H≤100μm。
受微透镜202的现有制作工艺和设备等条件的制约，相邻微透镜202之间存在恒定的间隔(lens space)，例如相邻微透镜202之间的距离大于0μm且小于或等于2μm，使得在微透镜202匹配不同分辨率(Pixels per inch，PPI)的纹路识别基板100时，分辨率小的纹路识别基板100中光敏器件102的尺寸(Pitch)较大，与光敏器件102匹配的微透镜202尺寸相应较大；分辨率大的纹路识别基板100中光敏器件102的尺寸较小，与光敏器件102匹配的微透镜202尺寸相应较小。并且相较于较小尺寸的微透镜202，较大尺寸的微透镜202可将更多的指纹反射光线汇聚至匹配的光敏器件102上，由此导致分辨率大的纹路识别基板100中光敏器件102接收的指纹信号量，小于分辨率小的纹路识别基板100中光敏器件102接收的指纹信号量。在满足FWHM在7°以内的要求时，分辨率大的纹路识别基板100中透光孔的中心透过率，会小于分辨率小的纹路识别基板100中透过孔的中心透过率。
基于此，在本公开实施例提供的上述纹路识别模组中，如图1至图4、图 6至图9所示，微透镜202在衬底基板101上的正投影形状可以为圆角方形或圆形。由图1至图4、图6至图9可见，在微透镜202的口径D大小相同的情况下，直角方形的面积、圆角方形的面积、圆形的面积和六边形的面积依次减小，因此，相较于六边形和圆形的微透镜202，直角方形和圆角方形的微透镜202可将更多的指纹反射光线汇聚至其下方的光敏器件102上，从而提高中心透过率。因此，在纹路识别基板100的分辨率较大致使中心透过率较小的情况下，可选用直角方形或圆角方形的微透镜202来提升中心透过率。在纹路识别基板100的分辨率较小、中心透过率较大的情况下，可以选用六边形或圆形的微透镜202，此时中心透过率大小几乎不变；当然也可以选用直角方形或圆角方形的微透镜202，以进一步提高中心透过率。当然，在具体实施时，微透镜202在衬底基板101上的正投影形状还可以为根据实际需要进行灵活设置，在此不做具体限定。
在一些实施例中，一个微透镜202可以与一组正投影相互交叠的透光孔(例如正投影交叠设置的第一透光孔a、第二透光孔b和第三透光孔c)对应设置，并且在微透镜202的正投影形状为圆形的情况下，对应设置的一组透光孔均为圆形孔，如图6所示；在微透镜202的正投影形状为分别为圆角方形、直角方形、六边形的情况下，对应设置的一组透光孔可以相应地为圆角方形孔(如图7所示)、直角方形(如图8所示)、六边形(如图9所示)，也可以均为图6所示的圆形孔，在此不做具体限定。
图11示出了采用上述参数且微透镜202为圆角方形的情况下的收光角曲线M，以及相关技术中复用纹路识别基板100的部分膜层作为光阑层201的收光角曲线M’。由图11可见，在同样达到FWHM为7°时，本公开的中心透过率为42％，相关技术的中心透过率为30％，因此，相对于相关技术，本公开的中心透过率增大12％，利于提升指纹识别精度。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图5所示，纹路识别基板100还可以包括多个像素驱动电路103，多个像素驱动电路103所在层位于多个光敏器件102所在层与衬底基板101之间；像素驱动 电路103与光敏器件102一一对应电连接，以实现像素驱动电路103对光敏器件102的独立驱动。
在一些实施例中，像素驱动电路102可以为被动(PPS)模式，也可以为主动(APS)模式。其中，APS模式是一种提高影像质量及降低噪声干扰的像素设计方案，APS模式的像素驱动电路102对易受噪声影响的光敏器件104提供的电信号进行放大，以最大程度上减少与外部芯片(IC)放大器相关的外部读出噪声源的影响，且受阻抗的影响较小，可大面积制备。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图12至图14所示，为了提高像素填充率，每个光敏器件102可以包括至少一个子光敏器件S，子光敏器件S包括层叠设置的第一电极121、光电转换层122和第二电极123。在包括多个子光敏器件S的同一光敏器件102中，各第一电极121均与对应像素驱动电路103电连接，各第二电极123相互独立设置，各光电转换层122相互独立设置。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图12至图14所示，纹路识别基板100还可以包括多个连接电极121’，连接电极121’与第一电极121同层设置；同一光敏器件102的各第一电极121通过连接电极121’与对应像素驱动电路103电连接。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图12至图14示，为提高像素填充率，每个光敏器件102可以包括四个子光敏器件S，在同一光敏器件102中，四个子光敏器件S呈两行两列排布。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图12至图14所示，多个连接电极121’可以包括多个第一连接电极1211’，其中，一个光敏器件102中的四个第一电极121可以通过同一个第一连接电极1211’与对应的像素驱动电路103电连接，第一连接电极1211’在衬底基板101上的正投影与电连接的四个第一电极121在衬底基板101上的正投影均相互交叠，相当于第一连接电极1211’位于光敏器件102的中央区域。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图12至图14所示，多个连接电极121’还可以包括多个第二连接电极1212’，每个第二连接电极1212’与一个光敏器件102中的相邻两个第一电极121电连接，第二连接电极1212’在衬底基板101上的正投影与电连接的相邻两个第一电极121在衬底基板101上的正投影均相互交叠，相当于第二连接电极1212’自相邻两个第一电极121的间隙处延伸至与第一电极121的边缘区域。第二连接电极1212’可以减小同一光敏器件102中第一电极121的整体电阻值。
需要说明的是，本公开中第一连接电极1211’位于光敏器件102的中央区域，因此便于通过第一连接电极1211’连接像素驱动电路103与光敏器件103。但在一些实施例中，第二连接电极1212’也可以用于连接像素驱动电路103与光敏器件103，在此不做具体限定。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图6至图9所示，光电转换层122与微透镜202一一对应，并且光电转换层122在衬底基板101上的正投影位于对应微透镜202在衬底基板101上的正投影内，以使得被微透镜202汇聚后的指纹反射光全部被对应的光电转换层122吸收，从而提高信号量，增大信噪比。当然，在具体实施时，一个光电转换层122还可以与至少两个微透镜202对应设置，在此不做具体限定。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图6至图9所示，透光孔(例如包括正投影交叠设置的第一透光孔a、第二透光孔b和第三透光孔c)在衬底基板101上的正投影位于对应光电转换层122在衬底基板101上的正投影的中央区域(即靠近光电转换层122的中心O的区域)，且光电转换层122的中心O在衬底基板101上的正投影与透光孔的中心(例如包括正投影交叠设置的第一透光孔a的中心O 1、第二透光孔b的中心O 2和第三透光孔c的中心O 3)在衬底基板101上的正投影大致重合。
需要说明的是，在本公开提供的实施例中，由于工艺条件的限制或测量等其他因素的影响，“大致重合”可能会恰好重合，也可能会有一些偏差(例如具有±0.6μm的偏差)，因此相关特征之间“大致重合”的关系只要满足误差允许， 均属于本公开的保护范围。
在一些实施例中，本公开实施例提供的光电转换层122可以包括层叠设置的P型半导体层、I型半导体层(也称为本征半导体层)和N型半导体层。并且可采用一次构图工艺形成光电转换层122和第二电极123，可选地，如图14所示，为减小漏电流，第二电极123在衬底基板101上的正投影需要略小于光电转换层122在衬底基板101上的正投影。例如，第二电极123在衬底基板101上的正投影边界与光电转换层122在衬底基板101上的正投影边界之间的距离可以为0.5μm～2μm。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图5、图12、图14至图16所示，纹路识别基板100还可以包括第一平坦层104、第一绝缘层105和透明偏压层106，其中，第一平坦层104、第一绝缘层105和透明偏压层106依次位于多个光敏器件102所在层远离衬底基板101的一侧；为便于给第二电极123加载偏置电压，第一平坦层104可以包括多个第一过孔d，第一过孔d与第二电极123一一对应设置，第一过孔d在衬底基板101上的正投影位于对应第二电极123在衬底基板101上的正投影内；第一绝缘层105包括多个第二过孔e，第二过孔e与第一过孔d一一连通设置，第二过孔e在衬底基板101上的正投影位于对应第一过孔d在衬底基板101上的正投影内；第二电极123通过连通设置的第一过孔d及第二过孔e与透明偏压层106电连接。另外，由图12和图16可见，透明偏压层106在每个光敏器件102所在像素区域的中央及四角具有图案，并在四角之间的四条边处镂空设置，这样是为了尽可能减小透明偏压层106与下方信号线之间形成的耦合电容，减小二者之间的相互干扰。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图14和图15所示，第一过孔d在光电转换层122上的正投影、以及第二过孔e在光电转换层122上的正投影均位于光电转换层122的中央区域；第一过孔d的中心O 4在光电转换层122上的正投影、以及第二过孔e的中心O 5在光电转换层122上的正投影均与光电转换层122的中心O大致重合，即可能恰好重 合，也可能在允许的误差范围内。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图1和图2、图15、图17和图18所示，纹路识别基板100包括纹路识别区AA，以及位于纹路识别区AA至少一侧的降噪区BB；多个光敏器件102、透光孔(包括第一透光孔a、第二透光孔b和第三透光孔c)、第一过孔d和第二过孔e位于纹路识别区AA，多个微透镜202位于纹路识别区AA和降噪区BB；纹路识别基板100还包括位于降噪区BB的电容107，电容107包括相对而置的第一电极板171和第二电极板172；其中，第一电极板171与第一电极121同层、同材料，第二电极板172与第二电极123同层、同材料；第一平坦层104还包括位于降噪区BB的第三过孔d’，第三过孔d’在衬底基板101上的正投影位于第一电极板171在衬底基板101上的正投影内；第三过孔d’内填充有第一绝缘层105，使得第一电极板171与第二电极板172相互绝缘；一个第三过孔d’的面积与一个光敏器件102所在区域内的全部第一过孔d(例如图15所示四个第一过孔d)的面积之和大致相同，以使得纹路识别区AA内每个光敏器件102所在区的电容值、与降噪区BB内每个电容107所在区的电容值相同，从而可利用电容107对光敏器件102进行降噪，提高指纹识别的准确性。
值得注意的是，为了保证工艺制作的可控性，本公开中在降噪区AA也制作了各光阑层201、各支撑层203、微透镜202、以及绿色树脂层204，但各光阑层201不开孔，如图18所示。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，图19至图25所示，像素驱动电路103可以包括：复位晶体管T 1、放大晶体管T 2和读取晶体管T 3，其中，复位晶体管T 1、放大晶体管T 2和读取晶体管T 3中的至少之一为双栅晶体管，以降低噪声。
图26示出了在复位晶体管T 1和读取晶体管T 3均采用双栅的基础上，放大晶体管T 2分别采用单栅(图中圆点标志的折线)或双栅(图中方块标志的折线)下的信噪比(SNR)。由图26可以看出，在放大晶体管T 2采用双栅的 情况下，信噪比的绝大部分取值高于放大晶体管T 2采用单栅时的信噪比。因此，相较于单栅结构，双栅结构的放大晶体管T 2整体来说可以使得指纹识别精度更高。
继续参见图5、图19至图25，在像素驱动电路103中，复位晶体管T 1的栅极与第一信号线VRST电连接，复位晶体管T 1的第一极通过连通设置的第四过孔g(贯穿第二平坦层111)及第五过孔j(贯穿第二绝缘层112)与第一电极121电连接、并通过第六过孔i(贯穿层间介电层110)与放大晶体管T 2的栅极电连接，复位晶体管T 1的第二极与电源线VDD电连接；放大晶体管T 2的第一极与读取晶体管T 3的第二极电连接，放大晶体管T 2的第二极与电源线VDD电连接；读取晶体管T 3的栅极与第二信号线VGH/VGL电连接，读取晶体管T 3的第一极与第三信号线VRED电连接；存储电容C与光敏器件102并联设置；各晶体管的有源层分别通过对应的第七过孔k(贯穿栅绝缘层109和层间介电层110)与第一极、第二极电连接。在一些实施例中，放大晶体管T 2的第一极、以及读取晶体管T 3的第二极可以采用导体化的有源层材料制作。
需要说明的是，上述各晶体管可以为顶栅型晶体管、也可以为底栅型晶体管，在此不做限定。在一些实施例中，各晶体管为低温多晶硅晶体管，以获得较大的载流子迁移率，利于在玻璃基光学探测中实现高帧率成像。但在另一些实施例中，各晶体管还可以为非晶硅晶体管、氧化物晶体管、场效应晶体管等。另外各晶体管的第一极和第二极分别为漏极和源极，根据晶体管类型以及输入信号的不同，其功能可以互换，在此不做具体区分。一般地，当晶体管为P型晶体管时，第一极为源极，第二极为漏极；当晶体管为N型晶体管时，第一极为漏极，第二极为源极。
在具体实施时，图25中复位晶体管T 1控制放大晶体管T 2的栅极电位复位，放大晶体管T 2放大光敏器件102输出的电流信号，读取晶体管T 3将放大后的电流信号提供给第三信号线VRED。在一些实施例中，电源线VDD接约+5V的直流电位，透明偏压层106提供的偏压V bias接约0V的直流电位，可 使光敏器件102处于反偏状态。图25所示像素驱动电路103的具体工作过程如下：首先，复位晶体管T 1在第一信号线VRST所提供方形波信号的控制下打开，使放大晶体管T 2的栅极电位复位成电源线VDD提供的固定电位信号，放大晶体管T 2工作在饱和状态；然后，光敏器件102进入曝光阶段，光敏器件102反偏而产生光电流信号；最后，读取晶体管T 3在第二信号线VGH/VGL所提供方形波信号的控制下打开，外部读取芯片(ROIC)通过第三信号线VRED读取放大晶体管T 2的栅极电位变化量(相当于放大晶体管T 2与读取晶体管T 3通路上的电流信号)。
另外，图5仅示意性给出了第一过孔d和第二过孔e的斜坡呈折线形状，在一些实施例中，第一过孔d和第二过孔e的斜坡可以均是平滑的弧线形状，在此不做具体限定。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图27和图28所示，像素驱动电路103还可以包括降噪晶体管T 4，降噪晶体管T 4为单栅晶体管或双栅晶体管。
图25所示像素驱动电路103的结构简单、填充因子高。但由于图25所示的像素驱动电路103内没有存储节点，因此不能实现真正的相关双采样。具体地，通常图25所示的像素驱动电路103采用伪相关双采样的方式消除固定模式噪声，但不能消除与时间相关的噪声(kT/C)。图27和图28所示像素驱动电路103，相较于图25所示的像素驱动电路103增加了一个降噪晶体管T 4和一个电荷的储存节点——浮扩散点FD，即虚线所示的电容C’；其中降噪晶体管T 4的栅极与第三信号线G电连接，第一极与第二晶体管T 2的栅极电连接，第二极与光敏器件102的第一电极121电连接。因此图27和图28所示的像素驱动电路103可以实现真正的相关双采样，消除像素中的FPN噪声，噪声水平较低。
在一些实施例中，在本公开实施例提供的上述纹路识别模组中，如图5和图18所示，纹路识别基板100还可以包括：缓冲层108、栅绝缘层109、层间介电层110、第二平坦层111、第二绝缘层112、保护层113、阻挡层114 和电磁屏蔽层115。另外，如图1和图2所示，在纹路识别基板100的绑定区域BD内还可以设置有栅极驱动芯片(Gate IC)116和源极驱动芯片(Source IC)117等；其中，栅极驱动芯片116与第一信号线VRST、第二信号线VGH/VGL电连接，源极驱动芯片117与第三信号线RED、电源线VDD、及第四信号线G电连接。在一些实施例中，如图3和图4所示，可以在降噪区BB远离纹路识别区AA的一侧设置栅极驱动电路(GOA)118，并采用栅极驱动电路118为第一信号线VRST、以及第二信号线VGH/VGL提供驱动信号，从而无需邦定栅极驱动芯片116，可实现窄边框的技术效果。对于纹路识别模组的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本公开的限制。
基于同一发明构思，本公开实施例提供了一种显示装置，如图29所示，包括：指纹识别模组01、显示模组02和胶粘层03；其中，指纹识别模组01为本公开实施例提供的上述指纹识别模组01，指纹识别模组01位于显示模组02显示侧的相对侧；胶粘层03位于显示模组02与指纹识别模组01之间，胶粘层03在显示模组02上的正投影位于显示模组02的边框区，使得指纹识别模组01、显示模组02以及胶粘层03围成的空间形成空气层(air gap)，利于维持手指反射光的光路传播方向不变。
在进行指纹识别时，当手指触摸到显示模组01时，光线约束层200可将手指反射光线中小角度的光线近于准直化的筛选出，使其到达下方光敏器件102的光电转换层122上。光电转换层122可以探测出光线的强度，由于谷与脊向下漫反射光的能量不同，光敏器件102阵列探测得到的光强不同，由此获取指纹图像信息。
在一些实施例中，本公开实施例提供的上述显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪、智能手表、健身腕带、个人数字助理等任何具有显示功能的产品或部件。该显示装置包括但不限于：射频单元、网络模块、音频输出&输入单元、传感器、显示单元、用户输入单元、接口单元、存储器、处理器、以及电源等部件。另外，本领 域技术人员可以理解的是，上述结构并不构成对本公开实施例提供的上述显示装置的限定，换言之，在本公开实施例提供的上述显示装置中可以包括上述更多或更少的部件，或者组合某些部件，或者不同的部件布置。
显然，本领域的技术人员可以对本公开实施例进行各种改动和变型而不脱离本公开实施例的精神和范围。这样，倘若本公开实施例的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (35)

  1. 一种纹路识别模组，其中，包括：
    纹路识别基板，所述纹路识别基板包括衬底基板，以及位于所述衬底基板一侧的阵列排布的多个光敏器件；
    光线约束层，与所述纹路识别基板具有所述多个光敏器件的一侧直接接触设置，所述光线约束层包括至少一层光阑层、以及位于所述光阑层远离所述纹路识别基板一侧的微透镜层；其中，所述光阑层具有呈阵列排布的透光孔，所述透光孔在所述衬底基板上的正投影位于所述光敏器件在所述衬底基板上的正投影内；所述微透镜层包括隔开设置的多个微透镜，所述微透镜在所述衬底基板上的正投影覆盖且大于所述透光孔在所述衬底基板上的正投影。
  2. 如权利要求1所述的纹路识别模组，其中，所述光线约束层包括至少两层所述光阑层，各所述光阑层中的所述透光孔一一对应且在所述衬底基板上的正投影至少部分重合。
  3. 如权利要求2所述的纹路识别模组，其中，在远离所述纹路识别基板的方向上，所述光阑层包括依次设置的第一光阑层、第二光阑层和第三光阑层；其中，
    所述第一光阑层包括阵列排布的第一透光孔，所述第二光阑层包括阵列排布的第二透光孔，所述第三光阑层包括阵列排布的第三透光孔；
    所述第二透光孔在所述衬底基板上的正投影覆盖且大于所述第一透光孔在所述衬底基板上的正投影，且所述第二透光孔在所述衬底基板上的正投影位于所述第三透光孔在所述衬底基板上的正投影内。
  4. 如权利要求3所述的纹路识别模组，其中，所述第一透光孔的中心在所述衬底基板上的正投影与对应所述第二透光孔的中心在所述衬底基板上的正投影之间具有第一距离；
    所述第一透光孔的中心在所述衬底基板上的正投影与对应所述第三透光孔的中心在所述衬底基板上的正投影之间具有第二距离；
    所述第一距离、所述第二距离与所述第一透光孔的孔径之比均大于或等于0且小于或等于20％。
  5. 如权利要求2～4任一项所述的纹路识别模组，其中，所述第二透光孔的孔径D 2满足以下关系式：
    D 2＝k*D 1，D 2＜D 3；
    其中，1＜k＜2，D 1为所述第一透光孔的孔径，D 3为所述第三透光孔的孔径。
  6. 如权利要求2～5任一项所述的纹路识别模组，其中，所述微透镜与所述透光孔一一对应设置，所述微透镜包括凸面和平面，其中，所述凸面位于所述平面远离所述透光孔的一侧。
  7. 如权利要求6所述的纹路识别模组，其中，所述光线约束层还包括与所述光阑层交替设置的支撑层；
    所述第一透光孔的孔径D 1满足以下关系式：
    D 1＝[D 2/(2h s)+h s]*[n x/(n-1)]*tanθ；
    其中，D为所述微透镜的口径，h s为所述微透镜的高度，n为所述微透镜的折射率，n x为所述支撑层的折射率，θ为收光角。
  8. 如权利要求7所述的纹路识别模组，其中，所述支撑层包括第一支撑层、第二支撑层和第三支撑层；其中，
    所述第一支撑层位于所述第一光阑层与所述第二光阑层之间，所述第二支撑层位于所述第二光阑层与所述第三光阑层之间，所述第三支撑层位于所述第三光阑层远离所述第二光阑层的一侧。
  9. 如权利要求8所述的纹路识别模组，其中，所述光线约束层还包括绿色树脂层，所述绿色树脂层位于所述第一光阑层与所述第一支撑层之间。
  10. 如权利要求9所述的纹路识别模组，其中，所述绿色树脂层填充所述第一透光孔，所述第二支撑层填充所述第二透光孔，所述第三支撑层填充所述第三透光孔。
  11. 如权利要求8～10任一项所述的纹路识别模组，其中，所述第三透光孔的孔径D 3满足以下关系式：
    D 3＝D*(H-H 3)/H；
    其中，H为所述微透镜层面向所述纹路识别基板一侧的表面到所述第一光阑层远离所述纹路识别基板一侧的表面之间的距离，H 3为所述第三支撑层的厚度。
  12. 如权利要求11所述的纹路识别模组，其中，所述第二光阑层的厚度与所述第三光阑层的厚度大致相同；
    所述微透镜层面向所述纹路识别基板一侧的表面到所述第一光阑层远离所述纹路识别基板一侧的表面之间的距离H满足以下关系式：
    H＝{[D 2/(4h s)]*[n x/(n-1)]}-{(3n-2)*n x*h s/[2(n 2-n)]}；
    H＝H 1+H 2+H 3+H 4+2h；
    其中，H 1为所述第一支撑层的厚度，H 2为所述第二支撑层的厚度，H 4为所述绿色树脂层的厚度，h为所述第二光阑层的厚度和所述第三光阑层的厚度。
  13. 如权利要求12所述的纹路识别模组，其中，所述第一支撑层的厚度H 1满足以下关系式：
    H 1＝D 2*(H-H 3)/D 3-H 4。
  14. 如权利要求13所述的纹路识别模组，其中，1.4≤n x≤1.7，1.5≤n≤2.0，1°≤θ≤10°，2μm≤D≤50μm，1μm≤D 1≤10μm，1μm＜D 2＜40μm，2μm≤D 3≤50μm，1μm≤hs≤20μm，1μm≤H 1≤20μm，1μm≤H 2≤20μm，1μm≤H 3≤20μm，0.5μm≤H 4≤3μm，0.5μm≤h≤1.5μm，4.5μm≤H≤100μm。
  15. 如权利要求7～14任一项所述的纹路识别模组，其中，所述支撑层的材料包括透明树脂和/或绿色树脂。
  16. 如权利要求4～15任一项所述的纹路识别模组，其中，所述第一光阑层的材料包括金属，所述第二光阑层和所述第三光阑层的材料均包括黑色树脂。
  17. 如权利要求1～16任一项所述的纹路识别模组，其中，相邻所述微透镜之间的距离大于0μm且小于或等于2μm。
  18. 如权利要求1～17任一项所述的纹路识别模组，其中，所述微透镜在所述衬底基板上的正投影形状为圆角方形、圆形、直角方形或六边形。
  19. 如权利要求1～18任一项所述的纹路识别模组，其中，所述纹路识别基板还包括多个像素驱动电路，所述多个像素驱动电路所在层位于所述多个光敏器件所在层与所述衬底基板之间，所述像素驱动电路与所述光敏器件一一对应电连接。
  20. 如权利要求19所述的纹路识别模组，其中，每个所述光敏器件包括至少一个子光敏器件，所述子光敏器件包括层叠设置的第一电极、光电转换层和第二电极；在包括多个所述子光敏器件的同一所述光敏器件中，各所述第一电极均与对应所述像素驱动电路电连接，各所述第二电极相互独立设置，各所述光电转换层相互独立设置。
  21. 如权利要求20所述的纹路识别模组，其中，所述纹路识别基板还包括多个连接电极，所述连接电极与所述第一电极同层设置；
    同一所述光敏器件的各所述第一电极通过所述连接电极与对应所述像素驱动电路电连接。
  22. 如权利要求21所述的纹路识别模组，其中，每个所述光敏器件包括四个所述子光敏器件，在同一所述光敏器件中，四个所述子光敏器件呈两行两列排布。
  23. 如权利要求22所述的纹路识别模组，其中，所述多个连接电极包括多个第一连接电极，其中，一个所述光敏器件中的四个所述第一电极通过同一个所述第一连接电极与对应所述像素电路电连接，所述第一连接电极在所述衬底基板上的正投影与电连接的四个所述第一电极在所述衬底基板上的正投影均相互交叠。
  24. 如权利要求22或23所述的纹路识别模组，其中，所述多个连接电极还包括多个第二连接电极，每个所述第二连接电极与一个所述光敏器件中的相邻两个所述第一电极电连接，所述第二连接电极在所述衬底基板上的正投影与电连接的相邻两个所述第一电极在所述衬底基板上的正投影均相互交 叠。
  25. 如权利要求20～24任一项所述的纹路识别模组，其中，一个所述光电转换层与至少一个所述微透镜对应。
  26. 如权利要求25所述的纹路识别模组，其中，所述光电转换层与所述微透镜一一对应，所述光电转换层在所述衬底基板上的正投影位于对应所述微透镜在所述衬底基板上的正投影内。
  27. 如权利要求26所述的纹路识别模组，其中，所述微透镜与所述透光孔一一对应设置；
    所述透光孔在所述衬底基板上的正投影位于对应所述光电转换层在所述衬底基板上的正投影的中央区域，且所述光电转换层的中心在所述衬底基板上的正投影与所述透光孔的中心在所述衬底基板上的正投影大致重合。
  28. 如权利要求20～27任一项所述的纹路识别模组，其中，所述纹路识别基板还包括平坦层、绝缘层和透明偏压层，其中，所述平坦层、所述绝缘层和所述透明偏压层依次位于所述多个光敏器件所在层远离所述衬底基板的一侧；
    所述平坦层包括多个第一过孔，所述第一过孔与所述第二电极一一对应设置，所述第一过孔在所述衬底基板上的正投影位于对应所述第二电极在所述衬底基板上的正投影内；所述绝缘层包括多个第二过孔，所述第二过孔与所述第一过孔一一连通设置，所述第二过孔在所述衬底基板上的正投影位于对应所述第一过孔在所述衬底基板上的正投影内；
    所述第二电极通过连通设置的所述第一过孔及所述第二过孔与所述透明偏压层电连接。
  29. 如权利要求28所述的纹路识别模组，其中，所述第一过孔在所述光电转换层上的正投影、以及所述第二过孔在所述光电转换层上的正投影均位于所述光电转换层的中央区域；
    所述第一过孔的中心在所述光电转换层上的正投影、以及所述第二过孔的中心在所述光电转换层上的正投影均与所述光电转换层的中心大致重合。
  30. 如权利要求28或29所述的纹路识别模组，其中，所述纹路识别基板包括纹路识别区，以及位于所述纹路识别区至少一侧的降噪区；
    所述多个光敏器件、所述透光孔、所述第一过孔和所述第二过孔位于所述纹路识别区，所述多个微透镜位于所述纹路识别区和所述降噪区；
    所述纹路识别基板还包括位于所述降噪区的电容，所述电容包括相对而置的第一电极板和第二电极板；其中，所述第一电极板与所述第一电极同层、同材料，所述第二电极板与所述第二电极同层、同材料。
  31. 如权利要求30所述的纹路识别模组，其中，所述平坦层还包括位于所述降噪区的第三过孔，所述第三过孔在所述衬底基板上的正投影位于所述第一电极板在所述衬底基板上的正投影内；所述第三过孔内填充有所述绝缘层，使得所述第一电极板与所述第二电极板相互绝缘；一个所述第三过孔的面积与一个所述光敏器件所在区域内的所述第一过孔的面积之和大致相同。
  32. 如权利要求28～31任一项所述的纹路识别模组，其中，所述纹路识别基板还包括阻挡层和电磁屏蔽层，其中，所述阻挡层位于所述透明偏压层与所述光线约束层之间，所述电磁屏蔽层位于所述阻挡层与所述光线约束层之间。
  33. 如权利要求21～32任一项所述的纹路识别模组，其中，所述像素驱动电路包括：复位晶体管、放大晶体管和读取晶体管，其中，所述复位晶体管、所述放大晶体管和所述读取晶体管中的至少之一为双栅晶体管。
  34. 如权利要求33所述的纹路识别模组，其中，所述像素驱动电路还包括降噪晶体管，所述降噪晶体管为单栅晶体管或双栅晶体管。
  35. 一种显示装置，其中，包括：显示模组、指纹识别模组和胶粘层；其中，所述指纹识别模组为如权利要求1～34任一项所述的指纹识别模组，所述指纹识别模组位于所述显示模组显示侧的相对侧；所述胶粘层位于所述显示模组与所述指纹识别模组之间，所述胶粘层在所述显示模组上的正投影位于所述显示模组的边框区。
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CN107480579A (zh) * 2016-06-08 2017-12-15 联咏科技股份有限公司 光学传感器元件及指纹传感器装置
CN111881873A (zh) * 2020-08-04 2020-11-03 深圳市汇顶科技股份有限公司 指纹识别装置和电子设备
CN212031869U (zh) * 2019-09-10 2020-11-27 上海思立微电子科技有限公司 光学指纹识别模组以及电子设备
CN112699761A (zh) * 2020-12-24 2021-04-23 厦门天马微电子有限公司 一种指纹识别面板和指纹识别显示模组

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CN107480579A (zh) * 2016-06-08 2017-12-15 联咏科技股份有限公司 光学传感器元件及指纹传感器装置
CN212031869U (zh) * 2019-09-10 2020-11-27 上海思立微电子科技有限公司 光学指纹识别模组以及电子设备
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