WO2023070488A1 - Structure de mise en boîtier, procédé de mise en boîtier et amplificateur de puissance - Google Patents

Structure de mise en boîtier, procédé de mise en boîtier et amplificateur de puissance Download PDF

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Publication number
WO2023070488A1
WO2023070488A1 PCT/CN2021/127262 CN2021127262W WO2023070488A1 WO 2023070488 A1 WO2023070488 A1 WO 2023070488A1 CN 2021127262 W CN2021127262 W CN 2021127262W WO 2023070488 A1 WO2023070488 A1 WO 2023070488A1
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WO
WIPO (PCT)
Prior art keywords
component
heat dissipation
conductor
rewiring layer
dissipation substrate
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Application number
PCT/CN2021/127262
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English (en)
Chinese (zh)
Inventor
李阳华
黄安
黄淑君
Original Assignee
上海华为技术有限公司
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Filing date
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Application filed by 上海华为技术有限公司 filed Critical 上海华为技术有限公司
Priority to PCT/CN2021/127262 priority Critical patent/WO2023070488A1/fr
Priority to CN202180098888.5A priority patent/CN117413356A/zh
Publication of WO2023070488A1 publication Critical patent/WO2023070488A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body

Definitions

  • the present application relates to the field of integrated circuit manufacturing, and in particular to a packaging structure, a packaging method and a power amplifier.
  • Radio base stations are widely used in various mobile communication fields. In order to increase the coverage of base stations, radio base stations with high output power are required. And high output power will lead to higher temperature of the power amplifier (PA), therefore, it is very important that the power amplifier has good heat dissipation performance. In addition, market-oriented large-scale production also puts forward requirements for the simplification of manufacturing cost and manufacturing process. At the same time, the Sub6G multi-channel power amplifier and the high-frequency application requirements above 6G have put forward higher requirements for the small size of the power amplifier, mounting, and low interconnection inductance. Require.
  • a semiconductor chip in a power amplifier, can be mounted on a printed circuit board (Printed Circuit Board, PCB), and connected to a metal plate under the PCB through a via hole through the PCB to achieve heat dissipation.
  • PCB printed circuit Board
  • FIG 1 is a schematic structural diagram of a current power amplifier.
  • the semiconductor chip is connected to a pad on the PCB through a bond wire, and a signal is input or output through the pad.
  • the heat dissipation capability of PCB via holes is poor, and it is difficult to meet the heat dissipation requirements of high-power power amplifiers.
  • the semiconductor chip can be soldered to the metal plate under the PCB through the slot on the PCB, or a metal structure can be embedded in the PCB slot, and the semiconductor chip can be mounted on the metal structure to realize the semiconductor power amplifier.
  • the heat dissipation of the chip is a schematic structural diagram of another power amplifier at present.
  • the semiconductor chip is connected to the pad on the PCB through the bonding wire, and the signal is input or output through the pad.
  • the surface can be passed on the PCB.
  • the surface mount technology (SMT) is equipped with surface mount devices (SMD), and the PCB is also provided with radio frequency traces.
  • SMT surface mount technology
  • SMD surface mount devices
  • the PCB is also provided with radio frequency traces.
  • the copper embedding process is complicated, resulting in high packaging costs, and the RF traces, surface mount devices and semiconductor chips are located in a conventional two-dimensional plane, resulting in a large size.
  • the embodiments of the present application provide a packaging structure, a packaging method, and a power amplifier, which can provide a better heat dissipation effect for the first component and reduce the packaging cost and device size at the same time.
  • a packaging structure including a heat dissipation substrate, a first component, a first encapsulation structure, a first rewiring layer, and a second component, wherein the first rewiring layer passes through
  • the first conductor structure that runs through the first encapsulation structure is connected to the first component.
  • the first component is mounted on the heat dissipation substrate. Compared with using the via holes in the printed circuit board to dissipate heat, it can To provide a better heat dissipation effect for the first component, a first rewiring layer is provided between the first component and the second component.
  • the first rewiring layer can be connected to the first component or to the second Compared with bonding wires, the cost of component connection is lower, the interconnection inductance is smaller, and the process requirements are lower.
  • the first component and the first rewiring layer can be connected to each other through the first conductor structure.
  • the first package The encapsulation structure supports the first rewiring layer thereon, which can realize multi-layer interconnection and form a highly integrated 3D encapsulation structure.
  • the package structure further includes: a second package structure covering the second component; the second package structure is provided with a first A four-conductor structure, the fourth conductor structure is electrically connected to the first redistribution layer.
  • the second component may be covered by the second encapsulation structure to protect the second component.
  • it also includes:
  • the second rewiring layer located in the second encapsulation structure away from the heat dissipation substrate; the second rewiring layer is electrically connected to the first rewiring layer through an interlayer interconnection structure; the interlayer interconnection a structure comprising said fourth conductor structure;
  • a third component located on the second rewiring layer away from the heat dissipation substrate; the third component is electrically connected to the second rewiring layer.
  • the packaging structure can be provided with multiple layers of rewiring layers, and the multilayer rewiring layers are electrically connected through an interlayer interconnection structure, so that the multilayer interconnection of the rewiring layers can be realized to form an integrated High 3D packaging structure, and compared with the packaging structure in a two-dimensional plane, the size of the packaging structure provided by the embodiment of the present application is smaller.
  • the packaging structure further includes:
  • the second redistribution layer is located on the top layer of the package structure, and the second conductor structure is used as the lead-out structure of the package structure to realize input or output of signals of devices in the package structure.
  • the packaging structure further includes:
  • the third component may be covered by a third encapsulation structure to protect the third component.
  • the material of the heat dissipation substrate is a conductive material
  • the heat dissipation substrate has an etching pattern, and the etching pattern includes lead-out components isolated from other parts
  • the packaging structure further includes:
  • the lead-out component serves as the lead-out structure of the package structure, so as to realize input or output of signals of devices in the package structure.
  • At least one of the first rewiring layer and the second rewiring layer has a thickness ranging from 1 to 200 microns.
  • the thickness of the first redistribution layer or the second redistribution layer is in the range of 1-200 micrometers, which is favorable for arranging multiple radio frequency traces thereon.
  • the heat dissipation substrate includes a dielectric material and a conductor material on a surface of the dielectric material; or the material of the heat dissipation substrate is a conductor material.
  • the material of the heat dissipation substrate may include a dielectric material and a conductor material covered on the surface of the dielectric material, or the material of the heat dissipation substrate is a conductor material, and the package structure can be applied to various application scenarios.
  • the thickness of the conductor material ranges from 0.1 to 1 mm.
  • the thickness of the conductor material in the thickness range of 0.1-1 mm is relatively large, which can meet the heat dissipation requirements of high-power devices.
  • the second component is connected to the heat dissipation substrate to achieve grounding.
  • the second component can be grounded by connecting the heat dissipation substrate to form a grounding inductance.
  • the first component includes at least one of a semiconductor chip, a capacitor device, and an integrated device.
  • the first component includes at least one of a semiconductor chip, a capacitor device and an integrated device, so as to meet the application requirements of the power amplifier.
  • the first encapsulation structure is also covered with an internal structure device, the base material of the internal structure device is ceramic or epoxy resin, and the internal structure device is mounted on the heat dissipation substrate side.
  • the first encapsulation structure is also covered with internal components, so as to broaden the application scenarios of the power amplifier.
  • the second component includes a surface mount device.
  • the second component if the second component includes a surface mount device, the second component can be electrically connected to the first redistribution layer through surface mount technology, and at the same time, the packaging structure is applicable to more scenarios.
  • the surface mount device includes at least one of a resistance device, a capacitor device and an inductance device.
  • the surface mount device may specifically be at least one of a capacitor device, a resistance device, and an inductance device, so as to broaden the application scenarios of the power amplifier.
  • a packaging method including:
  • first rewiring layer is connected to the first component through a first conductor structure passing through the first encapsulation structure;
  • a second component is formed on the first rewiring layer; the second component is electrically connected to the first rewiring layer.
  • the method also includes:
  • a fourth conductor structure penetrating through the second encapsulation structure is formed in the second encapsulation structure, and the fourth conductor structure is electrically connected to the first rewiring layer.
  • the method also includes:
  • a second rewiring layer is formed on the second encapsulation structure; the second rewiring layer is electrically connected to the first rewiring layer through an interlayer interconnection structure; the interlayer interconnection structure includes the a fourth conductor structure;
  • a third component is formed on the second rewiring layer; the third component is electrically connected to the second rewiring layer.
  • the method also includes:
  • a second conductor structure connected to the second redistribution layer is formed on the second redistribution layer, and the second conductor structure includes at least one of conductor columns, pins, solder balls, and wires.
  • the method also includes:
  • a third encapsulation structure covering the third component is formed on the second redistribution layer, and the second conductor structure penetrates through the third encapsulation structure.
  • the material of the heat dissipation substrate is a conductive material
  • the heat dissipation substrate has an etching pattern, and the etching pattern includes lead-out components isolated from other parts, then, in the first encapsulation structure Before forming the first redistribution layer, the method further includes:
  • a third conductor structure is formed through the first encapsulation structure, so that the third conductor structure is connected to the first redistribution layer; the third conductor structure is connected to the lead-out component.
  • At least one of the first rewiring layer and the second rewiring layer has a thickness ranging from 1 to 200 microns.
  • the heat dissipation substrate includes a dielectric material and a conductor material on a surface of the dielectric material; or the material of the heat dissipation substrate is a conductor material.
  • the thickness of the conductor material ranges from 0.1 to 1 mm.
  • the second component is connected to the heat dissipation substrate to achieve grounding.
  • the first component device includes at least one of a semiconductor chip, a capacitor device, and an integrated device.
  • the first encapsulation structure is also covered with an internal structure device, the base material of the internal structure device is ceramic or epoxy resin, and the internal structure device is mounted on the heat dissipation substrate side.
  • the second component includes a surface mount device; forming the second component on the first rewiring layer includes:
  • a second component is formed on the second wiring layer by using a surface mount process.
  • the surface mount device includes at least one of a resistance device, a capacitor device and an inductance device.
  • a third aspect of the embodiments of the present application provides a power amplifier, which is characterized in that the power amplifier includes the package structure as provided in the first aspect above.
  • Embodiments of the present application provide a packaging structure and a packaging method.
  • the packaging structure includes a heat dissipation substrate, a first component, a first encapsulation structure, a first rewiring layer, and a second component, wherein the first rewiring layer passes through
  • the first conductor structure that runs through the first encapsulation structure is connected to the first component.
  • the first component is mounted on the heat dissipation substrate. Compared with using the via holes in the printed circuit board to dissipate heat, it can To provide a better heat dissipation effect for the first component, a first rewiring layer is provided between the first component and the second component.
  • the first rewiring layer can be connected to the first component or to the second Compared with bonding wires, the cost of component connection is lower, the interconnection inductance is smaller, and the process requirements are lower.
  • the first component and the first rewiring layer can be connected to each other through the first conductor structure.
  • the first package The encapsulation structure supports the first rewiring layer thereon, which can realize multi-layer interconnection and form a highly integrated 3D encapsulation structure.
  • Fig. 1 is a structural schematic diagram of a power amplifier
  • Fig. 2 is the structural representation of another kind of power amplifier
  • FIGS. 3-9 are structural schematic diagrams of the packaging structure provided by the embodiment of the present application.
  • FIG. 10 is a schematic flow diagram of a packaging method provided in an embodiment of the present application.
  • 11 to 13 are structural schematic diagrams of the packaging structure provided by the embodiment of the present application during the manufacturing process.
  • Embodiments of the present application provide a packaging structure, a packaging method, and a power amplifier, which can provide a better heat dissipation effect for the first component, while reducing packaging cost and device size.
  • the via hole 1-003 can be filled with a thermally conductive material, and the via hole 1-003 and the semiconductor chip 1-001 can also be filled with a thermally conductive material, and the semiconductor chip 1-001 can also be filled with a thermally conductive material.
  • -001 is connected to the pad 1-006 on the PCB 1-002 through the bonding wire 1-005, and the signal is input or output through the pad 1-006.
  • the via hole 1-003 of the PCB 1-002 has poor heat dissipation capability, and it is difficult to meet the heat dissipation requirements of the high-power power amplifier.
  • the semiconductor chip 2-001 can be soldered to the metal plate under the PCB 2-002 through the slot on the PCB 2-002, or on the PCB 2-002.
  • Metal structure 2-003 is embedded in groove 002, and semiconductor chip 2-001 is mounted on metal structure 2-003 to realize heat dissipation of semiconductor chip 2-001, and semiconductor chip 2-001 is connected by bonding wire 2-004
  • the surface mount device 2-006 can be set on the PCB 2-002 by surface mount technology, and the PCB can also be set There are RF traces.
  • the copper embedding process is complicated, resulting in high packaging costs, and the RF wiring, surface mount device 2-006 and semiconductor chip 2-001 are located in a conventional two-dimensional plane, resulting in a large size, surface mount device 2-006 and The semiconductor chip 2-001 is formed by using different processes, and the processes are relatively complicated.
  • the packaging structure includes a heat dissipation substrate, a first component, a first packaging structure , the first redistribution layer and the second component, wherein the first redistribution layer is connected to the first component through the first conductor structure penetrating through the first encapsulation structure, in the embodiment of the present application, the first component is pasted Installed on the heat dissipation substrate, compared with using the through holes in the printed circuit board to dissipate heat, it can provide a better heat dissipation effect for the first component, and set the first rewiring between the first component and the second component layer, the first redistribution layer can be connected to the first component or to the second component.
  • the conductor structure can realize the mutual connection between the first component and the first rewiring layer, and the first encapsulation structure supports the first rewiring layer on it, which can realize multilayer interconnection and form a highly integrated 3D packaging structure.
  • the package structure device may include: a heat dissipation substrate 100 , a first component 101 , a first encapsulation structure 102 , and a first rewiring layer 103 , the second component 104 and the first conductor structure 105 .
  • the heat dissipation substrate is used as the lower substrate of the package structure, and other components are arranged above the heat dissipation substrate for illustration.
  • the "upper” and “lower” of the packaging structure are related to the placement direction of the packaging structure.
  • the heat dissipation substrate can be placed upward, and other components are arranged below the heat dissipation substrate.
  • the heat dissipation substrate 100 is a substrate used to provide heat dissipation channels for the devices in the package structure to achieve high power density heat dissipation.
  • the heat dissipation substrate 100 can also play a supporting role to support the devices in the package structure.
  • the heat dissipation substrate 100 can also be used to provide a grounding function for devices in the package structure.
  • the heat dissipation substrate 100 can be selected from a material with good heat dissipation performance, such as a conductive material, to realize the heat dissipation function of the heat dissipation substrate 100 with high power density;
  • the heat dissipation substrate 100 can be made of a material with good electrical conductivity, so as to realize the grounding function of the heat dissipation substrate 100 .
  • the material of the heat dissipation substrate 100 may be a conductive material, which has better heat dissipation performance and electrical conductivity, and also has a supporting function.
  • the material of the heat dissipation substrate 100 may be all conductive materials, or may include a dielectric material and a conductive material covered on the surface of the dielectric material, and the packaging structure can be applied to various application scenarios, wherein the conductive material can cover the surface of the dielectric material. Cover only one of the surfaces, or multiple surfaces.
  • the conductor material is a metal material with high thermal conductivity and high electrical conductivity such as copper or aluminum. Compared with the current modification of the printed circuit board for heat dissipation, the cost can be reduced and the heat dissipation capacity can be improved.
  • the conductive material may have a relatively large thickness, which can achieve better heat dissipation performance and electrical conductivity.
  • the thickness of the conductor material ranges from 0.1 to 1 millimeter (mm), and the conductor material within this thickness range can meet the heat dissipation requirements, grounding requirements and support requirements of high-power devices.
  • the thickness range of the conductor material is determined, when the heat dissipation substrate 100 adopts a dielectric material and the conductor material covered on the surface of the dielectric material, the dielectric material can further increase the supporting performance of the heat dissipation substrate 100 .
  • the first component 101 is mounted on one side of the heat dissipation substrate 100.
  • the heat dissipation substrate 100 includes a dielectric material and a conductor material
  • the side with the conductor material in the heat dissipation substrate 100 Mount the first component 101 .
  • Solder is included between the first component 101 and the heat dissipation substrate 100.
  • the solder has good electrical conductivity and thermal conductivity.
  • the first component 101 can be electrically connected to the heat dissipation substrate 100 through solder, or can be connected to the heat dissipation substrate 100 through solder.
  • the substrate 100 dissipates heat.
  • the first component 101 includes at least one of a semiconductor chip (die), a capacitor (capacitance, CAP) and an integrated passive device (IPD), meeting the application requirements of a power amplifier.
  • the first component device 101 can be one or more semiconductor chips, and the semiconductor chip (die) can be a transistor.
  • the first component device 101 can be used as a peak value tube and/or an average value tube; the first component 101 can also be one or more capacitors, the capacitors can be ceramic capacitors, the ceramic capacitors have the characteristics of low loss, etc., the ceramic capacitors can be multilayer ceramic capacitors (multilayer ceramic capacitors) , MLCC); the first component 101 can also be one or more integrated devices.
  • an internal device 101-1 may also be mounted on one side of the heat dissipation substrate 100 to meet the individual requirements of the packaging structure and expand the application scenarios of the power amplifier.
  • the base material of the internal structure device 101-1 may be ceramic or epoxy resin.
  • the heat dissipation substrate 100 includes a dielectric material and a conductor material
  • the internal structure device 101-1 is mounted from the side with the conductor material in the heat dissipation substrate 100, that is, the internal structure device 101-1 and the first component 101 are located on the heat dissipation surface. The same side of the substrate 100 is shown in FIG. 4 .
  • the first component 101 is covered by the first encapsulation structure 102 to protect the first component 101, as shown in FIG. 3; when the encapsulation structure also includes the internal device 101-1, The first component 101 and the built-in device 101-1 can be covered by the first encapsulation structure 102 together to protect the first component 101 and the built-in device 101-1, as shown in FIG. 4 .
  • the first encapsulation structure 102 may have a flat surface for supporting other components thereon, as shown in FIG. 3 and FIG. 4 .
  • the material of the first encapsulation structure 102 may include a thermosetting cross-linked resin, such as epoxy injection molding compound.
  • a first redistribution layer (redistribution layer, RDL) 103 is provided on the side of the first encapsulation structure 102 away from the heat dissipation substrate 100, and the first redistribution layer 103 may include connection lines, pads and other conductor components, the dielectric material 103 - 1 isolating the first redistribution layer 103 is also included on the periphery of the first redistribution layer 103 .
  • the first component 101 is connected to the first rewiring layer 103 through the first conductor structure 105, the first conductor structure 105 runs through the first encapsulation structure 102, and the material of the first conductor structure 105 can be a metal material with good conductivity, for example aluminum or copper etc.
  • the first conductor structure 105 can lead the first component 101 to the first redistribution layer 103, so that the first component 101 can be led out by using the first redistribution layer 103, or the first redistribution layer 101 can be used to
  • the layer 103 electrically connects the first component 101 with other components.
  • the internal device 101-1 may also be connected to the first rewiring layer 103 through the first conductor structure 105 penetrating through the first encapsulation structure 102, that is, the first conductor structure 105
  • the internal structure device 101-1 can also be drawn out to the first redistribution layer 103, so that the internal structure device 101-1 can be drawn out by using the first redistribution layer 103, or the internal structure device 101-1 can be drawn out by using the first redistribution layer 103 101-1 is electrically connected with other components.
  • a second component 104 is provided on the side of the first rewiring layer 103 away from the heat dissipation substrate 100, and the second component 104 is electrically connected to the first rewiring layer 103, so that the first rewiring layer 103 can be used.
  • the rewiring layer 103 leads out the second component 104 , and the first rewiring layer 103 can also be used to connect the second component 104 to other components, for example, connect the first component 101 to the second component 104 .
  • the second component device 104 includes one or more surface mount devices, and the surface mount device may be at least one of a capacitor device, a resistance device, and an inductance device, so as to meet the individual requirements of the packaging structure and expand the power amplifier. Application scenarios.
  • the second component 104 is electrically connected to the first redistribution layer 103. Compared with the bonding wires and PCB traces commonly used at present, the cost is lower, the interconnection inductance is smaller, the process requirements are low, and the bonding can also be reduced. Stability risks arising from spatial coupling between lines.
  • the second component 104 when used as a top-layer device, it may be exposed without encapsulation structure for encapsulation, as shown in FIG. 3 .
  • the second component 104 when used as a top-layer device, it can also be covered by the second encapsulation structure 106 to protect the second component 104, and the second encapsulation structure 106 can have a flat surface. The surface is used to support other components on it, as shown in Figure 4.
  • the material of the second encapsulation structure 106 may include a thermosetting cross-linked resin, such as epoxy injection molding compound.
  • the second encapsulation structure 104 is provided with a fourth conductor structure 108 penetrating through the second encapsulation structure 104, and the fourth conductor structure 108 is electrically connected to the first rewiring layer 103 for leading out the second encapsulation structure 104.
  • the first redistribution layer 103 and devices electrically connected to the first redistribution layer 103 are drawn out, as shown in FIG. 4 .
  • the fourth conductor structure 108 may be made of a material with good electrical conductivity, such as a metal material such as aluminum or copper.
  • the first component 101 is led out to the side away from the heat dissipation substrate 100 through the first conductor structure 105, the first redistribution layer 103 and the fourth conductor structure 108, so as to use the fourth conductor structure 108 for input or output Signal.
  • a second redistribution layer 107 may be provided on the side of the second encapsulation structure 106 away from the heat dissipation substrate 100, and the second redistribution layer 107 may include conductive components such as connecting wires and pads.
  • the periphery of the second redistribution layer 107 further includes a dielectric material 107 - 1 isolating the second redistribution layer 107 .
  • the second rewiring layer 107 can be electrically connected to the first rewiring layer 103 through an interlayer interconnection structure, the interlayer interconnection structure can include a fourth conductor structure 108, and the material of the interlayer interconnection structure can be a metal material with good conductivity. , such as aluminum or copper.
  • the second rewiring layer 107 is connected to the first rewiring layer 103 through an interlayer interconnection structure, which can realize multilayer interconnection and form a highly integrated 3D packaging structure, and the first conductor structure 105 connects the first A component 101 is led out to the first rewiring layer 103, and the interlayer interconnection structure leads the first rewiring layer 103 to the second rewiring layer 107, so that the first rewiring layer 103 and the second rewiring layer 107 can be used
  • the first component 101 is drawn out, and the first rewiring layer 103 and the second rewiring layer 107 can also be used to electrically connect the first component 101 to other components, as shown in FIG. 5 .
  • a third component 109 may be provided on the side of the second rewiring layer 107 away from the heat dissipation substrate 100, and the third component 109 is electrically connected to the second rewiring layer 107, so that the second rewiring layer 107 can be used.
  • the second rewiring layer 107 leads out the third component 109, and the second rewiring layer 107 can also be used to connect the third component 109 to other components, such as connecting the second component 104 to the third component 109 , as shown in Figure 5.
  • the third component 109 includes one or more surface mount devices, and the surface mount device can specifically be at least one of a capacitor device, a resistance device, and an inductance device, so as to meet the individual requirements of the packaging structure and broaden the application of the power amplifier. Scenes.
  • the electrical connection between the second redistribution layer 107 and the third component 109 is realized. Compared with the bonding wires and PCB traces that are often used at present, the cost is lower, the interconnection inductance is smaller, the process requirements are low, and the bonding wire can be reduced. Stability risks caused by spatial coupling between alignments.
  • the packaging structure may include a multilayer rewiring layer, and the first rewiring layer 103 and the second rewiring layer 107 may be two layers of the multilayer rewiring layer.
  • the first rewiring layer The layer 103 and the second redistribution layer 107 may be adjacent redistribution layers, or may be non-adjacent redistribution layers.
  • At least one rewiring layer may be arranged between the first rewiring layer 103 and the second rewiring layer 107, including the second
  • the first rewiring layer 103 and the multilayer rewiring layer of the second rewiring layer 107 are electrically connected through an interlayer interconnection structure, so that the multilayer interconnection of the rewiring layer can be realized to form a highly integrated 3D packaging structure , and compared with the package structure in the two-dimensional plane, the size of the package structure provided by the embodiment of the present application is smaller.
  • Each rewiring layer can be provided with a surface mount device on the side away from the heat dissipation substrate 100, and the surface mount device is connected to the rewiring layer, which can meet the requirements of high output power amplifiers for base stations.
  • the thickness of the first redistribution layer 103 can be in the range of 1-200 microns
  • the thickness of the second redistribution layer 107 can be in the range of 1-200 microns, which is beneficial for disposing multiple radio frequency lines thereon.
  • a second conductor structure 110 may also be provided on the second rewiring layer 107, the second conductor structure 110 is connected to the second rewiring layer 107, and the second conductor structure 110 faces a side away from the heat dissipation substrate 100.
  • the side extension is used to lead out the second redistribution layer 107, as shown in FIG. 6 .
  • the second conductor structure 110 is used as the lead-out structure of the packaging structure to realize the input or output of the signals of the devices in the packaging structure.
  • the second conductor structure 110 can connect the second redistribution layer 107 and other devices or wiring layers thereon.
  • the end of the lead-out structure away from the heat dissipation substrate 100 can be located on the upper surface of the package structure to realize the lead-out, or can be located on the side wall of the package structure to realize the lead-out from the side.
  • the second conductor structure 110 includes at least one of conductor pillars, pins, solder balls and wires.
  • the second conductor structure 110 can be made of a metal material with good electrical conductivity, such as aluminum or copper.
  • the second conductor structure 110 can be drawn out from the top, and can also be drawn out from the side, that is, the second conductor structure 110 can be bent and drawn out from the side wall of the package structure, as shown in Figure 6 or Figure 7 .
  • the first component 101 is led out to the side away from the heat dissipation substrate 100 through the first conductor structure 105, the first redistribution layer 103, the interlayer interconnection structure, the second redistribution layer 107 and the second conductor structure 110.
  • One side so as to input or output signals by using the second conductor structure 110 .
  • the second component 104 is led out to the side away from the heat dissipation substrate 100 through the first rewiring layer 103, the interlayer interconnection structure, the second rewiring layer 107, and the second conductor structure 110, so as to use the second conductor structure 110 to input or output signal.
  • the third component 109 is led out to the side away from the heat dissipation substrate 100 through the second redistribution layer 107 and the second conductor structure 110 , so as to use the second conductor structure 110 to input or output signals.
  • the third component 109 when used as a top-layer device, it may be exposed without encapsulation structure for encapsulation, as shown in FIG. 6 .
  • the third component 109 when used as a top layer device, it can also be covered by the third encapsulation structure 111 to protect the third component 109 and the second conductor structure 110, as shown in FIG. 7 As shown, the second conductor structure 110 penetrates the third encapsulation structure 111, so as to realize electrical extraction of devices in the encapsulation structure.
  • the material of the third encapsulation structure 111 may include a thermosetting cross-linked resin, such as epoxy injection molding compound.
  • the package structure when the package structure conducts electrical extraction, it can be extracted from the side away from the heat dissipation substrate 100 , can be extracted from the side wall of the package structure, and can also be extracted from the side of the heat dissipation substrate 100 .
  • the packaging structure can use one of the top lead, side lead and bottom lead alone for electrical lead, or two or three of the upper lead, side lead and bottom lead can be combined for electrical lead, that is, the package structure can be There are many ways of electrical extraction, and at least one of the upper extraction, side extraction and lower extraction can be used to realize the electrical extraction of the device.
  • the packaging structure adopts bottom leads
  • the material of the heat dissipation substrate 100 is a conductive material
  • the heat dissipation substrate 100 has an etching pattern 1001
  • the etching pattern 1001 includes a lead-out part 112 isolated from other parts of the heat dissipation substrate 100, as shown in FIG. 8 .
  • a package structure including top leads, side leads and bottom leads can be shown in FIG. 9 .
  • the heat dissipation substrate 100 When the material of the heat dissipation substrate 100 includes a dielectric material and a conductor material covering the dielectric material, the heat dissipation substrate 100 has an etching pattern, the etching pattern includes lead-out parts isolated from other parts of the conductor material, and the etching pattern also includes a part located in the dielectric material and a An extension part to which the lead-out part is electrically connected.
  • the lead-out part and the extension part may be metal materials with good electrical conductivity, such as aluminum or copper.
  • the etching pattern 1001 may include one or more lead-out components 112 .
  • FIG. 8 and FIG. 9 are structural schematic diagrams when the material of the heat dissipation substrate 100 is a conductive material and includes two lead-out components 112 .
  • the lead-out component 112 is connected to the first redistribution layer 103 through a third conductor structure 113 , the third conductor structure 113 penetrates the first encapsulation structure 102 , and the third conductor structure 113 is connected to the lead-out component 112 .
  • the first component 101 is drawn out to the side of the heat dissipation substrate 100 through the first conductor structure 105, the first redistribution layer 103, the third conductor structure 113, and the lead-out component 112, so as to use the lead-out component 112 to input or output signal.
  • the second component 104 is led out to the side of the heat dissipation substrate 100 through the first redistribution layer 103 and the third conductor structure 113 , and the lead-out part 112 , so as to use the lead-out part 112 to input or output signals.
  • the third component 109 is extracted to the side of the heat dissipation substrate 100 through the second redistribution layer 107 , the first redistribution layer 103 , the third conductor structure 113 , and the lead-out component 112 , so as to use the lead-out component 112 to input or output signals.
  • the first component 101 when the heat dissipation substrate 100 includes the etching pattern 1001 and the etching pattern 1001 includes the lead-out part 112 , the first component 101 can input or output a signal through the lead-out part 112 .
  • This path can be the shortest path for connecting the first component 101 to the outside world, thus improving the power efficiency of the first component.
  • the etching pattern 1001 including the lead-out structure 112 when used for down-leading, it can be compatible with package forms such as grid array package (land grid array, LGA) and quad flat no-lead package (quad flat no-lead package, QFN).
  • the material of the heat dissipation substrate 100 includes a conductive material, which can also be used for grounding.
  • the first component 101 can be connected to the heat dissipation substrate 100, for example, through solder connection to realize grounding and form a grounding inductance.
  • the second component 104 can also be connected to the conductor material of the heat dissipation substrate 100 to achieve grounding.
  • the third component 109 can also be connected through Connect the conductor material of the heat dissipation substrate 100 to realize grounding.
  • the conductive material in the heat dissipation substrate 100 , the first conductive post 114 and the second conductive post 115 may be a metal material with good electrical conductivity, such as aluminum or copper.
  • An embodiment of the present application provides a package structure, including a heat dissipation substrate, a first component, a first encapsulation structure, a first rewiring layer, and a second component, wherein the first rewiring layer passes through the first encapsulation structure
  • the first conductor structure of the first component is connected to the first component.
  • the first component is mounted on the heat dissipation substrate.
  • the first rewiring layer can be connected to the first component or to the second component, compared Compared with the bonding wire, the cost is lower, the interconnection inductance is smaller, and the process requirements are lower.
  • the first component and the first rewiring layer can be connected to each other through the first conductor structure, and the first encapsulation structure supports the above
  • the first rewiring layer can realize multi-layer interconnection and form a highly integrated 3D packaging structure.
  • the embodiment of the present application also provides a packaging method, as shown in Figure 10, which is a flow chart of a packaging method provided by the embodiment of the present application, Figures 11-13
  • Figure 10 For a structural schematic diagram of the packaging structure during the manufacturing process, the method may include:
  • the heat dissipation substrate is used as the lower substrate of the package structure, and other components are arranged above the heat dissipation substrate for illustration.
  • the "upper” and “lower” of the packaging structure are related to the placement direction of the packaging structure.
  • the heat dissipation substrate can be placed upward, and other components are arranged below the heat dissipation substrate.
  • the heat dissipation substrate 100 is a substrate used to provide heat dissipation channels for the devices in the package structure to achieve high power density heat dissipation.
  • the heat dissipation substrate 100 can also play a supporting role to support the devices in the package structure.
  • the heat dissipation substrate 100 can also be used to provide a grounding function for devices in the package structure.
  • the heat dissipation substrate 100 can be selected from a material with good heat dissipation performance, such as a conductive material, to realize the heat dissipation function of the heat dissipation substrate 100 with high power density;
  • the heat dissipation substrate 100 can be made of a material with good electrical conductivity, so as to realize the grounding function of the heat dissipation substrate 100 .
  • the material of the heat dissipation substrate 100 may be all conductive materials, or may include a dielectric material and a conductive material covered on the surface of the dielectric material, and the packaging structure can be applied to various application scenarios.
  • the conductive material may have a relatively large thickness, which can achieve better heat dissipation performance and electrical conductivity.
  • the thickness of the conductor material ranges from 0.1 to 1 millimeter (mm), and the conductor material within this thickness range can meet the heat dissipation requirements, grounding requirements and support requirements of high-power devices.
  • the thickness range of the conductor material is determined, when the heat dissipation substrate 100 adopts a dielectric material and the conductor material covered on the surface of the dielectric material, the dielectric material can further increase the supporting performance of the heat dissipation substrate 100 .
  • the first component 101 can be mounted on one side of the heat dissipation substrate 100. Specifically, if the heat dissipation substrate 100 includes a dielectric material and a conductor material, then the side with the conductor material in the heat dissipation substrate 100 Mount the first component 101 .
  • the first component 101 can be connected to the heat dissipation substrate 100 by soldering.
  • the first component device 101 includes at least one of a semiconductor chip, a capacitor device and an integrated device, and meets application requirements of a power amplifier.
  • the built-in device 101-1 can also be mounted on one side of the heat dissipation substrate 100 to meet the individual requirements of the packaging structure and broaden the application scenarios of the power amplifier, as shown in FIG. 11 .
  • the base material of the internal structure device 101-1 may be ceramic or epoxy resin.
  • the heat dissipation substrate 100 includes a dielectric material and a conductor material
  • the internal component 101 - 1 is mounted from the side of the heat dissipation substrate 100 that has the conductor material.
  • the first encapsulation structure 102 covering the first component 101 can be formed on the heat dissipation substrate 100 to protect the first component 101, when the encapsulation structure also includes the internal device 101-1 , the first component 101 and the internal structure 101-1 can be covered by the first encapsulation structure 102 to protect the first component 101 and the internal structure 101-1, and the first encapsulation structure 102 can have A flat surface on which other components rest.
  • the material of the first encapsulation structure 102 may include a thermosetting cross-linked resin, such as epoxy injection molding compound.
  • the first redistribution layer 103 may be formed on the side of the first encapsulation structure 102 away from the heat dissipation substrate 100.
  • the first redistribution layer 103 may include conductor components such as connection wires and pads.
  • the periphery of the first redistribution layer 103 further includes a dielectric material 103 - 1 isolating the first redistribution layer 103 .
  • the first component 101 is connected to the first rewiring layer 103 through the first conductor structure 105, the first conductor structure 105 runs through the first encapsulation structure 102, and the material of the first conductor structure 105 can be a metal material with good conductivity, Such as aluminum or copper etc.
  • the first conductor structure 105 can lead the first component 101 to the first redistribution layer 103, so that the first component 101 can be led out by using the first redistribution layer 103, or the first redistribution layer 101 can be used to
  • the layer 103 electrically connects the first component 101 with other components.
  • the internal device 101-1 may also be connected to the first rewiring layer 103 through the first conductor structure 105 penetrating through the first encapsulation structure 102, that is, the first conductor structure 105
  • the internal structure device 101-1 can also be drawn out to the first redistribution layer 103, so that the internal structure device 101-1 can be drawn out by using the first redistribution layer 103, or the internal structure device 101-1 can be drawn out by using the first redistribution layer 103 101-1 is electrically connected with other components.
  • the first conductor structure 105 may be formed by implanting solder balls, laser drilling and electroplating, or other semiconductor processes.
  • the first conductor structure 105 may be formed by performing laser drilling on the first encapsulation structure 102 , and then performing electroplating on the holes obtained by the laser drilling to finally form the first conductor structure 105 .
  • the first redistribution layer 103 can be formed on the side of the first encapsulation structure 102 away from the heat dissipation substrate 100.
  • the first redistribution layer 103 can be obtained by etching the conductor material, or can be
  • the wiring groove is obtained by etching the dielectric material, and the conductor material is formed in the wiring groove.
  • the second component 104 is formed on the side of the first rewiring layer 103 away from the heat dissipation substrate 100, and the second component 104 is electrically connected to the first rewiring layer 103, so that the first rewiring layer 103 can be used to
  • the wiring layer 103 leads out the second component 104 , and the first rewiring layer 103 may also be used to connect the second component 104 to other components, for example, connect the first component 101 to the second component 104 .
  • the second component device 104 includes one or more surface mount devices, and the surface mount device may specifically be at least one of a capacitor device, a resistance device, and an inductance device, so as to meet the individual requirements of the packaging structure and to broaden the power amplifier. Application scenarios.
  • the second component 104 is a surface mount device, the second component 104 is disposed on the first redistribution layer 103 by using surface mount technology.
  • the second component 104 when used as a top-layer device, it may be exposed without encapsulation structure for covering; when the second component 104 is used as a top-layer device, it may also A second encapsulation structure 106 covering the second component 104 is formed on the wiring layer 103 to protect the second component 104.
  • the second encapsulation structure 106 may have a flat surface for supporting other components thereon, Refer to Figure 4.
  • the material of the second encapsulation structure 106 may include a thermosetting cross-linked resin, such as epoxy injection molding compound.
  • a fourth conductor structure 108 penetrating through the second encapsulation structure 104 may also be formed in the second encapsulation structure 104, and the fourth conductor structure 108 is electrically connected to the first rewiring layer 103 for The first redistribution layer 103 and the devices electrically connected to the first redistribution layer 103 are drawn out, as shown in FIG. 4 .
  • the fourth conductor structure 108 may be made of a material with good electrical conductivity, such as a metal material such as aluminum or copper.
  • the fourth conductor structure 108 may be formed by implanting solder balls, laser drilling and electroplating, or other semiconductor processes.
  • the fourth conductor structure 108 may be formed by performing laser drilling on the second encapsulation structure 104 , and then performing electroplating on the holes obtained by the laser drilling, and finally forming the fourth conductor structure 108 .
  • the second redistribution layer 107 may be formed on the side of the second encapsulation structure 106 away from the heat dissipation substrate 100, and the second redistribution layer 107 may include conductor components such as connecting wires and pads.
  • the periphery of the second redistribution layer 107 further includes a dielectric material 107 - 1 isolating the second redistribution layer 107 .
  • the second rewiring layer 107 can be electrically connected to the first rewiring layer 103 through an interlayer interconnection structure.
  • the interlayer interconnection structure includes a fourth conductor structure 108. As shown in FIG. 5, the material of the interlayer interconnection structure can be conductive Good metal materials, such as aluminum or copper.
  • the interlayer interconnection structure can be formed by implanting solder balls, laser drilling and electroplating, or other semiconductor processes.
  • the interlayer interconnection structure may be formed by performing laser drilling on the second encapsulation structure 106 , and then electroplating the holes obtained by the laser drilling to finally form the interlayer interconnection structure.
  • a second rewiring layer 107 can be formed on the side of the second encapsulation structure 106 away from the heat dissipation substrate 100.
  • the second rewiring layer 107 can be obtained by etching the conductor material, or
  • the wiring groove is obtained by etching the dielectric material, and the conductor material is formed in the wiring groove.
  • the third component 109 can be formed on the side of the second rewiring layer 107 away from the heat dissipation substrate 100, and the third component 109 is electrically connected to the second rewiring layer 107, so that the second The rewiring layer 107 leads out the third component 109, and the second rewiring layer 107 can also be used to connect the third component 109 to other components, such as connecting the second component 104 to the third component 109,
  • the third component 109 includes one or more surface mount devices, and the surface mount device can specifically be at least one of a capacitor device, a resistance device, and an inductance device, so as to meet the individual requirements of the packaging structure and broaden the application of the power amplifier. Scenes. When the third component 109 is a surface mount device, the third component 109 is disposed on the second redistribution layer 107 by using surface mount technology.
  • the packaging structure may include a multilayer rewiring layer, and the first rewiring layer 103 and the second rewiring layer 107 may be two layers of the multilayer rewiring layer.
  • the first rewiring layer The layer 103 and the second redistribution layer 107 may be adjacent redistribution layers, or may be non-adjacent redistribution layers.
  • At least one rewiring layer may be arranged between the first rewiring layer 103 and the second rewiring layer 107, including the second
  • the first rewiring layer 103 and the multilayer rewiring layer of the second rewiring layer 107 are electrically connected through an interlayer interconnection structure, so that the multilayer interconnection of the rewiring layer can be realized to form a highly integrated 3D packaging structure , and compared with the package structure in the two-dimensional plane, the size of the package structure provided by the embodiment of the present application is smaller.
  • Each rewiring layer can be provided with a surface mount device on the side away from the heat dissipation substrate 100, and the surface mount device is connected to the rewiring layer, which can meet the requirements of high output power amplifiers for base stations.
  • the thickness of the first redistribution layer 103 can be in the range of 1-200 microns
  • the thickness of the second redistribution layer 107 can be in the range of 1-200 microns, which is beneficial for disposing multiple radio frequency lines thereon.
  • a second conductor structure 110 may also be formed on the second redistribution layer 107, the second conductor structure 110 is connected to the second redistribution layer 107, and the second conductor structure 110 faces away from the heat dissipation substrate 100 One side extends to lead out the second redistribution layer 107 , as shown in FIG. 6 .
  • the second conductor structure 110 is used as the lead-out structure of the packaging structure to realize the input or output of the signals of the devices in the packaging structure.
  • the second conductor structure 110 can connect the second redistribution layer 107 and other devices or wiring layers thereon.
  • the end of the lead-out structure away from the heat dissipation substrate 100 can be located on the upper surface of the package structure to realize the lead-out, or can be located on the side wall of the package structure to realize the lead-out from the side.
  • the second conductor structure 110 includes at least one of conductor pillars, pins, solder balls and wires.
  • the second conductor structure 110 can be made of a metal material with good electrical conductivity, such as aluminum or copper.
  • the conductor column can be formed by electroplating
  • the second conductor structure 110 is a pin
  • the metal pin can be mounted by surface mount technology.
  • the third component 109 when used as a top-layer device, it may be exposed without encapsulation structure for encapsulation, as shown in FIG. 6 .
  • the third component 109 when used as the top layer source device, it can also be covered by the third encapsulation structure 111, that is, the third component 109 is formed on the second redistribution layer 107
  • the third encapsulation structure 111 to protect the third component 109 and the second conductor structure 110, as shown in FIG. .
  • the material of the third encapsulation structure 111 may include a thermosetting cross-linked resin, such as epoxy injection molding compound.
  • the package structure when the package structure conducts electrical extraction, it can be extracted from the side away from the heat dissipation substrate 100 , can be extracted from the side wall of the package structure, and can also be extracted from the side of the heat dissipation substrate 100 .
  • the packaging structure can use one of the top lead, side lead and bottom lead alone for electrical lead, or two or three of the upper lead, side lead and bottom lead can be combined for electrical lead, that is, the package structure can be There are many ways of electrical extraction, and at least one of the upper extraction, side extraction and lower extraction can be used to realize the electrical extraction of the device.
  • the packaging structure adopts bottom leads
  • the material of the heat dissipation substrate 100 is a conductive material
  • the heat dissipation substrate 100 has an etching pattern 1001
  • the etching pattern 1001 includes a lead-out part 112 isolated from other parts of the heat dissipation substrate 100, as shown in FIG. 8 .
  • a package structure including top leads, side leads and bottom leads can be shown in FIG. 9 .
  • the heat dissipation substrate 100 When the material of the heat dissipation substrate 100 includes a dielectric material and a conductor material covering the dielectric material, the heat dissipation substrate 100 has an etching pattern, the etching pattern includes lead-out parts isolated from other parts of the conductor material, and the etching pattern also includes a part located in the dielectric material and a An extension part to which the lead-out part is electrically connected.
  • the lead-out part and the extension part may be metal materials with good electrical conductivity, such as aluminum or copper.
  • the etching pattern 1001 may include one or more lead-out components 112 .
  • the etching pattern 1001 can be formed by etching the heat dissipation substrate 100. Etching (etching) is also called photochemical etching (photochemical etching). When exposed to chemical solutions, it can achieve the effect of dissolution and corrosion, forming the effect of concave-convex or hollow-out molding.
  • the etching can usually use exposure method or screen printing method, and the specific etching method is not limited here.
  • the lead-out component 112 is connected to the first redistribution layer 103 through a third conductor structure 113 , the third conductor structure 113 penetrates the first encapsulation structure 102 , and the third conductor structure 113 is connected to the lead-out component 112 .
  • the third conductor structure 113 may also be formed through the first encapsulation structure 102, so that the third conductor structure 113 and The first redistribution layer 103 is connected, and the third conductor structure 113 is connected to the lead-out component 112 , that is, the lead-out component 112 is connected to the first redistribution layer 103 through the third conductor structure 113 , as shown in FIG. 8 .
  • the material of the heat dissipation substrate 100 includes a conductive material, which can also be used for grounding.
  • the first component 101 can be connected to the heat dissipation substrate 100, for example, through solder connection to realize grounding and form a grounding inductance.
  • the second component 104 can also be connected to the conductor material of the heat dissipation substrate 100 to achieve grounding.
  • the third component 109 can also be connected through Connect the conductor material of the heat dissipation substrate 100 to realize grounding.
  • the conductive material in the heat dissipation substrate 100 , the first conductive post 114 and the second conductive post 115 may be a metal material with good electrical conductivity, such as aluminum or copper.
  • the embodiment of the present application provides a packaging method, in which a first component is mounted on a heat dissipation substrate, a first encapsulation structure covering the first component is formed on the heat dissipation substrate, and a first encapsulation structure is formed on the first encapsulation structure.
  • the wiring layer is to form the second component on the first rewiring layer, wherein the first rewiring layer is connected to the first component through the first conductor structure passing through the first encapsulation structure.
  • the second A component is mounted on the heat dissipation substrate, which can provide a better heat dissipation effect for the first component than using via holes in the printed circuit board to dissipate heat.
  • the first rewiring layer, the first rewiring layer can be connected to the first component or to the second component. Compared with the bonding wire, the cost is lower, the interconnection inductance is smaller, and the process requirements are lower. , through the first conductor structure, the first component and the first rewiring layer can be connected to each other, and the first encapsulation structure supports the first rewiring layer on it, which can realize multi-layer interconnection and form a highly integrated 3D package structure.
  • Embodiments of the present application provide a power amplifier on the basis of providing the packaging structure, and the power amplifier adopts the packaging structure of the foregoing embodiments.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

La présente demande concerne une structure de mise en boîtier et un procédé de mise en boîtier. La structure de mise en boîtier comprend un substrat de dissipation de chaleur, un premier composant, une première structure d'encapsulage, une première couche de recâblage et un second composant, la première couche de recâblage étant connectée au premier composant au moyen d'une première structure conductrice pénétrant à travers la première structure d'encapsulage. Dans des modes de réalisation de la présente demande, en comparaison à l'utilisation d'un trou débouchant dans une carte de circuit imprimé en vue d'une dissipation de chaleur, la fixation du premier composant au substrat de dissipation thermique peut fournir un meilleur effet de dissipation de chaleur au premier composant ; la première couche de recâblage est disposée entre le premier composant et le second composant, et la première couche de recâblage peut être connectée au premier composant et peut également être connectée au second composant de sorte que, en comparaison à un fil de connexion, le coût est inférieur, l'inductance d'interconnexion est plus petite et les exigences pour des processus sont plus basses ; l'interconnexion du premier composant et de la première couche de recâblage peut être réalisée au moyen de la première structure conductrice ; la première structure d'encapsulage supporte sur elle la première couche de recâblage de sorte qu'une interconnexion entre plusieurs couches peut être réalisée, et une structure de mise en boîtier 3D présentant une grande intégration peut être formée.
PCT/CN2021/127262 2021-10-29 2021-10-29 Structure de mise en boîtier, procédé de mise en boîtier et amplificateur de puissance WO2023070488A1 (fr)

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CN202180098888.5A CN117413356A (zh) 2021-10-29 2021-10-29 一种封装结构、封装方法以及功率放大器

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US20060001152A1 (en) * 2004-07-02 2006-01-05 Phoenix Precision Technology Corporation Direct connection multi-chip semiconductor element structure
CN102157502A (zh) * 2011-03-23 2011-08-17 南通富士通微电子股份有限公司 系统级封装结构
CN102157393A (zh) * 2011-03-22 2011-08-17 南通富士通微电子股份有限公司 扇出高密度封装方法
CN102157501A (zh) * 2011-03-23 2011-08-17 南通富士通微电子股份有限公司 三维系统级封装结构
CN103594451A (zh) * 2013-11-18 2014-02-19 华进半导体封装先导技术研发中心有限公司 多层多芯片扇出结构及制作方法
CN103794587A (zh) * 2014-01-28 2014-05-14 江苏长电科技股份有限公司 一种高散热芯片嵌入式重布线封装结构及其制作方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060001152A1 (en) * 2004-07-02 2006-01-05 Phoenix Precision Technology Corporation Direct connection multi-chip semiconductor element structure
CN102157393A (zh) * 2011-03-22 2011-08-17 南通富士通微电子股份有限公司 扇出高密度封装方法
CN102157502A (zh) * 2011-03-23 2011-08-17 南通富士通微电子股份有限公司 系统级封装结构
CN102157501A (zh) * 2011-03-23 2011-08-17 南通富士通微电子股份有限公司 三维系统级封装结构
CN103594451A (zh) * 2013-11-18 2014-02-19 华进半导体封装先导技术研发中心有限公司 多层多芯片扇出结构及制作方法
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