WO2023050889A1 - 一种电流测量电路、电路板组件和电流检测设备 - Google Patents

一种电流测量电路、电路板组件和电流检测设备 Download PDF

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WO2023050889A1
WO2023050889A1 PCT/CN2022/098773 CN2022098773W WO2023050889A1 WO 2023050889 A1 WO2023050889 A1 WO 2023050889A1 CN 2022098773 W CN2022098773 W CN 2022098773W WO 2023050889 A1 WO2023050889 A1 WO 2023050889A1
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current
dividing resistor
voltage dividing
calculation module
pads
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PCT/CN2022/098773
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English (en)
French (fr)
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刘润东
涂大锐
王纲
史林然
崔迎春
王文兵
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中兴通讯股份有限公司
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Publication of WO2023050889A1 publication Critical patent/WO2023050889A1/zh

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof

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  • the present application relates to the technical field of detection, in particular to a current measurement circuit, a circuit board assembly and a current detection device.
  • each PCB pad 2 includes two separate pads 21 and 22, a plurality of patch shunts can be respectively arranged on each PCB pad 2, specifically, the two ends of the patch shunt One of the solder legs is disposed on the pad 21 and the other is disposed on the pad 22 so as to communicate with the pads 21 and 22 .
  • the technician usually sets the input current detection point A and the output current detection point B around the welding pin of one of the patch shunts, leads the input current detection point wiring at the input current detection point A, and leads the output at the output current detection point B Current detection point wiring 4, through the input current detection point wiring and output current detection point wiring 4, the voltage at both ends of the patch shunt can be detected, and technicians usually calculate the current flowing through the patch shunt according to the detected voltage, The total current is then obtained by multiplying this current by the total number of branches.
  • the error of the total current obtained in this way is relatively large, and it is difficult to meet the requirements of technicians for the measurement accuracy of the total current of the circuit.
  • An embodiment of the present application provides a current measurement circuit, including: a PCB substrate, N PCB pads arranged in parallel on the PCB substrate, and N patch shunts corresponding to the N PCB pads one-to-one device and N current sensing point wiring and measurement unit, wherein, N is an integer greater than 1, each of the PCB pads includes two separate first pads and second pads, and each of the patch shunts The first ends of each of the patch shunts are electrically connected to the corresponding first pads, the second ends of each of the chip shunts are electrically connected to the corresponding second pads, and each of the current detection point wiring includes The first current-sensing point wiring and the second current-sensing point wiring are drawn from each of the first welding pads and each of the first current-sensing point wirings is connected to the first end of the measurement unit, and each of the second welding pads is connected to the first end of the measurement unit.
  • Each of the second current-sensing point wirings leading out from the disk is connected to the second end of the measurement unit; the measurement unit is used to calculate and obtain all patch shunts based on the voltage or current collected through the wiring of each of the current-sensing points. The total current flowing through the device.
  • An embodiment of the present application also provides a circuit board assembly, including the above-mentioned current measurement circuit.
  • An embodiment of the present application also provides a current detection device, including the above-mentioned circuit board assembly.
  • FIG. 1 is a schematic structural diagram of a pseudo-four-wire PCB pad in which multiple pads are arranged in parallel in the related art
  • FIG. 2 is a schematic structural diagram of a pseudo-four-wire PCB pad with a single pad in the related art
  • Fig. 3 is an equivalent circuit diagram according to the collection and calculation of the total current in the related art
  • FIG. 4 is a schematic structural diagram of a current measurement circuit provided according to an embodiment of the present application.
  • FIG. 5 is a schematic block diagram of a measuring unit provided according to an embodiment of the present application.
  • Fig. 6 is a schematic circuit diagram of a first calculation module provided according to an embodiment of the present application.
  • Fig. 7 is an equivalent circuit diagram collected and calculated by the first calculation module according to an embodiment of the present application.
  • the current chip shunt usually adopts the pseudo four-wire PCB pad structure as shown in Figure 2.
  • the packaging method of the pseudo four-wire PCB pad is as follows: PCB pad 2 is provided on PCB
  • the pad 2 includes two separate pads 21 and 22, and the patch shunt is set on the PCB pad 2, specifically, one of the solder feet at both ends of the patch shunt is set on the pad 21, and the other is set on the pad 21.
  • the technician usually sets the input current detection point A and the output current detection point B on the PCB pad around the welding pin of the chip shunt, leads the wiring of the input current detection point at the input current detection point A, and connects the wiring at the output current detection point Point B leads to the output current-sensing point wiring 4, and the voltage at both ends of the patch shunt can be detected through the input current-sensing point wiring and the output current-sensing point wiring 4.
  • Chip shunts please refer to Figure 1. Specifically, multiple PCB pads 2 connected in parallel will be set, and then multiple chip shunts will be set on each PCB pad 2, and the chip shunts and PCB pads 2 will be connected one by one. Corresponding, so that each patch shunt meets the requirements of rated power. The patch shunts are connected in parallel through the PCB pads 2 to shunt the total input current.
  • the technician will detect the voltage at both ends of the patch shunt through the input current detection point wiring 3 and the output current detection point wiring 4, and then calculate the current flowing through the patch shunt according to the detected voltage, and then multiply the current by The total current is obtained by the total number of branches or the number of total patch shunts set.
  • the resistance values of the parallel patch shunts are R shunt 1 , R shunt 2 , ..., R shunt N .
  • Chip shunt so there is usually a layer of solder paste between the chip shunt and the current-carrying copper foil on PCB pad 2, the solder paste will produce the first contact resistance R C1 , this resistance is usually unavoidable, and at the same time, each PCB There will also be solder on the path between the pads 2, and the solder will generate a second contact resistance R C2 .
  • R C2 When the temperature changes, due to the influence of the second contact resistance R C2 , it will be difficult for each chip shunt to share current. Selecting a single detection point actually only represents the current of this branch. If the current is multiplied by the total number of branches to obtain the total current, it will inevitably lead to a large error in the measurement of the total current.
  • the present application proposes the following technical idea: the input current detection point wiring 3 and the output current detection point wiring 4 are respectively arranged around the welding feet of each chip shunt, so that the measurement unit passes through each input current detection point wiring 3 respectively. and output current-sensing point wiring 4 to collect sampling voltages V 1 , V 2 , ..., V N at both ends of each patch shunt (which may include the first contact resistance R C1 ), and V 1 , V 2 , ..., By adding V N , the collected voltage is no longer affected by the second contact resistance R C2 , and then the total current is calculated according to the collected voltage, which effectively solves the problem that the calculated There is a problem of large errors in the total current of the circuit, which effectively improves the measurement accuracy of the total current of the circuit.
  • the main purpose of the embodiments of the present application is to provide a current measurement circuit, a circuit board assembly and a current detection device, and provide a current detection circuit that can effectively improve the measurement accuracy of the circuit current.
  • the current measurement circuit collects the current flowing on one of the shunts of the patch shunts arranged in parallel, and then multiplies the branch current by the total number of branches to obtain the total current.
  • Both ends of each SMD shunt are equipped with current detection point wiring to collect the voltage or current of each SMD shunt respectively, and then calculate the total current according to the collected voltage or current, which effectively solves the problem of unsatisfactory current flow in each circuit. In the case of current sharing, there is a large error in the calculated total current, which effectively improves the measurement accuracy of the total circuit current.
  • An embodiment of the present application relates to a current measurement circuit, please refer to FIG. SMD shunts, N current-sensing point wiring, and a measurement unit (the measurement unit is not shown in the figure), wherein, N is an integer greater than 1.
  • Each PCB pad 2 includes two separate first pads 21 and second pads 22, the first end of each patch shunt is electrically connected to the corresponding first pad 21, each patch shunt The second end is electrically connected to the corresponding second pads 22, and each current-sensing point wiring includes a first current-sensing point wiring and a second current-sensing point wiring 4, and each first current-sensing point wiring is drawn from each first pad 21.
  • the point wires are connected to the first end of the measurement unit, and the second current-sensing point wires 4 drawn out from the second pads 22 are connected to the second end of the measurement unit.
  • the measurement unit will calculate the total current flowing through all patch shunts based on the voltage or current collected through the wiring of each current detection point.
  • each SMD shunt is equipped with current detection point wiring to collect the voltage or current of each SMD shunt respectively, and then calculate the total current according to the collected voltage or current, which effectively solves the problem of unsatisfactory current in each circuit. In the case of current sharing, there is a large error in the calculated total current, which effectively improves the measurement accuracy of the total circuit current.
  • N PCB pads 2 arranged in parallel on the PCB substrate only list the PCB pads 2 corresponding to the N patch shunts and N current-sensing point wiring one-to-one, and do not Restrictions In addition to this, no other PCB pads 2 are provided on the PCB substrate.
  • the measurement unit includes a first calculation module 51 and a second calculation module 52, the first input terminal of the first calculation module 51 is used as the first end of the measurement unit, and the first calculation module 51
  • the second input terminal serves as the second terminal of the measurement unit, and the output terminal of the first calculation module 51 is connected to the second calculation module 52 .
  • the second calculation module 52 calculates the total current flowing through all patch shunts according to the voltage output by the first calculation module 51 .
  • the first computing module 51 includes an operational amplifier 511, a bias power supply 512, a first voltage dividing resistor 513, a second voltage dividing resistor 514, a third voltage dividing resistor 515, a fourth voltage dividing resistor piezoresistor 516 , fifth voltage dividing resistor 517 and sixth voltage dividing resistor 518 .
  • connection relationship between any detection point wiring and the measurement unit is taken as an example for the following description, and the connection relationship between the other detection point wiring and the measurement unit is the same, and will not be repeated here.
  • connection relationship is as follows: the first end of the first voltage dividing resistor 513 is used as the first input end of the first calculation module 51, the second end of the first voltage dividing resistor 513 is connected to the non-inverting input end of the operational amplifier 511, and the second voltage dividing The first end of the resistor 514 is used as the second input end of the first calculation module 51, the second end of the second voltage dividing resistor 514 is connected to the inverting input end of the operational amplifier 511, and the bias power supply 512 passes through the third voltage dividing resistor 515 Connected to the non-inverting input end of the operational amplifier 511, the first end of the fourth voltage dividing resistor 516 is connected to the non-inverting input end of the operational amplifier 511, the second end of the fourth voltage dividing resistor 516 is grounded, and the fifth voltage dividing resistor 517 The first end One end is connected to the inverting input end of the operational amplifier 511, the second end of the fifth voltage dividing resistor 517 is grounded, and
  • the resistance values of the first voltage dividing resistor 513 and the second voltage dividing resistor 514 are both equal to R 1
  • the resistance values of the third voltage dividing resistor 515 and the fifth voltage dividing resistor 517 are both equal to R 2
  • the fourth voltage dividing resistor 515 is equal to R 2
  • the resistance values of the voltage dividing resistor 516 and the sixth voltage dividing resistor 518 are both equal to R 3 .
  • the received voltages are V 11 , V 21 , .
  • R C11 , R C21 , ..., R CN1 in the equivalent circuit diagram are the resistance values of the first contact resistances generated by the solder paste between each chip shunt and the corresponding current-carrying copper foil on the PCB pad 2
  • R C12 , R C22 , . . . , R CN2 are the resistance values of the second contact resistance generated by soldering on the paths between the PCB pads 2
  • the resistance values of the first contact resistance and the second contact resistance are usually different.
  • the resistance values of the first voltage dividing resistor and the second voltage dividing resistor are equal, the resistance values of the third voltage dividing resistor and the fifth voltage dividing resistor are equal, and the fourth voltage dividing resistor and the sixth voltage dividing resistor
  • the calculation formula of the voltage output by the first calculation module can be greatly simplified, the calculation amount of the first calculation module is reduced, and, because the first calculation module collects more accurately at the intermediate voltage, the application implements
  • a bias power supply is added to provide a bias voltage V C to improve the accuracy of acquisition and calculation of the first calculation module.
  • the second calculation module 52 is specifically configured to calculate the total current I O flowing through all patch shunts according to the following formula:
  • R 4 is the resistance value of each patch shunt.
  • a calculation formula for the second calculation module to specifically calculate the total current I0 is provided. Since the first contact resistance R C1 has little influence on the current sharing of the patch shunt, and this resistance is usually unavoidable, so When calculating the total current I O , the resistance value of the first contact resistance R C1 is ignored, to a certain extent, the calculation formula can be simplified, and the calculation amount of the second calculation module is reduced.
  • the first pad 21 and the second pad 22 are symmetrical about the preset line
  • the preset line is shown by a dotted line in the figure
  • the first current detection point A and the second current detection point B is symmetrical about the preset line
  • the first current-sensing point A is the point where the wiring of the first current-sensing point is drawn out
  • the second current-sensing point B is the point where the wiring 4 of the second current-sensing point is drawn out.
  • the first current-sensing point A and the second current-sensing point B are respectively set at intervals between the first pad 21 and the second pad 22 .
  • the symmetrical arrangement of the first pad and the second pad, as well as the first current detection point and the second current detection point is beneficial to realize impedance matching of the detection line.
  • An embodiment of the present application relates to a circuit board assembly, including the current measurement circuit in any one of the above embodiments.
  • An embodiment of the present application relates to a current detection device, including the circuit board assembly in the above embodiments.

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Abstract

一种电流测量电路、电路板组件和电流检测设备。测量电路包括:PCB基板(1)、并联设置于PCB基板(1)上的N个PCB焊盘(2)、与N个PCB焊盘(2)一一对应的N个贴片分流器和N条检流点布线以及测量单元,其中,N为大于1的整数,每个PCB焊盘(2)包括两个分离的第一焊盘(21)和第二焊盘(22),各贴片分流器的第一端电连接于对应的各第一焊盘(21),各贴片分流器的第二端电连接于对应的各第二焊盘(22),每个检流点布线包括第一检流点布线(3)和第二检流点布线(4),从各第一焊盘(21)引出各第一检流点布线(3)连接于测量单元的第一端,从各第二焊盘(22)引出各第二检流点布线(4)连接于测量单元的第二端。测量单元根据各检流点布线采集电压或电流,计算得到所有贴片分流器上流过的总电流。

Description

一种电流测量电路、电路板组件和电流检测设备
相关申请的交叉引用
本申请基于申请号为“202111146328.0”、申请日为2021年9月28日的中国专利申请提出,并要求该中国专利申请的优先权,该中国专利申请的全部内容在此以引入方式并入本申请。
技术领域
本申请涉及检测技术领域,尤其涉及一种电流测量电路、电路板组件和电流检测设备。
背景技术
在电力控制领域,通常需要检测电流大小并将其用于控制计算,若电流检测的准确性不高,则会影响控制计算的精度,进而影响产品性能,因此,技术人员对电路电流的测量精度提出了更高的要求。
请参考图1所示的伪四线制PCB(Printed Circuit Board、印制电路板)焊盘结构,该伪四线制PCB焊盘的封装方式为:在PCB基板1上并联设置有多个PCB焊盘2,各PCB焊盘2包括两个分开设置的焊盘21和焊盘22,可以将多个贴片分流器分别设置在各PCB焊盘2上,具体地,贴片分流器两端的焊脚,一个被设置在焊盘21上,另一个被设置在焊盘22上,以连通焊盘21和22。
技术人员通常会在其中一个贴片分流器的焊脚周围,设置输入检流点A和输出检流点B,在输入检流点A引出输入检流点布线,在输出检流点B引出输出检流点布线4,通过输入检流点布线和输出检流点布线4可以检测该贴片分流器两端的电压,技术人员通常会根据检测到的电压计算流过该贴片分流器的电流,再通过将该电流乘以总支路数得到总电流。但经过实际检测发现,这样得到的总电流的误差较大,难以满足技术人员对电路总电流的测量精度的要求。
发明内容
本申请的实施例提供了一种电流测量电路,包括:PCB基板、并联设置于所述PCB基板上的N个PCB焊盘、与N个所述PCB焊盘一一对应的N个贴片分流器和N条检流点布线以及测量单元,其中,N为大于1的整数,每个所述PCB焊盘包括两个分离的第一焊盘和第二焊盘,各所述贴片分流器的第一端电连接于对应的各所述第一焊盘,各所述贴片分流器的第二端电连接于对应的各所述第二焊盘,每个所述检流点布线包括第一检流点布线和第二检流点布线,从各所述第一焊盘引出各所述第一检流点布线连接于所述测量单元的第一端,从各所述第二焊盘引出各所述第二检流点布线连接于所述测量单元的第二端;所述测量单元用于根据通过各所述检流点布线采集到的电压或电流,计算得到所有贴片分流器上流过的总电流。
本申请实施例还提供了一种电路板组件,包括上述电流测量电路。
本申请实施例还提供了一种电流检测设备,包括上述电路板组件。
附图说明
图1是根据相关技术中并联设置多个焊盘的伪四线制PCB焊盘的结构示意图;
图2是根据相关技术中设置单个焊盘的伪四线制PCB焊盘的结构示意图;
图3是根据相关技术中采集并计算总电流的等效电路图;
图4是根据本申请一个实施例提供的电流测量电路的结构示意图;
图5是根据本申请一个实施例提供的测量单元的方框示意图;
图6是根据本申请一个实施例提供的第一计算模块的电路示意图;
图7是根据本申请一个实施例提供的第一计算模块采集并计算的等效电路图。
具体实施方式
为使本申请实施例的目的、技术方案和优点更加清楚,下面将结合附图对本申请的各实施例进行详细的阐述。然而,本领域的普通技术人员可以理解,在本申请各实施例中,为了使读者更好地理解本申请而提出了许多技术细节。但是,即使没有这些技术细节和基于以下各实施例的种种变化和修改,也可以实现本申请所要求保护的技术方案。以下各个实施例的划分是为了描述方便,不应对本申请的具体实现方式构成任何限定,各个实施例在不矛盾的前提下可以相互结合相互引用。
目前的贴片分流器通常采用如图2所示的伪四线制PCB焊盘结构,该伪四线制PCB焊盘的封装方式为:在PCB基板1上设置有PCB焊盘2,PCB焊盘2包括两个分开设置的焊盘21和焊盘22,贴片分流器设置在PCB焊盘2,具体地,贴片分流器两端的焊脚,一个被设置在焊盘21上,另一个被设置在焊盘22上,以连通焊盘21和22。
技术人员通常会在该贴片分流器的焊脚周围的PCB焊盘上,设置输入检流点A和输出检流点B,在输入检流点A引出输入检流点布线,在输出检流点B引出输出检流点布线4,通过输入检流点布线和输出检流点布线4可以检测该贴片分流器两端的电压。
但在很多场景下,仅在PCB基板1上设置单个贴片分流器,通常会导致单个贴片分流器的额定功率无法满足要求,因此,技术人员通常会在PCB基板1上并联设置多个贴片分流器,请参考图1,具体会设置并联的多个PCB焊盘2,再将多个贴片分流器分别设置在各PCB焊盘2上,贴片分流器与PCB焊盘2一一对应,以使得各贴片分流器满足额定功率的要求。各贴片分流器通过各PCB焊盘2并联连接了起来,以对输入的总电流进行分流。
技术人员会通过输入检流点布线3和输出检流点布线4检测该贴片分流器两端的电压,再根据检测到的电压计算流过该贴片分流器的电流,再通过将该电流乘以总支路数或者设置的总贴片分流器的数量得到总电流。
但经过实际检测发现,这样得到的总电流的误差较大,难以满足技术人员对电路电流的测量精度的要求。
此外,请参考图3的等效电路图,并联的各贴片分流器的阻值分别为R 分流器1,R 分流器2,……,R 分流器N,由于采用了贴片工艺来设置贴片分流器,故贴片分流器和PCB焊盘2上载流铜箔之间通常有一层锡膏,该锡膏会产生第一接触电阻R C1,该电阻通常是不可避免的,同时,各PCB焊盘2之间的通路上也会有焊锡,该焊锡会产生第二接触电阻R C2,当温度变化时,由于第二接触电阻R C2的影响,会导致各个贴片分流器难以均流,选择单一的检测点,其实只代表了这一条支路的电流,若以该电流乘以总支路数,得到总电流,则必然会导致总电流测 量存在较大误差。
本申请基于此,提出了以下技术构思:在各贴片分流器的焊脚周围分别设置输入检流点布线3和输出检流点布线4,以由测量单元分别通过各输入检流点布线3和输出检流点布线4,采集各贴片分流器(可包括第一接触电阻R C1)两端的采样电压V 1,V 2,……,V N,将V 1,V 2,……,V N通过进行相加,使采集的电压不再受第二接触电阻R C2的影响,再根据采集的电压计算得到总电流,有效解决了在各路电流未能均流的情况下,计算得到的总电流存在较大误差的问题,有效提升了电路总电流的测量精度。
本申请实施例的主要目的在于提供一种电流测量电路、电路板组件和电流检测设备,提供了一种可以有效提升电路电流的测量精度的电流检测电路。
本申请实施例提供的电流测量电路,采集并联设置的贴片分流器中的其中一个分流器上流过的电流,再用这个支路电流乘以总支路数以得到总电流,本申请实施例在各贴片分流器的两端均设置了检流点布线,以分别采集各贴片分流器的电压或电流,再根据采集到的电压或电流计算总电流,有效解决了在各路电流未能均流的情况下,计算得到的总电流存在较大误差的问题,有效提升了电路总电流的测量精度。
本申请的一个实施例涉及一种电流测量电路,请参考图4,包括PCB基板1、并联设置于PCB基板1上的N个PCB焊盘2、与N个PCB焊盘2一一对应的N个贴片分流器和N条检流点布线以及测量单元(测量单元在图中未示出),其中,N为大于1的整数。每个PCB焊盘2包括两个分离的第一焊盘21和第二焊盘22,各贴片分流器的第一端电连接于对应的各第一焊盘21,各贴片分流器的第二端电连接于对应的各第二焊盘22,每个检流点布线包括第一检流点布线和第二检流点布线4,从各第一焊盘21引出各第一检流点布线连接于测量单元的第一端,从各第二焊盘22引出各第二检流点布线4连接于测量单元的第二端。
测量单元会根据通过各检流点布线采集到的电压或电流,计算得到所有贴片分流器上流过的总电流。
本实施例中,相较于常用的采集并联设置的贴片分流器中的其中一个分流器上流过的电流,再用这个支路电流乘以总支路数以得到总电流,本申请实施例在各贴片分流器的两端均设置了检流点布线,以分别采集各贴片分流器的电压或电流,再根据采集到的电压或电流计算总电流,有效解决了在各路电流未能均流的情况下,计算得到的总电流存在较大误差的问题,有效提升了电路总电流的测量精度。
下面对本实施例的电流测量电路的实现细节进行具体的说明,以下内容仅为方便理解提供的实现细节,并非实施本方案的必须。
需要说明的是,并联设置于所述PCB基板上的N个PCB焊盘2,仅列出了与N个贴片分流器和N条检流点布线一一对应的PCB焊盘2,并不限制除此之外在PCB基板上再未设置其他PCB焊盘2。
在一个实施例中,请参考图5,测量单元包括第一计算模块51和第二计算模块52,第一计算模块51的第一输入端作为测量单元的第一端,第一计算模块51的第二输入端作为测量单元的第二端,第一计算模块51的输出端连接于第二计算模块52。
第二计算模块52会根据第一计算模块51输出的电压,计算得到所有贴片分流器上流过的总电流。
在一个实施例中,请参考图6,第一计算模块51包括运算放大器511、偏置电源512、 第一分压电阻513、第二分压电阻514、第三分压电阻515、第四分压电阻516、第五分压电阻517和第六分压电阻518。
以任一条检测点布线与测量单元之间的连接关系为例进行以下说明,其余检测点布线与测量单元之间的连接关系同理,在此不再赘述。
连接关系如下:第一分压电阻513的第一端作为第一计算模块51的第一输入端,第一分压电阻513的第二端连接于运算放大器511的同相输入端,第二分压电阻514的第一端作为第一计算模块51的第二输入端,第二分压电阻514的第二端连接于运算放大器511的反相输入端,偏置电源512通过第三分压电阻515连接于运算放大器511的同相输入端,第四分压电阻516的第一端连接于运算放大器511的同相输入端,第四分压电阻516的第二端接地,第五分压电阻517的第一端连接于运算放大器511的反相输入端,第五分压电阻517的第二端接地,运算放大器511的反相输入端通过第六分压电阻518连接于运算放大器511的输出端,运算放大器511的输出端作为第一计算模块51的输出端。
根据上述电路连接关系,利用运算放大器的“虚短”和“虚断”的特性,以及各电压、电流之间的关系,即可列出第一计算模块输出的电压V O的计算公式,在此不作赘述。
在一个实施例中,第一分压电阻513和第二分压电阻514的阻值均等于R 1,第三分压电阻515和第五分压电阻517的阻值均等于R 2,第四分压电阻516和第六分压电阻518的阻值均等于R 3,请参考图7所示的等效电路,偏置电源512输出的电压为V C,通过各第一检流点布线采集到的电压为V 11,V 21,…,V N1,通过各第二检流点布线4采集到的电压为V 12,V 22,…,V N2
此时,第一计算模块输出的电压
Figure PCTCN2022098773-appb-000001
其中,等效电路图中的R C11,R C21,…,R CN1为各贴片分流器分别和对应的PCB焊盘2上载流铜箔之间的锡膏产生的第一接触电阻的阻值,R C12,R C22,…,R CN2为各PCB焊盘2之间的通路上焊锡产生的第二接触电阻的阻值,第一接触电阻与第二接触电阻的阻值通常是不相同的。
在本实施例中,当第一分压电阻和第二分压电阻的阻值相等,第三分压电阻和第五分压电阻的阻值相等,第四分压电阻和第六分压电阻的阻值相等时,能够大大简化第一计算模块输出的电压的计算公式,减小了第一计算模块的计算量,并且,由于第一计算模块在中间电压处采集较为准确,故本申请实施例增加了偏置电源提供偏置电压V C,以提高第一计算模块采集及运算的准确性。
在一个实施例中,第二计算模块52具体用于根据如下公式,计算得到所有贴片分流器上流过的总电流I O
Figure PCTCN2022098773-appb-000002
其中,R 4为各贴片分流器的阻值。
在本实施例中,提供了第二计算模块具体计算总电流I O的计算公式,由于第一接触电阻R C1对贴片分流器均流影响不大,且该电阻通常是不可避免的,故在计算总电流I O时,忽略了第一接触电阻R C1的阻值大小,在一定程度上,可以简化计算公式,减小了第二计算模块的计算量。
在一个实施例中,请参考图4,第一焊盘21与第二焊盘22关于预设线条对称,图中以虚线示出预设线条,第一检流点A和第二检流点B关于预设线条对称,其中,第一检流点A为引出第一检流点布线的点,第二检流点B为引出第二检流点布线4的点。在一个实施例中,第一检流点A和第二检流点B分别设置在第一焊盘21与第二焊盘22的间隔位置。
在本实施例中,对称设置第一焊盘和第二焊盘,以及第一检流点和第二检流点,有利于实现检测线路的阻抗匹配。
本申请的一个实施例涉及一种电路板组件,包括上述任一实施例中的电流测量电路。
本申请的一个实施例涉及一种电流检测设备,包括上述实施例中的电路板组件。
本领域的普通技术人员可以理解,上述各实施方式是实现本申请的具体实施例,而在实际应用中,可以在形式上和细节上对其作各种改变,而不偏离本申请的精神和范围。

Claims (8)

  1. 一种电流测量电路,包括:PCB基板、并联设置于所述PCB基板上的N个PCB焊盘、与N个所述PCB焊盘一一对应的N个贴片分流器和N条检流点布线以及测量单元,其中,N为大于1的整数,每个所述PCB焊盘包括两个分离的第一焊盘和第二焊盘,各所述贴片分流器的第一端电连接于对应的各所述第一焊盘,各所述贴片分流器的第二端电连接于对应的各所述第二焊盘,每个所述检流点布线包括第一检流点布线和第二检流点布线,从各所述第一焊盘引出各所述第一检流点布线连接于所述测量单元的第一端,从各所述第二焊盘引出各所述第二检流点布线连接于所述测量单元的第二端;
    所述测量单元用于根据通过各所述检流点布线采集到的电压或电流,计算得到所有贴片分流器上流过的总电流。
  2. 根据权利要求1所述的电流测量电路,其中,所述测量单元包括第一计算模块和第二计算模块,所述第一计算模块的第一输入端作为所述测量单元的第一端,所述第一计算模块的第二输入端作为所述测量单元的第二端,所述第一计算模块的输出端连接于所述第二计算模块;
    所述第二计算模块用于根据所述第一计算模块输出的电压,计算得到所述总电流。
  3. 根据权利要求2所述的电流测量电路,其中,所述第一计算模块包括运算放大器、偏置电源、第一分压电阻、第二分压电阻、第三分压电阻、第四分压电阻、第五分压电阻和第六分压电阻;
    所述第一分压电阻的第一端作为所述第一计算模块的第一输入端,所述第一分压电阻的第二端连接于所述运算放大器的同相输入端,所述第二分压电阻的第一端作为所述第一计算模块的第二输入端,所述第二分压电阻的第二端连接于所述运算放大器的反相输入端,所述偏置电源通过所述第三分压电阻连接于所述同相输入端,所述第四分压电阻的第一端连接于所述同相输入端,所述第四分压电阻的第二端接地,所述第五分压电阻的第一端连接于所述反相输入端,所述第五分压电阻的第二端接地,所述反相输入端通过所述第六分压电阻连接于所述运算放大器的输出端,所述运算放大器的输出端作为所述第一计算模块的输出端。
  4. 根据权利要求3所述的电流测量电路,其中,所述第一分压电阻和所述第二分压电阻的阻值均等于R 1,所述第三分压电阻和所述第五分压电阻的阻值均等于R 2,所述第四分压电阻和所述第六分压电阻的阻值均等于R 3,所述偏置电源输出的电压为V C,通过各所述第一检流点布线采集到的电压为V 11,V 21,…,V N1,通过各所述第二检流点布线采集到的电压为V 12,V 22,…,V N2
    所述第一计算模块输出的电压
    Figure PCTCN2022098773-appb-100001
  5. 根据权利要求4所述的电流测量电路,其中,
    所述第二计算模块具体用于根据如下公式,计算得到所述总电流I O
    Figure PCTCN2022098773-appb-100002
    其中,所述R 4为各所述贴片分流器的阻值。
  6. 根据权利要求1至5中任一所述的电流测量电路,其中,所述第一焊盘与所述第二焊盘关于预设线条对称,第一检流点和第二检流点关于所述预设线条对称,其中,所述第一检流点为引出所述第一检流点布线的点,所述第二检流点为引出所述第二检流点布线的点。
  7. 一种电路板组件,包括如权利要求1至6中任一项所述的电流测量电路。
  8. 一种电流检测设备,包括如权利要求7所述的电路板组件。
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JPH10116710A (ja) * 1996-10-08 1998-05-06 Micron Denki Kk 電流検出用抵抗器
JP2009115745A (ja) * 2007-11-09 2009-05-28 Sanken Electric Co Ltd 電流検出回路及び電流検出回路検査方法
CN207851144U (zh) * 2018-01-25 2018-09-11 苏州汇川技术有限公司 电机电流采样系统
CN111337726A (zh) * 2020-04-10 2020-06-26 深圳市欣旺达电气技术有限公司 一种基于贴片分流器的电路结构和电流检测方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10116710A (ja) * 1996-10-08 1998-05-06 Micron Denki Kk 電流検出用抵抗器
JP2009115745A (ja) * 2007-11-09 2009-05-28 Sanken Electric Co Ltd 電流検出回路及び電流検出回路検査方法
CN207851144U (zh) * 2018-01-25 2018-09-11 苏州汇川技术有限公司 电机电流采样系统
CN111337726A (zh) * 2020-04-10 2020-06-26 深圳市欣旺达电气技术有限公司 一种基于贴片分流器的电路结构和电流检测方法

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