WO2023050664A1 - Phase change memory cell - Google Patents

Abstract

The present invention relates to the technical field of microelectronics. Specifically disclosed is a phase change memory cell. A dielectric layer is formed by means of growing an amorphous dielectric material capable of high electrothermal insulation and a crystalline-state dielectric material in an octahedral configuration in a stacked manner, wherein the crystalline-state dielectric material in an octahedral configuration has the same structure as a phase change material; and a crystal nucleus growth center is provided for the phase change material on an interface that is in contact with the phase change material, so as to induce accelerated crystallization of the phase change material. The crystalline-state dielectric material and the amorphous dielectric material capable of high electrothermal insulation are grown in a stacked manner, such that the problem of electric leakage caused by the excessively low resistance of the crystalline-state dielectric material can be prevented, thereby achieving a better insulation effect without losing the crystallization speed, and then better preventing electric leakage.

Description

A phase change memory cell 【Technical field】

The invention belongs to the field of microelectronics, and more specifically relates to a phase-change memory unit.

【Background technique】

Due to its relatively simple device structure, excellent storage performance such as high erasing and writing speed, low power consumption and radiation resistance, phase change memory is considered by the International Semiconductor Industry Association to be the most likely to replace the current flash memory in the future and become the mainstream product and the first memory product. devices that become commercial products. The basic principle is to use phase change materials to undergo reversible phase transitions between amorphous and polycrystalline states, and realize writing, erasing and reading of information by distinguishing the high resistance in the amorphous state and the low resistance in the polycrystalline state. write operation.

However, with the rapid development of flash memory technology, higher and higher requirements have been put forward for the speed of phase change memory. The crystal nucleus reduces the randomness of nucleation to increase the crystallization speed; on the other hand, the dielectric material in contact with the phase change material provides a crystal nucleus center for the phase change material at the contact interface, which also increases the crystallization speed to a certain extent.

In addition to improving the crystallization speed, the latter has other additional advantages. For example, the contact interface between the octahedral dielectric material and the phase-change material layer is inherent in the memory cell device without additional introduction. The impact of the process is minimized, and the design of the phase change memory unit does not optimize the modification of the phase change material, avoiding a series of other problems caused by the optimization of the phase change material. Therefore, it is of great significance to further improve the method for increasing the crystallization rate to increase the application value of the method.

【Content of invention】

Aiming at the defects and improvement needs of the prior art, the present invention provides a phase-change memory unit, the purpose of which is to increase the crystallization speed of the phase-change material while avoiding electric leakage.

In order to achieve the above object, according to one aspect of the present invention, a phase change memory unit is provided, at least one side of the dielectric material layer is in contact with the chalcogenide phase change material layer. On the one hand, the dielectric material is eight A crystalline dielectric material with a planar configuration. During the crystallization process of the chalcogenide phase change material, the dielectric material provides a crystal nucleus growth center for the crystallization of the chalcogenide phase change material at the interface where the two contact, and accelerates the The crystallization process of phase change materials; on the other hand, an amorphous dielectric material with electrical and thermal insulation is laminated on it to reduce leakage.

Further, the amorphous dielectric material is independently selected from any one or any combination of silicon oxide and silicon nitride.

Further, the crystalline dielectric material is independently selected from any one or any combination of titanium oxide, yttrium oxide, scandium oxide, and aluminum oxide.

Further, the chalcogenide phase change material plug column is any one or any combination of GeSbTe, GeTe, SbTe, BiTe, simple Sb and doped with S, N, O, Cu, Si, Cr, Y, Sc, A mixture of at least one element of Ti and Ni.

Further, including:

a substrate;

a lower electrode, the lower electrode is arranged on the substrate;

An electrothermal laminated dielectric material layer, including a dielectric induction layer and an electrothermal isolation layer, wherein the dielectric induction layer is a crystalline dielectric material with an octahedral configuration; the electrothermal isolation layer is an electrically insulating amorphous dielectric material; the electrothermal laminate dielectric The material layer is located on the substrate, and there are one or more small holes in the middle of the electrothermal laminated dielectric material layer, and the bottom of the small holes is the lower electrode;

A chalcogenide phase-change material plug column, the chalcogenide phase-change material plug column is located in the small hole wrapped by the electrothermal laminated dielectric material layer, and the bottom of the chalcogenide phase-change material plug column is formed on the top of the lower electrode;

An upper electrode, the upper electrode is located on the insulating dielectric material layer of the electrothermal stack, and the upper electrode is arranged on the top of the plug column of the chalcogenide phase change material.

Further, the electrothermal laminated dielectric material layer is composed of multiple layers of crystalline dielectric material layers and amorphous dielectric material layers alternately stacked.

Further, the layer thicknesses of each crystalline dielectric material layer and each amorphous dielectric material layer are greater than 10 nm.

Generally speaking, through the above technical solutions conceived by the present invention, the following beneficial effects can be obtained:

(1) The present invention provides a new type of phase change memory with laminated dielectric material layers, in which amorphous dielectric materials with high electrical and thermal insulation and crystalline dielectric materials in octahedral configuration grow alternately to obtain laminated dielectric material layers. The laminated dielectric material layer provided by the invention includes a dielectric induction layer and an electric thermal insulation layer, wherein the dielectric induction layer provides a crystal nucleus growth center for the phase change material at the interface through the octahedral crystalline dielectric material, to a certain extent Induced crystallization, and the laminated growth of amorphous dielectric materials with high electrical and thermal insulation can avoid the leakage problem caused by the low resistance of crystalline dielectric materials, so as to play a better insulating role without losing the crystallization speed. Better prevent leakage.

(2) The present invention proposes that the use of amorphous silicon oxide or aluminum oxide can increase the resistance of the overall dielectric material in the structure. The original dielectric material in the storage unit plays a protective role to prevent thermal crosstalk between units. In the present invention, the dielectric material is set in an octahedral configuration, which accelerates the phase without introducing a new material layer. Variable material crystallization rate. However, if the electrical and thermal insulation properties of the dielectric material are insufficient to meet the required high resistance, the operating voltage of the phase change material will be divided during operation to form a parallel channel, so the resistivity needs to be increased. The invention proposes to avoid the problem of electric leakage by adopting laminated dielectric materials and increasing the electric-thermal insulation property.

(3) The total thickness of the stacked dielectric material layer is controlled to be the same as that of the phase-change material plug column. The thickness of each layer of crystalline dielectric material layer and each layer of amorphous dielectric material layer is greater than 10nm, and more than 10nm can generally meet the requirements The accelerated crystallization properties and insulating properties of the two dielectric materials are mentioned respectively.

【Description of drawings】

FIG. 1 is a phase-change memory unit of a vertical pinhole nanostructure provided by an embodiment of the present invention;

FIG. 2 is a lateral nanostructured phase-change memory cell provided by an embodiment of the present invention;

Throughout the drawings, the same reference numerals are used to designate the same elements or structures, wherein:

100 is a silicon substrate, 101 is a bottom electrode/left electrode, 102 is a dielectric material with high electrical and thermal insulation properties, 103 is an octahedral configuration crystalline dielectric material, 104 is a plug of a phase change material, and 105 is an upper electrode /Right electrode.

【Detailed ways】

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other.

During the operation of the phase change memory, a large current operation will be generated during the electrical operation from the upper electrode to the lower electrode or from the left electrode to the right electrode. The present invention finds that the dielectric material used to increase the crystallization speed must be an octahedral crystal structure type, the resistivity of the dielectric material is small, which is not enough to play the role of electrical insulation, and a certain leakage phenomenon will occur during the operation of the phase change memory. Therefore the present invention proposes following improvement scheme.

Embodiment one

A phase-change memory unit, at least one side of the dielectric material layer is in contact with the chalcogenide phase-change material layer. On the one hand, the dielectric material is a crystalline dielectric material in an octahedral configuration. During the crystallization process of the phase change material, the dielectric material provides a crystal nucleus growth center for the crystallization of the chalcogenide phase change material at the interface between the two, and accelerates the crystallization process of the phase change material; An insulating, amorphous dielectric material used to reduce electrical leakage.

It should be noted that, if the cell structure of the phase change memory is a lateral nanostructure, then all the dielectric material layers that are in contact with the chalcogenide phase change material layer are two layers of dielectric material layers that are in contact with the chalcogenide phase change material layer on the left and right; or , the cell structure of the phase change memory is a vertical small hole structure, then all the dielectric material layers in contact with the chalcogenide phase change material layer are two layers of dielectric material layers in contact with the chalcogenide phase change material layer; or, The phase-change memory unit structure is a structure in which the dielectric material wraps the chalcogenide phase-change material, and all the dielectric material layers that are in contact with the chalcogenide phase-change material layer are the four sides that are in contact with the chalcogenide phase-change material layer. layer dielectric material layer. Figure 1 shows a vertical hole-type nanostructure; Figure 2 shows a lateral nanostructure.

This embodiment provides a new type of phase change memory with laminated dielectric material layers, in which amorphous dielectric materials with high electrical and thermal insulation and crystalline dielectric materials in octahedral configuration are alternately grown to obtain laminated dielectric material layers. The stacked dielectric material layer provided includes a dielectric induction layer and an electrical and thermal insulation layer, wherein the dielectric induction layer provides a crystal nucleus growth center for the phase change material at the interface through the octahedral crystalline dielectric material, and induces crystallization to a certain extent , while growing in layers with amorphous dielectric materials with high electrical and thermal insulation, it can avoid the leakage problem caused by the low resistance of crystalline dielectric materials, so as to play a better insulating role without losing the crystallization speed and thus better to prevent leakage. The existing stacked dielectric materials mainly use silicon oxide and silicon nitride to make the heat of the phase change material more concentrated so as to reduce the impact of power consumption.

Preferably, the present invention provides a novel phase-change memory structure with laminated dielectric material layers, including:

A substrate, specifically a semiconductor substrate;

The lower electrode, the lower electrode is arranged on the substrate; the lower electrode is deposited on the substrate, and the electrode material can be metal or nonmetal with good conductivity, such as titanium platinum nitride titanium nitride tantalum titanium tungsten alloy tungsten etc., the thickness of the lower electrode is 100-500nm;

An electrothermal laminated dielectric material layer, including a dielectric induction layer and an electrothermal isolation layer, wherein the dielectric induction layer is an octahedral crystalline dielectric material, which provides a crystal nucleus growth center for the phase change material at the contact interface with the phase change material, thereby inducing crystallization; the electrothermal isolation layer is a dielectric material with high resistivity, which can play a better insulating role and reduce leakage, wherein the electrothermal laminated dielectric material layer is located on the substrate, and the electrothermal laminated dielectric material layer There are one or more small holes in the middle, and the bottom of the small holes is the lower electrode;

A chalcogenide phase change material plug column, the chalcogenide phase change material is located in the small hole wrapped by the electrothermal laminated dielectric material layer, the bottom of the chalcogenide phase change material plug column is formed on the lower electrode top;

An upper electrode, the upper electrode is located on the insulating dielectric material layer of the electrothermal stack, and the upper electrode is arranged on the top of the plug column of the chalcogenide phase change material.

Wherein, the plane size of the electrothermal lamination dielectric material layer is smaller than that of the substrate, so that the lower electrode part is exposed.

In order to better illustrate the present invention, the following example is given now.

As shown in Figure 1, the present invention provides a novel phase-change memory with laminated dielectric material layers, including sequentially arranged:

A substrate 100, specifically a semiconductor substrate

The lower electrode 101 is deposited on the substrate 100. The electrode material can be metal or nonmetal with good conductivity, such as titanium, platinum, titanium nitride, tantalum nitride, titanium-tungsten alloy, tungsten, etc. The lower electrode The thickness of 101 is 100-500nm;

An electrothermal laminated dielectric material layer, which is formed by alternate growth of high electrical and thermal insulating amorphous dielectric material 102 and octahedral configuration crystalline dielectric material 103, the electrothermal laminated dielectric material is prepared on the substrate 100 of the lower electrode 101, high The electric-thermal insulating amorphous dielectric material 102 can be any one or any combination of silicon oxide, silicon nitride and their compounds, the thickness of the high electric-thermal insulating amorphous dielectric material 102 is 50-60nm, and the octahedral configuration crystalline dielectric material 103 can be It is any one or any combination of titanium oxide, yttrium oxide, scandium oxide, aluminum oxide and their compounds. The thickness of the octahedral configuration crystalline dielectric material 103 is 10-20nm, and the electrothermal stacked dielectric material layer is slightly smaller than the substrate 100 , so that a part of the lower electrode 101 can be exposed, and there are one or more small holes in the middle of the electrothermal laminated dielectric material layer, and the bottom of the small holes is the lower electrode 101;

A chalcogenide phase change material plug column 104, the chalcogenide phase change material plug column 104 is located in the small hole wrapped by the electrothermal laminated dielectric material layers 102 and 103, the bottom of the chalcogenide phase change material plug column 104 Formed on the top of the lower electrode 101, the plug column 104 of the chalcogenide phase change material has a thickness of 100-200nm, and the plug column 104 of the chalcogenide phase change material can be GeSbTe, GeTe, SbTe, BiTe, elemental Sb, and the like. Any one or any combination of compounds, and a mixture formed by doping at least one element of S, N, O, Cu, Si, Cr, Y, Sc, Ti, Ni;

An upper electrode 105, the upper electrode 105 is located on the top of the plug column 104 of the chalcogenide phase change material, the electrode material can be metal or nonmetal with good conductivity, such as titanium, platinum, titanium nitride, tantalum nitride , titanium-tungsten alloy, tungsten, etc., the thickness of the upper electrode 105 is 100-500nm.

The above-mentioned preparation method of the phase-change memory with laminated dielectric material layers comprises the following steps:

1) providing a semiconductor substrate,

2) using the upper surface of the substrate as the base surface, depositing a layer of lower electrode on the substrate by magnetron sputtering or electron beam evaporation;

3) Prepare an electrothermal laminated dielectric material, and obtain a laminated dielectric material by alternately growing an amorphous high-electrical-thermal insulating dielectric material and a crystalline octahedral configuration dielectric material;

4) Photolithography is performed on the electrothermal stack dielectric material, followed by etching, so that the bottom electrode is partially exposed and a small hole is formed;

5) Fill the small hole with a chalcogenide phase-change material plug column, and then make the filling more even through a polishing process; finally deposit a layer of upper electrode, and then peel off to complete the phase-change memory of the laminated dielectric material layer preparation.

The number of alternating layers of the stacked dielectric material layers of the present invention is not limited. In addition, the total thickness of the laminated dielectric material layer is controlled to be the same as that of the phase-change material plug column, and the thickness of each layer of crystalline dielectric material layer and each layer of amorphous dielectric material layer is greater than 10nm. The respective accelerating crystallization properties and insulating properties of the two mentioned dielectric materials are obtained empirically.

It is easy for those skilled in the art to understand that the above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention, All should be included within the protection scope of the present invention.

Claims (7)

1. A phase-change memory unit, characterized in that at least one side of the dielectric material layer is in contact with the chalcogenide phase-change material layer. On the one hand, the dielectric material is a crystalline dielectric material in an octahedral configuration. During the crystallization process of the chalcogenide phase change material, the dielectric material provides a crystal nucleus growth center for the crystallization of the chalcogenide phase change material at the interface between the two, and accelerates the crystallization process of the phase change material; on the other hand, it The upper layer is laminated with an electrically insulating amorphous dielectric material for reducing leakage.
2. The phase change memory cell according to claim 1, wherein the amorphous dielectric material is independently selected from any one or any combination of silicon oxide and silicon nitride.
3. The phase-change memory cell according to claim 1, wherein the crystalline dielectric material is independently selected from any one or any combination of titanium oxide, yttrium oxide, scandium oxide, and aluminum oxide.
4. A kind of phase-change memory cell as claimed in claim 1, is characterized in that, described chalcogenide phase-change material plug column is GeSbTe, GeTe, SbTe, BiTe, elemental Sb any one or any combination and mixes A mixture of at least one element among S, N, O, Cu, Si, Cr, Y, Sc, Ti, Ni.
5. A kind of phase-change memory cell as claimed in claim 1, is characterized in that, comprises:

   a substrate;

   a lower electrode, the lower electrode is arranged on the substrate;

   An electrothermal laminated dielectric material layer, including a dielectric induction layer and an electrothermal isolation layer, wherein the dielectric induction layer is a crystalline dielectric material with an octahedral configuration; the electrothermal isolation layer is an electrically insulating amorphous dielectric material; the electrothermal laminate dielectric The material layer is located on the substrate, and there are one or more small holes in the middle of the electrothermal laminated dielectric material layer, and the bottom of the small holes is the lower electrode;

   A chalcogenide phase-change material plug column, the chalcogenide phase-change material plug column is located in the small hole wrapped by the electrothermal laminated dielectric material layer, and the bottom of the chalcogenide phase-change material plug column is formed on the top of the lower electrode;

   An upper electrode, the upper electrode is located on the insulating dielectric material layer of the electrothermal stack, and the upper electrode is arranged on the top of the plug column of the chalcogenide phase change material.
6. The phase change memory unit according to claim 5, wherein the electrothermal laminated dielectric material layer is composed of multiple layers of crystalline dielectric material layers and amorphous dielectric material layers alternately stacked.
7. A phase change memory cell according to claims 1 to 6, characterized in that the thickness of each layer of crystalline dielectric material and each layer of amorphous dielectric material is greater than 10 nm.

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