WO2023046427A1 - Verfahren zur herstellung eines wachstumssubstrats, wachstumssubstrat, und verfahren zur herstellung einer vielzahl optoelektronischer halbleiterchips - Google Patents
Verfahren zur herstellung eines wachstumssubstrats, wachstumssubstrat, und verfahren zur herstellung einer vielzahl optoelektronischer halbleiterchips Download PDFInfo
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- WO2023046427A1 WO2023046427A1 PCT/EP2022/074082 EP2022074082W WO2023046427A1 WO 2023046427 A1 WO2023046427 A1 WO 2023046427A1 EP 2022074082 W EP2022074082 W EP 2022074082W WO 2023046427 A1 WO2023046427 A1 WO 2023046427A1
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- substrate
- surface layer
- growth substrate
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- growth
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- 239000000758 substrate Substances 0.000 title claims abstract description 243
- 239000004065 semiconductor Substances 0.000 title claims abstract description 144
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 51
- 230000005693 optoelectronics Effects 0.000 title claims abstract description 42
- 239000002344 surface layer Substances 0.000 claims abstract description 128
- 239000010410 layer Substances 0.000 claims abstract description 121
- 238000000137 annealing Methods 0.000 claims abstract description 30
- 239000000463 material Substances 0.000 claims abstract description 29
- -1 nitride compound Chemical class 0.000 claims abstract description 21
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 33
- 229910002601 GaN Inorganic materials 0.000 claims description 20
- 230000005670 electromagnetic radiation Effects 0.000 claims description 13
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims description 11
- 238000004544 sputter deposition Methods 0.000 claims description 11
- 229910052738 indium Inorganic materials 0.000 claims description 10
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 9
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 9
- 238000000231 atomic layer deposition Methods 0.000 claims description 8
- 238000005229 chemical vapour deposition Methods 0.000 claims description 7
- 229910052733 gallium Inorganic materials 0.000 claims description 5
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 4
- 238000007517 polishing process Methods 0.000 claims description 4
- 238000000926 separation method Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 description 42
- 239000013078 crystal Substances 0.000 description 26
- 229910052594 sapphire Inorganic materials 0.000 description 19
- 239000010980 sapphire Substances 0.000 description 19
- 239000012071 phase Substances 0.000 description 11
- 230000003595 spectral effect Effects 0.000 description 10
- 238000001816 cooling Methods 0.000 description 7
- 230000007547 defect Effects 0.000 description 5
- 238000000407 epitaxy Methods 0.000 description 5
- 238000005245 sintering Methods 0.000 description 5
- 238000005530 etching Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 239000000843 powder Substances 0.000 description 4
- 230000035882 stress Effects 0.000 description 4
- 238000005496 tempering Methods 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 238000000927 vapour-phase epitaxy Methods 0.000 description 2
- 238000003631 wet chemical etching Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 230000001154 acute effect Effects 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000004943 liquid phase epitaxy Methods 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229910052706 scandium Inorganic materials 0.000 description 1
- SIXSYDAISGFNSX-UHFFFAOYSA-N scandium atom Chemical compound [Sc] SIXSYDAISGFNSX-UHFFFAOYSA-N 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02428—Structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
Definitions
- a method for producing a growth substrate, a growth substrate and a method for producing a large number of optoelectronic semiconductor chips are specified.
- At least one object of certain embodiments is to specify a method for producing a growth substrate, a growth substrate and a method for producing a large number of optoelectronic semiconductor chips which have improved thermal stress behavior.
- a polycrystalline substrate is first provided.
- the polycrystalline substrate comprises a large number of small individual crystals.
- the polycrystalline substrate is not a monocrystalline substrate.
- the polycrystalline substrate is produced by ceramic processes, in particular by sintering a powder of small individual crystals. A powder of small individual crystals is heated under increased pressure and formed into the shape of the polycrystalline substrate, with the individual crystals melting on the surface and growing together. This creates a solidified polycrystalline substrate, which preferably has a diameter of at least 150 millimeters.
- the polycrystalline substrate can in particular have cavities between the small individual crystals that have grown together.
- the polycrystalline substrate has a nitride compound semiconductor material.
- Nitride compound semiconductor materials are compound semiconductor materials that contain nitrogen, such as the materials from the In x Al y Ga xy N system with 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1 and x+y ⁇ 1.
- This material does not necessarily have to have a mathematically exact composition according to the above formula. Rather, it can have, for example, one or more dopants and additional components.
- the above formula contains only the essential components of the crystal lattice (Al, Ga, In, N), even if these are partially replaced by small
- Amounts of other substances, such as boron or scandium, can be replaced and/or supplemented.
- the polycrystalline substrate comprises aluminum nitride or preferably consists of aluminum nitride.
- At least one surface layer is applied to a main surface of the polycrystalline substrate.
- the main area of the polycrystalline substrate designates an area which is provided for the epitaxial growth of an epitaxial semiconductor layer sequence.
- the at least one surface layer has a nitride compound semiconductor material. A surface of the at least one surface layer facing away from the main surface of the polycrystalline substrate set up in particular for the epitaxial growth of an epitaxial semiconductor layer sequence.
- the surface layer comprises the same nitride compound semiconductor material as the polycrystalline substrate.
- the surface layer is applied directly to the main surface of the polycrystalline substrate, in particular by sputtering, chemical vapor deposition or atomic layer deposition.
- the surface layer has, for example, a polycrystalline structure of microcrystallites and is designed in particular to even out unevenness in the main surface of the polycrystalline substrate. These unevennesses arise, for example, as a result of cavities between the individual crystals of the polycrystalline substrate that have been melted together by sintering.
- a smooth surface of the surface layer is advantageous in order to epitaxially grow a low-defect, epitaxial semiconductor layer sequence thereon.
- the surface layer has a thickness of between 10 nanometers and five micrometers, for example.
- the surface layer preferably has a thickness of between 20 nanometers and 500 nanometers.
- a thickness refers here and in the following to an extension of the surface layer in a direction parallel to the surface normal of the main surface of the polycrystalline substrate.
- the polycrystalline substrate with the at least one surface layer applied thereto is subjected to high-temperature annealing.
- high-temperature annealing the surface layer is annealed or annealed together with the polycrystalline substrate at a sufficiently high temperature for a longer period of time.
- the temperature during annealing or baking is between 700° Celsius and 1800° Celsius inclusive.
- the annealing or heating can take place, for example, over a period of between one hour and 24 hours inclusive.
- the microcrystallites in the surface layer are realigned, with, for example, a tilt and twist of the microcrystallites relative to one another being reduced.
- microcrystallites can grow together to form a homogeneous, low-defect monocrystalline surface layer.
- a monocrystalline surface layer produced by high-temperature annealing is particularly advantageously suitable for the epitaxial growth of a low-defect epitaxial semiconductor layer sequence.
- a further surface layer for example a buffer layer, can be deposited on the surface layer after the high-temperature annealing in order to obtain a homogeneous, monocrystalline surface with a smooth surface morphology and a reduced defect density.
- the buffer layer can, for example, by chemical vapor deposition or by other epitaxial growth methods on the high temperature tempered surface layer are applied.
- the high-temperature tempering comprises a heating-up phase, a heating-out phase and a cooling-down phase.
- the temperature of the polycrystalline substrate with the at least one surface layer applied thereto is increased until a heating temperature is reached.
- the baking temperature is, for example, between 700° C. and 1800° C. inclusive. In particular, the baking temperature is lower than a melting temperature of the polycrystalline substrate and/or the at least one surface layer.
- the polycrystalline substrate with the at least one surface layer applied thereto is annealed at the annealing temperature over a longer period of time.
- the period of time for the bake-out phase is between one hour and 24 hours inclusive.
- the baking temperature is preferably kept constant. The bakeout temperature can also be changed as a function of time during the bakeout phase.
- the polycrystalline substrate with the at least one surface layer applied thereto is cooled to room temperature, for example.
- a period of time for the cooling phase and a temperature profile over time during the cooling phase are selected in particular in such a way that the at least one surface layer has the lowest possible defect density.
- the pamphlet H Miyake et al. , Journal of Crystal Growth 456 (2016) 155-159, describes a high temperature anneal in a different context and is hereby incorporated by reference.
- the method for producing a growth substrate has the following steps:
- the at least one surface layer is set up for the epitaxial growth of an epitaxial semiconductor layer sequence
- Optoelectronic semiconductor layer sequences based on aluminum gallium nitride which are designed to emit electromagnetic radiation in the UV spectral range with wavelengths between 100 nanometers and 360 nanometers, are grown epitaxially, for example, on monocrystalline sapphire substrates. Due to different thermal expansion coefficients of, for example, aluminum (gallium) nitride and the sapphire substrate, significant mechanical stresses can arise during cooling after the epitaxial growth process, which in particular lead to a strong curvature of the sapphire substrate. This curvature can be so large that a subsequent processing of the epitaxial semiconductor layer sequence optoelectronic semiconductor chips is made more difficult or even prevented.
- a consistently sharp exposure of a photomask on the epitaxial semiconductor layer sequence may not be possible due to the curvature of the sapphire substrate.
- cracks can occur in the epitaxial semiconductor layer sequence.
- growth substrates that include other materials, such as silicon carbide growth substrates. The following discussion is limited to sapphire substrates for simplicity, but applies to other growth substrates as well.
- Another problem is represented by lateral thermal gradients in the sapphire substrate. These gradients arise due to the curvature of the sapphire substrate at the high production temperatures of, for example, approximately 1000° Celsius for the epitaxial growth of aluminum gallium nitride. For example, the thermal gradients can lead to fracture of the sapphire substrate. This problem is particularly acute with sapphire substrates that are at least 4 inches in diameter. To prevent the sapphire substrate from breaking, a thicker sapphire substrate can be used, for example. However, this can be associated with an additional, increased effort in the processing of the optoelectronic semiconductor chips, for example when the sapphire substrate is mechanically detached.
- One idea of the method described here for producing a growth substrate is to provide an adapted growth substrate for the epitaxy of nitride compound semiconductor materials based on an inexpensive polycrystalline substrate.
- the thermal expansion coefficient of the growth substrate is adapted to a thermal expansion coefficient of the optoelectronic semiconductor layer sequence.
- a structure of the crystal lattice of the growth substrate can also be adapted to a structure of the crystal lattice of the epitaxial semiconductor layer sequence.
- low-defect optoelectronic semiconductor layer sequences made from nitride compound semiconductor materials, in particular from aluminum gallium nitride or from indium gallium nitride, can be grown epitaxially on inexpensive growth substrates with diameters of at least 150 millimeters.
- monocrystalline growth substrates made of aluminum nitride are very expensive and not commercially available with diameters of at least 150 millimeters.
- Polycrystalline substrates based on aluminum nitride or silicon carbide produced by means of ceramic processes are not suitable for direct epitaxial growth of epitaxial semiconductor layer sequences due to their polycrystalline structure and the associated irregular surface morphology.
- the method for producing a growth substrate described here is based, inter alia, on the knowledge that inexpensive polycrystalline substrates with a high-temperature tempered surface layer applied thereto are suitable as growth substrates for the epitaxy of optoelectronic semiconductor layer sequences.
- high-temperature annealing in particular a low-defect, monocrystalline surface layer can be produced on the polycrystalline substrate, on which a low-defect semiconductor layer sequence can subsequently be grown epitaxially.
- optoelectronic semiconductor layer sequences in particular which include aluminum gallium nitride, can be grown epitaxially in a cost-effective manner on large growth substrates with diameters of at least 150 millimeters.
- no additional measures are required in the epitaxy and in the chip processing to reduce the curvature of the growth substrate.
- the polycrystalline substrate has aluminum nitride and the at least one surface layer has aluminum nitride or indium gallium nitride.
- the at least one surface layer is applied by sputtering or atomic layer deposition.
- a surface layer applied to the polycrystalline substrate either by sputtering or by atomic layer deposition can result in a higher crystal quality of the surface layer after high-temperature annealing.
- a further surface layer is applied by metal-organic chemical vapor deposition (MOCVD) or by sputtering before the high-temperature annealing.
- MOCVD metal-organic chemical vapor deposition
- a further surface layer can be applied to the first surface layer before the high-temperature annealing.
- a further surface layer can be applied to a sputtered surface layer by means of metal-organic chemical vapor deposition.
- another surface layer can be applied by sputtering.
- the further surface layer leads, for example, to an improved reorientation of the microcrystallites in the at least one surface layer applied beforehand.
- the at least one surface layer is smoothed by a chemical-mechanical polishing method after the high-temperature tempering.
- a particularly smooth surface of the growth substrate is advantageous for the epitaxial growth of the epitaxial semiconductor layer sequence on the growth substrate. Unevenness in the surface of the growth substrate, which may be present after the high-temperature annealing, is ground off, for example, by a polishing process.
- a buffer layer is epitaxially grown onto the surface layer after the high-temperature annealing.
- the buffer layer preferably comprises the same semiconductor material as the epitaxial semiconductor layer sequence, which is subsequently grown epitaxially on the growth substrate.
- the buffer layer is, for example, by chemical vapor deposition, preferably by organometallic Vapor phase epitaxy (MOVPE) applied.
- MOVPE organometallic Vapor phase epitaxy
- the buffer layer is set up to obtain a closed, homogeneous, monocrystalline surface of the growth substrate with a smooth surface morphology and reduced defect density.
- the buffer layer can be set up to adapt the structure of the crystal lattice of the growth substrate to the structure of the crystal lattice of the epitaxial semiconductor layer sequence.
- the buffer layer is particularly advantageously applied to a sputtered surface layer which, after high-temperature annealing, has columnar crystallites of high crystal quality.
- the buffer layer has aluminum nitride or indium gallium nitride.
- a growth substrate is also specified. All features disclosed for the method for producing a growth substrate are also disclosed for the growth substrate. Conversely, all the features disclosed for the growth substrate are also disclosed for the method for producing a growth substrate.
- the growth substrate comprises a polycrystalline substrate comprising a nitride compound semiconductor material and having a main surface.
- the polycrystalline substrate is produced in particular by a ceramic method, for example by sintering a powder of small individual crystals.
- the polycrystalline substrate has a diameter of at least 150 mm on . If the coefficients of thermal expansion of the growth substrate and the epitaxial semiconductor layer sequence to be grown on it are adapted, a thickness of the polycrystalline substrate of at most 1000 micrometers is sufficient.
- the polycrystalline substrate comprises aluminum nitride or consists of aluminum nitride.
- the main surface of the polycrystalline substrate can have a rough surface morphology, which is caused, for example, by small cavities between the small single crystals grown together by sintering.
- the growth substrate has a surface layer.
- the surface layer comprises a nitride compound semiconductor material and is arranged on the main surface of the polycrystalline substrate.
- the surface layer is set up for the epitaxial growth of an epitaxial semiconductor layer sequence.
- the surface layer has a smooth surface morphology and is preferably formed as a homogeneous, low-defect, monocrystalline layer.
- a smooth, monocrystalline surface of the surface layer is advantageously suitable for growing a low-defect, epitaxial semiconductor layer sequence thereon.
- the surface layer can comprise columnar crystallites of high crystal quality, onto which a further buffer layer is applied, which for example comprises the same semiconductor material as the surface layer.
- the buffer layer forms a closed, homogeneous layer with a smooth surface morphology and is formed, for example, with an epitaxial growth process applied to the surface layer.
- the thickness of the surface layer is, for example, between 10 nanometers and five micrometers inclusive.
- the growth substrate comprises:
- Compound semiconductor material comprises and has a main surface
- At least one surface layer which comprises a nitride compound semiconductor material and is arranged on the main surface of the polycrystalline substrate, the surface layer being set up for the epitaxial growth of an epitaxial semiconductor layer sequence.
- the polycrystalline substrate comprises aluminum nitride.
- Epitaxial semiconductor layer sequences that are designed to generate electromagnetic radiation in the UV spectral range with wavelengths between 100 nanometers and 360 nanometers include, in particular, aluminum gallium nitride.
- a growth substrate with an adapted thermal expansion coefficient is particularly advantageous for the epitaxial growth of such semiconductor layer sequences.
- the epitaxial growth process can thus be carried out inexpensively on larger growth substrates.
- Aluminum nitride is particularly suitable for the epitaxial growth of semiconductor layer sequences that have aluminum gallium nitride.
- the growth substrate described here based on a polycrystalline substrate can be produced particularly inexpensively and easily with diameters of at least 150 mm.
- the at least one surface layer comprises aluminum nitride or indium gallium nitride.
- a surface layer that includes aluminum nitride is particularly suitable for the epitaxial growth of an epitaxial semiconductor layer sequence that has aluminum gallium nitride and is set up to emit electromagnetic radiation in the UV spectral range.
- a surface layer that has indium gallium nitride is preferably suitable for the epitaxial growth of an epitaxial semiconductor layer sequence that includes indium gallium nitride and is set up, for example, to generate electromagnetic radiation in the near UV to blue spectral range.
- the at least one surface layer has a thickness of between 10 nanometers and 5 micrometers inclusive.
- the surface layer has a thickness such that unevenness in the main surface of the polycrystalline substrate, which is formed, for example, by cavities between the individual crystals of the polycrystalline substrate, is at least compensated for or covered by the surface layer.
- the polycrystalline substrate has a diameter of at least 100 millimeters and a maximum thickness of 1000 micrometers.
- polycrystalline substrates which include aluminum nitride or consist of aluminum nitride, can be produced easily and inexpensively with a diameter of at least 100 millimeters.
- thermal expansion coefficient of the growth substrate By adapting the thermal expansion coefficient of the growth substrate to the thermal expansion coefficient of the epitaxial semiconductor layer sequence to be grown thereon, thermal strain problems after the epitaxial growth of the epitaxial semiconductor layer sequence are reduced or avoided. As a result, a curvature of the growth substrate due to cooling after the epitaxial growth process is reduced or avoided.
- a growth substrate with a smaller thickness can thus be used.
- the polycrystalline substrate has a maximum thickness of 1000 micrometers. A method for producing a large number of optoelectronic semiconductor chips is also specified.
- All of the features disclosed for the growth substrate are also disclosed for the method for producing a large number of optoelectronic semiconductor chips. Conversely, all of the features disclosed for the method for producing a large number of optoelectronic semiconductor chips are also disclosed for the growth substrate.
- a growth substrate is first provided, the growth substrate comprising a polycrystalline substrate and at least one surface layer applied thereto.
- the growth substrate has features of the growth substrate described above.
- an epitaxial semiconductor layer sequence with an active layer for generating electromagnetic radiation is grown epitaxially on the growth substrate.
- the epitaxial semiconductor layer sequence comprises in particular a nitride compound semiconductor material.
- the growth substrate preferably has the same nitride compound semiconductor material as the epitaxial semiconductor layer sequence. This ensures that the thermal expansion coefficients are adjusted.
- the surface layer of the growth substrate preferably has the same semiconductor material as the epitaxial semiconductor layer sequence.
- the active layer comprises, for example, at least one p-doped semiconductor region and at least one n-doped semiconductor region, which form a light-emitting diode.
- connection contacts for a large number of optoelectronic semiconductor chips are applied to the epitaxial semiconductor layer sequence.
- connection contacts comprises at least the application of an electrically conductive layer and, for example, photolithographic methods and etching methods for structuring the connection contacts.
- further method steps for structuring the individual semiconductor chips and for making electrical contact with the active layer can take place.
- a carrier substrate is applied to the connection contacts.
- the carrier substrate is set up in particular for making electrical contact with the optoelectronic semiconductor chips.
- the growth substrate is detached from the epitaxial semiconductor layer sequence.
- Detaching the growth substrate from the epitaxial semiconductor layer sequence is advantageous, particularly when producing optoelectronic semiconductor chips which are set up to generate electromagnetic radiation in the UV spectral range, since many growth substrates are not transparent to electromagnetic radiation generated during operation in the UV spectral range.
- polycrystalline aluminum nitride can contain impurities, as a result of which the polycrystalline substrate is opaque to UV light.
- the growth substrate can be detached, for example, by wet-chemical etching methods, dry-chemical etching methods or mechanical polishing methods.
- the growth substrate can also be detached by a laser lifting process or by a chemical lifting process, as a result of which the growth substrate is not destroyed and can be reused if necessary.
- the optoelectronic semiconductor chips are singulated.
- the singulation takes place, for example, by sawing or by a directed plasma etching method for severing the epitaxial semiconductor layer sequence and/or the carrier substrate.
- the method for producing a large number of optoelectronic semiconductor chips comprises the following steps:
- the growth substrate is detached down to the at least one surface layer of the growth substrate, the surface layer remaining at least partially on the epitaxial semiconductor layer sequence.
- a surface layer comprising aluminum nitride may have fewer impurities than, for example, a polycrystalline substrate comprising aluminum nitride.
- the surface layer in contrast to the polycrystalline substrate, the surface layer can be transparent to electromagnetic radiation in the UV spectral range. For this reason, the surface layer can remain at least partially on the epitaxial semiconductor layer sequence. Complete detachment of the growth substrate including the surface layer is therefore not necessary. This can, for example, damage the epitaxial Semiconductor layer sequence can be avoided when detaching the growth substrate.
- the epitaxial semiconductor layer sequence comprises an etch stop layer, the etch stop layer having aluminum gallium nitride.
- a gallium content of the etch stop layer is at least 5%, preferably at least 40%, and the growth substrate is detached up to the etch stop layer.
- the etch stop layer is set up, for example, in order to be able to precisely stop an etching process for removing the growth substrate. In particular, this enables the growth substrate to be completely detached without damaging the epitaxial semiconductor layer sequence.
- the gallium content in the etch stop layer can be detected, for example, during a chemical-mechanical polishing process, which makes it possible to stop the etching process precisely at the etch stop layer.
- the etch stop layer can be set up to remove the growth substrate by a laser lift-off method, with the etch stop layer being decomposed by the action of light.
- FIGS. 1A to 1H show schematic representations of different steps in a method for producing a large number of optoelectronic semiconductor chips in accordance with various exemplary embodiments.
- FIGS. 2A to 2C show schematic representations of a growth substrate after different steps of a method for producing a growth substrate according to different exemplary embodiments.
- FIGS. 3A to 3C show schematic representations of a growth substrate after different steps of a method for producing a growth substrate according to further exemplary embodiments.
- FIG. 1A shows a polycrystalline substrate 1 which has a main area 11 and is provided in a first method step.
- the polycrystalline substrate 1 comprises aluminum nitride and is produced by sintering a powder of small single crystals comprising aluminum nitride.
- the polycrystalline substrate 1 has a diameter of at least 150 millimeters and a thickness of up to 1000 micrometers.
- FIG. 1B shows a schematic sectional representation of the growth substrate 3 after a further method step, a surface layer 2 being applied to the main surface 11 of the polycrystalline substrate 1 .
- the surface layer 2 comprises aluminum nitride and is applied to the main surface 11 of the polycrystalline substrate 1 by sputtering, atomic layer deposition, physical vapor deposition, or electron beam epitaxy.
- a thickness of the surface layer 2 is between 20 nanometers and 500 nanometers inclusive. In particular, the surface layer 2 is thick enough to compensate for unevenness in the main surface 11 of the polycrystalline substrate 1 .
- FIG. 1C shows a schematic sectional representation of the growth substrate 3 after the high-temperature annealing of the polycrystalline substrate 1 and the surface layer 2 applied thereto.
- the polycrystalline substrate 1 with the surface layer 2 applied thereto is baked out at a temperature between 700° C. and 1800° C. for a period of between 1 hour and 24 hours.
- microcrystallites in the surface layer 2 are realigned and reorganized into a monocrystalline layer. This results in a homogeneous monocrystalline surface layer 2 with relatively few defects, which is particularly suitable for the epitaxial growth of an epitaxial semiconductor layer sequence 4 .
- FIG. ID shows a schematic sectional representation of the polycrystalline substrate 1 , the surface layer 2 and the epitaxial semiconductor layer sequence 4 .
- an epitaxial semiconductor layer sequence 4 grown epitaxially on the surface of the surface layer 2 .
- the epitaxial semiconductor layer sequence 4 comprises aluminum gallium nitride and has an active layer 41 for generating electromagnetic radiation in the UV spectral range.
- the active layer 41 includes an n-doped semiconductor region and a p-doped semiconductor region, which form a light-emitting diode.
- FIG. 1E shows a schematic sectional illustration after a further method step, the epitaxial semiconductor layer sequence 4 being structured to form individual optoelectronic semiconductor chips and electrical connection contacts 5 being applied.
- the structuring of the semiconductor layer sequence 4 and the application of the electrical connection contacts 5 takes place by photolithographic methods and etching of the epitaxial semiconductor layer sequence.
- FIG. 1F shows a schematic sectional illustration after a further method step, the polycrystalline substrate 1 with the surface layer 2 applied thereto and the epitaxial semiconductor layer sequence 4 being transferred onto a carrier substrate 6 .
- the carrier substrate 6 is set up in particular for making electrical contact with the optoelectronic semiconductor chips.
- FIG. 1G shows a schematic sectional illustration after a further method step, with the polycrystalline substrate 1 being detached.
- the polycrystalline substrate 1 is detached from the semiconductor layer sequence 4 in such a way that the surface layer 2 remains at least partially on the epitaxial semiconductor layer sequence 4 .
- a Detaching the polycrystalline substrate 1 is advantageous since polycrystalline aluminum nitride cannot be transparent to electromagnetic radiation in the UV spectral range with wavelengths between 100 nanometers and 360 nanometers due to impurities present therein.
- the surface layer 2 has only minor impurities and is at least largely transparent to electromagnetic radiation in the UV spectral range.
- the polycrystalline substrate 1 is detached in particular by a chemical-mechanical polishing process.
- the polycrystalline substrate 1 can be removed by a dry-chemical or wet-chemical etching process.
- the epitaxial semiconductor layer sequence 4 is not damaged by the detachment process.
- FIG. 1H shows a schematic sectional illustration of a large number of optoelectronic semiconductor chips after a dicing step, the carrier substrate 6 being severed in order to singulate the optoelectronic semiconductor chips.
- FIGS. 2A to 20 show schematic sectional views of a growth substrate 3 after different process steps according to different exemplary embodiments.
- FIG. 2A shows a polycrystalline substrate 1 which comprises aluminum nitride and has a main surface 11 .
- a surface layer 2 applied by sputtering.
- FIG. 2B shows a schematic sectional view of growth substrate 3 after high-temperature annealing of polycrystalline substrate 1 with surface layer 2 applied thereto.
- a smooth, homogeneous monocrystalline surface layer 2 is not formed here after the high-temperature tempering due to different process parameters, but columnar crystallites of high crystal quality are formed by three-dimensional crystal growth.
- FIG. 2C shows a schematic sectional representation of the growth substrate 3, a buffer layer 7 being applied to the surface layer 2 after the high-temperature annealing.
- the buffer layer 7 comprises aluminum nitride and is deposited on the surface layer 2 by an epitaxial growth method, for example by metal-organic vapor phase epitaxy.
- the buffer layer 7 is a homogeneous, low-defect monocrystalline layer which is suitable for the epitaxial growth of a low-defect epitaxial semiconductor layer sequence.
- FIGS. 3A to 3C show schematic sectional views of a growth substrate 3 after various method steps according to further exemplary embodiments.
- FIG. 3A shows a growth substrate 3 which has a polycrystalline substrate 1 with a main surface 11 .
- a first surface layer 2 by sputtering or by Atomic layer deposition applied.
- the polycrystalline substrate 1 and the first surface layer 2 comprise aluminum nitride.
- FIG. 3B shows the growth substrate 3 after a further method step, in which a further surface layer 8 is applied to the first surface layer 2 .
- the further surface layer 8 is deposited on the first surface layer 2 by metal-organic chemical vapor deposition.
- the further surface layer 8 is deposited on the first surface layer 2 by sputtering.
- the further surface layer 8 is set up as an orientation layer and in particular improves alignment of the microcrystallites in the first surface layer 2 during a subsequent method step in which the growth substrate 3 is heat-treated at high temperatures.
- FIG. 30 shows a sectional illustration of the growth substrate 3 after the high-temperature tempering process step.
- a homogeneous, smooth, monocrystalline surface 81 of the further surface layer 8 forms, which is set up for the epitaxial growth of an epitaxial semiconductor layer sequence 4 with few defects.
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DE112022003219.7T DE112022003219A5 (de) | 2021-09-21 | 2022-08-30 | Verfahren zur Herstellung eines Wachstumssubstrats, Wachstumssubstrat, und Verfahren zur Herstellung einer Vielzahl optoelektronischer Halbleiterchips |
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US20130157445A1 (en) * | 2010-08-10 | 2013-06-20 | Kimiya Miyashita | POLYCRYSTALLINE ALUMINUM NITRIDE BASE MATERIAL FOR CRYSTAL GROWTH OF GaN-BASE SEMICONDUCTOR AND METHOD FOR MANUFACTURING GaN-BASE SEMICONDUCTOR USING THE SAME |
TW201347222A (zh) * | 2012-05-07 | 2013-11-16 | Atek Technology Corp | 半導體裝置及其製造方法 |
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DE102009056386A1 (de) | 2009-11-30 | 2011-06-01 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung von Halbleiterbauelementen |
CN103003920B (zh) | 2010-09-27 | 2016-09-14 | 株式会社东芝 | GaN基半导体结晶成长用多晶氮化铝基材及使用该基材的GaN基半导体的制造方法 |
US8766274B2 (en) | 2010-12-14 | 2014-07-01 | Hexatech, Inc. | Thermal expansion engineering for polycrystalline aluminum nitride sintered bodies |
US20130099277A1 (en) | 2011-10-25 | 2013-04-25 | The Regents Of The University Of California | SELECTIVE DRY ETCHING OF N-FACE (Al,In,Ga)N HETEROSTRUCTURES |
TWI698553B (zh) | 2019-10-15 | 2020-07-11 | 國家中山科學研究院 | 氮化鋁陶瓷基板表面改質的方法 |
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US20130157445A1 (en) * | 2010-08-10 | 2013-06-20 | Kimiya Miyashita | POLYCRYSTALLINE ALUMINUM NITRIDE BASE MATERIAL FOR CRYSTAL GROWTH OF GaN-BASE SEMICONDUCTOR AND METHOD FOR MANUFACTURING GaN-BASE SEMICONDUCTOR USING THE SAME |
TW201347222A (zh) * | 2012-05-07 | 2013-11-16 | Atek Technology Corp | 半導體裝置及其製造方法 |
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