WO2023044762A1

WO2023044762A1 - Duty cycle adjustment circuit, integrated circuit, and electronic apparatus

Info

Publication number: WO2023044762A1
Application number: PCT/CN2021/120349
Authority: WO
Inventors: 谢丰波
Original assignee: 深圳市傲科光电子有限公司
Priority date: 2021-09-24
Filing date: 2021-09-24
Publication date: 2023-03-30

Abstract

A duty cycle adjustment circuit, an integrated circuit, and an electronic apparatus. The duty cycle adjustment circuit comprises a conversion circuit, a first shaping circuit, an inverter circuit, a feedback circuit, and an adjustment circuit; the conversion circuit is configured to generate a conversion signal at an output end of the conversion circuit according to an input signal; the first shaping circuit comprises a plurality of inverters sequentially connected in series, and the first shaping circuit is configured to shape the conversion signal; the inverter circuit is configured to generate, at an output end of the inverter circuit, a target output signal that is inverted with respect to a signal at an input end of the inverter circuit; the feedback circuit is configured to output an adjustment signal according to an average voltage difference between two ends of the inverter circuit; the adjustment circuit is configured to change a duty cycle of the conversion signal to change a duty cycle of the target output signal. In the present application, it is not necessary to consider factors such as the frequency of an input signal and a specific duty cycle of the input signal, it is not limited by the specification and parameters of components used, and large-range duty cycle adjustment may be achieved using conventional devices.

Description

A duty ratio adjustment circuit, integrated circuit and electronic equipment

technical field

The application belongs to the technical field of integrated circuits, and in particular relates to a duty ratio adjustment circuit, integrated circuits and electronic equipment.

Background technique

At present, in high-speed circuits, the general duty cycle adjustment circuit can handle a relatively small range of input clock duty cycle, which is limited by the specifications and parameters of the components used, resulting in the inability to adjust some extreme input clocks; In a high-speed digital processing chip, keeping the clock duty cycle at 50% is crucial to the working performance of the digital circuit.

technical problem

The traditional duty ratio adjustment circuit has the problem of limited duty ratio adjustment range.

technical solution

The first aspect of the embodiments of the present application provides a duty cycle adjustment circuit, including: a conversion circuit configured to access and generate a conversion signal at an output end of the conversion circuit according to an input signal; the first Shaping circuit, including several inverters connected in series in sequence, the input end of the first shaping circuit is connected to the output end of the conversion circuit for shaping the conversion signal; the inverter circuit includes an odd number Inverters connected in series, the input end of the inverting circuit is connected to the output end of the first shaping circuit, the inverting circuit is used for shaping the received conversion signal and generating a corresponding signal at its output end A target output signal in which the signal at the input terminal is inverted; a feedback circuit, the input terminal of the feedback circuit is connected to the inverting circuit, and the feedback circuit is configured to generate according to the average voltage difference between the input terminal and the output terminal of the inverting circuit An adjustment signal; an adjustment circuit, connected in series with the conversion circuit, and the control terminal of the adjustment circuit is connected to the output end of the feedback circuit, and the adjustment circuit is configured to adjust the power supply provided to the conversion according to the adjustment signal The current of the circuit is used to adjust the slope of the rising edge and the falling edge of the switching signal to change the duty cycle of the switching signal to change the duty cycle of the target output signal.

In one of the embodiments, the conversion circuit includes a first switch element, the control terminal of the first switch element is used to receive the input signal, and the first conduction terminal of the first switch element is the and connected with the regulation circuit for receiving the current provided by the power supply.

In one embodiment, the feedback circuit includes an operational amplifier, the first input terminal of the operational amplifier is connected to the input terminal of the inverting circuit, and the second input terminal of the operational amplifier is connected to the input terminal of the inverting circuit. The output terminal is connected, and the output terminal of the operational amplifier is connected with the control terminal of the regulating circuit.

In one embodiment, the first input terminal of the operational amplifier is connected to the input terminal of the inverting circuit through a first filter circuit, and the second input terminal of the operational amplifier is connected to the input terminal of the inverting circuit through a second filter circuit. The output terminal of the circuit is connected.

In one embodiment, the regulating circuit includes a second switching element; the control terminal of the second switching element is the control terminal of the regulating circuit, and the first conduction terminal of the second switching element is connected to the power supply , the second conduction end of the second switch element is connected to the first conduction end of the first switch element, and the second conduction end of the first switch element is grounded.

In one embodiment, the regulating circuit includes a second switching element; the control terminal of the second switching element is the control terminal of the regulating circuit, and the first conduction terminal of the second switching element is grounded, so The second conducting end of the second switching element is connected to the first conducting end of the first switching element, and the second conducting end of the first switching element is connected to the power supply.

In one embodiment, the first shaping circuit includes an even number of inverters.

In one embodiment, it further includes a second shaping circuit, the second shaping circuit includes several inverters connected in sequence, the input end of the second shaping circuit is connected to the output end of the inverter circuit, and the The output end of the second shaping circuit is the output end of the duty cycle circuit, and the second shaping circuit is used for adjusting the number of inverters and the preset phase of the first shaping circuit and the inverter circuit. The phase of the target output signal.

A second aspect of the embodiments of the present application provides an integrated circuit, including the above-mentioned duty ratio adjustment circuit.

A third aspect of the embodiments of the present application provides an electronic device, including the above-mentioned duty ratio adjustment circuit.

Beneficial effect

Compared with the prior art, the embodiment of the present application has the following beneficial effects: according to the principle that the voltage is different after the signal is inverted when the duty ratio of the signal is not 50%, the adjustment signal output by the feedback circuit and the inverting circuit are set. The corresponding relationship between the average voltage difference at both ends, that is, by outputting the corresponding adjustment signal to control the adjustment circuit to perform feedback adjustment on the conversion signal, change the duty ratio of the conversion signal, and finally output the target output signal with a preset duty ratio; due to the feedback The circuit judges the duty cycle of the two by detecting the average voltage difference, and since the regulating circuit affects the slope of the rising edge and falling edge of the overall conversion signal by adjusting the current used to generate the conversion signal, it is not necessary to Considering factors such as the frequency of the input signal and the specific duty cycle of the input signal, and not being limited by the specifications and parameters of the components used, a wide range of duty cycle adjustments can be achieved using conventional devices.

Description of drawings

FIG. 1 is a schematic diagram of the principle of the first embodiment of the present application;

FIG. 2 is a schematic diagram of the circuit structure of the first embodiment of the present application;

FIG. 3 is a schematic waveform diagram of the first embodiment of the present application;

Fig. 4 is another waveform schematic diagram of the first embodiment of the present application;

FIG. 5 is a schematic diagram of the circuit structure of the second embodiment of the present application;

FIG. 6 is a schematic diagram of a circuit structure of a third embodiment of the present application.

Embodiments of the present invention

In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. Thus, a feature defined as "first" and "second" may explicitly or implicitly include one or more of these features.

Fig. 1 shows a schematic structural diagram of a duty ratio adjustment circuit provided by the first embodiment of the present application, and the details are as follows:

A duty ratio adjustment circuit includes a conversion circuit 1 , a first shaping circuit 2 , an inverter circuit 3 , a feedback circuit 4 and an adjustment circuit 5 .

The conversion circuit 1 is configured to access and turn on or off the conversion circuit 1 according to the input signal IN, so that the link connecting the output terminal of the conversion circuit 1 to the power supply VDD or ground is turned on or off, so that the output terminal of the conversion circuit 1 A conversion signal A is generated, wherein the input signal IN may be a square wave signal, such as a clock signal.

The first shaping circuit 2 includes several inverters connected in series in sequence, the input end of the first shaping circuit 2 is connected to the output end of the conversion circuit 1, and is used for shaping the conversion signal A and outputting the conversion signal A1; the inverter circuit 3 Including an inverter, the input end of the inverter circuit 3 is connected to the output end of the first shaping circuit 2, it can be understood that the number of inverters of the inverter circuit 3 can be adjusted according to the actual situation, as long as the inverting The number of the inverters of the circuit 3 is an odd number, for example, the inverter circuit 3 can include three inverters connected in sequence, so that the received conversion signal A1 can be shaped and generated at the output of the inverter circuit 3. The inversion of the signal at the input converts the signal A2. In this example, the conversion signal A2 can be used as the target output signal OUT.

The input terminal of the feedback circuit 4 is connected with the inverter circuit 3, and the feedback circuit 4 is configured to generate an adjustment signal according to the average voltage difference between the input terminal and the output terminal of the inverter circuit 3; the adjustment circuit 5 is connected in series with the conversion circuit 1, and the adjustment circuit 5 The control terminal is connected to the output terminal of the feedback circuit 4, and the adjustment circuit 5 is configured to adjust the current provided by the power supply VDD to the conversion circuit 1 according to the adjustment signal, so as to change the conversion by adjusting the slope of the rising edge and the falling edge of the conversion signal A. The duty cycle of the signal A, thereby changing the duty cycle of the target output signal OUT.

In this embodiment, the duty cycle of the two is judged by detecting the average voltage value of the conversion signal A1 and the conversion signal A2. When the parameters of the power supply VDD are known, as long as there is an average voltage difference between the two, it can be judged In the case of the duty ratio, a larger detection range can be obtained through such a detection method, and the duty ratio of the target output signal OUT is finally realized by changing the current provided by the power supply VDD to the conversion circuit 1 through the corresponding adjustment signal adjustment.

As shown in FIG. 2, in this embodiment, the conversion circuit 1 includes a first switch element M1, the first switch element M1 is an N-channel MOS transistor, the control terminal of the first switch element M1 is used to receive the input signal IN, the first The first conduction end of the switch element M1 is the output end of the conversion circuit 1 and is connected to the regulation circuit 5 for receiving the current provided by the power supply VDD. The regulating circuit 5 includes a second switching element M2, the second switching element M2 is a P-channel MOS transistor; the control terminal of the second switching element M2 is the control terminal of the regulating circuit 5, and the first conduction terminal of the second switching element M2 Connect the power supply VDD, the second conduction end of the second switch element M2 is connected to the first conduction end of the first switch element M1, the second conduction end of the first switch element M1 is grounded, and the adjustment signal is a voltage signal, which can be changed by changing The voltage value of the adjustment signal regulates the adjustment circuit 5 .

It should be noted that, in this embodiment, during the working process of the duty ratio adjustment circuit, the power supply VDD and the adjustment signal will cause the second switching element M2 to work in the constant current region, the second switching element M2 is continuously turned on, and the second switch The current output by the second conduction end of the element M2 is controlled by the regulation signal. When the input signal IN is at a high level, the first switch element M1 is turned on, the first conduction end of the first switch element M1 is equivalent to grounding, and the first conduction end of the first switch element M1 becomes a low level; when When the input signal IN is at a low level, the first switch element M1 is turned off, the first conduction end of the first switch element M1 is connected to the power supply VDD through the second switch element M2, and the first conduction end of the first switch element M1 becomes High level; therefore, the conversion signal A which is inverse to the input signal IN can be obtained through the first switching element M1.

In this embodiment, the first shaping circuit 2 includes a total of six inverters for shaping the converted signal A. The number of inverters can be set according to the actual situation. In order to cooperate with subsequent circuits, the first A shaping circuit 2 has an even number of inverters. The feedback circuit 4 includes an operational amplifier U1, a first filter circuit and a second filter circuit, the first filter circuit includes a first filter resistor R1 and a first filter capacitor C1, and the second filter circuit includes a second filter resistor R2 and a second filter capacitor C2, the first filter circuit and the second filter circuit are both low-pass filter circuits. In this embodiment, the first input terminal of the operational amplifier U1 is connected to the input terminal of the inverter circuit 3 through the first filter resistor R1 and grounded through the first filter capacitor R1, and the second input terminal of the operational amplifier U1 is connected to the ground through the second filter resistor R1. R2 is connected to the output terminal of the inverter circuit 3 and grounded through the second filter capacitor. In another embodiment, the feedback circuit 4 is only provided with a low-pass filter circuit at the output end of the operational amplifier U1.

It should be noted that, in this embodiment, the first input terminal of the operational amplifier U1 receives the conversion signal A1 that is in phase with the conversion signal A, and the second input terminal of the operational amplifier U1 receives the conversion signal A1 that is inverse phase to the conversion signal A1. The converted signal A2; when the duty cycle of the converted signal A is not 50%, the average voltage of the converted signal A1 is not equal to the average voltage of the converted signal A2.

In this embodiment, the operational amplifier U1 is configured such that when the average voltage of the first input terminal of the operational amplifier U1 is equal to the average voltage of the second input terminal, the output voltage of the operational amplifier U1 is an adjustment signal whose voltage is a preset standard voltage; when the average voltage of the first input terminal When the voltage is greater than the average voltage of the second input terminal, the voltage of the regulated signal is greater than the preset standard voltage, and the greater the difference between the average voltages of the two input terminals, the greater the voltage of the regulated signal; when the average voltage of the first input terminal is less than that of the second input terminal When the average voltage is used, the voltage of the adjusted signal is lower than the preset standard voltage, and the greater the difference between the average voltages of the two input terminals, the smaller the voltage of the adjusted signal; both the maximum voltage and the minimum voltage of the adjusted signal can make the second switch element M2 work in the constant current region.

Since the second switching element M2 is a PMOS transistor, the greater the voltage of the adjustment signal, the smaller the current that the second switching element M2 can pass through, the slower the rising edge of the conversion signal A, the steeper the falling edge of the conversion signal A, and the lower the conversion signal A. The duty cycle of A will become smaller; the smaller the voltage of the adjustment signal, the greater the current that the second switching element M2 can pass through, the steeper the rising edge of the conversion signal A, the slower the falling edge of the conversion signal A, and the slower the conversion signal A The duty cycle of A will become larger.

As shown in Figure 3, for example, when a clock signal with a duty ratio of 50% is required, and the input signal IN is a clock signal with a duty ratio less than 50%, the duty ratio of the conversion signal A obtained by the conversion circuit 1 is greater than 50%. %, then the average voltage of the conversion signal A1 is greater than the average voltage of the conversion signal A2, at this time the average voltage of the first input terminal of the operational amplifier U1 is greater than the average voltage of the second input terminal, the voltage of the adjustment signal output by the operational amplifier U1 becomes larger, and the input The current of the second switching element M2 becomes smaller, the rising edge of the conversion signal A becomes slower, the falling edge of the conversion signal A becomes steeper, the duty ratio of the conversion signal A after shaping becomes smaller and infinitely close to 50%, and the final output target The duty cycle of the output signal OUT is also infinitely close to 50%.

As shown in Figure 4, for example, when a clock signal with a duty ratio of 50% is required, and the input signal IN is a clock signal with a duty ratio greater than 50%, the duty ratio of the conversion signal A obtained by the conversion circuit 1 is less than 50%. %, then the average voltage of the conversion signal A1 is less than the average voltage of the conversion signal A2, at this time, the average voltage of the first input terminal of the operational amplifier U1 is lower than the average voltage of the second input terminal, then the voltage of the adjustment signal output by the operational amplifier U1 becomes smaller, and the input The current of the second switching element M2 becomes larger, the rising edge of the conversion signal A becomes steeper, the falling edge of the conversion signal A becomes slower, the duty cycle of the conversion signal A after shaping becomes larger and infinitely close to 50%, and the final output target The duty cycle of the output signal OUT is also infinitely close to 50%.

In this embodiment, the duty ratio adjustment circuit also includes a second shaping circuit 6, the input end of the second shaping circuit 6 is connected to the output end of the inverter circuit 3, the second shaping circuit 6 includes an inverter, and may also include Three inverters, the number of inverters can be set according to the actual situation, so as to adjust the phase of the target output signal OUT, so that the phase of the target output signal OUT reaches a preset phase. In this embodiment, the total number of inverters in the first shaping circuit 2 , the inverter circuit 3 and the second shaping circuit 6 is an even number, and the output signal OUT is in phase with the adjusted conversion signal A at this time. The second shaping circuit 6 can also include an even number of inverters connected in sequence. In another embodiment, the second shaping circuit 6 includes two inverters. At this time, the total number of inverters in the duty cycle adjustment circuit is an odd number, the target output signal OUT is inverted to the converted signal A after adjustment.

In this embodiment, the feedback circuit 4 further includes a third filter capacitor C3, the output terminal of the operational amplifier U1 is connected to the power supply VDD through the third capacitor C3, and the third filter capacitor C3 is also used to filter the signal in the feedback circuit 4 to ensure signal accuracy.

FIG. 5 shows a schematic structural diagram of a duty ratio adjustment circuit provided by the second embodiment of the present application, and the details are as follows:

The difference between this embodiment and Embodiment 1 is that the first switch element M1 is a PMOS transistor, the second switch element M2 is an NMOS transistor, the first conducting end of the second switch element M2 is grounded, and the second switch element M2 is connected to the ground. The conduction end is connected to the first conduction end of the first switch element M1, the second conduction end of the first switch element M1 is connected to the power supply VDD, and the output end of the operational amplifier U1 is grounded through the third capacitor C3.

This embodiment has the same function as the first embodiment.

FIG. 6 shows a schematic structural diagram of a duty ratio adjustment circuit provided by the third embodiment of the present application, and the details are as follows:

The difference between this embodiment and the first embodiment is that the first shaping circuit 2 has five inverters in total.

The parity of the number of inverters in the first shaping circuit 2 will affect the phases of the converted signal A1 and the converted signal A2, so when the number of inverters in the first shaping circuit 2 is odd, only the operational amplifier U1 or The arrangement of the feedback circuit 4 can still achieve the same effect as that of the first embodiment. For example, in this embodiment, the first input terminal of the operational amplifier is connected to the output terminal of the inverting circuit 3 through the second filter circuit, and the second input terminal of the operational amplifier U1 is connected to the input terminal of the inverting circuit 3 through the first filter circuit. .

At the same time, the total number of inverters in the first shaping circuit 2 , the inverter circuit 3 and the second shaping circuit 6 in this embodiment is an odd number, and the output signal OUT and the adjusted conversion signal A are inverted at this time.

The fourth embodiment of the present application provides an integrated circuit, including the duty cycle adjustment circuit as in the above-mentioned first embodiment or the second embodiment or the third embodiment.

The fifth embodiment of the present application provides an electronic device, including the duty cycle adjustment circuit as in the first embodiment or the second embodiment or the third embodiment above.

The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: it can still implement the foregoing embodiments Modifications to the technical solutions described in the examples, or equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the various embodiments of the application, and should be included in the Within the protection scope of this application.

Claims

A duty ratio adjustment circuit, characterized in that it comprises:

a conversion circuit configured to access and generate a conversion signal at an output of the conversion circuit based on an input signal;

A first shaping circuit, including several inverters connected in series in sequence, the input end of the first shaping circuit is connected to the output end of the conversion circuit, for shaping the conversion signal;

An inverter circuit, including an odd number of inverters connected in series in sequence, the input terminal of the inverter circuit is connected to the output terminal of the first shaping circuit, and the inverter circuit is used to generate a signal at its output terminal and its input terminal Inverted target output signal;

a feedback circuit, the input terminal of the feedback circuit is connected to the inverting circuit, and the feedback circuit is configured to generate an adjustment signal according to the average voltage difference between the input terminal and the output terminal of the inverting circuit;

An adjustment circuit, connected in series with the conversion circuit, and the control terminal of the adjustment circuit is connected to the output end of the feedback circuit, the adjustment circuit is configured to adjust the current provided by the power supply to the conversion circuit according to the adjustment signal , to adjust the slope of the rising edge and the falling edge of the conversion signal to change the duty cycle of the conversion signal, so as to change the duty cycle of the target output signal.
The duty ratio adjustment circuit according to claim 1, wherein the conversion circuit comprises a first switch element, the control terminal of the first switch element is used to receive the input signal, and the first switch element The first conduction terminal of is the output terminal of the conversion circuit, and is connected with the regulation circuit for receiving the current provided by the power supply.
The duty ratio adjustment circuit according to claim 1, wherein the conversion circuit comprises a first switch element, the control terminal of the first switch element is used to receive the input signal, and the first switch element The first conduction terminal of is the output terminal of the conversion circuit, and is connected with the regulation circuit for receiving the current provided by the power supply.
The duty cycle adjustment circuit according to claim 3, wherein the first input terminal of the operational amplifier is connected to the input terminal of the inverting circuit through a first filter circuit, and the second input terminal of the operational amplifier is The terminal is connected to the output terminal of the inverting circuit through the second filter circuit.
The duty ratio adjustment circuit according to claim 3, wherein the adjustment circuit includes a second switch element; the control terminal of the second switch element is the control end of the adjustment circuit, and the second switch The first conducting end of the element is connected to the power supply, the second conducting end of the second switching element is connected to the first conducting end of the first switching element, and the second conducting end of the first switching element grounded.
The duty ratio adjustment circuit according to claim 3, wherein the adjustment circuit includes a second switch element; the control terminal of the second switch element is the control end of the adjustment circuit, and the second The first conduction end of the switch element is grounded, the second conduction end of the second switch element is connected to the first conduction end of the first switch element, and the second conduction end of the first switch element is connected to the power supply described above.
The duty cycle adjusting circuit according to any one of claims 1 to 6, characterized in that, the first shaping circuit comprises an even number of inverters.
The duty cycle adjustment circuit according to claim 7, further comprising a second shaping circuit, the second shaping circuit includes a plurality of inverters connected in sequence, the input terminal of the second shaping circuit is connected to the connected to the output end of the inverting circuit, the output end of the second shaping circuit is the output end of the duty ratio circuit, and the second shaping circuit is used for The number of inverters and the preset phase adjust the phase of the target output signal.
An integrated circuit, characterized by comprising the duty cycle adjustment circuit according to any one of claims 1-8.
An electronic device, characterized by comprising the duty cycle adjustment circuit according to any one of claims 1 to 8.