WO2023040699A1

WO2023040699A1 - Signal amplification circuit and chip

Info

Publication number: WO2023040699A1
Application number: PCT/CN2022/117138
Authority: WO
Inventors: 散华杰
Original assignee: 歌尔股份有限公司
Priority date: 2021-09-17
Filing date: 2022-09-06
Publication date: 2023-03-23
Also published as: CN113872539B; CN113872539A

Abstract

A signal amplification circuit and a chip, relating to the technical field of signal processing, and comprising: a first-stage amplification circuit (101), a second-stage amplification circuit (102) and a signal conversion circuit (103). The first-stage amplification circuit (101) comprises a first signal input terminal (J1), a second signal input terminal (J2) and an instrumentation amplifier (U1A); the first signal input terminal (J1) and the second signal input terminal (J2) are respectively connected to a first terminal and a second terminal of the instrumentation amplifier (U1A); the first signal input terminal (J1) and the second signal input terminal (J2) are configured to acquire a detection signal; the instrumentation amplifier (U1A) is configured to generate a first-level amplified signal according to the detection signal; the second-stage amplification circuit (102) comprises an operational amplifier (U1B); a first end of the operational amplifier (U1B) is configured to receive the first-stage amplified signal; the operational amplifier (U1B) is configured to generate a second-stage amplified signal according to the first-stage amplified signal; the signal conversion circuit (103) comprises an analog-to-digital converter (ADC); a first end of the analog-to-digital converter (ADC) is configured to receive the second-stage amplified signal; a second end of the analog-to-digital converter (ADC) is configured to output a digital signal on the basis of the second-stage amplified signal.

Description

A signal amplification circuit and chip

technical field

Embodiments of the present disclosure relate to the technical field of signal processing, and more specifically, to a signal amplification circuit and a chip.

Background of the invention

Because the electrodermal signal is very weak, it is difficult to be identified without amplification processing, and various vital signs and activities of the human body will produce different electrodermal signals, which can be easily identified after processing, and then use these processing in the future The obtained data can be used in various applications. For the acquisition and amplification of low-frequency small signals, it can be applied to the field of bioelectric signal collection, such as the medical field and the field of wearable electronic devices.

However, in the process of amplifying small signals in the existing amplifying circuit, there is a problem that the input offset is high, and the amplifying effect of the detection signal under the common mode voltage is not ideal.

Contents of the invention

An object of the embodiments of the present disclosure is to provide a new technical solution for a signal amplifying circuit and a chip.

According to the first aspect of the present disclosure, a signal amplifying circuit is provided, including: a primary amplifying circuit, a secondary amplifying circuit and a signal conversion circuit, the primary amplifying circuit includes a first signal input terminal, a second signal input terminal and an instrument amplifier, the first signal input end and the second signal input end are respectively connected to the first end and the second end of the instrumentation amplifier, the first signal input end and the second signal input end are used for collecting detection signals, and the instrumentation amplifier is used for detecting The signal generates a primary amplified signal; the secondary amplifying circuit includes an operational amplifier, the first end of the operational amplifier is used to receive the primary amplified signal, the operational amplifier is used to generate a secondary amplified signal according to the primary amplified signal, and the second end of the operational amplifier Used to output the secondary amplified signal; the signal conversion circuit includes an analog-to-digital converter, the first end of the analog-to-digital converter is used to receive the secondary amplified signal, and the first end of the analog-to-digital converter is used to output the signal based on the secondary amplified signal Digital signal.

According to the second aspect of the present disclosure, there is also provided a chip, including: a circuit board and a signal amplifying circuit, the signal amplifying circuit is arranged on the circuit board, and the signal amplifying circuit includes the signal amplifying circuit of the first aspect; wherein, the signal amplifying circuit It includes a primary amplifying circuit, a secondary amplifying circuit and a signal conversion circuit connected in sequence.

A beneficial effect of the embodiment of the present disclosure is that this embodiment adopts a first-stage amplifying circuit with an instrumentation amplifier and a second-stage amplifying circuit with an operational amplifier, and utilizes the characteristics of high input impedance and high common-mode rejection ratio of the instrumentation amplifier to be able to It has a better signal amplification effect.

Other features and advantages of embodiments of the present disclosure will become apparent through the following detailed description of exemplary embodiments of the present disclosure with reference to the accompanying drawings.

Brief description of the drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and, together with the description, serve to explain principles of the embodiments of the disclosure.

Fig. 1 provides a kind of signal amplifying circuit for the present embodiment;

Fig. 2 is the circuit structure of the primary amplifier circuit provided by the present embodiment;

FIG. 3 is a relationship diagram between the magnification factor and the pin configuration of the primary amplifier circuit provided by this embodiment;

Fig. 4 is a circuit diagram of the first filtering circuit provided by the present embodiment;

Fig. 5 is the circuit diagram of the secondary amplification circuit provided by the present embodiment;

FIG. 6 is a reference diagram of the magnification factor relationship of the secondary amplifier circuit provided in this embodiment;

FIG. 7 is a circuit diagram of a second filter circuit and a signal conversion circuit provided in this embodiment.

Detailed ways

Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangements of components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and in no way taken as limiting the invention, its application or uses.

Techniques, methods and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such techniques, methods and devices should be considered part of the description.

In all examples shown and discussed herein, any specific values should be construed as exemplary only, and not as limitations. Therefore, other instances of the exemplary embodiment may have different values.

It should be noted that like numerals and letters denote like items in the following figures, therefore, once an item is defined in one figure, it does not require further discussion in subsequent figures.

With reference to Fig. 1, the present embodiment provides a kind of signal amplifying circuit, comprises: one-stage amplifying circuit 101, two-stage amplifying circuit 102 and signal conversion circuit 103, one-stage amplifying circuit 101 is provided with first signal input terminal J1, second signal The input terminal J2, the first signal input terminal J1 and the second signal input terminal J2 are used for collecting detection signals. The primary amplification circuit 101 is used for primary amplification of the received detection signal, the secondary amplification circuit 102 is used for secondary amplification of the received detection signal, and the signal conversion circuit is used for performing secondary amplification according to the amplified secondary amplified signal. Algorithm operation, and then identify the information that needs to be identified in the electrodermal signal.

The first signal input terminal J1 and the second signal input terminal J2 can be two metal electrodes, and the metal electrodes corresponding to the first signal input terminal J1 and the second signal input terminal J2 are placed close to the skin to form a circuit to realize electrodermal signal delivery and collection. The primary amplification circuit 101 receives the detection signal, and after performing primary amplification on the received detection signal, outputs the signal after the primary amplification to the secondary amplification circuit 102, and the secondary amplification circuit 102 amplifies the signal after the primary amplification. Perform secondary amplification and output to the signal conversion circuit 103. The signal conversion circuit 103 performs algorithmic calculations based on the secondary amplified signal, and then recognizes the information that needs to be recognized in the electrodermal signal.

In this embodiment, the primary amplifying circuit 101 includes a first signal input terminal J1, a second signal input terminal J2 and an instrumentation amplifier U1A, and the first signal input terminal J1 and the second signal input terminal J2 are respectively connected to the first signal input terminal of the instrumentation amplifier U1A. The first terminal and the second terminal, the first signal input terminal J1 and the second signal input terminal J2 are used to collect detection signals, and the instrumentation amplifier U1A is used to generate a first-stage amplified signal according to the detection signals.

In this embodiment, the secondary amplifying circuit 102 includes an operational amplifier U1B, the first terminal of the operational amplifier U1B is used to receive the primary amplified signal, the second terminal of the operational amplifier is used to output the secondary amplified signal, and the operational amplifier U1B is used to The first-stage amplified signal generates a second-stage amplified signal.

In this embodiment, the signal conversion circuit 103 includes an analog-to-digital converter ADC, the first end of the analog-to-digital converter ADC is used to receive the secondary amplified signal, and the second end of the analog-to-digital converter ADC is used to convert the received secondary After the amplified signal undergoes analog-to-digital conversion, the digital signal of the secondary amplified signal is output.

In this embodiment, the detection signal is amplified in two stages through the successively arranged primary amplifier circuit 101 and secondary amplifier circuit 102 , which can have a better signal amplification effect.

It should be noted that the circuit in this embodiment is designed for small signal circuits, therefore, the frequency of the circuit detection signal is less than 1 KHz.

In this embodiment, the detection signal can be a low-frequency small signal on the skin surface, which can be generated by the veins on the skin surface or the micro-current of the skin itself. The amplitude of the electrical signal on the skin surface is in the range of 0-5mV, generally It is about 1mV.

In this embodiment, since the instrumentation amplifier has ultra-high input impedance, extremely good common-mode rejection ratio, low input offset, and low output impedance, it can amplify signals under common-mode voltage.

Referring to Fig. 2, in the present embodiment, the primary amplifying circuit 101 also includes a first differential signal input terminal VF1, a second differential signal input terminal VF2, a reference voltage input terminal VMID and a first gain adjustment circuit, the first differential signal input terminal VF1 is connected to the first terminal of the instrumentation amplifier U1A, and the second differential signal input terminal VF2 is connected to the second terminal of the instrumentation amplifier U1A, wherein, the first terminal of the instrumentation amplifier U1A is connected to the first signal input terminal, and the second terminal of the instrumentation amplifier U1A is connected to The second signal input terminal, that is, the first terminal and the second terminal of the instrumentation amplifier U1A are the signal input terminals of the instrumentation amplifier, and the third terminal of the instrumentation amplifier is the signal output terminal of the instrumentation amplifier.

In this embodiment, the first gain adjustment circuit is used to configure the gain of the instrumentation amplifier. Both the first gain adjustment circuit and the reference voltage input terminal are connected to the instrumentation amplifier through connecting pins, so that the instrumentation amplifier can The detection signal is amplified by the differential voltage input from the second differential signal input terminal VF2, the gain of the instrumentation amplifier, and the reference voltage input from the reference voltage input terminal.

In this embodiment, the instrumentation amplifier superimposes the differential voltage signals VF1 and VF2 with the reference voltage VMID respectively, and combines the gain Q1 to obtain the amplified single-ended signal V1, which is the third terminal output V1 of the instrumentation amplifier, and completes the first stage enlarge.

Since the input signals of the first signal input terminal J1 and the second signal input terminal J2 are skin signals, the signal strength is relatively weak, generally 1mV, and the instrumentation amplifier has a poor recognition effect on the input signal. Therefore, a differential voltage greater than the skin signal is used The signal transmits the skin signal, for example, the skin signal is transmitted by using differential voltage signals VF1 and VF2, and the voltage value of VF1 and VF2 may be 5mV. Wherein, the differential voltage signal can also resist signal interference except the input signals of the first signal input terminal J1 and the second signal input terminal J2.

In an example, the gain of the instrumentation amplifier is Q1, and the reference voltage VMID can be determined according to the performance of the instrumentation amplifier, for example, the reference voltage VMID is 2.5V. Since the input signals of the first signal input terminal J1 and the second signal input terminal J2 are analog signals, the reference voltage VMID of 2.5V is used as the carrier to realize the instrumentation amplifier to amplify the skin signal to obtain an amplified single-ended signal V1.

In this embodiment, the gain of the instrumentation amplifier is adjusted through the first gain adjustment circuit. The first gain adjustment circuit includes a first gain control terminal INA-A0, a second gain control terminal INA-A1 and a third gain control terminal INA- A2, the first gain control terminal, the second gain control terminal and the third gain control terminal are connected to the instrumentation amplifier through different connection pins of the instrumentation amplifier. For example, different pins A0, A1, A2 of the instrumentation amplifier in Fig. 2 are respectively connected to INA-A0, INA-A1, INA-A2.

In this embodiment, by adjusting the levels of the first gain control terminal INA-A0, the second gain control terminal INA-A1 and the third gain control terminal INA-A2, the amplification factor Q1 of the primary amplifier circuit is adjusted. Among them, the relationship between the level configuration of the first gain control terminal INA-A0, the second gain control terminal INA-A1 and the third gain control terminal INA-A2 and the amplification factor of the first-stage amplifier circuit is referred to FIG. 3 . It can be seen that when the levels of INA-A0, INA-A1 and INA-A2 are all low, Q1 is 1; when INA-A0 and INA-A1 are both low and INA-A2 is high, Q1 is 2; When INA-A0 is low level, INA-A1 is high level, and INA-A2 is low level, Q1 is 4; when INA-A0 is low level, INA-A1 is high level, INA- When A2 is high level, Q1 is 8; when INA-A0 is high level, INA-A1 is low level, and INA-A2 is low level, Q1 is 16; when INA-A0 is high level, INA- When A1 is low level and INA-A2 is high level, Q1 is 32; when INA-A0 is high level, INA-A1 is high level, and INA-A2 is low level, Q1 is 64; when INA- When A0 is high level, INA-A1 is high level, and INA-A2 is high level, Q1 is 128.

In this embodiment, the primary amplifying circuit 101 is also provided with a voltage dividing resistor and a filter capacitor, such as the voltage dividing resistor R17 in FIG. Capacitor C1 is connected to the power supply VS terminal of the instrumentation amplifier.

In this embodiment, the reference voltage input terminal is used to input VMID, and the reference voltage input terminal is connected to pin 9 of the instrumentation amplifier.

In this embodiment, matching resistors are provided between the first differential signal input terminal VF1 and the first terminal of the instrumentation amplifier U1A, and between the second differential signal input terminal VF2 and the second terminal of the instrumentation amplifier U1A. The number of matching resistors may be two. For example, resistors R3, R4, R9, and R10 in Figure 2, wherein R3 and R9 are connected in series between the first differential signal input terminal VF1 and the first terminal of the instrumentation amplifier U1A, and R4 and R10 are connected in series between the second differential signal input terminal Between VF2 and the second terminal of the instrumentation amplifier U1A, a matching resistor is used to match the line impedance.

In this embodiment, in order to filter out the clutter signals beyond the useful bandwidth, the circuit further includes a first filter circuit 104 for filtering the primary amplified signal, the first terminal of the first filter circuit 104 is connected to the third terminal of the instrumentation amplifier U1A The second end of the first filter circuit 104 is connected to the first end of the operational amplifier U1B.

With reference to Fig. 4, Fig. 4 is the circuit diagram of the first filter circuit, the first filter circuit is a band-pass filter circuit, the input in this circuit is the output V1 of the first stage amplifier circuit, the band-pass filter circuit comprises the first filter capacitor C3, the first Four resistors R1, the fifth resistor R2 and the second filter capacitor C2, wherein the first filter capacitor C3 is connected to the signal input end of the band-pass filter circuit, and the signal input end of the band-pass filter circuit is used to receive the output of the primary amplifier circuit Signal V1, the first terminal of the second filter capacitor C2 is connected to the reference voltage input terminal VMID of the band-pass filter circuit, the second terminal of the second filter capacitor C2 is connected to the signal output terminal of the band-pass filter circuit, and the fifth resistor R2 is connected to Between the first filter capacitor C3 and the second filter capacitor C2, one end of the first impedance R1 is set between the reference voltage terminal and the second filter capacitor C2, and the other end of the fourth resistor R1 is set between the first filter capacitor C3 and the second filter capacitor C2. between the fifth resistor R2. The output signal V1 of the primary amplifier circuit is filtered by the first filter circuit to output V2.

In this embodiment, referring to FIG. 5, FIG. 5 is a circuit diagram of the secondary amplifying circuit 102, the secondary amplifying circuit 102 includes an operational amplifier U1B, and the first end of the operational amplifier U1B is used to receive the filtered primary amplified signal V2, and perform the operation The amplifier U1B is used to generate a second-stage amplified signal according to the first-stage amplified signal, and the second terminal of the operational amplifier is used to output the second-stage amplified signal V3.

In this embodiment, the secondary amplifier circuit 102 also includes a second gain adjustment circuit 106, the first end of the second gain adjustment circuit 106 is connected to the second end of the operational amplifier, and the second end of the second gain adjustment circuit 106 is connected to the operational amplifier. The third terminal of the amplifier.

Referring to FIG. 5, the second gain adjustment circuit includes a first resistor R7, a switch circuit U2, a second resistor R5 and a third resistor R8, and the second resistor R5 and the third resistor R8 are respectively connected to switches on different branches of the switch circuit U2 For example, the switch circuit U2 has two different branches, each branch is provided with a switch, then the second resistor R5 is connected to the switch on one branch of the switch circuit U2, and the third resistor R8 is connected to the switch circuit A switch on the other branch of U2. For example, as shown in FIG. 5 , the switch circuit U2 is provided with a first switch component COM1 and a second switch component COM2, and the first switch component COM1 and the second switch component COM2 are respectively located on switch components on different branches. The first end is at the same potential as the first end of the second switch COM2, the second end of the first switch COM1 is connected to the second resistor R5, and the second end of the second switch COM2 is connected to the third resistor R8.

In this embodiment, the first resistor R7 is connected in parallel with the circuit formed by the switch circuit U2, the second resistor R5 and the third resistor R8.

Referring to FIG. 5, the second gain adjustment circuit is also connected with a reference voltage VMID for providing a reference voltage for the second gain adjustment circuit, wherein the second gain adjustment circuit is also provided with a filter capacitor C5, and the filter capacitor C5 is connected in parallel with the first resistor R7 .

In this embodiment, the output signal V2 of the band-pass filter is input to the terminal of the operational amplifier U1B, and after two stages of amplification, the amplification factor Q2 is determined by the primary amplification factor Q1, the switch circuit U2 and peripheral circuits.

In this embodiment, the input terminal of the switch circuit includes a first gain control terminal BIO_LF_GAINS1 and a second gain control terminal BIO_LF_GAINS2. The first gain control terminal and the second gain control terminal are used to input high and low levels. By controlling the first gain control terminal The level of BIO_LF_GAINS1 and the second gain control terminal BIO_LF_GAINS2 controls the on-off of the first switching element COM1 and the second switching element COM2, thereby controlling the total resistance in the access circuit to adjust the amplification factor Q2 of the secondary amplifier circuit , to obtain two-stage amplifier circuits with different magnifications. Refer to Figure 6 for the amplification factor of the secondary amplifier circuit. It can be seen from Figure 6 that when the first gain control terminal BIO_LF_GAINS1 and the second gain control terminal BIO_LF_GAINS2 are both at low levels, the secondary amplifier circuit’s amplification factor Q2 is equal to 182Q1; when BIO_LF_GAINS1 is High level, when BIO_LF_GAINS2 is low level, Q2 is equal to 76Q1; when BIO_LF_GAINS1 is low level, when BIO_LF_GAINS2 is high level, Q2 is equal to 56Q1; when both BIO_LF_GAINS1 and BIO_LF_GAINS2 are high level, Q2 is equal to 39Q1.

In this embodiment, with reference to Fig. 7, the circuit also includes a second filter circuit 105 for filtering the secondary amplified signal, the first end of the second filter circuit 105 is connected to the second end of the operational amplifier, and the second end of the second filter circuit 105 The second terminal is connected with the first terminal of the analog-to-digital converter.

In a feasible example, the second filter circuit is a low-pass filter composed of a sixth resistor R28 and a third filter capacitor C18, one end of the sixth resistor is connected to the signal output terminal of the operational amplifier, and the third filter capacitor is connected to The first side of the analog-to-digital converter. The input voltage of the low-pass filter is V3, and the output voltage is V4.

In this embodiment, the signal conversion circuit includes an analog-to-digital converter, the first end of the analog-to-digital converter U5 is used to receive the secondary amplified signal, and the first end of the analog-to-digital converter is used to output a digital signal based on the secondary amplified signal . In a working example. The digital signal can be input to the main control chip through the communication bus interface, and the algorithm operation is performed, and then the information that needs to be identified can be identified such as the electrodermal signal.

Referring to FIG. 7, the signal conversion circuit further includes a voltage input terminal for providing a DC voltage and an AC voltage to the analog-to-digital converter, wherein the AC voltage input terminal ANA is connected to the AC pin AVDD of the analog-to-digital converter, and the DC voltage input terminal V1P8 It is connected to the DC pin DVDD of the analog-to-digital converter, and the AC voltage input terminal ANA is also connected to the driving terminal REF of the analog-to-digital converter. Wherein, a driving resistor R27 and a voltage dividing resistor R30 are provided on the driving circuit between the AC voltage input terminal ANA and the driving terminal REF of the analog-to-digital converter. The AC voltage input terminal ANA is connected with filter capacitors C15 and C16, and the DC voltage input terminal V1P8 is connected with a filter capacitor C17.

This embodiment adopts a primary amplifying circuit with an instrumentation amplifier and a secondary amplifying circuit with an operational amplifier, and utilizes the characteristics of high input impedance and high common-mode rejection ratio of the instrumentation amplifier to have a better signal amplification effect; and a The respective gains of the first-stage amplifier circuit and the first-stage amplifier circuit can be adjusted, making it more flexible to use.

This embodiment also provides a chip, including: a circuit board and a signal amplifying circuit, the signal amplifying circuit is the signal amplifying circuit provided in this embodiment, and the signal amplifying circuit includes a first-stage amplifying circuit, a second-stage amplifying circuit and a signal conversion circuit connected in sequence circuit, and the signal amplifying circuit is arranged on the circuit board.

This embodiment utilizes the characteristics of high input impedance and high common-mode rejection ratio of the instrumentation amplifier to have a better signal amplification effect, and the primary amplifier circuit and the secondary amplifier circuit are packaged in one chip, which can be used in circuit design. Save space.

Having described various embodiments of the present invention, the foregoing description is illustrative, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and alterations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principle of each embodiment, practical application or technical improvement in the market, or to enable other ordinary skilled in the art to understand each embodiment disclosed herein.

Claims

A signal amplifying circuit, including: a primary amplifying circuit, a secondary amplifying circuit and a signal conversion circuit,

The primary amplifying circuit includes a first signal input terminal, a second signal input terminal and an instrumentation amplifier, and the first signal input terminal and the second signal input terminal are respectively connected to the first terminal and the second terminal of the instrumentation amplifier , the first signal input terminal and the second signal input terminal are used to collect a detection signal, and the instrumentation amplifier is used to generate a first-stage amplified signal according to the detection signal;

The secondary amplifying circuit includes an operational amplifier, the first end of which is used to receive the primary amplified signal, and the operational amplifier is used to generate a secondary amplified signal according to the primary amplified signal. The second end of the amplifier is used to output the secondary amplified signal;

The signal conversion circuit includes an analog-to-digital converter, the first end of the analog-to-digital converter is used to receive the secondary amplified signal, and the first end of the analog-to-digital converter is used to output Signal digital signal.
The signal amplifying circuit according to claim 1, wherein the first stage amplifying circuit further comprises a first differential signal input terminal, a second differential signal input terminal, a reference voltage input terminal and a first gain adjustment circuit,

The first differential signal input terminal is connected to the first terminal of the instrumentation amplifier, the second differential signal input terminal is connected to the second terminal of the instrumentation amplifier, and the first gain adjustment circuit is used to configure the instrumentation amplifier The gain of the first gain adjustment circuit and the reference voltage input terminal are both connected to the instrumentation amplifier through connecting pins, so that the instrumentation amplifier can use the gain of the instrumentation amplifier, the first differential signal input terminal and The differential voltage input from the second differential signal input terminal and the reference voltage input from the reference voltage input terminal amplify the detection signal.
The signal amplifying circuit according to claim 2, wherein the first gain adjustment circuit comprises a first gain control terminal, a second gain control terminal and a third gain control terminal, the first gain control terminal, the second gain The control terminal and the third gain control terminal are connected to the instrumentation amplifier through different connection pins, and the levels of the first gain control terminal, the second gain control terminal and the third gain control terminal are adjusted to adjust the The magnification of the primary amplifier circuit.
The signal amplifying circuit according to claim 1, wherein the secondary amplifying circuit further comprises a second gain adjusting circuit,

The first end of the second gain adjustment circuit is connected to the second end of the operational amplifier, and the second end of the second gain adjustment circuit is connected to the third end of the operational amplifier.
The signal amplifying circuit according to claim 4, wherein,

The second gain adjustment circuit includes a first resistor, a switch circuit, a second resistor and a third resistor, the second resistor and the third resistor are respectively connected to switching elements on different branches of the switch circuit, the first A resistor is connected in parallel with the circuit formed by the switch circuit, the second resistor and the third resistor.
The signal amplifying circuit according to claim 5, wherein the input terminal of the switch circuit includes a first gain control terminal and a second gain control terminal, and the first gain control terminal and the second gain control terminal are used for Input a high level or a low level to adjust the switching off and on of the switch element of the switching circuit to obtain a secondary amplification circuit with different amplification factors.
The signal amplifying circuit according to claim 1, wherein the circuit further comprises a first filtering circuit for filtering the first-stage amplified signal,

The first end of the first filter circuit is connected to the third end of the instrumentation amplifier, the second end of the first filter circuit is connected to the first end of the operational amplifier, wherein the first end of the instrumentation amplifier The three terminals are signal output terminals of the instrumentation amplifier.
The signal amplifying circuit according to claim 1, wherein the first filter circuit is a band-pass filter circuit, specifically comprising: a first filter capacitor, a fourth resistor, a fifth resistor, and a second filter capacitor,

The first filter capacitor is connected to the signal input end of the band-pass filter circuit, the first end of the second filter capacitor is connected to the reference voltage input end of the band-pass filter circuit, and the second filter capacitor of the second terminal is connected to the signal output terminal of the bandpass filter circuit, the fifth resistor is connected between the first filter capacitor and the second filter capacitor, and one end of the fifth resistor is set between the reference voltage terminal and the second filter capacitor. Between the filter capacitors, the other end of the fourth resistor is arranged between the first filter capacitor and the fifth resistor.
The signal amplifying circuit according to claim 1, wherein the circuit further comprises a second filter circuit for filtering the secondary amplified signal,

The first terminal of the second filter circuit is connected to the second terminal of the operational amplifier, and the second terminal of the second filter circuit is connected to the first terminal of the analog-to-digital converter.
The signal amplifying circuit according to claim 1, wherein the second filter circuit is a low-pass filter circuit, specifically comprising: a sixth resistor and a third filter capacitor,

One end of the sixth resistor is connected to the signal output end of the operational amplifier, and the third filter capacitor is connected to the first end of the analog-to-digital converter.
A chip, including: a circuit board and a signal amplification circuit,

The signal amplifying circuit is arranged on the circuit board, and the signal amplifying circuit comprises the signal amplifying circuit according to any one of claims 1-10;

Wherein, the signal amplifying circuit includes a primary amplifying circuit, a secondary amplifying circuit and a signal converting circuit connected in sequence.