CN113872539A - Signal amplification circuit and chip - Google Patents
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- CN113872539A CN113872539A CN202111095789.XA CN202111095789A CN113872539A CN 113872539 A CN113872539 A CN 113872539A CN 202111095789 A CN202111095789 A CN 202111095789A CN 113872539 A CN113872539 A CN 113872539A
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- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
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- H—ELECTRICITY
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- H03G—CONTROL OF AMPLIFICATION
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Abstract
The utility model relates to a signal amplification circuit and chip belongs to signal processing technology field, include: the first-stage amplification circuit comprises a first signal input end, a second signal input end and an instrument amplifier, the first signal input end and the second signal input end are respectively connected to a first end and a second end of the instrument amplifier, the first signal input end and the second signal input end are used for collecting detection signals, and the instrument amplifier is used for generating a first-stage amplification signal according to the detection signals; the second-stage amplifying circuit comprises an operational amplifier, the first end of the operational amplifier is used for receiving the first-stage amplifying signal, the operational amplifier is used for generating a second-stage amplifying signal according to the first-stage amplifying signal, the signal conversion circuit comprises an analog-digital converter, the first end of the analog-digital converter is used for receiving the second-stage amplifying signal, and the first end of the analog-digital converter is used for outputting a digital signal based on the second-stage amplifying signal.
Description
Technical Field
The disclosed embodiment relates to the technical field of signal processing, in particular to a signal amplification circuit and a chip.
Background
Because the skin electric signal is very weak, the skin electric signal is difficult to be identified without amplification treatment, various vital signs and activities of a human body can generate different skin electric signals, the skin electric signal can be easily identified after treatment, and then various applications can be carried out by utilizing data obtained after the treatment, and the acquisition and amplification circuit for the low-frequency small signal can be applied to the field of acquiring the biological electric signal, such as the medical field, the field of wearable electronic equipment and the like.
However, the conventional amplifying circuit has the problems that the input offset is high in the small-signal amplifying process, and the amplifying effect on the detection signal under the common-mode voltage is not ideal.
Disclosure of Invention
An object of the embodiments of the present disclosure is to provide a new technical solution for a signal amplifying circuit and a chip.
According to a first aspect of the present disclosure, there is provided a signal amplification circuit, comprising: the first-stage amplification circuit comprises a first signal input end, a second signal input end and an instrument amplifier, wherein the first signal input end and the second signal input end are respectively connected to a first end and a second end of the instrument amplifier, the first signal input end and the second signal input end are used for collecting detection signals, and the instrument amplifier is used for generating a first-stage amplification signal according to the detection signals; the second-stage amplification circuit comprises an operational amplifier, wherein a first end of the operational amplifier is used for receiving the first-stage amplification signal, the operational amplifier is used for generating a second-stage amplification signal according to the first-stage amplification signal, and a second end of the operational amplifier is used for outputting the second-stage amplification signal; the signal conversion circuit comprises an analog-digital converter, wherein a first end of the analog-digital converter is used for receiving the secondary amplified signal, and a first end of the analog-digital converter is used for outputting a digital signal based on the secondary amplified signal.
Optionally, the first-stage amplifying circuit further includes a first differential signal input end, a second differential signal input end, a reference voltage input end and a first gain adjusting circuit, the first differential signal input end is connected to the first end of the instrumentation amplifier, the second differential signal input end is connected to the second end of the instrumentation amplifier, the first gain adjusting circuit is used for configuring the gain of the instrumentation amplifier, and the first gain adjusting circuit and the reference voltage input end are both connected to the instrumentation amplifier through a connection pin, so that the instrumentation amplifier amplifies the detection signal according to the gain of the instrumentation amplifier, the differential voltage input by the first differential signal input end and the second differential signal input end, and the reference voltage input by the reference voltage input end.
Optionally, the first gain adjusting circuit includes a first gain control end, a second gain control end, and a third gain control end, where the first gain control end, the second gain control end, and the third gain control end are connected to the instrumentation amplifier through different connection pins, and the amplification factor of the first-stage amplifying circuit is adjusted by adjusting the level of the first gain control end, the second gain control end, and the third gain control end.
Optionally, the second-stage amplifying circuit further includes a second gain adjusting circuit, a first end of the second gain adjusting circuit is connected to the second end of the operational amplifier, and a second end of the second gain adjusting circuit is connected to the third end of the operational amplifier.
Optionally, the second gain adjustment circuit includes a first resistor, a switching circuit, a second resistor, and a third resistor, where the second resistor and the third resistor are respectively connected to the switching elements on different branches of the switching circuit, and the first resistor is connected in parallel with a circuit formed by the switching circuit, the second resistor, and the third resistor.
Optionally, the input end of the switch circuit includes a first gain control end and a second gain control end, and the first gain control end and the second gain control end are used for inputting a high level or a low level to adjust turn-off and turn-on of a switch element of the switch circuit, so as to obtain the second-stage amplification circuits with different amplification factors.
Optionally, the circuit further includes a first filter circuit for filtering the first-stage amplified signal, a first end of the first filter circuit is connected to a third end of the instrumentation amplifier, a second end of the first filter circuit is connected to the first end of the operational amplifier, and the third end of the instrumentation amplifier is a signal output end of the instrumentation amplifier.
Optionally, the first filter circuit is a band-pass filter circuit, and specifically includes: first filter capacitor, fourth resistance, fifth resistance and second filter capacitor, first filter capacitor connects band-pass filter circuit's signal input part, second filter capacitor's first end with band-pass filter circuit's reference voltage input end is connected, second filter capacitor's second end with band-pass filter circuit's signal output part is connected, fifth resistance is connected between first filter capacitor and second filter capacitor, the one end setting of fifth resistance is in between reference voltage end and the second filter capacitor, the other end setting of fourth resistance is in first filter capacitor with between the fifth resistance.
Optionally, the circuit further includes a second filter circuit for filtering the second-stage amplified signal, a first end of the second filter circuit is connected to the second end of the operational amplifier, and a second end of the second filter circuit is connected to the first end of the analog-to-digital converter.
Optionally, the second filter circuit is a low-pass filter circuit, and specifically includes: one end of the sixth resistor is connected to the signal output end of the operational amplifier, and the third filter capacitor is connected to the first end of the analog-digital converter.
According to a second aspect of the present disclosure, there is also provided a chip comprising: a circuit board and a signal amplification circuit, the signal amplification circuit being disposed on the circuit board, the signal amplification circuit comprising the signal amplification circuit of the first aspect; the signal amplification circuit comprises a primary amplification circuit, a secondary amplification circuit and a signal conversion circuit which are connected in sequence.
One advantageous effect of the embodiments of the present disclosure is that the present embodiment employs a first-stage amplifying circuit having an instrumentation amplifier and a second-stage amplifying circuit having an operational amplifier, and can have a better signal amplifying effect by using the characteristics of high input impedance and high common-mode rejection ratio of the instrumentation amplifier.
Other features of embodiments of the present disclosure and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which is to be read in connection with the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the disclosure and together with the description, serve to explain the principles of the embodiments of the disclosure.
FIG. 1 is a schematic diagram of a signal amplifying circuit according to the present embodiment;
fig. 2 is a circuit configuration of a one-stage amplification circuit provided in the present embodiment;
fig. 3 is a diagram of the relationship between the amplification factor and the pin configuration of the first-stage amplification circuit provided in this embodiment;
fig. 4 is a circuit diagram of a first filter circuit provided in the present embodiment;
fig. 5 is a circuit diagram of a two-stage amplification circuit provided in the present embodiment;
fig. 6 is a reference diagram of the relationship of the amplification factor of the two-stage amplification circuit provided in the present embodiment;
fig. 7 is a circuit diagram of a second filter circuit and a signal conversion circuit provided in the present embodiment.
Detailed Description
Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Referring to fig. 1, the present embodiment provides a signal amplification circuit including: the detection circuit comprises a primary amplifying circuit 101, a secondary amplifying circuit 102 and a signal conversion circuit 103, wherein the primary amplifying circuit 101 is provided with a first signal input end J1 and a second signal input end J2, and the first signal input end J1 and the second signal input end J2 are used for collecting detection signals. The first-stage amplification circuit 101 is used for performing first-stage amplification on the received detection signal, the second-stage amplification circuit 102 is used for performing second-stage amplification on the received detection signal, and the signal conversion circuit is used for performing algorithm operation according to the amplified second-stage amplification signal so as to identify information to be identified in the skin electric signal.
The first signal input terminal J1 and the second signal input terminal J2 can be two metal electrodes, and a loop is formed by attaching the metal electrodes corresponding to the first signal input terminal J1 and the second signal input terminal J2 to the skin, so that the transmission and the collection of skin electric signals are realized. The first-stage amplifying circuit 101 receives the detection signal, performs first-stage amplification on the received detection signal, and outputs the first-stage amplified signal to the second-stage amplifying circuit 102, the second-stage amplifying circuit 102 performs second-stage amplification on the first-stage amplified signal, and outputs the signal to the signal conversion circuit 103, and the signal conversion circuit 103 performs arithmetic operation according to the second-stage amplified signal, so as to identify information to be identified in the skin electrical signal.
In this embodiment, the primary amplifying circuit 101 includes a first signal input terminal J1, a second signal input terminal J2, and an instrumentation amplifier U1A, the first signal input terminal J1 and the second signal input terminal J2 are respectively connected to a first end and a second end of the instrumentation amplifier U1A, the first signal input terminal J1 and the second signal input terminal J2 are configured to collect a detection signal, and the instrumentation amplifier U1A is configured to generate a primary amplified signal according to the detection signal.
In this embodiment, the second-stage amplifying circuit 102 includes an operational amplifier U1B, a first terminal of the operational amplifier U1B is configured to receive the first-stage amplified signal, a second terminal of the operational amplifier is configured to output the second-stage amplified signal, and the operational amplifier U1B is configured to generate the second-stage amplified signal according to the first-stage amplified signal.
In this embodiment, the signal conversion circuit 103 includes an analog-to-digital converter ADC, a first end of the analog-to-digital converter ADC is configured to receive the second-stage amplified signal, and a second end of the analog-to-digital converter ADC is configured to output a digital signal of the second-stage amplified signal after performing analog-to-digital conversion on the received second-stage amplified signal.
In the embodiment, the detection signal is amplified in two stages by the first-stage amplifying circuit 101 and the second-stage amplifying circuit 102 which are continuously arranged, so that a better signal amplifying effect can be achieved.
It should be noted that the circuit in this embodiment is designed for a small signal circuit, and therefore, the frequency of the circuit detection signal is less than 1 KHz.
In this embodiment, the detection signal may be a low-frequency small signal on the skin surface, the low-frequency small signal may be generated by a venous blood vessel on the skin surface or a micro-current of the skin itself, and the amplitude of the electrical signal on the skin surface is in the range of 0 to 5mV, generally about 1 mV.
In this embodiment, the instrumentation amplifier has an ultra-high input impedance, an extremely good common mode rejection ratio, a low input offset, and a low output impedance, and therefore can amplify signals at a common mode voltage.
Referring to fig. 2, in this embodiment, the first-stage amplifying circuit 101 further includes a first differential signal input terminal VF1, a second differential signal input terminal VF2, a reference voltage input terminal VMID, and a first gain adjusting circuit, the first differential signal input terminal VF1 is connected to a first end of an instrumentation amplifier U1A, and the second differential signal input terminal VF2 is connected to a second end of the instrumentation amplifier U1A, where a first end of the instrumentation amplifier U1A is connected to the first signal input terminal, and a second end of the instrumentation amplifier U1A is connected to the second signal input terminal, that is, the first end and the second end of the instrumentation amplifier U1A are signal input terminals of the instrumentation amplifier, and a third end of the instrumentation amplifier is a signal output terminal of the instrumentation amplifier.
In this embodiment, the first gain adjustment circuit is configured to configure a gain of the instrumentation amplifier, and both the first gain adjustment circuit and the reference voltage input end are connected to the instrumentation amplifier through a connection pin, so that the instrumentation amplifier amplifies the detection signal according to the differential voltage input by the first differential signal input end VF1 and the second differential signal input end VF2, the gain of the instrumentation amplifier, and the reference voltage input by the reference voltage input end.
In this embodiment, the differential voltage signals VF1 and VF2 are respectively superimposed on the reference voltage VMID by the instrumentation amplifier, and the gain Q1 is combined to obtain the amplified single-ended signal V1, that is, the output V1 of the third end of the instrumentation amplifier, thereby completing the first-stage amplification.
Since the input signals of the first signal input terminal J1 and the second signal input terminal J2 are skin signals, the signal strength is weak, and is generally 1mV, and the identification effect of the instrumentation amplifier on the input signals is poor, the skin signals are transmitted by using differential voltage signals larger than the skin signals, for example, the skin signals are transmitted by using the differential voltage signals VF1 and VF2, and the voltage values of VF1 and VF2 may be 5 mV. Wherein the differential voltage signal can also resist signal interference other than the input signals of the first signal input terminal J1 and the second signal input terminal J2.
In one example, the gain of the instrumentation amplifier is Q1, and the reference voltage VMID may be determined based on the performance of the instrumentation amplifier, e.g., the reference voltage VMID is 2.5V. Because the input signals of the first signal input terminal J1 and the second signal input terminal J2 are analog signals, the reference voltage VMID of 2.5V is used as a carrier, so that the instrumentation amplifier amplifies the skin signal, and the amplified single-ended signal V1 is obtained.
In this embodiment, the gain of the instrumentation amplifier is adjusted by a first gain adjusting circuit, the first gain adjusting circuit includes a first gain control terminal INA-a0, a second gain control terminal INA-a1, and a third gain control terminal INA-a2, and the first gain control terminal, the second gain control terminal, and the third gain control terminal are connected to the instrumentation amplifier through different connection pins of the instrumentation amplifier. For example, the different pins A0, A1, A2 of the instrumentation amplifier in FIG. 2 are connected to INA-A0, INA-A1, INA-A2, respectively.
In the embodiment, the amplification factor Q1 of the one-stage amplification circuit is adjusted by adjusting the levels of the first gain control terminal INA-a0, the second gain control terminal INA-a1 and the third gain control terminal INA-a 2. Referring to fig. 3, it can be seen from fig. 3 that, when the levels of INA-a0, INA-a1 and INA-a2 are all low, Q1 is 1; when INA-A0 and INA-A1 are both low and INA-A2 is high, Q1 is 2; when INA-A0 is low, INA-A1 is high, and INA-A2 is low, Q1 is 4; when INA-A0 is low, INA-A1 is high, and INA-A2 is high, Q1 is 8; when INA-A0 is high, INA-A1 is low, INA-A2 is low, Q1 is 16; when INA-A0 is high, INA-A1 is low, INA-A2 is high, Q1 is 32; q1 is 64 when INA-A0 is high, INA-A1 is high, INA-A2 is low; when INA-A0 is high, INA-A1 is high, and INA-A2 is high, Q1 is 128.
In this embodiment, the first-stage amplifying circuit 101 is further provided with a voltage dividing resistor and a filter capacitor, for example, the voltage dividing resistor R17 and the filter capacitor C1 in fig. 2, the voltage dividing resistor R17 is connected to a CS end of a chip selection signal of the instrumentation amplifier, and the filter capacitor C1 is connected to a VS end of a power supply of the instrumentation amplifier.
In this embodiment, the reference voltage input terminal is used for inputting the VMID, and the reference voltage input terminal is connected to the pin 9 of the instrumentation amplifier.
In this embodiment, matching resistors are respectively disposed between the first differential signal input terminal VF1 and the first end of the instrumentation amplifier U1A, and between the second differential signal input terminal VF2 and the second end of the instrumentation amplifier U1A. The number of matching resistors may be 2. For example, resistors R3, R4, R9 and R10 in fig. 2, wherein R3 and R9 are connected in series between the first differential signal input VF1 and the first end of the instrumentation amplifier U1A, and R4 and R10 are connected in series between the second differential signal input VF2 and the second end of the instrumentation amplifier U1A, and matching resistors are used to match the line impedance.
In this embodiment, in order to filter out spurious signals outside the useful bandwidth, the circuit further includes a first filter circuit 104 for filtering the first-stage amplified signal, a first end of the first filter circuit 104 is connected to the third end of the instrumentation amplifier U1A, and a second end of the first filter circuit 104 is connected to the first end of the operational amplifier U1B.
Referring to fig. 4, fig. 4 is a circuit diagram of a first filter circuit, which is a band pass filter circuit, the input of the circuit is the output V1 of the primary amplifying circuit, the band-pass filter circuit comprises a first filter capacitor C3, a fourth resistor R1, a fifth resistor R2 and a second filter capacitor C2, the first filter capacitor C3 is connected to a signal input terminal of the band-pass filter circuit, the signal input terminal of the band-pass filter circuit is used for receiving an output signal V1 of the first-stage amplifier circuit, a first end of the second filter capacitor C2 is connected to a reference voltage input terminal VMID of the band-pass filter circuit, a second end of the second filter capacitor C2 is connected to a signal output terminal of the band-pass filter circuit, the fifth resistor R2 is connected between the first filter capacitor C3 and the second filter capacitor C2, one end of the first resistor R1 is arranged between the reference voltage terminal and the second filter capacitor C2, and the other end of the fourth resistor R1 is arranged between the first filter capacitor C3 and the fifth resistor R2. The output signal V1 of the first-stage amplifying circuit is filtered by the first filter circuit, and V2 is output.
In this embodiment, referring to fig. 5, fig. 5 is a circuit diagram of a secondary amplifying circuit 102, the secondary amplifying circuit 102 includes an operational amplifier U1B, a first end of the operational amplifier U1B is configured to receive the filtered primary amplified signal V2, the operational amplifier U1B is configured to generate a secondary amplified signal according to the primary amplified signal, and a second end of the operational amplifier is configured to output the secondary amplified signal V3.
In this embodiment, the second-stage amplifying circuit 102 further includes a second gain adjusting circuit 106, a first end of the second gain adjusting circuit 106 is connected to a second end of the operational amplifier, and a second end of the second gain adjusting circuit 106 is connected to a third end of the operational amplifier.
Referring to fig. 5, the second gain adjustment circuit includes a first resistor R7, a switch circuit U2, a second resistor R5 and a third resistor R8, the second resistor R5 and the third resistor R8 are respectively connected to the switches on different branches of the switch circuit U2, for example, the switch circuit U2 has 2 different branches, each branch has a switch, then, the second resistor R5 is connected to the switch on one branch of the switch circuit U2, and the third resistor R8 is connected to the switch on the other branch of the switch circuit U2. For example, as shown in fig. 5, a first switch COM1 and a second switch COM2 are disposed in the switch circuit U2, the first switch COM1 and the second switch COM2 are respectively located at switches on different branches, a first end of the first switch COM1 and a first end of the second switch COM2 are at the same potential, a second end of the first switch COM1 is connected to the second resistor R5, and a second end of the second switch COM2 is connected to the third resistor R8.
In this embodiment, the first resistor R7 is connected in parallel with a circuit formed by the switch circuit U2, the second resistor R5 and the third resistor R8.
Referring to fig. 5, the second gain adjusting circuit is further connected to a reference voltage VMID for providing the reference voltage for the second gain adjusting circuit, wherein the second gain adjusting circuit is further provided with a filter capacitor C5, and the filter capacitor C5 is connected in parallel with the first resistor R7.
In this embodiment, the output signal V2 of the band pass filter is input to the operational amplifier U1B, and is amplified for the second stage, and the amplification factor Q2 is determined by the first amplification factor Q1, the switch circuit U2 and the peripheral circuit.
In this embodiment, the input end of the switch circuit includes a first gain control end BIO _ LF _ GAINS1 and a second gain control end BIO _ LF _ GAINS2, the first gain control end and the second gain control end are used for inputting high and low levels, and the switching on and off of the first switching element COM1 and the second switching element COM2 are controlled by controlling the levels of the first gain control end BIO _ LF _ GAINS1 and the second gain control end BIO _ LF _ GAINS2, so as to control the total resistance value in the access circuit, so as to adjust the amplification factor Q2 of the second-stage amplification circuit, and obtain the second-stage amplification circuits with different amplification factors. Referring to fig. 6, it can be seen from fig. 6 that, when the first gain control terminal BIO _ LF _ GAINS1 and the second gain control terminal BIO _ LF _ GAINS2 are both low, the amplification Q2 of the second-stage amplification circuit is equal to 182Q 1; when BIO _ LF _ GAINS1 is high and BIO _ LF _ GAINS2 is low, Q2 equals 76Q 1; when BIO _ LF _ GAINS1 is low and BIO _ LF _ GAINS2 is high, Q2 equals 56Q 1; when BIO _ LF _ GAINS1 and BIO _ LF _ GAINS2 are both high, Q2 equals 39Q 1.
In this embodiment, referring to fig. 7, the circuit further includes a second filter circuit 105 for filtering the second-stage amplified signal, a first end of the second filter circuit 105 is connected to a second end of the operational amplifier, and a second end of the second filter circuit 105 is connected to a first end of the analog-to-digital converter.
In one possible example, the second filter circuit is a low-pass filter composed of a sixth resistor R28 and a third filter capacitor C18, one end of the sixth resistor is connected to the signal output terminal of the operational amplifier, and the third filter capacitor is connected to the first end of the analog-to-digital converter. The low pass filter input voltage is V3 and the output voltage is V4.
In this embodiment, the signal conversion circuit includes an analog-to-digital converter, a first end of the analog-to-digital converter U5 is configured to receive the two-stage amplified signal, and a first end of the analog-to-digital converter is configured to output a digital signal based on the two-stage amplified signal. In one possible example. The digital signal can be input into a main control chip through a communication bus interface to carry out algorithm operation, and then information needing to be identified in the skin electric signal class is identified.
Referring to fig. 7, the signal conversion circuit further includes voltage input terminals for supplying a dc voltage and an ac voltage to the analog-to-digital converter, wherein the ac voltage input terminal ANA is connected to an ac pin AVDD of the analog-to-digital converter, the dc voltage input terminal V1P8 is connected to a dc pin DVDD of the analog-to-digital converter, and the ac voltage input terminal ANA is further connected to a driving terminal REF of the analog-to-digital converter. The driving circuit between the ac voltage input terminal ANA and the driving terminal REF of the analog-to-digital converter is provided with a driving resistor R27 and a voltage dividing resistor R30. The alternating voltage input end ANA is connected with filter capacitors C15 and C16, and the direct voltage input end V1P8 is connected with a filter capacitor C17.
In the embodiment, the first-stage amplifying circuit with the instrument amplifier and the second-stage amplifying circuit with the operational amplifier are adopted, and the characteristics of high input impedance and high common-mode rejection ratio of the instrument amplifier are utilized, so that a better signal amplifying effect can be achieved; and the gains of the first-stage amplifying circuit and the first-stage amplifying circuit can be adjusted, so that the use is more flexible.
The present embodiment further provides a chip, including: the signal amplification circuit is provided by the embodiment and comprises a first-stage amplification circuit, a second-stage amplification circuit and a signal conversion circuit which are sequentially connected, and the signal amplification circuit is arranged on the circuit board.
The embodiment utilizes the characteristics of high input impedance and high common mode rejection ratio of the instrument amplifier, can have better signal amplification effect, and encapsulates the first-stage amplification circuit and the second-stage amplification circuit in one chip, thereby saving more space in circuit design.
Having described embodiments of the present invention, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein. The scope of the invention is defined by the appended claims.
Claims (11)
1. A signal amplification circuit, comprising: a first-stage amplifying circuit, a second-stage amplifying circuit and a signal converting circuit,
the first-stage amplification circuit comprises a first signal input end, a second signal input end and an instrument amplifier, wherein the first signal input end and the second signal input end are respectively connected to a first end and a second end of the instrument amplifier, the first signal input end and the second signal input end are used for collecting detection signals, and the instrument amplifier is used for generating a first-stage amplification signal according to the detection signals;
the second-stage amplification circuit comprises an operational amplifier, wherein a first end of the operational amplifier is used for receiving the first-stage amplification signal, the operational amplifier is used for generating a second-stage amplification signal according to the first-stage amplification signal, and a second end of the operational amplifier is used for outputting the second-stage amplification signal;
the signal conversion circuit comprises an analog-digital converter, wherein a first end of the analog-digital converter is used for receiving the secondary amplified signal, and a first end of the analog-digital converter is used for outputting a digital signal based on the secondary amplified signal.
2. The signal amplification circuit of claim 1, wherein the primary amplification circuit further comprises a first differential signal input, a second differential signal input, a reference voltage input, and a first gain adjustment circuit,
the first differential signal input end is connected with a first end of the instrumentation amplifier, the second differential signal input end is connected with a second end of the instrumentation amplifier, the first gain adjusting circuit is used for configuring the gain of the instrumentation amplifier, and the first gain adjusting circuit and the reference voltage input end are both connected to the instrumentation amplifier through connecting pins, so that the instrumentation amplifier amplifies the detection signal according to the gain of the instrumentation amplifier, the differential voltage input by the first differential signal input end and the second differential signal input end, and the reference voltage input by the reference voltage input end.
3. The signal amplifying circuit according to claim 2, wherein the first gain adjusting circuit comprises a first gain control terminal, a second gain control terminal and a third gain control terminal, the first gain control terminal, the second gain control terminal and the third gain control terminal are connected to the instrumentation amplifier through different connection pins, and the amplification factor of the first-stage amplifying circuit is adjusted by adjusting the level of the first gain control terminal, the second gain control terminal and the third gain control terminal.
4. The signal amplification circuit of claim 1, wherein the two-stage amplification circuit further comprises a second gain adjustment circuit,
and the first end of the second gain adjusting circuit is connected with the second end of the operational amplifier, and the second end of the second gain adjusting circuit is connected with the third end of the operational amplifier.
5. The signal amplification circuit of claim 4,
the second gain adjusting circuit comprises a first resistor, a switching circuit, a second resistor and a third resistor, the second resistor and the third resistor are respectively connected to the switching elements on different branches of the switching circuit, and the first resistor is connected in parallel with a circuit formed by the switching circuit, the second resistor and the third resistor.
6. The signal amplifying circuit according to claim 5, wherein the input terminal of the switching circuit comprises a first gain control terminal and a second gain control terminal, and the first gain control terminal and the second gain control terminal are used for inputting a high level or a low level to adjust the on and off of a switching element of the switching circuit, so as to obtain two-stage amplifying circuits with different amplification factors.
7. The signal amplification circuit of claim 1, further comprising a first filter circuit that filters the primary amplified signal,
the first end of the first filter circuit is connected with the third end of the instrumentation amplifier, the second end of the first filter circuit is connected with the first end of the operational amplifier, and the third end of the instrumentation amplifier is the signal output end of the instrumentation amplifier.
8. The signal amplification circuit of claim 1, wherein the first filter circuit is a band-pass filter circuit, and specifically comprises: a first filter capacitor, a fourth resistor, a fifth resistor and a second filter capacitor,
first filter capacitor is connected band-pass filter circuit's signal input part, second filter capacitor's first end with band-pass filter circuit's reference voltage input end is connected, second filter capacitor's second end with band-pass filter circuit's signal output part connects, fifth resistance is connected between first filter capacitor and second filter capacitor, the one end setting of fifth resistance is in between reference voltage end and the second filter capacitor, the other end setting of fourth resistance is in first filter capacitor with between the fifth resistance.
9. The signal amplification circuit of claim 1, further comprising a second filtering circuit that filters the two-stage amplified signal,
and the first end of the second filter circuit is connected with the second end of the operational amplifier, and the second end of the second filter circuit is connected with the first end of the analog-digital converter.
10. The signal amplification circuit of claim 1, wherein the second filter circuit is a low-pass filter circuit, and specifically comprises: a sixth resistor and a third filter capacitor,
one end of the sixth resistor is connected to the signal output end of the operational amplifier, and the third filter capacitor is connected to the first end of the analog-digital converter.
11. A chip, comprising: a circuit board and a signal amplifying circuit,
the signal amplification circuit is disposed on the circuit board, the signal amplification circuit comprising the signal amplification circuit of any one of claims 1-10;
the signal amplification circuit comprises a primary amplification circuit, a secondary amplification circuit and a signal conversion circuit which are connected in sequence.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111095789.XA CN113872539B (en) | 2021-09-17 | 2021-09-17 | Signal amplifying circuit and chip |
| PCT/CN2022/117138 WO2023040699A1 (en) | 2021-09-17 | 2022-09-06 | Signal amplification circuit and chip |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111095789.XA CN113872539B (en) | 2021-09-17 | 2021-09-17 | Signal amplifying circuit and chip |
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| CN113872539B CN113872539B (en) | 2023-06-30 |
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| WO (1) | WO2023040699A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115299950A (en) * | 2022-08-12 | 2022-11-08 | 歌尔股份有限公司 | Electromyographic signal acquisition circuit, wearable device and control method |
| WO2023040699A1 (en) * | 2021-09-17 | 2023-03-23 | 歌尔股份有限公司 | Signal amplification circuit and chip |
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| CN104323773A (en) * | 2014-10-31 | 2015-02-04 | 东北大学 | EOG (Electrooculography)-based ERG (Electroretinography) signal acquisition and processing system and method |
| CN110393526A (en) * | 2019-08-16 | 2019-11-01 | 北京师范大学 | A kind of high frequency feeble computer signals amplification acquisition system |
| CN212592151U (en) * | 2020-05-26 | 2021-02-26 | 亚萨合莱(广州)智能科技有限公司 | Electrocardio detecting system, living body fingerprint identification device and intelligent door lock |
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| CN101889863B (en) * | 2009-05-21 | 2013-06-19 | 深圳市理邦精密仪器股份有限公司 | High-performance direct current amplification device for acquiring biological electric signals |
| CN113872539B (en) * | 2021-09-17 | 2023-06-30 | 歌尔科技有限公司 | Signal amplifying circuit and chip |
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| CN104323773A (en) * | 2014-10-31 | 2015-02-04 | 东北大学 | EOG (Electrooculography)-based ERG (Electroretinography) signal acquisition and processing system and method |
| CN110393526A (en) * | 2019-08-16 | 2019-11-01 | 北京师范大学 | A kind of high frequency feeble computer signals amplification acquisition system |
| CN212592151U (en) * | 2020-05-26 | 2021-02-26 | 亚萨合莱(广州)智能科技有限公司 | Electrocardio detecting system, living body fingerprint identification device and intelligent door lock |
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| WO2023040699A1 (en) * | 2021-09-17 | 2023-03-23 | 歌尔股份有限公司 | Signal amplification circuit and chip |
| CN115299950A (en) * | 2022-08-12 | 2022-11-08 | 歌尔股份有限公司 | Electromyographic signal acquisition circuit, wearable device and control method |
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| CN113872539B (en) | 2023-06-30 |
| WO2023040699A1 (en) | 2023-03-23 |
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