WO2023039996A1 - 数据驱动电路以及显示装置 - Google Patents

数据驱动电路以及显示装置 Download PDF

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Publication number
WO2023039996A1
WO2023039996A1 PCT/CN2021/125954 CN2021125954W WO2023039996A1 WO 2023039996 A1 WO2023039996 A1 WO 2023039996A1 CN 2021125954 W CN2021125954 W CN 2021125954W WO 2023039996 A1 WO2023039996 A1 WO 2023039996A1
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Prior art keywords
data driving
comparison module
data
digital video
units
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PCT/CN2021/125954
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English (en)
French (fr)
Inventor
刘方云
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深圳市华星光电半导体显示技术有限公司
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Priority to US17/621,897 priority Critical patent/US20240212645A1/en
Publication of WO2023039996A1 publication Critical patent/WO2023039996A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving

Definitions

  • the present application relates to the technical field of display panels, in particular to a data driving circuit and a display device.
  • the power consumption of the data driver chip can be improved by using internal circuits, such as the charge sharing function, and the chip temperature can also be improved.
  • the ratio of the load to the screen is not high. Therefore, the power consumption and temperature improvement of the data-driven chip are limited. Even adding a heat dissipation sticker outside the chip can only provide a limited improvement in heat dissipation.
  • Embodiments of the present application provide a data driving circuit and a display device to solve the problems of chip power consumption and heat generation of display panel devices in the prior art.
  • An embodiment of the present application provides a data driving circuit
  • the data driving circuit includes a plurality of cascaded data driving units and a plurality of charge sharing units, wherein the data driving units are used to receive digital video data and output analog video signals To the corresponding data line, the data driving unit of each stage includes a latch module to store the digital video data, and the plurality of cascaded data driving units are paired to provide polarity inversion
  • the charge sharing unit is arranged between each pair of the data driving units, each of the charge sharing units includes a comparison module and a switching transistor, and the comparison module is connected to two of the data driving units
  • the latch module is used to compare the digital video data stored in the two data drive units, the switch transistor is connected to the output terminals of the two data drive units, and the output terminal of the comparison module is connected to The control terminal of the switching transistor.
  • the comparison module includes two comparators, the inverting input terminals of the two comparators input the default gray scale value, and the negative input terminals of the two comparators input the default gray scale value.
  • the reverse input terminals are respectively connected to the two data driving units.
  • the comparison module further includes an OR gate and two inverters, and the output terminals of the two comparators are respectively connected to the OR gate through the inverters.
  • the two input terminals of the OR gate, the output terminal of the OR gate is connected to the control terminal of the switching transistor.
  • the comparison module further includes an AND gate and two inverters, and the output terminals of the two comparators are respectively connected to the AND gate through the inverters.
  • the two input terminals of the AND gate, the output terminal of the AND gate is connected to the control terminal of the switching transistor.
  • the comparison module is configured to compare the two digital video data stored in the two data driving units, if the gray scale of one of the digital video data If the value is greater than the default gray scale value, the comparison module turns on the switching transistor.
  • the comparison module is configured to compare the two digital video data stored in the two data driving units, if the gray scale of the two digital video data If the values are greater than the default grayscale value, the comparison module turns on the switch transistor.
  • the comparison module is configured to not turn on the switching transistor if none of the grayscale values of the digital video data is greater than a default grayscale value, The output terminals of the two data driving units do not perform charge sharing.
  • the present application provides a display device, comprising:
  • the display panel includes a pixel array and a data driving circuit; wherein the control unit is connected to the data driving circuit to provide digital video data, and the data driving circuit is connected to the pixel array to provide analog video signals To the pixel array, the data driving circuit includes a plurality of cascaded data driving units and a plurality of charge sharing units, wherein the data driving unit is used to receive the digital video data and output the analog video signal to Corresponding to the data line, the data driving unit of each stage includes a latch module to store the digital video data, and the plurality of cascaded data driving units are paired to provide polarity inversion.
  • the charge sharing unit is arranged between each pair of the data driving units, each of the charge sharing units includes a comparison module and a switching transistor, and the comparison module is connected to two of the data driving units
  • the latch module is also used to compare the digital video data stored in the two data drive units, the switch transistor is connected to the output terminals of each pair of the data drive units, and the output terminal of the comparison module is connected to the The control terminal of the switching transistor.
  • the comparison module includes two comparators, the inverting input terminals of the two comparators input the default gray scale value, and the non-inverting inputs of the two comparators
  • the two data driving units are respectively connected to the input terminals.
  • the charge sharing unit further includes a startup module connected between the comparison module and the switching transistor, and the control unit is used to control the startup module in the analog The output interval of the video signal is turned on.
  • the comparison module further includes an OR gate and two inverters, and the output terminals of the two comparators are respectively connected to the OR gate through the inverters. Two input terminals, the output terminal of the OR gate is connected to the control terminal of the switching transistor.
  • the comparison module further includes an AND gate and two inverters, and the output terminals of the two comparators are respectively connected to the AND gate through the inverters. Two input terminals, the output terminal of the AND gate is connected to the control terminal of the switching transistor.
  • the comparison module is configured to compare the two digital video data stored in the two data driving units, if the grayscale value of one of the digital video data is greater than the default gray scale value, the comparison module turns on the switch transistor.
  • the comparison module is configured to compare the two digital video data stored in the two data driving units, if the grayscale values of the two digital video data are greater than the default gray scale value, then the comparison module turns on the switch transistor.
  • the comparison module is configured such that if none of the grayscale values of the digital video data is greater than a default grayscale value, the comparison module does not turn on the switching transistor, and both The output terminals of each of the data driving units do not perform charge sharing.
  • the beneficial effects of the present application are: the data driving circuit and the display device provided by the present application, by connecting the comparison module of the charge sharing unit module to the latch module and using it to compare the digital video stored in the two data driving units For data, the switch transistor is connected to the output terminals of the two data drive units, and the output terminal of the comparison module is connected to the control terminal of the switch transistor, which is used to turn on the switch transistor when the gray scale value of the digital video data is greater than the default gray scale value so that the two
  • the output end of the data driving unit is connected for charge sharing, so that the switch transistor will not work excessively and can provide more efficient power consumption control, thereby solving the problem of chip power consumption and heat generation in the prior art.
  • Figure 1a is a schematic circuit block diagram of a data driving circuit provided by an embodiment of the present application.
  • FIG. 1b is a schematic circuit block diagram of a charge sharing unit provided by an embodiment of the present application.
  • Fig. 1c is a schematic circuit block diagram of a charge sharing unit provided by another embodiment of the present application.
  • FIG. 2a is a signal timing diagram illustrating the charge sharing technique of the data driving circuit
  • FIG. 2b is a signal timing diagram of the charge sharing of the data driving circuit in the prior art
  • FIG. 2c is a signal timing diagram of the charge sharing of the data driving circuit provided by the embodiment of the present application.
  • FIG. 2d is a signal timing diagram of the charge sharing of the data driving circuit provided by another embodiment of the present application.
  • FIG. 3 is a schematic circuit block diagram of a display device provided by an embodiment of the present application.
  • a feature defined as “first” and “second” may explicitly or implicitly include one or more of these features.
  • “plurality” means two or more.
  • the term “comprise” and any variations thereof, are intended to cover a non-exclusive inclusion.
  • connection should be understood in a broad sense, for example, it can be a support connection or a detachable connection. Connected, or integrally connected; it may be mechanically connected or electrically connected; it may be directly connected or indirectly connected through an intermediary, and it may be the internal communication of two components. Those of ordinary skill in the art can understand the specific meanings of the above terms in this application in specific situations.
  • the embodiment of the present application provides a data driving circuit 100
  • the data driving circuit 100 includes a plurality of cascaded data driving units DU(n), DU(n+1)... and a plurality of charge sharing units CSU, wherein the data drive units DU(n), DU(n+1)... are used to receive digital video data Vdata and output analog video signals VA n , VA n+1 ... to corresponding data lines DL n , DL n+1 ..., the data driving unit DU(n) of each level includes a latch module LM(n) for storing the digital video data Vdata, and the multiple cascaded data driving units DU(n) , DU(n+1)...
  • each pair of data drive units DU(n), DU(n+ 1) The charge sharing unit CSU is arranged between them, each of the charge sharing units CSU includes a comparison module CM and a switching transistor Ts, and the comparison module CM is connected to the two data driving units DU(n), DU
  • the latch modules LM(n), LM(n+1) of (n+1) are used to compare the numbers stored in the two data drive units DU(n), DU(n+1)
  • the switch transistor Ts is connected to the output terminals of the two data driving units DU(n) and DU(n+1), and the output terminal of the comparison module CM is connected to the control terminal of the switch transistor Ts.
  • the comparison module CM includes two comparators C n , C n+1 , and the two comparators C n , C n+1
  • the inverting input terminal inputs the default gray scale value Rg, and the non-inverting input terminals of the two comparators C n and C n+1 are respectively connected to the two data driving units LM(n), LM(n+ 1).
  • the comparison module CM also includes an OR gate and two inverters, and the output terminals of the two comparators C n and C n+1 The two input terminals of the OR gate are respectively connected through the inverter, and the output terminal of the OR gate is connected to the control terminal of the switching transistor Ts.
  • the comparison module CM is configured to compare the two digital video data stored in the two data driving units DU(n) and DU(n+1). Vdata, if the grayscale value of one of the digital video data Vdata is greater than the default grayscale value, the comparison module CM turns on the switching transistor at the interval between the output of the analog video signal VAn , VAn +1 Ts connects the output ends of the two data driving units DU(n) and DU(n+1) for charge sharing.
  • the polarities of the analog video signals VA n and VA n+1 are opposite to each other, and the polarity of each pulse signal is reversed to avoid parasitics between data lines or pixels. Capacitance problem. If the output ends of the two data drive units DU( n ), DU( n+1 ) are connected between the pulse signals of the analog video signals VAn and VAn+1, the two output The potential at the terminal reaches the equilibrium potential Vb, and the potential change at this stage does not require the active work of the data drive units DU(n) and DU(n+1), so no energy is consumed, but the charge sharing unit CSU still needs to do work Energy consumption and heating.
  • the data driving units DU(n), DU(n+1) provide pulses with reversed polarity, and only need to raise the potentials of the two output terminals from the balance potential Vb to the new analog video signals VA' n , VA ' n+1 , therefore, the part of the active work of the data drive unit DU(n), DU(n+1) is only from the balance potential Vb to the new analog video signal VA' n and from the balance potential Vb to the new Analog video signal VA' n+1 .
  • Vcom represents a common potential whose polarity is reversed.
  • the opposite polarity of the analog video signal sVA n and the analog video signal sVA n+1 means that the analog video signal sVA n is greater than the common potential Vcom, and the analog video signal sVA n+1 is less than the common potential Vcom.
  • the polarity inversion between the analog video signal sVA n and the new analog video signal sVA' n means transitioning from the state where the analog video signal sVA n is greater than the common potential Vcom to the state where the new analog video signal sVA' n is less than the common potential Vcom.
  • the comparison module CM is set to be such that if the grayscale value of one of the digital video data Vdata is greater than the default grayscale value, the comparison module The CM turns on the switch transistor Ts at the interval between the outputs of the analog video signals gVA n and gVA n+1 so that the output terminals of the two data drive units DU(n) and DU(n+1) connected for charge sharing.
  • ⁇ Vg is the potential of the analog video signal corresponding to the default gray scale value.
  • the gray scale value of the analog video signal gVA' n is greater than the default gray scale value, and the pulse amplitude of the corresponding potential gVA' n is greater than -Vg, so the charge sharing helps to reduce the power consumption of the data drive unit DU(n) and DU(n+1), so that the switching transistors of the charge sharing unit CSU will not work excessively and can provide more efficient functions Power consumption control, thereby solving the problem of chip power consumption and heat generation in the prior art.
  • the range of the default grayscale value is selected from grayscale 128 to grayscale 196, which can achieve better balance and lower heat generation.
  • the comparison module CM also includes an AND gate and two inverters, and the output terminals of the two comparators C n and C n+1 The two input ends of the AND gate are respectively connected through the inverter, and the output end of the AND gate is connected to the control end of the switching transistor Ts.
  • the comparison module CM is set to compare the two data stored in the two data driving units DU(n) and DU(n+1). For the digital video data Vdata, if the grayscale values of the two digital video data Vdata are greater than the default grayscale value, the comparison module CM will output the analog video signal dVAn , dVAn +1 at an interval time
  • the switching transistor Ts is turned on to make the output terminals of the two data driving units DU(n) and DU(n+1) connected for charge sharing.
  • ⁇ Vg is the potential of the analog video signal corresponding to the default gray scale value.
  • the pulse amplitude of dVA' n and dVA' n+1 is greater than ⁇ Vg, so charge sharing helps to reduce the power consumption of the data drive unit DU(n), DU(n+1), so that the switching transistor of the charge sharing unit CSU Overwork can be better avoided and more efficient power consumption control can be provided, thereby solving the problems of chip power consumption and heat generation in the prior art.
  • the comparison module CM is set to be such that if none of the gray scale values of the digital video data Vdata is greater than the default gray scale value, the comparison module CM does not conduct the For switching transistor Ts, the output terminals of the two data driving units DU(n) and DU(n+1) do not perform charge sharing.
  • the comparison module CM is configured to perform charge sharing at an interval time before the output of the two digital video data VAn and VAn+1 .
  • the data drive unit DU(n) of each stage includes a register module RM(n) for receiving the digital video data Vdata, and a digital-to-analog conversion module DAC for converting the digital video data into
  • the data Vdata is converted into an analog signal
  • the operational amplifier OPn is used to provide output impedance and circuit buffer
  • the output transistor Tp is used to control the synchronous output of the digital video data VAn , VAn +1 .
  • the data output enabling signal DOE controls the output transistor Tp to output the digital video data VA n , VA n+1 synchronously.
  • the comparison module CM samples the digital video data VA n , VA n+1 and decides whether to perform charge sharing, if the comparison module CM decides to perform charge sharing , the switching transistor Ts is turned on for charge sharing before the sampled digital video data VAn and VAn +1 are output.
  • the data driving unit DU(n) of each stage further includes an inverter Inv for inverting the polarity of the analog video signal VA n .
  • the inverter Inv is used for performing polarity conversion of the digital video data VA n , VA n+1 according to the inversion signal POL.
  • the comparison module of the charge sharing unit by setting the comparison module of the charge sharing unit to compare two digital video data stored in the two data driving units, if the grayscale value of one of the digital video data If it is greater than the default grayscale value, the comparison module turns on the switch transistor at the output interval of the analog video signal to connect the output terminals of the two data drive units for charge sharing, so that the switch transistor will not work excessively and can provide more efficient Power consumption control, thereby solving the problem of chip power consumption and heat generation in the prior art.
  • the present application provides a display device DP, including:
  • the display panel PL includes a pixel array 200 and a data driving circuit 100; wherein the control unit Tcon is connected to the data driving circuit 100 to provide digital video data Vdata, and the data driving circuit 100 is connected to the pixel array 200, used to provide an analog video signal VA n to the pixel array 200, the data driving circuit 100 includes a plurality of cascaded data driving units DU(n), DU(n+1)... and a plurality of charge sharing units CSU, wherein the data drive units DU(n), DU(n+1)... are used to receive the digital video data Vdata and output the analog video signals VA n , VA n+1 ...
  • the data drive unit DU(n) of each level includes a latch module LM(n) for storing the digital video data Vdata, and the multiple cascaded data drive units DU(n), DU(n+1)...
  • each of the charge sharing units CSU includes a comparison module CM and a switching transistor Ts, and the comparison module CM is connected to the two data driving units DU(
  • the latch modules LM(n) and LM(n+1) of n), DU(n+1) are used to compare the data stored in the two data drive units DU(n), DU(n+1)
  • the digital video data Vdata, the switching transistor Ts is connected to the output terminals of each pair of the data drive unit DU(n), DU(n+1), and the output terminal of the comparison module CM is connected to the switching transistor Ts the control terminal.
  • control unit Tcon is connected to the data drive circuit 100 to provide serial (Serial Signal, or serial) digital video data Vdata, which includes the required information of each pixel (sub-pixel). Grayscale data.
  • serial Serial Signal, or serial
  • Grayscale data The gray scale data is presented in the form of digital data at this stage.
  • the comparison module CM includes two comparators C n , C n+1 , and the two comparators C n , C n
  • the inverting input terminal of +1 inputs the default gray scale value Rg, and the non-inverting input terminals of the two comparators C n and C n+1 are respectively connected to the two data driving units LM(n), LM (n+1).
  • the comparison module CM also includes an OR gate and two inverters, and the two comparators C n , C n+1
  • the output terminals of the OR gate are respectively connected to the two input terminals of the OR gate through the inverter, and the output terminals of the OR gate are connected to the control terminal of the switching transistor Ts.
  • the comparison module CM also includes an AND gate and two inverters, and the two comparators C n , C n+1
  • the output terminals of the AND gate are respectively connected to the two input terminals of the AND gate through the inverter, and the output terminals of the AND gate are connected to the control terminal of the switching transistor Ts.
  • the comparison module CM is set to be such that if the grayscale value of one of the digital video data Vdata is greater than the default grayscale value, the comparison module CM will
  • the switching transistor Ts is turned on at intervals between the outputs of the analog video signals gVA n and gVA n+1 so that the output ends of the two data driving units DU(n) and DU(n+1) are connected.
  • charge sharing is the potential of the analog video signal corresponding to the default gray scale value.
  • the gray scale value of the analog video signal gVA' n is greater than the default gray scale value, and the pulse amplitude of the corresponding potential gVA' n is greater than -Vg, so the charge sharing helps to reduce the power consumption of the data drive unit DU(n) and DU(n+1), so that the switching transistors of the charge sharing unit CSU will not work excessively and can provide more efficient functions Power consumption control, thereby solving the problem of chip power consumption and heat generation in the prior art.
  • the range of the default grayscale value is selected from grayscale 128 to grayscale 196, which can achieve better balance and lower heat generation.
  • the display panel PL further includes a gate driving circuit 300 and a plurality of gate lines GL connected to the gate driving circuit 300 .
  • the pixel array 200 includes a plurality of sub-pixels Px.
  • the gate driving circuit 300 turns on the driving transistors in the sub-pixels Px of the pixel array 200 through the gate lines GL to introduce analog video signals VA n , VA n+1 . . . from the data lines DLn, DLn+1 . Degree of rotation produces a grayscale display.
  • the comparison module CM is set to compare two data drive units DU(n), DU(n+1) For the two digital video data Vdata stored in , if the gray scale values of the two digital video data Vdata are greater than the default gray scale value, the comparison module CM compares the analog video signals dVA n , dVA n The output interval of +1 turns on the switching transistor Ts so that the output terminals of the two data driving units DU(n) and DU(n+1) are connected for charge sharing.
  • ⁇ Vg is the potential of the analog video signal corresponding to the default gray scale value. In the example shown in Fig.
  • the pulse amplitude of dVA' n and dVA' n+1 is greater than ⁇ Vg, so charge sharing helps to reduce the power consumption of the data drive unit DU(n), DU(n+1), so that the switching transistor of the charge sharing unit CSU Overwork can be better avoided and more efficient power consumption control can be provided, thereby solving the problems of chip power consumption and heat generation in the prior art.
  • the comparison module CM is configured to not turn on the switch if none of the grayscale values of the digital video data Vdata is greater than the default grayscale value.
  • the transistor Ts and the output terminals of the two data driving units DU(n) and DU(n+1) do not perform charge sharing.
  • the comparison module CM is set to perform charge share.
  • the data drive unit DU(n) of each stage includes a register module RM(n) for receiving the digital video data Vdata, and a digital-to-analog conversion module DAC for converting the digital video data into
  • the data Vdata is converted into an analog signal
  • the operational amplifier OPn is used to provide output impedance and circuit buffer
  • the output transistor Tp is used to control the synchronous output of the digital video data VAn , VAn +1 .
  • the data output enabling signal DOE controls the output transistor Tp to output the digital video data VA n , VA n+1 synchronously.
  • the comparison module CM samples the digital video data VA n , VA n+1 and decides whether to perform charge sharing, if the comparison module CM decides to perform charge sharing , the switching transistor Ts is turned on for charge sharing before the sampled digital video data VAn and VAn +1 are output.
  • the charge sharing unit CSU further includes a startup module Str connected between the comparison module CM and the switching transistor Ts , the control unit Tcon is used to control the startup module Str to be turned on at intervals between the outputs of the analog video signals VAn and VAn +1 .
  • the start-up module Str includes, for example, an inverter and a start-up transistor Tt
  • the control unit Tcon provides a data output enable signal DOE, and in two stages of the data output enable signal DOE The low level between the pulses controls the turn-on of the start transistor Tt, so that the signal of the comparison module CM can be sent to the switch transistor Ts to determine whether the switch transistor Ts is turned on.
  • the data driving unit DU(n) of each stage further includes an inverter Inv for inverting the polarity of the analog video signal VA n .
  • the inverter Inv is used for performing polarity conversion of the digital video data VA n , VA n+1 according to the inversion signal POL.
  • the comparison module of the charge sharing unit by setting the comparison module of the charge sharing unit to compare two digital video data stored in the two data drive units, if the gray scale of one of the digital video data is If the value is greater than the default grayscale value, the comparison module turns on the switch transistor at the output interval of the analog video signal to connect the output terminals of the two data drive units for charge sharing, so that the switch transistor will not work excessively and can provide more Efficient power consumption control, thereby solving the problem of chip power consumption and heat generation in the prior art.

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Abstract

一种数据驱动电路（100）以及显示装置，通过将电荷分享单元的比较模块连接于锁存模块并用于比较两个数据驱动单元中所储存的数字视频数据，开关晶体管连接两个数据驱动单元的输出端，比较模块的输出端连接开关晶体管的控制端，用以于数字视频数据的灰阶值大于默认灰阶值时，导通开关晶体管以使两个数据驱动单元的输出端连通进行电荷分享。

Description

数据驱动电路以及显示装置
本申请要求于2021年09月16日提交中国专利局、申请号为202111087660.4、发明名称为“数据驱动电路以及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示面板技术领域，尤其涉及一种数据驱动电路以及显示装置。
背景技术
常见的液晶显示器中，数据驱动芯片的功耗改善可采用内部电路改善，例如电荷分享(Charge Sharing)功能，同时也能改善芯片温度。但在液晶显示器实际工作过程中，负载重画面的比例并不高，因此，数据驱动芯片的功耗与温度改善有限，即使在芯片外部加散热贴亦仅能提供有限的散热改善。
因此，目前急需能够解决上述液晶显示器的芯片功耗与发热的问题。
技术问题
本申请实施例提供一种数据驱动电路以及显示装置，以解决现有技术的显示面器的芯片功耗与发热的问题。
技术解决方案
本申请实施例提供一种数据驱动电路，所述数据驱动电路包括多个级连的数据驱动单元以及多个电荷分享单元，其中，所述数据驱动单元用以接收数字视频数据并输出模拟视频讯号至对应的数据线，每一级的所述数据驱动单元包括锁存模块用以储存所述数字视频数据，所述多个级连的数据驱动单元两两成对用以提供极性反转的所述模拟视频讯号，每对所述数据驱动单元之间设置有所述电荷分享单元，每个所述电荷分享单元包括比较模块以及开关晶体管，所述比较模块连接于两个所述数据驱动单元的所述锁存模块并用于比较两个所述数据驱动单元中所储存的所述数字视频数据，所述开关晶体管连接两个所述 数据驱动单元的输出端，所述比较模块的输出端连接所述开关晶体管的控制端。
在本申请的一些实施例的数据驱动电路中，所述比较模块包括两个比较器，两个所述比较器的反向输入端输入所述默认灰阶值，两个所述比较器的非反向输入端分别连接两个所述数据驱动单元。
在本申请的一些实施例的数据驱动电路中，所述比较模块还包括或门及两个反向器，两个所述比较器的输出端分别透过所述反向器连接所述或门的两个输入端，所述或门的输出端接所述开关晶体管的控制端。
在本申请的一些实施例的数据驱动电路中，所述比较模块还包括与门及两个反向器，两个所述比较器的输出端分别透过所述反向器连接所述与门的两个输入端，所述与门的输出端接所述开关晶体管的控制端。
在本申请的一些实施例的数据驱动电路中，所述比较模块设置为比较两个所述数据驱动单元中所储存的两个所述数字视频数据，若其中一个所述数字视频数据的灰阶值大于默认灰阶值，则所述比较模块导通所述开关晶体管。
在本申请的一些实施例的数据驱动电路中，所述比较模块设置为比较两个所述数据驱动单元中所储存的两个所述数字视频数据，若两个所述数字视频数据的灰阶值均大于默认灰阶值，则所述比较模块导通所述开关晶体管。
在本申请的一些实施例的数据驱动电路中，所述比较模块设置为若所述数字视频数据的灰阶值均没有大于默认灰阶值，则所述比较模块不导通所述开关晶体管，两个所述数据驱动单元的所述输出端不进行电荷分享。
在另一方面，本申请提供一种显示装置，包括：
控制单元；以及
显示面板，包括像素阵列以及数据驱动电路；其中，所述控制单元连接于所述数据驱动电路，用以提供数字视频数据，所述数据驱动电路连接于所述像素阵列，用以提供模拟视频讯号至所述像素阵列，所述数据驱动电路包括多个级连的数据驱动单元以及多个电荷分享单元，其中，所述数据驱动单元用以接收所述数字视频数据并输出所述模拟视频讯号至对应的数据线，每一级的所述数据驱动单元包括锁存模块用以储存所述数字视频数据，所述多个级连的数据驱动单元两两成对用以提供极性反转的所述模拟视频讯号，每对所述数据驱动单元之间设置有所述电荷分享单元，每个所述电荷分享单元包括比较模块以及开关晶体管，所述比较模块连接于两个所述数据驱动单元的所述锁存模块并用于比较两个所述数据驱动单元中所储存的所述数字视频数据，所述开关晶体管连接每对所述数据驱动单元的输出端，所述比较模块的输出端连接所述开关晶体管的控制端。
在本申请的一些实施例的显示装置中，所述比较模块包括两个比较器，两个所述比较器的反向输入端输入所述默认灰阶值，两个所述比较器的非反向输入端分别连接两个所述数据驱动单元。
在本申请的一些实施例的显示装置中，所述电荷分享单元还包括启动模块连接于所述比较模块与所述开关晶体管之间，所述控制单元用以控制所述启动模块于所述模拟视频讯号的输出间隔时间导通。
在本申请的一些实施例的显示装置中，所述比较模块还包括或门及两个反向器，两个所述比较器的输出端分别透过所述反向器连接所述或门的两个输入端，所述或门的输出端接所述开关晶体管的控制端。
在本申请的一些实施例的显示装置中，所述比较模块还包括与门及两个反 向器，两个所述比较器的输出端分别透过所述反向器连接所述与门的两个输入端，所述与门的输出端接所述开关晶体管的控制端。
在本申请的一些实施例的显示装置中，所述比较模块设置为比较两个所述数据驱动单元中所储存的两个所述数字视频数据，若其中一个所述数字视频数据的灰阶值大于默认灰阶值，则所述比较模块导通所述开关晶体管。
在本申请的一些实施例的显示装置中，所述比较模块设置为比较两个所述数据驱动单元中所储存的两个所述数字视频数据，若两个所述数字视频数据的灰阶值均大于默认灰阶值，则所述比较模块导通所述开关晶体管。
在本申请的一些实施例的显示装置中，所述比较模块设置为若所述数字视频数据的灰阶值均没有大于默认灰阶值，则所述比较模块不导通所述开关晶体管，两个所述数据驱动单元的所述输出端不进行电荷分享。
有益效果
本申请的有益效果为：本申请提供的所述数据驱动电路以及所述显示装置，通过将电荷分享单元模块的比较模块连接于锁存模块并用于比较两个数据驱动单元中所储存的数字视频数据，开关晶体管连接两个数据驱动单元的输出端，比较模块的输出端连接开关晶体管的控制端，用以于数字视频数据的灰阶值大于默认灰阶值时导通开关晶体管以使两个数据驱动单元的输出端连通进行电荷分享，使得开关晶体管不会过度的工作且能提供更有效率的功耗控制，进而解决了现有技术的芯片功耗与发热问题。
附图说明
下面结合附图，通过对本申请的具体实施方式详细描述，将使本申请的技术方案及其它有益效果显而易见。
图1a是本申请实施例提供的数据驱动电路的电路方块示意图；
图1b是本申请实施例提供的电荷分享单元的电路方块示意图；
图1c是本申请另一实施例提供的电荷分享单元的电路方块示意图；
图2a是数据驱动电路的电荷分享技术说明的讯号时序图；
图2b是现有技术的数据驱动电路的电荷分享的讯号时序图；
图2c是本申请实施例提供的数据驱动电路的电荷分享的讯号时序图；
图2d是本申请另一实施例提供的数据驱动电路的电荷分享的讯号时序图；以及
图3是本申请实施例提供的显示装置的电路方块示意图。
本发明的实施方式
这里所公开的具体结构和功能细节仅仅是代表性的，并且是用于描述本申请的示例性实施例的目的。但是本申请可以通过许多替换形式来具体实现，并且不应当被解释成仅仅受限于这里所阐述的实施例。
在本申请的描述中，需要理解的是，术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。另外，术语“包括”及其任何变形，意图在于覆盖不排他的包含。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是支撑连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指，否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是，这里所使用的术语“包括”和/或“包含” 规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在，而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
下面结合附图和实施例对本申请作进一步说明。
请参照图1a，本申请实施例提供一种数据驱动电路100，所述数据驱动电路100包括多个级连的数据驱动单元DU(n)、DU(n+1)…以及多个电荷分享单元CSU，其中，所述数据驱动单元DU(n)、DU(n+1)…用以接收数字视频数据Vdata并输出模拟视频讯号VA n、VA n+1…至对应的数据线DL n、DL n+1…，每一级的所述数据驱动单元DU(n)包括锁存模块LM(n)用以储存所述数字视频数据Vdata，所述多个级连的数据驱动单元DU(n)、DU(n+1)…两两成对用以提供极性反转的所述模拟视频讯号VA n、VA n+1…，每对所述数据驱动单元DU(n)、DU(n+1)之间设置有所述电荷分享单元CSU，每个所述电荷分享单元CSU包括比较模块CM以及开关晶体管Ts，所述比较模块CM连接于两个所述数据驱动单元DU(n)、DU(n+1)的所述锁存模块LM(n)、LM(n+1)并用于比较两个所述数据驱动单元DU(n)、DU(n+1)中所储存的所述数字视频数据Vdata，所述开关晶体管Ts连接两个所述数据驱动单元DU(n)、DU(n+1)的输出端，所述比较模块CM的输出端连接所述开关晶体管Ts的控制端。
请参照图1b，在本申请的一些实施例的数据驱动电路中，所述比较模块CM包括两个比较器C n、C n+1，两个所述比较器C n、C n+1的反向输入端输入所述默认灰阶值Rg，两个所述比较器C n、C n+1的非反向输入端分别连接两个所述数据驱动单元LM(n)、LM(n+1)。
请参照图1b，在本申请的一些实施例的数据驱动电路中，所述比较模块CM还包括或门及两个反向器，两个所述比较器C n、C n+1的输出端分别透过所述反向器连接所述或门的两个输入端，所述或门的输出端接所述开关晶体管Ts的控制端。
在本申请的一些实施例的数据驱动电路中，所述比较模块CM设置为比较两个所述数据驱动单元DU(n)、DU(n+1)中所储存的两个所述数字视频数据Vdata，若其中一个所述数字视频数据Vdata的灰阶值大于默认灰阶值，则所述比较模块CM于所述模拟视频讯号VA n、VA n+1的输出间隔时间导通所述开关晶体管Ts以使两个所述数据驱动单元DU(n)、DU(n+1)的所述输出端连通进行电荷分 享。
请参照图2a，具体的，极性反转的所述模拟视频讯号VA n、VA n+1彼此极性相反，而且每一次的脉冲讯号都翻转极性，以避免数据线或像素间的寄生电容问题。若在所述模拟视频讯号VA n、VA n+1的脉冲讯号之间连接两个所述数据驱动单元DU(n)、DU(n+1)的所述输出端，则会使两个输出端的电位达到平衡电位Vb，这一阶段的电位改变不需所述数据驱动单元DU(n)、DU(n+1)主动作功，因此不耗能，但是电荷分享单元CSU仍需作功而耗能发热。下一阶段所述数据驱动单元DU(n)、DU(n+1)提供翻转极性的脉冲，仅需将两个输出端的电位从平衡电位Vb提升到新的模拟视频讯号VA’ n、VA’ n+1，因此，所述数据驱动单元DU(n)、DU(n+1)主动作功的部分只有从平衡电位Vb至新的模拟视频讯号VA’ n及从平衡电位Vb至新的模拟视频讯号VA’ n+1。
请参照图2b，若新的模拟视频讯号sVA’ n较小，可能会发生图2b的情况，即平衡电位Vb’大于新的模拟视频讯号sVA’ n，且sVA’ n-Vb’>sVA n-sVA’ n,此时进行电荷分享反而无助于降低数据驱动单元DU(n)的功耗。由于显示器实际工作过程中，负载重画面的比例并不高，若在每次模拟视频讯号极性反转时均进行电荷分享，不但节能的效果有限，而且会加重电荷分享单元CSU的耗能，导致芯片整体的耗能增加而使发热情况恶化。另外，Vcom表示极性反转的共电位。其中，模拟视频讯号sVA n及模拟视频讯号sVA n+1的极性相反意指模拟视频讯号sVA n大于共电位Vcom，且模拟视频讯号sVA n+1小于共电位Vcom。模拟视频讯号sVA n与新的模拟视频讯号sVA’ n極性反轉意指从模拟视频讯号sVA n大于共电位Vcom的状态过度到新的模拟视频讯号sVA’ n小于共电位Vcom的状态。
因此，请参照图2c，本申请的一些实施例的数据驱动电路中，所述比较模块CM设置为若其中一个所述数字视频数据Vdata的灰阶值大于默认灰阶值，则所述比较模块CM于所述模拟视频讯号gVA n、gVA n+1的输出间隔时间导通所述开关晶体管Ts以使两个所述数据驱动单元DU(n)、DU(n+1)的所述输出端连通进行电荷分享。其中，±Vg是默认灰阶值所对应的模拟视频讯号的电位，在图2c的例子中，模拟视频讯号gVA’ n的灰阶值大于默认灰阶值，对应电位gVA’ n的脉冲振幅大于-Vg，因此进行电荷分享有助于降低数据驱动单元DU(n)、DU(n+1)的功耗，使得电荷分享单元CSU的开关晶体管不会过度的工作且能提供更有效 率的功耗控制，进而解决了现有技术的芯片功耗与发热问题。
具体的，若默认灰阶值太小，则电荷分享单元CSU的开关晶体管过度工作，若默认灰阶值太大，则无助于降低数据驱动单元DU(n)、DU(n+1)的功耗，因此选择默认灰阶值的范围介于灰阶128至灰阶196，可达到较佳的平衡及较低的发热。
请参照图1c，在本申请的一些实施例的数据驱动电路中，所述比较模块CM还包括与门及两个反向器，两个所述比较器C n、C n+1的输出端分别透过所述反向器连接所述与门的两个输入端，所述与门的输出端接所述开关晶体管Ts的控制端。
请参照图2d，在本申请的一些实施例的数据驱动电路中，所述比较模块CM设置为比较两个所述数据驱动单元DU(n)、DU(n+1)中所储存的两个所述数字视频数据Vdata，若两个所述数字视频数据Vdata的灰阶值均大于默认灰阶值，则所述比较模块CM于所述模拟视频讯号dVA n、dVA n+1的输出间隔时间导通所述开关晶体管Ts以使两个所述数据驱动单元DU(n)、DU(n+1)的所述输出端连通进行电荷分享。其中，±Vg是默认灰阶值所对应的模拟视频讯号的电位，在图2d的例子中，模拟视频讯号dVA’ n、dVA’ n+1的灰阶值均大于默认灰阶值，对应电位dVA’ n、dVA’ n+1的脉冲振幅大于±Vg，因此进行电荷分享有助于降低数据驱动单元DU(n)、DU(n+1)的功耗，使得电荷分享单元CSU的开关晶体管可以更好的避免过度工作且能提供更有效率的功耗控制，进而解决了现有技术的芯片功耗与发热问题。
在本申请的一些实施例的数据驱动电路中，所述比较模块CM设置为若所述数字视频数据Vdata的灰阶值均没有大于默认灰阶值，则所述比较模块CM不导通所述开关晶体管Ts，两个所述数据驱动单元DU(n)、DU(n+1)的所述输出端不进行电荷分享。
在本申请的一些实施例的数据驱动电路中，所述比较模块CM设置为于两个所述数字视频数据VA n、VA n+1输出前的间隔时间进行电荷分享。具体的，请参照图1a，每一级的所述数据驱动单元DU(n)包括寄存模块RM(n)用以接收所述数字视频数据Vdata、数模转换模块DAC用以将所述数字视频数据Vdata转为仿真讯号、运算放大器OP n用以提供输出阻抗及电路缓冲、以及输出晶体管Tp用以 控制所述数字视频数据VA n、VA n+1的同步输出。其中数据输出致能讯号DOE控制输出晶体管Tp以进行所述数字视频数据VA n、VA n+1的同步输出。在数据输出致能讯号DOE的两个脉冲之间，所述比较模块CM采样所述数字视频数据VA n、VA n+1并决定是否要进行电荷分享，若所述比较模块CM决定进行电荷分享，则在所采样的所述数字视频数据VA n、VA n+1输出之前导通所述开关晶体管Ts进行电荷分享。
在本申请的一些实施例的数据驱动电路100中，每一级的所述数据驱动单元DU(n)还包括反向器Inv用以进行所述模拟视频讯号VA n的极性反转。具体的，反向器Inv用以依反转讯号POL执行所述数字视频数据VA n、VA n+1的极性转换。
在本申请的上述实施例所述数据驱动电路中，通过将电荷分享单元的比较模块设置为比较两个数据驱动单元中所储存的两个数字视频数据，若其中一个数字视频数据的灰阶值大于默认灰阶值，则比较模块于模拟视频讯号的输出间隔时间导通开关晶体管以使两个数据驱动单元的输出端连通进行电荷分享，使得开关晶体管不会过度的工作且能提供更有效率的功耗控制，进而解决了现有技术的芯片功耗与发热问题。
参照图1a及图3，在另一方面，本申请提供一种显示装置DP，包括：
控制单元Tcon；以及
显示面板PL，包括像素阵列200以及数据驱动电路100；其中，所述控制单元Tcon连接于所述数据驱动电路100，用以提供数字视频数据Vdata，所述数据驱动电路100连接于所述像素阵列200，用以提供模拟视频讯号VA n至所述像素阵列200，所述数据驱动电路100包括多个级连的数据驱动单元DU(n)、DU(n+1)…以及多个电荷分享单元CSU，其中，所述数据驱动单元DU(n)、DU(n+1)…用以接收所述数字视频数据Vdata并输出所述模拟视频讯号VA n、VA n+1…至对应的数据线DL n、DL n+1…，每一级的所述数据驱动单元DU(n)包括锁存模块LM(n)用以储存所述数字视频数据Vdata，所述多个级连的数据驱动单元DU(n)、DU(n+1)…两两成对用以提供极性反转的所述模拟视频讯号VA n、VA n+1…，每对所述数据驱动单元DU(n)、DU(n+1)之间设置有所述电荷分享单元CSU，每个所述电荷分享单元CSU包括比较模块CM以及开关晶体管Ts，所述比较模块CM连接于两个所述数据驱动单元DU(n)、DU(n+1)的所述锁存模块LM(n)、LM(n+1)并用于比较两个所述数据驱动单元DU(n)、DU(n+1)中所储存 的所述数字视频数据Vdata，所述开关晶体管Ts连接每对所述数据驱动单元DU(n)、DU(n+1)的输出端，所述比较模块CM的输出端连接所述开关晶体管Ts的控制端。
具体的，所述控制单元Tcon连接于所述数据驱动电路100，用以提供序列式(Serial Signal，或称串行式)的数字视频数据Vdata，其中包含每个像素(子像素)所需的灰阶数据。所述灰阶数据在这个阶段是以数字数据的型式呈现。多个级连的数据驱动单元DU(n)、DU(n+1)…则从中截取各自所需的数字视频数据Vdata并转成并列式的仿真讯号输出。
请参照图1b，在本申请的一些实施例的显示装置的数据驱动电路中，所述比较模块CM包括两个比较器C n、C n+1，两个所述比较器C n、C n+1的反向输入端输入所述默认灰阶值Rg，两个所述比较器C n、C n+1的非反向输入端分别连接两个所述数据驱动单元LM(n)、LM(n+1)。
请参照图1b，在本申请的一些实施例的显示装置的数据驱动电路中，所述比较模块CM还包括或门及两个反向器，两个所述比较器C n、C n+1的输出端分别透过所述反向器连接所述或门的两个输入端，所述或门的输出端接所述开关晶体管Ts的控制端。
请参照图1c，在本申请的一些实施例的显示装置的数据驱动电路中，所述比较模块CM还包括与门及两个反向器，两个所述比较器C n、C n+1的输出端分别透过所述反向器连接所述与门的两个输入端，所述与门的输出端接所述开关晶体管Ts的控制端。
请参照图2c，本申请的一些实施例的数据驱动电路中，所述比较模块CM设置为若其中一个所述数字视频数据Vdata的灰阶值大于默认灰阶值，则所述比较模块CM于所述模拟视频讯号gVA n、gVA n+1的输出间隔时间导通所述开关晶体管Ts以使两个所述数据驱动单元DU(n)、DU(n+1)的所述输出端连通进行电荷分享。其中，±Vg是默认灰阶值所对应的模拟视频讯号的电位，在图2c的例子中，模拟视频讯号gVA’ n的灰阶值大于默认灰阶值，对应电位gVA’ n的脉冲振幅大于-Vg，因此进行电荷分享有助于降低数据驱动单元DU(n)、DU(n+1)的功耗，使得电荷分享单元CSU的开关晶体管不会过度的工作且能提供更有效率的功耗控制，进而解决了现有技术的芯片功耗与发热问题。
具体的，若默认灰阶值太小，则电荷分享单元CSU的开关晶体管过度工作，若默认灰阶值太大，则无助于降低数据驱动单元DU(n)、DU(n+1)的功耗，因此选择默认灰阶值的范围介于灰阶128至灰阶196，可达到较佳的平衡及较低的发热。
具体的，参照图1a及图3，显示面板PL还包括栅极驱动电路300以及多条连接到栅极驱动电路300的栅线GL。像素阵列200中包括多个子像素Px。栅极驱动电路300通过栅线GL导通像素阵列200的子像素Px中的驱动晶体管以引入从数据线DLn、DLn+1…来的模拟视频讯号VA n、VA n+1…使液晶产生不同程度的旋转而产生灰阶显示。
请参照图1a、图2d及图3，在本申请的一些实施例的显示装置DP中，所述比较模块CM设置为比较两个所述数据驱动单元DU(n)、DU(n+1)中所储存的两个所述数字视频数据Vdata，若两个所述数字视频数据Vdata的灰阶值均大于默认灰阶值，则所述比较模块CM于所述模拟视频讯号dVA n、dVA n+1的输出间隔时间导通所述开关晶体管Ts以使两个所述数据驱动单元DU(n)、DU(n+1)的所述输出端连通进行电荷分享。其中，±Vg是默认灰阶值所对应的模拟视频讯号的电位，在图2d的例子中，模拟视频讯号dVA’ n、dVA’ n+1的灰阶值均大于默认灰阶值，对应电位dVA’ n、dVA’ n+1的脉冲振幅大于±Vg，因此进行电荷分享有助于降低数据驱动单元DU(n)、DU(n+1)的功耗，使得电荷分享单元CSU的开关晶体管可以更好的避免过度工作且能提供更有效率的功耗控制，进而解决了现有技术的芯片功耗与发热问题。
在本申请的一些实施例的显示装置中，所述比较模块CM设置为若所述数字视频数据Vdata的灰阶值均没有大于默认灰阶值，则所述比较模块CM不导通所述开关晶体管Ts，两个所述数据驱动单元DU(n)、DU(n+1)的所述输出端不进行电荷分享。
请参照图1a及图3，在本申请的一些实施例的显示装置DP中，所述比较模块CM设置为于两个所述数字视频数据VA n、VA n+1输出前的间隔时间进行电荷分享。具体的，请参照图1a，每一级的所述数据驱动单元DU(n)包括寄存模块RM(n)用以接收所述数字视频数据Vdata、数模转换模块DAC用以将所述数字视频数据Vdata转为仿真讯号、运算放大器OP n用以提供输出阻抗及电路缓冲、以及输出 晶体管Tp用以控制所述数字视频数据VA n、VA n+1的同步输出。其中数据输出致能讯号DOE控制输出晶体管Tp以进行所述数字视频数据VA n、VA n+1的同步输出。在数据输出致能讯号DOE的两个脉冲之间，所述比较模块CM采样所述数字视频数据VA n、VA n+1并决定是否要进行电荷分享，若所述比较模块CM决定进行电荷分享，则在所采样的所述数字视频数据VA n、VA n+1输出之前导通所述开关晶体管Ts进行电荷分享。
具体的，请参照图1a及图3，在本申请的一些实施例的显示装置DP中，所述电荷分享单元CSU还包括启动模块Str连接于所述比较模块CM与所述开关晶体管Ts之间，所述控制单元Tcon用以控制所述启动模块Str于所述模拟视频讯号VA n、VA n+1的输出间隔时间导通。
具体的，请参照图1b或图1c，所述启动模块Str例如包括反向器及启动晶体管Tt，所述控制单元Tcon提供数据输出致能讯号DOE，并在数据输出致能讯号DOE的两个脉冲之间的低电平控制所述启动晶体管Tt导通，使所述比较模块CM的讯号能送到所述开关晶体管Ts以决定所述开关晶体管Ts是否导通。
在本申请的一些实施例的显示装置DP中，每一级的所述数据驱动单元DU(n)还包括反向器Inv用以进行所述模拟视频讯号VA n的极性反转。具体的，反向器Inv用以依反转讯号POL执行所述数字视频数据VA n、VA n+1的极性转换。
本申请提供的所述数据驱动电路以及所述显示装置，通过将电荷分享单元的比较模块设置为比较两个数据驱动单元中所储存的两个数字视频数据，若其中一个数字视频数据的灰阶值大于默认灰阶值，则比较模块于模拟视频讯号的输出间隔时间导通开关晶体管以使两个数据驱动单元的输出端连通进行电荷分享，使得开关晶体管不会过度的工作且能提供更有效率的功耗控制，进而解决了现有技术的芯片功耗与发热问题。
以上各个操作的具体实施可参见前面的实施例，在此不再赘述。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (15)

  1. 一种数据驱动电路，其中，所述数据驱动电路包括多个级连的数据驱动单元以及多个电荷分享单元，其中，所述数据驱动单元用以接收数字视频数据并输出模拟视频讯号至对应的数据线，每一级的所述数据驱动单元包括锁存模块用以储存所述数字视频数据，所述多个级连的数据驱动单元两两成对用以提供极性反转的所述模拟视频讯号，每对所述数据驱动单元之间设置有所述电荷分享单元，每个所述电荷分享单元包括比较模块以及开关晶体管，所述比较模块连接于两个所述数据驱动单元的所述锁存模块并用于比较两个所述数据驱动单元中所储存的所述数字视频数据，所述开关晶体管连接两个所述数据驱动单元的输出端，所述比较模块的输出端连接所述开关晶体管的控制端。
  2. 根据权利要求1所述的数据驱动电路，其中，所述比较模块包括两个比较器，两个所述比较器的反向输入端输入所述默认灰阶值，两个所述比较器的非反向输入端分别连接两个所述数据驱动单元。
  3. 根据权利要求2所述的数据驱动电路，其中，所述比较模块还包括或门及两个反向器，两个所述比较器的输出端分别透过所述反向器连接所述或门的两个输入端，所述或门的输出端接所述开关晶体管的控制端。
  4. 根据权利要求2所述的数据驱动电路，其中，所述比较模块还包括与门及两个反向器，两个所述比较器的输出端分别透过所述反向器连接所述与门的两个输入端，所述与门的输出端接所述开关晶体管的控制端。
  5. 根据权利要求1所述的数据驱动电路，其中，所述比较模块设置为比 较两个所述数据驱动单元中所储存的两个所述数字视频数据，若其中一个所述数字视频数据的灰阶值大于默认灰阶值，则所述比较模块导通所述开关晶体管。
  6. 根据权利要求5所述的数据驱动电路，其中，所述比较模块设置为比较两个所述数据驱动单元中所储存的两个所述数字视频数据，若两个所述数字视频数据的灰阶值均大于默认灰阶值，则所述比较模块导通所述开关晶体管。
  7. 根据权利要求5所述的数据驱动电路，其中，所述比较模块设置为若所述数字视频数据的灰阶值均没有大于默认灰阶值，则所述比较模块不导通所述开关晶体管，两个所述数据驱动单元的所述输出端不进行电荷分享。
  8. 一种显示装置，其中，所述显示装置包括：
    控制单元；以及
    显示面板，包括像素阵列以及数据驱动电路；其中，所述控制单元连接于所述数据驱动电路，用以提供数字视频数据，所述数据驱动电路连接于所述像素阵列，用以提供模拟视频讯号至所述像素阵列，所述数据驱动电路包括多个级连的数据驱动单元以及多个电荷分享单元，其中，所述数据驱动单元用以接收所述数字视频数据并输出所述模拟视频讯号至对应的数据线，每一级的所述数据驱动单元包括锁存模块用以储存所述数字视频数据，所述多个级连的数据驱动单元两两成对用以提供极性反转的所述模拟视频讯号，每对所述数据驱动单元之间设置有所述电荷分享单元，每个所述电荷分享单元包括比较模块以及开关晶体管，所述比较模块连接于两个所述数据驱动单元的所述锁存模块并用 于比较两个所述数据驱动单元中所储存的所述数字视频数据，所述开关晶体管连接每对所述数据驱动单元的输出端，所述比较模块的输出端连接所述开关晶体管的控制端。
  9. 根据权利要求8所述的显示装置，其中，所述比较模块包括两个比较器，两个所述比较器的反向输入端输入所述默认灰阶值，两个所述比较器的非反向输入端分别连接两个所述数据驱动单元。
  10. 根据权利要求9所述的显示装置，其中，所述电荷分享单元还包括启动模块连接于所述比较模块与所述开关晶体管之间，所述控制单元用以控制所述启动模块于所述模拟视频讯号的输出间隔时间导通。
  11. 根据权利要求9所述的显示装置，其中，所述比较模块还包括或门及两个反向器，两个所述比较器的输出端分别透过所述反向器连接所述或门的两个输入端，所述或门的输出端接所述开关晶体管的控制端。
  12. 根据权利要求9所述的显示装置，其中，所述比较模块还包括与门及两个反向器，两个所述比较器的输出端分别透过所述反向器连接所述与门的两个输入端，所述与门的输出端接所述开关晶体管的控制端。
  13. 根据权利要求8所述的显示装置，其中，所述比较模块设置为比较两个所述数据驱动单元中所储存的两个所述数字视频数据，若其中一个所述数字视频数据的灰阶值大于默认灰阶值，则所述比较模块导通所述开关晶体管。
  14. 根据权利要求13所述的显示装置，其中，所述比较模块设置为比较两个所述数据驱动单元中所储存的两个所述数字视频数据，若两个所述数字视 频数据的灰阶值均大于默认灰阶值，则所述比较模块导通所述开关晶体管。
  15. 根据权利要求13所述的显示装置，其中，所述比较模块设置为若所述数字视频数据的灰阶值均没有大于默认灰阶值，则所述比较模块不导通所述开关晶体管，两个所述数据驱动单元的所述输出端不进行电荷分享。
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