WO2023035792A1

WO2023035792A1 - Circuit board structure capable of reducing insertion loss, manufacturing method, and electronic device

Info

Publication number: WO2023035792A1
Application number: PCT/CN2022/107782
Authority: WO
Inventors: 刘丰; 丁利斌; 于超伟; 朱文学; 郭翔
Original assignee: 华为技术有限公司
Priority date: 2021-09-09
Filing date: 2022-07-26
Publication date: 2023-03-16
Also published as: CN115776759A

Abstract

A circuit board structure capable of reducing insertion loss, a manufacturing method, and an electronic device, relating to the technical field of chip packages. The circuit board structure capable of reducing insertion loss comprises a chip package, a first circuit board, and a second circuit board. The chip package comprises a chip and a package substrate. The chip and the package substrate are electrically connected. The chip package is located on the first circuit board, a fine pitch is used when wires are led out of the first circuit board, and the first circuit board is electrically connected to the second circuit board. The first circuit board comprises a first transmission link, the second circuit board comprises a second transmission link, and the transmission rate of the first transmission link is higher than the transmission rate of the second transmission link. By means of the solution provided by the present application, the first circuit board is added between the package substrate and the second circuit board, and the chip package is disposed on the first circuit board; thus, the size of the chip package is reduced, the insertion loss of the package substrate is further reduced, the cost of the circuit board is reduced, and the reliability of the circuit board is improved.

Description

Circuit board structure, manufacturing method and electronic equipment for reducing insertion loss

This application claims the priority of the Chinese patent application submitted to the State Intellectual Property Office of China on September 09, 2021, with the application number 202111056672.0, and the title of the invention is "a circuit board structure, manufacturing method and electronic equipment with reduced insertion loss", The entire contents of which are incorporated by reference in this application.

technical field

The present application relates to the technical field of chip packaging, in particular to a circuit board structure, a manufacturing method and electronic equipment for reducing insertion loss.

Background technique

A chip package includes a chip and a package substrate. At present, when connecting the chip package and the data port in the traditional solution, the chip package and the data port are respectively arranged on the surface of the printed circuit board (Printed Circuit Board, PCB), and the package substrate of the chip package is connected through the high-speed wiring of the PCB. and data ports.

However, with the development and evolution of 112G+ (112Gbps+, data transmission of 112 gigabits per second and above) products, the data transmission rate and data transmission volume of the application chip package system have risen sharply, resulting in an increase in the size of the chip. The increase in the size of the chip also increases the required packaging substrate, resulting in an increase in the length of the transmission link in the packaging substrate, that is, an increase in the insertion loss of the packaging substrate.

For the above scheme of using PCB to connect the packaging substrate and data port, in order to reduce the insertion loss of the packaging substrate, it is necessary to minimize the length of the PCB traces, and use thick dielectric and low transmission loss PCB materials to increase the cost of the PCB and ensure reliability. reduced sex.

Contents of the invention

In order to solve the above problems, the present application provides a circuit board structure with reduced insertion loss, a manufacturing method of the circuit board structure, and electronic equipment, which are convenient for reducing the size of the chip package, thereby reducing the insertion loss of the package substrate, and reducing the circuit board. Cost, improve the reliability of the circuit board.

In a first aspect, the present application provides a circuit board structure with reduced insertion loss, and the circuit board structure with reduced insertion loss includes a chip package, a first circuit board and a second circuit board. Wherein, the chip package includes a chip and a package substrate, and the chip and the package substrate are electrically connected. The chip package is located on the first circuit board, the first circuit board adopts dense pin pitch when going out, and the first circuit board is electrically connected with the second circuit board. The first circuit board includes a first transmission link, and the second circuit board includes a second transmission link. The transmission rate of the first transmission link is higher than the transmission rate of the second transmission link, that is, the similar carrier board is used to carry high-speed link, the second circuit board is used to carry the low-speed link.

In the circuit board structure for reducing insertion loss provided by the embodiment of the present application, a first circuit board is added between the package substrate and the second circuit board, and the chip package is arranged on the first circuit board, because the first circuit board uses Dense pitch (fine pitch) improves the wiring density when going out, and reduces the connection between the packaging substrate and the first circuit board. The bottom surface area of the packaging substrate is limited by the wiring density, so it is convenient for the packaging substrate to reduce the area, that is, for the chip The package size is reduced, which in turn reduces the insertion loss of the package substrate. After the high-speed link is carried by the similar carrier board, the remaining low-speed links are carried by the second circuit board, which reduces the material requirements and assembly difficulty of the second circuit board, improves the reliability of the second circuit board, and makes the second circuit board The board can use less costly materials, thus also reducing costs.

In a possible implementation manner, the first circuit board is a substrate-like PCB (substrate-like PCB, SLP).

The carrier-like board supports the design of dense pitch, and has strong wire-out ability. When carrying a chip package, the pitch can be 0.65mm or less, which improves the wiring density of the high-speed link and facilitates the reduction of the size of the chip package.

In a possible implementation manner, a filter module is embedded in the first circuit board, and the filter module is used for filtering. Specifically, the filter module can be used to filter the power supply of the chip package. As the data processing capacity and data processing rate of the chip increase, the power consumption of the chip also gradually increases, which increases the power supply specification of the chip and the current of the chip when it is working. Therefore, it is necessary to filter the power supply for the chip , to ensure the stability of the chip work. In addition, the filter module can also be used for high-frequency interference signals in the circuit.

In a possible implementation manner, the filter module includes at least one of an inductor or a capacitor. When the filter module includes capacitors, the number of capacitors can be one or more, and when multiple capacitors are included, the capacitors are connected in parallel.

In a possible implementation manner, the second circuit board includes a first slot. The first circuit board is fully embedded in the first slot, or the first circuit board is partially embedded in the first slot.

When all the first circuit boards are inserted into the first slots, the connection between the first circuit board and the second circuit board is highly stable, and the height of the circuit board structure is reduced, that is, the volume of the circuit board structure is reduced. The level of the upper surface of the first circuit board may be lower than the level of the upper surface of the second circuit board, or the upper surface of the first circuit board and the upper surface of the second circuit board are at the same level, which is not specifically limited in the present application .

When the first circuit board is partially inserted into the first slot, the level of the upper surface of the first circuit board is higher than the level of the upper surface of the second circuit board, which can increase the heat dissipation speed of the first circuit board.

In a possible implementation manner, the first circuit board and the second circuit board are connected through a first connection part, and the first connection part is any one of metal solder balls, sintering, metal structural parts, or plug-in terminals. kind.

Wherein, when the first connection part is a metal solder ball, the first circuit board and the second circuit board are assembled by welding; when the first connection part is a metal structure or a plug-in terminal, the first circuit board The assembly is realized by pressure contact with the second circuit board; when the first connecting part is sintered, the first circuit board and the second circuit board are assembled by low-temperature sintering.

In a possible implementation manner, the circuit board structure for reducing insertion loss further includes a third circuit board, and a filter module is embedded in the third circuit board. The third circuit board is located between the first circuit board and the second circuit board, and the filter module can be used to filter the power supply of the chip package.

As the data processing capacity and data processing rate of the chip increase, the power consumption of the chip also gradually increases, which increases the power supply specification of the chip and the current of the chip when it is working. Therefore, it is necessary to filter the power supply for the chip , to ensure the stability of the chip work.

In a possible implementation manner, the third circuit board is a carrier-like board.

The carrier board is used to carry high-speed links, supports the design of dense pitch, improves the wiring density of high-speed links, and can cooperate with the first circuit board for wiring, thereby reducing the loss during filtering.

In a possible implementation manner, the filter module includes at least one of an inductor or a capacitor.

When the filter module includes capacitors, the number of capacitors can be one or more, and when multiple capacitors are included, the capacitors are connected in parallel.

In a possible implementation manner, the second circuit board includes a first slot. The level of the upper surface of the first circuit board is higher than the level of the upper surface of the second circuit board. The third circuit board is fully embedded in the first slot, or the third circuit board is partially embedded in the first slot.

When the third circuit board is fully embedded in the first slot, the connection between the third circuit board and the second circuit board is highly stable, and the height of the circuit board structure is reduced, that is, the volume of the circuit board structure is reduced. The level of the upper surface of the third circuit board may be lower than the level of the upper surface of the second circuit board, or the upper surface of the third circuit board and the upper surface of the second circuit board are at the same level, which is not specifically limited in the present application .

When the third circuit board is partially embedded in the first slot, the level of the upper surface of the third circuit board is higher than the level of the upper surface of the second circuit board, which can increase the heat dissipation speed of the third circuit board.

In a possible implementation manner, the second circuit board includes a first slot. All the third circuit boards are embedded in the first slots. The first circuit board is fully embedded in the first slot, or the first circuit board is partially embedded in the first slot.

When the first circuit board is fully embedded in the first slot, the connection between the third circuit board and the second circuit board is highly stable. The level of the upper surface of the first circuit board may be lower than the level of the upper surface of the second circuit board, or the upper surface of the first circuit board and the upper surface of the second circuit board are at the same level, which is not specifically limited in the present application .

In a possible implementation manner, the first circuit board and the third circuit board are connected through the second connection part, and the third circuit board and the second circuit board are connected through the third connection part. The second connection part or the third connection part is any one of metal solder balls, sintering, metal structural parts or plug terminals.

Wherein, when the second connection part or the third connection part is a metal solder ball, the first circuit board and the second circuit board are assembled by welding; when the second connection part or the third connection part is a metal structure Or when inserting terminals, the first circuit board and the second circuit board are assembled by means of pressure contact; when the second connection part or the third connection part is sintered, the connection between the first circuit board and the second circuit board Assembled by low temperature sintering.

The second connection part and the third connection part may adopt the same implementation manner, or may adopt different implementation manners, which is not specifically limited in this embodiment of the present application.

In a possible implementation manner, the first circuit board further includes one or more data ports, and the one or more data ports are connected to the chip package through the first transmission link.

In a possible implementation manner, the one or more data ports include any one of an on-board optical connection assembly OBO or an input-output port.

In a second aspect, the present application further provides an electronic device, which uses the circuit board structure for reducing insertion loss provided by any one of the above implementation manners, and further includes a power supply. The power supply is used to power the chip.

The circuit board structure for reducing insertion loss applied in the electronic equipment adds a first circuit board between the packaging substrate and the second circuit board, and the chip package is arranged on the first circuit board, because the first circuit board adopts a dense pitch The wiring density of the outgoing line is improved, and the wiring density of the packaging substrate is reduced when the packaging substrate is connected to the first circuit board. The area of the bottom surface of the packaging substrate is limited by the wiring density. Insertion loss of package substrate. After the high-speed link is carried by the similar carrier board, the remaining low-speed links are carried by the second circuit board, which reduces the material requirements and assembly difficulty of the second circuit board, improves the reliability of the second circuit board, and makes the second circuit board The board can use lower-cost materials, so the cost of the second circuit board is also reduced, that is, the hardware cost of the electronic device is reduced, and the reliability of the electronic device is improved.

In a possible implementation manner, the power supply is a multi-phase step-down circuit.

The multi-phase step-down circuit includes multiple step-down circuits connected in parallel, and the output ends of the multi-way step-down circuits are connected in parallel to supply power to the chip. Working current. The filter inductor and/or filter capacitor in the multi-phase step-down circuit can be integrated in the filter module and embedded in the first circuit board or the third circuit board.

In a possible implementation, the electronic device is any one of routers, switches, servers, or data center cluster devices, that is, electronic devices are used in scenarios with large transmission capacity and high transmission rate. The loss requirement of the electronic device is strict, so the technical solution provided by the application is used to improve the performance of the electronic device when it is applied in the above scenarios.

In a third aspect, the present application also provides a method for manufacturing a circuit board structure, which is used to manufacture the circuit board structure with reduced insertion loss provided by the above implementation, and the manufacturing method includes the following steps:

using a dense pin pitch on the first circuit board, and laying out a first transmission link on the first circuit board;

Laying a second transmission link on the second circuit board, the transmission rate of the first transmission link is higher than the transmission rate of the second transmission link;

electrically connecting the first circuit board to the second circuit board, and then electrically connecting the chip package to the first circuit board;

Alternatively, after the chip package is electrically connected to the first circuit board, the first circuit board is electrically connected to the second circuit board.

With the circuit board structure manufactured by this manufacturing method, a first circuit board is added between the packaging substrate and the second circuit board, and the chip package is arranged on the first circuit board, because the first circuit board adopts a dense pitch ( fine pitch), which improves the wiring density when going out, and reduces the connection between the package substrate and the first circuit board. The bottom surface area of the package substrate is limited by the wiring density, so it is convenient to reduce the area of the package substrate, that is, to reduce the size of the chip package, Further, the insertion loss of the packaging substrate is reduced. After the high-speed link is carried by the similar carrier board, the remaining low-speed links are carried by the second circuit board, which reduces the material requirements and assembly difficulty of the second circuit board, improves the reliability of the second circuit board, and makes the second circuit board The board can use less costly materials, thus also reducing costs.

In a possible implementation manner, the first circuit board is a carrier-like board.

In a possible implementation manner, before electrically connecting the first circuit board to the second circuit board, the method further includes:

embedding a filter module in the first circuit board;

Alternatively, before electrically connecting the chip package to the first circuit board, the method further includes:

A filtering module is embedded in the first circuit board; the filtering module is used for filtering.

In a possible implementation, before electrically connecting the first circuit board to the second circuit board, the method further includes:

opening the first slot on the second circuit board;

Electrically connecting the first circuit board to the second circuit board specifically includes:

All the first circuit is embedded in the first slot, or the first circuit board is partially embedded in the first slot.

In a possible implementation manner, electrically connecting the first circuit board to the second circuit board specifically includes:

The first circuit board and the second circuit board are electrically connected by using the first connection part, and the first connection part is any one of the following:

Metal solder balls, sinters, metal structures or socket terminals.

Embedding a filter module in the third circuit board, the filter module is used for filtering;

The third circuit board is arranged between the first circuit board and the second circuit board, so that the first circuit board is electrically connected to the second circuit board after passing through the third circuit board.

opening the first slot on the second circuit board;

Insert all of the third circuit board into the first slot, or partially insert the third circuit board into the first slot.

opening the first slot on the second circuit board;

Insert all the first circuit board into the first slot, or partially insert the first circuit board into the first slot.

using the second connection part to electrically connect the first circuit board and the third circuit board;

The second circuit board is electrically connected to the third circuit board by using the third connection part, and the second connection part may be any one of the following:

Metal solder balls, sinters, metal structures or socket terminals.

Description of drawings

Fig. 1 is a schematic diagram of connection between a chip package and a data port provided by the prior art;

FIG. 2 is a schematic diagram of a circuit board structure for reducing insertion loss provided by an embodiment of the present application;

FIG. 3A is a schematic diagram of another circuit board structure for reducing insertion loss provided by an embodiment of the present application;

FIG. 3B is a schematic diagram of another circuit board structure for reducing insertion loss provided by the embodiment of the present application;

FIG. 4 is a schematic diagram of another circuit board structure for reducing insertion loss provided by the embodiment of the present application;

FIG. 5 is a schematic diagram of another circuit board structure for reducing insertion loss provided by an embodiment of the present application;

FIG. 6 is a schematic diagram of another circuit board structure for reducing insertion loss provided by an embodiment of the present application;

FIG. 7 is a schematic diagram of another circuit board structure for reducing insertion loss provided by an embodiment of the present application;

FIG. 8 is a schematic diagram of another circuit board structure for reducing insertion loss provided by an embodiment of the present application;

FIG. 9 is a flow chart of a method for manufacturing a circuit board structure provided in an embodiment of the present application;

FIG. 10 is a flowchart of another method for manufacturing a circuit board structure provided by an embodiment of the present application;

FIG. 11 is a flow chart of another method for manufacturing a circuit board structure provided by an embodiment of the present application;

FIG. 12 is a flow chart of another method for manufacturing a circuit board structure provided by an embodiment of the present application;

FIG. 13 is a schematic diagram of an electronic device provided by an embodiment of the present application.

Detailed ways

In order to enable those skilled in the art to understand the solution of the present application more clearly, the application scenarios of the technical solution provided in the present application are first described below.

For scenarios with large transmission capacity and high transmission rates such as switches, routers, and data center clusters, the 112G+ high-speed system architecture is currently used. With the increase in data transmission volume and output transmission rate, the size of the chips used increases, and the packaging of the chips The size of the substrate has also increased accordingly, and the high-speed system architecture has stricter requirements on the loss of high-speed transmission links. The increase of the chip and the package substrate increases the insertion loss of the package substrate. In order to improve the performance of the chip package, it is necessary to minimize the insertion loss.

Referring to FIG. 1 , this figure is a schematic diagram of connection between a chip package and a data port provided in the prior art.

The illustrated chip package includes a chip 101 and a package substrate 102 .

The electrical connection between the chip 101 and the package substrate 102 is not specifically limited in the present application.

The packaging substrate 102 includes a transmission link, and the transmission loss of the transmission link in the packaging substrate 102 is also the insertion loss of the packaging substrate 102. The insertion loss of the packaging substrate 102 is an important part of the insertion loss of the chip package, so the loss of the packaging substrate 102 is reduced. Insertion loss, that is, it can effectively reduce the insertion loss of the chip package.

In the solution shown in the figure, the chip package is directly mounted on the PCB 20, and the package substrate 102 and the data port 30 are connected through the traces 21 in the PCB 20. Since the package substrate 102 is connected to the chip 101, the connection between the chip 101 and the data port 30 is realized. connect.

When the current solution is to mount a chip package on the PCB 20 , it usually adopts a Ball Grid Array (BGA) package, and usually adopts a pitch of 0.9 mm (mm). Among them, pitch refers to the distance between the centers of two adjacent connection units on the board surface. The smaller the pitch, the tighter the connection units can be arranged, and the tighter the connection lines can be arranged accordingly.

And when the pitch of the BGA package is 0.9mm, the pitch of the corresponding chip also needs to be 0.9mm, so the size of the chip package is limited, so that the size of the chip package needs to be about 110mm*110mm; at the same time, the package size is under , the total length of the traces in the package substrate reaches 40 mm or more, and the insertion loss of the traces on the package substrate alone reaches more than 8 decibels (dB), which makes the overall insertion loss of the chip package large, which cannot meet the needs of high-speed system architectures for high-speed transmission chains. Road loss requirements.

In order to reduce the loss of the overall system as much as possible, the loss of the wiring 21 of the PCB 20 can only be reduced to the greatest extent. It is necessary to compress the length of the wiring 21 to the greatest extent, and use thick dielectric and low-loss boards, so that the reliability risk of the PCB and costs have increased dramatically.

In order to solve the above problems, the present application provides a circuit board structure with reduced insertion loss, a manufacturing method of the circuit board structure, and electronic equipment. The circuit board structure for reducing insertion loss includes a chip package, a first circuit board and a second circuit board. The chip package includes a chip and a package substrate, and the chip and the package substrate are electrically connected. The chip package is located on the first circuit board, the first circuit board adopts a dense pin pitch to lead out, and the first circuit board is electrically connected to the second circuit board. The first circuit board includes a first transmission link, the second circuit board includes a second transmission link, and the transmission rate of the first transmission link is higher than the transmission rate of the second transmission link. In this solution, the first circuit board is added between the packaging substrate and the second circuit board, and the chip package is placed on the first circuit board, because the first circuit board supports the design of dense pitch, which improves the wiring density of high-speed links , so it is convenient to reduce the size of the chip package, thereby reducing the insertion loss of the package substrate. After the high-speed link is carried by the similar carrier board, the remaining low-speed links are carried by the second circuit board, which reduces the material requirements and assembly difficulty of the second circuit board, improves the reliability of the second circuit board, and makes the second circuit board The board can use less costly materials, thus also reducing costs.

In order to make those skilled in the art understand the solutions of the present application more clearly, the technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

Words such as "first" and "second" in the description of this application are only used for descriptive purposes, and should not be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features

In this application, unless otherwise clearly stipulated and limited, the term "connection" should be understood in a broad sense, for example, "connection" can be a fixed connection, a detachable connection, or an integral body; it can be a direct connection, or Can be connected indirectly through intermediaries.

An embodiment of the present application provides a circuit board structure for reducing insertion loss, which will be described in detail below with reference to the accompanying drawings.

Referring to FIG. 2 , this figure is a schematic diagram of a circuit board structure for reducing insertion loss provided by an embodiment of the present application.

The illustrated circuit board structure for reducing insertion loss includes: a chip package, a first circuit board 40 and a second circuit board 20 .

Wherein, the chip package includes a chip 101 and a package substrate 102 .

The chip 101 is electrically connected to the packaging substrate 102 , and the embodiment of the present application does not specifically limit the connection manner of the chip 101 and the packaging substrate 102 .

The first circuit board 40 uses a fine pitch for wiring. Dense pitch generally means that the distance between the centers of two adjacent connection units on the board is less than or equal to 0.65mm, so that the layout of the connection units is tight, and the connection lines can be arranged closely accordingly. When the packaging substrate 102 and the first circuit board 40 are packaged in BGA, the pitch refers to the distance between the centers of two adjacent solder balls.

The chip package is located on the first circuit board 40 , and the first circuit board 40 is stacked on the second circuit board 20 .

The first circuit board 40 is electrically connected to the second circuit board 20 .

The first circuit board 40 includes a first transmission link 201 , and the second circuit board includes a second transmission link 202 .

Wherein, the transmission rate of the first transmission link 201 is higher than the transmission rate of the second transmission link 202 .

That is, the first circuit board 40 is used to carry a high-speed link, and the second circuit board 20 is used to carry a low-speed link.

In the circuit board structure for reducing insertion loss provided by the embodiment of the present application, a first circuit board is added between the packaging substrate and the second circuit board, and the chip package is arranged on the first circuit board, because the first circuit board uses dense pins The pitch of the BGA package can be reduced to 0.65mm or below when the chip is packaged, which greatly reduces the pitch of the BGA package and improves the wiring density of the high-speed link, thus making the chip The size of the package can be further reduced. Tests show that the solution of this application can reduce the size of the chip package from 110mm*110mm in the traditional solution to 80mm*80mm, and shorten the wiring length in the package substrate from 40mm in the traditional solution to 20mm. The insertion loss of the packaging substrate is reduced by 50%.

In addition, when the high-speed link is carried by the first circuit board, the remaining low-speed links can be carried by the second circuit board, which reduces the material requirements and assembly difficulty for the second circuit board, and the second circuit board no longer needs to use thick Medium and low-loss boards, and low-cost non-high-speed boards can be used, so the cost and assembly difficulty are also reduced, and the reliability of the second circuit board is improved.

The following will describe in conjunction with a specific implementation manner.

Continuing to refer to FIG. 2 , the first circuit board 40 is also equipped with a data port 30 , and the embodiment of the present application does not specifically limit the number of data ports on the first circuit board 40 .

The first circuit board 40 adopts a substrate-like PCB (substrate-like PCB, SLP). Small and the line width of the outgoing line is thinner, thereby increasing the density of the outgoing line.

The data port 30 may be an input/output (Input/Output, I/O) port or an on-board optical connection assembly (On-Board Optics, OBO), etc., which is not specifically limited in this embodiment of the present application.

The data port 30 is connected to the chip package through the first transmission link 201 , that is, the data port 30 is connected to the chip package through a high-speed link.

The first circuit board 40 is connected to the second circuit board 20 through the first connecting portion 50 .

The first connection portion 50 may be any one of metal solder balls, sintering, metal structural parts, or plug terminals, which is not specifically limited in this embodiment of the present application.

Wherein, when the first connecting portion 50 is a metal solder ball, the first circuit board 40 and the second circuit board 20 are assembled by welding, which can connect the first circuit board 40 and the second circuit board 20 Make a firm connection between them.

When the first connecting part 50 is a metal structure or a plug-in terminal, the first circuit board 40 and the second circuit board 20 are assembled by means of pressure contact, which reduces the number of times of soldering of similar carrier boards and improves reliability . In a possible implementation manner, the first connecting part 50 is specifically a PCB socket (Socket) or a connector.

When the first connecting portion 50 is sintered, the first circuit board 40 and the second circuit board 20 are assembled by low-temperature sintering.

Using the above circuit board structure for reducing insertion loss, a first circuit board is added between the packaging substrate and the second circuit board, and the chip package is arranged on the first circuit board. Since the first circuit board is a carrier-like board, it supports The outlet design with dense pin pitch has stronger outlet ability. When the chip package is installed, the pitch of the BGA package can be 0.65mm or less, which improves the wiring density of the high-speed link, so that the size of the chip package can be further reduced, thereby reducing the Insertion loss of package substrate. When the high-speed link is carried by the similar carrier board, the remaining low-speed links can be carried by the second circuit board, which reduces the material requirements and assembly difficulty of the second circuit board, and the second circuit board no longer needs to use thick dielectric, low Lossy boards can be used instead of low-cost non-high-speed boards, so the cost and assembly difficulty are also reduced, and the reliability of the second circuit board is improved.

Another implementation of the circuit board structure for reducing insertion loss is described below.

Referring to FIG. 3A , this figure is a schematic diagram of another circuit board structure for reducing insertion loss provided by an embodiment of the present application.

The circuit board structure for reducing insertion loss shown in FIG. 3A includes a chip package, a first circuit board 40 and a second circuit board 20 .

Wherein, the chip package includes a chip 101 and a package substrate 102 , and the chip 101 and the package substrate 102 are electrically connected.

The first circuit board 40 includes a first transmission link 201 , and the second circuit board includes a second transmission link 202 . Wherein, the transmission rate of the first transmission link 201 is higher than the transmission rate of the second transmission link 202 . That is, the first circuit board 40 is used to carry a high-speed link, and the second circuit board 20 is used to carry a low-speed link.

A data port 30 is also mounted on the first circuit board 40, and the data port 30 may be an input/output port or an onboard optical connection component.

Other load devices 60 are mounted on the second circuit board 20 , and the specific type and quantity of the load devices 60 are not limited in the embodiment of the present application.

The first circuit board 40 adopts a carrier-like board, which can achieve a smaller pitch and a thinner line width of outgoing lines, thereby increasing the density of outgoing lines.

The difference between the circuit board structure with reduced insertion loss shown in FIG. 3A and FIG. 2 is that the second circuit board 20 of the circuit board structure with reduced insertion loss shown in FIG. 3A includes a first slot 203 . The first circuit board 40 is fully inserted into the first slot 203 .

When the first circuit board 40 is fully embedded in the first slot 203, the stability of the connection between the first circuit board 40 and the second circuit board 20 is high, and the height of the circuit board structure is reduced, thereby reducing the size of the circuit board. The overall volume of the structure. The level of the upper surface of the first circuit board 40 may be lower than the level of the upper surface of the second circuit board 20, or the upper surface of the first circuit board 40 and the upper surface of the second circuit board 20 are at the same level. This is not specifically limited.

In FIG. 3A , the upper surface of the first circuit board 40 and the upper surface of the second circuit board 20 are at the same level as an example.

The first connecting portion between the first circuit board 40 and the second circuit board 20 may be any one of metal solder balls, sintering, metal structural parts, or plug terminals. The illustrated first connecting portion is sintered.

Refer to 3B, which is a schematic diagram of another circuit board structure for reducing insertion loss provided by the embodiment of the present application.

The circuit board structure with reduced insertion loss shown in FIG. 3B differs from that in FIG. 3A in that: the first circuit board 40 is partially embedded in the first slot 203, and the level of the upper surface of the first circuit board 40 is higher than that of the second circuit board. The horizontal height of the upper surface of the first circuit board 40 can increase the heat dissipation speed of the first circuit board 40 .

To sum up, using the circuit board structure with reduced insertion loss provided by the embodiment of the present application, the first circuit board is added between the packaging substrate and the second circuit board, and the chip package is arranged on the first circuit board. The first circuit board is a similar carrier board, which supports the design of dense pin-pitch outlets, and the outlet capability is stronger. When the chip is packaged, the pitch of the BGA package can be 0.65mm or less, which improves the wiring density of the high-speed link, so that the chip The size of the package can be further reduced, thereby reducing the insertion loss of the package substrate. When the high-speed link is carried by the similar carrier board, the remaining low-speed links can be carried by the second circuit board, which reduces the material requirements and assembly difficulty of the second circuit board, and the second circuit board no longer needs to use thick dielectric, low Lossy boards can be used instead of low-cost non-high-speed boards, so the cost and assembly difficulty are also reduced, and the reliability of the second circuit board is improved. In addition, all or part of the first circuit board is embedded in the first slot of the second circuit board, which improves the reliability of the connection between the first circuit board and the second circuit board, and also reduces the height of the circuit board structure, that is, reduces the The volume of the board structure.

Other implementations of the circuit board structure for reducing insertion loss are described below.

Referring to FIG. 4 , this figure is a schematic diagram of another circuit board structure for reducing insertion loss provided by an embodiment of the present application.

The circuit board structure for reducing insertion loss shown in FIG. 4 includes a chip package, a first circuit board 40 and a second circuit board 20 .

The first circuit board 40 includes a first transmission link 201 , and the second circuit board includes a second transmission link 202 . Wherein, the transmission rate of the first transmission link 201 is higher than the transmission rate of the second transmission link 202 . That is, the first circuit board 40 is used to carry the high-speed link, and the second circuit board 20 is used to carry the low-speed link.

The difference between the circuit board structure for reducing insertion loss shown in FIG. 4 and that of FIG. 2 is that a filter module 401 is embedded in the first circuit board 40 of the circuit board structure for reducing insertion loss shown in FIG. 4 , and the filter module 401 is used to perform filtering.

The filtering module 401 includes at least one of an inductor or a capacitor.

When the filter module 401 includes capacitors, there may be one or more capacitors, and when multiple capacitors are included, the capacitors are connected in parallel.

In a possible implementation, as the data processing capacity and data processing rate of the chip increase, the power consumption of the chip also gradually increases, so that the power supply specification of the chip increases, and the current of the chip during operation increases. The power supply for the chip needs to be filtered to ensure the stability of the chip operation, that is, the filter module 401 is used to filter the power supply of the chip package.

In another possible implementation, the filter module 401 includes a decoupling capacitor, which is used to provide an instantaneous current for the chip, so as to avoid the impact on the power supply caused by the current fluctuation generated when the chip starts up instantaneously or when the operating frequency is switched.

The filtering module 401 can also realize the functions in the above two implementation manners simultaneously.

The first connecting portion between the first circuit board and the second circuit board shown in FIG. 4 is specifically a PCB socket (socket), or a connector.

Referring to FIG. 5 , this figure is a schematic diagram of another circuit board structure for reducing insertion loss provided by an embodiment of the present application.

The difference between the circuit board structure with reduced insertion loss shown in FIG. 5 and FIG. 4 is that the second circuit board 20 of the circuit board structure with reduced insertion loss shown in FIG. 5 includes a first slot 203 . The first circuit board 40 is fully inserted into the first slot 203 .

In the figure, the upper surface of the first circuit board 40 and the upper surface of the second circuit board 20 are at the same level as an example.

The first connecting portion between the first circuit board 40 and the second circuit board 20 may be any one of metal solder balls, sintering, metal structural parts, or plug terminals.

Wherein, when the first connecting portion is a metal solder ball, the first circuit board 40 and the second circuit board 20 are assembled by welding, which can connect the first circuit board 40 and the second circuit board 20 Make a solid connection.

When the first connection part is a metal structure or a plug-in terminal, the assembly between the first circuit board 40 and the second circuit board 20 is achieved by pressure contact, which reduces the number of times of soldering of similar carrier boards and improves reliability. In a possible implementation manner, the first connecting part is specifically a PCB socket (Socket).

When the first connection part is sintered, the first circuit board 40 and the second circuit board 20 are assembled by low-temperature sintering.

The first connecting portion between the first circuit board and the second circuit board shown in FIG. 5 is specifically a PCB socket (socket), or a connector.

In another possible implementation, the first circuit board 40 is partially embedded in the first slot 203. At this time, the level of the upper surface of the first circuit board 40 is higher than the level of the upper surface of the second circuit board 20, which can be lifted. The heat dissipation rate of the first circuit board 40 .

The first transmission link 201 can be routed from the package substrate 102 to the first circuit board 40 and bypass the filter module 401 .

In other embodiments, the filter module 401 may also be partially embedded in the first circuit board 40 .

To sum up, using the circuit board structure with reduced insertion loss provided by the embodiment of the present application, the first circuit board is added between the packaging substrate and the second circuit board, and the chip package is arranged on the first circuit board. The first circuit board is a similar carrier board, which supports the design of dense pin-pitch outlets, and the outlet capability is stronger. When the chip is packaged, the pitch of the BGA package can be 0.65mm or less, which improves the wiring density of the high-speed link, so that the chip The size of the package can be further reduced, thereby reducing the insertion loss of the package substrate. When the high-speed link is carried by the similar carrier board, the remaining low-speed links can be carried by the second circuit board, which reduces the material requirements and assembly difficulty of the second circuit board, and the second circuit board no longer needs to use thick dielectric, low Lossy boards can be used instead of low-cost non-high-speed boards, so the cost and assembly difficulty are also reduced, and the reliability of the second circuit board is improved. All or part of the first circuit board is embedded in the first slot of the second circuit board, which improves the reliability of the connection between the first circuit board and the second circuit board, and also reduces the height of the circuit board structure, that is, reduces the number of circuit boards. The volume of the structure. In addition, the filter module is miniaturized, and the filter module is embedded in the first circuit board, which improves the integration level of the circuit board structure.

Another possible implementation of the circuit board structure for reducing insertion loss is described below.

Referring to FIG. 6 , this figure is a schematic diagram of another circuit board structure for reducing insertion loss provided by an embodiment of the present application.

The circuit board structure for reducing insertion loss shown in FIG. 6 includes: a chip package, a first circuit board 40 , a second circuit board 20 and a third circuit board 70 .

The first circuit board 40 is electrically connected to the third circuit board 70 , and the third circuit board 70 is electrically connected to the second circuit board 20 .

In some embodiments, the third circuit board 70 is also a carrier-like board, that is, the transmission link included in the third circuit board 70 is also a high-speed link.

A data port 30 is also mounted on the first circuit board 40, and the data port 30 can be an input/output port or an onboard optical connection assembly.

The difference between the circuit board structure for reducing insertion loss shown in FIG. 6 and that of FIG. 2 is: a third circuit board is also included between the first circuit board 40 and the second circuit board 20 of the circuit board structure for reducing insertion loss shown in FIG. 6 70. A filter module 401 is embedded in the third circuit board 70, and the filter module 401 is used for filtering.

Compared with FIG. 4 and FIG. 5 , the solution of the embodiment of the present application does not directly embed the filter module 401 in the first circuit board 40 , but embeds it in the third circuit board 70 , which reduces the process difficulty.

The filtering module 401 includes at least one of an inductor or a capacitor.

The first circuit board 40 and the third circuit board 70 are connected through the second connection part 90, and the third circuit board 70 and the second circuit board 20 are connected through the third connection part 80;

The second connection part 90 or the third connection part 80 is any one of metal solder balls, sintering, metal structural parts or plug terminals. Implementations of the second connection part 90 or the third connection part 80 may be the same or different, which is not specifically limited in this embodiment of the present application.

Wherein, when the second connecting portion 90 or the third connecting portion 80 is a metal solder ball, the circuit boards are assembled by welding, which can firmly connect adjacent circuit boards.

When the second connection part 90 or the third connection part 80 is a metal structure or a plug-in terminal, the circuit boards are assembled by pressure contact, which reduces the number of soldering times of the carrier-like board and improves reliability. In a possible implementation manner, the first connecting part is specifically a PCB socket (Socket) or a connector.

When the second connecting portion 90 or the third connecting portion 80 is sintered, the circuit boards are assembled by low temperature sintering.

Referring to FIG. 7 , this figure is a schematic diagram of another circuit board structure for reducing insertion loss provided by an embodiment of the present application.

The difference between the circuit board structure for reducing insertion loss shown in FIG. 7 and FIG. 6 is that the second circuit board 20 of the circuit board structure for reducing insertion loss shown in FIG. 7 includes a first slot 203 . The first circuit board 40 is fully inserted into the first slot 203 , and at this time, the third circuit board 70 is also fully inserted into the first slot 203 .

When the first circuit board 40 is fully embedded in the first slot 203, the connection between the third circuit board 70 and the second circuit board 20 is highly stable, and the height of the circuit board structure is reduced, thereby reducing the size of the circuit board. The overall volume of the structure. The level of the upper surface of the first circuit board 40 may be lower than the level of the upper surface of the second circuit board 20, or the upper surface of the first circuit board 40 and the upper surface of the second circuit board 20 are at the same level. This is not specifically limited.

In FIG. 7 , the upper surface of the first circuit board 40 and the upper surface of the second circuit board 20 are at the same level as an example.

In another possible implementation, the third circuit board 70 is fully embedded in the first slot 203, and the first circuit board 40 is partially embedded in the first slot 203. At this time, the level of the upper surface of the first circuit board 40 is high. The level of the upper surface of the second circuit board 20 can increase the heat dissipation speed of the first circuit board 40 .

Referring to FIG. 8 , this figure is a schematic diagram of another circuit board structure for reducing insertion loss provided by an embodiment of the present application.

The difference between the circuit board structure for reducing insertion loss shown in FIG. 8 and FIG. 6 is that the second circuit board 20 of the circuit board structure for reducing insertion loss shown in FIG. 8 includes a first slot 203 . The level of the upper surface of the first circuit board 40 is higher than the level of the upper surface of the second circuit board 20 , and the third circuit board 70 is fully inserted into the first slot 203 .

When the third circuit board 70 is fully embedded in the first slot 203, the connection between the third circuit board 70 and the second circuit board 20 is highly stable, and the height of the circuit board structure is reduced, thereby reducing the size of the circuit board. The overall volume of the structure. The level of the upper surface of the third circuit board 70 may be lower than the level of the upper surface of the second circuit board 20, or the upper surface of the third circuit board 70 and the upper surface of the second circuit board 20 are at the same level. This is not specifically limited.

In FIG. 8 , it is taken as an example that the upper surface of the third circuit board 70 is at the same level as the upper surface of the second circuit board 20 .

In another possible implementation, the third circuit board 70 is partially embedded in the first slot 203, at this time, the level of the upper surface of the third circuit board 70 is higher than the level of the upper surface of the second circuit board 20, which can lift the The heat dissipation rate of the third circuit board 70 .

The second connection part and the third connection part in the above Fig. 7 and Fig. 8 are realized by sintering.

To sum up, using the circuit board structure with reduced insertion loss provided by the embodiment of the present application, the first circuit board and the third circuit board are added between the packaging substrate and the second circuit board, and the chip package is arranged on the first circuit board. On the board, because the first circuit board is a similar carrier board, it supports the design of the outlet with dense pin pitch, and the outlet ability is stronger. When the chip package is installed, the pitch of the BGA package can be 0.65mm or less, which improves the wiring of high-speed links Density, so that the size of the chip package can be further reduced, thereby reducing the insertion loss of the package substrate. When the high-speed link is carried by the similar carrier board, the remaining low-speed links can be carried by the second circuit board, which reduces the material requirements and assembly difficulty of the second circuit board, and the second circuit board no longer needs to use thick dielectric, low Lossy boards can be used instead of low-cost non-high-speed boards, so the cost and assembly difficulty are also reduced, and the reliability of the second circuit board is improved. In this embodiment, the filter module is also miniaturized, and the filter module is embedded in the third circuit board, which improves the integration level of the circuit board structure. In addition, all or part of the stacked first circuit board and the third circuit board are embedded in the first slot of the second circuit board, which improves the reliability of the connection and reduces the height of the circuit board structure, that is, reduces the number of circuit boards. The volume of the plate structure.

The embodiment of the present application also provides a method for manufacturing a circuit board structure, which will be described in detail below with reference to the accompanying drawings.

Referring to FIG. 9 , this figure is a flowchart of a method for manufacturing a circuit board structure provided by an embodiment of the present application.

The manufacturing method includes the following steps:

S901: Use a dense pin pitch on the first circuit board to lead out, and lay out a first transmission link on the first circuit board.

Dense pitch generally means that the distance between the centers of two adjacent connection units on the board is less than or equal to 0.65mm, so that the layout of the connection units is tight, and the connection lines can be arranged closely accordingly. When the packaging substrate and the first circuit board are packaged in BGA, the pitch refers to the distance between the centers of two adjacent solder balls.

The filter module includes at least one of inductors or capacitors. When the filter module includes capacitors, the number of capacitors can be one or more, and when multiple capacitors are included, the capacitors are connected in parallel.

In a possible implementation, as the data processing capacity and data processing rate of the chip increase, the power consumption of the chip also gradually increases, so that the power supply specification of the chip increases, and the current of the chip during operation increases. It is necessary to filter the power supply for the chip to ensure the stability of the chip operation, that is, the filter module is used to filter the power supply of the chip package.

In another possible implementation, the filter module includes a decoupling capacitor, which is used to provide an instantaneous current for the chip, so as to avoid the impact on the power supply caused by the current fluctuation generated when the chip is started instantaneously or when the operating frequency is switched.

The filtering module can also realize the functions in the above two implementation manners at the same time.

S902: Lay out a second transmission link on the second circuit board, where the transmission rate of the first transmission link is higher than the transmission rate of the second transmission link.

That is, the first circuit board is used to carry the high-speed link, and the second circuit board is used to carry the low-speed link.

S903: Electrically connect the first circuit board to the second circuit board, and then electrically connect the chip package to the first circuit board.

Another manufacturing method will be described below.

Referring to FIG. 10 , this figure is a flow chart of another method for manufacturing a circuit board structure provided by an embodiment of the present application.

The manufacturing method includes the following steps:

S1001: Use dense pin pitches on the first circuit board to lead out, and lay out a first transmission link on the first circuit board.

S1002: Lay out a second transmission link on the second circuit board, where the transmission rate of the first transmission link is higher than the transmission rate of the second transmission link.

S1003: After electrically connecting the chip package to the first circuit board, electrically connecting the first circuit board to the second circuit board.

The difference between the method shown in FIG. 10 and FIG. 9 is that the electrical connection between the chip package and the first circuit board is before the connection between the first circuit board and the second circuit board.

The order of the above steps in the embodiment of the present application is only for convenience of description, and does not constitute a limitation to the technical solution of the present application. For example, the order of the above steps S901 and S902 can be exchanged.

The first circuit board is added between the packaging substrate and the second circuit board, and the chip package is placed on the first circuit board, because the first circuit board adopts a dense pitch method for outgoing lines, which has stronger outgoing line capability and carries chips. When packaging, the pitch of the BGA package can be 0.65mm or less, which greatly reduces the pitch of the BGA package and improves the wiring density of the high-speed link, so that the size of the chip package can be further reduced. The test shows that the application The solution can reduce the size of the chip package from 110mm*110mm in the traditional solution to 80mm*80mm, shorten the wiring length in the package substrate from 40mm in the traditional solution to 20mm, and reduce the insertion loss of the package substrate by 50%.

The following will describe in conjunction with a specific manufacturing method.

Referring to FIG. 11 , this figure is a flow chart of another method for manufacturing a circuit board structure provided by an embodiment of the present application.

S1101: Embedding a filter module in the first circuit board.

In some embodiments, the first circuit board adopts a carrier-like board, and the carrier-like board is manufactured by a carrier-like process, mainly using the build-up process method. Compared with the traditional PCB, the pitch can be smaller and the wiring can be achieved. The line width is thinner, which in turn increases the density of outgoing lines.

S1102: Use dense pin pitches on the first circuit board to lead out, and lay out the first transmission link on the first circuit board.

S1103: Open the first slot on the second circuit board.

S1104: Lay out the second transmission link on the second circuit board.

S1105: Use the first connection part to electrically connect the first circuit board and the second circuit board, and insert all the first circuit into the first slot, or insert part of the first circuit board into the first slot.

The first connecting portion may be any one of metal solder balls, sintering, metal structural parts, or plug-in terminals, which is not specifically limited in this embodiment of the present application.

Wherein, when the first connection part is a metal solder ball, the first circuit board and the second circuit board are assembled by welding, which can firmly connect the first circuit board and the second circuit board .

When the first connection part is a metal structural part or a plug-in terminal, the assembly between the first circuit board and the second circuit board is achieved by pressure contact, which reduces the number of soldering times of the carrier-like board and improves reliability. In a possible implementation manner, the first connecting part is specifically a PCB socket or a connector.

When the first connection part is sintered, the first circuit board and the second circuit board are assembled by low-temperature sintering.

When the first circuit board is fully embedded in the first slot, the connection between the first circuit board and the second circuit board is highly stable, and the height of the circuit board structure is reduced, thereby reducing the overall volume of the circuit board structure . The level of the upper surface of the first circuit board may be lower than the level of the upper surface of the second circuit board, or the upper surface of the first circuit board and the upper surface of the second circuit board are at the same level, which is not specifically limited in the present application .

When the first circuit board is partially embedded in the first slot, the level of the upper surface of the first circuit board is higher than the level of the upper surface of the second circuit board, which can increase the heat dissipation speed of the first circuit board.

S1106: Electrically connect the chip package to the first circuit board.

In some embodiments, a data port may also be provided on the first circuit board, and the data port and the chip package may be connected through a high-speed link. The data port may be an input/output port or an onboard optical connection component, which is not specifically limited in this embodiment of the present application.

The order of the above steps in the embodiment of the present application is only for convenience of description, and does not constitute a limitation to the technical solution of the present application, and the order of the above steps can be appropriately exchanged. For example, swap S1105 and S1106.

In the manufacturing method of the circuit board structure provided by the embodiment of the present application, the first circuit board is added between the packaging substrate and the second circuit board, and the chip package is arranged on the first circuit board. Since the first circuit board is a carrier-like board , supports dense pin-pitch outgoing line design, and has stronger outgoing line capability. When carrying a chip package, the pitch of the BGA package can be 0.65mm or less, which improves the wiring density of the high-speed link, so that the size of the chip package can be further reduced. Further, the insertion loss of the packaging substrate is reduced. When the high-speed link is carried by the similar carrier board, the remaining low-speed links can be carried by the second circuit board, which reduces the material requirements and assembly difficulty of the second circuit board, and the second circuit board no longer needs to use thick dielectric, low Lossy boards can be used instead of low-cost non-high-speed boards, so the cost and assembly difficulty are also reduced, and the reliability of the second circuit board is improved. The filter module is also miniaturized, and the filter module is embedded in the first circuit board, which improves the integration level of the circuit board structure.

In addition, all or part of the first circuit board is embedded in the first slot of the second circuit board, which improves the reliability of the connection between the first circuit board and the second circuit board, and also reduces the height of the circuit board structure, that is, reduces the The volume of the board structure.

Other implementations of the manufacturing method are described below.

Referring to FIG. 12 , this figure is a flow chart of another method for manufacturing a circuit board structure provided by an embodiment of the present application.

The manufacturing method includes the following steps:

S1201: Use dense pin pitches on the first circuit board to lead out, and lay out a first transmission link on the first circuit board.

S1202: Embedding a filter module in the third circuit board.

In some embodiments, the third circuit board adopts a similar carrier board, which can achieve a smaller pitch and a thinner line width of outgoing lines, thereby increasing the density of outgoing lines.

S1203: Open the first slot on the second circuit board.

S1204: Lay out the second transmission link on the second circuit board.

S1205: Use the second connection part to connect the first circuit board to the third circuit board, use the third connection part to connect the third circuit board to the second circuit board, and insert all or part of the first circuit into the first slot, or insert The third circuit board is fully or partially embedded in the first slot.

The second connection part and the third connection part may be any one of metal solder balls, sintering, metal structural parts, or plug-in terminals, which is not specifically limited in this embodiment of the present application.

Wherein, when the second connection part or the third connection part is a metal solder ball, the assembly is realized by welding between the first circuit board and the second circuit board, and this method can connect the first circuit board and the second circuit board Make a firm connection between them.

When the second connection part or the third connection part is a metal structure or a plug-in terminal, the first circuit board and the second circuit board are assembled by means of pressure contact, which reduces the number of times of welding of similar carrier boards and improves the reliability. In a possible implementation manner, the first connecting part is specifically a PCB socket or a connector.

When the second connection part or the third connection part is sintered, the first circuit board and the second circuit board are assembled by low-temperature sintering.

When the first circuit board is fully embedded in the first slot, the connection between the third circuit board and the second circuit board has high stability, and the height of the circuit board structure is reduced, thereby reducing the overall volume of the circuit board structure . The level of the upper surface of the first circuit board may be lower than the level of the upper surface of the second circuit board, or the upper surface of the first circuit board and the upper surface of the second circuit board are at the same level, which is not specifically limited in the present application .

When the third circuit board is fully embedded in the first slot, and the first circuit board is partially embedded in the first slot, the level of the upper surface of the first circuit board is higher than the level of the upper surface of the second circuit board, and the second circuit board can be lifted. The heat dissipation rate of a circuit board.

When the third circuit board is fully embedded in the first slot, and the first circuit board is not embedded in the first slot, the connection between the third circuit board and the second circuit board has high stability and reduces the structure of the circuit board. height, thereby reducing the overall volume of the circuit board structure. The level of the upper surface of the third circuit board may be lower than the level of the upper surface of the second circuit board, or the upper surface of the third circuit board and the upper surface of the second circuit board are at the same level, which is not specifically limited in the present application .

When the third circuit board is partially inserted into the first slot, the level of the upper surface of the third circuit board is higher than the level of the upper surface of the second circuit board, which can increase the heat dissipation speed of the third circuit board.

S1206: Electrically connect the chip package to the first circuit board.

The order of the above steps in the embodiment of the present application is only for convenience of description, and does not constitute a limitation to the technical solution of the present application, and the order of the above steps can be appropriately exchanged.

To sum up, using the manufacturing method provided by the embodiment of the present application, the first circuit board and the third circuit board are added between the packaging substrate and the second circuit board, and the chip package is arranged on the first circuit board. The first circuit board is a similar carrier board, which supports the design of dense pin-pitch outlets, and the outlet capability is stronger. When the chip is packaged, the pitch of the BGA package can be 0.65mm or less, which improves the wiring density of the high-speed link, so that the chip The size of the package can be further reduced, thereby reducing the insertion loss of the package substrate. When the high-speed link is carried by the similar carrier board, the remaining low-speed links can be carried by the second circuit board, which reduces the material requirements and assembly difficulty of the second circuit board, and the second circuit board no longer needs to use thick dielectric, low Lossy boards can be used instead of low-cost non-high-speed boards, so the cost and assembly difficulty are also reduced, and the reliability of the second circuit board is improved.

In this embodiment, the filter module is also miniaturized, and the filter module is embedded in the third circuit board, which improves the integration level of the circuit board structure. In addition, all or part of the stacked first circuit board and the third circuit board are embedded in the first slot of the second circuit board, which improves the reliability of the connection, and also reduces the height of the circuit board structure, that is, reduces the number of circuit boards. The volume of the plate structure.

The embodiment of the present application also provides an electronic device, in which the circuit board structure for reducing insertion loss provided by the above embodiments is applied, which will be described in detail below with reference to the accompanying drawings.

Referring to FIG. 13 , this figure is a schematic diagram of an electronic device provided by an embodiment of the present application.

The illustrated electronic device 900 includes a reduced insertion loss circuit board structure 901 and a power supply 902 .

The circuit board structure 901 for reducing insertion loss includes a chip package, and the power supply 902 is used to supply power to the chip package, that is, to supply power to the chip.

For the specific implementation manner and working principle of the circuit board structure 901 for reducing insertion loss, reference may be made to relevant descriptions in the above embodiments, and the embodiments of the present application are not repeated here.

In some embodiments, the electronic device 900 may be a terminal device, and the terminal device may be a mobile phone, a notebook computer, a wearable electronic device (such as a smart watch), a tablet computer, an augmented reality (augmented reality, AR) device, a virtual reality (virtual reality) reality, VR) equipment and vehicle-mounted equipment, etc., are not specifically limited in this embodiment of the present application.

In some other embodiments, the electronic device is any one of routers, switches, servers, or data center cluster devices, that is, when the electronic device is used in scenarios with large transmission capacity and high transmission rate, the loss of high-speed transmission links The requirements are strict, so the technical solution provided by this application fully improves the performance of the electronic device when it is applied in the above scenarios.

In the following, a scenario where an electronic device is applied to a large transmission capacity and a high transmission rate is taken as an example for description.

For electronic equipment currently using 112G+ high-speed system architecture, with the increase in data transmission volume and output transmission rate, the chip packaging in electronic equipment requires higher operating current. For example, the current operating current of some CPUs can reach 500A to 500A. 1000A or even above.

In some embodiments, in order to supply power to the chip package, the power supply 902 of the electronic device is a multi-phase step-down (Buck) circuit.

The multi-phase step-down circuit includes multiple step-down circuits connected in parallel, and the output ends of the multi-way step-down circuits are connected in parallel to supply power to the chip. Working current.

Each phase step-down circuit of the multi-phase step-down circuit includes an LC filter circuit, and the LC filter circuit includes an inductor and a capacitor.

In a possible implementation, when the above implementation shown in FIG. 4 or FIG. 5 is adopted, the inductor and/or capacitor included in the LC filter circuit can be integrated in the filter module 401 and embedded in the first In the circuit board 40, the degree of integration of electronic equipment is further improved.

In another possible implementation, when using any of the implementations in Figure 6 to Figure 8 above, the inductor and/or capacitor included in the LC filter circuit can be integrated in the filter module 401 and embedded in the In the third circuit board, the degree of integration of electronic equipment is further improved.

The circuit board structure for reducing insertion loss applied in the electronic equipment adds a first circuit board between the packaging substrate and the second circuit board, and sets the chip package on the first circuit board, because the first circuit board adopts dense The pin pitch improves the wiring density of the high-speed link, so it is convenient to reduce the area of the package substrate, that is, to reduce the size of the chip package, thereby reducing the insertion loss of the package substrate. The first circuit board may be a carrier-like board.

In summary, using the solutions provided by the embodiments of the present application improves the performance of electronic devices when they are used in the above scenarios.

It should be understood that in this application, "at least one (item)" means one or more, and "multiple" means two or more. "And/or" is used to describe the association relationship of associated objects, indicating that there may be three kinds of relationships.

Each embodiment in this specification is described in a progressive manner, the same and similar parts of each embodiment can be referred to each other, and each embodiment focuses on the differences from other embodiments. The embodiments described above are merely illustrative, wherein the modules described as separate components may or may not be physically separate. In addition, some or all of the modules can also be selected according to actual needs to achieve the purpose of the solution of this embodiment. It can be understood and implemented by those skilled in the art without creative effort.

The above description is only the specific implementation of the present application. It should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present application, some improvements and modifications can also be made. It should be regarded as the protection scope of this application.

Claims

A circuit board structure for reducing insertion loss, characterized in that the circuit board structure comprises: a chip package, a first circuit board and a second circuit board;

The chip package is located on the first circuit board, the first circuit board adopts a dense pin pitch, and the first circuit board is electrically connected to the second circuit board;

The first circuit board includes a first transmission link, the second circuit board includes a second transmission link, and the transmission rate of the first transmission link is higher than the transmission rate of the second transmission link.
The circuit board structure according to claim 1, wherein the first circuit board is a carrier-like board.
The circuit board structure according to claim 1 or 2, wherein a filter module is embedded in the first circuit board;

The filtering module is used for filtering.
The circuit board structure according to claim 3, wherein the filtering module is used to realize at least one of the following:

The power supply of the chip package is filtered, or the high-frequency interference signal in the circuit is filtered.
The circuit board structure according to claim 3, wherein the filtering module comprises at least one of the following:

inductance or capacitance.
The circuit board structure according to any one of claims 1 to 5, wherein the second circuit board comprises a first slot;

The first circuit board is fully embedded in the first slot, or the first circuit board is partially embedded in the first slot.
The circuit board structure according to any one of claims 1 to 6, wherein the first circuit board and the second circuit board are connected through a first connecting portion;

The first connecting part is any one of the following:

Metal solder balls, sinters, metal structures or socket terminals.
The circuit board structure according to claim 1, wherein the circuit board structure further comprises a third circuit board;

A filter module is embedded in the third circuit board;

The third circuit board is located between the first circuit board and the second circuit board;

The filtering module is used for filtering.
The circuit board structure according to claim 8, wherein the third circuit board is a carrier-like board.
The circuit board structure according to claim 8 or 9, wherein the filtering module comprises at least one of the following:

inductance or capacitance.
The circuit board structure according to any one of claims 8 to 10, wherein the second circuit board comprises a first slot;

The level of the upper surface of the first circuit board is higher than the level of the upper surface of the second circuit board;

The third circuit board is fully embedded in the first slot, or the third circuit board is partially embedded in the first slot.
The circuit board structure according to any one of claims 8 to 10, wherein the second circuit board comprises a first slot;

All of the third circuit boards are embedded in the first slots;

The first circuit board is fully embedded in the first slot, or the first circuit board is partially embedded in the first slot.
The circuit board structure according to any one of claims 8 to 12, wherein the first circuit board and the third circuit board are connected through a second connecting portion, and the third circuit board and the third circuit board are The second circuit boards are connected through a third connecting portion;

The second connection part or the third connection part is any one of the following:

Metal solder balls, sinters, metal structures or socket terminals.
The circuit board structure according to claim 1, wherein the first circuit board further comprises one or more data ports, and the one or more data ports communicate with the chip through the first transmission link package connection.
The circuit board structure according to claim 14, wherein the one or more data ports comprise at least one of the following:

On-board optical connection assembly OBO or input output port.
A method for manufacturing a circuit board structure, characterized in that the method comprises:

using a dense pin pitch on the first circuit board, and laying out a first transmission link on the first circuit board;

Laying a second transmission link on the second circuit board, the transmission rate of the first transmission link is higher than the transmission rate of the second transmission link;

electrically connecting the first circuit board to the second circuit board, and then electrically connecting the chip package to the first circuit board;

Alternatively, after the chip package is electrically connected to the first circuit board, the first circuit board is electrically connected to the second circuit board.
The manufacturing method according to claim 16, wherein the first circuit board is a carrier-like board.
The manufacturing method according to claim 16 or 17, wherein before electrically connecting the first circuit board to the second circuit board, the method further comprises:

embedding a filter module in the first circuit board;

Alternatively, before the chip package is electrically connected to the first circuit board, the method further includes:

A filtering module is embedded in the first circuit board; the filtering module is used for filtering.
The manufacturing method according to any one of claims 16 to 18, wherein before electrically connecting the first circuit board to the second circuit board, the method further comprises:

opening a first slot on the second circuit board;

The electrically connecting the first circuit board to the second circuit board specifically includes:

All of the first circuit is embedded in the first slot, or the first circuit board is partially embedded in the first slot.
The manufacturing method according to any one of claims 16 to 19, wherein the electrically connecting the first circuit board to the second circuit board specifically comprises:

The first circuit board and the second circuit board are electrically connected by a first connection part, and the first connection part is any one of the following:

Metal solder balls, sinters, metal structures or socket terminals.
The manufacturing method according to claim 16, wherein before electrically connecting the first circuit board to the second circuit board, the method further comprises:

Embedding a filter module in the third circuit board, the filter module is used for filtering;

The electrically connecting the first circuit board to the second circuit board specifically includes:

The third circuit board is arranged between the first circuit board and the second circuit board, so that the first circuit board is electrically connected to the second circuit board after passing through the third circuit board .
The manufacturing method according to claim 21, wherein the third circuit board is a carrier-like board.
The manufacturing method according to claim 21 or 22, wherein before electrically connecting the first circuit board to the second circuit board, the method further comprises:

opening a first slot on the second circuit board;

The electrically connecting the first circuit board to the second circuit board specifically includes:

Insert all of the third circuit board into the first slot, or partially insert the third circuit board into the first slot.
The manufacturing method according to claim 21 or 22, wherein before electrically connecting the first circuit board to the second circuit board, the method further comprises:

opening a first slot on the second circuit board;

The electrically connecting the first circuit board to the second circuit board specifically includes:

All of the first circuit board is inserted into the first slot, or part of the first circuit board is inserted into the first slot.
The manufacturing method according to any one of claims 21 to 24, wherein the electrically connecting the first circuit board to the second circuit board specifically comprises:

electrically connecting the first circuit board and the third circuit board by using a second connection portion;

The second circuit board is electrically connected to the third circuit board by using a third connection part, and the second connection part is any one of the following:

Metal solder balls, sinters, metal structures or socket terminals.
An electronic device, characterized in that the electronic device comprises the circuit board structure for reducing insertion loss according to any one of claims 1 to 15, and also includes a power supply;

The power supply is used to supply power to the chip package.
The electronic device according to claim 26, wherein the power supply is a multi-phase step-down circuit.
The electronic device according to claim 26 or 27, wherein the electronic device is any one of the following:

router, switch or server.