WO2023003446A1 - Procédé de fabrication d'un dispositif électroluminescent à semi-conducteur au nitrure du groupe iii - Google Patents

Procédé de fabrication d'un dispositif électroluminescent à semi-conducteur au nitrure du groupe iii Download PDF

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WO2023003446A1
WO2023003446A1 PCT/KR2022/010859 KR2022010859W WO2023003446A1 WO 2023003446 A1 WO2023003446 A1 WO 2023003446A1 KR 2022010859 W KR2022010859 W KR 2022010859W WO 2023003446 A1 WO2023003446 A1 WO 2023003446A1
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temperature
light emitting
emitting device
barrier layer
layer
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Korean (ko)
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홍영준
최중훈
정준석
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주식회사 소프트에피
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Definitions

  • the present disclosure relates to a method for manufacturing a group 3 nitride semiconductor light emitting device as a whole (METHOD FOR MANUFACTURING A III-NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE), in particular, a group 3 capable of effectively preventing volatilization of indium (In). It relates to a method of manufacturing a nitride semiconductor light emitting device.
  • LEDs Light Emitting Devices, LEDs
  • OLEDs organic light emitting devices
  • light-emitting devices based on inorganic semiconductors are used not only for long-life and high-efficiency lighting, but also as light source materials for micro-LEDs, which are next-generation displays.
  • the light emitting device is a p-n junction diode based on a III-V compound semiconductor.
  • the light emitting device emits light through current injection, and a blue, green, or red light emitting device is manufactured by adjusting band gap energy of a semiconductor.
  • a quantum well layer containing a large amount of indium must be grown and then a quantum barrier layer must be grown at a higher temperature.
  • a large amount of indium is released from the quantum well layer, resulting in phase separation and compositional non-uniformity, so that a light emitting device having a wavelength shorter than a planned wavelength and having low brightness may be manufactured.
  • a method for manufacturing a group III nitride semiconductor light emitting device comprising: growing a first semiconductor region; growing a first high-temperature quantum barrier layer over the first semiconductor region; growing a quantum well layer made of In x Ga 1-x N (0.1 ⁇ x ⁇ 0.5) on the first high-temperature quantum barrier layer; growing a low-temperature quantum barrier layer having a thickness of 0.5 nm to 2 nm on the quantum well layer; Growing a second high-temperature quantum barrier layer on the low-temperature quantum barrier layer; there is provided a method for manufacturing a group III nitride semiconductor light emitting device comprising the.
  • FIG. 1 is a schematic cross-sectional view of a light emitting device according to an embodiment of the present invention.
  • FIG. 2 is a schematic flow chart of a manufacturing method of the light emitting device of FIG. 1 .
  • FIG. 3 is a process temperature profile graph of some steps of the manufacturing method of the light emitting device of FIG. 1 .
  • FIG. 4 is a schematic conceptual diagram showing the volatility of indium atoms of a light emitting device according to the presence or absence of a low-temperature quantum barrier layer.
  • FIG. 6 is a graph showing an electroluminescence spectrum of a light emitting device according to Experimental Example 3 of the present invention and a comparative example of the prior art according to the presence or absence of a low-temperature quantum barrier layer and coordinate values in the CIE 1931 color space.
  • FIG. 7 is an electroluminescence spectrum graph of a light emitting device according to a growth time of a low-temperature quantum barrier layer in a light emitting device according to an experimental example of the present invention.
  • FIG. 1 schematically shows a cross-sectional structure of a light emitting device 100 according to an embodiment of the present invention.
  • the structure of the light emitting device of FIG. 1 is only for exemplifying the present invention, and the present invention is not limited thereto. Therefore, the structure of the light emitting device can be transformed into other forms.
  • the light emitting device 100 of FIG. 1 is applied to emit red light when a voltage is applied. That is, the light emitting device 100 can implement high-purity red with a uniform color wavelength.
  • the light emitting device 100 includes a single crystal substrate 10, a first semiconductor layer 20, a second semiconductor layer 30, a first electrode 70, a quantum well structure light emitting active layer 40 ), a third semiconductor layer 50, a transparent electrode 60 and a second electrode 75.
  • the quantum well structure light emitting active layer 40 includes a first high-temperature quantum barrier layer 401, a quantum well layer 403, a low-temperature quantum barrier layer 405, and a second high-temperature quantum barrier layer 407.
  • the light emitting device 100 may further include other layers.
  • the single crystal substrate 10 is GaN, AlGaN, InAlGaN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, InAs, InAsP, InGaAs, InP, ZnO, ZnMgO, ZnCdO, MgO, CdO, Ga-doped ZnO (GZO), IZO ( In-doped ZnO), AZO (Al-doped ZnO), Al 2 O 3 , Si or SiC may be included.
  • the single crystal substrate 10 may be made of a compound obtained by mixing two or more of these materials.
  • the first semiconductor layer 20 is located on the single crystal substrate 10 .
  • the first semiconductor layer 20 may be an undoped intrinsic semiconductor, for example, GaN.
  • the two may be in a relationship of crystal mismatch or lattice constant mismatch.
  • a low-temperature buffer layer may be inserted between the two in order to mitigate the large difference in thermal expansion coefficient between the two.
  • the second semiconductor layer 30 is located on the first semiconductor layer 20 .
  • the second semiconductor layer 30 may be n-type doped and has conductivity.
  • the second semiconductor layer 30 may be made of GaN doped with silicon, and other materials may also be used.
  • the first electrode 70 is positioned on the second semiconductor layer 30 .
  • the first electrode 70 does not contact the high-temperature quantum barrier layer 401 and is spaced apart from the high-temperature quantum barrier layer 401 in the x-axis direction to form a pad shape.
  • the first electrode 70 functions as a cathode and can be made of a Ti/Au alloy.
  • a quantum well structure light emitting active layer (Quantum Well active layer) 40 is positioned on the second semiconductor layer 30 .
  • the quantum well structure light emitting active layer 40 includes two high temperature quantum barriers (HT-QBs) 401 and 407, a quantum well layer (QW) 403 and a low temperature quantum barrier layer ( Low Temperature Quantum Barrier, LT-QB) (405). That is, the quantum well structure light emitting active layer 40 is composed of a plurality of layers.
  • the quantum well structure light emitting active layer 40 itself may be formed in multiple layers. For example, the quantum well structure light emitting active layer 40 is fabricated by repeating one to ten times.
  • the quantum well structure light emitting active layer 40 As the number of stacking increases, the light emitting intensity and light emitting efficiency of the light emitting device 100 increase. However, when the number of quantum well structure light emitting active layers 40 exceeds 10 layers, process cost and material cost increase to lower cost performance, so the quantum well structure light emitting active layer 40 is stacked within the above range.
  • the low-temperature quantum barrier layer 405 and the high-temperature quantum barrier layers 401 and 407 may contain GaN, InGaN, AlInN, InAlGaN, AlN, or AlGaN, or two or more of these materials. Materials of the low-temperature quantum barrier layer 405 and the high-temperature quantum barrier layers 401 and 407 may be the same or different from each other.
  • the low-temperature quantum barrier layer 405 is GaN, In y Ga 1-y N, Al 1-y In y N, In y Al z Ga 1-yz N (0.1 ⁇ y ⁇ x ⁇ 0.5, 0 ⁇ z ⁇ 1), AlN or AlGaN, or two or more of these materials.
  • the quantum well layer 403 may include In x Ga 1-x N (0.1 ⁇ x ⁇ 0.5).
  • x is greater than 0.5, defects such as segregation due to a large amount of indium, a rich region, and an in disk are formed, thereby degrading the performance of the device and the purity of the emission color.
  • x is less than 0.1, LEDs ranging from green light to red light cannot be implemented. Therefore, x is adjusted to the above range.
  • y is less than x in other words, The amount of indium contained in the low-temperature quantum barrier layer 405 is smaller than the amount of indium contained in the quantum well layer 403 .
  • the thickness t405 of the low-temperature quantum barrier layer 405 may be 0.5 nm to 2 nm. More preferably, the thickness t405 may be 0.68 nm to 1.82 nm. If the thickness t405 is too large, the manufactured device does not operate or has very low efficiency due to the deterioration of the quality of the quantum barrier layer. Also, if the thickness t405 is too small, decomposition, volatilization and separation of indium cannot be prevented. Accordingly, the thickness t405 is adjusted within the aforementioned range. Also, the thickness t403 of the quantum well layer 403 may be 1 nm to 10 nm.
  • the thickness t403 is adjusted within the aforementioned range.
  • Thicknesses t401 and t407 of the high-temperature quantum barrier layers 401 and 407 may range from 1 nm to 20 nm.
  • the thicknesses t401 and t407 are too large, the compositions of the quantum well layer 403 and the low-temperature quantum barrier layer 405 containing indium, respectively, and the high-temperature quantum barrier layers 401 and 407 are different. Accordingly, threading dislocations are formed to partially relieve the stress, defects are formed in the quantum well structure, and the formed dislocations act as a diffusion movement path of indium atoms. Therefore, the quantum well structure may collapse, additional defects may be formed, and the efficiency of the light emitting device may decrease.
  • the thicknesses t401 and t407 are adjusted within the aforementioned range.
  • the bandgap energy of the low-temperature quantum barrier layer 405 and the high-temperature quantum barrier layers 401 and 407 must be higher than that of the quantum well layer 403 .
  • luminous efficiency can be maximized by their recombination.
  • the multilayer structure of the low-temperature quantum barrier layer 403 and the high-temperature quantum barrier layers 401 and 407 surrounds the quantum well layer 403 from above and below.
  • the low-temperature quantum barrier layer 403 can prevent volatilization of indium from the quantum well layer 403 during a high-temperature process of the light emitting device 100 .
  • the low-temperature quantum barrier layer 405 may be formed by stacking a plurality of low-temperature quantum barriers. Through this structure, indium volatilization in the quantum well layer 403 can be prevented more efficiently.
  • the third semiconductor layer 50 is positioned on the quantum well structure light emitting active layer 40 . More specifically, the third semiconductor layer 50 is positioned over the high-temperature quantum barrier layer 407 .
  • the third semiconductor layer 50 has conductivity and may be a p-type doped semiconductor material.
  • the third semiconductor layer 50 may be made of a p-type GaN material doped with magnesium (Mg). That is, the third semiconductor layer 50 is doped with a polarity opposite to that of the second semiconductor layer 30 .
  • the transparent electrode 60 may be positioned on the third semiconductor layer 50 .
  • the transparent electrode 50 functions as a current spreading layer. Current can be injected uniformly over the entire surface of the third semiconductor layer 50 through the transparent electrode 50 .
  • the transparent electrode 50 has high transmittance in the visible light region. Accordingly, light emitted from the quantum well structure light emitting active layer 40 is well discharged to the outside of the light emitting device 100 through the transparent electrode 50 .
  • the second electrode 75 is positioned on the transparent electrode 60 .
  • the second electrode 75 functions as a pad for current injection.
  • the second electrode 75 does not completely cover the transparent electrode 50 .
  • light emitted from the quantum well structure light emitting active layer 40 escapes well to the outside through the transparent electrode 50 . Accordingly, the luminous efficiency of the light emitting device 100 can be maximized.
  • a method of manufacturing the light emitting device 100 of FIG. 1 will be described in detail with reference to FIG. 2 .
  • FIG. 2 schematically shows a flow chart of a manufacturing method of the light emitting device 100 of FIG. 1 .
  • the manufacturing method of the light emitting device of FIG. 2 is only for exemplifying the present invention, and the present invention is not limited thereto. Therefore, the manufacturing method of the light emitting device can be modified into other forms.
  • the manufacturing method of the light emitting device includes providing a single crystal substrate (S10), providing an undoped first semiconductor layer on the single crystal substrate (S20), and a conductive agent on the first semiconductor layer.
  • the manufacturing method of the light emitting device may further include other steps.
  • step S10 may be performed by Metal Organic Chemical Vapor Deposition (MOVCVD) or Molecular Beam Epitaxy (MBE). Since these processes can be easily understood by those skilled in the art, a detailed description thereof will be omitted.
  • MOVCVD Metal Organic Chemical Vapor Deposition
  • MBE Molecular Beam Epitaxy
  • the first electrode provided in step S50 is formed after manufacturing the second semiconductor layer S30 provided in step S30.
  • the second semiconductor layer is partially exposed through a lithography process and an etching process. Then, a first electrode is formed on the exposed surface of the second semiconductor layer.
  • the quantum well structure light emitting active layer formed in steps S40 to S80 differs in temperature gradient during formation of each layer. This will be described in detail below with reference to FIG. 3 .
  • FIG. 3 is a process temperature profile graph of some steps of the manufacturing method of the light emitting device of FIG. 1 . That is, FIG. 3 shows a temperature condition change for each process step for the quantum well structure light emitting active layer.
  • a quantum well structure light emitting active layer is formed on the second semiconductor layer of n-GaN.
  • the quantum barrier layers HT-QB and LT-QB formed on the quantum well layer QW are formed through a two-step process of low temperature and high temperature.
  • a difference between the growth temperature of the quantum well layer (QW) and the growth temperature of the low-temperature quantum barrier layer (LT-QB) may be in the range of 0°C to 50°C. If the growth temperature difference described above is too large, volatilization or decomposition of indium occurs in the same manner as in the formation of the high-temperature quantum barrier layer (HT-QB), thereby reducing the separation prevention rate or reducing the efficiency of the light emitting device due to low-quality crystal quality. . Therefore, it is desirable to maintain the difference in growth temperature within the aforementioned range.
  • the low-temperature quantum barrier layer (LT-QB) is deposited at a temperature equal to or lower than the deposition temperature of the quantum well layer (QW).
  • the low-temperature quantum barrier layer (LT-QB) prevents volatilization of indium element in the lower quantum well layer (QW) during temperature rise to form the high-temperature quantum barrier layer (HT-QB).
  • the quantum well layer QW may be formed of a plurality of quantum well parts.
  • T QW single temperature
  • T QW single temperature
  • T QW single temperature
  • the quantum well parts are stacked while growing each, the growth temperature is gradually increased to greater than 0 and less than 10° C. as the number of quantum well parts increases one by one. If the temperature increase is too large, the color purity and uniformity of the light emitting device to be manufactured is lowered. Therefore, the increasing temperature is adjusted within the above range.
  • the quantum well layer QW may be manufactured by forming each quantum well part while gradually increasing the temperature to 700°C, 710°C, and 720°C.
  • the quantum well layer QW may be fabricated by sequentially decreasing the growth temperature of the quantum well portions from greater than 0 to 10° C. or less.
  • the quantum well layer QW may be manufactured by sequentially stacking the quantum well parts while gradually lowering the process temperature to 720 °C, 710 °C, and 700 °C. A light emitting device having high color purity can be manufactured using this process. Accordingly, the growth temperature is gradually decreased to manufacture a plurality of quantum well parts.
  • the high-temperature quantum barrier layers are provided by growing them at 750°C to 900°C. If the growth temperature is too low, the crystalline quality of the quantum barrier layer deteriorates, resulting in lower efficiency of the light emitting device. In addition, if the growth temperature is too high, damage to all of the already stacked lower layers causes the structure of the light emitting device to be damaged or the efficiency to decrease. Accordingly, the growth temperature of the high-temperature quantum barrier layers is controlled within the above range.
  • volatilization of indium in the quantum well layer can be prevented by using the low-temperature quantum barrier layer (LT-QB) when manufacturing the light emitting device.
  • LT-QB low-temperature quantum barrier layer
  • FIG. 4 shows a conceptual diagram of indium atom volatility of a light emitting device according to the presence or absence of a low-temperature quantum barrier layer according to an embodiment of the present invention.
  • FIG. 4(a) conceptually shows a state in which indium is preserved
  • FIG. 4(b) conceptually shows a state in which indium is decomposed and volatilized.
  • the deposition temperature of the InGaN quantum well layer is lowered to increase the indium content.
  • the high vapor pressure of indium that is, the high temperature process for depositing the quantum barrier layer, which is generally performed at a high temperature after forming the quantum well layer, or high temperature
  • indium atoms in the quantum well layer are diffused to the outside and volatilized. Therefore, in the prior art, it was not easy to manufacture an InGaN layer having a high indium content in an InGaN-based light emitting device. As a result, it is very difficult to implement red light in the light emitting device.
  • the light emitting device according to an embodiment of the present invention solves this problem and can implement excellent red light.
  • the low-temperature quantum barrier layer functions as an indium volatilization prevention layer that prevents volatilization of indium atoms in the quantum well layer below it. That is, as described above, volatilization of indium in the quantum well layer is prevented by depositing a low-temperature quantum barrier layer on the quantum well layer at a temperature equal to or lower than the quantum well layer. As a result, it is possible to keep indium well at a high content.
  • indium atoms in the quantum well layer volatilize during a temperature increase process for forming a high-temperature quantum barrier layer.
  • the indium content of the quantum well layer decreases, making it difficult to emit long-wavelength light.
  • a light emitting device having the structure of FIG. 1 was manufactured according to the manufacturing method of the light emitting device of FIG. 2 .
  • the quantum well structure light emitting active layer of FIG. 1 was grown according to the process profile of FIG. 3 .
  • the quantum well layer was made of InGaN, grown at 720°C, and consisted of 5 quantum well structure light emitting active layers (plural well layers).
  • the c-sapphire single crystal substrate was washed with acetone, methanol, isopropyl alcohol, and pure water in an ultrasonic cleaner for 5 minutes, respectively. Between each step, the residue attached to the single-crystal substrate was removed by blowing with high-purity nitrogen. And the single crystal substrate was loaded into the MOCVD equipment. And, before growing the semiconductor layer on the single crystal substrate, all impurities remaining on the single crystal substrate were removed through a heat treatment process at an ultra-high temperature of 1100° C. for 5 minutes in a high purity hydrogen atmosphere. Then, a semiconductor layer was laminated. All semiconductor layers were grown in stages, and all semiconductor layers were deposited after temperature stabilization.
  • All semiconductor layers containing GaN were fabricated using TMGa (tri-methyl-gallium) or TEGa (tri-ethyle-gallium) organometallic compounds as the Ga source and ultra-high purity ammonia gas as the N source.
  • Ultra-high purity silane gas was used for n-type doping
  • Cp 2 Mg (bis(cyclopentadienyl)magnesium) organometallic compound was used for p-type doping.
  • TMIn tri-methyl-gallium
  • metal electrodes of Ti/Au and Ni/Au are deposited in a square shape with a size of 5mmX5mm using electron beam evaporation equipment on the n-type and p-type doped GaN semiconductor layers, respectively, to form a light emitting element. was manufactured. Details of experiments for each layer of the light emitting device will be described again below.
  • a low-temperature quantum barrier layer was grown for 20 seconds.
  • the rest of the experimental conditions were the same as in the aforementioned experimental example.
  • a low-temperature quantum barrier layer was grown for 40 seconds.
  • the rest of the experimental conditions were the same as in the aforementioned experimental example.
  • a low-temperature quantum barrier layer was grown for 60 seconds.
  • the rest of the experimental conditions were the same as in the aforementioned experimental example.
  • a light emitting device in which the low-temperature quantum barrier layer was not formed was manufactured. Except for the low-temperature quantum barrier layer, the rest of the experimental process was the same as in the above-described experimental example.
  • FIG. 5 is a current-voltage graph and an electroluminescence spectrum graph according to voltage increase of a light emitting device according to Experimental Example 3 of the present invention. More specifically, FIG. 5(a) shows a current-voltage graph of the light emitting device, and FIG. 5(b) shows an electroluminescence spectrum graph according to voltage increase. In (b) of FIG. 5, an electroluminescence image is inserted and shown.
  • the light emitting device exhibited diode characteristics of a threshold voltage of about 1.9 V.
  • a linear current-voltage characteristic was shown above the turn-on voltage.
  • FIG. 6 shows an electroluminescence spectrum of a light emitting device according to Experimental Example 3 and Comparative Example with or without a low-temperature quantum barrier layer and coordinate values in the CIE 1931 color space. More specifically, (a) of FIG. 6 shows an electroluminescence spectrum of a light emitting device with and without a low-temperature quantum barrier layer. 6(b) shows a color coordinate graph on the CIE 1931 color space. In FIG. 6(a) and FIG. 6(b), emission images according to the presence or absence of the low-temperature quantum barrier layer are inserted and shown, respectively.
  • the light emitting device manufactured according to Experimental Example 3 generated red light with a wavelength of 629 nm due to the presence of the low-temperature quantum barrier layer.
  • the low-temperature quantum barrier layer was not present in the light emitting device manufactured according to Comparative Example, green light with a wavelength of 527 nm was generated.
  • a wavelength deviation of about 100 nm occurred depending on the presence or absence of the low-temperature quantum barrier layer. Therefore, it was found that it is difficult to emit red light without the low-temperature quantum barrier layer.
  • the color coordinate values of the light emitted from the light emitting device manufactured according to the experimental example were (0.627, 0.356), indicating red light having a considerably high color purity.
  • the color coordinate values of the light emitted from the light emitting device manufactured according to the comparative example were (0.217, 0.698).
  • This result means that it is possible to manufacture a red light emitting device based on an InGaN quantum well structure layer by inserting a low-temperature quantum barrier layer into existing blue light emitting devices and green light emitting devices. Furthermore, not limited to the red light emitting device, it was possible to manufacture an InGaN quantum well structure layer having the same emission wavelength even at a temperature relatively higher than the manufacturing temperature of the InGaN quantum well layer. Accordingly, a high-quality and high-efficiency light emitting device could be manufactured.
  • FIG. 7 shows an electroluminescence spectrum graph of the light emitting device according to Experimental Examples 1 to 3 according to the growth time of the low temperature quantum barrier layer in the light emitting device according to Experimental Examples 1 to 3 of the present invention.
  • An electroluminescence image of the light emitting device is shown inset in FIG. 7 .
  • the light emitting devices of Experimental Examples 1 to 3 were analyzed using the growth time as a variable. Due to the characteristics of InGaN-based LEDs, the operating voltage and efficiency of each device are different depending on the content of indium. Therefore, the experiment was performed at the same current density of 10 mA.
  • the emission wavelengths for each condition of the growth time variable of the low-temperature quantum barrier layer were 555.9 nm, 628.9 nm, and 644.2 nm in Experimental Example 1, Experimental Example 2, and Experimental Example 3, respectively.
  • the light emission intensity of the light emitting device decreased in proportion to the increase of the growth time. Therefore, it was found that in order to manufacture a light emitting device that emits red light with high efficiency, it is necessary to optimize a specific growth time condition of the thickness.
  • the thickness was 0.68 nm to 1.82 nm.
  • the thickness and wavelength of the low-temperature quantum barrier layer showed a proportional relationship.
  • the thickness of the low-temperature quantum barrier layer and the emission intensity were inversely proportional to each other. That is, it was confirmed that it is difficult to manufacture a long-wavelength light emitting device with a thin low-temperature quantum barrier layer.
  • the performance of the light emitting device is poor. Therefore, it was found that a low-temperature quantum barrier layer having an appropriate thickness should be manufactured in consideration of this trade-off relationship.
  • a method of manufacturing a Group III nitride semiconductor light emitting device comprising: growing a first semiconductor region; growing a first high-temperature quantum barrier layer over the first semiconductor region; growing a quantum well layer made of In x Ga 1-x N (0.1 ⁇ x ⁇ 0.5) on the first high-temperature quantum barrier layer; growing a low-temperature quantum barrier layer having a thickness of 0.5 nm to 2 nm on the quantum well layer; Growing a second high-temperature quantum barrier layer on the low-temperature quantum barrier layer; Method for manufacturing a group III nitride semiconductor light emitting device comprising the.
  • the first semiconductor region corresponds to the first semiconductor layer 20 and the second semiconductor layer 30 , and the first semiconductor layer 20 may be omitted although not preferred.
  • the second semiconductor region corresponds to the third semiconductor layer 50 , and an electron blocking layer (EBL) is generally provided prior to formation of the third semiconductor layer 50 .
  • EBL electron blocking layer
  • the lateral chip has been described in the present disclosure, it can be applied to a flip chip or a vertical chip, and various configurations are possible except for the configuration of the active regions 401 , 403 , 405 , and 406 , and the present disclosure is not particularly limited. .
  • a method for manufacturing a group III nitride semiconductor light emitting device in which the thickness of the low-temperature quantum barrier layer is 0.68 nm to 1.82 nm and the thickness of the quantum well layer is 1 nm to 10 nm.
  • a method of manufacturing a group III nitride semiconductor light emitting device wherein each of the first high-temperature quantum barrier layer and the second high-temperature quantum barrier layer is grown at 750° C. to 900° C.
  • a group III nitride semiconductor light emitting device in which the quantum well layer is formed by stacking a plurality of quantum well parts, and the growth temperature thereof is gradually increased from 0 to 10° C. as the number of the plurality of quantum well parts increases one by one. How to manufacture.
  • a method for manufacturing a group III nitride semiconductor light emitting device in which the quantum well layer is formed by stacking a plurality of quantum well parts, and the indium content of each quantum well part is gradually increased as the number of the plurality of quantum well parts increases one by one.
  • a group III nitride semiconductor light emitting device According to the method for manufacturing a group III nitride semiconductor light emitting device according to the present disclosure, it is possible to manufacture a light emitting device capable of efficiently preventing volatilization of indium (In).

Abstract

La présente invention concerne un procédé de fabrication d'un dispositif électroluminescent à semi-conducteur au nitrure du groupe III, le procédé comprenant les étapes consistant à : faire croître une première zone semi-conductrice ; faire croître une première couche de barrière quantique à haute température sur la première zone semi-conductrice ; faire croître une couche de puits quantique comprenant InxGa1-xN (0,1 < x < 0,5) sur la première couche de barrière quantique à haute température ; faire croître une couche de barrière quantique à basse température ayant une épaisseur de 0,5 nm à 2 nm sur la couche de puits quantique ; et faire croître une seconde couche de barrière quantique à haute température sur la couche de barrière quantique à basse température.
PCT/KR2022/010859 2021-07-23 2022-07-25 Procédé de fabrication d'un dispositif électroluminescent à semi-conducteur au nitrure du groupe iii WO2023003446A1 (fr)

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JP2005129923A (ja) * 2003-10-02 2005-05-19 Showa Denko Kk 窒化物半導体、それを用いた発光素子、発光ダイオード、レーザー素子およびランプ並びにそれらの製造方法
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KR20170024620A (ko) * 2015-08-25 2017-03-08 일진엘이디(주) 결정성을 향상시키기 위한 질화물계 발광소자의 제조방법

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KR20000074447A (ko) * 1999-05-21 2000-12-15 조장연 질화물 반도체 발광소자
JP2005129923A (ja) * 2003-10-02 2005-05-19 Showa Denko Kk 窒化物半導体、それを用いた発光素子、発光ダイオード、レーザー素子およびランプ並びにそれらの製造方法
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