WO2022266991A1 - 光电传感器、图像传感器和电子装置 - Google Patents

光电传感器、图像传感器和电子装置 Download PDF

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Publication number
WO2022266991A1
WO2022266991A1 PCT/CN2021/102330 CN2021102330W WO2022266991A1 WO 2022266991 A1 WO2022266991 A1 WO 2022266991A1 CN 2021102330 W CN2021102330 W CN 2021102330W WO 2022266991 A1 WO2022266991 A1 WO 2022266991A1
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Prior art keywords
base substrate
layer
electrode
photoelectric
orthographic projection
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PCT/CN2021/102330
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English (en)
French (fr)
Inventor
蔡寿金
李成
张洁
程锦
孔德玺
李田生
车春城
王迎姿
Original Assignee
京东方科技集团股份有限公司
北京京东方传感技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方传感技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2021/102330 priority Critical patent/WO2022266991A1/zh
Priority to CN202180001645.5A priority patent/CN115735277A/zh
Priority to DE112021004968.2T priority patent/DE112021004968T5/de
Publication of WO2022266991A1 publication Critical patent/WO2022266991A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof

Definitions

  • Embodiments of the present disclosure relate to a photoelectric sensor, an image sensor, and an electronic device.
  • Image sensors can be mainly classified into Charge Coupled Devices (CCD) and Complementary Metal Oxide Semiconductor Devices (CMOS).
  • CCD Charge Coupled Devices
  • CMOS Complementary Metal Oxide Semiconductor Devices
  • the charge-coupled device is supported by a high-sensitivity semiconductor material, which can convert light into electric charge, and then convert it into a digital signal through an analog-to-digital converter chip. The digital signal is compressed and stored in a memory.
  • the charge-coupled device (CCD) is composed of multiple photosensitive units. When the surface of the charge-coupled device (CCD) is irradiated by light, each photosensitive unit will reflect the received light on the charge, and the signals generated by all photosensitive units Taken together, they form a complete picture.
  • CMOS Complementary metal-oxide-semiconductor
  • CMOS Complementary metal-oxide-semiconductor
  • CCDs charge coupled devices
  • Embodiments of the present disclosure provide a photoelectric sensor, an image sensor, and an electronic device.
  • the first drain of the reset subcircuit and the first electrode of the photoelectric converter are arranged on the same layer and connected as a whole, so that multiple film layer structures and multiple exposure processes can be saved, thereby reducing the cost of the photoelectric sensor. cost and reduce the volume of the photoelectric sensor.
  • At least one embodiment of the present disclosure provides a photoelectric sensor, which includes: a base substrate; a driving circuit located on the base substrate; a photoelectric converter located on the base substrate, the photoelectric converter including a first electrode and a photoelectric conversion layer, the photoelectric conversion layer is located on the side of the first electrode away from the base substrate, the driving circuit includes a reset subcircuit, the reset subcircuit includes a first source and a first drain, the The first electrode and the first drain are integrated into the same electrode, and are arranged in the same layer as the first source.
  • the orthographic projection of the first electrode of the photoelectric converter on the substrate and the orthographic projection of the first source on the substrate are interval setting.
  • the reset subcircuit includes a reset transistor, the reset transistor includes a first active layer, and the orthographic projection of the photoelectric conversion layer on the base substrate is the same as the The overlapping area of the orthographic projection of the first active layer on the base substrate is less than 1/2 of the area of the orthographic projection of the first active layer on the base substrate.
  • the orthographic projection of the photoelectric conversion layer on the base substrate falls within the range of the orthographic projection of the first electrode on the base substrate .
  • the drive circuit further includes a signal reading subcircuit and a signal amplification subcircuit, the orthographic projection of the signal reading subcircuit on the substrate, the The orthographic projection of the signal amplification sub-circuit on the base substrate and the orthographic projection of the reset sub-circuit on the base substrate are arranged in sequence along the first direction, and the drive circuit on the base substrate The orthographic projection and the orthographic projection of the photoelectric converter on the base substrate are arranged in sequence along the second direction.
  • the signal reading subcircuit includes a signal reading transistor
  • the signal amplification subcircuit includes a signal amplification transistor
  • the signal reading transistor includes a second active layer
  • the signal amplifying transistor includes a third active layer
  • the orthographic projection of the second active layer on the base substrate is spaced from the orthographic projection of the photoelectric converter on the base substrate, so The orthographic projection of the third active layer on the base substrate is spaced apart from the orthographic projection of the photoelectric converter on the base substrate.
  • the photoelectric conversion layer includes a bisector extending along the first direction, and the driving circuit is located on one side of the bisector in the second direction .
  • the reset subcircuit further includes a first control electrode
  • the signal reading subcircuit includes a second control electrode, a second source, and a second drain
  • the signal amplifying sub-circuit includes a third control electrode, a third source and a third drain, the third drain is connected to the second source, and the first drain is connected to the third control electrode .
  • the photoelectric sensor provided by an embodiment of the present disclosure further includes: a power line extending along the second direction and configured to be connected to the first source and the third source; a data reading control line extending along the The first direction extends and is configured to be connected to the second control electrode; the reset control line extends along the first direction and is configured to be connected to the first control electrode; and the data signal line extends along the first direction and is configured to be connected to the first control electrode;
  • the second direction extends and is configured to be connected to the second drain.
  • the orthographic projection of the reset control line on the substrate partially overlaps the orthographic projection of the photoelectric conversion layer on the substrate, and the photoelectric conversion
  • the layer includes a bisector extending along the first direction, and the reset control line is located on a side of the bisector close to the data read control line.
  • the photoelectric sensor provided by an embodiment of the present disclosure further includes: a reset connection block extending along the second direction and located between the power line and the photoelectric conversion layer, the reset connection block is connected to the reset control The wire is connected to the first control electrode.
  • the photoelectric converter further includes: a conductive protective layer located on the side of the photoelectric conversion layer away from the first electrode; an insulating layer located on the conductive protective layer layer away from the side of the base substrate; a first passivation layer, located on the side of the insulating layer away from the conductive protection layer; and a second electrode, located on the first passivation layer away from the substrate
  • the photosensor also includes a first via hole, located in the insulating layer and the first passivation layer, the second electrode passes through the first via hole and the conductive protection layer connected.
  • the photosensor provided by an embodiment of the present disclosure further includes: a second passivation layer located on the side of the second electrode away from the base substrate; and an electrostatic protection layer located on the side of the second passivation layer away from the substrate. one side of the second electrode.
  • the material of the conductive protective layer is transparent conductive oxide
  • the material of the second electrode is transparent conductive oxide
  • the photoelectric conversion layer includes an N-type semiconductor layer, an intrinsic semiconductor layer and a P-type semiconductor layer.
  • At least one embodiment of the present disclosure further provides an image sensor, including a plurality of photoelectric sensors, and each photoelectric sensor is the photoelectric sensor described in any one of the above.
  • the plurality of photosensor arrays are arranged.
  • At least one embodiment of the present disclosure further provides an electronic device, which includes the above-mentioned image sensor.
  • Fig. 1 is a schematic plan view of a photoelectric sensor
  • Fig. 2 is a schematic cross-sectional view of the photoelectric sensor shown in Fig. 1;
  • FIG. 3 is a schematic plan view of a photoelectric sensor provided by an embodiment of the present disclosure.
  • FIG. 4 is a schematic cross-sectional view of a photoelectric sensor along line AA in FIG. 3 according to an embodiment of the present disclosure
  • FIG. 5 is an equivalent schematic diagram of a driving circuit in a photoelectric sensor provided by an embodiment of the present disclosure
  • FIG. 6 is a schematic diagram of a photoelectric conversion layer provided by an embodiment of the present disclosure.
  • FIG. 7 is a schematic diagram of an image sensor provided by an embodiment of the present disclosure.
  • FIG. 8 is a schematic diagram of an electronic device provided by an embodiment of the present disclosure.
  • CMOS Complementary metal oxide semiconductor
  • Passive Pixel Sensor passive Pixel Sensor
  • Active Pixel Sensor active pixel sensor
  • MUX multi-channel analog switch
  • FIG. 1 is a schematic plan view of a photoelectric sensor
  • FIG. 2 is a schematic cross-sectional view of the photoelectric sensor shown in FIG. 1 .
  • the photoelectric sensor 10 includes a base substrate 11, a drive circuit 20, and a photoelectric converter 30; the drive circuit 20 is located on the base substrate 11, and the photoelectric converter 30 is located on the drive circuit 20 away from the base substrate 11; the driving circuit 20 may include an active layer 21, a gate insulating layer 22, a gate layer 23, an interlayer insulating layer 24 and a first conductive layer 25 which are sequentially stacked; the above four layers all need to be patterned Therefore, 4 exposure processes are required.
  • the photoelectric sensor 10 also includes a flat layer 40 and a first passivation layer 51, located between the drive circuit 20 and the photoelectric converter 30, to separate the drive circuit 20 and the photoelectric converter 30; the photoelectric converter 30 includes a first electrode 31.
  • the first electrode 31, the conductive protective layer 33, the second electrode layer 35, and the electrostatic protective layer 36 need 4 exposure processes, while the insulating layer 34 and the second passivation layer 52 need to form via holes, so 2 exposure processes are also required. exposure process.
  • the photoelectric sensor uses a 13-pass exposure process, resulting in a relatively high cost.
  • inventions of the present disclosure provide a photoelectric sensor, an image sensor, and an electronic device.
  • the photoelectric sensor includes a base substrate, a drive circuit and a photoelectric converter; the drive circuit and the photoelectric converter are located on the base substrate; the photoelectric converter includes a first electrode and a photoelectric conversion layer, and the photoelectric conversion layer is located at the first electrode away from the substrate One side of the substrate; the drive circuit includes a reset subcircuit, the reset subcircuit includes a first source and a first drain, the first electrode and the first drain are integrated into the same electrode, and are arranged on the same layer as the first source.
  • the photoelectric sensor can save multiple film layer structures and multiple exposure processes by arranging and connecting the first drain of the reset subcircuit and the first electrode of the photoelectric converter on the same layer, thereby reducing the The cost of the photoelectric sensor is reduced and the volume of the photoelectric sensor is reduced.
  • FIG. 3 is a schematic plan view of a photoelectric sensor provided by an embodiment of the present disclosure
  • FIG. 4 is a schematic cross-sectional view of a photoelectric sensor provided by an embodiment of the present disclosure along line AB in FIG. 3 .
  • the photoelectric sensor 100 includes a base substrate 110, a drive circuit 120 and a photoelectric converter 130; the drive circuit 120 is located on the base substrate 110, and the photoelectric converter 130 is located on the base substrate 110;
  • the converter 130 includes a first electrode 131 and a photoelectric conversion layer 132 , and the photoelectric conversion layer 132 is located on a side of the first electrode 131 away from the substrate 110 .
  • the drive circuit 120 includes a reset sub-circuit 121, the reset sub-circuit 121 includes a first source 121S and a first drain 121D, the first electrode 131 and the first drain 121D are integrated into the same electrode, and are on the same layer as the first source 121S set up.
  • the first electrode and the first drain are integrated into the same electrode, and are arranged on the same layer as the first source;
  • the first electrode of the device is arranged on the same layer and connected as a whole (equivalent to the first drain of the reset sub-circuit is also multiplexed as the first electrode of the photoelectric converter), thereby saving multiple film layer structures and multiple exposure processes.
  • the cost of the photoelectric sensor can be reduced and the volume of the photoelectric sensor can be reduced. For example, the flat layer and passivation layer between the driving circuit and the photoelectric converter and the film layer where the first electrode is located can be saved.
  • the orthographic projection of the first electrode 131 of the photoelectric converter 132 on the substrate 110 and the orthographic projection of the first source 121S on the substrate 110 are spaced apart; that is to say , the first electrode 131 of the photosensor 130 does not overlap with the first source 121S.
  • the first drain 121D of the reset sub-circuit 121 and the first electrode 131 of the photoelectric converter 130 are arranged on the same layer and connected as one, the first source 121S arranged on the same layer as the first electrode 131 will not hinder The setting of the first electrode 131. Therefore, the first electrode 131 or the first drain 121 in the photoelectric converter can have a larger area, so as to meet design requirements and prevent the photoelectric converter from being saturated in advance.
  • the reset subcircuit 121 includes a reset transistor T1
  • the reset transistor T1 includes a first active layer 121A
  • the photoelectric conversion layer 131 on the base substrate 110 The overlapping area of the orthographic projection and the orthographic projection of the first active layer 121A on the base substrate 110 is less than 1/2 of the area of the orthographic projection of the first active layer 121A on the base substrate 110 . Therefore, in the photoelectric converter 100, the overlapping area of the photoelectric conversion layer 131 and the driving circuit 120 is small, so that it is convenient to form a larger area of the first electrode 131 or the first drain 121D of the reset sub-circuit, thereby meeting the design requirements. required to prevent premature saturation of the photoelectric converter.
  • the reset subcircuit 121 includes a reset transistor T1
  • the reset transistor T1 includes a first active layer 121A
  • the orthographic projection of the photoelectric conversion layer 131 on the base substrate 110 is consistent with the first active layer
  • the overlapping area of the orthographic projection of 121A on the base substrate 110 is less than 1/3 of the area of the orthographic projection of the first active layer 121A on the base substrate 110 . Therefore, in the photoelectric converter 100 , the overlapping area of the photoelectric conversion layer 131 and the driving circuit 120 is smaller, thereby facilitating the formation of a larger area of the first electrode 131 or the first drain 121D of the reset sub-circuit.
  • FIG. 5 is an equivalent schematic diagram of a driving circuit in a photoelectric sensor provided by an embodiment of the present disclosure.
  • the driving circuit 120 also includes a signal reading subcircuit 122 and a signal amplifying subcircuit 123;
  • the orthographic projection on the base substrate 110 and the orthographic projection of the reset sub-circuit 121 on the base substrate 110 are sequentially arranged along the first direction X, and the driving circuit 120 and the photoelectric converter 130 are sequentially arranged along the second direction Y. Therefore, the photoelectric sensor can provide a "coplanar" design of the driving circuit and the photoelectric converter, and improve the integration of the driving circuit and reduce the area occupied by the driving circuit, thereby facilitating the formation of a larger area of the first sensor.
  • An electrode 131 or the first drain 121D of the reset sub-circuit meets design requirements and prevents the photoelectric converter from being saturated in advance.
  • the photoelectric conversion layer 132 includes a bisector 1320 extending along the first direction, and the driving circuit 120 is located on one side of the bisector 1320 in the second direction.
  • the above-mentioned bisector refers to the area bisector of the orthographic projection of the photoelectric conversion layer on the base substrate.
  • the accumulated charge of the pixel is about 220fc, which is equivalent to the filling rate, and the charge of the photoelectric converter per unit area can be calculated as 0.05(fc/ ⁇ m 2 );
  • the capacitance of the minimum photoelectric conversion layer such as a photodiode
  • the dielectric constant of the film layer it can be obtained that the minimum area of the required photoelectric conversion layer is about 1600 ⁇ m 2 .
  • the design of the area of the photoelectric conversion layer equal to 1600 ⁇ m 2 can be satisfied when the pixel pitch is 70 ⁇ m.
  • the aforementioned pixel pitch can be regarded as the dimension of the side length of a square area occupied by one photosensor.
  • the reset subcircuit 121 further includes a first control electrode 121G
  • the signal reading subcircuit 122 includes a second control electrode 122G, a second source 122S and a second drain 122D
  • the signal amplification sub-circuit 123 includes a third control electrode 123G, a third source 123S and a third drain 123D
  • the third drain 123D is connected to the second source 122S
  • the first drain 121D is connected to the third control electrode 123G .
  • the photoelectric sensor 100 further includes a power line 191, a data reading control line 192, a reset control line 193, and a data signal line 194;
  • the power line 191 extends along the second direction Y, and configured to be connected to the first source 121S and the third source 123S;
  • the data reading control line 192 extends along the first direction X, and is configured to be connected to the second control electrode 122G;
  • the reset control line 193 extends along the first The direction X extends and is configured to be connected to the first control electrode 121G;
  • the data signal line 194 extends along the second direction Y and is configured to be connected to the second drain electrode 122D.
  • the reset subcircuit can reset the first electrode 131 of the photoelectric converter 130 by using the power supply voltage (such as VDD) provided by the power supply line 191;
  • the voltage generated by 132 is amplified;
  • the data reading sub-circuit 122 can read out the voltage amplified by the signal amplifying circuit 123 .
  • the reset subcircuit 121 may be a reset transistor T1
  • the signal amplifying subcircuit 122 may be a signal amplifying transistor T3
  • the data reading subcircuit 122 may be a data reading transistor T2 .
  • the reset transistor T1 includes a first active layer 121A
  • the data read transistor T2 includes a second active layer 122A
  • the signal amplifying transistor T3 includes a third active layer 123A; the first active layer 121A, the second active layer 122A and
  • the material of the third active layer 123A is low temperature polysilicon (LTPS), so that the reset transistor T1, the data read transistor T2 and the signal amplifying transistor T3 have faster response speed and higher carrier mobility.
  • LTPS low temperature polysilicon
  • the orthographic projection of the second active layer 122A on the base substrate 110 is spaced apart from the orthographic projection of the photoelectric conversion layer 132 on the base substrate 110 , that is, the second active layer The source layer 122A does not overlap with the photoelectric conversion layer 132; the orthographic projection of the third active layer 123A on the base substrate 110 is spaced from the orthographic projection of the photoelectric conversion layer 132 on the base substrate 110, that is, the third The active layer 123A does not overlap the photoelectric conversion layer 132 .
  • the reset transistor T1 is used for reset
  • the signal amplifying transistor T3 is used for amplifying the signal generated by the photoelectric converter 130
  • the signal reading transistor T2 is used for reading the amplified signal.
  • the reset signal line 193 applies a reset signal to the first control electrode 121G of the reset transistor T1 to turn on the reset transistor T1.
  • the third control electrode 123G of the signal amplifying transistor T3 is reset to the power signal on the power supply 191 (for example VDD), and work in a saturated state; then, the photoelectric converter 130 generates light leakage current through illumination, and the light leakage current causes the potential drop of the first electrode 131 of the photoelectric converter 130; finally, the data read control line 192 sends signal read
  • the gate signal is applied to the second control electrode 122G of the transistor T2, and the signal reading transistor T2 is turned on at this time, and the potential change amount on the third control electrode 123G of the signal amplifying transistor T3 is amplified by the signal amplifying transistor T3 and then read by the data line 194 .
  • the embodiments of the present disclosure include but are not limited thereto, and the driving circuit may also adopt other suitable structures and adopt other suitable working processes.
  • the orthographic projection of the reset control line 193 on the base substrate 110 partially overlaps the orthographic projection of the photoelectric conversion layer 132 on the base substrate 110; the photoelectric conversion layer 132 includes The bisector 1320 extending in the first direction, the reset control line 193 is located on a side of the bisector 1320 close to the data reading control line 192 .
  • the photoelectric sensor 100 further includes a reset connection block 1935, which extends along the second direction and is located between the power line 191 and the photoelectric conversion layer 132; the reset connection block 1935 are respectively connected to the reset control line 193 and the first control electrode 121G.
  • both the second active layer 122A and the third active layer 123A extend along the first direction; the first active layer 121A extends along the second direction.
  • first direction and the second direction are perpendicular to each other; it should be noted that the above-mentioned perpendicular to each other includes the situation that the first direction and the second direction are completely perpendicular, and also includes that the angle between the first direction and the second direction is within 80 -100 degree.
  • the driving circuit 120 includes an active layer 161 , a gate insulating layer 162 , a gate layer 163 , an interlayer insulating layer 163 and a source-drain metal layer 164 arranged in sequence.
  • the first active layer 121A of the reset transistor T1 , the second active layer 122A of the data read transistor T2 and the third active layer 123A of the data amplifying transistor T3 may all be located at the active layer 161 .
  • Both the first source 121S and the first drain 121D of the reset transistor T1 are located at the source-drain metal layer 164 .
  • the data readout transistor T2 may adopt a double-gate structure, thereby improving performance.
  • the embodiments of the present disclosure include but are not limited thereto, and the data reading transistor may also adopt other structures.
  • the photoelectric converter 100 further includes a conductive protection layer 133, an insulating layer 134, a first passivation layer 135, and a second electrode 136;
  • the conductive protection layer 133 is located on the photoelectric conversion layer 132 away from the first One side of the electrode 131;
  • the insulating layer 134 is located at the side of the conductive protective layer 133 away from the base substrate 110;
  • the first passivation layer 135 is located at the side of the insulating layer 134 away from the conductive protective layer 133;
  • the second electrode 136 is located at the first passivation layer The side of the layer 135 away from the base substrate 110.
  • the photoelectric sensor 100 further includes a via hole H1 located in the insulating layer 134 and the first passivation layer 135 , and the second electrode 136 is connected to the conductive protection layer 133 through the via hole H1 .
  • the conductive protective layer 133 can be used as a protective layer for the photoelectric conversion layer 132; and the insulating layer 134 and the first passivation layer 135 can be used as a planarization layer, so that the second layer formed on the insulating layer 134 and the first passivation layer 135
  • the second electrode 136 has better flatness.
  • the second electrode 136 includes: a first hollow part 301 , the orthographic projection of the first hollow part 301 on the base substrate 110 and the data signal line 194 on the base substrate 110
  • the orthographic projection on the base substrate 110 at least partially overlaps with the second hollow part 302 .
  • the size range of the first hollow part 301 in the first direction is 8-10 microns
  • the size range of the first hollow part 301 in the second direction is 40-46 microns
  • the second hollow part 302 The size range in one direction is 50-58 microns
  • the size range of the second hollow part 302 in the second direction is 8-10 microns. It should be noted that the embodiments of the present disclosure include but are not limited thereto, and the sizes of the first hollow part and the second hollow part can be set according to actual needs.
  • the area of the orthographic projection of the via hole H1 on the base substrate 110 is greater than 50% of the area of the orthographic projection of the photoelectric conversion layer 132 on the base substrate 110 , so that The electrical connection between the photoelectric conversion layer 132 and the second electrode 136 is enhanced.
  • the conductive protection layer 133 and the photoelectric conversion layer 132 can be patterned using the same mask, so that masking process can be saved.
  • the shape of the orthographic projection of the conductive protection layer 133 on the base substrate 110 is the same as the shape of the orthographic projection of the photoelectric conversion layer 132 on the base substrate 110; or, the shape of the orthographic projection of the conductive protection layer 133 on the base substrate 110
  • the projection is slightly smaller than the orthographic projection of the photoelectric conversion layer 132 on the base substrate 110 .
  • the shortest distance between the edge of the orthographic projection of the conductive protection layer 133 on the base substrate 110 and the edge of the orthographic projection of the photoelectric conversion layer 132 on the base substrate 110 is about 0.5 microns.
  • the material of the insulating layer 134 may be resin.
  • the embodiments of the present disclosure include but are not limited thereto, and the insulating layer 134 can also be made of other materials.
  • the material of the first passivation layer 135 may be selected from one or more of silicon oxide, silicon nitride, or silicon oxynitride.
  • the orthographic projection of the photoelectric conversion layer 132 on the base substrate 110 falls within the range of the orthographic projection of the first electrode 131 on the base substrate 110;
  • the area of the orthographic projection of 132 on the base substrate 110 is smaller than the area of the orthographic projection of the first electrode 131 on the base substrate 110, so that the photoelectric conversion layer 132 formed on the side of the first electrode 131 away from the base substrate 110 can be improved.
  • the flatness thereby improving the performance of the photoelectric converter 130.
  • the area of the orthographic projection of the conductive protection layer 133 on the base substrate 110 is smaller than the area of the orthographic projection of the photoelectric conversion layer 132 on the base substrate 110 is smaller than that of the first electrode 131 The area of the orthographic projection on the base substrate 110 .
  • the photoelectric sensor 100 further includes a second passivation layer 140 and an electrostatic protection layer 150; the second passivation layer 140 is located on the side of the second electrode 136 away from the substrate 110; the electrostatic The protective layer 150 is located on a side of the second passivation layer 140 away from the second electrode 136 .
  • the electrostatic protection layer 150 can prevent static electricity, thereby improving the safety and stability of the photoelectric sensor.
  • the orthographic projection of the electrostatic protection layer 150 on the base substrate 110 completely overlaps the orthographic projection of the second electrode 136 on the base substrate 110 . Therefore, the electrostatic protection layer 150 and the second electrode 136 can be manufactured using the same mask, thereby saving one mask.
  • the material of the conductive protective layer 133 can be a transparent conductive oxide, such as indium tin oxide (ITO);
  • the material of the second electrode 136 can be a transparent conductive oxide, such as indium tin oxide (ITO); of course, the embodiment of the present disclosure Including but not limited thereto, other suitable materials may also be used for the conductive protection layer and the second electrode.
  • the material of the electrostatic protection layer 150 may be a transparent conductive oxide, such as indium tin oxide (ITO).
  • ITO indium tin oxide
  • the embodiments of the present disclosure include but are not limited thereto, and the electrostatic protection layer 150 may also use other suitable materials.
  • FIG. 6 is a schematic diagram of a photoelectric conversion layer provided by an embodiment of the present disclosure.
  • the photoelectric conversion layer 132 includes an n-type semiconductor layer 1321 , an intrinsic semiconductor layer 1322 and a p-type semiconductor layer 1323 . That is, the photoelectric conversion layer 132 adopts a photodiode with a PIN structure.
  • FIG. 7 is a schematic diagram of an image sensor provided by an embodiment of the present disclosure.
  • the image sensor 200 includes a plurality of photosensors 100 , and each photosensor 100 may be the photosensor 100 provided in any of the above examples. Therefore, since the above-mentioned photoelectric sensor can arrange and connect the first drain electrode of the reset sub-circuit and the first electrode of the photoelectric converter in the same layer, multiple film layer structures and multiple exposure processes can be saved. Furthermore, the cost of the photoelectric sensor can be reduced and the volume of the photoelectric sensor can be reduced. Therefore, the image sensor has lower cost, smaller size and higher performance.
  • a plurality of photosensors 100 are arranged in an array, so that when the image sensor 200 is irradiated by light, the signals generated by all the photosensors can be conveniently combined to form an image. complete picture.
  • FIG. 8 is a schematic diagram of an electronic device provided by an embodiment of the present disclosure. As shown in FIG. 8 , the electronic device 400 includes the aforementioned image sensor 200 . Therefore, the electronic device also has lower cost, smaller volume and higher performance.
  • the electronic device can be an electronic device with a shooting function such as a smart phone, a tablet computer, a notebook computer, a navigator, and a smart camera.
  • a shooting function such as a smart phone, a tablet computer, a notebook computer, a navigator, and a smart camera.

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

一种光电传感器(100)、图像传感器(200)和电子装置(400)。该光电传感器(100)包括衬底基板(110)、驱动电路(120)和光电转换器(130)；驱动电路(120)和光电转换器(130)均位于衬底基板(110)上；光电转换器(130)包括第一电极(131)和光电转换层(132)，光电转换层(132)位于第一电极(131)远离衬底基板(110)的一侧；驱动电路(120)包括复位子电路(121)，复位子电路(121)包括第一源极(121S)和第一漏极(121D)，第一电极(131)和第一漏极(121D)集成为同一电极，且与第一源极(121S)同层设置。由此，该光电传感器(100)通过将复位子电路(121)的第一漏极(121D)光电转换器(130)的第一电极(131)同层设置且连接为一体，从而可节省多个膜层结构和多个曝光制程，进而可降低该光电传感器(100)的成本并降低该光电传感器(100)的体积。

Description

光电传感器、图像传感器和电子装置 技术领域
本公开实施例涉及一种光电传感器、图像传感器和电子装置。
背景技术
随着数码技术、半导体制造技术和网络技术的不断发展，市场对于图像传感器的需求也越来越大、越来越多样化。图像传感器主要可分为电耦合元件(CCD)和互补金属氧化物半导体元件(CMOS)。
电耦合元件(CCD)使用高感光度的半导体材料支撑，能把光线转变为电荷，然后通过模数转换器芯片转换为数字信号，数字信号经过压缩以后经过存储器保存。电耦合元件(CCD)由多个感光单元组成，当电耦合元件(CCD)的表面受到光线照射时，每个感光单元会将接收到的光线反映在电荷上，所有的感光单元所产生的信号结合在一起，就构成了一幅完整的画面。
互补金属氧化物半导体元件(CMOS)主要利用硅或锗等元素形成PIN光电二极管(photodiode)，以将光信号转换为电信号，电信号随着光的变化而相应变化。相比电耦合元件(CCD)，互补金属氧化物半导体元件(CMOS)具有体积小、功耗低、成本低等优点。
发明内容
本公开实施例提供一种光电传感器、图像传感器和电子装置。该光电传感器通过将复位子电路的第一漏极与光电转换器的第一电极同层设置且连接为一体，从而可节省多个膜层结构和多个曝光制程，进而可降低该光电传感器的成本并降低该光电传感器的体积。
本公开至少一个实施例提供一种光电传感器，其包括：衬底基板；驱动电路，位于衬底基板上；光电转换器，位于衬底基板上，所述光电转换器包括第一电极和光电转换层，所述光电转换层位于所述第一电极远离所述衬底基板的一侧，所述驱动电路包括复位子电路，所述复位子电路包括第一源极和第一漏极，所述第一电极和所述第一漏极集成为同一电极，且与所述第一源极同层设置。
例如，在本公开一实施例提供的光电传感器中，所述光电转换器的所述第 一电极在衬底基板上的正投影与所述第一源极在所述衬底基板上的正投影间隔设置。
例如，在本公开一实施例提供的光电传感器中，所述复位子电路包括复位晶体管，所述复位晶体管包括第一有源层，所述光电转换层在衬底基板上的正投影与所述第一有源层在所述衬底基板上的正投影的重叠面积小于所述第一有源层在所述衬底基板上的正投影的面积的1/2。
例如，在本公开一实施例提供的光电传感器中，所述光电转换层在所述衬底基板上的正投影落入所述第一电极在所述衬底基板上的正投影的范围之内。
例如，在本公开一实施例提供的光电传感器中，所述驱动电路还包括信号读取子电路和信号放大子电路，所述信号读取子电路在所述衬底基板上的正投影、所述信号放大子电路在所述衬底基板上的正投影和所述复位子电路在所述衬底基板上的正投影沿第一方向依次排列，所述驱动电路在所述衬底基板上的正投影和所述光电转换器在所述衬底基板上的正投影沿第二方向依次排列。
例如，在本公开一实施例提供的光电传感器中，所述信号读取子电路包括信号读取晶体管，所述信号放大子电路包括信号放大晶体管，所述信号读取晶体管包括第二有源层，所述信号放大晶体管包括第三有源层，所述第二有源层在所述衬底基板上的正投影与所述光电转换器在所述衬底基板上的正投影间隔设置，所述第三有源层在所述衬底基板上的正投影与所述光电转换器在所述衬底基板上的正投影间隔设置。
例如，在本公开一实施例提供的光电传感器中，所述光电转换层包括沿所述第一方向延伸的平分线，所述驱动电路位于所述平分线在所述第二方向上的一侧。
例如，在本公开一实施例提供的光电传感器中，所述复位子电路还包括第一控制电极，所述信号读取子电路包括第二控制电极、第二源极和第二漏极，所述信号放大子电路包括第三控制电极、第三源极和第三漏极，所述第三漏极与所述第二源极相连，所述第一漏极与所述第三控制电极相连。
例如，本公开一实施例提供的光电传感器还包括：电源线，沿第二方向延伸，并被配置为与所述第一源极和所述第三源极相连；数据读取控制线，沿所述第一方向延伸，被配置为与所述第二控制电极相连；复位控制线，沿所述第一方向延伸，并被配置为与所述第一控制电极相连；以及数据信号线，沿所述第二方向延伸，并被配置为与所述第二漏极相连。
例如，在本公开一实施例提供的光电传感器中，所述复位控制线在衬底基板上的正投影与所述光电转换层在所述衬底基板上的正投影部分重叠，所述光电转换层包括沿所述第一方向延伸的平分线，所述复位控制线位于所述平分线靠近所述数据读取控制线的一侧。
例如，本公开一实施例提供的光电传感器还包括：复位连接块，沿第二方向延伸，且位于所述电源线与所述光电转换层之间，所述复位连接块分别与所述复位控制线和所述第一控制电极相连。
例如，在本公开一实施例提供的光电传感器中，所述光电转换器还包括：导电保护层，位于所述光电转换层远离所述第一电极的一侧；绝缘层，位于所述导电保护层远离所述衬底基板的一侧；第一钝化层，位于所述绝缘层远离所述导电保护层的一侧；以及第二电极，位于所述第一钝化层远离所述衬底基板的一侧，所述光电传感器还包括第一过孔，位于所述绝缘层和所述第一钝化层之中，所述第二电极通过所述第一过孔与所述导电保护层相连。
例如，本公开一实施例提供的光电传感器还包括：第二钝化层，位于所述第二电极远离所述衬底基板的一侧；以及静电保护层，位于所述第二钝化层远离所述第二电极的一侧。
例如，在本公开一实施例提供的光电传感器中，所述导电保护层的材料为透明导电氧化物，所述第二电极的材料为透明导电氧化物。
例如，在本公开一实施例提供的光电传感器中，述光电转换层包括N型半导体层、本征半导体层和P型半导体层。
本公开至少一个实施例还提供一种图像传感器，包括多个光电传感器，各光电传感器为上述任一项所述的光电传感器。
例如，在本公开一实施例提供的图像传感器中，所述多个光电传感器阵列设置。
本公开至少一个实施例还提供一种电子装置，其包括上述的图像传感器。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为一种光电传感器的平面示意图；
图2为图1所示的光电传感器的剖面示意图；
图3为本公开一实施例提供的一种光电传感器的平面示意图；
图4为本公开一实施例提供的一种光电传感器沿图3中AA线的剖面示意图；
图5为本公开一实施例提供的一种光电传感器中驱动电路的等效示意图；
图6为本公开一实施例提供的一种光电转换层的示意图；
图7为本公开一实施例提供的一种图像传感器的示意图；以及
图8为本公开一实施例提供的一种电子装置的示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其它实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。
互补金属氧化物半导体元件(CMOS)还可分为被动式像素传感器(Passive Pixel Sensor)和主动式像素传感器(Active Pixel Sensor)；主动式像素传感器可提高影像质量、降低噪声干扰，并且薄膜晶体管技术发展日渐成熟，薄膜晶体管技术与主动式像素传感器的结合或成为大尺寸影像传感器的未来趋势。采用主动式像素传感器和薄膜晶体管结合的设计，可对输入信号进行放大、提高信噪比、并兼容多路模拟开关(MUX)功能。另一方面，利用低温多晶硅(LTPS)更快的响应速度，可实现高帧频、低剂量，从而可大幅提高应用场景与市场认可度。
图1为一种光电传感器的平面示意图；图2为图1所示的光电传感器的剖面示意图。如图1和图2所示，该光电传感器10包括衬底基板11、驱动电路 20和光电转换器30；驱动电路20位于衬底基板11上，光电转换器30位于驱动电路20远离衬底基板11的一侧；驱动电路20可包括依次层叠设置的有源层21、栅极绝缘层22、栅极层23、层间绝缘层24和第一导电层25；上述的四层均需要进行图案化，因此需要4道曝光制程。该光电传感器10还包括平坦层40和第一钝化层51，位于驱动电路20和光电转换器30之间，以将驱动电路20和光电转换器30隔开；光电转换器30包括第一电极31、光电转换层32、导电保护层33、绝缘层34、第二钝化层52、第二电极35、第三钝化层53和静电保护层36；上述的光电转换层32需要3道曝光制成，第一电极31、导电保护层33、第二电极层35和静电保护层36需要4道曝光制程，而绝缘层34和第二钝化层52需要形成过孔，因此也需要2道曝光制程。该光电传感器采用13道曝光制程，导致成本相对较高。
对此，本公开实施例提供一种光电传感器、图像传感器和电子装置。该光电传感器包括衬底基板、驱动电路和光电转换器；驱动电路和光电转换器均位于衬底基板上；光电转换器包括第一电极和光电转换层，光电转换层位于第一电极远离衬底基板的一侧；驱动电路包括复位子电路，复位子电路包括第一源极和第一漏极，第一电极和第一漏极集成为同一电极，且与第一源极同层设置。由此，该光电传感器通过将复位子电路的第一漏极和光电转换器的第一电极同层设置且连接为一体，从而可节省多个膜层结构和多个曝光制程，进而可降低该光电传感器的成本并降低该光电传感器的体积。
下面，结合附图对本公开实施例提供的光电传感器、图像传感器和电子装置进行详细的说明。
本公开一实施例提供一种光电传感器。图3为本公开一实施例提供的一种光电传感器的平面示意图；图4为本公开一实施例提供的一种光电传感器沿图3中AB线的剖面示意图。
如图3和图4所示，该光电传感器100包括衬底基板110、驱动电路120和光电转换器130；驱动电路120位于衬底基板110上，光电转换器130位于衬底基板110上；光电转换器130包括第一电极131和光电转换层132，光电转换层132位于第一电极131远离衬底基板110的一侧。驱动电路120包括复位子电路121，复位子电路121包括第一源极121S和第一漏极121D，第一电极131和第一漏极121D集成为同一电极，且与第一源极121S同层设置。
在本公开实施例提供的光电传感器中，第一电极和第一漏极集成为同一电 极，且与第一源极同层设置；该光电传感器通过将复位子电路的第一漏极和光电转换器的第一电极同层设置且连接为一体(相当于复位子电路的第一漏极也复用为光电转换器的第一电极)，从而可节省多个膜层结构和多个曝光制程，进而可降低该光电传感器的成本并降低该光电传感器的体积。例如，可节省驱动电路和光电转换器之间的平坦层和钝化层以及第一电极所在的膜层。
在一些示例中，如图3所示，光电转换器132的第一电极131在衬底基板110上的正投影与第一源极121S在衬底基板110上的正投影间隔设置；也就是说，光电传感器130的第一电极131与第一源极121S不重叠。由此，当复位子电路121的第一漏极121D和光电转换器130的第一电极131同层设置且连接为一体时，与第一电极131同层设置的第一源极121S不会阻碍第一电极131的设置。从而，该光电转换器中的第一电极131或第一漏极121可具有较大的面积，从而满足设计需要，防止光电转换器提前饱和。
在一些示例中，如图3所示，在该光电转换器100中，复位子电路121包括复位晶体管T1，复位晶体管T1包括第一有源层121A，光电转换层131在衬底基板110上的正投影与第一有源层121A在衬底基板110上的正投影的重叠面积小于第一有源层121A在衬底基板110上的正投影的面积的1/2。由此，在该光电转换器100中，光电转换层131与驱动电路120的重叠面积较小，从而便于形成较大面积的第一电极131或者复位子电路的第一漏极121D，从而满足设计需要，防止光电转换器提前饱和。
进一步地，在该光电转换器100中，复位子电路121包括复位晶体管T1，复位晶体管T1包括第一有源层121A，光电转换层131在衬底基板110上的正投影与第一有源层121A在衬底基板110上的正投影的重叠面积小于第一有源层121A在衬底基板110上的正投影的面积的1/3。由此，在该光电转换器100中，光电转换层131与驱动电路120的重叠面积更小，从而便于形成更大面积的第一电极131或者复位子电路的第一漏极121D。
图5为本公开一实施例提供的一种光电传感器中驱动电路的等效示意图。如图3和图5所示，该驱动电路120还包括信号读取子电路122和信号放大子电路123；信号读取子电路122在衬底基板110上的正投影、信号放大子电路123在衬底基板110上的正投影和复位子电路121在衬底基板110上的正投影沿第一方向X依次排列，驱动电路120和光电转换器130沿第二方向Y依次排列。由此，该光电传感器可提供一种驱动电路和光电转换器“共面”的设计， 并且提高了驱动电路的集成度，降低了驱动电路所占的面积，从而可便于形成较大面积的第一电极131或者复位子电路的第一漏极121D，从而满足设计需要，防止光电转换器提前饱和。
在一些示例中，如图3所示，光电转换层132包括沿第一方向延伸的平分线1320，驱动电路120位于平分线1320在第二方向上的一侧。需要说明的是，上述的平分线是指光电转换层在衬底基板上的正投影的面积平分线。
例如，根据实测数据：在光照强度为10w lux，像素节距(pitch)为70μm的情况下，像素累计的电荷量约为220fc，折合填充率，可算得出单位面积光电转换器的电荷量为0.05(fc/μm 2)；通常的主动式像素传感器(APS)的线性电压变化范围为1.5V，根据C＝Q/U，取U＝1.5V，可以计算出主动式像素传感器(APS)需要的最小的光电转换层(例如光电二极管)的电容，在根据膜层的介电常数，可以得出需要的光电转换层的最小面积约为1600μm 2。根据本公开实施例提供的光电传感器的的实际版图设计可知，在像素节距为70μm的情形下，可以满足光电转换层的面积等于1600μm 2的设计。需要说明的是，上述的像素节距可视为一个光电传感器所占的方形区域的边长的尺寸。
在一些示例中，如图3和图5所示，复位子电路121还包括第一控制电极121G，信号读取子电路122包括第二控制电极122G、第二源极122S和第二漏极122D，信号放大子电路123包括第三控制电极123G、第三源极123S和第三漏极123D，第三漏极123D与第二源极122S相连，第一漏极121D与第三控制电极123G相连。
在一些示例中，如图3和图5所示，光电传感器100还包括电源线191、数据读取控制线192、复位控制线193和数据信号线194；电源线191沿第二方向Y延伸，并被配置为与第一源极121S和第三源极123S相连；数据读取控制线192沿第一方向X延伸，并被配置为与第二控制电极122G相连；复位控制线193沿第一方向X延伸，并被配置为与第一控制电极121G相连；数据信号线194沿第二方向Y延伸，并被配置为与第二漏极122D相连。由此，该复位子电路可利用电源线191提供的电源电压(例如VDD)对光电转换器130的第一电极131进行复位；该信号放大电路123可利用电源191提供的电源电压将光电转换层132产生的电压进行放大；数据读取子电路122可将经过信号放大电路123放大后的电压读出。
在一些示例中，如图3和图5所示，复位子电路121可为复位晶体管T1， 信号放大子电路122可为信号放大晶体管T3，数据读取子电路122可为数据读取晶体管T2。复位晶体管T1包括第一有源层121A，数据读取晶体管T2包括第二有源层122A，信号放大晶体管T3包括第三有源层123A；第一有源层121A、第二有源层122A和第三有源层123A的材料采用低温多晶硅(LTPS)材料，从而使得复位晶体管T1、数据读取晶体管T2和信号放大晶体管T3具有更快的响应速度和较高的载流子迁移率。
在一些示例中，如图3所示，第二有源层122A在衬底基板110上的正投影与光电转换层132在衬底基板110上的正投影间隔设置，也就是说，第二有源层122A与光电转换层132不交叠；第三有源层123A在衬底基板110上的正投影与光电转换层132在衬底基板110上的正投影间隔设置，也就是说，第三有源层123A与光电转换层132不交叠。
下面，结合图5对本公开实施例提供的驱动电路的工作过程进行简单说明。在驱动电路120中，复位晶体管T1用于进行复位，信号放大晶体管T3用于对光电转换器130产生的信号进行放大，信号读取晶体管T2用于读取放大后的信号。首先，复位信号线193向复位晶体管T1的第一控制电极121G施加复位信号，以将复位晶体管T1打开，此时信号放大晶体管T3的第三控制电极123G被复位为电源191上的电源信号(例如VDD)，并工作在饱和状态；然后，光电转换器130经光照产生光漏流，光漏流导致光电转换器130的第一电极131的电位下降；最后，数据读取控制线192向信号读取晶体管T2的第二控制电极122G施加栅极信号，此时信号读取晶体管T2打开，信号放大晶体管T3的第三控制电极123G上电位变化量经信号放大晶体管T3放大后被数据线194读出。需要说明的是，本公开实施例包括但不限于此，驱动电路也可采用其他合适的结构，并且采用其他合适的工作过程。
在一些示例中，如图3和图5所示，复位控制线193在衬底基板110上的正投影与光电转换层132在衬底基板110上的正投影部分重叠；光电转换层132包括沿第一方向延伸的平分线1320，复位控制线193位于平分线1320靠近数据读取控制线192的一侧。
在一些示例中，如图3和图5所示，光电传感器100还包括复位连接块1935，复位连接块1935沿第二方向延伸，且位于电源线191和光电转换层132之间；复位连接块1935分别与复位控制线193和第一控制电极121G相连。
在一些示例中，如图3和图5所示，第二有源层122A和第三有源层123A 均沿第一方向延伸；第一有源层121A沿第二方向延伸。
例如，第一方向和第二方向互相垂直；需要说明的是，上述的互相垂直包括第一方向和第二方向完全垂直的情况，也包括第一方向和第二方向之间的夹角在80-100度。
在一些示例中，如图3和图4所示，驱动电路120包括依次设置的有源层161、栅极绝缘层162、栅极层163、层间绝缘层163和源漏金属层164。复位晶体管T1的第一有源层121A、数据读取晶体管T2的第二有源层122A和数据放大晶体管T3的第三有源层123A可均位于有源层161。复位晶体管T1的第一源极121S和第一漏极121D均位于源漏金属层164。
在一些示例中，如图3所示，数据读取晶体管T2可采用双栅结构，从而可提高性能。当然，本公开实施例包括但不限于此，数据读取晶体管也可采用其他结构。
在一些示例中，如图4所示，光电转换器100还包括导电保护层133、绝缘层134、第一钝化层135和第二电极136；导电保护层133位于光电转换层132远离第一电极131的一侧；绝缘层134位于导电保护层133远离衬底基板110的一侧；第一钝化层135位于绝缘层134远离导电保护层133的一侧；第二电极136位于第一钝化层135远离衬底基板110的一侧。光电传感器100还包括过孔H1，过孔H1位于绝缘层134和第一钝化层135之中，第二电极136通过过孔H1与导电保护层133相连。由此，导电保护层133可作为光电转换层132的保护层；而绝缘层134和第一钝化层135可作为平坦化层，使得形成在绝缘层134和第一钝化层135上的第二电极136具有更好的平坦度。
在一些示例中，如图3和图4所示，第二电极136包括：第一镂空部301，第一镂空部301在衬底基板110上的正投影与数据信号线194在衬底基板110上的正投影至少部分重叠；第二镂空部302，第二镂空部302在衬底基板110上的正投影与数据读取控制线192在衬底基板110上的正投影至少部分重叠。由此，通过设置上述的第一镂空部和第二镂空部，可降低数据信号线和数据读取控制线上的负载，提高该光电转换器的性能。
在一些示例中，第一镂空部301在第一方向上的尺寸范围为8-10微米，第一镂空部301在第二方向上的尺寸范围为40-46微米，第二镂空部302在第一方向上的尺寸范围为50-58微米，第二镂空部302在所述第二方向上的尺寸范围为8-10微米。需要说明的是，本公开实施例包括但不限于此，第一镂空 部和第二镂空部的尺寸可根据实际需要进行设置。
在一些示例中，如图3和图4所示，过孔H1在衬底基板110上的正投影的面积大于光电转换层132在衬底基板110上的正投影的面积的50％，从而可增强光电转换层132与第二电极136的电连接。
例如，导电保护层133与光电转换层132可采用同一掩膜板进行图案化，从而可节省掩膜工艺。此时，导电保护层133在衬底基板110上的正投影的形状与光电转换层132在衬底基板110上的正投影的形状相同；或者，导电保护层133在衬底基板110上的正投影略小于与光电转换层132在衬底基板110上的正投影。例如，导电保护层133在衬底基板110上的正投影的边缘与光电转换层132在衬底基板110上的正投影的边缘的最短距离为0.5微米左右。
例如，绝缘层134的材料可采用树脂。当然，本公开实施例包括但不限于此，绝缘层134也可采用其他材料制作。
例如，第一钝化层135的材料可选自氧化硅、氮化硅或氮氧化硅中的一种或多种。
在一些示例中，如图3和图4所示，光电转换层132在衬底基板110上的正投影落入第一电极131在衬底基板110上的正投影的范围之内；光电转换层132在衬底基板110上的正投影的面积小于第一电极131在衬底基板110上的正投影的面积，从而可提高第一电极131远离衬底基板110的一侧形成的光电转换层132的平整度，从而可该光电转换器130的性能。
在一些示例中，如图3和图4所示，导电保护层133在衬底基板110上的正投影的面积小于光电转换层132在衬底基板110上的正投影的面积小于第一电极131在衬底基板110上的正投影的面积。
在一些示例中，如图4所示，该光电传感器100还包括第二钝化层140和静电保护层150；第二钝化层140位于第二电极136远离衬底基板110的一侧；静电保护层150位于第二钝化层140远离第二电极136的一侧。由此，静电保护层150可起到防止静电的作用，从而可提高该光电传感器的安全性和稳定性。
在一些示例中，如图4所示，静电保护层150在衬底基板110上的正投影与第二电极136在衬底基板110上的正投影完全重叠。由此，静电保护层150和第二电极136可采用相同的掩膜板进行制作，从而可节省一张掩膜板。
例如，导电保护层133的材料可为透明导电氧化物，例如氧化铟锡(ITO)；第二电极136的材料可为透明导电氧化物，例如氧化铟锡(ITO)；当然，本公 开实施例包括但不限于此，导电保护层和第二电极也可采用其他合适的材料。
例如，静电保护层150的材料可为透明导电氧化物，例如氧化铟锡(ITO)。当然，本公开实施例包括但不限于此，静电保护层150也可采用其他合适的材料。
图6为本公开一实施例提供的一种光电转换层的示意图。如图6所示，光电转换层132包括n型半导体层1321、本征半导体层1322和p型半导体层1323。也就是说，光电转换层132采用PIN结构的光电二极管(photodiode)。
本公开一实施例还提供一种图像传感器。图7为本公开一实施例提供的一种图像传感器的示意图。如图7所示，该图像传感器200包括多个光电传感器100，各光电传感器100可为上述任一示例提供的光电传感器100。由此，由于在上述的光电传感器可通过将复位子电路的第一漏极和光电转换器的第一电极同层设置且连接为一体，从而可节省多个膜层结构和多个曝光制程，进而可降低该光电传感器的成本并降低该光电传感器的体积。因此，该图像传感器具有较低的成本、较小的体积和较高的性能。
在一些示例中，如图7所示，多个光电传感器100阵列设置，从而在图像传感器200受到光线照射时，可方便地将所有的光电传感器所产生的信号结合在一起，以构成了一幅完整的画面。
本公开一实施例还提供一种电子装置。图8为本公开一实施例提供的一种电子装置的示意图。如图8所示，该电子装置400包括上述的图像传感器200。由此，该电子装置也具有较低的成本、较小的体积和较高的性能。
例如，该电子装置可为智能手机、平板电脑、笔记本电脑、导航仪、智能相机等具有拍摄功能的电子装置。
有以下几点需要说明：
(1)本公开的实施例附图中，只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)在不冲突的情况下，本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。

Claims (20)

  1. 一种光电传感器，包括：
    衬底基板；
    驱动电路，位于衬底基板上；
    光电转换器，位于衬底基板上，
    其中，所述光电转换器包括第一电极和光电转换层，所述光电转换层位于所述第一电极远离所述衬底基板的一侧，
    所述驱动电路包括复位子电路，所述复位子电路包括第一源极和第一漏极，所述第一电极和所述第一漏极集成为同一电极，且与所述第一源极同层设置。
  2. 根据权利要求1所述的光电传感器，其中，所述光电转换器的所述第一电极在衬底基板上的正投影与所述第一源极在所述衬底基板上的正投影间隔设置。
  3. 根据权利要求1所述的光电传感器，其中，所述复位子电路包括复位晶体管，所述复位晶体管包括第一有源层，所述光电转换层在衬底基板上的正投影与所述第一有源层在所述衬底基板上的正投影的重叠面积小于所述第一有源层在所述衬底基板上的正投影的面积的1/2。
  4. 根据权利要求1所述的光电传感器，其中，所述光电转换层在所述衬底基板上的正投影落入所述第一电极在所述衬底基板上的正投影的范围之内。
  5. 根据权利要求1-4中任一项所述的光电传感器，其中，所述驱动电路还包括信号读取子电路和信号放大子电路，
    所述信号读取子电路在所述衬底基板上的正投影、所述信号放大子电路在所述衬底基板上的正投影和所述复位子电路在所述衬底基板上的正投影沿第一方向依次排列，所述驱动电路在所述衬底基板上的正投影和所述光电转换器在所述衬底基板上的正投影沿第二方向依次排列。
  6. 根据权利要求5所述的光电传感器，其中，所述信号读取子电路包括信号读取晶体管，所述信号放大子电路包括信号放大晶体管，所述信号读取晶体管包括第二有源层，所述信号放大晶体管包括第三有源层，
    所述第二有源层在所述衬底基板上的正投影与所述光电转换器在所述衬底基板上的正投影间隔设置，所述第三有源层在所述衬底基板上的正投影与所 述光电转换器在所述衬底基板上的正投影间隔设置。
  7. 根据权利要求5所述的光电传感器，其中，所述光电转换层包括沿所述第一方向延伸的平分线，所述驱动电路位于所述平分线在所述第二方向上的一侧。
  8. 根据权利要求5所述的光电传感器，其中，所述复位子电路还包括第一控制电极，所述信号读取子电路包括第二控制电极、第二源极和第二漏极，所述信号放大子电路包括第三控制电极、第三源极和第三漏极，
    所述第三漏极与所述第二源极相连，所述第一漏极与所述第三控制电极相连。
  9. 根据权利要求5所述的光电传感器，还包括：
    电源线，沿第二方向延伸，并被配置为与所述第一源极和所述第三源极相连；
    数据读取控制线，沿所述第一方向延伸，被配置为与所述第二控制电极相连；
    复位控制线，沿所述第一方向延伸，并被配置为与所述第一控制电极相连；以及
    数据信号线，沿所述第二方向延伸，并被配置为与所述第二漏极相连。
  10. 根据权利要求9所述的光电传感器，其中，所述复位控制线在所述衬底基板上的正投影与所述光电转换层在所述衬底基板上的正投影部分重叠，
    所述光电转换层包括沿所述第一方向延伸的平分线，所述复位控制线位于所述平分线靠近所述数据读取控制线的一侧。
  11. 根据权利要求10所述的光电传感器，还包括：
    复位连接块，沿所述第二方向延伸，且位于所述电源线与所述光电转换层之间，
    所述复位连接块分别与所述复位控制线和所述第一控制电极相连。
  12. 根据权利要求9-11中任一项所述的光电传感器，其中，所述光电转换器还包括：
    导电保护层，位于所述光电转换层远离所述第一电极的一侧；
    绝缘层，位于所述导电保护层远离所述衬底基板的一侧；
    第一钝化层，位于所述绝缘层远离所述导电保护层的一侧；以及
    第二电极，位于所述第一钝化层远离所述衬底基板的一侧，
    其中，所述光电传感器还包括过孔，位于所述绝缘层和所述第一钝化层之中，所述第二电极通过所述过孔与所述导电保护层相连。
  13. 根据权利要求12所述的光电传感器，其中，所述第二电极包括：
    第一镂空部，所述第一镂空部在所述衬底基板上的正投影与所述数据信号线在所述衬底基板上的正投影至少部分重叠；以及
    第二镂空部，所述第二镂空部在所述衬底基板上的正投影与所述数据读取控制线在所述衬底基板上的正投影至少部分重叠。
  14. 根据权利要求13所述的光电传感器，其中，所述第一镂空部在所述第一方向上的尺寸范围为8-10微米，所述第一镂空部在所述第二方向上的尺寸范围为40-46微米，
    所述第二镂空部在所述第一方向上的尺寸范围为50-58微米，所述第二镂空部在所述第二方向上的尺寸范围为8-10微米。
  15. 根据权利要求12所述的光电传感器，还包括：
    第二钝化层，位于所述第二电极远离所述衬底基板的一侧；以及
    静电保护层，位于所述第二钝化层远离所述第二电极的一侧。
  16. 根据权利要求12所述的光电传感器，其中，所述导电保护层的材料为透明导电氧化物，所述第二电极的材料为透明导电氧化物。
  17. 根据权利要求1-14中任一项所述的光电传感器，其中，所述光电转换层包括依次层叠的N型半导体层、本征半导体层和P型半导体层。
  18. 一种图像传感器，包括多个光电传感器，其中各所述光电传感器为根据权利要求1-17中任一项所述的光电传感器。
  19. 根据权利要求18所述的图像传感器，其中，所述多个光电传感器阵列设置。
  20. 一种电子装置，包括根据权利要求18或19所述的图像传感器。
PCT/CN2021/102330 2021-06-25 2021-06-25 光电传感器、图像传感器和电子装置 WO2022266991A1 (zh)

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CN102097443A (zh) * 2009-11-17 2011-06-15 索尼公司 固体摄像器件、制造固体摄像器件的方法以及电子装置
CN110556390A (zh) * 2018-05-31 2019-12-10 松下知识产权经营株式会社 摄像装置
CN110771156A (zh) * 2017-06-21 2020-02-07 索尼半导体解决方案公司 成像元件、层叠式成像元件和固态成像装置
CN111477643A (zh) * 2019-01-24 2020-07-31 三星电子株式会社 图像传感器
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