WO2022266811A1 - 感压电路板及感压电路板的制作方法 - Google Patents

感压电路板及感压电路板的制作方法 Download PDF

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Publication number
WO2022266811A1
WO2022266811A1 PCT/CN2021/101307 CN2021101307W WO2022266811A1 WO 2022266811 A1 WO2022266811 A1 WO 2022266811A1 CN 2021101307 W CN2021101307 W CN 2021101307W WO 2022266811 A1 WO2022266811 A1 WO 2022266811A1
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WIPO (PCT)
Prior art keywords
layer
copper
pressure
circuit
circuit board
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PCT/CN2021/101307
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English (en)
French (fr)
Inventor
沈芾云
徐筱婷
何明展
Original Assignee
鹏鼎控股(深圳)股份有限公司
庆鼎精密电子（淮安）有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 鹏鼎控股(深圳)股份有限公司, 庆鼎精密电子（淮安）有限公司 filed Critical 鹏鼎控股(深圳)股份有限公司
Priority to CN202180035784.XA priority Critical patent/CN115885585A/zh
Priority to PCT/CN2021/101307 priority patent/WO2022266811A1/zh
Priority to TW110123231A priority patent/TWI778684B/zh
Publication of WO2022266811A1 publication Critical patent/WO2022266811A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L9/00—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
    • G01L9/02—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means by making use of variations in ohmic resistance, e.g. of potentiometers, electric circuits therefor, e.g. bridges, amplifiers or signal conditioning
    • G01L9/06—Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means by making use of variations in ohmic resistance, e.g. of potentiometers, electric circuits therefor, e.g. bridges, amplifiers or signal conditioning of piezo-resistive devices
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits

Definitions

  • the present application relates to the field of pressure sensors, in particular to a pressure-sensing circuit board and a method for manufacturing the pressure-sensing circuit board.
  • intelligent equipment is applied in various fields, such as communication, medical, automobile, industrial control, etc., and intelligent equipment is inseparable from the use of pressure sensors.
  • Capacitive pressure sensors require high processing precision; resistive pressure sensors have poor linearity and poor durability; piezoelectric ceramic pressure sensors require high-temperature sintering, the manufacturing process is difficult, and only instantaneous pressure can be tested, and the above pressure sensors are up and down Both surfaces need to be supported.
  • a pressure-sensitive circuit board comprising: a dielectric layer, a circuit layer, a strain layer and a protective layer, the circuit layer is located on the surface of the dielectric layer; the strain layer is located on the surface of the dielectric layer on the same side as the circuit layer; the protection The layer is located on the surface of the circuit layer and the strain layer; wherein, the pressure-sensitive circuit board includes a first copper area, a second copper area, and a copper-free area connected in sequence; the circuit layer is located on the first copper area.
  • the thickness of the circuit layer located in the first copper region is greater than the thickness of the circuit layer located in the second copper region, located in the
  • the circuit layer in the second copper region is in grid shape; the strain layer is located in the copper-free region and connected to the circuit layer; the protective layer is located on the surface of the circuit layer in the second copper region and covers the strained layer.
  • the grid-like circuit layer includes at least one of interlaced grid-like circuits, non-interlaced corrugated-type circuits, and horseshoe-shaped circuits.
  • the thickness of the strain layer is greater than the thickness of the wiring layer located in the second copper region.
  • the strained layer is also located in the second copper region, and covers part of the surface of the circuit layer located in the second copper region, and the strained layer and the circuit layer located in the second copper region form overlapping structures.
  • the pressure-sensing circuit board further includes three resistors with fixed resistance values, and the three resistors and the strain layer form a Wheatstone bridge.
  • the pressure-sensitive circuit board further includes an insulating layer, and the insulating layer covers the surface of the circuit layer located in the first copper region.
  • the following steps are included: providing a copper-clad substrate, including a dielectric layer and a copper layer located on the surface of the dielectric layer; performing local copper reduction treatment on the copper layer to form the second copper region and the first copper area; remove part of the copper layer located in the second copper area to form a copper-free area, so that part of the dielectric layer is exposed, and perform wiring on the copper layer to form a wiring layer, wherein the remaining copper layer located in the first
  • the copper layer in the second copper area is meshed to form a grid line layer; a strain layer is formed on the surface of the dielectric layer in the copper-free area; and a strain layer is formed on the surface of the line layer in the second copper area.
  • a protective layer is formed, and the protective layer also covers the strained layer, thereby forming the pressure-sensitive circuit board.
  • the thickness of the strain layer is greater than the thickness of the circuit layer located in the second copper region.
  • the strained layer in the step of forming the strained layer, also covers the surface of the wiring layer adjacent to the second copper region.
  • the manufacturing method further includes: forming an insulating layer on the surface of the wiring layer located in the first copper region.
  • the pressure-sensitive circuit board provided by this application through the circuit layer and strain layer arranged on the surface of the dielectric layer, when the strain layer is subjected to external force, the resistance of the strain layer changes, thereby making the resistance of the pressure-sensitive circuit board in the electrical circuit changes happened.
  • the resistance changes the voltage monitored in the electrical circuit will change, and the magnitude of the external force on the strain layer is calculated according to the magnitude of the voltage change.
  • the resistance of the strain layer changes linearly when the external force is applied, and the resistance when the external force is lost The value is restored, and the external force received at any time can be tested, and the linearity is good;
  • the durability of the pressure-sensitive circuit board is improved through the setting of the protective layer located in the strain layer; in the second copper area of the pressure-sensitive circuit board, A grid-shaped circuit layer is set to improve the strain capacity of the circuit layer, thereby improving the sensitivity of the pressure-sensitive circuit board;
  • the dielectric layer is provided on one side of the circuit layer, the strain layer and the protective layer to simplify the structure of the pressure-sensitive circuit board;
  • the above-mentioned pressure-sensitive circuit board has a simple manufacturing method.
  • FIG. 1 is a schematic cross-sectional view of a copper-clad substrate including a dielectric layer and a copper layer provided by an embodiment of the present application.
  • FIG. 2 is a schematic cross-sectional view of performing local copper reduction treatment on the copper layer shown in FIG. 1 to form a second copper region and a first copper region.
  • FIG. 3 is a schematic cross-sectional view of removing part of the copper layer located in the second copper region shown in FIG. 2 to form a copper-free region, and performing circuit fabrication on the copper layer to form a circuit layer to form a grid-like circuit layer.
  • FIG. 4 is a top view of an interlaced grid circuit layer formed according to an embodiment of the present application.
  • Fig. 5 is a top view of a non-staggered corrugated circuit layer formed in another embodiment of the present application.
  • FIG. 6 is a top view of a horseshoe-shaped circuit layer formed in still another embodiment of the present application.
  • FIG. 7 is a schematic cross-sectional view of forming an insulating layer covering the circuit layer on the first copper region shown in FIG. 3 .
  • FIG. 8 is a schematic cross-sectional view of forming a strained layer on the surface of the dielectric layer in the copper-free area shown in FIG. 7 .
  • FIG. 9 is a schematic cross-sectional view of forming a protective layer on the surface of the circuit layer in the second copper region and the surface of the strain layer shown in FIG. 8 to form the pressure-sensitive circuit board.
  • FIG. 10 is a schematic diagram of connection of a Wheatstone bridge formed by a strained layer in an embodiment of the present application.
  • connection used in the specification and claims of the present application is not limited to physical or mechanical connection, no matter it is direct or indirect. of. "Up”, “Down”, “Above”, “Bottom”, “Left”, “Right” and so on are only used to indicate the relative positional relationship. When the absolute position of the described object changes, the relative positional relationship is also corresponding Change.
  • the embodiment of the present application provides a method for manufacturing a pressure-sensitive circuit board 100, which includes the following steps:
  • Step S1 Referring to FIG. 1 , a copper-clad substrate 10 is provided, including a dielectric layer 12 and a copper layer 14 on the surface of the dielectric layer 12 .
  • the material of the medium layer 12 can be a rigid material or a flexible material.
  • the material of the medium layer 12 may include but not limited to polyimide (Polyimide, PI), polyester resin (Polyethylene terephthalate, PET), polyethylene naphthalate (Polyethylene naphthalate two formic acid glycol ester, PEN) , liquid crystal polymer (LCP) and modified polyimide (modified polyimide, MPI), etc.
  • the copper layer 14 can be located on one surface of the dielectric layer 12 , or on two opposite surfaces of the dielectric layer 12 . In this embodiment, the copper layer 14 is located on one surface of the dielectric layer 12 .
  • an embedded circuit layer (not shown) electrically connected to the copper layer 14 may also be buried in the dielectric layer 12, so that the pressure-sensitive circuit board 100 produced has a multilayer circuit Floor.
  • Step S2 Referring to FIG. 2 , performing local copper reduction treatment on the copper layer 14 to form a second copper region II and a first copper region I.
  • Step S3 Please refer to FIG. 3 to FIG. 6, removing part of the copper layer 14 located in the second copper region II to form a copper-free region III, so that part of the dielectric layer 12 is exposed, and the copper layer 14 is Circuit fabrication forms a circuit layer 145 , wherein the remaining copper layer 14 located in the second copper region II is subjected to grid processing to form a grid-like circuit layer 145 .
  • the copper layer 14 is not provided on the surface of the dielectric layer 12 located in the copper-free region III.
  • the copper-free zone III and the first copper zone I are spaced apart by the second copper zone II, and the surfaces of the first copper zone I, the second copper zone II, and the copper-free zone III are sequentially arranged form a step shape, that is, along the stacking direction of the copper layer 14 and the dielectric layer 12, the thickness of the copper layer 14 located in the first copper region I is greater than that of the copper layer 14 located in the second copper region II thickness.
  • the grid-like circuit layers 145 formed by the gridding process may be connected or not connected to each other, including but not limited to interlaced grid lines (see FIG. 4 ), non-staggered corrugated lines (see FIG. 5 ). and horseshoe-shaped lines (see Figure 6).
  • the formation of the grid-like circuit layer 145 is more likely to deform when subjected to an external force, thereby improving the strain capacity of the circuit layer 145 .
  • Step S4 Referring to FIG. 7 , an insulating layer 20 covering the circuit layer 145 is formed on the first copper region I.
  • the insulating layer 20 is used to prevent the circuit layer 145 from being oxidized.
  • Step S5 Referring to FIG. 8 , a strained layer 30 is formed on the surface of the dielectric layer 12 in the copper-free region III.
  • the material of the strain layer 30 is a material that deforms when subjected to an external force to cause a change in resistance, including but not limited to metal, carbon-containing conductive resin, and the like.
  • the thickness of the strained layer 30 is greater than the thickness of the copper layer 14 of the second copper region II, and due to the fluidity of the strained layer 30, the strained layer 30 also covers On the surface of the circuit layer 145 adjacent to the second copper region II, the strain layer 30 covers at least part of the circuit layer 145 located in the second copper region II, that is, the strain layer 30 and the circuit layer 145 form
  • the overlapping structure increases the contact area between the strain layer 30 and the circuit layer 145 , improves connection reliability and avoids poor contact.
  • a step of forming a treatment layer on the surface of the wiring layer 145 is further included to prevent the wiring layer 145 from being oxidized.
  • Step S6 Please refer to FIG. 10 , forming a protective layer 40 on the surface of the circuit layer 145 of the second copper region II, and the protective layer 40 also covers the strained layer 30, thereby forming the pressure-sensitive circuit board 100 .
  • the material of the protective layer 40 is an insulating ink layer, the ink layer has good ductility, and the protective layer 40 will not crack when subjected to external force.
  • the step of forming the insulating layer 20 may be followed by the step of forming the strain layer 30 and/or the protective layer 40 .
  • the pressure-sensing circuit board 100 also includes three resistors R1, R2, and R3 with fixed resistance values, the resistor R1 is connected in series with the resistor R2, and the resistor R3 is connected in series with the resistor Rx formed by the strain layer 30, and then Connect the serially connected resistors R1 and R2 in parallel with the serially connected resistors R3 and Rx to form a Wheatstone bridge, using the characteristics of the bridge to construct the entire circuit loop, so that the pressure-sensing circuit board 100 can work more sensitively and effectively .
  • the resistance Rx composed of the strained layer 30 changes, the voltage between the two points B and D in the figure changes.
  • the change amount of the resistance Rx can be obtained through calculation, and thus the strained layer can be calculated.
  • 30 The size of the external force received.
  • the present application also provides a pressure-sensitive circuit board 100 .
  • the pressure-sensitive circuit board 100 includes a dielectric layer 12 , a circuit layer 145 , a strain layer 30 and a protective layer 40 .
  • the wiring layer 145 is located on the surface of the dielectric layer 12;
  • the strain layer 30 is located on the surface of the dielectric layer 12 on the same side as the wiring layer 145;
  • the protective layer 40 is located on the wiring layer 145 and the wiring layer 145.
  • the surface of the strained layer 30 is located on the surface of the dielectric layer 12.
  • the pressure-sensitive circuit board 100 includes a first copper area I, a second copper area II and a copper-free area III connected in sequence; the circuit layer 145 is located in the first copper area I and the second copper area II, along the stacking direction of the wiring layer 145 and the dielectric layer 12, the thickness of the wiring layer 145 located in the first copper region I is greater than the thickness of the wiring layer 145 located in the second copper region II, and located in the second copper region II.
  • the circuit layer 145 of the copper zone II is in a grid shape; the strain layer 30 is located in the copper-free zone III and connected to the circuit layer 145; the protective layer 40 is located in the circuit of the second copper zone II
  • the surface of the layer 145 covers the strained layer 30 .
  • the protective layer 40 When the protective layer 40 is subjected to an external force, the external force is transmitted to the strained layer 30, and the strained layer 30 generates strain under the external force, and the resistance of the strained layer 30 changes, thereby making the pressure-sensitive circuit board 100 The resistance in the circuit changes.
  • the resistance changes the voltage monitored in the electrical circuit will change, and the magnitude of the external force on the strained layer 30 is calculated according to the magnitude of the voltage change.
  • the material of the medium layer 12 can be a rigid material or a flexible material.
  • the material of the medium layer 12 may include but not limited to polyimide (Polyimide, PI), polyester resin (Polyethylene terephthalate, PET), polyethylene naphthalate (Polyethylene naphthalate two formic acid glycol ester, PEN) , liquid crystal polymer (LCP) and modified polyimide (modified polyimide, MPI), etc.
  • the material of the dielectric layer 12 is a flexible material, so that the pressure-sensitive circuit board 100 is flexible and can be bent at a suitable position to meet different needs of users.
  • the grid-like circuit layers 145 may be connected or not connected to each other, including but not limited to at least one of interlaced grid-like lines, non-staggered corrugated lines and horseshoe-shaped lines.
  • the formation of the grid-like circuit layer 145 is more likely to deform when subjected to an external force, thereby improving the strain capacity of the circuit layer 145 .
  • the thickness of the strain layer 30 is greater than the thickness of the wiring layer 145 located in the second copper region II, so that At least part of the strain layer 30 covers at least part of the wiring layer 145 located in the second copper region II, that is, the strain layer 30 and the wiring layer 145 form an overlapping structure, increasing the strain layer 30 and the wiring layer 145 contact area to improve connection reliability and avoid poor contact.
  • the strained layer 30 is also located in the second copper region II, and covers part of the surface of the circuit layer 145 located in the second copper region II, and is located in the second copper region II and the strained layer. 30 and the circuit layer 145 form an overlapping structure.
  • the protection layer 40 is located on the surface of the circuit layer 145 and the strain layer 30 .
  • the protection layer 40 is used to protect the circuit layer 145 and prevent the circuit layer 145 from being oxidized; on the other hand, the protection layer 40 also has ductility to prevent the protection layer 40 from being , the protective layer 40 will not appear cracks.
  • the pressure-sensitive circuit board 100 further includes an insulating layer 20 , and the insulating layer 20 covers the surface of the circuit layer 145 located in the first copper region I for protecting the circuit layer 145 .
  • the pressure-sensing circuit board 100 also includes three resistors R1, R2 and R3 with fixed resistance values, the resistor R1 is connected in series with the resistor R2, and the resistor R3 is connected in series with the resistor Rx composed of the strain layer 30. Then connect the serially connected resistors R1 and R2 in parallel with the serially connected resistors R3 and Rx to form a Wheatstone bridge, and use the characteristics of the bridge to construct the entire circuit loop, so that the pressure-sensing circuit board 100 can be more sensitive and effective. Work.
  • the pressure-sensitive circuit board 100 provided in this application, through the circuit layer 145 and the strain layer 30 arranged on the surface of the dielectric layer 12, when the strain layer 30 is subjected to an external force, the resistance of the strain layer 30 changes, thereby making the pressure-sensitive circuit board 100
  • the resistance in the electrical circuit changes, the voltage monitored in the electrical circuit will change, and the magnitude of the external force received by the strain layer 30 is calculated according to the magnitude of the voltage change; wherein, the resistance of the strain layer 30 changes linearly when subjected to an external force , the resistance value is recovered when the external force is lost, and the external force received at any time period can be tested, and the linearity is good; through the setting of the protective layer 40 located in the strain layer 30, the durability of the pressure-sensitive circuit board 100 is improved;
  • the second copper zone II of the pressure sensitive circuit board 100 is provided with a grid-shaped circuit layer 145 to enhance the strain capacity of the circuit layer 145, thereby improving the sensitivity of the pressure sensitive circuit board 100; the circuit layer 145, the strain layer

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

一种感压电路板(100)，包括：介质层(12)、线路层(145)、应变层(30)以及保护层(40)，线路层(145)位于介质层(12)的表面；应变层(30)位于与线路层(145)同侧的介质层(12)的表面；保护层(40)位于线路层(145)以及应变层(30)的表面；其中，感压电路板(100)包括依次连接的第一铜区(I)、第二铜区(II)以及无铜区(III)；线路层(145)位于第一铜区(I)以及第二铜区(II)，沿线路层(145)与介质层(12)的叠设方向，位于第一铜区(I)的线路层(145)的厚度大于位于第二铜区(II)的厚度，位于第二铜区(II)的线路层(145)呈网格状；应变层(30)位于无铜区(III)并与线路层(145)连接；保护层(40)位于第二铜区(II)的线路层(145)的表面并覆盖应变层(30)。本申请还提供一种感压电路板(100)的制作方法。

Description

感压电路板及感压电路板的制作方法 技术领域
本申请涉及压力传感器领域，尤其涉及一种感压电路板及感压电路板的制作方法。
背景技术
随着智能化生活的发展，智能化设备应用在各种领域，例如通讯领域、医疗领域、汽车领域、工控领域等，而智能化设备离不开压力传感器的使用。
现有的压力传感器包括电容式压力传感器、电阻式压力传感器、压电陶瓷压力传感器。电容式压力传感器所需的加工精度高；电阻式压力传感器线性度差、耐用性差；压电陶瓷压力传感器的制作需要高温烧结、制作工艺难度大，且只能测试瞬间压力，且上述压力传感器上下两表面均需要有支撑。
发明内容
有鉴于此，有必要提供一种能够解决上述技术问题的感压电路板。
另，还有必要提供一种感压电路板的制作方法。
一种感压电路板，包括：介质层、线路层、应变层以及保护层，线路层位于所述介质层的表面；应变层位于与所述线路层同侧的所述介质层的表面；保护层位于所述线路层以及所述应变层的表面；其中，所述感压电路板包括依次连接的第一铜区、第二铜区以及无铜区；所述线路层位于所述第一铜区以及所述第二铜区，沿所述线 路层与所述介质层的叠设方向，位于所述第一铜区的线路层的厚度大于位于所述第二铜区的厚度，位于所述第二铜区的所述线路层呈网格状；所述应变层位于所述无铜区并与所述线路层连接；所述保护层位于所述第二铜区的线路层的表面并覆盖所述应变层。
在一些实施方式中，所述网格状的线路层包括交错网格式线路、不交错波纹式线路以及马蹄铁型线路中的至少一种。
在一些实施方式中，沿所述线路层与所述介质层的叠设方向，所述应变层的厚度大于位于所述第二铜区的所述线路层的厚度。
在一些实施方式中，所述应变层还位于所述第二铜区，并覆盖位于所述第二铜区的线路层的部分表面，位于所述第二铜区与应变层与所述线路层形成交叠结构。
在一些实施方式中，所述感压电路板还包括三个具有固定电阻值的电阻，三个所述电阻与所述应变层形成惠斯通电桥。
在一些实施方式中，所述感压电路板还包括绝缘层，所述绝缘层覆盖位于所述第一铜区的线路层的表面。
在一些实施方式中，包括以下步骤：提供一覆铜基板，包括介质层以及位于所述介质层表面的铜层；对所述铜层进行局部减铜处理，形成第二铜区和第一铜区；去除位于所述第二铜区的部分铜层形成无铜区，以使所述介质层的部分暴露出来，对所述铜层进行线路制作形成线路层，其中，将剩余位于所述第二铜区的所述铜层进行网格化处理形成网格状线路层；在所述无铜区的所述介质层的表面形成应变层；在所述第二铜区的所述线路层表面形成保护层，所述保护层还覆盖所述应变层，从而形成所述感压电路板。
在一些实施方式中，沿所述铜层与所述介质层的叠设方向，所述应变层的厚度大于位于所述第二铜区的所述线路层的厚度。
在一些实施方式中，在形成所述应变层的步骤中，所述应变层还覆盖与所述第二铜区邻接的线路层表面。
在一些实施方式中，在形成所述线路层的步骤之后，所述制作方法还包括：在位于所述第一铜区的线路层的表面形成绝缘层。
本申请提供的感压电路板，通过设置于介质层表面的线路层、应变层，在应变层受到外力作用时，应变层的电阻发生变化，进而使得感压电路板在电性回路中的电阻发生改变。当电阻发生改变时，电性回路中监测的电压会发生改变，根据电压变化的大小计算应变层受到的外力的大小，其中，应变层在受到外力作用时电阻发生线性变化，失去外力作用时电阻值才恢复，可以测试任意时段受到的外力大小，且线性度好；通过位于应变层的保护层的设置，提高所述感压电路板的耐用性；在感压电路板的第二铜区，设置网格状的线路层，提升线路层的应变能力，从而提升感压电路板的灵敏度；线路层、应变层以及保护层的一侧设置所述介质层，简化感压电路板的结构；所述感压电路板，制作方法简单。
附图说明
图1为本申请实施例提供的包括介质层以及铜层的覆铜基板的截面示意图。
图2为对图1所示的铜层进行局部减铜处理，形成第二铜区和第一铜区的截面示意图。
图3为去除图2所示的位于所述第二铜区的部分铜层形成无铜区、并对所述铜层进行线路制作形成线路层形成网格状线路层的截面示意图。
图4为本申请一实施方式形成的交错网格式线路层的俯视图。
图5为本申请另一实施方式形成的不交错波纹式线路层的俯视 图。
图6为本申请再一实施方式形成的马蹄铁型线路层的俯视图。
图7为在图3所示的所述第一铜区形成覆盖所述线路层的绝缘层的截面示意图。
图8为在图7所示的位于无铜区的介质层的表面形成应变层的截面示意图。
图9为在图8所示的位于第二铜区的线路层表面以及所述应变层的表面形成保护层，从而形成所述感压电路板的截面示意图。
图10为本申请一实施方式中的应变层形成的惠斯通电桥的连接示意图。
主要元件符号说明
感压电路板 100
覆铜基板 10
介质层 12
铜层 14
线路层 145
绝缘层 20
应变层 30
保护层 40
第一铜区 I
第二铜区 II
无铜区 III
电阻 R1、R2、R3、Rx
如下具体实施方式将结合上述附图进一步说明本申请。
具体实施方式
为了能够更清楚地理解本申请的上述目的、特征和优点，下面结合附图和具体实施方式对本申请进行详细描述。需要说明的是，在不冲突的情况下，本申请的实施方式及实施方式中的特征可以相互组合。在下面的描述中阐述了很多具体细节以便于充分理解本申请，所描述的实施方式仅仅是本申请一部分实施方式，而不是全部的实施方式。基于本申请中的实施方式，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施方式，都属于本申请保护的范围。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施方式的目的，不是旨在于限制本申请。本文所使用的术语“和/或”包括一个或多个相关的所列项目的所有的和任意的组合。
在本申请的各实施例中，为了便于描述而非限制本申请，本申请专利申请说明书以及权利要求书中使用的术语“连接”并非限定于物理的或者机械的连接，不管是直接的还是间接的。“上”、“下”、“上方”、“下方”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也相应地改变。
请参阅图1至图10，本申请实施例提供一种感压电路板100的制作方法，包括以下步骤：
步骤S1：请参阅图1，提供一覆铜基板10，包括介质层12以及位于所述介质层12表面的铜层14。
所述介质层12的材质可以为刚性材质，也可以为可挠性材质。所述介质层12的材质可以包括但不限于聚酰亚胺(Polyimide，PI)、 涤纶树脂(Polyethylene terephthalate，PET)、聚萘二甲酸乙二醇酯(Polyethylene naphthalate two formic acid glycol ester，PEN)、液晶高分子聚合物(liquid crystal polymer，LCP)以及改性聚酰亚胺(modified polyimide，MPI)等。
所述铜层14可以位于所述介质层12的其中一表面，或者位于所述介质层12的相对两表面。在本实施方式中，所述铜层14位于所述介质层12的其中一表面。
在一些方式中，所述介质层12中还可以埋设有与所述铜层14电连接的内埋线路层(图未示)，以使得制得的所述感压电路板100具有多层线路层。
步骤S2：请参阅图2，对所述铜层14进行局部减铜处理，形成第二铜区II和第一铜区I。
去除部分所述铜层14，以使部分区域的铜层14的厚度减薄，其他区域的铜层14的厚度保持不变，铜层14的厚度减薄的区域为所述第二铜区II，铜层14的厚度保持不变的区域为所述第一铜区I。
步骤S3：请参阅图3至图6，去除位于所述第二铜区II的部分铜层14形成无铜区III，以使所述介质层12的部分暴露出来，对所述铜层14进行线路制作形成线路层145，其中，将剩余位于所述第二铜区II的所述铜层14进行网格化处理形成网格状线路层145。
可以理解地，位于所述无铜区III的所述介质层12的表面未设置所述铜层14。
所述无铜区III与所述第一铜区I通过所述第二铜区II间隔设置，所述第一铜区I、所述第二铜区II以及所述无铜区III的表面依次形成台阶状，即，沿所述铜层14与所述介质层12的叠加方向，位于所述第一铜区I的铜层14的厚度大于位于所述第二铜区II的铜层14的厚度。
将剩余位于所述第二铜区II的所述铜层14进行网格化处理，将位于所述第二铜区II的部分所述铜层14再次进行减薄或者去除，以形成网格状。在本实施方式中，将位于所述第二铜区II的部分所述铜层14进行去除，并露出所述介质层12的表面。
所述网格化处理形成的网格状的线路层145之间可以相互连接或者不连接，包括但不限于交错网格式线路(请参阅图4)、不交错波纹式线路(请参阅图5)以及马蹄铁型线路(请参阅图6)。所述网格状的线路层145的形成，在受到外力作用时，更容易产生形变，从而有利于提升线路层145的应变能力。
步骤S4：请参阅图7，在所述第一铜区I形成覆盖所述线路层145的绝缘层20。
所述绝缘层20用于防止所述线路层145氧化。
步骤S5：请参阅图8，在所述无铜区III的所述介质层12的表面形成应变层30。
所述应变层30的材质为在受到外力时产生形变而导致电阻发生变化的材质，包括但不限于金属、含碳类导电树脂等。
在形成所述应变层30的过程中，所述应变层30的厚度大于所述第二铜区II的铜层14的厚度，由于所述应变层30的流动性，所述应变层30还覆盖与所述第二铜区II邻接的线路层145表面，所述应变层30盖住至少部分位于所述第二铜区II的线路层145，即所述应变层30与所述线路层145形成交叠结构，增加所述应变层30与所述线路层145的接触面积，提升连接可靠性，避免接触不良。
在一些实施方式中，在形成所述应变层30之前，还包括在所述线路层145的表面形成处理层的步骤，防止所述线路层145氧化。
步骤S6：请参阅图10，在所述第二铜区II的所述线路层145表面形成保护层40，所述保护层40还覆盖所述应变层30，从而形成所述感压电路板100。
所述保护层40的材质为绝缘的油墨层，所述油墨层具有良好的延展性，在受到外力作用时，所述保护层40不会出现裂纹。
在一些实施方式中，形成所述绝缘层20的步骤可以在形成所述应变层30和/或所述保护层40的步骤之后。
请参阅图10，所述感压电路板100还包括三个具有固定电阻值的电阻R1、电阻R2、电阻R3，电阻R1与电阻R2串联，电阻R3与应变层30组成的电阻Rx串联，然后将串联后的电阻R1与电阻R2与串联后的电阻R3和电阻Rx并联，从而形成惠斯通电桥，利用电桥的特性构建整个电路回路，使得感压电路板100可以更加灵敏、有效的工作。
具体地，应变层30组成的电阻Rx发生变化时，图中B，D两点之间的电压发生变化，通过采集电压的变化，经过计算可以得出电阻Rx的变化量，从而计算出应变层30所受到的外力的大小。
请再次参阅图10，本申请还提供一种感压电路板100，所述感压电路板100包括介质层12、线路层145、应变层30以及保护层40。所述线路层145位于所述介质层12的表面；所述应变层30位于与所述线路层145同侧的所述介质层12的表面；所述保护层40位于所述线路层145以及所述应变层30的表面。
其中，所述感压电路板100包括依次连接的第一铜区I、第二铜区II以及无铜区III；所述线路层145位于所述第一铜区I以及所述第二铜区II，沿所述线路层145与所述介质层12的叠设方向，位于所述第一铜区I的线路层145的厚度大于位于所述第二铜区II的厚度，位于所述第二铜区II的所述线路层145呈网格状；所述应变 层30位于所述无铜区III并与所述线路层145连接；所述保护层40位于所述第二铜区II的线路层145的表面并覆盖所述应变层30。
所述保护层40在受到外力作用时，外力作用传递给所述应变层30，所述应变层30在外力作用下产生应变，应变层30的电阻发生变化，进而使得感压电路板100在电性回路中的电阻发生改变。当电阻发生改变时，电性回路中监测的电压会发生改变，根据电压变化的大小计算应变层30受到的外力的大小。
所述介质层12的材质可以为刚性材质，也可以为可挠性材质。所述介质层12的材质可以包括但不限于聚酰亚胺(Polyimide，PI)、涤纶树脂(Polyethylene terephthalate，PET)、聚萘二甲酸乙二醇酯(Polyethylene naphthalate two formic acid glycol ester，PEN)、液晶高分子聚合物(liquid crystal polymer，LCP)以及改性聚酰亚胺(modified polyimide，MPI)等。在一些实施方式中，所述介质层12的材质为可挠性材质，使得所述感压电路板100具有柔性，在合适的位置进行弯折，以满足用户不同的需求。
所述网格状的线路层145之间可以相互连接或者不连接，包括但不限于交错网格式线路、不交错波纹式线路以及马蹄铁型线路中的至少一种。所述网格状的线路层145的形成，在受到外力作用时，更容易产生形变，从而有利于提升线路层145的应变能力。
在一些实施方式中，沿所述线路层145与所述介质层12的叠设方向，所述应变层30的厚度大于位于所述第二铜区II的所述线路层145的厚度，以使至少部分应变层30盖住至少部分位于所述第二铜区II的线路层145，即所述应变层30与所述线路层145形成交叠结构，增加所述应变层30与所述线路层145的接触面积，提升连接可靠性，避免接触不良。
在一些实施方式中，所述应变层30还位于所述第二铜区II，并 覆盖位于所述第二铜区II的线路层145的部分表面，位于所述第二铜区II与应变层30与所述线路层145形成交叠结构。
所述保护层40位于所述线路层145以及所述应变层30的表面。一方面，所述保护层40用于保护所述线路层145，防止所述线路层145氧化；另一方面，所述保护层40还具有延展性，防止所述保护层40收到外力作用时，所述保护层40不会出现裂纹。
在一些实施方式中，所述感压电路板100还包括绝缘层20，所述绝缘层20覆盖位于所述第一铜区I的线路层145的表面，用于保护所述线路层145。
请再次参阅图10，所述感压电路板100还包括三个具有固定电阻值的电阻R1、电阻R2、电阻R3，电阻R1与电阻R2串联，电阻R3与应变层30组成的电阻Rx串联，然后将串联后的电阻R1与电阻R2与串联后的电阻R3和电阻Rx并联，从而形成惠斯通电桥，利用电桥的特性构建整个电路回路，使得感压电路板100可以更加灵敏、有效的工作。
本申请提供的感压电路板100，通过设置于介质层12表面的线路层145、应变层30，在应变层30受到外力作用时，应变层30的电阻发生变化，进而使得感压电路板100在电性回路中的电阻发生改变，电性回路中监测的电压会发生改变，根据电压变化的大小计算应变层30受到的外力的大小；其中，应变层30在受到外力作用时电阻发生线性变化，失去外力作用时电阻值才恢复，可以测试任意时段受到的外力大小，且线性度好；通过位于应变层30的保护层40的设置，提高所述感压电路板100的耐用性；在感压电路板100的第二铜区II，设置网格状的线路层145，提升线路层145的应变能力，从而提升感压电路板100的灵敏度；线路层145、应变层30以及保护层40的一侧设置所述介质层12，简化感压电路板100的 结构；所述感压电路板100，制作方法简单。
以上实施方式仅用以说明本申请的技术方案而非限制，尽管参照以上较佳实施方式对本申请进行了详细说明，本领域的普通技术人员应当理解，可以对本申请的技术方案进行修改或等同替换都不应脱离本申请技术方案的精神和范围。

Claims (10)

  1. 一种感压电路板，其特征在于，包括：
    介质层；
    线路层，位于所述介质层的表面；
    应变层，位于与所述线路层同侧的所述介质层的表面；以及
    保护层，位于所述线路层以及所述应变层的表面；
    其中，所述感压电路板包括依次连接的第一铜区、第二铜区以及无铜区；所述线路层位于所述第一铜区以及所述第二铜区，沿所述线路层与所述介质层的叠设方向，位于所述第一铜区的线路层的厚度大于位于所述第二铜区的厚度，位于所述第二铜区的所述线路层呈网格状；所述应变层位于所述无铜区并与所述线路层连接；所述保护层位于所述第二铜区的线路层的表面并覆盖所述应变层。
  2. 根据权利要求1所述的感压电路板，其特征在于，所述网格状的线路层包括交错网格式线路、不交错波纹式线路以及马蹄铁型线路中的至少一种。
  3. 根据权利要求1所述的感压电路板，其特征在于，沿所述线路层与所述介质层的叠设方向，所述应变层的厚度大于位于所述第二铜区的所述线路层的厚度。
  4. 根据权利要求3所述的感压电路板，其特征在于，所述应变层还位于所述第二铜区，并覆盖位于所述第二铜区的线路层的部分表面，位于所述第二铜区与应变层与所述线路层形成交叠结构。
  5. 根据权利要求1所述的感压电路板，其特征在于，所述感压电路板还包括三个具有固定电阻值的电阻，三个所述电阻与所述应变层形成惠斯通电桥。
  6. 根据权利要求1所述的感压电路板，其特征在于，所述感压电路板还包括绝缘层，所述绝缘层覆盖位于所述第一铜区的线路层的表面。
  7. 一种感压电路板的制作方法，其特征在于，包括以下步骤：
    提供一覆铜基板，包括介质层以及位于所述介质层表面的铜层；
    对所述铜层进行局部减铜处理，形成第二铜区和第一铜区；
    去除位于所述第二铜区的部分铜层形成无铜区，以使所述介质层的部分暴露出来，对所述铜层进行线路制作形成线路层，其中，将剩余位于所述第二铜区的所述铜层进行网格化处理形成网格状线路层；
    在所述无铜区的所述介质层的表面形成应变层；以及
    在所述第二铜区的所述线路层表面形成保护层，所述保护层还覆盖所述应变层，从而形成所述感压电路板。
  8. 根据权利要求7所述的感压电路板的制作方法，其特征在于，沿所述铜层与所述介质层的叠设方向，所述应变层的厚度大于位于所述第二铜区的所述线路层的厚度。
  9. 根据权利要求8所述的感压电路板的制作方法，其特征在于，在形成所述应变层的步骤中，所述应变层还覆盖与所述第二铜区邻接的线路层表面。
  10. 根据权利要求7所述的感压电路板的制作方法，其特征在于，在形成所述线路层的步骤之后，所述制作方法还包括：
    在位于所述第一铜区的线路层的表面形成绝缘层。
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