WO2022262027A1 - 液晶显示面板及显示装置 - Google Patents

液晶显示面板及显示装置 Download PDF

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Publication number
WO2022262027A1
WO2022262027A1 PCT/CN2021/105493 CN2021105493W WO2022262027A1 WO 2022262027 A1 WO2022262027 A1 WO 2022262027A1 CN 2021105493 W CN2021105493 W CN 2021105493W WO 2022262027 A1 WO2022262027 A1 WO 2022262027A1
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Prior art keywords
sub
liquid crystal
electrode
capacitor
main
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PCT/CN2021/105493
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English (en)
French (fr)
Inventor
吴万春
Original Assignee
惠州华星光电显示有限公司
Tcl华星光电技术有限公司
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Priority to US17/600,125 priority Critical patent/US20240027853A1/en
Publication of WO2022262027A1 publication Critical patent/WO2022262027A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134336—Matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/40—Arrangements for improving the aperture ratio

Definitions

  • the present application relates to the field of display technology, in particular to a liquid crystal display panel and a display device having the liquid crystal display panel.
  • TFT-LCD Thin-film transistor-liquid crystal display
  • the pixel structure of 3T8 domains is used in the prior art to improve, that is, the pixel electrode of a sub-pixel is divided into a main area and a sub-area, and the main area and the sub-area. There are 4 domains in the sub-area, and a pixel structure of 3 TFTs (thin film transistors) is set between the main (or main area) of the bright area and the sub (or sub-area) dark area.
  • the existing 3T8 domain pixel structure The equivalent circuit diagram is shown in Figure 1.
  • the gate of the thin film transistor Tmain in the main area is connected to the scanning line Gate, the source is connected to the data curve Data, and the drain is respectively connected to one end of the storage capacitor Cst_main in the main area and the liquid crystal capacitor in the main area.
  • C lc_main One end of C lc_main , the other end of the storage capacitor C st_main in the main area is connected to the array electrode Acom, the other end of the liquid crystal capacitor C lc_main in the main area is connected to the CF electrode CFcom, the gate of the thin film transistor T sub in the sub area is connected to the scanning line Gate, and the source
  • the pole is connected to the data line Data
  • the drain is respectively connected to one end of the sub-area storage capacitor C st_sub and one end of the sub-area liquid crystal capacitor C lc_sub , the other end of the sub-area storage capacitor C st_sub is connected to the array electrode Acom, and the sub-area liquid crystal capacitor C lc_sub
  • the other end is connected to the CF electrode CFcom, the gate of the shared thin film transistor Tcs is connected to the data line Gate, the source is connected to the drain of the sub-region thin film transistor T sub , and the drain is connected to the array electrode Acom.
  • Embodiments of the present application provide a liquid crystal display panel and a display device to solve the problem of poor optical transmittance caused by low aperture ratio of existing liquid crystal display panels.
  • An embodiment of the present application provides a liquid crystal display panel, including: a color filter substrate and an array substrate disposed opposite to each other, disposed on the side of the array substrate facing the color filter substrate, between the color filter substrate and the array substrate A liquid crystal layer is provided, the liquid crystal layer includes a plurality of liquid crystal molecules, a first common electrode is provided on a side of the color filter substrate facing the array substrate, and a second common electrode is provided on a side of the array substrate facing the color filter substrate and a plurality of sub-pixels arranged in an array, each of the sub-pixels defines a main area and a sub-area arranged at intervals, each row of the sub-pixels corresponds to a scanning line, and the scanning line is located in the main area Between the sub-region and the sub-pixel, each column of the sub-pixels is correspondingly provided with a data line; the main region includes: a first thin film transistor, a first storage capacitor and a first liquid crystal capacitor, and the gate of the first thin film transistor It is connected to the
  • the voltage of the secondary area is lower than the voltage of the main area.
  • V sub V main *C x /(C lc_sub + C x ), where Vsub is the sub-region
  • the voltage value of V main is the voltage value of the main area
  • C x is the third capacitor
  • C lc_sub is the second liquid crystal capacitor.
  • a bottom electrode is disposed in the array substrate below the sub-pixel electrode in the sub-region, and the third capacitor is formed by the bottom electrode and the sub-pixel electrode.
  • a gate insulating layer is disposed on the side of the bottom electrode facing the sub-pixel electrode, and a protective layer is disposed between the gate insulating layer and the sub-pixel electrode.
  • a first metal layer is provided on the side of the gate insulating layer away from the bottom electrode, at least one through hole penetrating the gate insulating layer is opened on the surface of the gate insulating layer, and the bottom electrode faces the bottom electrode.
  • One side of the gate insulating layer is exposed to the through hole, and the first metal layer is deposited in the through hole and electrically connected to the bottom electrode.
  • the bottom electrodes correspond to the main pixel electrodes of the sub-pixels one by one, and one bottom electrode corresponds to the main pixel electrodes of one sub-pixel.
  • one bottom electrode corresponds to main pixel electrodes of more than two sub-pixels.
  • a first storage electrode connected to the drain of the first thin film transistor is provided in the main region; the first storage capacitor is formed by the first storage electrode and the second common electrode; The first liquid crystal capacitor is formed by the main pixel electrode in the main area and the first common electrode; the first storage electrode is connected to the main pixel electrode through a via hole; The second storage electrode connected to the drain of the second thin film transistor; the second storage capacitor is formed by the second storage electrode and the second common electrode; the second liquid crystal capacitor is formed by the The sub-pixel electrode is formed with the first common electrode; the second storage electrode is connected with the sub-pixel electrode through a via hole.
  • the present invention further provides a display device, comprising the above-mentioned liquid crystal display panel.
  • the beneficial effects of the present application are: in the provided liquid crystal display panel, the number of thin film transistors in a sub-pixel is 2, and the sub-pixel structure design of Normal 2T+8 domains is formed, which reduces the number of thin-film transistors in the sub-pixel, and can Eliminate the impact of the discharge of the third thin film transistor on the common electrode on the array substrate side, reduce the occurrence of horizontal crosstalk, and further increase the pixel aperture ratio, and connect the third capacitor in series between the thin film transistor in the sub-region and the liquid crystal capacitor in the sub-region. Due to the change of the area voltage due to the capacitance, the deflection angles of the liquid crystal molecules in the main area and the sub area are different, forming different viewing angles, and solving the problem of color shift.
  • FIG. 1 is an equivalent circuit diagram of an existing 3T8 domain pixel structure
  • Fig. 2 is the equivalent circuit diagram of the existing 3TPLUS8 domain pixel structure
  • FIG. 3 is a schematic structural view of a liquid crystal display panel provided by an exemplary embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a sub-pixel in a liquid crystal display panel provided by an exemplary embodiment of the present invention.
  • FIG. 5 is an equivalent circuit diagram of a sub-pixel in a liquid crystal display panel provided by an exemplary embodiment of the present invention.
  • Fig. 6 is a schematic diagram of the formation of the first liquid crystal capacitor, the second liquid crystal capacitor and the third capacitor in the liquid crystal display panel provided by an exemplary embodiment of the present invention
  • FIG. 7 is a schematic structural diagram of a sub-pixel electrode and a bottom electrode in a liquid crystal display panel provided by an exemplary embodiment of the present invention.
  • FIG. 8 is a schematic structural diagram of a sub-pixel electrode and a bottom electrode in a liquid crystal display panel provided by an exemplary embodiment of the present invention.
  • FIG. 9 is a schematic diagram of the corresponding structure of the bottom electrode and the main pixel electrode in the liquid crystal display panel provided by an exemplary embodiment of the present invention.
  • FIG. 10 is a schematic diagram of the corresponding structure of the bottom electrode and the main pixel electrode in the liquid crystal display panel provided by an exemplary embodiment of the present invention.
  • Fig. 11 is a schematic diagram of the deflection state of the liquid crystal molecules corresponding to the main area in the sub-pixel of the liquid crystal display panel provided by an exemplary embodiment of the present invention driven by an electric field;
  • Fig. 12 is a schematic diagram of the deflection state of the liquid crystal molecules corresponding to the sub-regions in the sub-pixels of the liquid crystal display panel provided by an exemplary embodiment of the present invention driven by an electric field;
  • the liquid crystal display panel of the present invention can be applied to a display device, such as a thin film transistor-liquid crystal display (TFT-LCD).
  • TFT-LCD thin film transistor-liquid crystal display
  • a liquid crystal display panel 100 includes a color filter substrate 110 and an array substrate 120 oppositely arranged, and a liquid crystal layer 130 is arranged between the color filter substrate 110 and the array substrate 120 , and the liquid crystal layer 130 includes A plurality of liquid crystal molecules 131, the color filter substrate 110 is provided with a first common electrode 111 facing the array substrate 120, the array substrate 120 is provided with a second common electrode 121 facing the color filter substrate 110, and the array substrate 120 is facing the color filter substrate 110.
  • a plurality of sub-pixels 140 arranged in an array are provided. Referring to FIG. 4, each sub-pixel 140 defines a main area 141 and a sub-area 142 arranged at intervals. In the array, each row of sub-pixels is correspondingly set One scanning line 150, the scanning line 150 is located between the main area 141 and the sub area 142, and one data line 160 is set corresponding to each column of pixels.
  • the main region 141 includes: a first thin film transistor T1, a first storage capacitor CS1 and a first liquid crystal capacitor Clc1 , the gate of the first thin film transistor T1 is connected to the scanning line 150, and the source of the first thin film transistor T1 connected to the data line 160, the drain of which is respectively connected to one end of the first storage capacitor C S1 and one end of the first liquid crystal capacitor C lc1 , and the other end of the first storage capacitor C S1 is connected to the second common electrode 121, the first The other end of the liquid crystal capacitor Clc1 is connected to the first common electrode 111; the sub-region 142 includes: a second thin film transistor T2, a second storage capacitor CS2 and a second liquid crystal capacitor Clc2 , and the second thin film transistor T2 The gate is connected to the scan line 150, the source is connected to the data line 160, and the drain is respectively connected to one end of the second storage capacitor CS2 and one end of the second liquid crystal capacitor Clc2 , the The other end of the second storage capacitor
  • the number of TFTs in one sub-pixel 140 is 2 (namely the first TFT T1 and the second TFT T2), forming a sub-pixel structure design of Normal 2T+8 domains, the main area 141 and the sub-area 142 corresponds to the liquid crystal molecules of the four domains, which reduces the number of thin film transistors in the sub-pixel 140.
  • the common electrode 121 reduces the occurrence of horizontal crosstalk and improves the pixel aperture ratio.
  • a third capacitor C x is connected in series between the drain of the second thin film transistor T2 and the second liquid crystal capacitor Clc2 .
  • the series connection of the third capacitor Cx and the second liquid crystal capacitor Clc2 increases the capacitance value, reduces the voltage of the sub-region 142, and further reduces the deflection angle ⁇ A of the liquid crystal molecules 131 corresponding to the sub-region 142 (refer to FIG. 11), the deflection angle ⁇ B (refer to FIG. 12 ) of the liquid crystal molecules 131 corresponding to the main region 141 forms a difference, thereby forming different viewing angles, and solving the color shift problem of the liquid crystal display panel 100 .
  • a first storage electrode 1411 connected to the drain of the first thin film transistor T1 is disposed in the main region 141; the first storage capacitor CS1 is formed by the The first storage electrode 1411 and the second common electrode 121 are formed; the first liquid crystal capacitor Clc1 is formed by the main pixel electrode 1412 in the main region 141 and the first common electrode 111; the first The storage electrode 1411 is connected to the main pixel electrode 1412 through a via hole (not shown in the figure).
  • the second storage electrode 1421 connected to the drain of the second thin film transistor T2 is arranged in the sub-region 142; the second storage capacitor Clc2 is composed of the second storage electrode 1421 and the second common electrode 121; the second liquid crystal capacitor Clc2 is formed by the sub-pixel electrode 1422 in the sub-region 142 and the first common electrode 111; the second storage electrode 1421 is connected to the sub-pixel electrode 1422 through a via hole connect.
  • the first common electrode 111 is an indium tin oxide electrode (that is, an ITO electrode)
  • the second common electrode 121 is an array electrode (Array COM)
  • the main pixel electrode 1412 and the sub-pixel electrode 1422 are respectively an indium tin oxide electrode ( That is, ITO electrode).
  • the pixel patterns on the main pixel electrode 1412 and the sub-pixel electrode 1422 are made by yellow light.
  • the voltage of the secondary region 142 is lower than the voltage of the main region 141 .
  • V sub V main *C x /(C lc_sub + C x )
  • V sub is the voltage value of the sub-zone
  • V main is the voltage value of the main zone
  • C x is the third capacitor
  • C lc_sub is the second liquid crystal capacitor.
  • the difference in voltage results in a difference in electric field intensity, which in turn causes a difference in the deflection angles of liquid crystal molecules corresponding to the main area 141 and the sub area 142 , thereby forming different viewing angles and solving the color shift problem of the liquid crystal display panel 100 .
  • a bottom electrode 170 is disposed in the array substrate 120 below the sub-pixel electrode 1422 in the sub-region 142 , so The third capacitance C x is formed by the bottom electrode 170 and the sub-pixel electrode 1422 , the bottom electrode 170 receives a voltage signal, and the third capacitance C x is formed between the bottom electrode 170 and the sub-pixel electrode 1422 .
  • a gate insulating layer 181 is disposed on a side of the bottom electrode 170 facing the sub-pixel electrode 1422 , and a protective layer 182 is disposed between the gate insulating layer 181 and the sub-pixel electrode 1422 .
  • the bottom electrode 170 is an indium tin oxide electrode (ie, an ITO electrode).
  • a first metal layer 183 is provided on the side of the gate insulating layer 181 facing away from the bottom electrode 170 , and at least one through hole is opened on the surface of the gate insulating layer 181 .
  • the through hole 1811 of the gate insulating layer 181, the side of the bottom electrode 170 facing the gate insulating layer 181 is exposed to the through hole 1811, the first metal layer 183 is deposited on the through hole 1811 and is in contact with the through hole 1811.
  • the bottom electrode 170 is electrically connected.
  • the opening of the through hole 1811 means that the first metal layer 183 (M1) can be deposited on the bottom electrode 170 and electrically connected to the bottom electrode 170, so that the voltage signal is introduced from the first metal layer 183 to the bottom electrode 170, so that the bottom electrode 170 A third capacitance C x is formed between the sub-pixel electrode 1422 and the voltage signal of the bottom electrode 170 is convenient to be adjusted.
  • the bottom electrodes 170 correspond to the main pixel electrodes 1412 of the sub-pixels 140 one by one, and one bottom electrode 170 corresponds to the main pixel electrodes 1412 of one sub-pixel 140 .
  • the one-to-one design of the bottom electrode 170 and the main pixel electrode 1412 that is, one bottom electrode 170 corresponds to one sub-pixel 140 , can improve the control accuracy of the capacitance value of the third capacitor Cx .
  • one bottom electrode 170 corresponds to the main pixel electrodes 1412 of more than two sub-pixels 140 .
  • one bottom electrode 170 corresponds to four main pixel electrodes 1412 .
  • the one-to-many design of the bottom electrode 170 and the main pixel electrode 1412 that is, one bottom electrode 170 corresponds to a plurality of sub-pixels 140 , can reduce the manufacturing cost.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)

Abstract

一种液晶显示面板（100）及显示装置，液晶显示面板（100）的一个子像素内设置两个薄膜晶体管，减少了薄膜晶体管的数量，提高像素开口率，在次区薄膜晶体管与次区液晶电容之间串联连接第三电容（Cx），次区电压由于电容增多而降低，使得液晶分子在主区的偏转角度大于液晶分子在次区的偏转角度，形成不同的视角，解决色偏问题。

Description

液晶显示面板及显示装置 技术领域
本申请涉及显示技术领域，特别涉及一种液晶显示面板及具有该液晶显示面板的显示装置。
 背景技术
薄膜晶体管-液晶显示器（TFT-LCD）是当前平板显示器的主要产品之一，已成为大尺寸TV的主流技术，随着信息技术和人们生活水平的提升、人们对面板尺寸、解析度及显示器的画质的要求也越来越高。
液晶显示屏从不同角度观看，会出现色偏问题，为了改善色偏，现有技术中采用3T8畴的像素结构进行改善，即一个子像素的像素电极分割成主区和次区，主区和次区内分别有4个畴，亮区main（或称主区）与暗区sub（或称次区）之间设置3个TFT（薄膜晶体管）的像素结构，现有的3T8畴像素结构的等效电路图如图1所示，图1中，主区薄膜晶体管Tmain的栅极连接扫描线Gate，源极连接数据曲线Data，漏极分别连接主区存储电容C st_main的一端和主区液晶电容C lc_main的一端，所述主区存储电容C st_main的另一端连接阵列电极Acom，主区液晶电容C lc_main的另一端连接CF电极CFcom，次区薄膜晶体管T sub的栅极连接扫描线Gate，源极连接数据线Data，漏极分别连接次区存储电容C st_sub的一端和次区液晶电容C lc_sub的一端，所述次区存储电容C st_sub的另一端连接阵列电极Acom，次区液晶电容C lc_sub的另一端连接CF电极CFcom，共享薄膜晶体管Tcs的栅极连接数据线Gate，源极连接次区薄膜晶体管T sub的漏极，漏极连接阵列电极Acom。
此外，现有技术中还有3TPLUS8畴的像素结构，参照图2，与3T8畴的像素结构的差别在于，在亮区main和暗区sub之间增加了一个第二阵列电极Acom2，共享薄膜晶体管T cs的漏极连接第二阵列电极Acom2。
不论是3T8畴的像素结构还是3TPLUS8畴的像素结构，都是在主区main和次区sub施加不同的电压，使液晶分子倾斜角度程度不一样，改善视角色偏问题，但是，目前的3T8畴的像素结构设计和3TPLUS8畴的像素结构设计，会影响像素开口率，导致开口率会减小，进而导致TFT液晶显示器的光学穿透率不佳。
 技术问题
本申请实施例提供一种液晶显示面板及显示装置，以解决现有液晶显示面板开口率低导致光学穿透率不佳的问题。
 技术解决方案
本申请实施例提供了一种液晶显示面板，包括：相对设置的彩膜基板和阵列基板，设置于所述阵列基板朝向所述彩膜基板一面，所述彩膜基板和所述阵列基板之间设置有液晶层，所述液晶层包括多个液晶分子，所述彩膜基板朝向所述阵列基板一面设置有第一公共电极，所述阵列基板朝向所述彩膜基板一面设置有第二公共电极；以及呈阵列排布的多个子像素，每个所述子像素定义有间隔排布的主区和次区，每一行所述子像素对应设置一条扫描线，所述扫描线位于所述主区和所述次区之间，每一列所述子像素对应设置一条数据线；所述主区包括：第一薄膜晶体管、第一存储电容和第一液晶电容，所述第一薄膜晶体管的栅极与所述扫描线连接，其源极连接所述数据线，其漏极分别连接所述第一存储电容的一端和所述第一液晶电容的一端，所述第一存储电容的另一端连接所述第二公共电极，所述第一液晶电容的另一端连接所述第一公共电极；所述次区包括：第二薄膜晶体管、第二存储电容和第二液晶电容，所述第二薄膜晶体管的栅极与所述扫描线连接，其源极连接所述数据线，其漏极分别连接所述第二存储电容的一端和所述第二液晶电容的一端，所述第二存储电容的另一端连接所述第二公共电极，所述第二液晶电容的另一端连接所述第一公共电极；所述次区还包括第三电容，所述第三电容串联连接于所述第二薄膜晶体管的漏极与所述第二液晶电容之间，使得所述次区所对应的所述液晶分子的偏转角度小于所述主区所对应的所述液晶分子的偏转角度。
进一步地，所述次区的电压小于所述主区的电压。
进一步地，所述次区的电压Vsub与所述主区的电压V main之间的关系式为：V sub=V main*C x/(C lc_sub+ C x)，式中，Vsub为次区的电压值，V main为主区的电压值，C x为第三电容，C lc_sub为第二液晶电容。
进一步地，位于所述次区内的次像素电极下方的所述阵列基板内设置有底电极，所述第三电容由所述底电极与所述次像素电极形成。
进一步地，所述底电极朝向所述次像素电极一面设置有栅极绝缘层，所述栅极绝缘层与所述次像素电极之间设置有保护层。
进一步地，所述栅极绝缘层背离所述底电极一面设置有第一金属层，所述栅极绝缘层表面开设有至少一个贯通所述栅极绝缘层的通孔，所述底电极朝向所述栅极绝缘层一面暴露于所述通孔，所述第一金属层沉积于所述通孔并与所述底电极电性连接。
进一步地，所述底电极与子像素的主像素电极一一对应，一个所述底电极对应一个子像素的主像素电极。
进一步地，一个所述底电极对应两个以上子像素的主像素电极。
进一步地，所述主区内设置有与所述第一薄膜晶体管的漏极连接的第一存储电极；所述第一存储电容由所述第一存储电极与所述第二公共电极形成；所述第一液晶电容由所述主区内的主像素电极与所述第一公共电极形成；所述第一存储电极通过过孔与所述主像素电极连接；所述次区内设置有与所述第二薄膜晶体管的漏极连接的第二存储电极；所述第二存储电容由所述第二存储电极与所述第二公共电极形成；所述第二液晶电容由所述次区内的次像素电极与所述第一公共电极形成；所述第二存储电极通过过孔与所述次像素电极连接。
为实现上述目的，本发明还提供一种显示装置，包括如前所述的液晶显示面板。
 有益效果
本申请的有益效果为：所提供的液晶显示面板中，一个子像素中薄膜晶体管的数量为2个，形成Normal 2T+8畴的子像素结构设计，减少了子像素内薄膜晶体管的数量，能够消除该第三薄膜晶体管放电对阵列基板侧公共电极的影响，减少水平串扰现象的发生，并进一步提高像素开口率，并且在次区薄膜晶体管与次区液晶电容之间串联连接第三电容，次区电压由于电容发生变化，使得液晶分子在主区和次区的偏转角度不同，形成不同的视角，解决色偏问题。
 附图说明
下面结合附图，通过对本申请的具体实施方式详细描述，将使本申请的技术方案及其它有益效果显而易见。
图1是现有3T8畴像素结构的等效电路图；
图2是现有3TPLUS8畴像素结构的等效电路图；
图3是本发明一示例性实施例所提供的液晶显示面板的结构示意图；
图4是本发明一示例性实施例所提供的液晶显示面板中子像素的结构示意图；
图5是本发明一示例性实施例所提供的液晶显示面板中子像素的等效电路图；
图6是本发明一示例性实施例所提供的液晶显示面板中的第一液晶电容、第二液晶电容以及第三电容的形成示意图；
图7是本发明一示例性实施例所提供的液晶显示面板中次像素电极与底电极的结构示意图；
图8是本发明一示例性实施例所提供的液晶显示面板中次像素电极与底电极的结构示意图；
图9是本发明一示例性实施例所提供的液晶显示面板中底电极与主像素电极的对应结构示意图；
图10是本发明一示例性实施例所提供的液晶显示面板中底电极与主像素电极的对应结构示意图；
图11是本发明一示例性实施例所提供的液晶显示面板的子像素中与主区对应的液晶分子在电场驱动下的偏转形态示意图；
图12是本发明一示例性实施例所提供的液晶显示面板的子像素中与次区对应的液晶分子在电场驱动下的偏转形态示意图；
其中，100、液晶显示面板，110、彩膜基板，111、第一公共电极，120、阵列基板，121、第二公共电极，130、液晶层，131、液晶分子，140、子像素，141、主区，1411、第一存储电极，1412、主像素电极，142、次区，1421、第二存储电极，1422、次像素电极，150、扫描线，160、数据线，170、底电极，181、栅极绝缘层，1811、通孔，182、保护层，183、第一金属层，T1、第一薄膜晶体管，T2、第二薄膜晶体管，C s1、第一存储电容，C lc1、第一液晶电容，C s2、第二存储电容，C lc2、第二液晶电容，C x、第三电容。
本发明的实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
所述液晶显示面板的一个子像素内设置两个薄膜晶体管，与现有3T的像素结构相比，减少了薄膜晶体管的数量，提高像素开口率，并且在次区薄膜晶体管与次区液晶电容之间串联连接第三电容，次区电压由于电容增多而降低，使得液晶分子在主区的偏转角度大于液晶分子在次区的偏转角度，形成不同的视角，解决色偏问题。作为典型应用，本发明所述液晶显示面板可被应用于显示装置上，例如薄膜晶体管-液晶显示器（TFT-LCD）。
参照图3，在本发明的一个实施例中，液晶显示面板100包括相对设置的彩膜基板110和阵列基板120，彩膜基板110与阵列基板120之间设置有液晶层130，液晶层130包括多个液晶分子131，彩膜基板110朝向阵列基板120一面设置有第一公共电极111，阵列基板120朝向彩膜基板110一面设置有第二公共电极121，阵列基板120朝向彩膜基板110一面还设置有呈阵列排布（图中未示出）的多个子像素140，参照图4，每个子像素140定义有间隔排布的主区141和次区142，阵列中，每一行子像素对应设置一条扫描线150，所述扫描线150位于主区141和次区142之间，每一列所像素对应设置一条数据线160。
参照图5，主区141包括：第一薄膜晶体管T1、第一存储电容C S1和第一液晶电容C lc1，所述第一薄膜晶体管T1的栅极与所述扫描线150连接，其源极连接所述数据线160，其漏极分别连接第一存储电容C S1的一端和第一液晶电容C lc1的一端，第一存储电容C S1的另一端连接第二公共电极121，所述第一液晶电容C lc1的另一端连接所述第一公共电极111；所述次区142包括：第二薄膜晶体管T2、第二存储电容C S2和第二液晶电容C lc2，所述第二薄膜晶体管T2的栅极与所述扫描线150连接，其源极连接所述数据线160，其漏极分别连接所述第二存储电容C S2的一端和所述第二液晶电容C lc2的一端，所述第二存储电容C S2的另一端连接所述第二公共电极121，所述第二液晶电容C lc2的另一端连接所述第一公共电极111。
本实施例中，一个子像素140中薄膜晶体管的数量为2个（即第一薄膜晶体管T1和第二薄膜晶体管T2），形成Normal 2T+8畴的子像素结构设计，主区141和次区142分别对应4个畴的液晶分子，减少了子像素140内薄膜晶体管的数量，与现有的3T8畴的子像素结构相比，能够消除该第三薄膜晶体管放电对阵列基板120上的第二公共电极121的影响，减少水平串扰现象的发生，提高像素开口率。
参照图5，在本实施例中，第二薄膜晶体管T2的漏极与第二液晶电容C lc2之间串联连接第三电容C x。第三电容C x与第二液晶电容C lc2的串联连接，增大了电容值，降低了次区142的电压，进而降低了与次区142对应的液晶分子131的偏转角度θ A（参照图11），与主区141对应的液晶分子131的偏转角度θ B（参照图12）形成差异，进而形成不同的视角，解决液晶显示面板100的色偏问题。
在本实施例中，参照图3~图6，所述主区141内设置有与所述第一薄膜晶体管T1的漏极连接的第一存储电极1411；所述第一存储电容C S1由所述第一存储电极1411与所述第二公共电极121形成；所述第一液晶电容C lc1由所述主区141内的主像素电极1412与所述第一公共电极111形成；所述第一存储电极1411通过过孔（图中未示出）与所述主像素电极1412连接。所述次区142内设置有与所述第二薄膜晶体管T2的漏极连接的第二存储电极1421；所述第二存储电容C lc2由所述第二存储电极1421与所述第二公共电极121形成；所述第二液晶电容C lc2由所述次区142内的次像素电极1422与所述第一公共电极111形成；所述第二存储电极1421通过过孔与所述次像素电极1422连接。
在本实施中，第一公共电极111为氧化铟锡电极（即ITO电极），第二公共电极121为阵列电极（Array COM），主像素电极1412和次像素电极1422分别为氧化铟锡电极（即ITO电极）。主像素电极1412和次像素电极1422上的像素图案通过黄光制成。
在本发明的另一个实施例中，所述次区142的电压小于所述主区141的电压。在本实施例中，根据电荷守恒原理，所述次区142的电压V sub与所述主区141的电压Vmain之间的关系式为：V sub=V main*C x/(C lc_sub+ C x)，式中，V sub为次区的电压值，V main为主区的电压值，C x为第三电容，C lc_sub为第二液晶电容。由该关系式可以看出，由于增加了第三电容C x，使得次区142的电压V sub与所述主区141的电压V main。电压的差异，形成电场强度的差异，进而使得主区141和次区142对应的液晶分子的偏转角度形成差异，进而形成不同的视角，解决液晶显示面板100的色偏问题。
在本发明的一个实施例中，参照图7，参照为形成第三电容C x，在位于所述次区142内的次像素电极1422下方的所述阵列基板120内设置有底电极170，所述第三电容C x由所述底电极170与所述次像素电极1422形成，底电极170接收电压信号，与次像素电极1422之间形成所述第三电容C x。
在本实施例中，所述底电极170朝向所述次像素电极1422一面设置有栅极绝缘层181，所述栅极绝缘层181与所述次像素电极1422之间设置有保护层182。
其中，所述底电极170为氧化铟锡电极（即ITO电极）。
在本发明的另一个实施例中，参照图8，所述栅极绝缘层181背离所述底电极170一面设置有第一金属层183，所述栅极绝缘层181表面开设有至少一个贯通所述栅极绝缘层181的通孔1811，所述底电极170朝向所述栅极绝缘层181一面暴露于所述通孔1811，所述第一金属层183沉积于所述通孔1811并与所述底电极170电性连接。通孔1811的开设，是的第一金属层183（M1）可沉积至底电极170并与底电极170电性连接，从而将电压信号从第一金属层183引入底电极170，便于底电极170与次像素电极1422之间形成第三电容C x，而且便于调节底电极170的电压信号。
在本发明的一个实施例中，参照图9，所述底电极170与子像素140的主像素电极1412一一对应，一个所述底电极170对应一个子像素140的主像素电极1412。底电极170与主像素电极1412的一对一的设计方式，即一个底电极170对应一个子像素140，可提高第三电容C x的电容值的控制准确性。
在本发明的另一个实施例中，参照图10，一个所述底电极170对应两个以上子像素140的主像素电极1412。在本实施例中，一个底电极170对应4个主像素电极1412。底电极170与主像素电极1412的一对多的设计方式，即一个底电极170对应多个子像素140，可降低生成制造成本。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (18)

  1. 一种液晶显示面板，包括：
    相对设置的彩膜基板和阵列基板，所述彩膜基板和所述阵列基板之间设置有液晶层，所述液晶层包括多个液晶分子，所述彩膜基板朝向所述阵列基板一面设置有第一公共电极，所述阵列基板朝向所述彩膜基板一面设置有第二公共电极；以及
    呈阵列排布的多个子像素，设置于所述阵列基板朝向所述彩膜基板一面，每个所述子像素定义有间隔排布的主区和次区，每一行所述子像素对应设置一条扫描线，所述扫描线位于所述主区和所述次区之间，每一列所述子像素对应设置一条数据线；
    所述主区包括：第一薄膜晶体管、第一存储电容和第一液晶电容，所述第一薄膜晶体管的栅极与所述扫描线连接，其源极连接所述数据线，其漏极分别连接所述第一存储电容的一端和所述第一液晶电容的一端，所述第一存储电容的另一端连接所述第二公共电极，所述第一液晶电容的另一端连接所述第一公共电极；
    所述次区包括：第二薄膜晶体管、第二存储电容和第二液晶电容，所述第二薄膜晶体管的栅极与所述扫描线连接，其源极连接所述数据线，其漏极分别连接所述第二存储电容的一端和所述第二液晶电容的一端，所述第二存储电容的另一端连接所述第二公共电极，所述第二液晶电容的另一端连接所述第一公共电极；
    其中，
    所述次区还包括第三电容，所述第三电容串联连接于所述第二薄膜晶体管的漏极与所述第二液晶电容之间，使得所述次区所对应的所述液晶分子的偏转角度小于所述主区所对应的所述液晶分子的偏转角度。
  2. 如权利要求1所述的液晶显示面板，其中，所述次区的电压小于所述主区的电压。
  3. 如权利要求2所述的液晶显示面板，其中，所述次区的电压V sub与所述主区的电压V main之间的关系式为：V sub=V main*C x/(C lc_sub+ C x)，式中，V sub为次区的电压值，V main为主区的电压值，C x为第三电容，C lc_sub为第二液晶电容。
  4. 如权利要求1所述的液晶显示面板，其中，位于所述次区内的次像素电极下方的所述阵列基板内设置有底电极，所述第三电容由所述底电极与所述次像素电极形成。
  5. 如权利要求4所述的液晶显示面板，其中，所述底电极朝向所述次像素电极一面设置有栅极绝缘层，所述栅极绝缘层与所述次像素电极之间设置有保护层。
  6. 如权利要求5所述的液晶显示面板，其中，所述栅极绝缘层背离所述底电极一面设置有第一金属层，所述栅极绝缘层表面开设有至少一个贯通所述栅极绝缘层的通孔，所述底电极朝向所述栅极绝缘层一面暴露于所述通孔，所述第一金属层沉积于所述通孔并与所述底电极电性连接。
  7. 如权利要求5所述的液晶显示面板，其中，所述底电极与子像素的主像素电极一一对应，一个所述底电极对应一个子像素的主像素电极。
  8. 如权利要求5所述的液晶显示面板，其中，一个所述底电极对应两个以上子像素的主像素电极。
  9. 如权利要求1所述的液晶显示面板，其中，所述主区内设置有与所述第一薄膜晶体管的漏极连接的第一存储电极；所述第一存储电容由所述第一存储电极与所述第二公共电极形成；所述第一液晶电容由所述主区内的主像素电极与所述第一公共电极形成；所述第一存储电极通过过孔与所述主像素电极连接；
    所述次区内设置有与所述第二薄膜晶体管的漏极连接的第二存储电极；所述第二存储电容由所述第二存储电极与所述第二公共电极形成；所述第二液晶电容由所述次区内的次像素电极与所述第一公共电极形成；所述第二存储电极通过过孔与所述次像素电极连接。
  10. 一种显示装置，其中，包括：液晶显示面板；
    所述液晶显示面板包括：
    相对设置的彩膜基板和阵列基板，所述彩膜基板和所述阵列基板之间设置有液晶层，所述液晶层包括多个液晶分子，所述彩膜基板朝向所述阵列基板一面设置有第一公共电极，所述阵列基板朝向所述彩膜基板一面设置有第二公共电极；以及
    呈阵列排布的多个子像素，设置于所述阵列基板朝向所述彩膜基板一面，每个所述子像素定义有间隔排布的主区和次区，每一行所述子像素对应设置一条扫描线，所述扫描线位于所述主区和所述次区之间，每一列所述子像素对应设置一条数据线；
    所述主区包括：第一薄膜晶体管、第一存储电容和第一液晶电容，所述第一薄膜晶体管的栅极与所述扫描线连接，其源极连接所述数据线，其漏极分别连接所述第一存储电容的一端和所述第一液晶电容的一端，所述第一存储电容的另一端连接所述第二公共电极，所述第一液晶电容的另一端连接所述第一公共电极；
    所述次区包括：第二薄膜晶体管、第二存储电容和第二液晶电容，所述第二薄膜晶体管的栅极与所述扫描线连接，其源极连接所述数据线，其漏极分别连接所述第二存储电容的一端和所述第二液晶电容的一端，所述第二存储电容的另一端连接所述第二公共电极，所述第二液晶电容的另一端连接所述第一公共电极；
    所述次区还包括第三电容，所述第三电容串联连接于所述第二薄膜晶体管的漏极与所述第二液晶电容之间，使得所述次区所对应的所述液晶分子的偏转角度小于所述主区所对应的所述液晶分子的偏转角度。
  11. 如权利要求10所述的显示装置，其中，所述次区的电压小于所述主区的电压。
  12. 如权利要求11所述的显示装置，其中，所述次区的电压V sub与所述主区的电压V main之间的关系式为：V sub=V main*C x/(C lc_sub+ C x)，式中，V sub为次区的电压值，V main为主区的电压值，C x为第三电容，C lc_sub为第二液晶电容。
  13. 如权利要求10所述的显示装置，其中，位于所述次区内的次像素电极下方的所述阵列基板内设置有底电极，所述第三电容由所述底电极与所述次像素电极形成。
  14. 如权利要求13所述的显示装置，其中，所述底电极朝向所述次像素电极一面设置有栅极绝缘层，所述栅极绝缘层与所述次像素电极之间设置有保护层。
  15. 如权利要求14所述的显示装置，其中，所述栅极绝缘层背离所述底电极一面设置有第一金属层，所述栅极绝缘层表面开设有至少一个贯通所述栅极绝缘层的通孔，所述底电极朝向所述栅极绝缘层一面暴露于所述通孔，所述第一金属层沉积于所述通孔并与所述底电极电性连接。
  16. 如权利要求14所述的显示装置，其中，所述底电极与子像素的主像素电极一一对应，一个所述底电极对应一个子像素的主像素电极。
  17. 如权利要求14所述的显示装置，其中，一个所述底电极对应两个以上子像素的主像素电极。
  18. 如权利要求10所述的显示装置，其中，所述主区内设置有与所述第一薄膜晶体管的漏极连接的第一存储电极；所述第一存储电容由所述第一存储电极与所述第二公共电极形成；所述第一液晶电容由所述主区内的主像素电极与所述第一公共电极形成；所述第一存储电极通过过孔与所述主像素电极连接；
    所述次区内设置有与所述第二薄膜晶体管的漏极连接的第二存储电极；所述第二存储电容由所述第二存储电极与所述第二公共电极形成；所述第二液晶电容由所述次区内的次像素电极与所述第一公共电极形成；所述第二存储电极通过过孔与所述次像素电极连接。
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Publication number Priority date Publication date Assignee Title
CN114815353A (zh) * 2022-04-08 2022-07-29 Tcl华星光电技术有限公司 显示面板
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090128724A1 (en) * 2007-11-21 2009-05-21 Hannstar Display Corporation Liquid crystal display
CN101852955A (zh) * 2009-04-02 2010-10-06 华映视讯（吴江）有限公司 可消除残影的液晶显示装置及其方法
CN102508386A (zh) * 2011-11-28 2012-06-20 深圳市华星光电技术有限公司 液晶显示器
CN203337970U (zh) * 2013-06-21 2013-12-11 深圳市华星光电技术有限公司 液晶阵列基板及电子装置
CN108983517A (zh) * 2018-07-17 2018-12-11 深圳市华星光电技术有限公司 像素电路及液晶显示面板
CN110570825A (zh) * 2019-08-08 2019-12-13 深圳市华星光电技术有限公司 一种像素电路及液晶显示面板

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI364734B (en) * 2006-06-30 2012-05-21 Chimei Innolux Corp Liquid crystal display panel, driving method and liquid crystal displayer
US8174636B2 (en) * 2007-08-10 2012-05-08 Chimei Innolux Corporation Thin film transistor substrate and liquid crystal display having the same comprising a coupling capacitor as a voltage divider between a TFT and a data line
KR101769585B1 (ko) * 2010-08-10 2017-08-21 삼성디스플레이 주식회사 액정표시패널
CN107065352B (zh) * 2017-04-17 2019-11-05 深圳市华星光电半导体显示技术有限公司 八畴像素结构
CN112068371A (zh) * 2020-09-10 2020-12-11 深圳市华星光电半导体显示技术有限公司 一种阵列基板、显示面板

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090128724A1 (en) * 2007-11-21 2009-05-21 Hannstar Display Corporation Liquid crystal display
CN101852955A (zh) * 2009-04-02 2010-10-06 华映视讯（吴江）有限公司 可消除残影的液晶显示装置及其方法
CN102508386A (zh) * 2011-11-28 2012-06-20 深圳市华星光电技术有限公司 液晶显示器
CN203337970U (zh) * 2013-06-21 2013-12-11 深圳市华星光电技术有限公司 液晶阵列基板及电子装置
CN108983517A (zh) * 2018-07-17 2018-12-11 深圳市华星光电技术有限公司 像素电路及液晶显示面板
CN110570825A (zh) * 2019-08-08 2019-12-13 深圳市华星光电技术有限公司 一种像素电路及液晶显示面板

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