WO2022257245A1 - 阵列基板、阵列基板制造方法及显示面板 - Google Patents

阵列基板、阵列基板制造方法及显示面板 Download PDF

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Publication number
WO2022257245A1
WO2022257245A1 PCT/CN2021/108390 CN2021108390W WO2022257245A1 WO 2022257245 A1 WO2022257245 A1 WO 2022257245A1 CN 2021108390 W CN2021108390 W CN 2021108390W WO 2022257245 A1 WO2022257245 A1 WO 2022257245A1
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Prior art keywords
layer
array substrate
pixel definition
protective layer
display panel
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PCT/CN2021/108390
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English (en)
French (fr)
Inventor
王傲
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武汉华星光电技术有限公司
武汉华星光电半导体显示技术有限公司
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Application filed by 武汉华星光电技术有限公司, 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电技术有限公司
Priority to US17/598,276 priority Critical patent/US20240032345A1/en
Publication of WO2022257245A1 publication Critical patent/WO2022257245A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the present application relates to the display field, and in particular to an array substrate, a method for manufacturing the array substrate, and a display panel.
  • FIG. 1 schematically illustrates the evaporation process of an organic luminescent material.
  • the array substrate 10 includes a base 11 and an array composite layer 12, and support columns 14 are arranged on the array composite layer 12. During the vapor deposition process, the array substrate 10 is placed upside down, the photomask 1000 is positioned below the array substrate 10, and the support columns 14 are in contact with the photomask 1000 to prevent the photomask from contacting and damaging the array composite layer 12.
  • the photomask 1000 needs to move relative to the array substrate 10 to complete the alignment action. At this time, as shown by the dashed box A in FIG.
  • display defects such as pixel failure will be caused, and even affect the encapsulation performance of the subsequent encapsulation layer, resulting in a decrease in the lifespan of the organic light emitting display panel.
  • a protective layer made of inorganic materials is formed on the surface of the support pillars to solve the problem that the photomask scratches the support pillars to generate debris and foreign matter during the evaporation process, thereby solving the problem of poor display and foreign matter caused by debris and foreign matter.
  • An embodiment of the present application provides an array substrate, including:
  • An array composite layer disposed on the substrate, the array composite layer includes a pixel definition layer, and the pixel definition layer includes a plurality of pixel definition parts and openings between adjacent pixel definition parts;
  • the protective layer is arranged at least on the support column and avoids the opening
  • the material of the protective layer is an inorganic material.
  • the embodiment of the present application provides a method for manufacturing an array substrate, including the following steps:
  • Step S100 providing an array substrate to be processed, the array substrate to be processed includes: a substrate, an array composite layer and support columns, the array composite layer is disposed on the substrate, the array composite layer includes a pixel definition layer, the The pixel definition layer includes a plurality of pixel definition parts and openings between adjacent pixel definition parts, and the support pillars are arranged on the pixel definition parts;
  • Step S200 forming a protective layer, forming the protective layer on the pixel defining portion, the support pillars and the opening, wherein the material of the protective layer is an inorganic material;
  • Step S300 forming a patterned photoresist, the patterned photoresist includes an opening, and the opening exposes the opening;
  • Step S400 patterning the protection layer, performing patterning treatment on the protection layer through an etching process, and removing the protection layer at the opening;
  • Step S500 removing the photoresist.
  • the embodiment of the present application also provides a display panel, including an array substrate, wherein the array substrate includes:
  • An array composite layer disposed on the substrate, the array composite layer includes a pixel definition layer, and the pixel definition layer includes a plurality of pixel definition parts and openings between adjacent pixel definition parts;
  • the protective layer is arranged at least on the support column and avoids the opening
  • the material of the protective layer is an inorganic material
  • the display panel further includes a light emitting device disposed in the opening, and an encapsulation layer disposed on the light emitting device.
  • an array substrate, a method for manufacturing the array substrate, and a display panel are provided.
  • the protective layer made of the inorganic material has high hardness characteristics, which can avoid During the process, the photomask scratches the supporting columns to generate debris and foreign matter, thereby improving the problems of poor display and reduced lifespan in existing display panels.
  • Fig. 1 is the process schematic diagram of vapor deposition process
  • FIG. 2 is a first schematic diagram of an array substrate provided by an embodiment of the present application.
  • FIG. 3 is a second schematic diagram of an array substrate provided by an embodiment of the present application.
  • FIG. 4 is a third schematic diagram of an array substrate provided by an embodiment of the present application.
  • FIG. 5 is a fourth schematic diagram of an array substrate provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of process steps of an array substrate manufacturing method provided by an embodiment of the present application.
  • FIG 7 to 11 are schematic views of the manufacturing process of the array substrate manufacturing method provided by an embodiment of the present application.
  • An embodiment of the present application provides an array substrate, including: a base; an array composite layer, disposed on the substrate, the array composite layer includes a pixel definition layer, and the pixel definition layer includes a plurality of pixel definition parts and adjacent pixel definition parts
  • the opening; the support pillar is arranged on the pixel definition part; the protection layer is arranged at least on the support pillar and avoids the opening; wherein, the material of the protection layer is an inorganic material.
  • Embodiments of the present application provide an array substrate, a method for manufacturing the array substrate, and a display panel. Each will be described in detail below. It should be noted that the description sequence of the following embodiments is not intended to limit the preferred sequence of the embodiments.
  • FIG. 2 is a cross-sectional view of the first type of array substrate provided by the embodiment of the present application.
  • the array substrate 10 includes a base 11, an array composite layer 12, support columns 14, and a protective layer 15.
  • the array composite layer 12 is arranged on the substrate. 11, the array composite layer 12 includes a pixel definition layer, and the pixel definition layer includes a plurality of pixel definition parts 13 and openings 131 between adjacent pixel definition parts 13; the support pillars 14 are arranged on the pixel definition parts 13; the protective layer 15 It is at least disposed on the support pillar 14 and avoided from the opening 131 ; wherein, the material of the protection layer 15 is an inorganic material.
  • the substrate 11 can be a rigid substrate or a flexible substrate.
  • the substrate 11 can be glass (Glass), etc.
  • the substrate 11 when the substrate 11 is a flexible substrate, it can be polyimide (Polyimide, abbreviated as PI), PMMA, etc. (polymethyl methacrylate, polymethyl methacrylate), PC (polycarbonate, Polycarbonate) and other materials are not limited here.
  • the array composite layer 12 may include a buffer layer disposed on the substrate 11, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed on the semiconductor layer, a gate layer disposed on the gate insulating layer, The interlayer insulating layer disposed on the gate layer, the source/drain layer disposed on the interlayer insulating layer, the first insulating layer disposed on the source drain layer, the first insulating layer disposed on the first insulating layer.
  • the electrode, the pixel definition layer is disposed on the first electrode, the first electrode may be an anode, and the first electrode may be electrically connected to the drain of the thin film transistor.
  • the array composite layer 12 includes a thin film transistor, and the structure of the thin film transistor is not limited here.
  • the thin film transistor may be a top gate type thin film transistor or a bottom gate type thin film transistor, and the material of the semiconductor layer of the thin film transistor may be non- Crystalline silicon, polysilicon, metal oxides, etc.
  • the pixel definition layer can be made of organic materials
  • the support pillars 14 can be made of organic materials.
  • the support pillar 14 includes a top surface 141 and a side surface 142 away from the pixel definition layer, and the protection layer 15 is disposed on the top surface of the support pillar 14 .
  • the protection layer 15 is only disposed on the top surface 141 of the support column 14 .
  • the thickness of the protective layer 15 is less than the height of the supporting pillars 14 .
  • the support column 14 is an organic material with certain elasticity
  • the protective layer 15 is an inorganic material.
  • the elastic support column 14 can be deformed. Therefore, there is a buffer function between the array substrate 10 and the photomask, and the friction force between the array substrate 10 and the photomask is reduced.
  • the protective layer 15 has a high hardness, and the protective layer 15 is not easy to be scratched. The protective layer 15 thus protects the support column 14 and prevents the support column 14 from being scratched to produce debris and foreign matter, thereby improving the display in the existing display panel. Problems with poor health and reduced life expectancy.
  • the material of the protection layer 15 is any one of silicon nitride and silicon oxide.
  • the thin film encapsulation layer may be a stacked structure of inorganic layers and organic layers, the inorganic layer includes any one of silicon nitride and silicon oxide, and silicon nitride and silicon oxide have It has good performance of preventing water vapor and oxygen from entering, and the protective layer 15 is also made of any one of silicon nitride and silicon oxide, which can avoid the introduction of other materials and prevent new defects.
  • FIG. 3 is a second cross-sectional view of the array substrate provided by the embodiment of the present application. The similarities between this embodiment and the first embodiment will not be repeated, and the difference lies in the location of the protective layer 15 .
  • the protection layer 15 is also disposed on the side surface 142 of the support column 14 .
  • the support pillar 14 includes a top surface 141 and a side surface 142 away from the pixel definition layer, and the protection layer 15 is disposed on the top surface 141 and the side surface 142 of the support pillar 14 .
  • the size of the array substrate 10 is very large. During the evaporation process, when the array substrate 10 warps or bends, the side surfaces of the support columns 14 will also contact the photomask, and the photomask will scratch the top surface 141 and the top surface 141 of the support column 14.
  • the side surface 142, the protective layer 15 is arranged on the top surface 141 and the side surface 142 of the support column 14, which can better protect the support column 14, and the protective layer 15 thus protects the support column 14 and prevents the support column 14 from being scratched and broken. dust and foreign matter, thereby improving the problems of poor display and reduced lifespan in existing display panels.
  • FIG. 4 is a third cross-sectional view of the array substrate provided by the embodiment of the present application. The similarities between this embodiment and the first embodiment will not be repeated, and the difference lies in the location of the protective layer 15 .
  • the protective layer 15 is also disposed on the surface of the pixel defining portion 13 .
  • the support pillar 14 includes a top surface 141 and a side surface 142 away from the pixel definition layer, and the protective layer 15 is disposed on the top surface 141 and the side surface 142 of the support pillar 14 , and is also disposed on the surface of the pixel definition portion 13 .
  • the size of the array substrate 10 is very large. During the evaporation process, when the array substrate 10 warps or bends, the side surfaces of the support pillars 14 and the surface of the pixel definition portion 13 will also come into contact with the photomask, and the photomask will scratch the support.
  • the protective layer 15 is disposed on the top surface 141 and the side surface 142 of the support column 14, and the surface of the pixel definition portion 13, which can better To protect the support pillars 14 and the pixel definition part 13, the protective layer 15 thus protects the support pillars 14 and the pixel definition part 13, and prevents the support pillars 14 and the pixel definition part 13 from being scratched to produce debris and foreign matter, thereby improving the existing display panel. The problem of bad display and lifespan drop.
  • the surface of the pixel defining portion 13 is covered with a protective layer 15, which can block the entry of water vapor and oxygen, thereby increasing the lifespan of the display panel.
  • FIG. 5 is a fourth cross-sectional view of the array substrate provided by the embodiment of the present application. The similarities between this embodiment and the first embodiment will not be repeated. The difference lies in the size of the protective layer 15 .
  • the length d1 of the top surface 141 of the support column 14 is greater than the length d2 of the protective layer 15 on the top surface 141 , and the protective layer 15 is located at the center of the top surface 141 .
  • the protective layer 15 is only arranged at the central position of the top surface 141 of the supporting column 14, and the length d2 of the protective layer 15 is less than the length d1 of the top surface 141, when the supporting column 14 is circular or the shape of the protective layer 15 is a circle
  • the length d1 refers to the diameter of the top surface 141
  • the length d2 refers to the diameter of the protective layer 15 .
  • the protective layer 15 is only arranged at the center of the top surface 141 of the support column 14, which can reduce the contact area between the support column 14 and the photomask, thereby reducing the friction between the array substrate and the photomask, thereby reducing the And prevent the support column 14 from being scratched to generate debris and foreign matter, thereby improving the problems of poor display and reduced lifespan in the existing display panel.
  • FIG. 6 is a schematic flow chart of the steps of the array substrate manufacturing method provided by the embodiment of the present application.
  • FIG. 7 to FIG. The method for manufacturing an array substrate includes step S100, step S200, step S300, step S400, and step S500.
  • Step S100 providing an array substrate to be processed, the array substrate to be processed includes: a substrate, an array composite layer and support columns, the array composite layer is disposed on the substrate, the array composite layer includes a pixel definition layer, and the pixel definition layer includes a plurality of pixel definition parts and the openings between adjacent pixel defining parts, the supporting columns are arranged on the pixel defining parts;
  • the array substrate 100 to be processed includes a substrate 11, an array composite layer 12, and support columns 14.
  • the array composite layer 12 is disposed on the substrate 11.
  • the array composite layer 12 includes a pixel definition layer, and the pixel definition layer includes The plurality of pixel defining portions 13 and the openings 131 between adjacent pixel defining portions 13 ; the support pillars 14 are disposed on the pixel defining portions 13 .
  • Step S200 forming a protective layer, forming a protective layer 15 on the pixel definition part, the supporting pillars 14 and the opening 131, wherein the material of the protective layer 15 is an inorganic material;
  • an integral protective layer 15 is formed on the pixel defining portion, the supporting pillars 14 and the opening 131 .
  • Step S300 forming a patterned photoresist 21, the patterned photoresist 21 includes an opening 211, and the opening 211 exposes the opening 131;
  • Step S400 As shown in FIG. 10 , patterning the protection layer 15 is carried out, and the protection layer 15 is patterned by an etching process, and the protection layer 15 at the opening 131 is removed;
  • Step S500 As shown in FIG. 11 , remove the photoresist.
  • the material of the protection layer 15 is any one of silicon nitride and silicon oxide.
  • the thin film encapsulation layer may be a stacked structure of inorganic layers and organic layers, the inorganic layer includes any one of silicon nitride and silicon oxide, and silicon nitride and silicon oxide have It has good performance of preventing water vapor and oxygen from entering, and the protective layer 15 is also made of any one of silicon nitride and silicon oxide, which can avoid the introduction of other materials and prevent new defects.
  • the location where the protection layer 15 is disposed can be different, and reference can be made to the location where the protection layer 15 is disposed in the above-mentioned embodiments, and details will not be repeated here.
  • An embodiment of the present application further provides a display panel, including the array substrate 10 described in any one of the above embodiments, and the display panel further includes a light emitting device disposed in the opening 131, and an encapsulation layer disposed on the light emitting device.
  • the light emitting device may be an organic light emitting device, which is not limited herein.
  • the encapsulation layer may be in the form of a thin film encapsulation layer or a cover plate encapsulation, which is not limited here.

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Abstract

本申请实施例公开了一种阵列基板、阵列基板制造方法及显示面板。阵列基板包括：支撑柱，设置于像素定义部上；保护层，至少设置于支撑柱上；其中，保护层的材料为无机材料。本申请实施例的保护层具高硬度特性，可以避免在蒸镀工艺中光罩划伤支撑柱产生碎屑和异物，从而改善现有显示面板中的显示不良和寿命下降的问题。

Description

阵列基板、阵列基板制造方法及显示面板 技术领域
本申请涉及显示领域，具体涉及一种阵列基板、阵列基板制造方法及显示面板。
 背景技术
有机发光显示面板（OLED）已经广泛应用于手机、笔记本等电子产品。有机发光显示面板需要通过蒸镀有机发光材料形成发光器件，图1示意了有机发光材料的蒸镀过程，阵列基板10包括基底11和阵列复合层12，支撑柱14设于阵列复合层12上，蒸镀工艺时，阵列基板10倒置放置，光罩1000位于阵列基板10下方，支撑柱14与光罩1000接触，以防止光罩接触并破坏阵列复合层12，然而，蒸镀工艺时，光罩1000需要相对于阵列基板10进行移动，以完成对位动作，此时，如图1中虚线框A所示，光罩会划伤支撑柱14，产生碎屑和异物1411，异物1411依附在阵列基板10上就会导致像素失效等显示不良，甚至影响后续封装层的封装性能，导致有机发光显示面板的寿命下降。
 技术问题
本申请实施例通过在支撑柱表面形成无机材料制作的保护层，以解决在蒸镀工艺中，光罩划伤支撑柱产生碎屑和异物的问题，从而解决碎屑和异物导致的显示不良和寿命下降的问题。
 技术解决方案
本申请实施例提供了一种阵列基板，其中，包括：
基底；
阵列复合层，设于所述基底上，所述阵列复合层包括像素定义层，所述像素定义层包括多个像素定义部以及相邻的所述像素定义部之间的开口；
支撑柱，设置于所述像素定义部上；
保护层，至少设置于所述支撑柱上，且避开所述开口设置；
其中，所述保护层的材料为无机材料。
相应的，本申请实施例提供了一种阵列基板制造方法，包括如下步骤：
步骤S100：提供一待处理阵列基板，所述待处理阵列基板包括：基底、阵列复合层和支撑柱，所述阵列复合层设于所述基底上，所述阵列复合层包括像素定义层，所述像素定义层包括多个像素定义部以及相邻的所述像素定义部之间的开口，所述支撑柱设置于所述像素定义部上；
步骤S200：形成保护层，在所述像素定义部、所述支撑柱和所述开口上形成所述保护层，其中，所述保护层的材料为无机材料；
步骤S300：形成图案化的光阻，所述图案化的光阻包括开孔，所述开孔露出所述开口；
步骤S400：对所述保护层进行图案化处理，通过刻蚀工艺对所述保护层进行图案化处理，去除所述开口部位的所述保护层；
步骤S500：去除所述光阻。
相应的，本申请实施例还提供了一种显示面板，包括阵列基板，其中，所述阵列基板包括：
基底；
阵列复合层，设于所述基底上，所述阵列复合层包括像素定义层，所述像素定义层包括多个像素定义部以及相邻的所述像素定义部之间的开口；
支撑柱，设置于所述像素定义部上；
保护层，至少设置于所述支撑柱上，且避开所述开口设置；
其中，所述保护层的材料为无机材料；
其中，所述显示面板还包括设置于所述开口的发光器件，以及设置于所述发光器件上的封装层。
 有益效果
本申请实施例中，提供了一种阵列基板、阵列基板制造方法及显示面板，通过在支撑柱表面形成无机材料制作的保护层，无机材料制作的保护层具高硬度特性，可以避免在蒸镀工艺中光罩划伤支撑柱产生碎屑和异物，从而改善现有显示面板中的显示不良和寿命下降的问题。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是蒸镀工艺的过程示意图；
图2是本申请一实施例提供的阵列基板的第一种示意图；
图3是本申请一实施例提供的阵列基板的第二种示意图；
图4是本申请一实施例提供的阵列基板的第三种示意图；
图5是本申请一实施例提供的阵列基板的第四种示意图；
图6是本申请一实施例提供的阵列基板制造方法的流程步骤示意图；
图7至11是本申请一实施例提供的阵列基板制造方法的制造过程的示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。此外，应当理解的是，此处所描述的具体实施方式仅用于说明和解释本申请，并不用于限制本申请。在本申请中，在未作相反说明的情况下，使用的方位词如“上”和“下”通常是指装置实际使用或工作状态下的上和下，具体为附图中的图面方向；而“内”和“外”则是针对装置的轮廓而言的。
本申请实施例提供了一种阵列基板，包括：基底；阵列复合层，设于基底上，阵列复合层包括像素定义层，像素定义层包括多个像素定义部以及相邻的像素定义部之间的开口；支撑柱，设置于像素定义部上；保护层，至少设置于支撑柱上，且避开开口设置；其中，保护层的材料为无机材料。
本申请实施例提供了一种阵列基板、阵列基板制造方法及显示面板。以下分别进行详细说明。需说明的是，以下实施例的描述顺序不作为对实施例优选顺序的限定。
实施例一、
请参阅图2，图2为本申请实施例提供的阵列基板的第一种截面图，阵列基板10包括基底11、阵列复合层12、支撑柱14、保护层15，阵列复合层12设于基底11上，阵列复合层12包括像素定义层，像素定义层包括多个像素定义部13以及相邻的像素定义部13之间的开口131；支撑柱14设置于像素定义部13上；保护层15至少设置于支撑柱14上，且避开开口131设置；其中，保护层15的材料为无机材料。
具体的，基底11可以为刚性基底或柔性基底，基底11为刚性基底时，可以为玻璃（Glass）等，基底11为柔性基底时，可以为聚酰亚胺（Polyimide，简写为PI）、PMMA（聚甲基丙烯酸甲酯，polymethyl methacrylate）、PC（聚碳酸酯，Polycarbonate）等材料等，在此不做限定。
具体的，阵列复合层12可以包括设于基底11上的缓冲层、设于缓冲层上的半导体层、设于半导体层上的栅极绝缘层、设于栅极绝缘层上的栅极层、设于栅极层上的层间绝缘层、设于层间绝缘层上的源极/漏极层、设于源漏极层上的第一绝缘层、设于第一绝缘层上的第一电极，像素定义层设于第一电极上，第一电极可以为阳极，且第一电极可以电性连接薄膜晶体管的漏极。
具体的，阵列复合层12包括薄膜晶体管，薄膜晶体管的结构在此不做限定，薄膜晶体管可以为顶栅型薄膜晶体管，也可以为底栅型薄膜晶体管，薄膜晶体管的半导体层的材料可以为非晶硅、多晶硅、金属氧化物等。
具体的，像素定义层可以采用有机材料，支撑柱14可以采用有机材料。
本一些实施例中，支撑柱14包括远离像素定义层的顶表面141和侧表面142，保护层15设置于支撑柱14的顶表面。
具体的，在本实施例中，保护层15只设置在支撑柱14的顶表面141上。
在一些实施例中，保护层15的厚度小于支撑柱14的高度。
具体的，支撑柱14为有机材料，具有一定弹性，保护层15为无机材料，在蒸镀工艺中，光罩和阵列基板10相对移动而对位时，具有弹性的支撑柱14可以发生变形，从而使得阵列基板10与光罩之间有一个缓冲作用，减小阵列基板10与光罩之间的摩檫力。同时保护层15具有高的硬度，保护层15不容易被划伤，保护层15从而保护了支撑柱14，避免支撑柱14被划伤产生碎屑和异物，从而改善现有显示面板中的显示不良和寿命下降的问题。
在一些实施例中，保护层15的材料为氮化硅、氧化硅中的任一种。
具体的，在后续封装中，当采用薄膜封装时，薄膜封装层可以为无机层和有机层的堆叠结构，无机层包括氮化硅、氧化硅中的任一种，氮化硅、氧化硅具有很好的防止水汽、氧气进入的性能，保护层15也采用氮化硅、氧化硅中的任一种，可以避免引入其他材料，防止产生新的不良。
实施例二、
请参阅图3，图3为本申请实施例提供的阵列基板的第二种截面图，本实施例与实施例一相同之处不再赘述，不同之处在于保护层15设置的位置不同。
在本实施例中，保护层15还设置于支撑柱14的侧表面142。
具体的，支撑柱14包括远离像素定义层的顶表面141和侧表面142，保护层15设置在支撑柱14的顶表面141和侧表面142上。
阵列基板10的尺寸非常大，在蒸镀工艺中，当阵列基板10翘曲或弯曲时，支撑柱14的侧表面也会与光罩接触，光罩会划伤支撑柱14的顶表面141和侧表面142，保护层15设置在支撑柱14的顶表面141和侧表面142上，可以更好的保护支撑柱14，保护层15从而保护了支撑柱14，避免支撑柱14被划伤产生碎屑和异物，从而改善现有显示面板中的显示不良和寿命下降的问题。
实施例三、
请参阅图4，图4为本申请实施例提供的阵列基板的第三种截面图，本实施例与实施例一相同之处不再赘述，不同之处在于保护层15设置的位置不同。
在本实施例中，保护层15还设置于像素定义部13的表面。
具体的，支撑柱14包括远离像素定义层的顶表面141和侧表面142，保护层15设置在支撑柱14的顶表面141和侧表面142上，同时也设置在像素定义部13的表面。
阵列基板10的尺寸非常大，在蒸镀工艺中，当阵列基板10翘曲或弯曲时，支撑柱14的侧表面、像素定义部13的表面也会与光罩接触，光罩会划伤支撑柱14的顶表面141和侧表面142、以及像素定义部13的表面，保护层15设置在支撑柱14的顶表面141和侧表面142上、以及像素定义部13的表面上，可以更好的保护支撑柱14以及像素定义部13，保护层15从而保护了支撑柱14和像素定义部13，避免支撑柱14和像素定义部13被划伤产生碎屑和异物，从而改善现有显示面板中的显示不良和寿命下降的问题。
同时，像素定义部13的表面覆盖保护层15，保护层15可以阻挡水汽、氧气的进入，提升显示面板的寿命。
实施例四、
请参阅图5，图5为本申请实施例提供的阵列基板的第四种截面图，本实施例与实施例一相同之处不再赘述，不同之处在于保护层15设置的大小不同。
支撑柱14的顶表面141的长度d1大于顶表面141上的保护层15的长度d2，保护层15位于顶表面141的中心位置。
具体的，保护层15只设置在支撑柱14的顶表面141的中心位置，且保护层15的长度d2小于顶表面141的长度d1，当支撑柱14为圆形或保护层15的形状为圆形时，长度d1是指顶表面141的直径大小，长度d2是指保护层15的直径大小。
具体的，保护层15只设置在支撑柱14的顶表面141的中心位置，可以减小支撑柱14与光罩的接触面积，从而减小阵列基板与光罩之间的摩擦力，从而减小和避免支撑柱14被划伤产生碎屑和异物，从而改善现有显示面板中的显示不良和寿命下降的问题。
实施例五、
请参阅图6、图7至图11，图6为本申请实施例提供的阵列基板制造方法的步骤流程示意图，图7至图11示意了本申请实施例提供的阵列基板制造方法的过程示意图，阵列基板制造方法包括步骤S100、步骤S200、步骤S300、步骤S400、步骤S500。
步骤S100：提供一待处理阵列基板，待处理阵列基板包括：基底、阵列复合层和支撑柱，阵列复合层设于基底上，阵列复合层包括像素定义层，像素定义层包括多个像素定义部以及相邻的像素定义部之间的开口，支撑柱设置于像素定义部上；
具体的，如图7所示，待处理阵列基板100包括基底11、阵列复合层12、支撑柱14，阵列复合层12设于基底11上，阵列复合层12包括像素定义层，像素定义层包括多个像素定义部13以及相邻的像素定义部13之间的开口131；支撑柱14设置于像素定义部13上。
步骤S200：形成保护层，在像素定义部、支撑柱14和开口131上形成保护层15，其中，保护层15的材料为无机材料；
具体的，如图8所示，在像素定义部、支撑柱14和开口131上形成整面性的保护层15。
步骤S300：形成图案化的光阻21，图案化的光阻21包括开孔211，开孔211露出开口131；
具体的，如图9所示，先形成整面性的光阻21覆盖像素定义层、支撑柱14和开口131，然后采用曝光显影等工艺将光阻21图案化，去除不需要保留保护层15的部位对应的光阻。
步骤S400：如图10所示，对保护层15进行图案化处理，通过刻蚀工艺对保护层15进行图案化处理，去除开口131部位的保护层15；
步骤S500：如图11所示，去除光阻。
在本申请实施例中，保护层15的材料为氮化硅、氧化硅中的任一种。
具体的，在后续封装中，当采用薄膜封装时，薄膜封装层可以为无机层和有机层的堆叠结构，无机层包括氮化硅、氧化硅中的任一种，氮化硅、氧化硅具有很好的防止水汽、氧气进入的性能，保护层15也采用氮化硅、氧化硅中的任一种，可以避免引入其他材料，防止产生新的不良。
需要说明的是，在阵列基板10之中，保护层15设置的部位可以不同，可以参照上述实施例中保护层15的设置部位，在此不再赘述。
本申请实施例具有与上述实施例相同或相似的有益效果，在此不再赘述。
实施例六、
本申请实施例还提供了一种显示面板，包括如上述实施例中任一项所述的阵列基板10，显示面板还包括设置于开口131的发光器件，以及设置于发光器件上的封装层。
具体的，发光器件可以为有机发光器件，在此不做限定。封装层可以为薄膜封装层或盖板封装的方式，在此不做限定。
以上对本申请实施例所提供的一种阵列基板、阵列基板制造方法及显示面板进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想；同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (18)

  1. 一种阵列基板，其中，包括：
    基底；
    阵列复合层，设于所述基底上，所述阵列复合层包括像素定义层，所述像素定义层包括多个像素定义部以及相邻的所述像素定义部之间的开口；
    支撑柱，设置于所述像素定义部上；
    保护层，至少设置于所述支撑柱上，且避开所述开口设置；
    其中，所述保护层的材料为无机材料。
  2. 如权利要求1所述的阵列基板，其中，所述支撑柱包括远离所述像素定义层的顶表面和侧表面，所述保护层设置于所述支撑柱的所述顶表面。
  3. 如权利要求2所述的阵列基板，其中，所述保护层还设置于所述支撑柱的所述侧表面。
  4. 如权利要求3所述的阵列基板，其中，所述保护层还设置于所述像素定义部的表面。
  5. 如权利要求2所述的阵列基板，其中，所述顶表面的长度大于所述顶表面上的所述保护层的长度，所述保护层位于所述顶表面的中心位置。
  6. 如权利要求1所述的阵列基板，其中，所述保护层的厚度小于所述支撑柱的高度。
  7. 如权利要求5所述的阵列基板，其中，所述保护层的厚度小于所述支撑柱的高度。
  8. 如权利要求6所述的阵列基板，其中，所述保护层的材料为氮化硅、氧化硅中的任一种。
  9. 一种阵列基板制造方法，其中，包括如下步骤：
    步骤S100：提供一待处理阵列基板，所述待处理阵列基板包括：基底、阵列复合层和支撑柱，所述阵列复合层设于所述基底上，所述阵列复合层包括像素定义层，所述像素定义层包括多个像素定义部以及相邻的所述像素定义部之间的开口，所述支撑柱设置于所述像素定义部上；
    步骤S200：形成保护层，在所述像素定义部、所述支撑柱和所述开口上形成所述保护层，其中，所述保护层的材料为无机材料；
    步骤S300：形成图案化的光阻，所述图案化的光阻包括开孔，所述开孔露出所述开口；
    步骤S400：对所述保护层进行图案化处理，通过刻蚀工艺对所述保护层进行图案化处理，去除所述开口部位的所述保护层；
    步骤S500：去除所述光阻。
  10. 如权利要求9所述的阵列基板制造方法，其中，所述保护层的材料为氮化硅、氧化硅中的任一种。
  11. 一种显示面板，包括阵列基板，其中，所述阵列基板包括：
    基底；
    阵列复合层，设于所述基底上，所述阵列复合层包括像素定义层，所述像素定义层包括多个像素定义部以及相邻的所述像素定义部之间的开口；
    支撑柱，设置于所述像素定义部上；
    保护层，至少设置于所述支撑柱上，且避开所述开口设置；
    其中，所述保护层的材料为无机材料；
    其中，所述显示面板还包括设置于所述开口的发光器件，以及设置于所述发光器件上的封装层。
  12. 如权利要求11所述的显示面板，其中，所述支撑柱包括远离所述像素定义层的顶表面和侧表面，所述保护层设置于所述支撑柱的所述顶表面。
  13. 如权利要求12所述的显示面板，其中，所述保护层还设置于所述支撑柱的所述侧表面。
  14. 如权利要求13所述的显示面板，其中，所述保护层还设置于所述像素定义部的表面。
  15. 如权利要求12所述的显示面板，其中，所述顶表面的长度大于所述顶表面上的所述保护层的长度，所述保护层位于所述顶表面的中心位置。
  16. 如权利要求11所述的显示面板，其中，所述保护层的厚度小于所述支撑柱的高度。
  17. 如权利要求15所述的显示面板，其中，所述保护层的厚度小于所述支撑柱的高度。
  18. 如权利要求16所述的显示面板，其中，所述保护层的材料为氮化硅、氧化硅中的任一种。
PCT/CN2021/108390 2021-06-11 2021-07-26 阵列基板、阵列基板制造方法及显示面板 WO2022257245A1 (zh)

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