WO2022227173A1 - 像素结构及显示面板 - Google Patents

像素结构及显示面板 Download PDF

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Publication number
WO2022227173A1
WO2022227173A1 PCT/CN2021/096617 CN2021096617W WO2022227173A1 WO 2022227173 A1 WO2022227173 A1 WO 2022227173A1 CN 2021096617 W CN2021096617 W CN 2021096617W WO 2022227173 A1 WO2022227173 A1 WO 2022227173A1
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Prior art keywords
pixel
sub
electrode
preset angle
main
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PCT/CN2021/096617
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English (en)
French (fr)
Inventor
徐悦
陈亚妮
Original Assignee
Tcl华星光电技术有限公司
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Priority to US17/419,791 priority Critical patent/US20220357623A1/en
Publication of WO2022227173A1 publication Critical patent/WO2022227173A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
    • G02F1/134354—Subdivided pixels, e.g. for grey scale or redundancy the sub-pixels being capacitively coupled
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G02F1/133753—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers with different alignment orientations or pretilt angles on a same surface, e.g. for grey scale or improved viewing angle
    • G02F1/133761—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers with different alignment orientations or pretilt angles on a same surface, e.g. for grey scale or improved viewing angle with different pretilt angles

Definitions

  • the present application relates to the field of display technology, and in particular, to a pixel structure and a display panel.
  • VA liquid crystal display panels Due to the large difference in birefringence of liquid crystal molecules at different viewing angles, the display panel will appear color shift at large viewing angles, especially, large-size vertical alignment liquid crystals The display panel has a color cast at vertical viewing angles.
  • the present application provides a pixel structure and a display panel to solve the technical problem that the existing pixel structure overcomes the color shift defect but requires multiple transistors to work, and greatly reduces the aperture ratio and transmittance of the pixel structure.
  • the present application provides a pixel structure, the pixel structure includes a plurality of scan lines and a plurality of data lines arranged in an intersecting manner, the plurality of the scan lines and the plurality of the data lines define a plurality of sub-pixel units, each of which
  • the sub-pixel unit includes a main sub-pixel, at least one sub-sub-pixel, and a thin film transistor electrically connecting the main sub-pixel and the at least one sub-sub-pixel;
  • the main sub-pixel includes a main pixel electrode, the main pixel electrode includes a first trunk electrode and a first branch electrode, and the first branch electrode and the first trunk electrode are electrically connected at a first preset angle; each The sub-pixel includes a sub-pixel electrode, the sub-pixel electrode includes a second trunk electrode and a second branch electrode, and the second branch electrode is electrically connected with the second trunk electrode at a second preset angle; wherein, the The first preset angle is different from the second preset angle, the first preset angle is greater than the second preset angle, and the range of the first preset angle and the second preset angle 30 degrees to 50 degrees.
  • the second preset angles between the second branch electrodes and the corresponding second trunk electrodes in different sub-sub-pixels are different.
  • the second preset angle between the second branch electrode of the sub-sub-pixel disposed close to the main sub-pixel and the corresponding second trunk electrode is ⁇ 1, which is far away from the main sub-pixel.
  • the second preset angle between the second branch electrode of the secondary sub-pixel set by the primary sub-pixel and the corresponding second trunk electrode is ⁇ 2;
  • ⁇ 1 is greater than ⁇ 2.
  • the range of the first preset angle is 40 degrees to 50 degrees
  • the range of the second preset angle is 30 degrees to 45 degrees.
  • the control terminal of the thin film transistor is electrically connected to the corresponding scan line
  • the first terminal of the thin film transistor is electrically connected to the corresponding data line
  • the second terminal of the thin film transistor is electrically connected to the corresponding data line.
  • the main pixel electrode and the sub-pixel electrode are connected.
  • the main sub-pixel further includes a first storage capacitor and a first liquid crystal capacitor, and each of the sub-sub-pixels further includes a second storage capacitor and a second liquid crystal capacitor;
  • the pixel structure further includes a first common electrode and a second common electrode, the first storage capacitor and the second storage capacitor are electrically connected to the first common electrode, the first liquid crystal capacitor and the second A liquid crystal capacitor is electrically connected to the second common electrode.
  • At least one of the sub-pixels includes a first sub-pixel and a second sub-pixel, and the thin film transistor is electrically connected to the main sub-pixel, the first sub-pixel and the second sub-pixel a secondary sub-pixel, the thin film transistor is located between the first sub-pixel and the second sub-pixel;
  • the first preset angle is greater than the second preset angle
  • the second preset angle between the second branch electrode of the first sub-pixel and the corresponding second trunk electrode The angle is set to be greater than the second preset angle between the second branch electrode of the second sub-pixel and the corresponding second trunk electrode.
  • the range of the first preset angle is 40 degrees to 50 degrees
  • the distance between the second branch electrode of the first sub-pixel and the corresponding second trunk electrode is The range of the second preset angle is 30 degrees to 40 degrees
  • the present application provides a pixel structure, the pixel structure includes a plurality of scan lines and a plurality of data lines arranged in an intersecting manner, the plurality of the scan lines and the plurality of the data lines define a plurality of sub-pixel units, each of which
  • the sub-pixel unit includes a main sub-pixel, at least one sub-sub-pixel, and a thin film transistor electrically connecting the main sub-pixel and the at least one sub-sub-pixel;
  • the main sub-pixel includes a main pixel electrode, the main pixel electrode includes a first trunk electrode and a first branch electrode, and the first branch electrode and the first trunk electrode are electrically connected at a first preset angle; each The sub-pixel includes a sub-pixel electrode, the sub-pixel electrode includes a second trunk electrode and a second branch electrode, and the second branch electrode is electrically connected with the second trunk electrode at a second preset angle; wherein, the The first preset angle is different from the second preset angle.
  • the second preset angles between the second branch electrodes and the corresponding second trunk electrodes in different sub-sub-pixels are different.
  • the second preset angle between the second branch electrode of the sub-sub-pixel disposed close to the main sub-pixel and the corresponding second trunk electrode is ⁇ 1, which is far away from the main sub-pixel.
  • the second preset angle between the second branch electrode of the secondary sub-pixel set by the primary sub-pixel and the corresponding second trunk electrode is ⁇ 2;
  • ⁇ 1 is greater than ⁇ 2.
  • the range of the first preset angle and the second preset angle is 30 degrees to 50 degrees.
  • the first preset angle is greater than the second preset angle.
  • the range of the first preset angle is 40 degrees to 50 degrees
  • the range of the second preset angle is 30 degrees to 45 degrees.
  • the control terminal of the thin film transistor is electrically connected to the corresponding scan line
  • the first terminal of the thin film transistor is electrically connected to the corresponding data line
  • the second terminal of the thin film transistor is electrically connected to the corresponding data line.
  • the main pixel electrode and the sub-pixel electrode are connected.
  • the main sub-pixel further includes a first storage capacitor and a first liquid crystal capacitor, and each of the sub-sub-pixels further includes a second storage capacitor and a second liquid crystal capacitor;
  • the pixel structure further includes a first common electrode and a second common electrode, the first storage capacitor and the second storage capacitor are electrically connected to the first common electrode, the first liquid crystal capacitor and the second A liquid crystal capacitor is electrically connected to the second common electrode.
  • At least one of the sub-pixels includes a first sub-pixel and a second sub-pixel, and the thin film transistor is electrically connected to the main sub-pixel, the first sub-pixel and the second sub-pixel a secondary sub-pixel, the thin film transistor is located between the first sub-pixel and the second sub-pixel;
  • the first preset angle is greater than the second preset angle
  • the second preset angle between the second branch electrode of the first sub-pixel and the corresponding second trunk electrode The angle is set to be greater than the second preset angle between the second branch electrode of the second sub-pixel and the corresponding second trunk electrode.
  • the range of the first preset angle is 40 degrees to 50 degrees
  • the distance between the second branch electrode of the first sub-pixel and the corresponding second trunk electrode is The range of the second preset angle is 30 degrees to 40 degrees
  • the main sub-pixel further includes a third main electrode disposed across the first main electrode, and each of the sub-sub-pixels further includes a fourth main electrode disposed in intersection with the second main electrode. main electrode;
  • the first trunk electrode and the third trunk electrode divide the main sub-pixel into four liquid crystal alignment regions
  • the second trunk electrode and the fourth trunk electrode divide each of the sub-sub-pixels into four liquid crystal alignment regions. a liquid crystal alignment region.
  • Embodiments of the present application provide a display panel including the above pixel structure.
  • the beneficial effects of the present application are: in the pixel structure and the display panel provided by the present application, only one thin film transistor electrically connecting the main sub-pixel and at least one sub-sub-pixel is provided, and by controlling the pre-tilt angle of the first branch electrode of the main sub-pixel and the sub-pixel
  • the pretilt angles of the second branch electrodes of the sub-pixels are different, so that the driving voltage of the main sub-pixel is different from the driving voltage of the sub-sub-pixel, so that the color shift can be effectively improved and a wider viewing angle can be obtained.
  • the present application only needs to use one thin film transistor to drive the main sub-pixel and at least one sub-sub-pixel, which reduces the number of thin film transistors, can greatly save space, and is beneficial to improve the aperture ratio and light transmission of the pixel structure. rate, reducing power consumption.
  • FIG. 1 is a schematic plan view of a first pixel structure according to an embodiment of the present application
  • FIG. 2 is a circuit diagram corresponding to a pixel structure shown in FIG. 1;
  • FIG. 3 is a schematic plan view of a second pixel structure provided by an embodiment of the present application.
  • FIG. 4 is a circuit diagram corresponding to the second pixel structure shown in FIG. 2 .
  • FIG. 1 is a schematic plan view of a first pixel structure according to an embodiment of the present application.
  • the embodiment of the present application provides a pixel structure 100, the pixel structure 100 includes a plurality of scan lines 1 and a plurality of data lines 2 arranged in a cross, and the plurality of the scan lines 1 and the plurality of the data lines 2 define a A plurality of sub-pixel units 3 .
  • Each of the sub-pixel units 3 includes a main sub-pixel 4 , at least one sub-pixel 5 , and a thin film transistor 6 electrically connecting the main sub-pixel 4 and the at least one sub-sub-pixel 5 .
  • the main sub-pixel 4 includes a main pixel electrode 401, the main pixel electrode 401 includes a first trunk electrode 402 and a first branch electrode 403, and the first branch electrode 403 and the first trunk electrode 402 are in a first preset The angle ⁇ is electrically connected; each of the sub-pixels 5 includes a sub-pixel electrode 501, the sub-pixel electrode 501 includes a second trunk electrode 502 and a second branch electrode 503, and the second trunk electrode 502 is connected to the first The trunk electrodes 402 are parallel, and the second branch electrodes 503 are electrically connected to the second trunk electrodes 502 at a second predetermined angle ⁇ .
  • the first preset angle ⁇ is set to be different from the second preset angle ⁇ , so as to control the difference between the deflection angles of the liquid crystal molecules corresponding to the main sub-pixel 4 and the sub-sub-pixel 5 , the The driving voltage of the main sub-pixel 4 is different from the driving voltage of the sub-sub-pixel 5, so that the display panel can improve the color shift and obtain a large viewing angle.
  • the present application only needs to use one thin-film transistor 6 to drive the main sub-pixel 4 and the sub-pixels 5 , thereby reducing the number of thin film transistors 6 , which can greatly save space, help improve the aperture ratio and light transmittance of the pixel structure 100 , and reduce power consumption.
  • each of the sub-pixel units 3 of the pixel structure 100 in the embodiment of the present application may adopt an eight-domain pixel design.
  • each of the sub-pixel units 3 includes a main sub-pixel 4, One sub-sub-pixel 5 and one thin-film transistor 6 electrically connecting the main sub-pixel 4 and the sub-sub-pixel 5 .
  • the main sub-pixel 4 includes a main pixel electrode 401, the main pixel electrode 401 includes a first trunk electrode 402 and a first branch electrode 403, and the first branch electrode 403 and the first trunk electrode 402 are in a first preset The angle ⁇ is electrically connected.
  • the sub-pixel 5 includes a sub-pixel electrode 501, the sub-pixel electrode 501 includes a second trunk electrode 502 and a second branch electrode 503, the second trunk electrode 502 is parallel to the first trunk electrode 402, the The second branch electrode 503 is electrically connected to the second trunk electrode 502 at a second predetermined angle ⁇ .
  • the first trunk electrode 402 and the second trunk electrode 502 are both lateral trunk electrodes.
  • the area of the main sub-pixel 4 is larger than that of the sub-sub-pixel 5
  • the thin film transistor 6 is disposed between the main sub-pixel 4 and the sub-sub-pixel 5
  • the thin-film transistor 6 The control terminal 61 of the thin film transistor 6 is electrically connected to the corresponding scan line 1
  • the first terminal 62 of the thin film transistor 6 is electrically connected to the corresponding data line 2
  • the second terminal 63 of the thin film transistor 6 is electrically connected to the main pixel electrode 401 and the sub-pixel electrode 501 .
  • the second terminal 63 of the thin film transistor 6 is electrically connected to the main pixel electrode 401 through the first via hole 71 , and the second terminal 63 of the thin film transistor 6 is electrically connected to the sub-pixel through the second via hole 72 . Electrode 501.
  • the control terminal 61 may be the gate of the thin film transistor 6
  • the first terminal 62 may be the source of the thin film transistor 6
  • the second terminal 63 may be the drain of the thin film transistor 6 .
  • the thin film transistor 6 may be a P-type thin film transistor, or an N-type thin film transistor, which is not limited to this embodiment of the present application.
  • the main sub-pixel 4 further includes a first storage capacitor Cst_1 and a first liquid crystal capacitor Clc_1, the sub-sub-pixel 5 further includes a second storage capacitor Cst_2 and a second liquid crystal capacitor Clc_2;
  • the pixel structure 100 further includes a first common electrode Acom and a second common electrode CFcom, the first storage capacitor Cst_1 and the second storage capacitor Cst_2 are electrically connected to the first common electrode Acom, the first liquid crystal capacitor Clc_1 and the second liquid crystal capacitor Clc_2 are connected to The second common electrode CFcom is electrically connected.
  • the main sub-pixel 4 and the sub-sub-pixel 5 are processed by the same thin film transistor 6 .
  • Charging and discharging that is, the charging and discharging conditions of the main sub-pixel 4 and the sub-sub-pixel 5 are completely consistent, and the driving voltage of the main sub-pixel 4 is the same as the driving voltage of the sub-sub-pixel 5 .
  • the difference between the deflection angles of the liquid crystal molecules corresponding to the main sub-pixel 4 and the sub-sub-pixel 5 is controlled by controlling the difference between the first preset angle ⁇ and the second preset angle ⁇ . , so that the display panel can improve the color shift and obtain a large viewing angle.
  • the range of the first preset angle ⁇ and the second preset angle ⁇ is 30 degrees to 50 degrees.
  • the main sub-pixel 4 is mainly used to control the brightness of the sub-pixel unit 3, the brightness of the main sub-pixel 4 is greater than the brightness of the sub-sub-pixel 5, and because the main sub-pixel 4 and all The brightness of the sub-pixels 5 depends on the size of the first preset angle ⁇ and the second preset angle ⁇ respectively. Therefore, in this embodiment of the present application, by making the first preset angle ⁇ greater than The second preset angle ⁇ is such that the deflection angle of the liquid crystal molecules corresponding to the main sub-pixel 4 is greater than the deflection angle of the liquid crystal molecules corresponding to the sub-sub-pixel 5, so that the light transmittance of the main sub-pixel 4 is greater than The light transmittance of the sub-pixel 5 .
  • the range of the first preset angle ⁇ is 40 degrees to 50 degrees, and the range of the second preset angle ⁇ is 30 degrees to 45 degrees.
  • the first preset angle ⁇ is 45 degrees, so as to keep the deflection angle of the liquid crystal molecules corresponding to the main sub-pixel 4 at the maximum, thereby increasing the light transmittance of the main sub-pixel 4 .
  • both the main sub-pixel 4 and the sub-sub-pixel 5 are four domains, that is, the main sub-pixel 4 includes a third trunk electrode 404 disposed across the first trunk electrode 402 , and the sub-sub-pixel 5 It also includes a fourth trunk electrode 504 arranged across the second trunk electrode 502 .
  • the first trunk electrode 402 and the third trunk electrode 404 divide the main sub-pixel 4 into four liquid crystal alignment regions, and the second trunk electrode 502 and the fourth trunk electrode 504 divide the sub-pixel 5 is divided into four liquid crystal alignment regions.
  • the third trunk electrode 404 and the fourth trunk electrode 504 are vertical trunk electrodes, the third trunk electrode 404 and the first trunk electrode 402 are crossed, and the fourth trunk electrode 504 and the The second trunk electrodes 502 are arranged crosswise.
  • the sub-pixel unit 3 of the pixel structure 100 is not limited to adopting an eight-domain pixel design, but can also adopt a more-domain pixel design, such as a twelve-domain pixel design.
  • the more domain pixel design means that the sub-pixel unit 3 includes one main sub-pixel 4, two or more sub-sub-pixels 5, and one is electrically connected to the main sub-pixel 4 and two or more sub-pixels 5.
  • the thin film transistor 6 of the sub-pixel 5 is not limited to adopting an eight-domain pixel design, but can also adopt a more-domain pixel design, such as a twelve-domain pixel design.
  • the more domain pixel design means that the sub-pixel unit 3 includes one main sub-pixel 4, two or more sub-sub-pixels 5, and one is electrically connected to the main sub-pixel 4 and two or more sub-pixels 5.
  • the thin film transistor 6 of the sub-pixel 5 is not limited to adopting an eight-domain pixel design, but can also adopt a more-domain pixel design, such as
  • the present application also controls the second branch electrodes 503 in different sub-pixels 5 and the corresponding second trunk electrodes 502
  • the second preset angle ⁇ between them is different to control the deflection angle of the liquid crystal molecules, so that there is a voltage difference between every two of the sub-sub-pixels 5, so as to obtain a wider viewing angle.
  • the second pre-treatment area between the second branch electrode 503 of the sub-sub-pixel 5 disposed close to the main sub-pixel 4 and the corresponding second trunk electrode 502 Let the angle be ⁇ 1, the second preset angle between the second branch electrode 503 of the secondary sub-pixel 5 disposed far from the main sub-pixel 4 and the corresponding second trunk electrode 502 is ⁇ 2, Then, it is necessary to ensure that ⁇ 1 is greater than ⁇ 2, so that the brightness of the sub-pixel unit 3 has a uniform transition.
  • each of the sub-pixel units 3 includes a main sub-pixel 4 and two secondary sub-pixels.
  • the two sub-sub-pixels 5 include a first sub-pixel 51 and a second sub-pixel 52, and both the first sub-pixel 51 and the second sub-pixel 52 include the sub-pixel electrodes 501, respectively, And the sub-pixel electrodes 501 of the first sub-pixel 51 and the second sub-pixel 52 include the second trunk electrode 502 and the second branch electrode 503 respectively.
  • the thin film transistor 6 is electrically connected to the main sub-pixel 4 , the first sub-pixel 51 and the second sub-pixel 52 . Specifically, the second end 63 of the thin film transistor 6 is electrically connected to the main pixel electrode 401 through the first via hole 71 , and the second end 63 of the thin film transistor 6 is electrically connected to the first through hole 72 .
  • the sub-pixel electrode 501 of the sub-sub-pixel 51 and the second terminal 63 of the thin film transistor 6 are electrically connected to the sub-pixel electrode 501 of the second sub-pixel 52 through the third via hole 73 .
  • the thin film transistor 6 is disposed between the first sub-pixel 51 and the second sub-pixel 52 , and the area of the main sub-pixel 4 is larger than that of the first sub-pixel 51 , and the area of the first sub-pixel 51 is larger than the area of the second sub-pixel 52 .
  • the main sub-pixel 4 is mainly used to control the brightness of the sub-pixel unit 3, the brightness of the main sub-pixel 4 is greater than that of the first sub-pixel 51 and the second sub-pixel. 52, and because the first sub-pixel 51 is set closer to the main sub-pixel 4 than the second sub-pixel 52, in order to make the brightness of the three transition evenly, the first sub-pixel 51 The brightness is greater than the brightness of the second sub-pixel 52 .
  • the second branch electrodes 503 of the first sub-pixels 51 and the corresponding The second preset angle ⁇ 1 between the second trunk electrodes 502 is greater than the angle between the second branch electrodes 503 of the second sub-pixels 52 and the corresponding second trunk electrodes 502
  • the second preset angle ⁇ 2 is such that the deflection angle of the liquid crystal molecules corresponding to the main sub-pixel 4 is greater than the deflection angle of the liquid crystal molecules corresponding to the first sub-pixel 51 , and the liquid crystal molecules corresponding to the first sub-pixel 51
  • the deflection angle of the molecules is greater than the deflection angle of the liquid crystal molecules corresponding to the second sub-pixel 52, so that the light transmittance of the main sub-pixel 4 is greater than the light transmittance of the first sub-pixel 51, and the The light transmittance of the primary sub-pixel 51 is greater than the light transmittance of the second sub-pixel 52 .
  • the range of the first preset angle ⁇ is 40 degrees to 50 degrees
  • the distance between the second branch electrode 503 of the first sub-pixel 51 and the corresponding second trunk electrode 502 is between 40 degrees and 50 degrees.
  • the range of the second preset angle ⁇ 1 is 30 degrees to 40 degrees
  • the range of the angle ⁇ 2 is 35 degrees to 45 degrees.
  • the voltage difference between the main sub-pixel 4 and the first sub-pixel 51 and the second sub-pixel 52 is obtained by setting a shared electrode line
  • the pixel structure 100 provided by the embodiment of the present application can obtain the above-mentioned voltage difference without setting the shared electrode line, that is, the setting of the shared electrode line is cancelled, so that the aperture ratio can be further improved.
  • the main sub-pixel 4 further includes a first storage capacitor Cst_1 and a first liquid crystal capacitor Clc_1, the first sub-pixel 51 includes a second storage capacitor Cst_2 and a second liquid crystal capacitor Clc_2, the second sub-pixel 52 includes a second storage capacitor Cst_3 and a second liquid crystal capacitor Clc_3.
  • the pixel structure 100 further includes a first common electrode Acom and a second common electrode CFcom, the first storage capacitor Cst_1 and the two second storage capacitors Cst_2 and Cst_3 are electrically connected to the first common electrode Acom, so The first liquid crystal capacitor Clc_1 and the two second liquid crystal capacitors Clc_2 and Clc_3 are electrically connected to the second common electrode CFcom.
  • the main sub-pixel 4 , the first sub-pixel 51 and the second sub-pixel 52 are all four domains, that is, the main sub-pixel 4 includes a third trunk electrode arranged across the first trunk electrode 402 Step 404 , the first sub-pixel 51 and the second sub-pixel 52 each include a fourth trunk electrode 504 disposed across the second trunk electrode 502 .
  • the first trunk electrode 402 and the third trunk electrode 404 divide the main sub-pixel 4 into four liquid crystal alignment regions, and the second trunk electrode 502 and the fourth trunk electrode 504 divide the corresponding The primary sub-pixel 51 and the second sub-pixel 52 are respectively divided into four liquid crystal alignment regions.
  • the main pixel electrode 401 further includes two side electrodes 405 extending to opposite sides of the first sub-pixel 51 and located at the data line 2 and the first sub-pixel 51
  • the side electrodes 405 play the role of connecting the main pixel electrode 401 and the thin film transistor 6; on the other hand, the two side electrodes 405 are symmetrically arranged on the first sub-pixel 51
  • the opposite sides play a shielding role to avoid interference with the electric field formed by the sub-pixel electrode 501 of the first sub-pixel 51 and the second common electrode CFcom when the data line 2 loads electrical signals.
  • Embodiments of the present application further provide a display panel, where the display panel includes the pixel structure 100 in the foregoing embodiments.
  • the beneficial effects are as follows: in the pixel structure and the display panel provided by the embodiments of the present application, only one thin film transistor electrically connecting the main sub-pixel and at least one sub-sub-pixel is provided, and by controlling the pre-tilt angle of the first branch electrode of the main sub-pixel and the sub-sub-pixel The pre-tilt angles of the second branch electrodes of the pixels are different, so that the driving voltage of the main sub-pixel is different from the driving voltage of the sub-sub-pixel, so that the color shift can be effectively improved and a wider viewing angle can be obtained.
  • the present application only needs to use one thin film transistor to drive the main sub-pixel and at least one sub-sub-pixel, which reduces the number of thin film transistors, can greatly save space, and is beneficial to improve the aperture ratio and light transmission of the pixel structure. rate, reducing power consumption.

Abstract

本申请公开了一种像素结构及显示面板，像素结构的每一子像素单元包括主子像素、至少一个次子像素和一个电连接主子像素和次子像素的薄膜晶体管，并控制主子像素的第一分支电极的预倾角与次子像素的第二分支电极的预倾角不同，使得主子像素与次子像素的驱动电压相异，改善了色偏、获得更宽广的视角，提升了开口率和透光率。

Description

像素结构及显示面板 技术领域
本申请涉及显示技术领域，尤其涉及一种像素结构及显示面板。
 背景技术
对于垂直配向型（Vertical Alignment，VA）液晶显示面板，由于液晶分子在不同视野角度下的双折射的差异较大，显示面板在大视角下会出现色偏，特别是，大尺寸垂直配向型液晶显示面板在垂直视角下存在色偏。
目前为了解决色偏问题，一般采用3T_8domain和3T_12domain的垂直配向型像素设计，通过使同一个子像素内主区与次区的液晶分子的转动角度不一样，达到改善色偏的目的。然而，无论是3T_12domain像素设计还是3T_8domain像素设计，均需要多个晶体管工作，大幅度降低了像素结构的开口率及穿透率。
综上，亟需提供一种像素结构及显示面板，来解决上述技术问题。
 技术问题
本申请提供一种像素结构及显示面板，以解决现有的像素结构克服色偏缺陷的同时却需要多个晶体管工作，大幅度降低了像素结构的开口率及穿透率的技术问题。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
本申请提供一种像素结构，所述像素结构包括呈交叉设置的多条扫描线和多条数据线，多条所述扫描线和多条所述数据线限定出多个子像素单元，每一所述子像素单元包括主子像素、至少一个次子像素和一个电连接所述主子像素和至少一个所述次子像素的薄膜晶体管；
所述主子像素包括主像素电极，所述主像素电极包括第一主干电极和第一分支电极，所述第一分支电极与所述第一主干电极呈第一预设角度电连接；每一所述次子像素包括次像素电极，所述次像素电极包括第二主干电极和第二分支电极，所述第二分支电极与所述第二主干电极呈第二预设角度电连接；其中，所述第一预设角度与所述第二预设角度不同，所述第一预设角度大于所述第二预设角度，且所述第一预设角度和所述第二预设角度的范围为30度~50度。
根据本申请提供的像素结构，不同的所述次子像素中的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度不同。
根据本申请提供的像素结构，靠近所述主子像素设置的所述次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度为β1，远离所述主子像素设置的所述次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度为β2;
其中，β1大于β2。
根据本申请提供的像素结构，所述第一预设角度的范围为40度~50度，所述第二预设角度的范围为30度~45度。
根据本申请提供的像素结构，所述薄膜晶体管的控制端电连接对应的所述扫描线，所述薄膜晶体管的第一端电连接对应的所述数据线，所述薄膜晶体管的第二端电连接所述主像素电极和所述次像素电极。
根据本申请提供的像素结构，所述主子像素还包括第一存储电容器和第一液晶电容器，每一所述次子像素还包括第二存储电容器和第二液晶电容器；
所述像素结构还包括第一公共电极和第二公共电极，所述第一存储电容器和所述第二存储电容器与所述第一公共电极电连接，所述第一液晶电容器和所述第二液晶电容器与所述第二公共电极电连接。
根据本申请提供的像素结构，至少一个所述次子像素包括第一次子像素和第二次子像素，所述薄膜晶体管电连接所述主子像素、所述第一次子像素和所述第二次子像素，所述薄膜晶体管位于所述第一次子像素和所述第二次子像素之间；
其中，所述第一预设角度大于所述第二预设角度，且所述第一次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度，大于所述第二次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度。
根据本申请提供的像素结构，所述第一预设角度的范围为40度~50度，所述第一次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度的范围为30度~40度，所述第二次子像素对应的所述第二分支电极与所述第二主干电极之间的所述第二预设角度的范围为35度~45度。
本申请提供一种像素结构，所述像素结构包括呈交叉设置的多条扫描线和多条数据线，多条所述扫描线和多条所述数据线限定出多个子像素单元，每一所述子像素单元包括主子像素、至少一个次子像素和一个电连接所述主子像素和至少一个所述次子像素的薄膜晶体管；
所述主子像素包括主像素电极，所述主像素电极包括第一主干电极和第一分支电极，所述第一分支电极与所述第一主干电极呈第一预设角度电连接；每一所述次子像素包括次像素电极，所述次像素电极包括第二主干电极和第二分支电极，所述第二分支电极与所述第二主干电极呈第二预设角度电连接；其中，所述第一预设角度与所述第二预设角度不同。
根据本申请提供的像素结构，不同的所述次子像素中的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度不同。
根据本申请提供的像素结构，靠近所述主子像素设置的所述次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度为β1，远离所述主子像素设置的所述次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度为β2;
其中，β1大于β2。
根据本申请提供的像素结构，所述第一预设角度和所述第二预设角度的范围为30度~50度。
根据本申请提供的像素结构，所述第一预设角度大于所述第二预设角度。
根据本申请提供的像素结构，所述第一预设角度的范围为40度~50度，所述第二预设角度的范围为30度~45度。
根据本申请提供的像素结构，所述薄膜晶体管的控制端电连接对应的所述扫描线，所述薄膜晶体管的第一端电连接对应的所述数据线，所述薄膜晶体管的第二端电连接所述主像素电极和所述次像素电极。
根据本申请提供的像素结构，所述主子像素还包括第一存储电容器和第一液晶电容器，每一所述次子像素还包括第二存储电容器和第二液晶电容器；
所述像素结构还包括第一公共电极和第二公共电极，所述第一存储电容器和所述第二存储电容器与所述第一公共电极电连接，所述第一液晶电容器和所述第二液晶电容器与所述第二公共电极电连接。
根据本申请提供的像素结构，至少一个所述次子像素包括第一次子像素和第二次子像素，所述薄膜晶体管电连接所述主子像素、所述第一次子像素和所述第二次子像素，所述薄膜晶体管位于所述第一次子像素和所述第二次子像素之间；
其中，所述第一预设角度大于所述第二预设角度，且所述第一次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度，大于所述第二次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度。
根据本申请提供的像素结构，所述第一预设角度的范围为40度~50度，所述第一次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度的范围为30度~40度，所述第二次子像素对应的所述第二分支电极与所述第二主干电极之间的所述第二预设角度的范围为35度~45度。
根据本申请提供的像素结构，所述主子像素还包括与所述第一主干电极交叉设置的第三主干电极，每一所述次子像素还包括与所述第二主干电极交叉设置的第四主干电极；
所述第一主干电极与所述第三主干电极将所述主子像素划分为四个液晶配向区，所述第二主干电极和所述第四主干电极将每一所述次子像素划分为四个液晶配向区。
本申请实施例提供一种显示面板，包括上述像素结构。
 有益效果
本申请的有益效果为：本申请提供的像素结构及显示面板，通过仅设置一个电连接主子像素和至少一个次子像素的薄膜晶体管，并通过控制主子像素的第一分支电极的预倾角与次子像素的第二分支电极的预倾角不同，使得主子像素的驱动电压与次子像素的驱动电压相异，从而能够有效改善色偏、获得更宽广的视角。相较于现有技术，本申请仅需采用一个薄膜晶体管驱动主子像素和至少一个次子像素，减少了薄膜晶体管的数量，能够大幅度地节省空间，有利于提升像素结构的开口率和透光率，减少了功耗。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的第一种像素结构的平面结构示意图；
图2为图1所示的一种像素结构对应的电路图；
图3是本申请实施例提供的第二种像素结构的平面结构示意图；
图4为图2所示的第二种像素结构对应的电路图。
附图标记说明：
100、像素结构；
1、扫描线；2、数据线；3、子像素单元；4、主子像素；5、次子像素；6、薄膜晶体管；
401、主像素电极；402、第一主干电极；403、第一分支电极；404、第三主干电极；405、侧电极；
501、次像素电极；502、第二主干电极；503、第二分支电极；504、第四主干电极；
51、第一次子像素；52、第二次子像素；
61、控制端；62、第一端；63、第二端；
71、第一过孔；72、第二过孔；73、第三过孔。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。此外，应当理解的是，此处所描述的具体实施方式仅用于说明和解释本申请，并不用于限制本申请。在本申请中，在未作相反说明的情况下，使用的方位词如“上”和“下”通常是指装置实际使用或工作状态下的上和下，具体为附图中的图面方向；而“内”和“外”则是针对装置的轮廓而言的。
请参阅图1，图1为本申请实施例提供的第一种像素结构的平面结构示意图。本申请实施例提供一种像素结构100，所述像素结构100包括呈交叉设置的多条扫描线1和多条数据线2，多条所述扫描线1和多条所述数据线2限定出多个子像素单元3。每一所述子像素单元3包括一个主子像素4、至少一次子像素5和一个电连接所述主子像素4和至少一个所述次子像素5的薄膜晶体管6。
所述主子像素4包括主像素电极401，所述主像素电极401包括第一主干电极402和第一分支电极403，所述第一分支电极403与所述第一主干电极402呈第一预设角度α电连接；每一所述次子像素5包括次像素电极501，所述次像素电极501包括第二主干电极502和第二分支电极503，所述第二主干电极502与所述第一主干电极402平行，所述第二分支电极503与所述第二主干电极502呈第二预设角度β电连接。
本申请通过设置所述第一预设角度α与所述第二预设角度β不同，以控制对应所述主子像素4与对应所述次子像素5的液晶分子的偏转角度存在差异，所述主子像素4的驱动电压与所述次子像素5的驱动电压不同，从而使得所述显示面板改善色偏，获得大视角。相较于现有技术中设置两个或多个薄膜晶体管分别驱动所述主子像素4和所述次子像素5以获得电压差的方式，本申请仅需采用一个薄膜晶体管6驱动所述主子像素4和所述次子像素5，从而减少了薄膜晶体管6的数量，能够大幅度地节省空间，有利于提升像素结构100的开口率和透光率，减少了功耗。
现结合具体实施例对本申请的技术方案进行描述。
请结合图1和图2，本申请实施例中的所述像素结构100的所述子像素单元3可以采用八畴像素设计，具体地，每一所述子像素单元3包括一个主子像素4、一个次子像素5和一个电连接所述主子像素4和所述次子像素5的薄膜晶体管6。
所述主子像素4包括主像素电极401，所述主像素电极401包括第一主干电极402和第一分支电极403，所述第一分支电极403与所述第一主干电极402呈第一预设角度α电连接。所述次子像素5包括次像素电极501，所述次像素电极501包括第二主干电极502和第二分支电极503，所述第二主干电极502与所述第一主干电极402平行，所述第二分支电极503与所述第二主干电极502呈第二预设角度β电连接。其中，所述第一主干电极402和所述第二主干电极502均为横向主干电极。
本申请实施例中，所述主子像素4的面积大于所述次子像素5的面积，所述薄膜晶体管6设于所述主子像素4和所述次子像素5之间，所述薄膜晶体管6的控制端61电连接对应的所述扫描线1，所述薄膜晶体管6的第一端62电连接对应的所述数据线2，所述薄膜晶体管6的第二端63电连接所述主像素电极401和所述次像素电极501。具体地，所述薄膜晶体管6的第二端63通过第一过孔71电连接所述主像素电极401，所述薄膜晶体管6的第二端63通过第二过孔72电连接所述次像素电极501。
所述控制端61可以为所述薄膜晶体管6的栅极，所述第一端62可以为所述薄膜晶体管6的源极，所述第二端63可以为所述薄膜晶体管6的漏极。所述薄膜晶体管6可以为P型薄膜晶体管，也可以为N型薄膜晶体管，本申请实施例不以此为限。
所述主子像素4还包括第一存储电容器Cst_1和第一液晶电容器Clc_1，所述次子像素5还包括第二存储电容器Cst_2和第二液晶电容器Clc_2；所述像素结构100还包括第一公共电极Acom和第二公共电极CFcom，所述第一存储电容器Cst_1和所述第二存储电容器Cst_2与所述第一公共电极Acom电连接，所述第一液晶电容器Clc_1和所述第二液晶电容器Clc_2与所述第二公共电极CFcom电连接。
可以理解的是，由于所述薄膜晶体管6同时电连接所述主像素电极401和所述次像素电极501，则所述主子像素4和所述次子像素5通过同一个所述薄膜晶体管6进行充放电，即所述主子像素4和所述次子像素5的充放电情况完全一致，所述主子像素4的驱动电压与所述次子像素5的驱动电压相同。而本申请实施例通过控制所述第一预设角度α和所述第二预设角度β不同，以控制对应所述主子像素4与对应所述次子像素5的液晶分子的偏转角度存在差异，从而使得所述显示面板改善色偏，获得大视角。
具体地，所述第一预设角度α和所述第二预设角度β的范围为30度~50度。
进一步地，由于所述主子像素4主要用于控制所述子像素单元3的亮度，因此，所述主子像素4的亮度大于所述次子像素5的亮度，又由于所述主子像素4和所述次子像素5的亮度分别取决于所述第一预设角度α和所述第二预设角度β的大小，因此，在本申请实施例中，通过使得所述第一预设角度α大于所述第二预设角度β，以使对应所述主子像素4的液晶分子的偏转角度大于对应所述次子像素5的液晶分子的偏转角度，从而使得所述主子像素4的透光率大于所述次子像素5的透光率。
具体地，所述第一预设角度α的范围为40度~50度，所述第二预设角度β的范围为30度~45度。优选地，所述第一预设角度α为45度，以使对应所述主子像素4的液晶分子的偏转角度保持最大，从而增大所述主子像素4的透光率。
具体地，所述主子像素4和所述次子像素5均为四畴，即所述主子像素4包括与所述第一主干电极402交叉设置的第三主干电极404，所述次子像素5还包括与所述第二主干电极502交叉设置的第四主干电极504。所述第一主干电极402与所述第三主干电极404将所述主子像素4划分为四个液晶配向区，所述第二主干电极502和所述第四主干电极504将所述次子像素5划分为四个液晶配向区。其中，所述第三主干电极404和所述第四主干电极504为竖向主干电极，所述第三主干电极404与所述第一主干电极402交叉设置，所述第四主干电极504与所述第二主干电极502交叉设置。
进一步地，在其它实施例中，所述像素结构100的所述子像素单元3不仅仅局限于采用八畴像素设计，也可采用更多畴像素设计，例如十二畴像素设计。需要说明的是，更多畴像素设计是指所述子像素单元3包括一个主子像素4、两个或两个以上次子像素5和一个电连接所述主子像素4和两个或两个以上次子像素5的薄膜晶体管6。
同样地，为了获得三种或三种以上的压差，以改善视角，同样地，本申请通过控制不同次子像素5中的所述第二分支电极503与对应的所述第二主干电极502之间的所述第二预设角度β不同来控制液晶分子的偏转角度，以使每两个所述次子像素5之间存在压差，从而获得更广视角。
进一步地，在本申请实施例中，靠近所述主子像素4设置的所述次子像素5的所述第二分支电极503与对应的所述第二主干电极502之间的所述第二预设角度为β1，远离所述主子像素4设置的所述次子像素5的所述第二分支电极503与对应的所述第二主干电极502之间的所述第二预设角度为β2，则需保证β1大于β2，使得所述子像素单元3的亮度存在均匀过渡。
本申请实施例以十二畴像素设计为例进行阐述说明。请结合图3和图4，本申请实施例中的像素结构的子像素单元3可以采用十二畴像素设计，具体地，每一所述子像素单元3包括一个主子像素4、两个次子像素5和一个电连接所述主子像素4和所述次子像素5的薄膜晶体管6。
两个所述次子像素5包括第一次子像素51和第二次子像素52，所述第一次子像素51和所述第二次子像素52均分别包括所述次像素电极501，且所述第一次子像素51和所述第二次子像素52的次像素电极501均分别包括所述第二主干电极502和所述第二分支电极503。所述薄膜晶体管6电连接所述主子像素4、所述第一次子像素51和所述第二次子像素52。具体地，所述薄膜晶体管6的第二端63通过第一过孔71电连接所述主像素电极401，所述薄膜晶体管6的第二端63通过第二过孔72电连接所述第一次子像素51的次像素电极501，所述薄膜晶体管6的第二端63通过第三过孔73电连接所述第二次子像素52的所述次像素电极501。
在本申请实施例中，所述薄膜晶体管6设于所述第一次子像素51和所述第二次子像素52之间，所述主子像素4的面积大于所述第一次子像素51的面积，且所述第一次子像素51的面积大于所述第二次子像素52的面积。
可以理解的是，由于所述主子像素4主要用于控制所述子像素单元3的亮度，因此，所述主子像素4的亮度大于所述第一次子像素51和所述第二次子像素52的亮度，又由于所述第一次子像素51相比所述第二次子像素52靠近所述主子像素4设置，为了使得三者亮度得到均匀过渡，则所述第一次子像素51的亮度大于所述第二次子像素52的亮度。因此，在本申请实施例中，通过使得所述第一预设角度α大于所述第二预设角度β，且所述第一次子像素51的所述第二分支电极503与对应的所述第二主干电极502之间的所述第二预设角度β1，大于所述第二次子像素52的所述第二分支电极503与对应的所述第二主干电极502之间的所述第二预设角度β2，以使对应所述主子像素4的液晶分子的偏转角度大于对应所述第一次子像素51的液晶分子的偏转角度，且对应所述第一次子像素51的液晶分子的偏转角度大于对应所述第二次子像素52的液晶分子的偏转角度，从而使得所述主子像素4的透光率大于所述第一次子像素51的透光率，且所述第一次子像素51的透光率大于所述第二次子像素52的透光率。
具体地，所述第一预设角度α的范围为40度~50度，所述第一次子像素51的所述第二分支电极503与对应的所述第二主干电极502之间的所述第二预设角度β1的范围为30度~40度，所述第二次子像素52对应的所述第二分支电极503与所述第二主干电极502之间的所述第二预设角度β2的范围为35度~45度。
可以理解的是，现有的像素设计是通过设置共享电极线（sharebar）来获得所述主子像素4和所述第一次子像素51和所述第二次子像素52之间的压差，然而本申请实施例提供的所述像素结构100无需设置共享电极线即可获得上述压差，即取消了共享电极线的设置，从而能够进一步提升开口率。
进一步地，所述主子像素4还包括第一存储电容器Cst_1和第一液晶电容器Clc_1，所述第一次子像素51包括第二存储电容器Cst_2和第二液晶电容器Clc_2，所述第二次子像素52包括第二存储电容器Cst_3和第二液晶电容器Clc_3。所述像素结构100还包括第一公共电极Acom和第二公共电极CFcom，所述第一存储电容器Cst_1和两个所述第二存储电容器Cst_2、Cst_3与所述第一公共电极Acom电连接，所述第一液晶电容器Clc_1和两个所述第二液晶电容器Clc_2、Clc_3与所述第二公共电极CFcom电连接。
所述主子像素4、所述第一次子像素51和所述第二次子像素52均为四畴，即所述主子像素4包括与所述第一主干电极402交叉设置的第三主干电极404，所述第一次子像素51和所述第二次子像素52均分别包括与所述第二主干电极502交叉设置的第四主干电极504。所述第一主干电极402与所述第三主干电极404将所述主子像素4划分为四个液晶配向区，所述第二主干电极502和所述第四主干电极504将对应的所述第一次子像素51和所述第二次子像素52分别划分为四个液晶配向区。
具体地，所述主像素电极401还包括两个侧电极405，所述侧电极405延伸至所述第一次子像素51的相对两侧且位于所述数据线2和第一次子像素51之间，一方面,所述侧电极405起到连接所述主像素电极401与所述薄膜晶体管6的作用；另一方面，两个所述侧电极405对称设置于第一次子像素51的相对两侧起到屏蔽作用，避免所述数据线2载入电信号时干扰第一次子像素51的次像素电极501与所述第二公共电极CFcom形成的电场。
本申请实施例还提供一种显示面板，所述显示面板包括上述实施例中的像素结构100。
有益效果为：本申请实施例提供的像素结构及显示面板，通过仅设置一个电连接主子像素和至少一个次子像素的薄膜晶体管，并通过控制主子像素的第一分支电极的预倾角与次子像素的第二分支电极的预倾角不同，使得主子像素的驱动电压与次子像素的驱动电压相异，从而能够有效改善色偏、获得更宽广的视角。相较于现有技术，本申请仅需采用一个薄膜晶体管驱动主子像素和至少一个次子像素，减少了薄膜晶体管的数量，能够大幅度地节省空间，有利于提升像素结构的开口率和透光率，减少了功耗。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种像素结构，所述像素结构包括呈交叉设置的多条扫描线和多条数据线，多条所述扫描线和多条所述数据线限定出多个子像素单元，每一所述子像素单元包括主子像素、至少一个次子像素和一个电连接所述主子像素和至少一个所述次子像素的薄膜晶体管；
    所述主子像素包括主像素电极，所述主像素电极包括第一主干电极和第一分支电极，所述第一分支电极与所述第一主干电极呈第一预设角度电连接；每一所述次子像素包括次像素电极，所述次像素电极包括第二主干电极和第二分支电极，所述第二分支电极与所述第二主干电极呈第二预设角度电连接；其中，所述第一预设角度与所述第二预设角度不同，所述第一预设角度大于所述第二预设角度，且所述第一预设角度和所述第二预设角度的范围为30度~50度。
  2. 根据权利要求1所述的像素结构，其中，不同的所述次子像素中的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度不同。
  3. 根据权利要求2所述的像素结构，其中，靠近所述主子像素设置的所述次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度为β1，远离所述主子像素设置的所述次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度为β2;
    其中，β1大于β2。
  4. 根据权利要求1所述的像素结构，其中，所述第一预设角度的范围为40度~50度，所述第二预设角度的范围为30度~45度。
  5. 根据权利要求1所述的像素结构，其中所述薄膜晶体管的控制端电连接对应的所述扫描线，所述薄膜晶体管的第一端电连接对应的所述数据线，所述薄膜晶体管的第二端电连接所述主像素电极和所述次像素电极。
  6. 根据权利要求5所述的像素结构，其中，所述主子像素还包括第一存储电容器和第一液晶电容器，每一所述次子像素还包括第二存储电容器和第二液晶电容器；
    所述像素结构还包括第一公共电极和第二公共电极，所述第一存储电容器和所述第二存储电容器与所述第一公共电极电连接，所述第一液晶电容器和所述第二液晶电容器与所述第二公共电极电连接。
  7. 根据权利要求1所述的像素结构，其中，至少一个所述次子像素包括第一次子像素和第二次子像素，所述薄膜晶体管电连接所述主子像素、所述第一次子像素和所述第二次子像素，所述薄膜晶体管位于所述第一次子像素和所述第二次子像素之间；
    其中，所述第一预设角度大于所述第二预设角度，且所述第一次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度，大于所述第二次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度。
  8. 根据权利要求7所述的像素结构，其中，所述第一预设角度的范围为40度~50度，所述第一次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度的范围为30度~40度，所述第二次子像素对应的所述第二分支电极与所述第二主干电极之间的所述第二预设角度的范围为35度~45度。
  9. 一种像素结构，所述像素结构包括呈交叉设置的多条扫描线和多条数据线，多条所述扫描线和多条所述数据线限定出多个子像素单元，每一所述子像素单元包括主子像素、至少一个次子像素和一个电连接所述主子像素和至少一个所述次子像素的薄膜晶体管；
    所述主子像素包括主像素电极，所述主像素电极包括第一主干电极和第一分支电极，所述第一分支电极与所述第一主干电极呈第一预设角度电连接；每一所述次子像素包括次像素电极，所述次像素电极包括第二主干电极和第二分支电极，所述第二分支电极与所述第二主干电极呈第二预设角度电连接；其中，所述第一预设角度与所述第二预设角度不同。
  10. 根据权利要求9所述的像素结构，其中，不同的所述次子像素中的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度不同。
  11. 根据权利要求10所述的像素结构，其中，靠近所述主子像素设置的所述次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度为β1，远离所述主子像素设置的所述次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度为β2;
    其中，β1大于β2。
  12. 根据权利要求9所述的像素结构，其中，所述第一预设角度和所述第二预设角度的范围为30度~50度。
  13. 根据权利要求9所述的像素结构，其中，所述第一预设角度大于所述第二预设角度。
  14. 根据权利要求13所述的像素结构，其中所述第一预设角度的范围为40度~50度，所述第二预设角度的范围为30度~45度。
  15. 根据权利要求9所述的像素结构，其中，所述薄膜晶体管的控制端电连接对应的所述扫描线，所述薄膜晶体管的第一端电连接对应的所述数据线，所述薄膜晶体管的第二端电连接所述主像素电极和所述次像素电极。
  16. 根据权利要求15所述的像素结构，其中，所述主子像素还包括第一存储电容器和第一液晶电容器，每一所述次子像素还包括第二存储电容器和第二液晶电容器；
    所述像素结构还包括第一公共电极和第二公共电极，所述第一存储电容器和所述第二存储电容器与所述第一公共电极电连接，所述第一液晶电容器和所述第二液晶电容器与所述第二公共电极电连接。
  17. 根据权利要求9所述的像素结构，其中，至少一个所述次子像素包括第一次子像素和第二次子像素，所述薄膜晶体管电连接所述主子像素、所述第一次子像素和所述第二次子像素，所述薄膜晶体管位于所述第一次子像素和所述第二次子像素之间；
    其中，所述第一预设角度大于所述第二预设角度，且所述第一次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度，大于所述第二次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度。
  18. 根据权利要求17所述的像素结构，其中，所述第一预设角度的范围为40度~50度，所述第一次子像素的所述第二分支电极与对应的所述第二主干电极之间的所述第二预设角度的范围为30度~40度，所述第二次子像素对应的所述第二分支电极与所述第二主干电极之间的所述第二预设角度的范围为35度~45度。
  19. 根据权利要求9所述的像素结构，其中，所述主子像素还包括与所述第一主干电极交叉设置的第三主干电极，每一所述次子像素还包括与所述第二主干电极交叉设置的第四主干电极；
    所述第一主干电极与所述第三主干电极将所述主子像素划分为四个液晶配向区，所述第二主干电极和所述第四主干电极将每一所述次子像素划分为四个液晶配向区。
  20. 一种显示面板，包括像素结构，所述像素结构包括呈交叉设置的多条扫描线和多条数据线，多条所述扫描线和多条所述数据线限定出多个子像素单元，每一所述子像素单元包括主子像素、至少一个次子像素和一个电连接所述主子像素和至少一个所述次子像素的薄膜晶体管；
    所述主子像素包括主像素电极，所述主像素电极包括第一主干电极和第一分支电极，所述第一分支电极与所述第一主干电极呈第一预设角度电连接；每一所述次子像素包括次像素电极，所述次像素电极包括第二主干电极和第二分支电极，所述第二分支电极与所述第二主干电极呈第二预设角度电连接；其中，所述第一预设角度与所述第二预设角度不同。
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